tx_fes_status_start.h 8.3 KB

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  1. /*
  2. * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef _TX_FES_STATUS_START_H_
  17. #define _TX_FES_STATUS_START_H_
  18. #define NUM_OF_DWORDS_TX_FES_STATUS_START 4
  19. struct tx_fes_status_start {
  20. #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
  21. uint32_t schedule_id : 32;
  22. uint32_t reserved_1a : 8,
  23. transmit_start_reason : 3,
  24. disabled_user_bitmap_36_32 : 5,
  25. schedule_cmd_ring_id : 5,
  26. fes_control_mode : 2,
  27. schedule_try : 4,
  28. medium_prot_type : 3,
  29. reserved_1b : 2;
  30. uint32_t optimal_bw_try_count : 4,
  31. number_of_users : 7,
  32. coex_nack_count : 5,
  33. cca_ed0 : 16;
  34. uint32_t disabled_user_bitmap_31_0 : 32;
  35. #else
  36. uint32_t schedule_id : 32;
  37. uint32_t reserved_1b : 2,
  38. medium_prot_type : 3,
  39. schedule_try : 4,
  40. fes_control_mode : 2,
  41. schedule_cmd_ring_id : 5,
  42. disabled_user_bitmap_36_32 : 5,
  43. transmit_start_reason : 3,
  44. reserved_1a : 8;
  45. uint32_t cca_ed0 : 16,
  46. coex_nack_count : 5,
  47. number_of_users : 7,
  48. optimal_bw_try_count : 4;
  49. uint32_t disabled_user_bitmap_31_0 : 32;
  50. #endif
  51. };
  52. #define TX_FES_STATUS_START_SCHEDULE_ID_OFFSET 0x00000000
  53. #define TX_FES_STATUS_START_SCHEDULE_ID_LSB 0
  54. #define TX_FES_STATUS_START_SCHEDULE_ID_MSB 31
  55. #define TX_FES_STATUS_START_SCHEDULE_ID_MASK 0xffffffff
  56. #define TX_FES_STATUS_START_RESERVED_1A_OFFSET 0x00000004
  57. #define TX_FES_STATUS_START_RESERVED_1A_LSB 0
  58. #define TX_FES_STATUS_START_RESERVED_1A_MSB 7
  59. #define TX_FES_STATUS_START_RESERVED_1A_MASK 0x000000ff
  60. #define TX_FES_STATUS_START_TRANSMIT_START_REASON_OFFSET 0x00000004
  61. #define TX_FES_STATUS_START_TRANSMIT_START_REASON_LSB 8
  62. #define TX_FES_STATUS_START_TRANSMIT_START_REASON_MSB 10
  63. #define TX_FES_STATUS_START_TRANSMIT_START_REASON_MASK 0x00000700
  64. #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_36_32_OFFSET 0x00000004
  65. #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_36_32_LSB 11
  66. #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_36_32_MSB 15
  67. #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_36_32_MASK 0x0000f800
  68. #define TX_FES_STATUS_START_SCHEDULE_CMD_RING_ID_OFFSET 0x00000004
  69. #define TX_FES_STATUS_START_SCHEDULE_CMD_RING_ID_LSB 16
  70. #define TX_FES_STATUS_START_SCHEDULE_CMD_RING_ID_MSB 20
  71. #define TX_FES_STATUS_START_SCHEDULE_CMD_RING_ID_MASK 0x001f0000
  72. #define TX_FES_STATUS_START_FES_CONTROL_MODE_OFFSET 0x00000004
  73. #define TX_FES_STATUS_START_FES_CONTROL_MODE_LSB 21
  74. #define TX_FES_STATUS_START_FES_CONTROL_MODE_MSB 22
  75. #define TX_FES_STATUS_START_FES_CONTROL_MODE_MASK 0x00600000
  76. #define TX_FES_STATUS_START_SCHEDULE_TRY_OFFSET 0x00000004
  77. #define TX_FES_STATUS_START_SCHEDULE_TRY_LSB 23
  78. #define TX_FES_STATUS_START_SCHEDULE_TRY_MSB 26
  79. #define TX_FES_STATUS_START_SCHEDULE_TRY_MASK 0x07800000
  80. #define TX_FES_STATUS_START_MEDIUM_PROT_TYPE_OFFSET 0x00000004
  81. #define TX_FES_STATUS_START_MEDIUM_PROT_TYPE_LSB 27
  82. #define TX_FES_STATUS_START_MEDIUM_PROT_TYPE_MSB 29
  83. #define TX_FES_STATUS_START_MEDIUM_PROT_TYPE_MASK 0x38000000
  84. #define TX_FES_STATUS_START_RESERVED_1B_OFFSET 0x00000004
  85. #define TX_FES_STATUS_START_RESERVED_1B_LSB 30
  86. #define TX_FES_STATUS_START_RESERVED_1B_MSB 31
  87. #define TX_FES_STATUS_START_RESERVED_1B_MASK 0xc0000000
  88. #define TX_FES_STATUS_START_OPTIMAL_BW_TRY_COUNT_OFFSET 0x00000008
  89. #define TX_FES_STATUS_START_OPTIMAL_BW_TRY_COUNT_LSB 0
  90. #define TX_FES_STATUS_START_OPTIMAL_BW_TRY_COUNT_MSB 3
  91. #define TX_FES_STATUS_START_OPTIMAL_BW_TRY_COUNT_MASK 0x0000000f
  92. #define TX_FES_STATUS_START_NUMBER_OF_USERS_OFFSET 0x00000008
  93. #define TX_FES_STATUS_START_NUMBER_OF_USERS_LSB 4
  94. #define TX_FES_STATUS_START_NUMBER_OF_USERS_MSB 10
  95. #define TX_FES_STATUS_START_NUMBER_OF_USERS_MASK 0x000007f0
  96. #define TX_FES_STATUS_START_COEX_NACK_COUNT_OFFSET 0x00000008
  97. #define TX_FES_STATUS_START_COEX_NACK_COUNT_LSB 11
  98. #define TX_FES_STATUS_START_COEX_NACK_COUNT_MSB 15
  99. #define TX_FES_STATUS_START_COEX_NACK_COUNT_MASK 0x0000f800
  100. #define TX_FES_STATUS_START_CCA_ED0_OFFSET 0x00000008
  101. #define TX_FES_STATUS_START_CCA_ED0_LSB 16
  102. #define TX_FES_STATUS_START_CCA_ED0_MSB 31
  103. #define TX_FES_STATUS_START_CCA_ED0_MASK 0xffff0000
  104. #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_31_0_OFFSET 0x0000000c
  105. #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_31_0_LSB 0
  106. #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_31_0_MSB 31
  107. #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_31_0_MASK 0xffffffff
  108. #endif