main.c 129 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <linux/version.h>
  46. #include <trace/hooks/remoteproc.h>
  47. #ifdef CONFIG_SLATE_MODULE_ENABLED
  48. #include <linux/soc/qcom/slatecom_interface.h>
  49. #include <linux/soc/qcom/slate_events_bridge_intf.h>
  50. #include <uapi/linux/slatecom_interface.h>
  51. #endif
  52. #include "main.h"
  53. #include "qmi.h"
  54. #include "debug.h"
  55. #include "power.h"
  56. #include "genl.h"
  57. #define MAX_PROP_SIZE 32
  58. #define NUM_LOG_PAGES 10
  59. #define NUM_LOG_LONG_PAGES 4
  60. #define ICNSS_MAGIC 0x5abc5abc
  61. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  62. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  63. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  64. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  65. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  66. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  67. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  68. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  69. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  70. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  71. #define ICNSS_MAX_PROBE_CNT 2
  72. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  73. #define PROBE_TIMEOUT 15000
  74. #define SMP2P_SOC_WAKE_TIMEOUT 500
  75. #ifdef CONFIG_ICNSS2_DEBUG
  76. static unsigned long qmi_timeout = 3000;
  77. module_param(qmi_timeout, ulong, 0600);
  78. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  79. #else
  80. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  81. #endif
  82. #define ICNSS_RECOVERY_TIMEOUT 60000
  83. #define ICNSS_WPSS_SSR_TIMEOUT 5000
  84. #define ICNSS_CAL_TIMEOUT 40000
  85. static struct icnss_priv *penv;
  86. static struct work_struct wpss_loader;
  87. static struct work_struct wpss_ssr_work;
  88. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  89. #define ICNSS_EVENT_PENDING 2989
  90. #define ICNSS_EVENT_SYNC BIT(0)
  91. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  92. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  93. ICNSS_EVENT_SYNC)
  94. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  95. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  96. #define SMP2P_GET_MAX_RETRY 4
  97. #define SMP2P_GET_RETRY_DELAY_MS 500
  98. #define RAMDUMP_NUM_DEVICES 256
  99. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  100. #define WLAN_EN_TEMP_THRESHOLD 5000
  101. #define WLAN_EN_DELAY 500
  102. static DEFINE_IDA(rd_minor_id);
  103. enum icnss_pdr_cause_index {
  104. ICNSS_FW_CRASH,
  105. ICNSS_ROOT_PD_CRASH,
  106. ICNSS_ROOT_PD_SHUTDOWN,
  107. ICNSS_HOST_ERROR,
  108. };
  109. static const char * const icnss_pdr_cause[] = {
  110. [ICNSS_FW_CRASH] = "FW crash",
  111. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  112. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  113. [ICNSS_HOST_ERROR] = "Host error",
  114. };
  115. static void icnss_set_plat_priv(struct icnss_priv *priv)
  116. {
  117. penv = priv;
  118. }
  119. static struct icnss_priv *icnss_get_plat_priv(void)
  120. {
  121. return penv;
  122. }
  123. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  124. {
  125. if (priv && priv->rproc) {
  126. rproc_shutdown(priv->rproc);
  127. rproc_put(priv->rproc);
  128. priv->rproc = NULL;
  129. }
  130. }
  131. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  132. struct kobj_attribute *attr,
  133. const char *buf, size_t count)
  134. {
  135. struct icnss_priv *priv = icnss_get_plat_priv();
  136. if (!priv)
  137. return count;
  138. icnss_pr_dbg("Received shutdown indication");
  139. atomic_set(&priv->is_shutdown, true);
  140. if ((priv->wpss_supported || priv->rproc_fw_download) &&
  141. priv->device_id == ADRASTEA_DEVICE_ID)
  142. icnss_wpss_unload(priv);
  143. return count;
  144. }
  145. static struct kobj_attribute icnss_sysfs_attribute =
  146. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  147. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  148. {
  149. if (atomic_inc_return(&priv->pm_count) != 1)
  150. return;
  151. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  152. atomic_read(&priv->pm_count));
  153. pm_stay_awake(&priv->pdev->dev);
  154. priv->stats.pm_stay_awake++;
  155. }
  156. static void icnss_pm_relax(struct icnss_priv *priv)
  157. {
  158. int r = atomic_dec_return(&priv->pm_count);
  159. WARN_ON(r < 0);
  160. if (r != 0)
  161. return;
  162. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  163. atomic_read(&priv->pm_count));
  164. pm_relax(&priv->pdev->dev);
  165. priv->stats.pm_relax++;
  166. }
  167. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  168. {
  169. switch (type) {
  170. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  171. return "SERVER_ARRIVE";
  172. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  173. return "SERVER_EXIT";
  174. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  175. return "FW_READY";
  176. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  177. return "REGISTER_DRIVER";
  178. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  179. return "UNREGISTER_DRIVER";
  180. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  181. return "PD_SERVICE_DOWN";
  182. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  183. return "FW_EARLY_CRASH_IND";
  184. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  185. return "IDLE_SHUTDOWN";
  186. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  187. return "IDLE_RESTART";
  188. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  189. return "FW_INIT_DONE";
  190. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  191. return "QDSS_TRACE_REQ_MEM";
  192. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  193. return "QDSS_TRACE_SAVE";
  194. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  195. return "QDSS_TRACE_FREE";
  196. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  197. return "M3_DUMP_UPLOAD";
  198. case ICNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  199. return "IMS_WFC_CALL_IND";
  200. case ICNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  201. return "WLFW_TWC_CFG_IND";
  202. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  203. return "QDSS_TRACE_REQ_DATA";
  204. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  205. return "SUBSYS_RESTART_LEVEL";
  206. case ICNSS_DRIVER_EVENT_MAX:
  207. return "EVENT_MAX";
  208. }
  209. return "UNKNOWN";
  210. };
  211. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  212. {
  213. switch (type) {
  214. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  215. return "SOC_WAKE_REQUEST";
  216. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  217. return "SOC_WAKE_RELEASE";
  218. case ICNSS_SOC_WAKE_EVENT_MAX:
  219. return "SOC_EVENT_MAX";
  220. }
  221. return "UNKNOWN";
  222. };
  223. int icnss_driver_event_post(struct icnss_priv *priv,
  224. enum icnss_driver_event_type type,
  225. u32 flags, void *data)
  226. {
  227. struct icnss_driver_event *event;
  228. unsigned long irq_flags;
  229. int gfp = GFP_KERNEL;
  230. int ret = 0;
  231. if (!priv)
  232. return -ENODEV;
  233. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  234. icnss_driver_event_to_str(type), type, current->comm,
  235. flags, priv->state);
  236. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  237. icnss_pr_err("Invalid Event type: %d, can't post", type);
  238. return -EINVAL;
  239. }
  240. if (in_interrupt() || !preemptible() || rcu_preempt_depth())
  241. gfp = GFP_ATOMIC;
  242. event = kzalloc(sizeof(*event), gfp);
  243. if (event == NULL)
  244. return -ENOMEM;
  245. icnss_pm_stay_awake(priv);
  246. event->type = type;
  247. event->data = data;
  248. init_completion(&event->complete);
  249. event->ret = ICNSS_EVENT_PENDING;
  250. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  251. spin_lock_irqsave(&priv->event_lock, irq_flags);
  252. list_add_tail(&event->list, &priv->event_list);
  253. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  254. priv->stats.events[type].posted++;
  255. queue_work(priv->event_wq, &priv->event_work);
  256. if (!(flags & ICNSS_EVENT_SYNC))
  257. goto out;
  258. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  259. wait_for_completion(&event->complete);
  260. else
  261. ret = wait_for_completion_interruptible(&event->complete);
  262. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  263. icnss_driver_event_to_str(type), type, priv->state, ret,
  264. event->ret);
  265. spin_lock_irqsave(&priv->event_lock, irq_flags);
  266. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  267. event->sync = false;
  268. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  269. ret = -EINTR;
  270. goto out;
  271. }
  272. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  273. ret = event->ret;
  274. kfree(event);
  275. out:
  276. icnss_pm_relax(priv);
  277. return ret;
  278. }
  279. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  280. enum icnss_soc_wake_event_type type,
  281. u32 flags, void *data)
  282. {
  283. struct icnss_soc_wake_event *event;
  284. unsigned long irq_flags;
  285. int gfp = GFP_KERNEL;
  286. int ret = 0;
  287. if (!priv)
  288. return -ENODEV;
  289. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  290. icnss_soc_wake_event_to_str(type),
  291. type, current->comm, flags, priv->state);
  292. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  293. icnss_pr_err("Invalid Event type: %d, can't post", type);
  294. return -EINVAL;
  295. }
  296. if (in_interrupt() || irqs_disabled())
  297. gfp = GFP_ATOMIC;
  298. event = kzalloc(sizeof(*event), gfp);
  299. if (!event)
  300. return -ENOMEM;
  301. icnss_pm_stay_awake(priv);
  302. event->type = type;
  303. event->data = data;
  304. init_completion(&event->complete);
  305. event->ret = ICNSS_EVENT_PENDING;
  306. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  307. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  308. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  309. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  310. priv->stats.soc_wake_events[type].posted++;
  311. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  312. if (!(flags & ICNSS_EVENT_SYNC))
  313. goto out;
  314. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  315. wait_for_completion(&event->complete);
  316. else
  317. ret = wait_for_completion_interruptible(&event->complete);
  318. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  319. icnss_soc_wake_event_to_str(type),
  320. type, priv->state, ret, event->ret);
  321. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  322. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  323. event->sync = false;
  324. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  325. ret = -EINTR;
  326. goto out;
  327. }
  328. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  329. ret = event->ret;
  330. kfree(event);
  331. out:
  332. icnss_pm_relax(priv);
  333. return ret;
  334. }
  335. bool icnss_is_fw_ready(void)
  336. {
  337. if (!penv)
  338. return false;
  339. else
  340. return test_bit(ICNSS_FW_READY, &penv->state);
  341. }
  342. EXPORT_SYMBOL(icnss_is_fw_ready);
  343. void icnss_block_shutdown(bool status)
  344. {
  345. if (!penv)
  346. return;
  347. if (status) {
  348. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  349. reinit_completion(&penv->unblock_shutdown);
  350. } else {
  351. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  352. complete(&penv->unblock_shutdown);
  353. }
  354. }
  355. EXPORT_SYMBOL(icnss_block_shutdown);
  356. bool icnss_is_fw_down(void)
  357. {
  358. struct icnss_priv *priv = icnss_get_plat_priv();
  359. if (!priv)
  360. return false;
  361. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  362. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  363. test_bit(ICNSS_REJUVENATE, &priv->state);
  364. }
  365. EXPORT_SYMBOL(icnss_is_fw_down);
  366. unsigned long icnss_get_device_config(void)
  367. {
  368. struct icnss_priv *priv = icnss_get_plat_priv();
  369. if (!priv)
  370. return 0;
  371. return priv->device_config;
  372. }
  373. EXPORT_SYMBOL(icnss_get_device_config);
  374. bool icnss_is_rejuvenate(void)
  375. {
  376. if (!penv)
  377. return false;
  378. else
  379. return test_bit(ICNSS_REJUVENATE, &penv->state);
  380. }
  381. EXPORT_SYMBOL(icnss_is_rejuvenate);
  382. bool icnss_is_pdr(void)
  383. {
  384. if (!penv)
  385. return false;
  386. else
  387. return test_bit(ICNSS_PDR, &penv->state);
  388. }
  389. EXPORT_SYMBOL(icnss_is_pdr);
  390. static bool icnss_is_smp2p_valid(struct icnss_priv *priv,
  391. enum smp2p_out_entry smp2p_entry)
  392. {
  393. if (priv->device_id == WCN6750_DEVICE_ID ||
  394. priv->device_id == WCN6450_DEVICE_ID ||
  395. priv->wpss_supported)
  396. return IS_ERR_OR_NULL(priv->smp2p_info[smp2p_entry].smem_state);
  397. else
  398. return 0;
  399. }
  400. static int icnss_send_smp2p(struct icnss_priv *priv,
  401. enum icnss_smp2p_msg_id msg_id,
  402. enum smp2p_out_entry smp2p_entry)
  403. {
  404. unsigned int value = 0;
  405. int ret;
  406. if (!priv || icnss_is_smp2p_valid(priv, smp2p_entry))
  407. return -EINVAL;
  408. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  409. if (msg_id == ICNSS_RESET_MSG) {
  410. priv->smp2p_info[smp2p_entry].seq = 0;
  411. ret = qcom_smem_state_update_bits(
  412. priv->smp2p_info[smp2p_entry].smem_state,
  413. ICNSS_SMEM_VALUE_MASK,
  414. 0);
  415. if (ret)
  416. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  417. ret, icnss_smp2p_str[smp2p_entry]);
  418. return ret;
  419. }
  420. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  421. !test_bit(ICNSS_FW_READY, &priv->state)) {
  422. icnss_pr_smp2p("FW down, ignoring sending SMP2P state: 0x%lx\n",
  423. priv->state);
  424. return -EINVAL;
  425. }
  426. value |= priv->smp2p_info[smp2p_entry].seq++;
  427. value <<= ICNSS_SMEM_SEQ_NO_POS;
  428. value |= msg_id;
  429. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  430. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  431. reinit_completion(&penv->smp2p_soc_wake_wait);
  432. ret = qcom_smem_state_update_bits(
  433. priv->smp2p_info[smp2p_entry].smem_state,
  434. ICNSS_SMEM_VALUE_MASK,
  435. value);
  436. if (ret) {
  437. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  438. icnss_smp2p_str[smp2p_entry]);
  439. } else {
  440. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  441. msg_id == ICNSS_SOC_WAKE_REL) {
  442. if (!wait_for_completion_timeout(
  443. &priv->smp2p_soc_wake_wait,
  444. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  445. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  446. icnss_smp2p_str[smp2p_entry]);
  447. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  448. ICNSS_ASSERT(0);
  449. }
  450. }
  451. }
  452. return ret;
  453. }
  454. bool icnss_is_low_power(void)
  455. {
  456. if (!penv)
  457. return false;
  458. else
  459. return test_bit(ICNSS_LOW_POWER, &penv->state);
  460. }
  461. EXPORT_SYMBOL(icnss_is_low_power);
  462. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  463. {
  464. struct icnss_priv *priv = ctx;
  465. if (priv)
  466. priv->force_err_fatal = true;
  467. icnss_pr_err("Received force error fatal request from FW\n");
  468. return IRQ_HANDLED;
  469. }
  470. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  471. {
  472. struct icnss_priv *priv = ctx;
  473. struct icnss_uevent_fw_down_data fw_down_data = {0};
  474. icnss_pr_err("Received early crash indication from FW\n");
  475. if (priv) {
  476. if (priv->wpss_self_recovery_enabled)
  477. mod_timer(&priv->wpss_ssr_timer,
  478. jiffies + msecs_to_jiffies(ICNSS_WPSS_SSR_TIMEOUT));
  479. set_bit(ICNSS_FW_DOWN, &priv->state);
  480. icnss_ignore_fw_timeout(true);
  481. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  482. clear_bit(ICNSS_FW_READY, &priv->state);
  483. fw_down_data.crashed = true;
  484. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  485. &fw_down_data);
  486. }
  487. }
  488. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  489. 0, NULL);
  490. return IRQ_HANDLED;
  491. }
  492. static void register_fw_error_notifications(struct device *dev)
  493. {
  494. struct icnss_priv *priv = dev_get_drvdata(dev);
  495. struct device_node *dev_node;
  496. int irq = 0, ret = 0;
  497. if (!priv)
  498. return;
  499. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  500. if (!dev_node) {
  501. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  502. return;
  503. }
  504. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  505. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  506. ret = irq = of_irq_get_byname(dev_node,
  507. "qcom,smp2p-force-fatal-error");
  508. if (ret < 0) {
  509. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  510. irq);
  511. return;
  512. }
  513. }
  514. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  515. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  516. "wlanfw-err", priv);
  517. if (ret < 0) {
  518. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  519. irq, ret);
  520. return;
  521. }
  522. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  523. priv->fw_error_fatal_irq = irq;
  524. }
  525. static void register_early_crash_notifications(struct device *dev)
  526. {
  527. struct icnss_priv *priv = dev_get_drvdata(dev);
  528. struct device_node *dev_node;
  529. int irq = 0, ret = 0;
  530. if (!priv)
  531. return;
  532. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  533. if (!dev_node) {
  534. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  535. return;
  536. }
  537. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  538. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  539. ret = irq = of_irq_get_byname(dev_node,
  540. "qcom,smp2p-early-crash-ind");
  541. if (ret < 0) {
  542. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  543. irq);
  544. return;
  545. }
  546. }
  547. ret = devm_request_threaded_irq(dev, irq, NULL,
  548. fw_crash_indication_handler,
  549. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  550. "wlanfw-early-crash-ind", priv);
  551. if (ret < 0) {
  552. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  553. irq, ret);
  554. return;
  555. }
  556. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  557. priv->fw_early_crash_irq = irq;
  558. }
  559. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  560. {
  561. struct thermal_zone_device *thermal_dev;
  562. const char *tsens;
  563. int ret;
  564. ret = of_property_read_string(priv->pdev->dev.of_node,
  565. "tsens",
  566. &tsens);
  567. if (ret)
  568. return ret;
  569. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  570. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  571. if (IS_ERR_OR_NULL(thermal_dev)) {
  572. icnss_pr_err("Fail to get thermal zone. ret: %d",
  573. PTR_ERR(thermal_dev));
  574. return PTR_ERR(thermal_dev);
  575. }
  576. ret = thermal_zone_get_temp(thermal_dev, temp);
  577. if (ret)
  578. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  579. return ret;
  580. }
  581. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  582. {
  583. struct icnss_priv *priv = ctx;
  584. if (priv)
  585. complete(&priv->smp2p_soc_wake_wait);
  586. return IRQ_HANDLED;
  587. }
  588. static void register_soc_wake_notif(struct device *dev)
  589. {
  590. struct icnss_priv *priv = dev_get_drvdata(dev);
  591. struct device_node *dev_node;
  592. int irq = 0, ret = 0;
  593. if (!priv)
  594. return;
  595. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  596. if (!dev_node) {
  597. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  598. return;
  599. }
  600. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  601. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  602. ret = irq = of_irq_get_byname(dev_node,
  603. "qcom,smp2p-soc-wake-ack");
  604. if (ret < 0) {
  605. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  606. irq);
  607. return;
  608. }
  609. }
  610. ret = devm_request_threaded_irq(dev, irq, NULL,
  611. fw_soc_wake_ack_handler,
  612. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  613. IRQF_TRIGGER_FALLING,
  614. "wlanfw-soc-wake-ack", priv);
  615. if (ret < 0) {
  616. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  617. irq, ret);
  618. return;
  619. }
  620. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  621. priv->fw_soc_wake_ack_irq = irq;
  622. }
  623. int icnss_call_driver_uevent(struct icnss_priv *priv,
  624. enum icnss_uevent uevent, void *data)
  625. {
  626. struct icnss_uevent_data uevent_data;
  627. if (!priv->ops || !priv->ops->uevent)
  628. return 0;
  629. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  630. priv->state, uevent);
  631. uevent_data.uevent = uevent;
  632. uevent_data.data = data;
  633. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  634. }
  635. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  636. {
  637. int i;
  638. int ret = 0;
  639. ret = icnss_qmi_get_dms_mac(priv);
  640. if (ret == 0 && priv->dms.mac_valid)
  641. goto qmi_send;
  642. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  643. * Thus assert on failure to get MAC from DMS even after retries
  644. */
  645. if (priv->use_nv_mac) {
  646. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  647. if (priv->dms.mac_valid)
  648. break;
  649. ret = icnss_qmi_get_dms_mac(priv);
  650. if (ret != -EAGAIN)
  651. break;
  652. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  653. }
  654. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  655. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  656. ICNSS_ASSERT(0);
  657. return -EINVAL;
  658. }
  659. }
  660. qmi_send:
  661. if (priv->dms.mac_valid)
  662. ret =
  663. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  664. ARRAY_SIZE(priv->dms.mac));
  665. return ret;
  666. }
  667. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  668. enum smp2p_out_entry smp2p_entry)
  669. {
  670. int retry = 0;
  671. int error;
  672. if (priv->smp2p_info[smp2p_entry].smem_state)
  673. return;
  674. retry:
  675. priv->smp2p_info[smp2p_entry].smem_state =
  676. qcom_smem_state_get(&priv->pdev->dev,
  677. icnss_smp2p_str[smp2p_entry],
  678. &priv->smp2p_info[smp2p_entry].smem_bit);
  679. if (icnss_is_smp2p_valid(priv, smp2p_entry)) {
  680. if (retry++ < SMP2P_GET_MAX_RETRY) {
  681. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  682. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  683. error, icnss_smp2p_str[smp2p_entry]);
  684. msleep(SMP2P_GET_RETRY_DELAY_MS);
  685. goto retry;
  686. }
  687. ICNSS_ASSERT(0);
  688. return;
  689. }
  690. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  691. }
  692. static inline
  693. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  694. {
  695. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  696. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  697. } else {
  698. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  699. }
  700. }
  701. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  702. {
  703. switch (val) {
  704. case WLAN_RF_SLATE:
  705. return WLFW_WLAN_RF_SLATE_V01;
  706. case WLAN_RF_APACHE:
  707. return WLFW_WLAN_RF_APACHE_V01;
  708. default:
  709. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  710. }
  711. }
  712. #ifdef CONFIG_SLATE_MODULE_ENABLED
  713. static void icnss_send_wlan_boot_init(void)
  714. {
  715. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  716. icnss_pr_info("sent wlan boot init command\n");
  717. }
  718. static void icnss_send_wlan_boot_complete(void)
  719. {
  720. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  721. icnss_pr_info("sent wlan boot complete command\n");
  722. }
  723. static int icnss_wait_for_slate_complete(struct icnss_priv *priv)
  724. {
  725. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  726. reinit_completion(&priv->slate_boot_complete);
  727. icnss_pr_err("Waiting for slate boot up notification, 0x%lx\n",
  728. priv->state);
  729. wait_for_completion(&priv->slate_boot_complete);
  730. }
  731. if (!test_bit(ICNSS_SLATE_UP, &priv->state))
  732. return -EINVAL;
  733. icnss_send_wlan_boot_init();
  734. return 0;
  735. }
  736. #else
  737. static void icnss_send_wlan_boot_complete(void)
  738. {
  739. }
  740. static int icnss_wait_for_slate_complete(struct icnss_priv *priv)
  741. {
  742. return 0;
  743. }
  744. #endif
  745. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  746. void *data)
  747. {
  748. int ret = 0;
  749. int temp = 0;
  750. bool ignore_assert = false;
  751. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  752. if (!priv)
  753. return -ENODEV;
  754. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  755. clear_bit(ICNSS_FW_DOWN, &priv->state);
  756. clear_bit(ICNSS_FW_READY, &priv->state);
  757. if (priv->is_slate_rfa) {
  758. ret = icnss_wait_for_slate_complete(priv);
  759. if (ret == -EINVAL) {
  760. icnss_pr_err("Slate complete failed\n");
  761. return ret;
  762. }
  763. }
  764. icnss_ignore_fw_timeout(false);
  765. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  766. icnss_pr_err("QMI Server already in Connected State\n");
  767. ICNSS_ASSERT(0);
  768. }
  769. ret = icnss_connect_to_fw_server(priv, data);
  770. if (ret)
  771. goto fail;
  772. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  773. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  774. ret = icnss_hw_power_on(priv);
  775. if (ret)
  776. goto fail;
  777. }
  778. ret = wlfw_ind_register_send_sync_msg(priv);
  779. if (ret < 0) {
  780. if (ret == -EALREADY) {
  781. ret = 0;
  782. goto qmi_registered;
  783. }
  784. ignore_assert = true;
  785. goto fail;
  786. }
  787. if (priv->is_rf_subtype_valid) {
  788. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  789. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  790. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  791. if (ret < 0)
  792. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  793. ret);
  794. } else {
  795. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  796. priv->rf_subtype);
  797. }
  798. }
  799. if (priv->device_id == WCN6750_DEVICE_ID ||
  800. priv->device_id == WCN6450_DEVICE_ID) {
  801. if (!icnss_get_temperature(priv, &temp)) {
  802. icnss_pr_dbg("Temperature: %d\n", temp);
  803. if (temp < WLAN_EN_TEMP_THRESHOLD)
  804. icnss_set_wlan_en_delay(priv);
  805. }
  806. ret = wlfw_host_cap_send_sync(priv);
  807. if (ret < 0)
  808. goto fail;
  809. }
  810. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  811. if (!priv->msa_va) {
  812. icnss_pr_err("Invalid MSA address\n");
  813. ret = -EINVAL;
  814. goto fail;
  815. }
  816. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  817. if (ret < 0) {
  818. ignore_assert = true;
  819. goto fail;
  820. }
  821. ret = wlfw_msa_ready_send_sync_msg(priv);
  822. if (ret < 0) {
  823. ignore_assert = true;
  824. goto fail;
  825. }
  826. }
  827. if (priv->device_id == WCN6450_DEVICE_ID)
  828. icnss_hw_power_off(priv);
  829. ret = wlfw_cap_send_sync_msg(priv);
  830. if (ret < 0) {
  831. ignore_assert = true;
  832. goto fail;
  833. }
  834. if (priv->device_id == ADRASTEA_DEVICE_ID && priv->is_chain1_supported) {
  835. ret = icnss_power_on_chain1_reg(priv);
  836. if (ret) {
  837. ignore_assert = true;
  838. goto fail;
  839. }
  840. }
  841. if (priv->device_id == WCN6750_DEVICE_ID ||
  842. priv->device_id == WCN6450_DEVICE_ID) {
  843. ret = icnss_hw_power_on(priv);
  844. if (ret)
  845. goto fail;
  846. ret = wlfw_device_info_send_msg(priv);
  847. if (ret < 0) {
  848. ignore_assert = true;
  849. goto device_info_failure;
  850. }
  851. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  852. priv->mem_base_pa,
  853. priv->mem_base_size);
  854. if (!priv->mem_base_va) {
  855. icnss_pr_err("Ioremap failed for bar address\n");
  856. goto device_info_failure;
  857. }
  858. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  859. &priv->mem_base_pa,
  860. priv->mem_base_va);
  861. if (priv->mhi_state_info_pa)
  862. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  863. priv->mhi_state_info_pa,
  864. PAGE_SIZE);
  865. if (!priv->mhi_state_info_va)
  866. icnss_pr_err("Ioremap failed for MHI info address\n");
  867. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  868. &priv->mhi_state_info_pa,
  869. priv->mhi_state_info_va);
  870. }
  871. if (priv->bdf_download_support) {
  872. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  873. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  874. priv->ctrl_params.bdf_type);
  875. if (ret < 0)
  876. goto device_info_failure;
  877. }
  878. if (priv->device_id == WCN6450_DEVICE_ID) {
  879. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  880. if (ret < 0)
  881. icnss_pr_info("Failed to download qdss config file for WCN6450, ret = %d\n",
  882. ret);
  883. }
  884. if (priv->device_id == WCN6750_DEVICE_ID ||
  885. priv->device_id == WCN6450_DEVICE_ID) {
  886. if (!priv->fw_soc_wake_ack_irq)
  887. register_soc_wake_notif(&priv->pdev->dev);
  888. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  889. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  890. }
  891. if (priv->wpss_supported)
  892. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  893. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  894. if (priv->bdf_download_support) {
  895. ret = wlfw_cal_report_req(priv);
  896. if (ret < 0)
  897. goto device_info_failure;
  898. }
  899. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  900. dynamic_feature_mask);
  901. }
  902. if (!priv->fw_error_fatal_irq)
  903. register_fw_error_notifications(&priv->pdev->dev);
  904. if (!priv->fw_early_crash_irq)
  905. register_early_crash_notifications(&priv->pdev->dev);
  906. if (priv->psf_supported)
  907. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  908. return ret;
  909. device_info_failure:
  910. icnss_hw_power_off(priv);
  911. fail:
  912. ICNSS_ASSERT(ignore_assert);
  913. qmi_registered:
  914. return ret;
  915. }
  916. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  917. {
  918. if (!priv)
  919. return -ENODEV;
  920. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  921. icnss_clear_server(priv);
  922. if (priv->psf_supported)
  923. priv->last_updated_voltage = 0;
  924. return 0;
  925. }
  926. static int icnss_call_driver_probe(struct icnss_priv *priv)
  927. {
  928. int ret = 0;
  929. int probe_cnt = 0;
  930. if (!priv->ops || !priv->ops->probe)
  931. return 0;
  932. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  933. return -EINVAL;
  934. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  935. icnss_hw_power_on(priv);
  936. icnss_block_shutdown(true);
  937. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  938. ret = priv->ops->probe(&priv->pdev->dev);
  939. probe_cnt++;
  940. if (ret != -EPROBE_DEFER)
  941. break;
  942. }
  943. if (ret < 0) {
  944. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  945. ret, priv->state, probe_cnt);
  946. icnss_block_shutdown(false);
  947. goto out;
  948. }
  949. icnss_block_shutdown(false);
  950. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  951. return 0;
  952. out:
  953. icnss_hw_power_off(priv);
  954. return ret;
  955. }
  956. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  957. {
  958. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  959. goto out;
  960. if (!priv->ops || !priv->ops->shutdown)
  961. goto out;
  962. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  963. goto out;
  964. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  965. priv->ops->shutdown(&priv->pdev->dev);
  966. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  967. out:
  968. return 0;
  969. }
  970. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  971. {
  972. int ret = 0;
  973. icnss_pm_relax(priv);
  974. icnss_call_driver_shutdown(priv);
  975. clear_bit(ICNSS_PDR, &priv->state);
  976. clear_bit(ICNSS_REJUVENATE, &priv->state);
  977. clear_bit(ICNSS_PD_RESTART, &priv->state);
  978. clear_bit(ICNSS_LOW_POWER, &priv->state);
  979. priv->early_crash_ind = false;
  980. priv->is_ssr = false;
  981. if (!priv->ops || !priv->ops->reinit)
  982. goto out;
  983. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  984. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  985. priv->state);
  986. goto out;
  987. }
  988. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  989. goto call_probe;
  990. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  991. icnss_hw_power_on(priv);
  992. icnss_block_shutdown(true);
  993. ret = priv->ops->reinit(&priv->pdev->dev);
  994. if (ret < 0) {
  995. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  996. ret, priv->state);
  997. if (!priv->allow_recursive_recovery)
  998. ICNSS_ASSERT(false);
  999. icnss_block_shutdown(false);
  1000. goto out_power_off;
  1001. }
  1002. icnss_block_shutdown(false);
  1003. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  1004. return 0;
  1005. call_probe:
  1006. return icnss_call_driver_probe(priv);
  1007. out_power_off:
  1008. icnss_hw_power_off(priv);
  1009. out:
  1010. return ret;
  1011. }
  1012. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  1013. {
  1014. int ret = 0;
  1015. if (!priv)
  1016. return -ENODEV;
  1017. del_timer(&priv->recovery_timer);
  1018. set_bit(ICNSS_FW_READY, &priv->state);
  1019. clear_bit(ICNSS_MODE_ON, &priv->state);
  1020. atomic_set(&priv->soc_wake_ref_count, 0);
  1021. if (priv->device_id == WCN6750_DEVICE_ID ||
  1022. priv->device_id == WCN6450_DEVICE_ID)
  1023. icnss_free_qdss_mem(priv);
  1024. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  1025. icnss_hw_power_off(priv);
  1026. if (!priv->pdev) {
  1027. icnss_pr_err("Device is not ready\n");
  1028. ret = -ENODEV;
  1029. goto out;
  1030. }
  1031. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state))
  1032. icnss_send_wlan_boot_complete();
  1033. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1034. ret = icnss_pd_restart_complete(priv);
  1035. } else {
  1036. if (priv->wpss_supported)
  1037. icnss_setup_dms_mac(priv);
  1038. ret = icnss_call_driver_probe(priv);
  1039. }
  1040. icnss_vreg_unvote(priv);
  1041. out:
  1042. return ret;
  1043. }
  1044. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  1045. {
  1046. int ret = 0;
  1047. if (!priv)
  1048. return -ENODEV;
  1049. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  1050. if (priv->device_id == WCN6750_DEVICE_ID) {
  1051. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  1052. if (ret < 0)
  1053. icnss_pr_info("Failed to download qdss config file for WCN6750, ret = %d\n",
  1054. ret);
  1055. }
  1056. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state)) {
  1057. mod_timer(&priv->recovery_timer,
  1058. jiffies + msecs_to_jiffies(ICNSS_CAL_TIMEOUT));
  1059. ret = wlfw_wlan_mode_send_sync_msg(priv,
  1060. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  1061. } else {
  1062. icnss_driver_event_fw_ready_ind(priv, NULL);
  1063. }
  1064. return ret;
  1065. }
  1066. static int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  1067. {
  1068. struct platform_device *pdev = priv->pdev;
  1069. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1070. int i, j;
  1071. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1072. if (!qdss_mem[i].va && qdss_mem[i].size) {
  1073. qdss_mem[i].va =
  1074. dma_alloc_coherent(&pdev->dev,
  1075. qdss_mem[i].size,
  1076. &qdss_mem[i].pa,
  1077. GFP_KERNEL);
  1078. if (!qdss_mem[i].va) {
  1079. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  1080. qdss_mem[i].size,
  1081. qdss_mem[i].type, i);
  1082. break;
  1083. }
  1084. }
  1085. }
  1086. /* Best-effort allocation for QDSS trace */
  1087. if (i < priv->qdss_mem_seg_len) {
  1088. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  1089. qdss_mem[j].type = 0;
  1090. qdss_mem[j].size = 0;
  1091. }
  1092. priv->qdss_mem_seg_len = i;
  1093. }
  1094. return 0;
  1095. }
  1096. void icnss_free_qdss_mem(struct icnss_priv *priv)
  1097. {
  1098. struct platform_device *pdev = priv->pdev;
  1099. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1100. int i;
  1101. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1102. if (qdss_mem[i].va && qdss_mem[i].size) {
  1103. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  1104. &qdss_mem[i].pa, qdss_mem[i].size,
  1105. qdss_mem[i].type);
  1106. dma_free_coherent(&pdev->dev,
  1107. qdss_mem[i].size, qdss_mem[i].va,
  1108. qdss_mem[i].pa);
  1109. qdss_mem[i].va = NULL;
  1110. qdss_mem[i].pa = 0;
  1111. qdss_mem[i].size = 0;
  1112. qdss_mem[i].type = 0;
  1113. }
  1114. }
  1115. priv->qdss_mem_seg_len = 0;
  1116. }
  1117. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1118. {
  1119. int ret = 0;
  1120. ret = icnss_alloc_qdss_mem(priv);
  1121. if (ret < 0)
  1122. return ret;
  1123. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1124. }
  1125. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1126. u64 pa, u32 size, int *seg_id)
  1127. {
  1128. int i = 0;
  1129. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1130. u64 offset = 0;
  1131. void *va = NULL;
  1132. u64 local_pa;
  1133. u32 local_size;
  1134. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1135. local_pa = (u64)qdss_mem[i].pa;
  1136. local_size = (u32)qdss_mem[i].size;
  1137. if (pa == local_pa && size <= local_size) {
  1138. va = qdss_mem[i].va;
  1139. break;
  1140. }
  1141. if (pa > local_pa &&
  1142. pa < local_pa + local_size &&
  1143. pa + size <= local_pa + local_size) {
  1144. offset = pa - local_pa;
  1145. va = qdss_mem[i].va + offset;
  1146. break;
  1147. }
  1148. }
  1149. *seg_id = i;
  1150. return va;
  1151. }
  1152. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1153. void *data)
  1154. {
  1155. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1156. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1157. int ret = 0;
  1158. int i;
  1159. void *va = NULL;
  1160. u64 pa;
  1161. u32 size;
  1162. int seg_id = 0;
  1163. if (!priv->qdss_mem_seg_len) {
  1164. icnss_pr_err("Memory for QDSS trace is not available\n");
  1165. return -ENOMEM;
  1166. }
  1167. if (event_data->mem_seg_len == 0) {
  1168. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1169. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1170. ICNSS_GENL_MSG_TYPE_QDSS,
  1171. event_data->file_name,
  1172. qdss_mem[i].size);
  1173. if (ret < 0) {
  1174. icnss_pr_err("Fail to save QDSS data: %d\n",
  1175. ret);
  1176. break;
  1177. }
  1178. }
  1179. } else {
  1180. for (i = 0; i < event_data->mem_seg_len; i++) {
  1181. pa = event_data->mem_seg[i].addr;
  1182. size = event_data->mem_seg[i].size;
  1183. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1184. size, &seg_id);
  1185. if (!va) {
  1186. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1187. &pa);
  1188. ret = -EINVAL;
  1189. break;
  1190. }
  1191. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1192. event_data->file_name, size);
  1193. if (ret < 0) {
  1194. icnss_pr_err("Fail to save QDSS data: %d\n",
  1195. ret);
  1196. break;
  1197. }
  1198. }
  1199. }
  1200. kfree(data);
  1201. return ret;
  1202. }
  1203. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1204. {
  1205. int dec, c = atomic_read(v);
  1206. do {
  1207. dec = c - 1;
  1208. if (unlikely(dec < 1))
  1209. break;
  1210. } while (!atomic_try_cmpxchg(v, &c, dec));
  1211. return dec;
  1212. }
  1213. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1214. void *data)
  1215. {
  1216. int ret = 0;
  1217. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1218. if (!priv)
  1219. return -ENODEV;
  1220. if (!data)
  1221. return -EINVAL;
  1222. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1223. event_data->total_size);
  1224. kfree(data);
  1225. return ret;
  1226. }
  1227. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1228. {
  1229. int ret = 0;
  1230. if (!priv)
  1231. return -ENODEV;
  1232. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1233. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1234. atomic_read(&priv->soc_wake_ref_count));
  1235. return 0;
  1236. }
  1237. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1238. ICNSS_SMP2P_OUT_SOC_WAKE);
  1239. if (!ret)
  1240. atomic_inc(&priv->soc_wake_ref_count);
  1241. return ret;
  1242. }
  1243. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1244. {
  1245. int ret = 0;
  1246. if (!priv)
  1247. return -ENODEV;
  1248. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1249. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1250. priv->soc_wake_ref_count);
  1251. return 0;
  1252. }
  1253. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1254. ICNSS_SMP2P_OUT_SOC_WAKE);
  1255. return ret;
  1256. }
  1257. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1258. void *data)
  1259. {
  1260. int ret = 0;
  1261. int probe_cnt = 0;
  1262. if (priv->ops)
  1263. return -EEXIST;
  1264. priv->ops = data;
  1265. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1266. set_bit(ICNSS_FW_READY, &priv->state);
  1267. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1268. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1269. priv->state);
  1270. return -ENODEV;
  1271. }
  1272. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1273. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1274. priv->state);
  1275. goto out;
  1276. }
  1277. ret = icnss_hw_power_on(priv);
  1278. if (ret)
  1279. goto out;
  1280. icnss_block_shutdown(true);
  1281. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1282. ret = priv->ops->probe(&priv->pdev->dev);
  1283. probe_cnt++;
  1284. if (ret != -EPROBE_DEFER)
  1285. break;
  1286. }
  1287. if (ret) {
  1288. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1289. ret, priv->state, probe_cnt);
  1290. icnss_block_shutdown(false);
  1291. goto power_off;
  1292. }
  1293. icnss_block_shutdown(false);
  1294. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1295. return 0;
  1296. power_off:
  1297. icnss_hw_power_off(priv);
  1298. out:
  1299. return ret;
  1300. }
  1301. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1302. void *data)
  1303. {
  1304. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1305. priv->ops = NULL;
  1306. goto out;
  1307. }
  1308. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1309. icnss_block_shutdown(true);
  1310. if (priv->ops)
  1311. priv->ops->remove(&priv->pdev->dev);
  1312. icnss_block_shutdown(false);
  1313. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1314. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1315. priv->ops = NULL;
  1316. icnss_hw_power_off(priv);
  1317. out:
  1318. return 0;
  1319. }
  1320. static int icnss_fw_crashed(struct icnss_priv *priv,
  1321. struct icnss_event_pd_service_down_data *event_data)
  1322. {
  1323. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1324. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1325. set_bit(ICNSS_PD_RESTART, &priv->state);
  1326. icnss_pm_stay_awake(priv);
  1327. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state) &&
  1328. test_bit(ICNSS_FW_READY, &priv->state)) {
  1329. clear_bit(ICNSS_FW_READY, &priv->state);
  1330. fw_down_data.crashed = true;
  1331. icnss_call_driver_uevent(priv,
  1332. ICNSS_UEVENT_FW_DOWN,
  1333. &fw_down_data);
  1334. }
  1335. if (event_data && event_data->fw_rejuvenate)
  1336. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1337. return 0;
  1338. }
  1339. static int icnss_update_hang_event_data(struct icnss_priv *priv,
  1340. struct icnss_uevent_hang_data *hang_data)
  1341. {
  1342. if (!priv->hang_event_data_va)
  1343. return -EINVAL;
  1344. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1345. priv->hang_event_data_len,
  1346. GFP_ATOMIC);
  1347. if (!priv->hang_event_data)
  1348. return -ENOMEM;
  1349. // Update the hang event params
  1350. hang_data->hang_event_data = priv->hang_event_data;
  1351. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1352. return 0;
  1353. }
  1354. static int icnss_send_hang_event_data(struct icnss_priv *priv)
  1355. {
  1356. struct icnss_uevent_hang_data hang_data = {0};
  1357. int ret = 0xFF;
  1358. if (priv->early_crash_ind) {
  1359. ret = icnss_update_hang_event_data(priv, &hang_data);
  1360. if (ret)
  1361. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1362. }
  1363. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1364. &hang_data);
  1365. if (!ret) {
  1366. kfree(priv->hang_event_data);
  1367. priv->hang_event_data = NULL;
  1368. }
  1369. return 0;
  1370. }
  1371. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1372. void *data)
  1373. {
  1374. struct icnss_event_pd_service_down_data *event_data = data;
  1375. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1376. icnss_ignore_fw_timeout(false);
  1377. goto out;
  1378. }
  1379. if (priv->force_err_fatal)
  1380. ICNSS_ASSERT(0);
  1381. if (priv->device_id == WCN6750_DEVICE_ID ||
  1382. priv->device_id == WCN6450_DEVICE_ID) {
  1383. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1384. ICNSS_SMP2P_OUT_SOC_WAKE);
  1385. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1386. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1387. }
  1388. if (priv->wpss_supported)
  1389. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1390. ICNSS_SMP2P_OUT_POWER_SAVE);
  1391. icnss_send_hang_event_data(priv);
  1392. if (priv->early_crash_ind) {
  1393. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1394. event_data->crashed, priv->state);
  1395. goto out;
  1396. }
  1397. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1398. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1399. event_data->crashed, priv->state);
  1400. if (!priv->allow_recursive_recovery)
  1401. ICNSS_ASSERT(0);
  1402. goto out;
  1403. }
  1404. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1405. icnss_fw_crashed(priv, event_data);
  1406. out:
  1407. kfree(data);
  1408. return 0;
  1409. }
  1410. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1411. void *data)
  1412. {
  1413. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1414. icnss_ignore_fw_timeout(false);
  1415. goto out;
  1416. }
  1417. priv->early_crash_ind = true;
  1418. icnss_fw_crashed(priv, NULL);
  1419. out:
  1420. kfree(data);
  1421. return 0;
  1422. }
  1423. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1424. void *data)
  1425. {
  1426. int ret = 0;
  1427. if (!priv->ops || !priv->ops->idle_shutdown)
  1428. return 0;
  1429. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1430. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1431. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1432. ret = -EBUSY;
  1433. } else {
  1434. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1435. priv->state);
  1436. icnss_block_shutdown(true);
  1437. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1438. icnss_block_shutdown(false);
  1439. }
  1440. return ret;
  1441. }
  1442. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1443. void *data)
  1444. {
  1445. int ret = 0;
  1446. if (!priv->ops || !priv->ops->idle_restart)
  1447. return 0;
  1448. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1449. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1450. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1451. ret = -EBUSY;
  1452. } else {
  1453. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1454. priv->state);
  1455. icnss_block_shutdown(true);
  1456. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1457. icnss_block_shutdown(false);
  1458. }
  1459. return ret;
  1460. }
  1461. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1462. {
  1463. icnss_free_qdss_mem(priv);
  1464. return 0;
  1465. }
  1466. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1467. void *data)
  1468. {
  1469. struct icnss_m3_upload_segments_req_data *event_data = data;
  1470. struct qcom_dump_segment segment;
  1471. int i, status = 0, ret = 0;
  1472. struct list_head head;
  1473. if (!dump_enabled()) {
  1474. icnss_pr_info("Dump collection is not enabled\n");
  1475. return ret;
  1476. }
  1477. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1478. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1479. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1480. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1481. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1482. return ret;
  1483. INIT_LIST_HEAD(&head);
  1484. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1485. memset(&segment, 0, sizeof(segment));
  1486. segment.va = devm_ioremap(&priv->pdev->dev,
  1487. event_data->m3_segment[i].addr,
  1488. event_data->m3_segment[i].size);
  1489. if (!segment.va) {
  1490. icnss_pr_err("Failed to ioremap M3 Dump region");
  1491. ret = -ENOMEM;
  1492. goto send_resp;
  1493. }
  1494. segment.size = event_data->m3_segment[i].size;
  1495. list_add(&segment.node, &head);
  1496. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1497. event_data->m3_segment[i].name);
  1498. switch (event_data->m3_segment[i].type) {
  1499. case QMI_M3_SEGMENT_PHYAREG_V01:
  1500. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1501. break;
  1502. case QMI_M3_SEGMENT_PHYDBG_V01:
  1503. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1504. break;
  1505. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1506. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1507. break;
  1508. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1509. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1510. break;
  1511. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1512. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1513. break;
  1514. default:
  1515. icnss_pr_err("Invalid Segment type: %d",
  1516. event_data->m3_segment[i].type);
  1517. }
  1518. if (ret) {
  1519. status = ret;
  1520. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1521. event_data->m3_segment[i].name, ret);
  1522. }
  1523. list_del(&segment.node);
  1524. }
  1525. send_resp:
  1526. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1527. status);
  1528. return ret;
  1529. }
  1530. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1531. {
  1532. int ret = 0;
  1533. struct icnss_subsys_restart_level_data *event_data = data;
  1534. if (!data)
  1535. return -EINVAL;
  1536. if (!priv) {
  1537. ret = -ENODEV;
  1538. goto out;
  1539. }
  1540. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1541. out:
  1542. kfree(data);
  1543. return ret;
  1544. }
  1545. static void icnss_wpss_self_recovery(struct work_struct *wpss_load_work)
  1546. {
  1547. int ret;
  1548. struct icnss_priv *priv = icnss_get_plat_priv();
  1549. rproc_shutdown(priv->rproc);
  1550. ret = rproc_boot(priv->rproc);
  1551. if (ret) {
  1552. icnss_pr_err("Failed to self recover wpss rproc, ret: %d", ret);
  1553. rproc_put(priv->rproc);
  1554. }
  1555. }
  1556. static void icnss_driver_event_work(struct work_struct *work)
  1557. {
  1558. struct icnss_priv *priv =
  1559. container_of(work, struct icnss_priv, event_work);
  1560. struct icnss_driver_event *event;
  1561. unsigned long flags;
  1562. int ret;
  1563. icnss_pm_stay_awake(priv);
  1564. spin_lock_irqsave(&priv->event_lock, flags);
  1565. while (!list_empty(&priv->event_list)) {
  1566. event = list_first_entry(&priv->event_list,
  1567. struct icnss_driver_event, list);
  1568. list_del(&event->list);
  1569. spin_unlock_irqrestore(&priv->event_lock, flags);
  1570. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1571. icnss_driver_event_to_str(event->type),
  1572. event->sync ? "-sync" : "", event->type,
  1573. priv->state);
  1574. switch (event->type) {
  1575. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1576. ret = icnss_driver_event_server_arrive(priv,
  1577. event->data);
  1578. break;
  1579. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1580. ret = icnss_driver_event_server_exit(priv);
  1581. break;
  1582. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1583. ret = icnss_driver_event_fw_ready_ind(priv,
  1584. event->data);
  1585. break;
  1586. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1587. ret = icnss_driver_event_register_driver(priv,
  1588. event->data);
  1589. break;
  1590. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1591. ret = icnss_driver_event_unregister_driver(priv,
  1592. event->data);
  1593. break;
  1594. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1595. ret = icnss_driver_event_pd_service_down(priv,
  1596. event->data);
  1597. break;
  1598. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1599. ret = icnss_driver_event_early_crash_ind(priv,
  1600. event->data);
  1601. break;
  1602. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1603. ret = icnss_driver_event_idle_shutdown(priv,
  1604. event->data);
  1605. break;
  1606. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1607. ret = icnss_driver_event_idle_restart(priv,
  1608. event->data);
  1609. break;
  1610. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1611. ret = icnss_driver_event_fw_init_done(priv,
  1612. event->data);
  1613. break;
  1614. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1615. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1616. break;
  1617. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1618. ret = icnss_qdss_trace_save_hdlr(priv,
  1619. event->data);
  1620. break;
  1621. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1622. ret = icnss_qdss_trace_free_hdlr(priv);
  1623. break;
  1624. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1625. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1626. break;
  1627. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1628. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1629. event->data);
  1630. break;
  1631. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1632. ret = icnss_subsys_restart_level(priv, event->data);
  1633. break;
  1634. case ICNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1635. ret = icnss_process_wfc_call_ind_event(priv,
  1636. event->data);
  1637. break;
  1638. case ICNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1639. ret = icnss_process_twt_cfg_ind_event(priv,
  1640. event->data);
  1641. break;
  1642. default:
  1643. icnss_pr_err("Invalid Event type: %d", event->type);
  1644. kfree(event);
  1645. continue;
  1646. }
  1647. priv->stats.events[event->type].processed++;
  1648. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1649. icnss_driver_event_to_str(event->type),
  1650. event->sync ? "-sync" : "", event->type, ret,
  1651. priv->state);
  1652. spin_lock_irqsave(&priv->event_lock, flags);
  1653. if (event->sync) {
  1654. event->ret = ret;
  1655. complete(&event->complete);
  1656. continue;
  1657. }
  1658. spin_unlock_irqrestore(&priv->event_lock, flags);
  1659. kfree(event);
  1660. spin_lock_irqsave(&priv->event_lock, flags);
  1661. }
  1662. spin_unlock_irqrestore(&priv->event_lock, flags);
  1663. icnss_pm_relax(priv);
  1664. }
  1665. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1666. {
  1667. struct icnss_priv *priv =
  1668. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1669. struct icnss_soc_wake_event *event;
  1670. unsigned long flags;
  1671. int ret;
  1672. icnss_pm_stay_awake(priv);
  1673. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1674. while (!list_empty(&priv->soc_wake_msg_list)) {
  1675. event = list_first_entry(&priv->soc_wake_msg_list,
  1676. struct icnss_soc_wake_event, list);
  1677. list_del(&event->list);
  1678. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1679. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1680. icnss_soc_wake_event_to_str(event->type),
  1681. event->sync ? "-sync" : "", event->type,
  1682. priv->state);
  1683. switch (event->type) {
  1684. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1685. ret = icnss_event_soc_wake_request(priv,
  1686. event->data);
  1687. break;
  1688. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1689. ret = icnss_event_soc_wake_release(priv,
  1690. event->data);
  1691. break;
  1692. default:
  1693. icnss_pr_err("Invalid Event type: %d", event->type);
  1694. kfree(event);
  1695. continue;
  1696. }
  1697. priv->stats.soc_wake_events[event->type].processed++;
  1698. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1699. icnss_soc_wake_event_to_str(event->type),
  1700. event->sync ? "-sync" : "", event->type, ret,
  1701. priv->state);
  1702. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1703. if (event->sync) {
  1704. event->ret = ret;
  1705. complete(&event->complete);
  1706. continue;
  1707. }
  1708. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1709. kfree(event);
  1710. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1711. }
  1712. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1713. icnss_pm_relax(priv);
  1714. }
  1715. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1716. {
  1717. int ret = 0;
  1718. struct qcom_dump_segment segment;
  1719. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1720. struct list_head head;
  1721. if (!dump_enabled()) {
  1722. icnss_pr_info("Dump collection is not enabled\n");
  1723. return ret;
  1724. }
  1725. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1726. return ret;
  1727. INIT_LIST_HEAD(&head);
  1728. memset(&segment, 0, sizeof(segment));
  1729. segment.va = priv->msa_va;
  1730. segment.size = priv->msa_mem_size;
  1731. list_add(&segment.node, &head);
  1732. if (!msa0_dump_dev->dev) {
  1733. icnss_pr_err("Created Dump Device not found\n");
  1734. return 0;
  1735. }
  1736. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1737. if (ret) {
  1738. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1739. return ret;
  1740. }
  1741. list_del(&segment.node);
  1742. return ret;
  1743. }
  1744. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1745. void *data)
  1746. {
  1747. struct qcom_ssr_notify_data *notif = data;
  1748. int ret = 0;
  1749. if (!notif->crashed) {
  1750. if (atomic_read(&priv->is_shutdown)) {
  1751. atomic_set(&priv->is_shutdown, false);
  1752. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1753. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1754. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1755. clear_bit(ICNSS_FW_READY, &priv->state);
  1756. icnss_driver_event_post(priv,
  1757. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1758. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1759. NULL);
  1760. }
  1761. }
  1762. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1763. if (!wait_for_completion_timeout(
  1764. &priv->unblock_shutdown,
  1765. msecs_to_jiffies(PROBE_TIMEOUT)))
  1766. icnss_pr_err("modem block shutdown timeout\n");
  1767. }
  1768. ret = wlfw_send_modem_shutdown_msg(priv);
  1769. if (ret < 0)
  1770. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1771. ret);
  1772. }
  1773. }
  1774. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1775. {
  1776. switch (code) {
  1777. case QCOM_SSR_BEFORE_POWERUP:
  1778. return "BEFORE_POWERUP";
  1779. case QCOM_SSR_AFTER_POWERUP:
  1780. return "AFTER_POWERUP";
  1781. case QCOM_SSR_BEFORE_SHUTDOWN:
  1782. return "BEFORE_SHUTDOWN";
  1783. case QCOM_SSR_AFTER_SHUTDOWN:
  1784. return "AFTER_SHUTDOWN";
  1785. default:
  1786. return "UNKNOWN";
  1787. }
  1788. };
  1789. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1790. unsigned long code,
  1791. void *data)
  1792. {
  1793. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1794. wpss_early_ssr_nb);
  1795. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1796. icnss_qcom_ssr_notify_state_to_str(code), code);
  1797. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1798. set_bit(ICNSS_FW_DOWN, &priv->state);
  1799. icnss_ignore_fw_timeout(true);
  1800. }
  1801. return NOTIFY_DONE;
  1802. }
  1803. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1804. unsigned long code,
  1805. void *data)
  1806. {
  1807. struct icnss_event_pd_service_down_data *event_data;
  1808. struct qcom_ssr_notify_data *notif = data;
  1809. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1810. wpss_ssr_nb);
  1811. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1812. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1813. icnss_qcom_ssr_notify_state_to_str(code), code);
  1814. switch (code) {
  1815. case QCOM_SSR_BEFORE_SHUTDOWN:
  1816. priv->notif_crashed = notif->crashed;
  1817. break;
  1818. case QCOM_SSR_AFTER_SHUTDOWN:
  1819. /* Collect ramdump only when there was a crash. */
  1820. if (priv->notif_crashed) {
  1821. icnss_pr_info("Collecting msa0 segment dump\n");
  1822. icnss_msa0_ramdump(priv);
  1823. priv->notif_crashed = false;
  1824. }
  1825. goto out;
  1826. default:
  1827. goto out;
  1828. }
  1829. if (priv->wpss_self_recovery_enabled)
  1830. del_timer(&priv->wpss_ssr_timer);
  1831. priv->is_ssr = true;
  1832. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1833. priv->state, notif->crashed);
  1834. if (priv->device_id == ADRASTEA_DEVICE_ID)
  1835. icnss_update_state_send_modem_shutdown(priv, data);
  1836. set_bit(ICNSS_FW_DOWN, &priv->state);
  1837. icnss_ignore_fw_timeout(true);
  1838. if (notif->crashed)
  1839. priv->stats.recovery.root_pd_crash++;
  1840. else
  1841. priv->stats.recovery.root_pd_shutdown++;
  1842. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1843. if (event_data == NULL)
  1844. return notifier_from_errno(-ENOMEM);
  1845. event_data->crashed = notif->crashed;
  1846. fw_down_data.crashed = !!notif->crashed;
  1847. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1848. clear_bit(ICNSS_FW_READY, &priv->state);
  1849. fw_down_data.crashed = !!notif->crashed;
  1850. icnss_call_driver_uevent(priv,
  1851. ICNSS_UEVENT_FW_DOWN,
  1852. &fw_down_data);
  1853. }
  1854. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1855. ICNSS_EVENT_SYNC, event_data);
  1856. if (notif->crashed)
  1857. mod_timer(&priv->recovery_timer,
  1858. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1859. out:
  1860. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1861. return NOTIFY_OK;
  1862. }
  1863. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1864. unsigned long code,
  1865. void *data)
  1866. {
  1867. struct icnss_event_pd_service_down_data *event_data;
  1868. struct qcom_ssr_notify_data *notif = data;
  1869. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1870. modem_ssr_nb);
  1871. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1872. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1873. icnss_qcom_ssr_notify_state_to_str(code), code);
  1874. switch (code) {
  1875. case QCOM_SSR_BEFORE_SHUTDOWN:
  1876. if (priv->is_slate_rfa)
  1877. complete(&priv->slate_boot_complete);
  1878. if (!notif->crashed &&
  1879. priv->low_power_support) { /* Hibernate */
  1880. if (test_bit(ICNSS_MODE_ON, &priv->state))
  1881. icnss_driver_event_post(
  1882. priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1883. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1884. set_bit(ICNSS_LOW_POWER, &priv->state);
  1885. }
  1886. break;
  1887. case QCOM_SSR_AFTER_SHUTDOWN:
  1888. /* Collect ramdump only when there was a crash. */
  1889. if (notif->crashed) {
  1890. icnss_pr_info("Collecting msa0 segment dump\n");
  1891. icnss_msa0_ramdump(priv);
  1892. }
  1893. goto out;
  1894. default:
  1895. goto out;
  1896. }
  1897. priv->is_ssr = true;
  1898. if (notif->crashed) {
  1899. priv->stats.recovery.root_pd_crash++;
  1900. priv->root_pd_shutdown = false;
  1901. } else {
  1902. priv->stats.recovery.root_pd_shutdown++;
  1903. priv->root_pd_shutdown = true;
  1904. }
  1905. icnss_update_state_send_modem_shutdown(priv, data);
  1906. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1907. set_bit(ICNSS_FW_DOWN, &priv->state);
  1908. icnss_ignore_fw_timeout(true);
  1909. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1910. clear_bit(ICNSS_FW_READY, &priv->state);
  1911. fw_down_data.crashed = !!notif->crashed;
  1912. icnss_call_driver_uevent(priv,
  1913. ICNSS_UEVENT_FW_DOWN,
  1914. &fw_down_data);
  1915. }
  1916. goto out;
  1917. }
  1918. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1919. priv->state, notif->crashed);
  1920. set_bit(ICNSS_FW_DOWN, &priv->state);
  1921. icnss_ignore_fw_timeout(true);
  1922. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1923. if (event_data == NULL)
  1924. return notifier_from_errno(-ENOMEM);
  1925. event_data->crashed = notif->crashed;
  1926. fw_down_data.crashed = !!notif->crashed;
  1927. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1928. clear_bit(ICNSS_FW_READY, &priv->state);
  1929. fw_down_data.crashed = !!notif->crashed;
  1930. icnss_call_driver_uevent(priv,
  1931. ICNSS_UEVENT_FW_DOWN,
  1932. &fw_down_data);
  1933. }
  1934. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1935. ICNSS_EVENT_SYNC, event_data);
  1936. if (notif->crashed)
  1937. mod_timer(&priv->recovery_timer,
  1938. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1939. out:
  1940. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1941. return NOTIFY_OK;
  1942. }
  1943. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1944. {
  1945. int ret = 0;
  1946. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1947. priv->wpss_early_notify_handler =
  1948. qcom_register_early_ssr_notifier("wpss",
  1949. &priv->wpss_early_ssr_nb);
  1950. if (IS_ERR_OR_NULL(priv->wpss_early_notify_handler)) {
  1951. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1952. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1953. }
  1954. return ret;
  1955. }
  1956. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1957. {
  1958. int ret = 0;
  1959. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1960. /*
  1961. * Assign priority of icnss wpss notifier callback over IPA
  1962. * modem notifier callback which is 0
  1963. */
  1964. priv->wpss_ssr_nb.priority = 1;
  1965. priv->wpss_notify_handler =
  1966. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1967. if (IS_ERR_OR_NULL(priv->wpss_notify_handler)) {
  1968. ret = PTR_ERR(priv->wpss_notify_handler);
  1969. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1970. }
  1971. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1972. return ret;
  1973. }
  1974. #ifdef CONFIG_SLATE_MODULE_ENABLED
  1975. static int icnss_slate_event_notifier_nb(struct notifier_block *nb,
  1976. unsigned long event, void *data)
  1977. {
  1978. icnss_pr_info("Received slate event 0x%x\n", event);
  1979. if (event == SLATE_STATUS) {
  1980. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1981. seb_nb);
  1982. enum boot_status status = *(enum boot_status *)data;
  1983. if (status == SLATE_READY) {
  1984. icnss_pr_dbg("Slate ready received, state: 0x%lx\n",
  1985. priv->state);
  1986. set_bit(ICNSS_SLATE_READY, &priv->state);
  1987. set_bit(ICNSS_SLATE_UP, &priv->state);
  1988. complete(&priv->slate_boot_complete);
  1989. }
  1990. }
  1991. return NOTIFY_OK;
  1992. }
  1993. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  1994. {
  1995. int ret = 0;
  1996. priv->seb_nb.notifier_call = icnss_slate_event_notifier_nb;
  1997. priv->seb_handle = seb_register_for_slate_event(SLATE_STATUS,
  1998. &priv->seb_nb);
  1999. if (IS_ERR_OR_NULL(priv->seb_handle)) {
  2000. ret = priv->seb_handle ? PTR_ERR(priv->seb_handle) : -EINVAL;
  2001. icnss_pr_err("SLATE event register notifier failed: %d\n",
  2002. ret);
  2003. }
  2004. return ret;
  2005. }
  2006. static int icnss_unregister_slate_event_notifier(struct icnss_priv *priv)
  2007. {
  2008. int ret = 0;
  2009. ret = seb_unregister_for_slate_event(priv->seb_handle, &priv->seb_nb);
  2010. if (ret < 0)
  2011. icnss_pr_err("Slate event unregister failed: %d\n", ret);
  2012. return ret;
  2013. }
  2014. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  2015. unsigned long code,
  2016. void *data)
  2017. {
  2018. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  2019. slate_ssr_nb);
  2020. int ret = 0;
  2021. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  2022. if (code == QCOM_SSR_AFTER_POWERUP &&
  2023. test_bit(ICNSS_SLATE_READY, &priv->state)) {
  2024. set_bit(ICNSS_SLATE_UP, &priv->state);
  2025. complete(&priv->slate_boot_complete);
  2026. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  2027. priv->state);
  2028. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  2029. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  2030. clear_bit(ICNSS_SLATE_UP, &priv->state);
  2031. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2032. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  2033. priv->state);
  2034. goto skip_pdr;
  2035. }
  2036. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  2037. ret = icnss_trigger_recovery(&priv->pdev->dev);
  2038. if (ret < 0) {
  2039. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  2040. ret, priv->state);
  2041. goto skip_pdr;
  2042. }
  2043. }
  2044. skip_pdr:
  2045. return NOTIFY_OK;
  2046. }
  2047. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  2048. {
  2049. int ret = 0;
  2050. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  2051. priv->slate_notify_handler =
  2052. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  2053. if (IS_ERR_OR_NULL(priv->slate_notify_handler)) {
  2054. ret = PTR_ERR(priv->slate_notify_handler);
  2055. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  2056. }
  2057. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  2058. return ret;
  2059. }
  2060. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2061. {
  2062. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  2063. return 0;
  2064. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  2065. &priv->slate_ssr_nb);
  2066. priv->slate_notify_handler = NULL;
  2067. return 0;
  2068. }
  2069. #else
  2070. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  2071. {
  2072. return 0;
  2073. }
  2074. static int icnss_unregister_slate_event_notifier(struct icnss_priv *priv)
  2075. {
  2076. return 0;
  2077. }
  2078. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  2079. {
  2080. return 0;
  2081. }
  2082. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2083. {
  2084. return 0;
  2085. }
  2086. #endif
  2087. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  2088. {
  2089. int ret = 0;
  2090. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  2091. /*
  2092. * Assign priority of icnss modem notifier callback over IPA
  2093. * modem notifier callback which is 0
  2094. */
  2095. priv->modem_ssr_nb.priority = 1;
  2096. priv->modem_notify_handler =
  2097. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  2098. if (IS_ERR_OR_NULL(priv->modem_notify_handler)) {
  2099. ret = PTR_ERR(priv->modem_notify_handler);
  2100. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  2101. }
  2102. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  2103. return ret;
  2104. }
  2105. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  2106. {
  2107. if (IS_ERR_OR_NULL(priv->wpss_early_notify_handler))
  2108. return;
  2109. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  2110. &priv->wpss_early_ssr_nb);
  2111. priv->wpss_early_notify_handler = NULL;
  2112. }
  2113. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  2114. {
  2115. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2116. return 0;
  2117. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  2118. &priv->wpss_ssr_nb);
  2119. priv->wpss_notify_handler = NULL;
  2120. return 0;
  2121. }
  2122. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  2123. {
  2124. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2125. return 0;
  2126. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  2127. &priv->modem_ssr_nb);
  2128. priv->modem_notify_handler = NULL;
  2129. return 0;
  2130. }
  2131. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  2132. {
  2133. struct icnss_priv *priv = priv_cb;
  2134. struct icnss_event_pd_service_down_data *event_data;
  2135. struct icnss_uevent_fw_down_data fw_down_data = {0};
  2136. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  2137. if (!priv)
  2138. return;
  2139. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  2140. state, priv->state);
  2141. switch (state) {
  2142. case SERVREG_SERVICE_STATE_DOWN:
  2143. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2144. if (!event_data)
  2145. return;
  2146. event_data->crashed = true;
  2147. if (!priv->is_ssr) {
  2148. set_bit(ICNSS_PDR, &penv->state);
  2149. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  2150. cause = ICNSS_HOST_ERROR;
  2151. priv->stats.recovery.pdr_host_error++;
  2152. } else {
  2153. cause = ICNSS_FW_CRASH;
  2154. priv->stats.recovery.pdr_fw_crash++;
  2155. }
  2156. } else if (priv->root_pd_shutdown) {
  2157. cause = ICNSS_ROOT_PD_SHUTDOWN;
  2158. event_data->crashed = false;
  2159. }
  2160. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  2161. priv->state, icnss_pdr_cause[cause]);
  2162. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2163. set_bit(ICNSS_FW_DOWN, &priv->state);
  2164. icnss_ignore_fw_timeout(true);
  2165. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  2166. clear_bit(ICNSS_FW_READY, &priv->state);
  2167. fw_down_data.crashed = event_data->crashed;
  2168. icnss_call_driver_uevent(priv,
  2169. ICNSS_UEVENT_FW_DOWN,
  2170. &fw_down_data);
  2171. }
  2172. }
  2173. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2174. if (event_data->crashed)
  2175. mod_timer(&priv->recovery_timer,
  2176. jiffies +
  2177. msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  2178. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  2179. ICNSS_EVENT_SYNC, event_data);
  2180. break;
  2181. case SERVREG_SERVICE_STATE_UP:
  2182. clear_bit(ICNSS_FW_DOWN, &priv->state);
  2183. break;
  2184. default:
  2185. break;
  2186. }
  2187. return;
  2188. }
  2189. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  2190. {
  2191. struct pdr_handle *handle = NULL;
  2192. struct pdr_service *service = NULL;
  2193. int err = 0;
  2194. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  2195. if (IS_ERR_OR_NULL(handle)) {
  2196. err = PTR_ERR(handle);
  2197. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  2198. goto out;
  2199. }
  2200. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  2201. if (IS_ERR_OR_NULL(service)) {
  2202. err = PTR_ERR(service);
  2203. icnss_pr_err("Failed to add lookup, err %d", err);
  2204. goto out;
  2205. }
  2206. priv->pdr_handle = handle;
  2207. priv->pdr_service = service;
  2208. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  2209. icnss_pr_info("PDR registration happened");
  2210. out:
  2211. return err;
  2212. }
  2213. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  2214. {
  2215. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  2216. return;
  2217. pdr_handle_release(priv->pdr_handle);
  2218. }
  2219. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  2220. {
  2221. int ret = 0;
  2222. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  2223. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  2224. #else
  2225. priv->icnss_ramdump_class = class_create(ICNSS_RAMDUMP_NAME);
  2226. #endif
  2227. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  2228. ret = PTR_ERR(priv->icnss_ramdump_class);
  2229. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  2230. return ret;
  2231. }
  2232. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  2233. ICNSS_RAMDUMP_NAME);
  2234. if (ret < 0) {
  2235. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  2236. goto fail_alloc_major;
  2237. }
  2238. return 0;
  2239. fail_alloc_major:
  2240. class_destroy(priv->icnss_ramdump_class);
  2241. return ret;
  2242. }
  2243. static void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2244. {
  2245. int ret = 0;
  2246. struct icnss_ramdump_info *ramdump_info;
  2247. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2248. if (!ramdump_info)
  2249. return ERR_PTR(-ENOMEM);
  2250. if (!dev_name) {
  2251. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2252. return NULL;
  2253. }
  2254. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2255. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2256. if (ramdump_info->minor < 0) {
  2257. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2258. ramdump_info->minor);
  2259. ret = -ENODEV;
  2260. goto fail_out_of_minors;
  2261. }
  2262. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2263. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2264. ramdump_info->minor),
  2265. ramdump_info, ramdump_info->name);
  2266. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2267. ret = PTR_ERR(ramdump_info->dev);
  2268. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2269. ramdump_info->name, ret);
  2270. goto fail_device_create;
  2271. }
  2272. return (void *)ramdump_info;
  2273. fail_device_create:
  2274. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2275. fail_out_of_minors:
  2276. kfree(ramdump_info);
  2277. return ERR_PTR(ret);
  2278. }
  2279. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2280. {
  2281. int ret = 0;
  2282. if (!priv || !priv->pdev) {
  2283. icnss_pr_err("Platform priv or pdev is NULL\n");
  2284. return -EINVAL;
  2285. }
  2286. ret = icnss_ramdump_devnode_init(priv);
  2287. if (ret)
  2288. return ret;
  2289. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2290. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2291. icnss_pr_err("Failed to create msa0 dump device!");
  2292. return -ENOMEM;
  2293. }
  2294. if (priv->device_id == WCN6750_DEVICE_ID ||
  2295. priv->device_id == WCN6450_DEVICE_ID) {
  2296. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2297. ICNSS_M3_SEGMENT(
  2298. ICNSS_M3_SEGMENT_PHYAREG));
  2299. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2300. !priv->m3_dump_phyareg->dev) {
  2301. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2302. return -ENOMEM;
  2303. }
  2304. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2305. ICNSS_M3_SEGMENT(
  2306. ICNSS_M3_SEGMENT_PHYA));
  2307. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2308. !priv->m3_dump_phydbg->dev) {
  2309. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2310. return -ENOMEM;
  2311. }
  2312. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2313. ICNSS_M3_SEGMENT(
  2314. ICNSS_M3_SEGMENT_WMACREG));
  2315. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2316. !priv->m3_dump_wmac0reg->dev) {
  2317. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2318. return -ENOMEM;
  2319. }
  2320. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2321. ICNSS_M3_SEGMENT(
  2322. ICNSS_M3_SEGMENT_WCSSDBG));
  2323. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2324. !priv->m3_dump_wcssdbg->dev) {
  2325. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2326. return -ENOMEM;
  2327. }
  2328. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2329. ICNSS_M3_SEGMENT(
  2330. ICNSS_M3_SEGMENT_PHYAM3));
  2331. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2332. !priv->m3_dump_phyapdmem->dev) {
  2333. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2334. return -ENOMEM;
  2335. }
  2336. }
  2337. return 0;
  2338. }
  2339. static int icnss_enable_recovery(struct icnss_priv *priv)
  2340. {
  2341. int ret;
  2342. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2343. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2344. return 0;
  2345. }
  2346. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2347. icnss_pr_dbg("SSR disabled through module parameter\n");
  2348. goto enable_pdr;
  2349. }
  2350. ret = icnss_register_ramdump_devices(priv);
  2351. if (ret)
  2352. return ret;
  2353. if (priv->wpss_supported) {
  2354. icnss_wpss_early_ssr_register_notifier(priv);
  2355. icnss_wpss_ssr_register_notifier(priv);
  2356. return 0;
  2357. }
  2358. if (!(priv->rproc_fw_download))
  2359. icnss_modem_ssr_register_notifier(priv);
  2360. if (priv->is_slate_rfa) {
  2361. icnss_slate_ssr_register_notifier(priv);
  2362. icnss_register_slate_event_notifier(priv);
  2363. }
  2364. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2365. icnss_pr_dbg("PDR disabled through module parameter\n");
  2366. return 0;
  2367. }
  2368. enable_pdr:
  2369. ret = icnss_pd_restart_enable(priv);
  2370. if (ret)
  2371. return ret;
  2372. return 0;
  2373. }
  2374. static int icnss_dev_id_match(struct icnss_priv *priv,
  2375. struct device_info *dev_info)
  2376. {
  2377. while (dev_info->device_id) {
  2378. if (priv->device_id == dev_info->device_id)
  2379. return 1;
  2380. dev_info++;
  2381. }
  2382. return 0;
  2383. }
  2384. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2385. unsigned long *thermal_state)
  2386. {
  2387. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2388. *thermal_state = icnss_tcdev->max_thermal_state;
  2389. return 0;
  2390. }
  2391. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2392. unsigned long *thermal_state)
  2393. {
  2394. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2395. *thermal_state = icnss_tcdev->curr_thermal_state;
  2396. return 0;
  2397. }
  2398. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2399. unsigned long thermal_state)
  2400. {
  2401. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2402. struct device *dev = &penv->pdev->dev;
  2403. int ret = 0;
  2404. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2405. return 0;
  2406. if (thermal_state > icnss_tcdev->max_thermal_state)
  2407. return -EINVAL;
  2408. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2409. thermal_state, icnss_tcdev->tcdev_id);
  2410. mutex_lock(&penv->tcdev_lock);
  2411. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2412. icnss_tcdev->tcdev_id);
  2413. if (!ret)
  2414. icnss_tcdev->curr_thermal_state = thermal_state;
  2415. mutex_unlock(&penv->tcdev_lock);
  2416. if (ret) {
  2417. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2418. ret, icnss_tcdev->tcdev_id);
  2419. return ret;
  2420. }
  2421. return 0;
  2422. }
  2423. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2424. .get_max_state = icnss_tcdev_get_max_state,
  2425. .get_cur_state = icnss_tcdev_get_cur_state,
  2426. .set_cur_state = icnss_tcdev_set_cur_state,
  2427. };
  2428. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2429. int tcdev_id)
  2430. {
  2431. struct icnss_priv *priv = dev_get_drvdata(dev);
  2432. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2433. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2434. struct device_node *dev_node;
  2435. int ret = 0;
  2436. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2437. if (!icnss_tcdev)
  2438. return -ENOMEM;
  2439. icnss_tcdev->tcdev_id = tcdev_id;
  2440. icnss_tcdev->max_thermal_state = max_state;
  2441. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2442. "qcom,icnss_cdev%d", tcdev_id);
  2443. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2444. if (!dev_node) {
  2445. icnss_pr_err("Failed to get cooling device node\n");
  2446. return -EINVAL;
  2447. }
  2448. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2449. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2450. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2451. dev_node,
  2452. cdev_node_name, icnss_tcdev,
  2453. &icnss_cooling_ops);
  2454. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2455. ret = PTR_ERR(icnss_tcdev->tcdev);
  2456. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2457. ret, icnss_tcdev->tcdev_id);
  2458. } else {
  2459. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2460. icnss_tcdev->tcdev_id);
  2461. list_add(&icnss_tcdev->tcdev_list,
  2462. &priv->icnss_tcdev_list);
  2463. }
  2464. } else {
  2465. icnss_pr_dbg("Cooling device registration not supported");
  2466. ret = -EOPNOTSUPP;
  2467. }
  2468. return ret;
  2469. }
  2470. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2471. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2472. {
  2473. struct icnss_priv *priv = dev_get_drvdata(dev);
  2474. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2475. while (!list_empty(&priv->icnss_tcdev_list)) {
  2476. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2477. struct icnss_thermal_cdev,
  2478. tcdev_list);
  2479. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2480. list_del(&icnss_tcdev->tcdev_list);
  2481. kfree(icnss_tcdev);
  2482. }
  2483. }
  2484. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2485. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2486. unsigned long *thermal_state,
  2487. int tcdev_id)
  2488. {
  2489. struct icnss_priv *priv = dev_get_drvdata(dev);
  2490. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2491. mutex_lock(&priv->tcdev_lock);
  2492. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2493. if (icnss_tcdev->tcdev_id != tcdev_id)
  2494. continue;
  2495. *thermal_state = icnss_tcdev->curr_thermal_state;
  2496. mutex_unlock(&priv->tcdev_lock);
  2497. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2498. icnss_tcdev->curr_thermal_state, tcdev_id);
  2499. return 0;
  2500. }
  2501. mutex_unlock(&priv->tcdev_lock);
  2502. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2503. return -EINVAL;
  2504. }
  2505. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2506. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2507. int cmd_len, void *cb_ctx,
  2508. int (*cb)(void *ctx, void *event, int event_len))
  2509. {
  2510. struct icnss_priv *priv = icnss_get_plat_priv();
  2511. int ret;
  2512. if (!priv)
  2513. return -ENODEV;
  2514. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2515. return -EINVAL;
  2516. priv->get_info_cb = cb;
  2517. priv->get_info_cb_ctx = cb_ctx;
  2518. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2519. if (ret) {
  2520. priv->get_info_cb = NULL;
  2521. priv->get_info_cb_ctx = NULL;
  2522. }
  2523. return ret;
  2524. }
  2525. EXPORT_SYMBOL(icnss_qmi_send);
  2526. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2527. struct module *owner, const char *mod_name)
  2528. {
  2529. int ret = 0;
  2530. struct icnss_priv *priv = icnss_get_plat_priv();
  2531. if (!priv || !priv->pdev) {
  2532. icnss_pr_vdbg("icnss2 is not ready for register driver\n");
  2533. ret = -EAGAIN;
  2534. goto out;
  2535. }
  2536. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2537. if (priv->ops) {
  2538. icnss_pr_err("Driver already registered\n");
  2539. ret = -EEXIST;
  2540. goto out;
  2541. }
  2542. if (!ops->dev_info) {
  2543. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2544. return -EINVAL;
  2545. }
  2546. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2547. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2548. ops->dev_info->name);
  2549. return -ENODEV;
  2550. }
  2551. if (!ops->probe || !ops->remove) {
  2552. ret = -EINVAL;
  2553. goto out;
  2554. }
  2555. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2556. 0, ops);
  2557. if (ret == -EINTR)
  2558. ret = 0;
  2559. out:
  2560. return ret;
  2561. }
  2562. EXPORT_SYMBOL(__icnss_register_driver);
  2563. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2564. {
  2565. int ret;
  2566. struct icnss_priv *priv = icnss_get_plat_priv();
  2567. if (!priv || !priv->pdev) {
  2568. ret = -ENODEV;
  2569. goto out;
  2570. }
  2571. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2572. if (!priv->ops) {
  2573. icnss_pr_err("Driver not registered\n");
  2574. ret = -ENOENT;
  2575. goto out;
  2576. }
  2577. ret = icnss_driver_event_post(priv,
  2578. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2579. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2580. out:
  2581. return ret;
  2582. }
  2583. EXPORT_SYMBOL(icnss_unregister_driver);
  2584. static struct icnss_msi_config msi_config_wcn6750 = {
  2585. .total_vectors = 28,
  2586. .total_users = 2,
  2587. .users = (struct icnss_msi_user[]) {
  2588. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2589. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2590. },
  2591. };
  2592. static struct icnss_msi_config msi_config_wcn6450 = {
  2593. .total_vectors = 14,
  2594. .total_users = 2,
  2595. .users = (struct icnss_msi_user[]) {
  2596. { .name = "CE", .num_vectors = 12, .base_vector = 0 },
  2597. { .name = "DP", .num_vectors = 2, .base_vector = 12 },
  2598. },
  2599. };
  2600. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2601. {
  2602. if (priv->device_id == WCN6750_DEVICE_ID)
  2603. priv->msi_config = &msi_config_wcn6750;
  2604. else
  2605. priv->msi_config = &msi_config_wcn6450;
  2606. return 0;
  2607. }
  2608. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2609. int *num_vectors, u32 *user_base_data,
  2610. u32 *base_vector)
  2611. {
  2612. struct icnss_priv *priv = dev_get_drvdata(dev);
  2613. struct icnss_msi_config *msi_config;
  2614. int idx;
  2615. if (!priv)
  2616. return -ENODEV;
  2617. msi_config = priv->msi_config;
  2618. if (!msi_config) {
  2619. icnss_pr_err("MSI is not supported.\n");
  2620. return -EINVAL;
  2621. }
  2622. for (idx = 0; idx < msi_config->total_users; idx++) {
  2623. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2624. *num_vectors = msi_config->users[idx].num_vectors;
  2625. *user_base_data = msi_config->users[idx].base_vector
  2626. + priv->msi_base_data;
  2627. *base_vector = msi_config->users[idx].base_vector;
  2628. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2629. user_name, *num_vectors, *user_base_data,
  2630. *base_vector);
  2631. return 0;
  2632. }
  2633. }
  2634. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2635. return -EINVAL;
  2636. }
  2637. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2638. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2639. {
  2640. struct icnss_priv *priv = dev_get_drvdata(dev);
  2641. int irq_num;
  2642. irq_num = priv->srng_irqs[vector];
  2643. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2644. irq_num, vector);
  2645. return irq_num;
  2646. }
  2647. EXPORT_SYMBOL(icnss_get_msi_irq);
  2648. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2649. u32 *msi_addr_high)
  2650. {
  2651. struct icnss_priv *priv = dev_get_drvdata(dev);
  2652. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2653. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2654. }
  2655. EXPORT_SYMBOL(icnss_get_msi_address);
  2656. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2657. irqreturn_t (*handler)(int, void *),
  2658. unsigned long flags, const char *name, void *ctx)
  2659. {
  2660. int ret = 0;
  2661. unsigned int irq;
  2662. struct ce_irq_list *irq_entry;
  2663. struct icnss_priv *priv = dev_get_drvdata(dev);
  2664. if (!priv || !priv->pdev) {
  2665. ret = -ENODEV;
  2666. goto out;
  2667. }
  2668. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2669. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2670. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2671. ret = -EINVAL;
  2672. goto out;
  2673. }
  2674. irq = priv->ce_irqs[ce_id];
  2675. irq_entry = &priv->ce_irq_list[ce_id];
  2676. if (irq_entry->handler || irq_entry->irq) {
  2677. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2678. irq, ce_id);
  2679. ret = -EEXIST;
  2680. goto out;
  2681. }
  2682. ret = request_irq(irq, handler, flags, name, ctx);
  2683. if (ret) {
  2684. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2685. irq, ce_id, ret);
  2686. goto out;
  2687. }
  2688. irq_entry->irq = irq;
  2689. irq_entry->handler = handler;
  2690. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2691. penv->stats.ce_irqs[ce_id].request++;
  2692. out:
  2693. return ret;
  2694. }
  2695. EXPORT_SYMBOL(icnss_ce_request_irq);
  2696. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2697. {
  2698. int ret = 0;
  2699. unsigned int irq;
  2700. struct ce_irq_list *irq_entry;
  2701. if (!penv || !penv->pdev || !dev) {
  2702. ret = -ENODEV;
  2703. goto out;
  2704. }
  2705. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2706. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2707. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2708. ret = -EINVAL;
  2709. goto out;
  2710. }
  2711. irq = penv->ce_irqs[ce_id];
  2712. irq_entry = &penv->ce_irq_list[ce_id];
  2713. if (!irq_entry->handler || !irq_entry->irq) {
  2714. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2715. ret = -EEXIST;
  2716. goto out;
  2717. }
  2718. free_irq(irq, ctx);
  2719. irq_entry->irq = 0;
  2720. irq_entry->handler = NULL;
  2721. penv->stats.ce_irqs[ce_id].free++;
  2722. out:
  2723. return ret;
  2724. }
  2725. EXPORT_SYMBOL(icnss_ce_free_irq);
  2726. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2727. {
  2728. unsigned int irq;
  2729. if (!penv || !penv->pdev || !dev) {
  2730. icnss_pr_err("Platform driver not initialized\n");
  2731. return;
  2732. }
  2733. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2734. penv->state);
  2735. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2736. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2737. return;
  2738. }
  2739. penv->stats.ce_irqs[ce_id].enable++;
  2740. irq = penv->ce_irqs[ce_id];
  2741. enable_irq(irq);
  2742. }
  2743. EXPORT_SYMBOL(icnss_enable_irq);
  2744. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2745. {
  2746. unsigned int irq;
  2747. if (!penv || !penv->pdev || !dev) {
  2748. icnss_pr_err("Platform driver not initialized\n");
  2749. return;
  2750. }
  2751. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2752. penv->state);
  2753. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2754. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2755. ce_id);
  2756. return;
  2757. }
  2758. irq = penv->ce_irqs[ce_id];
  2759. disable_irq(irq);
  2760. penv->stats.ce_irqs[ce_id].disable++;
  2761. }
  2762. EXPORT_SYMBOL(icnss_disable_irq);
  2763. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2764. {
  2765. char *fw_build_timestamp = NULL;
  2766. struct icnss_priv *priv = dev_get_drvdata(dev);
  2767. if (!priv) {
  2768. icnss_pr_err("Platform driver not initialized\n");
  2769. return -EINVAL;
  2770. }
  2771. info->v_addr = priv->mem_base_va;
  2772. info->p_addr = priv->mem_base_pa;
  2773. info->chip_id = priv->chip_info.chip_id;
  2774. info->chip_family = priv->chip_info.chip_family;
  2775. info->board_id = priv->board_id;
  2776. info->soc_id = priv->soc_id;
  2777. info->fw_version = priv->fw_version_info.fw_version;
  2778. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2779. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2780. strlcpy(info->fw_build_timestamp,
  2781. priv->fw_version_info.fw_build_timestamp,
  2782. WLFW_MAX_TIMESTAMP_LEN + 1);
  2783. strlcpy(info->fw_build_id, priv->fw_build_id,
  2784. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2785. info->rd_card_chain_cap = priv->rd_card_chain_cap;
  2786. info->phy_he_channel_width_cap = priv->phy_he_channel_width_cap;
  2787. info->phy_qam_cap = priv->phy_qam_cap;
  2788. memcpy(&info->dev_mem_info, &priv->dev_mem_info,
  2789. sizeof(info->dev_mem_info));
  2790. return 0;
  2791. }
  2792. EXPORT_SYMBOL(icnss_get_soc_info);
  2793. int icnss_get_mhi_state(struct device *dev)
  2794. {
  2795. struct icnss_priv *priv = dev_get_drvdata(dev);
  2796. if (!priv) {
  2797. icnss_pr_err("Platform driver not initialized\n");
  2798. return -EINVAL;
  2799. }
  2800. if (!priv->mhi_state_info_va)
  2801. return -ENOMEM;
  2802. return ioread32(priv->mhi_state_info_va);
  2803. }
  2804. EXPORT_SYMBOL(icnss_get_mhi_state);
  2805. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2806. {
  2807. int ret;
  2808. struct icnss_priv *priv;
  2809. if (!dev)
  2810. return -ENODEV;
  2811. priv = dev_get_drvdata(dev);
  2812. if (!priv) {
  2813. icnss_pr_err("Platform driver not initialized\n");
  2814. return -EINVAL;
  2815. }
  2816. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2817. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2818. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2819. priv->state);
  2820. return -EINVAL;
  2821. }
  2822. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2823. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2824. if (ret)
  2825. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2826. ret, fw_log_mode);
  2827. return ret;
  2828. }
  2829. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2830. int icnss_force_wake_request(struct device *dev)
  2831. {
  2832. struct icnss_priv *priv;
  2833. if (!dev)
  2834. return -ENODEV;
  2835. priv = dev_get_drvdata(dev);
  2836. if (!priv) {
  2837. icnss_pr_err("Platform driver not initialized\n");
  2838. return -EINVAL;
  2839. }
  2840. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2841. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2842. icnss_pr_soc_wake("FW down, ignoring SOC Wake request state: 0x%lx\n",
  2843. priv->state);
  2844. return -EINVAL;
  2845. }
  2846. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2847. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2848. atomic_read(&priv->soc_wake_ref_count));
  2849. return 0;
  2850. }
  2851. icnss_pr_soc_wake("Calling SOC Wake request");
  2852. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2853. 0, NULL);
  2854. return 0;
  2855. }
  2856. EXPORT_SYMBOL(icnss_force_wake_request);
  2857. int icnss_force_wake_release(struct device *dev)
  2858. {
  2859. struct icnss_priv *priv;
  2860. if (!dev)
  2861. return -ENODEV;
  2862. priv = dev_get_drvdata(dev);
  2863. if (!priv) {
  2864. icnss_pr_err("Platform driver not initialized\n");
  2865. return -EINVAL;
  2866. }
  2867. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2868. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2869. icnss_pr_soc_wake("FW down, ignoring SOC Wake release state: 0x%lx\n",
  2870. priv->state);
  2871. return -EINVAL;
  2872. }
  2873. icnss_pr_soc_wake("Calling SOC Wake response");
  2874. if (atomic_read(&priv->soc_wake_ref_count) &&
  2875. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2876. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2877. atomic_read(&priv->soc_wake_ref_count));
  2878. return 0;
  2879. }
  2880. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2881. 0, NULL);
  2882. return 0;
  2883. }
  2884. EXPORT_SYMBOL(icnss_force_wake_release);
  2885. int icnss_is_device_awake(struct device *dev)
  2886. {
  2887. struct icnss_priv *priv = dev_get_drvdata(dev);
  2888. if (!priv) {
  2889. icnss_pr_err("Platform driver not initialized\n");
  2890. return -EINVAL;
  2891. }
  2892. return atomic_read(&priv->soc_wake_ref_count);
  2893. }
  2894. EXPORT_SYMBOL(icnss_is_device_awake);
  2895. int icnss_is_pci_ep_awake(struct device *dev)
  2896. {
  2897. struct icnss_priv *priv = dev_get_drvdata(dev);
  2898. if (!priv) {
  2899. icnss_pr_err("Platform driver not initialized\n");
  2900. return -EINVAL;
  2901. }
  2902. if (!priv->mhi_state_info_va)
  2903. return -ENOMEM;
  2904. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2905. }
  2906. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2907. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2908. uint32_t mem_type, uint32_t data_len,
  2909. uint8_t *output)
  2910. {
  2911. int ret = 0;
  2912. struct icnss_priv *priv = dev_get_drvdata(dev);
  2913. if (priv->magic != ICNSS_MAGIC) {
  2914. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2915. dev, priv, priv->magic);
  2916. return -EINVAL;
  2917. }
  2918. if (!output || data_len == 0
  2919. || data_len > WLFW_MAX_DATA_SIZE) {
  2920. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2921. output, data_len);
  2922. ret = -EINVAL;
  2923. goto out;
  2924. }
  2925. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2926. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2927. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2928. priv->state);
  2929. ret = -EINVAL;
  2930. goto out;
  2931. }
  2932. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2933. data_len, output);
  2934. out:
  2935. return ret;
  2936. }
  2937. EXPORT_SYMBOL(icnss_athdiag_read);
  2938. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2939. uint32_t mem_type, uint32_t data_len,
  2940. uint8_t *input)
  2941. {
  2942. int ret = 0;
  2943. struct icnss_priv *priv = dev_get_drvdata(dev);
  2944. if (priv->magic != ICNSS_MAGIC) {
  2945. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2946. dev, priv, priv->magic);
  2947. return -EINVAL;
  2948. }
  2949. if (!input || data_len == 0
  2950. || data_len > WLFW_MAX_DATA_SIZE) {
  2951. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2952. input, data_len);
  2953. ret = -EINVAL;
  2954. goto out;
  2955. }
  2956. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2957. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2958. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2959. priv->state);
  2960. ret = -EINVAL;
  2961. goto out;
  2962. }
  2963. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2964. data_len, input);
  2965. out:
  2966. return ret;
  2967. }
  2968. EXPORT_SYMBOL(icnss_athdiag_write);
  2969. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2970. enum icnss_driver_mode mode,
  2971. const char *host_version)
  2972. {
  2973. struct icnss_priv *priv = dev_get_drvdata(dev);
  2974. int temp = 0, ret = 0;
  2975. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2976. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2977. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2978. priv->state);
  2979. return -EINVAL;
  2980. }
  2981. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2982. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2983. priv->state);
  2984. return -EINVAL;
  2985. }
  2986. if (priv->wpss_supported &&
  2987. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2988. icnss_setup_dms_mac(priv);
  2989. if (priv->device_id == WCN6750_DEVICE_ID) {
  2990. if (!icnss_get_temperature(priv, &temp)) {
  2991. icnss_pr_dbg("Temperature: %d\n", temp);
  2992. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2993. icnss_set_wlan_en_delay(priv);
  2994. }
  2995. }
  2996. if (priv->device_id == WCN6450_DEVICE_ID)
  2997. icnss_hw_power_off(priv);
  2998. ret = icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2999. if (priv->device_id == WCN6450_DEVICE_ID)
  3000. icnss_hw_power_on(priv);
  3001. return ret;
  3002. }
  3003. EXPORT_SYMBOL(icnss_wlan_enable);
  3004. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  3005. {
  3006. struct icnss_priv *priv = dev_get_drvdata(dev);
  3007. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  3008. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  3009. priv->state);
  3010. return 0;
  3011. }
  3012. return icnss_send_wlan_disable_to_fw(priv);
  3013. }
  3014. EXPORT_SYMBOL(icnss_wlan_disable);
  3015. bool icnss_is_qmi_disable(struct device *dev)
  3016. {
  3017. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  3018. }
  3019. EXPORT_SYMBOL(icnss_is_qmi_disable);
  3020. int icnss_get_ce_id(struct device *dev, int irq)
  3021. {
  3022. int i;
  3023. if (!penv || !penv->pdev || !dev)
  3024. return -ENODEV;
  3025. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3026. if (penv->ce_irqs[i] == irq)
  3027. return i;
  3028. }
  3029. icnss_pr_err("No matching CE id for irq %d\n", irq);
  3030. return -EINVAL;
  3031. }
  3032. EXPORT_SYMBOL(icnss_get_ce_id);
  3033. int icnss_get_irq(struct device *dev, int ce_id)
  3034. {
  3035. int irq;
  3036. if (!penv || !penv->pdev || !dev)
  3037. return -ENODEV;
  3038. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  3039. return -EINVAL;
  3040. irq = penv->ce_irqs[ce_id];
  3041. return irq;
  3042. }
  3043. EXPORT_SYMBOL(icnss_get_irq);
  3044. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  3045. {
  3046. struct icnss_priv *priv = dev_get_drvdata(dev);
  3047. if (!priv) {
  3048. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  3049. return NULL;
  3050. }
  3051. return priv->iommu_domain;
  3052. }
  3053. EXPORT_SYMBOL(icnss_smmu_get_domain);
  3054. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  3055. static int icnss_iommu_map(struct iommu_domain *domain,
  3056. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  3057. {
  3058. return iommu_map(domain, iova, paddr, size, prot);
  3059. }
  3060. #else
  3061. static int icnss_iommu_map(struct iommu_domain *domain,
  3062. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  3063. {
  3064. return iommu_map(domain, iova, paddr, size, prot, GFP_KERNEL);
  3065. }
  3066. #endif
  3067. int icnss_smmu_map(struct device *dev,
  3068. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  3069. {
  3070. struct icnss_priv *priv = dev_get_drvdata(dev);
  3071. int flag = IOMMU_READ | IOMMU_WRITE;
  3072. bool dma_coherent = false;
  3073. unsigned long iova;
  3074. int prop_len = 0;
  3075. size_t len;
  3076. int ret = 0;
  3077. if (!priv) {
  3078. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3079. dev, priv);
  3080. return -EINVAL;
  3081. }
  3082. if (!iova_addr) {
  3083. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  3084. &paddr, size);
  3085. return -EINVAL;
  3086. }
  3087. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  3088. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  3089. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  3090. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3091. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3092. iova,
  3093. &priv->smmu_iova_ipa_start,
  3094. priv->smmu_iova_ipa_len);
  3095. return -ENOMEM;
  3096. }
  3097. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  3098. icnss_pr_dbg("dma-coherent is %s\n",
  3099. dma_coherent ? "enabled" : "disabled");
  3100. if (dma_coherent)
  3101. flag |= IOMMU_CACHE;
  3102. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  3103. ret = icnss_iommu_map(priv->iommu_domain, iova,
  3104. rounddown(paddr, PAGE_SIZE), len,
  3105. flag);
  3106. if (ret) {
  3107. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  3108. return ret;
  3109. }
  3110. priv->smmu_iova_ipa_current = iova + len;
  3111. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  3112. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  3113. return 0;
  3114. }
  3115. EXPORT_SYMBOL(icnss_smmu_map);
  3116. int icnss_smmu_unmap(struct device *dev,
  3117. uint32_t iova_addr, size_t size)
  3118. {
  3119. struct icnss_priv *priv = dev_get_drvdata(dev);
  3120. unsigned long iova;
  3121. size_t len, unmapped_len;
  3122. if (!priv) {
  3123. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3124. dev, priv);
  3125. return -EINVAL;
  3126. }
  3127. if (!iova_addr) {
  3128. icnss_pr_err("iova_addr is NULL, size %zu\n",
  3129. size);
  3130. return -EINVAL;
  3131. }
  3132. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  3133. PAGE_SIZE);
  3134. iova = rounddown(iova_addr, PAGE_SIZE);
  3135. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3136. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3137. iova,
  3138. &priv->smmu_iova_ipa_start,
  3139. priv->smmu_iova_ipa_len);
  3140. return -ENOMEM;
  3141. }
  3142. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  3143. iova, len);
  3144. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  3145. if (unmapped_len != len) {
  3146. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  3147. return -EINVAL;
  3148. }
  3149. priv->smmu_iova_ipa_current = iova;
  3150. return 0;
  3151. }
  3152. EXPORT_SYMBOL(icnss_smmu_unmap);
  3153. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  3154. {
  3155. return socinfo_get_serial_number();
  3156. }
  3157. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  3158. int icnss_trigger_recovery(struct device *dev)
  3159. {
  3160. int ret = 0;
  3161. struct icnss_priv *priv = dev_get_drvdata(dev);
  3162. if (priv->magic != ICNSS_MAGIC) {
  3163. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  3164. ret = -EINVAL;
  3165. goto out;
  3166. }
  3167. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  3168. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  3169. priv->state);
  3170. ret = -EPERM;
  3171. goto out;
  3172. }
  3173. if (priv->wpss_supported) {
  3174. icnss_pr_vdbg("Initiate Root PD restart");
  3175. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  3176. ICNSS_SMP2P_OUT_POWER_SAVE);
  3177. if (!ret)
  3178. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3179. return ret;
  3180. }
  3181. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  3182. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  3183. priv->state);
  3184. ret = -EOPNOTSUPP;
  3185. goto out;
  3186. }
  3187. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  3188. priv->state);
  3189. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  3190. if (!ret)
  3191. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3192. out:
  3193. return ret;
  3194. }
  3195. EXPORT_SYMBOL(icnss_trigger_recovery);
  3196. int icnss_idle_shutdown(struct device *dev)
  3197. {
  3198. struct icnss_priv *priv = dev_get_drvdata(dev);
  3199. if (!priv) {
  3200. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3201. return -EINVAL;
  3202. }
  3203. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3204. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3205. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  3206. return -EBUSY;
  3207. }
  3208. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  3209. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3210. }
  3211. EXPORT_SYMBOL(icnss_idle_shutdown);
  3212. int icnss_idle_restart(struct device *dev)
  3213. {
  3214. struct icnss_priv *priv = dev_get_drvdata(dev);
  3215. if (!priv) {
  3216. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3217. return -EINVAL;
  3218. }
  3219. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3220. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3221. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  3222. return -EBUSY;
  3223. }
  3224. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  3225. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3226. }
  3227. EXPORT_SYMBOL(icnss_idle_restart);
  3228. int icnss_exit_power_save(struct device *dev)
  3229. {
  3230. struct icnss_priv *priv = dev_get_drvdata(dev);
  3231. icnss_pr_vdbg("Calling Exit Power Save\n");
  3232. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3233. !test_bit(ICNSS_MODE_ON, &priv->state))
  3234. return 0;
  3235. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  3236. ICNSS_SMP2P_OUT_POWER_SAVE);
  3237. }
  3238. EXPORT_SYMBOL(icnss_exit_power_save);
  3239. int icnss_prevent_l1(struct device *dev)
  3240. {
  3241. struct icnss_priv *priv = dev_get_drvdata(dev);
  3242. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3243. !test_bit(ICNSS_MODE_ON, &priv->state))
  3244. return 0;
  3245. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  3246. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3247. }
  3248. EXPORT_SYMBOL(icnss_prevent_l1);
  3249. void icnss_allow_l1(struct device *dev)
  3250. {
  3251. struct icnss_priv *priv = dev_get_drvdata(dev);
  3252. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3253. !test_bit(ICNSS_MODE_ON, &priv->state))
  3254. return;
  3255. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  3256. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3257. }
  3258. EXPORT_SYMBOL(icnss_allow_l1);
  3259. void icnss_allow_recursive_recovery(struct device *dev)
  3260. {
  3261. struct icnss_priv *priv = dev_get_drvdata(dev);
  3262. priv->allow_recursive_recovery = true;
  3263. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  3264. }
  3265. void icnss_disallow_recursive_recovery(struct device *dev)
  3266. {
  3267. struct icnss_priv *priv = dev_get_drvdata(dev);
  3268. priv->allow_recursive_recovery = false;
  3269. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  3270. }
  3271. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  3272. {
  3273. struct kobject *icnss_kobject;
  3274. int ret = 0;
  3275. atomic_set(&priv->is_shutdown, false);
  3276. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  3277. if (!icnss_kobject) {
  3278. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  3279. return -EINVAL;
  3280. }
  3281. priv->icnss_kobject = icnss_kobject;
  3282. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  3283. if (ret) {
  3284. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  3285. return ret;
  3286. }
  3287. return ret;
  3288. }
  3289. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  3290. {
  3291. struct kobject *icnss_kobject;
  3292. icnss_kobject = priv->icnss_kobject;
  3293. if (icnss_kobject)
  3294. kobject_put(icnss_kobject);
  3295. }
  3296. static ssize_t qdss_tr_start_store(struct device *dev,
  3297. struct device_attribute *attr,
  3298. const char *buf, size_t count)
  3299. {
  3300. struct icnss_priv *priv = dev_get_drvdata(dev);
  3301. wlfw_qdss_trace_start(priv);
  3302. icnss_pr_dbg("Received QDSS start command\n");
  3303. return count;
  3304. }
  3305. static ssize_t qdss_tr_stop_store(struct device *dev,
  3306. struct device_attribute *attr,
  3307. const char *user_buf, size_t count)
  3308. {
  3309. struct icnss_priv *priv = dev_get_drvdata(dev);
  3310. u32 option = 0;
  3311. if (sscanf(user_buf, "%du", &option) != 1)
  3312. return -EINVAL;
  3313. wlfw_qdss_trace_stop(priv, option);
  3314. icnss_pr_dbg("Received QDSS stop command\n");
  3315. return count;
  3316. }
  3317. static ssize_t qdss_conf_download_store(struct device *dev,
  3318. struct device_attribute *attr,
  3319. const char *buf, size_t count)
  3320. {
  3321. struct icnss_priv *priv = dev_get_drvdata(dev);
  3322. icnss_wlfw_qdss_dnld_send_sync(priv);
  3323. icnss_pr_dbg("Received QDSS download config command\n");
  3324. return count;
  3325. }
  3326. static ssize_t hw_trc_override_store(struct device *dev,
  3327. struct device_attribute *attr,
  3328. const char *buf, size_t count)
  3329. {
  3330. struct icnss_priv *priv = dev_get_drvdata(dev);
  3331. int tmp = 0;
  3332. if (sscanf(buf, "%du", &tmp) != 1)
  3333. return -EINVAL;
  3334. priv->hw_trc_override = tmp;
  3335. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3336. return count;
  3337. }
  3338. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3339. {
  3340. struct icnss_priv *priv = icnss_get_plat_priv();
  3341. phandle rproc_phandle;
  3342. int ret;
  3343. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3344. &rproc_phandle)) {
  3345. icnss_pr_err("error reading rproc phandle\n");
  3346. return;
  3347. }
  3348. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3349. if (IS_ERR_OR_NULL(priv->rproc)) {
  3350. icnss_pr_err("rproc not found");
  3351. return;
  3352. }
  3353. ret = rproc_boot(priv->rproc);
  3354. if (ret) {
  3355. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3356. rproc_put(priv->rproc);
  3357. }
  3358. }
  3359. static ssize_t wpss_boot_store(struct device *dev,
  3360. struct device_attribute *attr,
  3361. const char *buf, size_t count)
  3362. {
  3363. struct icnss_priv *priv = dev_get_drvdata(dev);
  3364. int wpss_rproc = 0;
  3365. if (!priv->wpss_supported && !priv->rproc_fw_download)
  3366. return count;
  3367. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3368. icnss_pr_err("Failed to read wpss rproc info");
  3369. return -EINVAL;
  3370. }
  3371. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3372. if (wpss_rproc == 1)
  3373. schedule_work(&wpss_loader);
  3374. else if (wpss_rproc == 0)
  3375. icnss_wpss_unload(priv);
  3376. return count;
  3377. }
  3378. static ssize_t wlan_en_delay_store(struct device *dev,
  3379. struct device_attribute *attr,
  3380. const char *buf, size_t count)
  3381. {
  3382. struct icnss_priv *priv = dev_get_drvdata(dev);
  3383. uint32_t wlan_en_delay = 0;
  3384. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3385. return count;
  3386. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3387. icnss_pr_err("Failed to read wlan_en_delay");
  3388. return -EINVAL;
  3389. }
  3390. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3391. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3392. return count;
  3393. }
  3394. static DEVICE_ATTR_WO(qdss_tr_start);
  3395. static DEVICE_ATTR_WO(qdss_tr_stop);
  3396. static DEVICE_ATTR_WO(qdss_conf_download);
  3397. static DEVICE_ATTR_WO(hw_trc_override);
  3398. static DEVICE_ATTR_WO(wpss_boot);
  3399. static DEVICE_ATTR_WO(wlan_en_delay);
  3400. static struct attribute *icnss_attrs[] = {
  3401. &dev_attr_qdss_tr_start.attr,
  3402. &dev_attr_qdss_tr_stop.attr,
  3403. &dev_attr_qdss_conf_download.attr,
  3404. &dev_attr_hw_trc_override.attr,
  3405. &dev_attr_wpss_boot.attr,
  3406. &dev_attr_wlan_en_delay.attr,
  3407. NULL,
  3408. };
  3409. static struct attribute_group icnss_attr_group = {
  3410. .attrs = icnss_attrs,
  3411. };
  3412. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3413. {
  3414. struct device *dev = &priv->pdev->dev;
  3415. int ret;
  3416. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3417. if (ret) {
  3418. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3419. ret);
  3420. goto out;
  3421. }
  3422. return 0;
  3423. out:
  3424. return ret;
  3425. }
  3426. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3427. {
  3428. sysfs_remove_link(kernel_kobj, "icnss");
  3429. }
  3430. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 2, 0))
  3431. union icnss_device_group_devres {
  3432. const struct attribute_group *group;
  3433. };
  3434. static void devm_icnss_group_remove(struct device *dev, void *res)
  3435. {
  3436. union icnss_device_group_devres *devres = res;
  3437. const struct attribute_group *group = devres->group;
  3438. icnss_pr_dbg("%s: removing group %p\n", __func__, group);
  3439. sysfs_remove_group(&dev->kobj, group);
  3440. }
  3441. static int devm_icnss_group_match(struct device *dev, void *res, void *data)
  3442. {
  3443. return ((union icnss_device_group_devres *)res) == data;
  3444. }
  3445. static void icnss_devm_device_remove_group(struct icnss_priv *priv)
  3446. {
  3447. WARN_ON(devres_release(&priv->pdev->dev,
  3448. devm_icnss_group_remove, devm_icnss_group_match,
  3449. (void *)&icnss_attr_group));
  3450. }
  3451. #else
  3452. static void icnss_devm_device_remove_group(struct icnss_priv *priv)
  3453. {
  3454. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3455. }
  3456. #endif
  3457. static int icnss_sysfs_create(struct icnss_priv *priv)
  3458. {
  3459. int ret = 0;
  3460. ret = devm_device_add_group(&priv->pdev->dev,
  3461. &icnss_attr_group);
  3462. if (ret) {
  3463. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3464. ret);
  3465. goto out;
  3466. }
  3467. icnss_create_sysfs_link(priv);
  3468. ret = icnss_create_shutdown_sysfs(priv);
  3469. if (ret)
  3470. goto remove_icnss_group;
  3471. return 0;
  3472. remove_icnss_group:
  3473. icnss_devm_device_remove_group(priv);
  3474. out:
  3475. return ret;
  3476. }
  3477. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3478. {
  3479. icnss_destroy_shutdown_sysfs(priv);
  3480. icnss_remove_sysfs_link(priv);
  3481. icnss_devm_device_remove_group(priv);
  3482. }
  3483. static int icnss_resource_parse(struct icnss_priv *priv)
  3484. {
  3485. int ret = 0, i = 0, irq = 0;
  3486. struct platform_device *pdev = priv->pdev;
  3487. struct device *dev = &pdev->dev;
  3488. struct resource *res;
  3489. u32 int_prop;
  3490. ret = icnss_get_vreg(priv);
  3491. if (ret) {
  3492. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3493. goto out;
  3494. }
  3495. ret = icnss_get_clk(priv);
  3496. if (ret) {
  3497. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3498. goto put_vreg;
  3499. }
  3500. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3501. ret = icnss_get_psf_info(priv);
  3502. if (ret < 0)
  3503. goto out;
  3504. priv->psf_supported = true;
  3505. }
  3506. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3507. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3508. "membase");
  3509. if (!res) {
  3510. icnss_pr_err("Memory base not found in DT\n");
  3511. ret = -EINVAL;
  3512. goto put_clk;
  3513. }
  3514. priv->mem_base_pa = res->start;
  3515. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3516. resource_size(res));
  3517. if (!priv->mem_base_va) {
  3518. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3519. &priv->mem_base_pa);
  3520. ret = -EINVAL;
  3521. goto put_clk;
  3522. }
  3523. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3524. &priv->mem_base_pa,
  3525. priv->mem_base_va);
  3526. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3527. irq = platform_get_irq(pdev, i);
  3528. if (irq < 0) {
  3529. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3530. ret = -ENODEV;
  3531. goto put_clk;
  3532. } else {
  3533. priv->ce_irqs[i] = irq;
  3534. }
  3535. }
  3536. if (of_property_read_bool(pdev->dev.of_node,
  3537. "qcom,is_low_power")) {
  3538. priv->low_power_support = true;
  3539. icnss_pr_dbg("Deep Sleep/Hibernate mode supported\n");
  3540. }
  3541. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3542. &priv->rf_subtype) == 0) {
  3543. priv->is_rf_subtype_valid = true;
  3544. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3545. }
  3546. if (of_property_read_bool(pdev->dev.of_node,
  3547. "qcom,is_slate_rfa")) {
  3548. priv->is_slate_rfa = true;
  3549. icnss_pr_err("SLATE rfa is enabled\n");
  3550. }
  3551. } else if (priv->device_id == WCN6750_DEVICE_ID ||
  3552. priv->device_id == WCN6450_DEVICE_ID) {
  3553. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3554. "msi_addr");
  3555. if (!res) {
  3556. icnss_pr_err("MSI address not found in DT\n");
  3557. ret = -EINVAL;
  3558. goto put_clk;
  3559. }
  3560. priv->msi_addr_pa = res->start;
  3561. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3562. PAGE_SIZE,
  3563. DMA_FROM_DEVICE, 0);
  3564. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3565. icnss_pr_err("MSI: failed to map msi address\n");
  3566. priv->msi_addr_iova = 0;
  3567. ret = -ENOMEM;
  3568. goto put_clk;
  3569. }
  3570. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3571. &priv->msi_addr_pa,
  3572. priv->msi_addr_iova);
  3573. ret = of_property_read_u32_index(dev->of_node,
  3574. "interrupts",
  3575. 1,
  3576. &int_prop);
  3577. if (ret) {
  3578. icnss_pr_dbg("Read interrupt prop failed");
  3579. goto put_clk;
  3580. }
  3581. priv->msi_base_data = int_prop + 32;
  3582. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3583. priv->msi_base_data, int_prop);
  3584. icnss_get_msi_assignment(priv);
  3585. for (i = 0; i < priv->msi_config->total_vectors; i++) {
  3586. irq = platform_get_irq(priv->pdev, i);
  3587. if (irq < 0) {
  3588. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3589. ret = -ENODEV;
  3590. goto put_clk;
  3591. } else {
  3592. priv->srng_irqs[i] = irq;
  3593. }
  3594. }
  3595. }
  3596. return 0;
  3597. put_clk:
  3598. icnss_put_clk(priv);
  3599. put_vreg:
  3600. icnss_put_vreg(priv);
  3601. out:
  3602. return ret;
  3603. }
  3604. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3605. {
  3606. int ret = 0;
  3607. struct platform_device *pdev = priv->pdev;
  3608. struct device *dev = &pdev->dev;
  3609. struct device_node *np = NULL;
  3610. u64 prop_size = 0;
  3611. const __be32 *addrp = NULL;
  3612. np = of_parse_phandle(dev->of_node,
  3613. "qcom,wlan-msa-fixed-region", 0);
  3614. if (np) {
  3615. addrp = of_get_address(np, 0, &prop_size, NULL);
  3616. if (!addrp) {
  3617. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3618. ret = -EINVAL;
  3619. of_node_put(np);
  3620. goto out;
  3621. }
  3622. priv->msa_pa = of_translate_address(np, addrp);
  3623. if (priv->msa_pa == OF_BAD_ADDR) {
  3624. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3625. ret = -EINVAL;
  3626. of_node_put(np);
  3627. goto out;
  3628. }
  3629. of_node_put(np);
  3630. priv->msa_va = memremap(priv->msa_pa,
  3631. (unsigned long)prop_size, MEMREMAP_WT);
  3632. if (!priv->msa_va) {
  3633. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3634. &priv->msa_pa);
  3635. ret = -EINVAL;
  3636. goto out;
  3637. }
  3638. priv->msa_mem_size = prop_size;
  3639. } else {
  3640. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3641. &priv->msa_mem_size);
  3642. if (ret || priv->msa_mem_size == 0) {
  3643. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3644. priv->msa_mem_size, ret);
  3645. goto out;
  3646. }
  3647. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3648. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3649. if (!priv->msa_va) {
  3650. icnss_pr_err("DMA alloc failed for MSA\n");
  3651. ret = -ENOMEM;
  3652. goto out;
  3653. }
  3654. }
  3655. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3656. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3657. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3658. "qcom,fw-prefix");
  3659. return 0;
  3660. out:
  3661. return ret;
  3662. }
  3663. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3664. struct device *dev, unsigned long iova,
  3665. int flags, void *handler_token)
  3666. {
  3667. struct icnss_priv *priv = handler_token;
  3668. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3669. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3670. if (!priv) {
  3671. icnss_pr_err("priv is NULL\n");
  3672. return -ENODEV;
  3673. }
  3674. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3675. fw_down_data.crashed = true;
  3676. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3677. &fw_down_data);
  3678. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3679. &fw_down_data);
  3680. }
  3681. icnss_trigger_recovery(&priv->pdev->dev);
  3682. /* IOMMU driver requires -ENOSYS return value to print debug info. */
  3683. return -ENOSYS;
  3684. }
  3685. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3686. {
  3687. int ret = 0;
  3688. struct platform_device *pdev = priv->pdev;
  3689. struct device *dev = &pdev->dev;
  3690. const char *iommu_dma_type;
  3691. struct resource *res;
  3692. u32 addr_win[2];
  3693. ret = of_property_read_u32_array(dev->of_node,
  3694. "qcom,iommu-dma-addr-pool",
  3695. addr_win,
  3696. ARRAY_SIZE(addr_win));
  3697. if (ret) {
  3698. icnss_pr_err("SMMU IOVA base not found\n");
  3699. } else {
  3700. priv->smmu_iova_start = addr_win[0];
  3701. priv->smmu_iova_len = addr_win[1];
  3702. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3703. &priv->smmu_iova_start,
  3704. priv->smmu_iova_len);
  3705. priv->iommu_domain =
  3706. iommu_get_domain_for_dev(&pdev->dev);
  3707. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3708. &iommu_dma_type);
  3709. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3710. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3711. priv->smmu_s1_enable = true;
  3712. if (priv->device_id == WCN6750_DEVICE_ID ||
  3713. priv->device_id == WCN6450_DEVICE_ID)
  3714. iommu_set_fault_handler(priv->iommu_domain,
  3715. icnss_smmu_fault_handler,
  3716. priv);
  3717. }
  3718. res = platform_get_resource_byname(pdev,
  3719. IORESOURCE_MEM,
  3720. "smmu_iova_ipa");
  3721. if (!res) {
  3722. icnss_pr_err("SMMU IOVA IPA not found\n");
  3723. } else {
  3724. priv->smmu_iova_ipa_start = res->start;
  3725. priv->smmu_iova_ipa_current = res->start;
  3726. priv->smmu_iova_ipa_len = resource_size(res);
  3727. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3728. &priv->smmu_iova_ipa_start,
  3729. priv->smmu_iova_ipa_len);
  3730. }
  3731. }
  3732. return 0;
  3733. }
  3734. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3735. {
  3736. if (!priv)
  3737. return -ENODEV;
  3738. if (!priv->smmu_iova_len)
  3739. return -EINVAL;
  3740. *addr = priv->smmu_iova_start;
  3741. *size = priv->smmu_iova_len;
  3742. return 0;
  3743. }
  3744. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3745. {
  3746. if (!priv)
  3747. return -ENODEV;
  3748. if (!priv->smmu_iova_ipa_len)
  3749. return -EINVAL;
  3750. *addr = priv->smmu_iova_ipa_start;
  3751. *size = priv->smmu_iova_ipa_len;
  3752. return 0;
  3753. }
  3754. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3755. char *name)
  3756. {
  3757. if (!priv)
  3758. return;
  3759. if (!priv->use_prefix_path) {
  3760. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3761. return;
  3762. }
  3763. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3764. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3765. ADRASTEA_PATH_PREFIX "%s", name);
  3766. else if (priv->device_id == WCN6750_DEVICE_ID)
  3767. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3768. QCA6750_PATH_PREFIX "%s", name);
  3769. else if (priv->device_id == WCN6450_DEVICE_ID)
  3770. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3771. WCN6450_PATH_PREFIX "%s", name);
  3772. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3773. }
  3774. static const struct platform_device_id icnss_platform_id_table[] = {
  3775. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3776. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3777. { .name = "wcn6450", .driver_data = WCN6450_DEVICE_ID, },
  3778. { },
  3779. };
  3780. static const struct of_device_id icnss_dt_match[] = {
  3781. {
  3782. .compatible = "qcom,wcn6750",
  3783. .data = (void *)&icnss_platform_id_table[0]},
  3784. {
  3785. .compatible = "qcom,icnss",
  3786. .data = (void *)&icnss_platform_id_table[1]},
  3787. {
  3788. .compatible = "qcom,wcn6450",
  3789. .data = (void *)&icnss_platform_id_table[2]},
  3790. { },
  3791. };
  3792. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3793. static void icnss_init_control_params(struct icnss_priv *priv)
  3794. {
  3795. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3796. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3797. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3798. if (priv->device_id == WCN6750_DEVICE_ID ||
  3799. priv->device_id == WCN6450_DEVICE_ID ||
  3800. of_property_read_bool(priv->pdev->dev.of_node,
  3801. "wpss-support-enable"))
  3802. priv->wpss_supported = true;
  3803. if (of_property_read_bool(priv->pdev->dev.of_node,
  3804. "bdf-download-support"))
  3805. priv->bdf_download_support = true;
  3806. if (of_property_read_bool(priv->pdev->dev.of_node,
  3807. "rproc-fw-download"))
  3808. priv->rproc_fw_download = true;
  3809. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3810. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3811. }
  3812. static void icnss_read_device_configs(struct icnss_priv *priv)
  3813. {
  3814. if (of_property_read_bool(priv->pdev->dev.of_node,
  3815. "wlan-ipa-disabled")) {
  3816. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3817. }
  3818. if (of_property_read_bool(priv->pdev->dev.of_node,
  3819. "qcom,wpss-self-recovery"))
  3820. priv->wpss_self_recovery_enabled = true;
  3821. }
  3822. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3823. {
  3824. pm_runtime_get_sync(&priv->pdev->dev);
  3825. pm_runtime_forbid(&priv->pdev->dev);
  3826. pm_runtime_set_active(&priv->pdev->dev);
  3827. pm_runtime_enable(&priv->pdev->dev);
  3828. }
  3829. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3830. {
  3831. pm_runtime_disable(&priv->pdev->dev);
  3832. pm_runtime_allow(&priv->pdev->dev);
  3833. pm_runtime_put_sync(&priv->pdev->dev);
  3834. }
  3835. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3836. {
  3837. return of_property_read_bool(priv->pdev->dev.of_node,
  3838. "use-nv-mac");
  3839. }
  3840. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3841. {
  3842. struct icnss_subsys_restart_level_data *restart_level_data;
  3843. icnss_pr_info("rproc name: %s(%zu) recovery disable: %d",
  3844. rproc->name, strlen(rproc->name),
  3845. rproc->recovery_disabled);
  3846. if (strnstr(rproc->name, "wpss", strlen(rproc->name))) {
  3847. restart_level_data = kzalloc(sizeof(*restart_level_data),
  3848. GFP_ATOMIC);
  3849. if (!restart_level_data)
  3850. return;
  3851. if (rproc->recovery_disabled)
  3852. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3853. else
  3854. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3855. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3856. 0, restart_level_data);
  3857. }
  3858. }
  3859. #if IS_ENABLED(CONFIG_WCNSS_MEM_PRE_ALLOC)
  3860. static void icnss_initialize_mem_pool(unsigned long device_id)
  3861. {
  3862. cnss_initialize_prealloc_pool(device_id);
  3863. }
  3864. static void icnss_deinitialize_mem_pool(void)
  3865. {
  3866. cnss_deinitialize_prealloc_pool();
  3867. }
  3868. #else
  3869. static void icnss_initialize_mem_pool(unsigned long device_id)
  3870. {
  3871. }
  3872. static void icnss_deinitialize_mem_pool(void)
  3873. {
  3874. }
  3875. #endif
  3876. static void register_rproc_restart_level_notifier(void)
  3877. {
  3878. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3879. }
  3880. static void unregister_rproc_restart_level_notifier(void)
  3881. {
  3882. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3883. }
  3884. static int icnss_probe(struct platform_device *pdev)
  3885. {
  3886. int ret = 0;
  3887. struct device *dev = &pdev->dev;
  3888. struct icnss_priv *priv;
  3889. const struct of_device_id *of_id;
  3890. const struct platform_device_id *device_id;
  3891. if (dev_get_drvdata(dev)) {
  3892. icnss_pr_err("Driver is already initialized\n");
  3893. return -EEXIST;
  3894. }
  3895. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3896. if (!of_id || !of_id->data) {
  3897. icnss_pr_err("Failed to find of match device!\n");
  3898. ret = -ENODEV;
  3899. goto out_reset_drvdata;
  3900. }
  3901. device_id = of_id->data;
  3902. icnss_pr_dbg("Platform driver probe\n");
  3903. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3904. if (!priv)
  3905. return -ENOMEM;
  3906. priv->magic = ICNSS_MAGIC;
  3907. dev_set_drvdata(dev, priv);
  3908. priv->pdev = pdev;
  3909. priv->device_id = device_id->driver_data;
  3910. priv->is_chain1_supported = true;
  3911. INIT_LIST_HEAD(&priv->vreg_list);
  3912. INIT_LIST_HEAD(&priv->clk_list);
  3913. icnss_allow_recursive_recovery(dev);
  3914. icnss_initialize_mem_pool(priv->device_id);
  3915. icnss_init_control_params(priv);
  3916. icnss_read_device_configs(priv);
  3917. ret = icnss_resource_parse(priv);
  3918. if (ret)
  3919. goto out_reset_drvdata;
  3920. ret = icnss_msa_dt_parse(priv);
  3921. if (ret)
  3922. goto out_free_resources;
  3923. ret = icnss_smmu_dt_parse(priv);
  3924. if (ret)
  3925. goto out_free_resources;
  3926. spin_lock_init(&priv->event_lock);
  3927. spin_lock_init(&priv->on_off_lock);
  3928. spin_lock_init(&priv->soc_wake_msg_lock);
  3929. mutex_init(&priv->dev_lock);
  3930. mutex_init(&priv->tcdev_lock);
  3931. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3932. if (!priv->event_wq) {
  3933. icnss_pr_err("Workqueue creation failed\n");
  3934. ret = -EFAULT;
  3935. goto smmu_cleanup;
  3936. }
  3937. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3938. INIT_LIST_HEAD(&priv->event_list);
  3939. if (priv->is_slate_rfa)
  3940. init_completion(&priv->slate_boot_complete);
  3941. ret = icnss_register_fw_service(priv);
  3942. if (ret < 0) {
  3943. icnss_pr_err("fw service registration failed: %d\n", ret);
  3944. goto out_destroy_wq;
  3945. }
  3946. icnss_power_misc_params_init(priv);
  3947. icnss_enable_recovery(priv);
  3948. icnss_debugfs_create(priv);
  3949. icnss_sysfs_create(priv);
  3950. ret = device_init_wakeup(&priv->pdev->dev, true);
  3951. if (ret)
  3952. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3953. ret);
  3954. icnss_set_plat_priv(priv);
  3955. init_completion(&priv->unblock_shutdown);
  3956. if (priv->device_id == WCN6750_DEVICE_ID ||
  3957. priv->device_id == WCN6450_DEVICE_ID) {
  3958. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3959. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3960. if (!priv->soc_wake_wq) {
  3961. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3962. ret = -EFAULT;
  3963. goto out_unregister_fw_service;
  3964. }
  3965. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3966. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3967. ret = icnss_genl_init();
  3968. if (ret < 0)
  3969. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3970. init_completion(&priv->smp2p_soc_wake_wait);
  3971. icnss_runtime_pm_init(priv);
  3972. icnss_aop_interface_init(priv);
  3973. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3974. priv->bdf_download_support = true;
  3975. register_rproc_restart_level_notifier();
  3976. }
  3977. if (priv->wpss_supported) {
  3978. ret = icnss_dms_init(priv);
  3979. if (ret)
  3980. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3981. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3982. icnss_pr_dbg("NV MAC feature is %s\n",
  3983. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3984. }
  3985. if (priv->wpss_supported || priv->rproc_fw_download)
  3986. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3987. timer_setup(&priv->recovery_timer,
  3988. icnss_recovery_timeout_hdlr, 0);
  3989. if (priv->wpss_self_recovery_enabled) {
  3990. INIT_WORK(&wpss_ssr_work, icnss_wpss_self_recovery);
  3991. timer_setup(&priv->wpss_ssr_timer,
  3992. icnss_wpss_ssr_timeout_hdlr, 0);
  3993. }
  3994. icnss_register_ims_service(priv);
  3995. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3996. icnss_pr_info("Platform driver probed successfully\n");
  3997. return 0;
  3998. out_unregister_fw_service:
  3999. icnss_unregister_fw_service(priv);
  4000. out_destroy_wq:
  4001. destroy_workqueue(priv->event_wq);
  4002. smmu_cleanup:
  4003. priv->iommu_domain = NULL;
  4004. out_free_resources:
  4005. icnss_put_resources(priv);
  4006. out_reset_drvdata:
  4007. icnss_deinitialize_mem_pool();
  4008. dev_set_drvdata(dev, NULL);
  4009. return ret;
  4010. }
  4011. static void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  4012. {
  4013. if (IS_ERR_OR_NULL(ramdump_info))
  4014. return;
  4015. device_unregister(ramdump_info->dev);
  4016. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  4017. kfree(ramdump_info);
  4018. }
  4019. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  4020. {
  4021. if (priv->batt_psy)
  4022. power_supply_put(penv->batt_psy);
  4023. if (priv->psf_supported) {
  4024. flush_workqueue(priv->soc_update_wq);
  4025. destroy_workqueue(priv->soc_update_wq);
  4026. power_supply_unreg_notifier(&priv->psf_nb);
  4027. }
  4028. }
  4029. static int icnss_remove(struct platform_device *pdev)
  4030. {
  4031. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  4032. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  4033. del_timer(&priv->recovery_timer);
  4034. if (priv->wpss_self_recovery_enabled)
  4035. del_timer(&priv->wpss_ssr_timer);
  4036. device_init_wakeup(&priv->pdev->dev, false);
  4037. icnss_unregister_ims_service(priv);
  4038. icnss_debugfs_destroy(priv);
  4039. icnss_unregister_power_supply_notifier(penv);
  4040. icnss_sysfs_destroy(priv);
  4041. complete_all(&priv->unblock_shutdown);
  4042. if (priv->is_slate_rfa) {
  4043. complete(&priv->slate_boot_complete);
  4044. icnss_slate_ssr_unregister_notifier(priv);
  4045. icnss_unregister_slate_event_notifier(priv);
  4046. }
  4047. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  4048. if (priv->wpss_supported) {
  4049. icnss_dms_deinit(priv);
  4050. icnss_wpss_early_ssr_unregister_notifier(priv);
  4051. icnss_wpss_ssr_unregister_notifier(priv);
  4052. } else {
  4053. icnss_modem_ssr_unregister_notifier(priv);
  4054. icnss_pdr_unregister_notifier(priv);
  4055. }
  4056. if (priv->device_id == WCN6750_DEVICE_ID ||
  4057. priv->device_id == WCN6450_DEVICE_ID) {
  4058. icnss_genl_exit();
  4059. icnss_runtime_pm_deinit(priv);
  4060. unregister_rproc_restart_level_notifier();
  4061. complete_all(&priv->smp2p_soc_wake_wait);
  4062. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  4063. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  4064. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  4065. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  4066. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  4067. if (priv->soc_wake_wq)
  4068. destroy_workqueue(priv->soc_wake_wq);
  4069. icnss_aop_interface_deinit(priv);
  4070. }
  4071. class_destroy(priv->icnss_ramdump_class);
  4072. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  4073. icnss_unregister_fw_service(priv);
  4074. if (priv->event_wq)
  4075. destroy_workqueue(priv->event_wq);
  4076. priv->iommu_domain = NULL;
  4077. icnss_hw_power_off(priv);
  4078. icnss_put_resources(priv);
  4079. icnss_deinitialize_mem_pool();
  4080. dev_set_drvdata(&pdev->dev, NULL);
  4081. return 0;
  4082. }
  4083. void icnss_recovery_timeout_hdlr(struct timer_list *t)
  4084. {
  4085. struct icnss_priv *priv = from_timer(priv, t, recovery_timer);
  4086. /* This is to handle if slate is not up and modem SSR is triggered */
  4087. if (priv->is_slate_rfa && !test_bit(ICNSS_SLATE_UP, &priv->state))
  4088. return;
  4089. icnss_pr_err("Timeout waiting for FW Ready 0x%lx\n", priv->state);
  4090. ICNSS_ASSERT(0);
  4091. }
  4092. void icnss_wpss_ssr_timeout_hdlr(struct timer_list *t)
  4093. {
  4094. struct icnss_priv *priv = from_timer(priv, t, wpss_ssr_timer);
  4095. icnss_pr_err("Timeout waiting for WPSS SSR notification 0x%lx\n",
  4096. priv->state);
  4097. schedule_work(&wpss_ssr_work);
  4098. }
  4099. #ifdef CONFIG_PM_SLEEP
  4100. static int icnss_pm_suspend(struct device *dev)
  4101. {
  4102. struct icnss_priv *priv = dev_get_drvdata(dev);
  4103. int ret = 0;
  4104. if (priv->magic != ICNSS_MAGIC) {
  4105. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  4106. dev, priv, priv->magic);
  4107. return -EINVAL;
  4108. }
  4109. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  4110. if (!priv->ops || !priv->ops->pm_suspend ||
  4111. icnss_is_smp2p_valid(priv, ICNSS_SMP2P_OUT_POWER_SAVE) ||
  4112. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4113. return 0;
  4114. ret = priv->ops->pm_suspend(dev);
  4115. if (ret == 0) {
  4116. if (priv->device_id == WCN6750_DEVICE_ID ||
  4117. priv->device_id == WCN6450_DEVICE_ID) {
  4118. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4119. !test_bit(ICNSS_MODE_ON, &priv->state))
  4120. return 0;
  4121. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4122. ICNSS_SMP2P_OUT_POWER_SAVE);
  4123. }
  4124. priv->stats.pm_suspend++;
  4125. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  4126. } else {
  4127. priv->stats.pm_suspend_err++;
  4128. }
  4129. return ret;
  4130. }
  4131. static int icnss_pm_resume(struct device *dev)
  4132. {
  4133. struct icnss_priv *priv = dev_get_drvdata(dev);
  4134. int ret = 0;
  4135. if (priv->magic != ICNSS_MAGIC) {
  4136. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  4137. dev, priv, priv->magic);
  4138. return -EINVAL;
  4139. }
  4140. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  4141. if (!priv->ops || !priv->ops->pm_resume ||
  4142. icnss_is_smp2p_valid(priv, ICNSS_SMP2P_OUT_POWER_SAVE) ||
  4143. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4144. goto out;
  4145. ret = priv->ops->pm_resume(dev);
  4146. out:
  4147. if (ret == 0) {
  4148. priv->stats.pm_resume++;
  4149. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  4150. } else {
  4151. priv->stats.pm_resume_err++;
  4152. }
  4153. return ret;
  4154. }
  4155. static int icnss_pm_suspend_noirq(struct device *dev)
  4156. {
  4157. struct icnss_priv *priv = dev_get_drvdata(dev);
  4158. int ret = 0;
  4159. if (priv->magic != ICNSS_MAGIC) {
  4160. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  4161. dev, priv, priv->magic);
  4162. return -EINVAL;
  4163. }
  4164. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  4165. if (!priv->ops || !priv->ops->suspend_noirq ||
  4166. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4167. goto out;
  4168. ret = priv->ops->suspend_noirq(dev);
  4169. out:
  4170. if (ret == 0) {
  4171. priv->stats.pm_suspend_noirq++;
  4172. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4173. } else {
  4174. priv->stats.pm_suspend_noirq_err++;
  4175. }
  4176. return ret;
  4177. }
  4178. static int icnss_pm_resume_noirq(struct device *dev)
  4179. {
  4180. struct icnss_priv *priv = dev_get_drvdata(dev);
  4181. int ret = 0;
  4182. if (priv->magic != ICNSS_MAGIC) {
  4183. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  4184. dev, priv, priv->magic);
  4185. return -EINVAL;
  4186. }
  4187. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  4188. if (!priv->ops || !priv->ops->resume_noirq ||
  4189. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4190. goto out;
  4191. ret = priv->ops->resume_noirq(dev);
  4192. out:
  4193. if (ret == 0) {
  4194. priv->stats.pm_resume_noirq++;
  4195. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4196. } else {
  4197. priv->stats.pm_resume_noirq_err++;
  4198. }
  4199. return ret;
  4200. }
  4201. static int icnss_pm_runtime_suspend(struct device *dev)
  4202. {
  4203. struct icnss_priv *priv = dev_get_drvdata(dev);
  4204. int ret = 0;
  4205. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4206. icnss_pr_err("Ignore runtime suspend:\n");
  4207. goto out;
  4208. }
  4209. if (priv->magic != ICNSS_MAGIC) {
  4210. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  4211. dev, priv, priv->magic);
  4212. return -EINVAL;
  4213. }
  4214. if (!priv->ops || !priv->ops->runtime_suspend ||
  4215. icnss_is_smp2p_valid(priv, ICNSS_SMP2P_OUT_POWER_SAVE))
  4216. goto out;
  4217. icnss_pr_vdbg("Runtime suspend\n");
  4218. ret = priv->ops->runtime_suspend(dev);
  4219. if (!ret) {
  4220. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4221. !test_bit(ICNSS_MODE_ON, &priv->state))
  4222. return 0;
  4223. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4224. ICNSS_SMP2P_OUT_POWER_SAVE);
  4225. }
  4226. out:
  4227. return ret;
  4228. }
  4229. static int icnss_pm_runtime_resume(struct device *dev)
  4230. {
  4231. struct icnss_priv *priv = dev_get_drvdata(dev);
  4232. int ret = 0;
  4233. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4234. icnss_pr_err("Ignore runtime resume\n");
  4235. goto out;
  4236. }
  4237. if (priv->magic != ICNSS_MAGIC) {
  4238. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  4239. dev, priv, priv->magic);
  4240. return -EINVAL;
  4241. }
  4242. if (!priv->ops || !priv->ops->runtime_resume ||
  4243. icnss_is_smp2p_valid(priv, ICNSS_SMP2P_OUT_POWER_SAVE))
  4244. goto out;
  4245. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  4246. ret = priv->ops->runtime_resume(dev);
  4247. out:
  4248. return ret;
  4249. }
  4250. static int icnss_pm_runtime_idle(struct device *dev)
  4251. {
  4252. struct icnss_priv *priv = dev_get_drvdata(dev);
  4253. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4254. icnss_pr_err("Ignore runtime idle\n");
  4255. goto out;
  4256. }
  4257. icnss_pr_vdbg("Runtime idle\n");
  4258. pm_request_autosuspend(dev);
  4259. out:
  4260. return -EBUSY;
  4261. }
  4262. #endif
  4263. static const struct dev_pm_ops icnss_pm_ops = {
  4264. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  4265. icnss_pm_resume)
  4266. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  4267. icnss_pm_resume_noirq)
  4268. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  4269. icnss_pm_runtime_idle)
  4270. };
  4271. static struct platform_driver icnss_driver = {
  4272. .probe = icnss_probe,
  4273. .remove = icnss_remove,
  4274. .driver = {
  4275. .name = "icnss2",
  4276. .pm = &icnss_pm_ops,
  4277. .of_match_table = icnss_dt_match,
  4278. },
  4279. };
  4280. /**
  4281. * icnss_has_valid_dt_node() - Check if valid device tree node present
  4282. *
  4283. * Valid device tree node means a node with "compatible" property from the
  4284. * device match table and "status" property is not disabled.
  4285. *
  4286. * Return: true if valid device tree node found, false if not found
  4287. */
  4288. static bool icnss_has_valid_dt_node(void)
  4289. {
  4290. struct device_node *dn = NULL;
  4291. for_each_matching_node(dn, icnss_dt_match) {
  4292. if (of_device_is_available(dn))
  4293. return true;
  4294. }
  4295. icnss_pr_info("No valid icnss2 dtsi entry\n");
  4296. return false;
  4297. }
  4298. static int __init icnss_initialize(void)
  4299. {
  4300. if (!icnss_has_valid_dt_node())
  4301. return -ENODEV;
  4302. icnss_debug_init();
  4303. return platform_driver_register(&icnss_driver);
  4304. }
  4305. static void __exit icnss_exit(void)
  4306. {
  4307. platform_driver_unregister(&icnss_driver);
  4308. icnss_debug_deinit();
  4309. }
  4310. module_init(icnss_initialize);
  4311. module_exit(icnss_exit);
  4312. MODULE_LICENSE("GPL v2");
  4313. MODULE_DESCRIPTION("iWCN CORE platform driver");