dp_be_rx.c 43 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "cdp_txrx_cmn_struct.h"
  20. #include "hal_hw_headers.h"
  21. #include "dp_types.h"
  22. #include "dp_rx.h"
  23. #include "dp_tx.h"
  24. #include "dp_be_rx.h"
  25. #include "dp_peer.h"
  26. #include "hal_rx.h"
  27. #include "hal_be_rx.h"
  28. #include "hal_api.h"
  29. #include "hal_be_api.h"
  30. #include "qdf_nbuf.h"
  31. #include "hal_be_rx_tlv.h"
  32. #ifdef MESH_MODE_SUPPORT
  33. #include "if_meta_hdr.h"
  34. #endif
  35. #include "dp_internal.h"
  36. #include "dp_ipa.h"
  37. #ifdef FEATURE_WDS
  38. #include "dp_txrx_wds.h"
  39. #endif
  40. #include "dp_hist.h"
  41. #include "dp_rx_buffer_pool.h"
  42. #ifndef AST_OFFLOAD_ENABLE
  43. static void
  44. dp_rx_wds_learn(struct dp_soc *soc,
  45. struct dp_vdev *vdev,
  46. uint8_t *rx_tlv_hdr,
  47. struct dp_txrx_peer *txrx_peer,
  48. qdf_nbuf_t nbuf,
  49. struct hal_rx_msdu_metadata msdu_metadata)
  50. {
  51. /* WDS Source Port Learning */
  52. if (qdf_likely(vdev->wds_enabled))
  53. dp_rx_wds_srcport_learn(soc,
  54. rx_tlv_hdr,
  55. txrx_peer,
  56. nbuf,
  57. msdu_metadata);
  58. }
  59. #else
  60. #ifdef QCA_SUPPORT_WDS_EXTENDED
  61. /**
  62. * dp_wds_ext_peer_learn_be() - function to send event to control
  63. * path on receiving 1st 4-address frame from backhaul.
  64. * @soc: DP soc
  65. * @ta_txrx_peer: WDS repeater txrx peer
  66. * @rx_tlv_hdr : start address of rx tlvs
  67. * @nbuf: RX packet buffer
  68. *
  69. * Return: void
  70. */
  71. static inline void dp_wds_ext_peer_learn_be(struct dp_soc *soc,
  72. struct dp_txrx_peer *ta_txrx_peer,
  73. uint8_t *rx_tlv_hdr,
  74. qdf_nbuf_t nbuf)
  75. {
  76. uint8_t wds_ext_src_mac[QDF_MAC_ADDR_SIZE];
  77. struct dp_peer *ta_base_peer;
  78. /* instead of checking addr4 is valid or not in per packet path
  79. * check for init bit, which will be set on reception of
  80. * first addr4 valid packet.
  81. */
  82. if (!ta_txrx_peer->vdev->wds_ext_enabled ||
  83. qdf_atomic_test_bit(WDS_EXT_PEER_INIT_BIT,
  84. &ta_txrx_peer->wds_ext.init))
  85. return;
  86. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  87. hal_rx_get_mpdu_mac_ad4_valid_be(rx_tlv_hdr)) {
  88. qdf_atomic_test_and_set_bit(WDS_EXT_PEER_INIT_BIT,
  89. &ta_txrx_peer->wds_ext.init);
  90. ta_base_peer = dp_peer_get_ref_by_id(soc, ta_txrx_peer->peer_id,
  91. DP_MOD_ID_RX);
  92. if (!ta_base_peer)
  93. return;
  94. qdf_mem_copy(wds_ext_src_mac, &ta_base_peer->mac_addr.raw[0],
  95. QDF_MAC_ADDR_SIZE);
  96. dp_peer_unref_delete(ta_base_peer, DP_MOD_ID_RX);
  97. soc->cdp_soc.ol_ops->rx_wds_ext_peer_learn(
  98. soc->ctrl_psoc,
  99. ta_txrx_peer->peer_id,
  100. ta_txrx_peer->vdev->vdev_id,
  101. wds_ext_src_mac);
  102. }
  103. }
  104. #else
  105. static inline void dp_wds_ext_peer_learn_be(struct dp_soc *soc,
  106. struct dp_txrx_peer *ta_txrx_peer,
  107. uint8_t *rx_tlv_hdr,
  108. qdf_nbuf_t nbuf)
  109. {
  110. }
  111. #endif
  112. static void
  113. dp_rx_wds_learn(struct dp_soc *soc,
  114. struct dp_vdev *vdev,
  115. uint8_t *rx_tlv_hdr,
  116. struct dp_txrx_peer *ta_txrx_peer,
  117. qdf_nbuf_t nbuf,
  118. struct hal_rx_msdu_metadata msdu_metadata)
  119. {
  120. dp_wds_ext_peer_learn_be(soc, ta_txrx_peer, rx_tlv_hdr, nbuf);
  121. }
  122. #endif
  123. /**
  124. * dp_rx_process_be() - Brain of the Rx processing functionality
  125. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  126. * @int_ctx: per interrupt context
  127. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  128. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  129. * @quota: No. of units (packets) that can be serviced in one shot.
  130. *
  131. * This function implements the core of Rx functionality. This is
  132. * expected to handle only non-error frames.
  133. *
  134. * Return: uint32_t: No. of elements processed
  135. */
  136. uint32_t dp_rx_process_be(struct dp_intr *int_ctx,
  137. hal_ring_handle_t hal_ring_hdl, uint8_t reo_ring_num,
  138. uint32_t quota)
  139. {
  140. hal_ring_desc_t ring_desc;
  141. hal_soc_handle_t hal_soc;
  142. struct dp_rx_desc *rx_desc = NULL;
  143. qdf_nbuf_t nbuf, next;
  144. bool near_full;
  145. union dp_rx_desc_list_elem_t *head[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  146. union dp_rx_desc_list_elem_t *tail[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  147. uint32_t num_pending;
  148. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  149. uint16_t msdu_len = 0;
  150. uint16_t peer_id;
  151. uint8_t vdev_id;
  152. struct dp_txrx_peer *txrx_peer;
  153. dp_txrx_ref_handle txrx_ref_handle = NULL;
  154. struct dp_vdev *vdev;
  155. uint32_t pkt_len = 0;
  156. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  157. struct hal_rx_msdu_desc_info msdu_desc_info;
  158. enum hal_reo_error_status error;
  159. uint32_t peer_mdata;
  160. uint8_t *rx_tlv_hdr;
  161. uint32_t rx_bufs_reaped[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  162. uint8_t mac_id = 0;
  163. struct dp_pdev *rx_pdev;
  164. bool enh_flag;
  165. struct dp_srng *dp_rxdma_srng;
  166. struct rx_desc_pool *rx_desc_pool;
  167. struct dp_soc *soc = int_ctx->soc;
  168. uint8_t core_id = 0;
  169. struct cdp_tid_rx_stats *tid_stats;
  170. qdf_nbuf_t nbuf_head;
  171. qdf_nbuf_t nbuf_tail;
  172. qdf_nbuf_t deliver_list_head;
  173. qdf_nbuf_t deliver_list_tail;
  174. uint32_t num_rx_bufs_reaped = 0;
  175. uint32_t intr_id;
  176. struct hif_opaque_softc *scn;
  177. int32_t tid = 0;
  178. bool is_prev_msdu_last = true;
  179. uint32_t num_entries_avail = 0;
  180. uint32_t rx_ol_pkt_cnt = 0;
  181. uint32_t num_entries = 0;
  182. struct hal_rx_msdu_metadata msdu_metadata;
  183. QDF_STATUS status;
  184. qdf_nbuf_t ebuf_head;
  185. qdf_nbuf_t ebuf_tail;
  186. uint8_t pkt_capture_offload = 0;
  187. struct dp_srng *rx_ring = &soc->reo_dest_ring[reo_ring_num];
  188. int max_reap_limit, ring_near_full;
  189. struct dp_soc *replenish_soc;
  190. uint8_t chip_id;
  191. DP_HIST_INIT();
  192. qdf_assert_always(soc && hal_ring_hdl);
  193. hal_soc = soc->hal_soc;
  194. qdf_assert_always(hal_soc);
  195. scn = soc->hif_handle;
  196. intr_id = int_ctx->dp_intr_id;
  197. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  198. dp_runtime_pm_mark_last_busy(soc);
  199. more_data:
  200. /* reset local variables here to be re-used in the function */
  201. nbuf_head = NULL;
  202. nbuf_tail = NULL;
  203. deliver_list_head = NULL;
  204. deliver_list_tail = NULL;
  205. txrx_peer = NULL;
  206. vdev = NULL;
  207. num_rx_bufs_reaped = 0;
  208. ebuf_head = NULL;
  209. ebuf_tail = NULL;
  210. ring_near_full = 0;
  211. max_reap_limit = dp_rx_get_loop_pkt_limit(soc);
  212. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  213. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  214. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  215. qdf_mem_zero(head, sizeof(head));
  216. qdf_mem_zero(tail, sizeof(tail));
  217. ring_near_full = _dp_srng_test_and_update_nf_params(soc, rx_ring,
  218. &max_reap_limit);
  219. if (qdf_unlikely(dp_rx_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  220. /*
  221. * Need API to convert from hal_ring pointer to
  222. * Ring Type / Ring Id combo
  223. */
  224. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  225. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  226. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  227. goto done;
  228. }
  229. /*
  230. * start reaping the buffers from reo ring and queue
  231. * them in per vdev queue.
  232. * Process the received pkts in a different per vdev loop.
  233. */
  234. while (qdf_likely(quota &&
  235. (ring_desc = hal_srng_dst_peek(hal_soc,
  236. hal_ring_hdl)))) {
  237. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  238. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  239. dp_rx_err("%pK: HAL RING 0x%pK:error %d",
  240. soc, hal_ring_hdl, error);
  241. DP_STATS_INC(soc, rx.err.hal_reo_error[reo_ring_num],
  242. 1);
  243. /* Don't know how to deal with this -- assert */
  244. qdf_assert(0);
  245. }
  246. dp_rx_ring_record_entry(soc, reo_ring_num, ring_desc);
  247. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  248. status = dp_rx_cookie_check_and_invalidate(ring_desc);
  249. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  250. DP_STATS_INC(soc, rx.err.stale_cookie, 1);
  251. break;
  252. }
  253. rx_desc = (struct dp_rx_desc *)
  254. hal_rx_get_reo_desc_va(ring_desc);
  255. dp_rx_desc_sw_cc_check(soc, rx_buf_cookie, &rx_desc);
  256. status = dp_rx_desc_sanity(soc, hal_soc, hal_ring_hdl,
  257. ring_desc, rx_desc);
  258. if (QDF_IS_STATUS_ERROR(status)) {
  259. if (qdf_unlikely(rx_desc && rx_desc->nbuf)) {
  260. qdf_assert_always(!rx_desc->unmapped);
  261. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  262. rx_desc->unmapped = 1;
  263. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  264. rx_desc->pool_id);
  265. dp_rx_add_to_free_desc_list(
  266. &head[rx_desc->chip_id][rx_desc->pool_id],
  267. &tail[rx_desc->chip_id][rx_desc->pool_id],
  268. rx_desc);
  269. }
  270. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  271. continue;
  272. }
  273. /*
  274. * this is a unlikely scenario where the host is reaping
  275. * a descriptor which it already reaped just a while ago
  276. * but is yet to replenish it back to HW.
  277. * In this case host will dump the last 128 descriptors
  278. * including the software descriptor rx_desc and assert.
  279. */
  280. if (qdf_unlikely(!rx_desc->in_use)) {
  281. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  282. dp_info_rl("Reaping rx_desc not in use!");
  283. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  284. ring_desc, rx_desc);
  285. /* ignore duplicate RX desc and continue to process */
  286. /* Pop out the descriptor */
  287. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  288. continue;
  289. }
  290. status = dp_rx_desc_nbuf_sanity_check(soc, ring_desc, rx_desc);
  291. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  292. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  293. dp_info_rl("Nbuf sanity check failure!");
  294. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  295. ring_desc, rx_desc);
  296. rx_desc->in_err_state = 1;
  297. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  298. continue;
  299. }
  300. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  301. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  302. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  303. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  304. ring_desc, rx_desc);
  305. }
  306. /* Get MPDU DESC info */
  307. hal_rx_mpdu_desc_info_get_be(ring_desc, &mpdu_desc_info);
  308. /* Get MSDU DESC info */
  309. hal_rx_msdu_desc_info_get_be(ring_desc, &msdu_desc_info);
  310. if (qdf_unlikely(msdu_desc_info.msdu_flags &
  311. HAL_MSDU_F_MSDU_CONTINUATION)) {
  312. /* previous msdu has end bit set, so current one is
  313. * the new MPDU
  314. */
  315. if (is_prev_msdu_last) {
  316. /* Get number of entries available in HW ring */
  317. num_entries_avail =
  318. hal_srng_dst_num_valid(hal_soc,
  319. hal_ring_hdl, 1);
  320. /* For new MPDU check if we can read complete
  321. * MPDU by comparing the number of buffers
  322. * available and number of buffers needed to
  323. * reap this MPDU
  324. */
  325. if ((msdu_desc_info.msdu_len /
  326. (RX_DATA_BUFFER_SIZE -
  327. soc->rx_pkt_tlv_size) + 1) >
  328. num_entries_avail) {
  329. DP_STATS_INC(soc,
  330. rx.msdu_scatter_wait_break,
  331. 1);
  332. dp_rx_cookie_reset_invalid_bit(
  333. ring_desc);
  334. break;
  335. }
  336. is_prev_msdu_last = false;
  337. }
  338. }
  339. core_id = smp_processor_id();
  340. DP_STATS_INC(soc, rx.ring_packets[core_id][reo_ring_num], 1);
  341. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_RETRY_BIT)
  342. qdf_nbuf_set_rx_retry_flag(rx_desc->nbuf, 1);
  343. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  344. HAL_MPDU_F_RAW_AMPDU))
  345. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  346. if (!is_prev_msdu_last &&
  347. msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  348. is_prev_msdu_last = true;
  349. /* Pop out the descriptor*/
  350. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  351. rx_bufs_reaped[rx_desc->chip_id][rx_desc->pool_id]++;
  352. peer_mdata = mpdu_desc_info.peer_meta_data;
  353. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  354. dp_rx_peer_metadata_peer_id_get_be(soc, peer_mdata);
  355. QDF_NBUF_CB_RX_VDEV_ID(rx_desc->nbuf) =
  356. dp_rx_peer_metadata_vdev_id_get_be(soc, peer_mdata);
  357. /* to indicate whether this msdu is rx offload */
  358. pkt_capture_offload =
  359. DP_PEER_METADATA_OFFLOAD_GET_BE(peer_mdata);
  360. /*
  361. * save msdu flags first, last and continuation msdu in
  362. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  363. * length to nbuf->cb. This ensures the info required for
  364. * per pkt processing is always in the same cache line.
  365. * This helps in improving throughput for smaller pkt
  366. * sizes.
  367. */
  368. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  369. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  370. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  371. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  372. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  373. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  374. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  375. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  376. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  377. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  378. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  379. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  380. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_INTRA_BSS)
  381. qdf_nbuf_set_intra_bss(rx_desc->nbuf, 1);
  382. if (qdf_likely(mpdu_desc_info.mpdu_flags &
  383. HAL_MPDU_F_QOS_CONTROL_VALID))
  384. qdf_nbuf_set_tid_val(rx_desc->nbuf, mpdu_desc_info.tid);
  385. /* set sw exception */
  386. qdf_nbuf_set_rx_reo_dest_ind_or_sw_excpt(
  387. rx_desc->nbuf,
  388. hal_rx_sw_exception_get_be(ring_desc));
  389. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  390. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  391. /*
  392. * move unmap after scattered msdu waiting break logic
  393. * in case double skb unmap happened.
  394. */
  395. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  396. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  397. rx_desc->unmapped = 1;
  398. DP_RX_PROCESS_NBUF(soc, nbuf_head, nbuf_tail, ebuf_head,
  399. ebuf_tail, rx_desc);
  400. /*
  401. * if continuation bit is set then we have MSDU spread
  402. * across multiple buffers, let us not decrement quota
  403. * till we reap all buffers of that MSDU.
  404. */
  405. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  406. quota -= 1;
  407. dp_rx_add_to_free_desc_list
  408. (&head[rx_desc->chip_id][rx_desc->pool_id],
  409. &tail[rx_desc->chip_id][rx_desc->pool_id], rx_desc);
  410. num_rx_bufs_reaped++;
  411. /*
  412. * only if complete msdu is received for scatter case,
  413. * then allow break.
  414. */
  415. if (is_prev_msdu_last &&
  416. dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped,
  417. max_reap_limit))
  418. break;
  419. }
  420. done:
  421. dp_rx_srng_access_end(int_ctx, soc, hal_ring_hdl);
  422. for (chip_id = 0; chip_id < WLAN_MAX_MLO_CHIPS; chip_id++) {
  423. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  424. /*
  425. * continue with next mac_id if no pkts were reaped
  426. * from that pool
  427. */
  428. if (!rx_bufs_reaped[chip_id][mac_id])
  429. continue;
  430. replenish_soc = dp_rx_replensih_soc_get(soc, chip_id);
  431. dp_rxdma_srng =
  432. &replenish_soc->rx_refill_buf_ring[mac_id];
  433. rx_desc_pool = &replenish_soc->rx_desc_buf[mac_id];
  434. dp_rx_buffers_replenish(replenish_soc, mac_id,
  435. dp_rxdma_srng, rx_desc_pool,
  436. rx_bufs_reaped[chip_id][mac_id],
  437. &head[chip_id][mac_id],
  438. &tail[chip_id][mac_id]);
  439. }
  440. }
  441. /* Peer can be NULL is case of LFR */
  442. if (qdf_likely(txrx_peer))
  443. vdev = NULL;
  444. /*
  445. * BIG loop where each nbuf is dequeued from global queue,
  446. * processed and queued back on a per vdev basis. These nbufs
  447. * are sent to stack as and when we run out of nbufs
  448. * or a new nbuf dequeued from global queue has a different
  449. * vdev when compared to previous nbuf.
  450. */
  451. nbuf = nbuf_head;
  452. while (nbuf) {
  453. next = nbuf->next;
  454. dp_rx_prefetch_nbuf_data_be(nbuf, next);
  455. if (qdf_unlikely(dp_rx_is_raw_frame_dropped(nbuf))) {
  456. nbuf = next;
  457. DP_STATS_INC(soc, rx.err.raw_frm_drop, 1);
  458. continue;
  459. }
  460. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  461. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  462. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  463. if (dp_rx_is_list_ready(deliver_list_head, vdev, txrx_peer,
  464. peer_id, vdev_id)) {
  465. dp_rx_deliver_to_stack(soc, vdev, txrx_peer,
  466. deliver_list_head,
  467. deliver_list_tail);
  468. deliver_list_head = NULL;
  469. deliver_list_tail = NULL;
  470. }
  471. /* Get TID from struct cb->tid_val, save to tid */
  472. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  473. tid = qdf_nbuf_get_tid_val(nbuf);
  474. if (qdf_unlikely(!txrx_peer)) {
  475. txrx_peer = dp_txrx_peer_get_ref_by_id(soc, peer_id,
  476. &txrx_ref_handle,
  477. DP_MOD_ID_RX);
  478. } else if (txrx_peer && txrx_peer->peer_id != peer_id) {
  479. dp_txrx_peer_unref_delete(txrx_ref_handle,
  480. DP_MOD_ID_RX);
  481. txrx_peer = dp_txrx_peer_get_ref_by_id(soc, peer_id,
  482. &txrx_ref_handle,
  483. DP_MOD_ID_RX);
  484. }
  485. if (txrx_peer) {
  486. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  487. qdf_dp_trace_set_track(nbuf, QDF_RX);
  488. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  489. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  490. QDF_NBUF_RX_PKT_DATA_TRACK;
  491. }
  492. rx_bufs_used++;
  493. if (qdf_likely(txrx_peer)) {
  494. vdev = txrx_peer->vdev;
  495. } else {
  496. nbuf->next = NULL;
  497. dp_rx_deliver_to_pkt_capture_no_peer(
  498. soc, nbuf, pkt_capture_offload);
  499. if (!pkt_capture_offload)
  500. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  501. nbuf = next;
  502. continue;
  503. }
  504. if (qdf_unlikely(!vdev)) {
  505. dp_rx_nbuf_free(nbuf);
  506. nbuf = next;
  507. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  508. continue;
  509. }
  510. /* when hlos tid override is enabled, save tid in
  511. * skb->priority
  512. */
  513. if (qdf_unlikely(vdev->skip_sw_tid_classification &
  514. DP_TXRX_HLOS_TID_OVERRIDE_ENABLED))
  515. qdf_nbuf_set_priority(nbuf, tid);
  516. rx_pdev = vdev->pdev;
  517. DP_RX_TID_SAVE(nbuf, tid);
  518. if (qdf_unlikely(rx_pdev->delay_stats_flag) ||
  519. qdf_unlikely(wlan_cfg_is_peer_ext_stats_enabled(
  520. soc->wlan_cfg_ctx)) ||
  521. dp_rx_pkt_tracepoints_enabled())
  522. qdf_nbuf_set_timestamp(nbuf);
  523. enh_flag = rx_pdev->enhanced_stats_en;
  524. tid_stats =
  525. &rx_pdev->stats.tid_stats.tid_rx_stats[reo_ring_num][tid];
  526. /*
  527. * Check if DMA completed -- msdu_done is the last bit
  528. * to be written
  529. */
  530. if (qdf_unlikely(!qdf_nbuf_is_rx_chfrag_cont(nbuf) &&
  531. !hal_rx_tlv_msdu_done_get_be(rx_tlv_hdr))) {
  532. dp_err("MSDU DONE failure");
  533. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  534. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  535. QDF_TRACE_LEVEL_INFO);
  536. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  537. dp_rx_nbuf_free(nbuf);
  538. qdf_assert(0);
  539. nbuf = next;
  540. continue;
  541. }
  542. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  543. /*
  544. * First IF condition:
  545. * 802.11 Fragmented pkts are reinjected to REO
  546. * HW block as SG pkts and for these pkts we only
  547. * need to pull the RX TLVS header length.
  548. * Second IF condition:
  549. * The below condition happens when an MSDU is spread
  550. * across multiple buffers. This can happen in two cases
  551. * 1. The nbuf size is smaller then the received msdu.
  552. * ex: we have set the nbuf size to 2048 during
  553. * nbuf_alloc. but we received an msdu which is
  554. * 2304 bytes in size then this msdu is spread
  555. * across 2 nbufs.
  556. *
  557. * 2. AMSDUs when RAW mode is enabled.
  558. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  559. * across 1st nbuf and 2nd nbuf and last MSDU is
  560. * spread across 2nd nbuf and 3rd nbuf.
  561. *
  562. * for these scenarios let us create a skb frag_list and
  563. * append these buffers till the last MSDU of the AMSDU
  564. * Third condition:
  565. * This is the most likely case, we receive 802.3 pkts
  566. * decapsulated by HW, here we need to set the pkt length.
  567. */
  568. hal_rx_msdu_packet_metadata_get_generic_be(rx_tlv_hdr,
  569. &msdu_metadata);
  570. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  571. bool is_mcbc, is_sa_vld, is_da_vld;
  572. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  573. rx_tlv_hdr);
  574. is_sa_vld =
  575. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  576. rx_tlv_hdr);
  577. is_da_vld =
  578. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  579. rx_tlv_hdr);
  580. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  581. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  582. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  583. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  584. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  585. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  586. nbuf = dp_rx_sg_create(soc, nbuf);
  587. next = nbuf->next;
  588. if (qdf_nbuf_is_raw_frame(nbuf)) {
  589. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  590. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  591. rx.raw, 1,
  592. msdu_len);
  593. } else {
  594. dp_rx_nbuf_free(nbuf);
  595. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  596. dp_info_rl("scatter msdu len %d, dropped",
  597. msdu_len);
  598. nbuf = next;
  599. continue;
  600. }
  601. } else {
  602. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  603. pkt_len = msdu_len +
  604. msdu_metadata.l3_hdr_pad +
  605. soc->rx_pkt_tlv_size;
  606. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  607. dp_rx_skip_tlvs(soc, nbuf, msdu_metadata.l3_hdr_pad);
  608. }
  609. /*
  610. * process frame for mulitpass phrase processing
  611. */
  612. if (qdf_unlikely(vdev->multipass_en)) {
  613. if (dp_rx_multipass_process(txrx_peer, nbuf,
  614. tid) == false) {
  615. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  616. rx.multipass_rx_pkt_drop,
  617. 1);
  618. dp_rx_nbuf_free(nbuf);
  619. nbuf = next;
  620. continue;
  621. }
  622. }
  623. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, txrx_peer)) {
  624. dp_rx_err("%pK: Policy Check Drop pkt", soc);
  625. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  626. rx.policy_check_drop, 1);
  627. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  628. /* Drop & free packet */
  629. dp_rx_nbuf_free(nbuf);
  630. /* Statistics */
  631. nbuf = next;
  632. continue;
  633. }
  634. if (qdf_unlikely(txrx_peer && (txrx_peer->nawds_enabled) &&
  635. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  636. (hal_rx_get_mpdu_mac_ad4_valid_be(rx_tlv_hdr)
  637. == false))) {
  638. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  639. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  640. rx.nawds_mcast_drop, 1);
  641. dp_rx_nbuf_free(nbuf);
  642. nbuf = next;
  643. continue;
  644. }
  645. /*
  646. * Drop non-EAPOL frames from unauthorized peer.
  647. */
  648. if (qdf_likely(txrx_peer) &&
  649. qdf_unlikely(!txrx_peer->authorize) &&
  650. !qdf_nbuf_is_raw_frame(nbuf)) {
  651. bool is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  652. qdf_nbuf_is_ipv4_wapi_pkt(nbuf);
  653. if (!is_eapol) {
  654. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  655. rx.peer_unauth_rx_pkt_drop,
  656. 1);
  657. dp_rx_nbuf_free(nbuf);
  658. nbuf = next;
  659. continue;
  660. }
  661. }
  662. if (soc->process_rx_status)
  663. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  664. /* Update the protocol tag in SKB based on CCE metadata */
  665. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  666. reo_ring_num, false, true);
  667. /* Update the flow tag in SKB based on FSE metadata */
  668. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  669. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, txrx_peer,
  670. reo_ring_num, tid_stats);
  671. if (qdf_unlikely(vdev->mesh_vdev)) {
  672. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  673. == QDF_STATUS_SUCCESS) {
  674. dp_rx_info("%pK: mesh pkt filtered", soc);
  675. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  676. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  677. 1);
  678. dp_rx_nbuf_free(nbuf);
  679. nbuf = next;
  680. continue;
  681. }
  682. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr,
  683. txrx_peer);
  684. }
  685. if (qdf_likely(vdev->rx_decap_type ==
  686. htt_cmn_pkt_type_ethernet) &&
  687. qdf_likely(!vdev->mesh_vdev)) {
  688. dp_rx_wds_learn(soc, vdev,
  689. rx_tlv_hdr,
  690. txrx_peer,
  691. nbuf,
  692. msdu_metadata);
  693. /* Intrabss-fwd */
  694. if (dp_rx_check_ap_bridge(vdev))
  695. if (dp_rx_intrabss_fwd_be(soc, txrx_peer,
  696. rx_tlv_hdr,
  697. nbuf,
  698. msdu_metadata)) {
  699. nbuf = next;
  700. tid_stats->intrabss_cnt++;
  701. continue; /* Get next desc */
  702. }
  703. }
  704. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  705. dp_rx_mark_first_packet_after_wow_wakeup(vdev->pdev, rx_tlv_hdr,
  706. nbuf);
  707. dp_rx_update_stats(soc, nbuf);
  708. DP_RX_LIST_APPEND(deliver_list_head,
  709. deliver_list_tail,
  710. nbuf);
  711. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1,
  712. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  713. enh_flag);
  714. if (qdf_unlikely(txrx_peer->in_twt))
  715. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  716. rx.to_stack_twt, 1,
  717. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  718. tid_stats->delivered_to_stack++;
  719. nbuf = next;
  720. }
  721. if (qdf_likely(deliver_list_head)) {
  722. if (qdf_likely(txrx_peer)) {
  723. dp_rx_deliver_to_pkt_capture(soc, vdev->pdev, peer_id,
  724. pkt_capture_offload,
  725. deliver_list_head);
  726. if (!pkt_capture_offload)
  727. dp_rx_deliver_to_stack(soc, vdev, txrx_peer,
  728. deliver_list_head,
  729. deliver_list_tail);
  730. } else {
  731. nbuf = deliver_list_head;
  732. while (nbuf) {
  733. next = nbuf->next;
  734. nbuf->next = NULL;
  735. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  736. nbuf = next;
  737. }
  738. }
  739. }
  740. if (qdf_likely(txrx_peer))
  741. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  742. /*
  743. * If we are processing in near-full condition, there are 3 scenario
  744. * 1) Ring entries has reached critical state
  745. * 2) Ring entries are still near high threshold
  746. * 3) Ring entries are below the safe level
  747. *
  748. * One more loop will move the state to normal processing and yield
  749. */
  750. if (ring_near_full && quota)
  751. goto more_data;
  752. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  753. if (quota) {
  754. num_pending =
  755. dp_rx_srng_get_num_pending(hal_soc,
  756. hal_ring_hdl,
  757. num_entries,
  758. &near_full);
  759. if (num_pending) {
  760. DP_STATS_INC(soc, rx.hp_oos2, 1);
  761. if (!hif_exec_should_yield(scn, intr_id))
  762. goto more_data;
  763. if (qdf_unlikely(near_full)) {
  764. DP_STATS_INC(soc, rx.near_full, 1);
  765. goto more_data;
  766. }
  767. }
  768. }
  769. if (vdev && vdev->osif_fisa_flush)
  770. vdev->osif_fisa_flush(soc, reo_ring_num);
  771. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  772. vdev->osif_gro_flush(vdev->osif_vdev,
  773. reo_ring_num);
  774. }
  775. }
  776. /* Update histogram statistics by looping through pdev's */
  777. DP_RX_HIST_STATS_PER_PDEV();
  778. return rx_bufs_used; /* Assume no scale factor for now */
  779. }
  780. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  781. /**
  782. * dp_rx_desc_pool_init_be_cc() - initial RX desc pool for cookie conversion
  783. * @soc: Handle to DP Soc structure
  784. * @rx_desc_pool: Rx descriptor pool handler
  785. * @pool_id: Rx descriptor pool ID
  786. *
  787. * Return: QDF_STATUS_SUCCESS - succeeded, others - failed
  788. */
  789. static QDF_STATUS
  790. dp_rx_desc_pool_init_be_cc(struct dp_soc *soc,
  791. struct rx_desc_pool *rx_desc_pool,
  792. uint32_t pool_id)
  793. {
  794. struct dp_hw_cookie_conversion_t *cc_ctx;
  795. struct dp_soc_be *be_soc;
  796. union dp_rx_desc_list_elem_t *rx_desc_elem;
  797. struct dp_spt_page_desc *page_desc;
  798. uint32_t ppt_idx = 0;
  799. uint32_t avail_entry_index = 0;
  800. if (!rx_desc_pool->pool_size) {
  801. dp_err("desc_num 0 !!");
  802. return QDF_STATUS_E_FAILURE;
  803. }
  804. be_soc = dp_get_be_soc_from_dp_soc(soc);
  805. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  806. page_desc = &cc_ctx->page_desc_base[0];
  807. rx_desc_elem = rx_desc_pool->freelist;
  808. while (rx_desc_elem) {
  809. if (avail_entry_index == 0) {
  810. if (ppt_idx >= cc_ctx->total_page_num) {
  811. dp_alert("insufficient secondary page tables");
  812. qdf_assert_always(0);
  813. }
  814. page_desc = &cc_ctx->page_desc_base[ppt_idx++];
  815. }
  816. /* put each RX Desc VA to SPT pages and
  817. * get corresponding ID
  818. */
  819. DP_CC_SPT_PAGE_UPDATE_VA(page_desc->page_v_addr,
  820. avail_entry_index,
  821. &rx_desc_elem->rx_desc);
  822. rx_desc_elem->rx_desc.cookie =
  823. dp_cc_desc_id_generate(page_desc->ppt_index,
  824. avail_entry_index);
  825. rx_desc_elem->rx_desc.chip_id = dp_mlo_get_chip_id(soc);
  826. rx_desc_elem->rx_desc.pool_id = pool_id;
  827. rx_desc_elem->rx_desc.in_use = 0;
  828. rx_desc_elem = rx_desc_elem->next;
  829. avail_entry_index = (avail_entry_index + 1) &
  830. DP_CC_SPT_PAGE_MAX_ENTRIES_MASK;
  831. }
  832. return QDF_STATUS_SUCCESS;
  833. }
  834. #else
  835. static QDF_STATUS
  836. dp_rx_desc_pool_init_be_cc(struct dp_soc *soc,
  837. struct rx_desc_pool *rx_desc_pool,
  838. uint32_t pool_id)
  839. {
  840. struct dp_hw_cookie_conversion_t *cc_ctx;
  841. struct dp_soc_be *be_soc;
  842. struct dp_spt_page_desc *page_desc;
  843. uint32_t ppt_idx = 0;
  844. uint32_t avail_entry_index = 0;
  845. int i = 0;
  846. if (!rx_desc_pool->pool_size) {
  847. dp_err("desc_num 0 !!");
  848. return QDF_STATUS_E_FAILURE;
  849. }
  850. be_soc = dp_get_be_soc_from_dp_soc(soc);
  851. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  852. page_desc = &cc_ctx->page_desc_base[0];
  853. for (i = 0; i <= rx_desc_pool->pool_size - 1; i++) {
  854. if (i == rx_desc_pool->pool_size - 1)
  855. rx_desc_pool->array[i].next = NULL;
  856. else
  857. rx_desc_pool->array[i].next =
  858. &rx_desc_pool->array[i + 1];
  859. if (avail_entry_index == 0) {
  860. if (ppt_idx >= cc_ctx->total_page_num) {
  861. dp_alert("insufficient secondary page tables");
  862. qdf_assert_always(0);
  863. }
  864. page_desc = &cc_ctx->page_desc_base[ppt_idx++];
  865. }
  866. /* put each RX Desc VA to SPT pages and
  867. * get corresponding ID
  868. */
  869. DP_CC_SPT_PAGE_UPDATE_VA(page_desc->page_v_addr,
  870. avail_entry_index,
  871. &rx_desc_pool->array[i].rx_desc);
  872. rx_desc_pool->array[i].rx_desc.cookie =
  873. dp_cc_desc_id_generate(page_desc->ppt_index,
  874. avail_entry_index);
  875. rx_desc_pool->array[i].rx_desc.pool_id = pool_id;
  876. rx_desc_pool->array[i].rx_desc.in_use = 0;
  877. rx_desc_pool->array[i].rx_desc.chip_id =
  878. dp_mlo_get_chip_id(soc);
  879. avail_entry_index = (avail_entry_index + 1) &
  880. DP_CC_SPT_PAGE_MAX_ENTRIES_MASK;
  881. }
  882. return QDF_STATUS_SUCCESS;
  883. }
  884. #endif
  885. static void
  886. dp_rx_desc_pool_deinit_be_cc(struct dp_soc *soc,
  887. struct rx_desc_pool *rx_desc_pool,
  888. uint32_t pool_id)
  889. {
  890. struct dp_spt_page_desc *page_desc;
  891. struct dp_soc_be *be_soc;
  892. int i = 0;
  893. struct dp_hw_cookie_conversion_t *cc_ctx;
  894. be_soc = dp_get_be_soc_from_dp_soc(soc);
  895. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  896. for (i = 0; i < cc_ctx->total_page_num; i++) {
  897. page_desc = &cc_ctx->page_desc_base[i];
  898. qdf_mem_zero(page_desc->page_v_addr, qdf_page_size);
  899. }
  900. }
  901. QDF_STATUS dp_rx_desc_pool_init_be(struct dp_soc *soc,
  902. struct rx_desc_pool *rx_desc_pool,
  903. uint32_t pool_id)
  904. {
  905. QDF_STATUS status = QDF_STATUS_SUCCESS;
  906. /* Only regular RX buffer desc pool use HW cookie conversion */
  907. if (rx_desc_pool->desc_type == DP_RX_DESC_BUF_TYPE) {
  908. dp_info("rx_desc_buf pool init");
  909. status = dp_rx_desc_pool_init_be_cc(soc,
  910. rx_desc_pool,
  911. pool_id);
  912. } else {
  913. dp_info("non_rx_desc_buf_pool init");
  914. status = dp_rx_desc_pool_init_generic(soc, rx_desc_pool,
  915. pool_id);
  916. }
  917. return status;
  918. }
  919. void dp_rx_desc_pool_deinit_be(struct dp_soc *soc,
  920. struct rx_desc_pool *rx_desc_pool,
  921. uint32_t pool_id)
  922. {
  923. if (rx_desc_pool->desc_type == DP_RX_DESC_BUF_TYPE)
  924. dp_rx_desc_pool_deinit_be_cc(soc, rx_desc_pool, pool_id);
  925. }
  926. #ifdef DP_FEATURE_HW_COOKIE_CONVERSION
  927. #ifdef DP_HW_COOKIE_CONVERT_EXCEPTION
  928. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  929. void *ring_desc,
  930. struct dp_rx_desc **r_rx_desc)
  931. {
  932. if (hal_rx_wbm_get_cookie_convert_done(ring_desc)) {
  933. /* HW cookie conversion done */
  934. *r_rx_desc = (struct dp_rx_desc *)
  935. hal_rx_wbm_get_desc_va(ring_desc);
  936. } else {
  937. /* SW do cookie conversion */
  938. uint32_t cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  939. *r_rx_desc = (struct dp_rx_desc *)
  940. dp_cc_desc_find(soc, cookie);
  941. }
  942. return QDF_STATUS_SUCCESS;
  943. }
  944. #else
  945. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  946. void *ring_desc,
  947. struct dp_rx_desc **r_rx_desc)
  948. {
  949. *r_rx_desc = (struct dp_rx_desc *)
  950. hal_rx_wbm_get_desc_va(ring_desc);
  951. return QDF_STATUS_SUCCESS;
  952. }
  953. #endif /* DP_HW_COOKIE_CONVERT_EXCEPTION */
  954. #else
  955. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  956. void *ring_desc,
  957. struct dp_rx_desc **r_rx_desc)
  958. {
  959. /* SW do cookie conversion */
  960. uint32_t cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  961. *r_rx_desc = (struct dp_rx_desc *)
  962. dp_cc_desc_find(soc, cookie);
  963. return QDF_STATUS_SUCCESS;
  964. }
  965. #endif /* DP_FEATURE_HW_COOKIE_CONVERSION */
  966. struct dp_rx_desc *dp_rx_desc_cookie_2_va_be(struct dp_soc *soc,
  967. uint32_t cookie)
  968. {
  969. return (struct dp_rx_desc *)dp_cc_desc_find(soc, cookie);
  970. }
  971. #if defined(WLAN_FEATURE_11BE_MLO)
  972. #if defined(WLAN_MLO_MULTI_CHIP) && defined(WLAN_MCAST_MLO)
  973. #define DP_RANDOM_MAC_ID_BIT_MASK 0xC0
  974. #define DP_RANDOM_MAC_OFFSET 1
  975. #define DP_MAC_LOCAL_ADMBIT_MASK 0x2
  976. #define DP_MAC_LOCAL_ADMBIT_OFFSET 0
  977. static inline void dp_rx_dummy_src_mac(struct dp_vdev *vdev,
  978. qdf_nbuf_t nbuf)
  979. {
  980. uint8_t random_mac[QDF_MAC_ADDR_SIZE] = {0};
  981. qdf_ether_header_t *eh =
  982. (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  983. qdf_mem_copy(random_mac, &vdev->mld_mac_addr.raw[0], QDF_MAC_ADDR_SIZE);
  984. random_mac[DP_MAC_LOCAL_ADMBIT_OFFSET] =
  985. random_mac[DP_MAC_LOCAL_ADMBIT_OFFSET] |
  986. DP_MAC_LOCAL_ADMBIT_MASK;
  987. random_mac[DP_RANDOM_MAC_OFFSET] =
  988. random_mac[DP_RANDOM_MAC_OFFSET] ^ DP_RANDOM_MAC_ID_BIT_MASK;
  989. qdf_mem_copy(&eh->ether_shost[0], random_mac, QDF_MAC_ADDR_SIZE);
  990. }
  991. #ifdef QCA_SUPPORT_WDS_EXTENDED
  992. static inline bool dp_rx_mlo_igmp_wds_ext_handler(struct dp_txrx_peer *peer)
  993. {
  994. return qdf_atomic_test_bit(WDS_EXT_PEER_INIT_BIT, &peer->wds_ext.init);
  995. }
  996. #else
  997. static inline bool dp_rx_mlo_igmp_wds_ext_handler(struct dp_txrx_peer *peer)
  998. {
  999. return false;
  1000. }
  1001. #endif
  1002. bool dp_rx_mlo_igmp_handler(struct dp_soc *soc,
  1003. struct dp_vdev *vdev,
  1004. struct dp_txrx_peer *peer,
  1005. qdf_nbuf_t nbuf)
  1006. {
  1007. struct dp_vdev *mcast_primary_vdev = NULL;
  1008. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1009. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1010. if (!(qdf_nbuf_is_ipv4_igmp_pkt(nbuf) ||
  1011. qdf_nbuf_is_ipv6_igmp_pkt(nbuf)))
  1012. return false;
  1013. /*
  1014. * In the case of ME6, Backhaul WDS, NAWDS
  1015. * send the igmp pkt on the same link where it received,
  1016. * as these features will use peer based tcl metadata
  1017. */
  1018. qdf_nbuf_set_next(nbuf, NULL);
  1019. if (vdev->mcast_enhancement_en || be_vdev->mcast_primary ||
  1020. peer->nawds_enabled)
  1021. goto send_pkt;
  1022. if (qdf_unlikely(dp_rx_mlo_igmp_wds_ext_handler(peer)))
  1023. goto send_pkt;
  1024. mcast_primary_vdev = dp_mlo_get_mcast_primary_vdev(be_soc, be_vdev,
  1025. DP_MOD_ID_RX);
  1026. if (!mcast_primary_vdev) {
  1027. dp_rx_debug("Non mlo vdev");
  1028. goto send_pkt;
  1029. }
  1030. dp_rx_dummy_src_mac(vdev, nbuf);
  1031. dp_rx_deliver_to_stack(mcast_primary_vdev->pdev->soc,
  1032. mcast_primary_vdev,
  1033. peer,
  1034. nbuf,
  1035. NULL);
  1036. dp_vdev_unref_delete(mcast_primary_vdev->pdev->soc,
  1037. mcast_primary_vdev,
  1038. DP_MOD_ID_RX);
  1039. return true;
  1040. send_pkt:
  1041. dp_rx_deliver_to_stack(be_vdev->vdev.pdev->soc,
  1042. &be_vdev->vdev,
  1043. peer,
  1044. nbuf,
  1045. NULL);
  1046. return true;
  1047. }
  1048. #else
  1049. bool dp_rx_mlo_igmp_handler(struct dp_soc *soc,
  1050. struct dp_vdev *vdev,
  1051. struct dp_txrx_peer *peer,
  1052. qdf_nbuf_t nbuf)
  1053. {
  1054. return false;
  1055. }
  1056. #endif
  1057. #endif
  1058. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  1059. uint32_t dp_rx_nf_process(struct dp_intr *int_ctx,
  1060. hal_ring_handle_t hal_ring_hdl,
  1061. uint8_t reo_ring_num,
  1062. uint32_t quota)
  1063. {
  1064. struct dp_soc *soc = int_ctx->soc;
  1065. struct dp_srng *rx_ring = &soc->reo_dest_ring[reo_ring_num];
  1066. uint32_t work_done = 0;
  1067. if (dp_srng_get_near_full_level(soc, rx_ring) <
  1068. DP_SRNG_THRESH_NEAR_FULL)
  1069. return 0;
  1070. qdf_atomic_set(&rx_ring->near_full, 1);
  1071. work_done++;
  1072. return work_done;
  1073. }
  1074. #endif
  1075. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1076. #ifdef WLAN_FEATURE_11BE_MLO
  1077. /**
  1078. * dp_rx_intrabss_fwd_mlo_allow() - check if MLO forwarding is allowed
  1079. * @ta_peer: transmitter peer handle
  1080. * @da_peer: destination peer handle
  1081. *
  1082. * Return: true - MLO forwarding case, false: not
  1083. */
  1084. static inline bool
  1085. dp_rx_intrabss_fwd_mlo_allow(struct dp_txrx_peer *ta_peer,
  1086. struct dp_txrx_peer *da_peer)
  1087. {
  1088. /* one of TA/DA peer should belong to MLO connection peer,
  1089. * only MLD peer type is as expected
  1090. */
  1091. if (!IS_MLO_DP_MLD_TXRX_PEER(ta_peer) &&
  1092. !IS_MLO_DP_MLD_TXRX_PEER(da_peer))
  1093. return false;
  1094. /* TA peer and DA peer's vdev should be partner MLO vdevs */
  1095. if (dp_peer_find_mac_addr_cmp(&ta_peer->vdev->mld_mac_addr,
  1096. &da_peer->vdev->mld_mac_addr))
  1097. return false;
  1098. return true;
  1099. }
  1100. #else
  1101. static inline bool
  1102. dp_rx_intrabss_fwd_mlo_allow(struct dp_txrx_peer *ta_peer,
  1103. struct dp_txrx_peer *da_peer)
  1104. {
  1105. return false;
  1106. }
  1107. #endif
  1108. #ifdef INTRA_BSS_FWD_OFFLOAD
  1109. /**
  1110. * dp_rx_intrabss_ucast_check_be() - Check if intrabss is allowed
  1111. for unicast frame
  1112. * @soc: SOC hanlde
  1113. * @nbuf: RX packet buffer
  1114. * @ta_peer: transmitter DP peer handle
  1115. * @msdu_metadata: MSDU meta data info
  1116. * @p_tx_vdev_id: get vdev id for Intra-BSS TX
  1117. *
  1118. * Return: true - intrabss allowed
  1119. false - not allow
  1120. */
  1121. static bool
  1122. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1123. struct dp_txrx_peer *ta_peer,
  1124. struct hal_rx_msdu_metadata *msdu_metadata,
  1125. struct dp_be_intrabss_params *params)
  1126. {
  1127. uint16_t da_peer_id;
  1128. struct dp_txrx_peer *da_peer;
  1129. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1130. if (!qdf_nbuf_is_intra_bss(nbuf))
  1131. return false;
  1132. da_peer_id = dp_rx_peer_metadata_peer_id_get_be(
  1133. params->dest_soc,
  1134. msdu_metadata->da_idx);
  1135. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc, da_peer_id,
  1136. &txrx_ref_handle, DP_MOD_ID_RX);
  1137. if (!da_peer)
  1138. return false;
  1139. params->tx_vdev_id = da_peer->vdev->vdev_id;
  1140. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  1141. return true;
  1142. }
  1143. #else
  1144. #ifdef WLAN_MLO_MULTI_CHIP
  1145. static bool
  1146. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1147. struct dp_txrx_peer *ta_peer,
  1148. struct hal_rx_msdu_metadata *msdu_metadata,
  1149. struct dp_be_intrabss_params *params)
  1150. {
  1151. uint16_t da_peer_id;
  1152. struct dp_txrx_peer *da_peer;
  1153. bool ret = false;
  1154. uint8_t dest_chip_id;
  1155. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1156. struct dp_vdev_be *be_vdev =
  1157. dp_get_be_vdev_from_dp_vdev(ta_peer->vdev);
  1158. struct dp_soc_be *be_soc =
  1159. dp_get_be_soc_from_dp_soc(params->dest_soc);
  1160. if (!(qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf)))
  1161. return false;
  1162. dest_chip_id = HAL_RX_DEST_CHIP_ID_GET(msdu_metadata);
  1163. qdf_assert_always(dest_chip_id <= (DP_MLO_MAX_DEST_CHIP_ID - 1));
  1164. da_peer_id = HAL_RX_PEER_ID_GET(msdu_metadata);
  1165. /* use dest chip id when TA is MLD peer and DA is legacy */
  1166. if (be_soc->mlo_enabled &&
  1167. ta_peer->mld_peer &&
  1168. !(da_peer_id & HAL_RX_DA_IDX_ML_PEER_MASK)) {
  1169. /* validate chip_id, get a ref, and re-assign soc */
  1170. params->dest_soc =
  1171. dp_mlo_get_soc_ref_by_chip_id(be_soc->ml_ctxt,
  1172. dest_chip_id);
  1173. if (!params->dest_soc)
  1174. return false;
  1175. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc,
  1176. da_peer_id,
  1177. &txrx_ref_handle,
  1178. DP_MOD_ID_RX);
  1179. if (!da_peer)
  1180. return false;
  1181. } else {
  1182. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc,
  1183. da_peer_id,
  1184. &txrx_ref_handle,
  1185. DP_MOD_ID_RX);
  1186. if (!da_peer)
  1187. return false;
  1188. params->dest_soc = da_peer->vdev->pdev->soc;
  1189. if (!params->dest_soc)
  1190. goto rel_da_peer;
  1191. }
  1192. params->tx_vdev_id = da_peer->vdev->vdev_id;
  1193. /* If the source or destination peer in the isolation
  1194. * list then dont forward instead push to bridge stack.
  1195. */
  1196. if (dp_get_peer_isolation(ta_peer) ||
  1197. dp_get_peer_isolation(da_peer)) {
  1198. ret = false;
  1199. goto rel_da_peer;
  1200. }
  1201. if (da_peer->bss_peer || (da_peer == ta_peer)) {
  1202. ret = false;
  1203. goto rel_da_peer;
  1204. }
  1205. /* Same vdev, support Inra-BSS */
  1206. if (da_peer->vdev == ta_peer->vdev) {
  1207. ret = true;
  1208. goto rel_da_peer;
  1209. }
  1210. /* MLO specific Intra-BSS check */
  1211. if (dp_rx_intrabss_fwd_mlo_allow(ta_peer, da_peer)) {
  1212. /* use dest chip id for legacy dest peer */
  1213. if (!(da_peer_id & HAL_RX_DA_IDX_ML_PEER_MASK)) {
  1214. if (!(be_vdev->partner_vdev_list[dest_chip_id][0] ==
  1215. params->tx_vdev_id) &&
  1216. !(be_vdev->partner_vdev_list[dest_chip_id][1] ==
  1217. params->tx_vdev_id)) {
  1218. /*dp_soc_unref_delete(soc);*/
  1219. goto rel_da_peer;
  1220. }
  1221. }
  1222. ret = true;
  1223. }
  1224. rel_da_peer:
  1225. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  1226. return ret;
  1227. }
  1228. #else
  1229. static bool
  1230. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1231. struct dp_txrx_peer *ta_peer,
  1232. struct hal_rx_msdu_metadata *msdu_metadata,
  1233. struct dp_be_intrabss_params *params)
  1234. {
  1235. uint16_t da_peer_id;
  1236. struct dp_txrx_peer *da_peer;
  1237. bool ret = false;
  1238. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1239. if (!qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf))
  1240. return false;
  1241. da_peer_id = dp_rx_peer_metadata_peer_id_get_be(
  1242. params->dest_soc,
  1243. msdu_metadata->da_idx);
  1244. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc, da_peer_id,
  1245. &txrx_ref_handle, DP_MOD_ID_RX);
  1246. if (!da_peer)
  1247. return false;
  1248. params->tx_vdev_id = da_peer->vdev->vdev_id;
  1249. /* If the source or destination peer in the isolation
  1250. * list then dont forward instead push to bridge stack.
  1251. */
  1252. if (dp_get_peer_isolation(ta_peer) ||
  1253. dp_get_peer_isolation(da_peer))
  1254. goto rel_da_peer;
  1255. if (da_peer->bss_peer || da_peer == ta_peer)
  1256. goto rel_da_peer;
  1257. /* Same vdev, support Inra-BSS */
  1258. if (da_peer->vdev == ta_peer->vdev) {
  1259. ret = true;
  1260. goto rel_da_peer;
  1261. }
  1262. /* MLO specific Intra-BSS check */
  1263. if (dp_rx_intrabss_fwd_mlo_allow(ta_peer, da_peer)) {
  1264. ret = true;
  1265. goto rel_da_peer;
  1266. }
  1267. rel_da_peer:
  1268. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  1269. return ret;
  1270. }
  1271. #endif /* WLAN_MLO_MULTI_CHIP */
  1272. #endif /* INTRA_BSS_FWD_OFFLOAD */
  1273. /*
  1274. * dp_rx_intrabss_handle_nawds_be() - Forward mcbc intrabss pkts in nawds case
  1275. * @soc: core txrx main context
  1276. * @ta_txrx_peer: source txrx_peer entry
  1277. * @nbuf_copy: nbuf that has to be intrabss forwarded
  1278. * @tid_stats: tid_stats structure
  1279. *
  1280. * Return: true if it is forwarded else false
  1281. */
  1282. bool
  1283. dp_rx_intrabss_handle_nawds_be(struct dp_soc *soc,
  1284. struct dp_txrx_peer *ta_txrx_peer,
  1285. qdf_nbuf_t nbuf_copy,
  1286. struct cdp_tid_rx_stats *tid_stats)
  1287. {
  1288. if (qdf_unlikely(ta_txrx_peer->vdev->nawds_enabled)) {
  1289. struct cdp_tx_exception_metadata tx_exc_metadata = {0};
  1290. uint16_t len = QDF_NBUF_CB_RX_PKT_LEN(nbuf_copy);
  1291. tx_exc_metadata.peer_id = ta_txrx_peer->peer_id;
  1292. tx_exc_metadata.is_intrabss_fwd = 1;
  1293. tx_exc_metadata.tid = HTT_TX_EXT_TID_INVALID;
  1294. if (dp_tx_send_exception((struct cdp_soc_t *)soc,
  1295. ta_txrx_peer->vdev->vdev_id,
  1296. nbuf_copy,
  1297. &tx_exc_metadata)) {
  1298. DP_PEER_PER_PKT_STATS_INC_PKT(ta_txrx_peer,
  1299. rx.intra_bss.fail, 1,
  1300. len);
  1301. tid_stats->fail_cnt[INTRABSS_DROP]++;
  1302. qdf_nbuf_free(nbuf_copy);
  1303. } else {
  1304. DP_PEER_PER_PKT_STATS_INC_PKT(ta_txrx_peer,
  1305. rx.intra_bss.pkts, 1,
  1306. len);
  1307. tid_stats->intrabss_cnt++;
  1308. }
  1309. return true;
  1310. }
  1311. return false;
  1312. }
  1313. /*
  1314. * dp_rx_intrabss_fwd_be() - API for intrabss fwd. For EAPOL
  1315. * pkt with DA not equal to vdev mac addr, fwd is not allowed.
  1316. * @soc: core txrx main context
  1317. * @ta_peer: source peer entry
  1318. * @rx_tlv_hdr: start address of rx tlvs
  1319. * @nbuf: nbuf that has to be intrabss forwarded
  1320. * @msdu_metadata: msdu metadata
  1321. *
  1322. * Return: true if it is forwarded else false
  1323. */
  1324. bool dp_rx_intrabss_fwd_be(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  1325. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1326. struct hal_rx_msdu_metadata msdu_metadata)
  1327. {
  1328. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1329. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1330. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  1331. tid_stats.tid_rx_stats[ring_id][tid];
  1332. bool ret = false;
  1333. struct dp_be_intrabss_params params;
  1334. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  1335. * source, then clone the pkt and send the cloned pkt for
  1336. * intra BSS forwarding and original pkt up the network stack
  1337. * Note: how do we handle multicast pkts. do we forward
  1338. * all multicast pkts as is or let a higher layer module
  1339. * like igmpsnoop decide whether to forward or not with
  1340. * Mcast enhancement.
  1341. */
  1342. if (qdf_nbuf_is_da_mcbc(nbuf) && !ta_peer->bss_peer) {
  1343. return dp_rx_intrabss_mcbc_fwd(soc, ta_peer, rx_tlv_hdr,
  1344. nbuf, tid_stats);
  1345. }
  1346. if (dp_rx_intrabss_eapol_drop_check(soc, ta_peer, rx_tlv_hdr,
  1347. nbuf))
  1348. return true;
  1349. params.dest_soc = soc;
  1350. if (dp_rx_intrabss_ucast_check_be(nbuf, ta_peer,
  1351. &msdu_metadata, &params)) {
  1352. ret = dp_rx_intrabss_ucast_fwd(params.dest_soc, ta_peer,
  1353. params.tx_vdev_id,
  1354. rx_tlv_hdr, nbuf, tid_stats);
  1355. }
  1356. return ret;
  1357. }
  1358. #endif