sdm660-common.c 88 KB

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  1. /* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/input.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/module.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/of_device.h>
  17. #include <linux/mfd/msm-cdc-pinctrl.h>
  18. #include <sound/pcm_params.h>
  19. #include <sound/q6afe-v2.h>
  20. #include "qdsp6v2/msm-pcm-routing-v2.h"
  21. #include "sdm660-common.h"
  22. #include "sdm660-internal.h"
  23. #include "sdm660-external.h"
  24. #include "../codecs/sdm660_cdc/msm-analog-cdc.h"
  25. #include "../codecs/wsa881x.h"
  26. #define DRV_NAME "sdm660-asoc-snd"
  27. #define MSM_INT_DIGITAL_CODEC "msm-dig-codec"
  28. #define PMIC_INT_ANALOG_CODEC "analog-codec"
  29. #define DEV_NAME_STR_LEN 32
  30. #define DEFAULT_MCLK_RATE 9600000
  31. struct dev_config {
  32. u32 sample_rate;
  33. u32 bit_format;
  34. u32 channels;
  35. };
  36. enum {
  37. DP_RX_IDX,
  38. EXT_DISP_RX_IDX_MAX,
  39. };
  40. /* TDM default config */
  41. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  42. { /* PRI TDM */
  43. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  44. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  45. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  46. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  47. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  48. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  49. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  50. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  51. },
  52. { /* SEC TDM */
  53. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  54. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  55. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  56. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  57. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  58. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  59. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  60. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  61. },
  62. { /* TERT TDM */
  63. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  64. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  65. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  66. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  67. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  68. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  69. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  70. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  71. },
  72. { /* QUAT TDM */
  73. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  74. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  75. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  76. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  77. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  78. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  79. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  80. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  81. }
  82. };
  83. /* TDM default config */
  84. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  85. { /* PRI TDM */
  86. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  87. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  88. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  89. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  90. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  91. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  92. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  93. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  94. },
  95. { /* SEC TDM */
  96. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  97. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  98. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  99. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  100. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  101. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  102. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  103. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  104. },
  105. { /* TERT TDM */
  106. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  107. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  108. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  109. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  110. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  111. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  112. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  113. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  114. },
  115. { /* QUAT TDM */
  116. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  117. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  118. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  119. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  120. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  121. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  122. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  123. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  124. }
  125. };
  126. /* Default configuration of external display BE */
  127. static struct dev_config ext_disp_rx_cfg[] = {
  128. [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  129. };
  130. static struct dev_config usb_rx_cfg = {
  131. .sample_rate = SAMPLING_RATE_48KHZ,
  132. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  133. .channels = 2,
  134. };
  135. static struct dev_config usb_tx_cfg = {
  136. .sample_rate = SAMPLING_RATE_48KHZ,
  137. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  138. .channels = 1,
  139. };
  140. enum {
  141. PRIM_MI2S = 0,
  142. SEC_MI2S,
  143. TERT_MI2S,
  144. QUAT_MI2S,
  145. MI2S_MAX,
  146. };
  147. enum {
  148. PRIM_AUX_PCM = 0,
  149. SEC_AUX_PCM,
  150. TERT_AUX_PCM,
  151. QUAT_AUX_PCM,
  152. AUX_PCM_MAX,
  153. };
  154. enum {
  155. PCM_I2S_SEL_PRIM = 0,
  156. PCM_I2S_SEL_SEC,
  157. PCM_I2S_SEL_TERT,
  158. PCM_I2S_SEL_QUAT,
  159. PCM_I2S_SEL_MAX,
  160. };
  161. struct mi2s_conf {
  162. struct mutex lock;
  163. u32 ref_cnt;
  164. u32 msm_is_mi2s_master;
  165. u32 msm_is_ext_mclk;
  166. };
  167. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  168. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  169. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  170. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  171. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT
  172. };
  173. struct msm_wsa881x_dev_info {
  174. struct device_node *of_node;
  175. u32 index;
  176. };
  177. static struct snd_soc_aux_dev *msm_aux_dev;
  178. static struct snd_soc_codec_conf *msm_codec_conf;
  179. static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active);
  180. static struct wcd_mbhc_config mbhc_cfg = {
  181. .read_fw_bin = false,
  182. .calibration = NULL,
  183. .detect_extn_cable = true,
  184. .mono_stero_detection = false,
  185. .swap_gnd_mic = NULL,
  186. .hs_ext_micbias = true,
  187. .key_code[0] = KEY_MEDIA,
  188. .key_code[1] = KEY_VOICECOMMAND,
  189. .key_code[2] = KEY_VOLUMEUP,
  190. .key_code[3] = KEY_VOLUMEDOWN,
  191. .key_code[4] = 0,
  192. .key_code[5] = 0,
  193. .key_code[6] = 0,
  194. .key_code[7] = 0,
  195. .linein_th = 5000,
  196. .moisture_en = false,
  197. .mbhc_micbias = 0,
  198. .anc_micbias = 0,
  199. .enable_anc_mic_detect = false,
  200. };
  201. static struct dev_config proxy_rx_cfg = {
  202. .sample_rate = SAMPLING_RATE_48KHZ,
  203. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  204. .channels = 2,
  205. };
  206. /* Default configuration of MI2S channels */
  207. static struct dev_config mi2s_rx_cfg[] = {
  208. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  209. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  210. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  211. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  212. };
  213. static struct dev_config mi2s_tx_cfg[] = {
  214. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  215. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  216. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  217. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  218. };
  219. static struct dev_config aux_pcm_rx_cfg[] = {
  220. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  221. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  222. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  223. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  224. };
  225. static struct dev_config aux_pcm_tx_cfg[] = {
  226. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  227. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  228. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  229. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  230. };
  231. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  232. "Six", "Seven", "Eight"};
  233. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  234. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_16",
  235. "KHZ_32", "KHZ_44P1", "KHZ_48",
  236. "KHZ_96", "KHZ_192"};
  237. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  238. "Five", "Six", "Seven",
  239. "Eight"};
  240. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  241. "S32_LE"};
  242. static char const *mi2s_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  243. "S32_LE"};
  244. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  245. "Five", "Six", "Seven", "Eight"};
  246. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  247. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  248. "KHZ_44P1", "KHZ_48", "KHZ_96",
  249. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  250. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  251. "Five", "Six", "Seven",
  252. "Eight"};
  253. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  254. "KHZ_16", "KHZ_22P05",
  255. "KHZ_32", "KHZ_44P1", "KHZ_48",
  256. "KHZ_96", "KHZ_192", "KHZ_384"};
  257. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE"};
  258. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  259. "KHZ_192"};
  260. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  261. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  262. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  263. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  264. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  265. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  266. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  267. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  268. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  269. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  270. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  271. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  272. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  273. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  274. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  275. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  276. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  277. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  278. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_format, mi2s_format_text);
  279. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_format, mi2s_format_text);
  280. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_format, mi2s_format_text);
  281. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_format, mi2s_format_text);
  282. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_format, mi2s_format_text);
  283. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_format, mi2s_format_text);
  284. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_format, mi2s_format_text);
  285. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_format, mi2s_format_text);
  286. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  287. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  288. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  289. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  290. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  291. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  292. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  293. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  294. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  295. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  296. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  297. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  298. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  299. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  300. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  301. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  302. ext_disp_sample_rate_text);
  303. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  304. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  305. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  306. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  307. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  308. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  309. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  310. {
  311. AFE_API_VERSION_I2S_CONFIG,
  312. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  313. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  314. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  315. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  316. 0,
  317. },
  318. {
  319. AFE_API_VERSION_I2S_CONFIG,
  320. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  321. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  322. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  323. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  324. 0,
  325. },
  326. {
  327. AFE_API_VERSION_I2S_CONFIG,
  328. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  329. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  330. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  331. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  332. 0,
  333. },
  334. {
  335. AFE_API_VERSION_I2S_CONFIG,
  336. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  337. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  338. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  339. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  340. 0,
  341. }
  342. };
  343. static struct afe_clk_set mi2s_mclk[MI2S_MAX] = {
  344. {
  345. AFE_API_VERSION_I2S_CONFIG,
  346. Q6AFE_LPASS_CLK_ID_MCLK_3,
  347. Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
  348. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  349. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  350. 0,
  351. },
  352. {
  353. AFE_API_VERSION_I2S_CONFIG,
  354. Q6AFE_LPASS_CLK_ID_MCLK_4,
  355. Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
  356. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  357. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  358. 0,
  359. },
  360. {
  361. AFE_API_VERSION_I2S_CONFIG,
  362. Q6AFE_LPASS_CLK_ID_MCLK_1,
  363. Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
  364. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  365. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  366. 0,
  367. },
  368. {
  369. AFE_API_VERSION_I2S_CONFIG,
  370. Q6AFE_LPASS_CLK_ID_MCLK_2,
  371. Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
  372. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  373. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  374. 0,
  375. }
  376. };
  377. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  378. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  379. struct snd_ctl_elem_value *ucontrol)
  380. {
  381. pr_debug("%s: proxy_rx channels = %d\n",
  382. __func__, proxy_rx_cfg.channels);
  383. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  384. return 0;
  385. }
  386. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  387. struct snd_ctl_elem_value *ucontrol)
  388. {
  389. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  390. pr_debug("%s: proxy_rx channels = %d\n",
  391. __func__, proxy_rx_cfg.channels);
  392. return 1;
  393. }
  394. static int tdm_get_sample_rate(int value)
  395. {
  396. int sample_rate = 0;
  397. switch (value) {
  398. case 0:
  399. sample_rate = SAMPLING_RATE_8KHZ;
  400. break;
  401. case 1:
  402. sample_rate = SAMPLING_RATE_16KHZ;
  403. break;
  404. case 2:
  405. sample_rate = SAMPLING_RATE_32KHZ;
  406. break;
  407. case 3:
  408. sample_rate = SAMPLING_RATE_44P1KHZ;
  409. break;
  410. case 4:
  411. sample_rate = SAMPLING_RATE_48KHZ;
  412. break;
  413. case 5:
  414. sample_rate = SAMPLING_RATE_96KHZ;
  415. break;
  416. case 6:
  417. sample_rate = SAMPLING_RATE_192KHZ;
  418. break;
  419. case 7:
  420. sample_rate = SAMPLING_RATE_352P8KHZ;
  421. break;
  422. case 8:
  423. sample_rate = SAMPLING_RATE_384KHZ;
  424. break;
  425. default:
  426. sample_rate = SAMPLING_RATE_48KHZ;
  427. break;
  428. }
  429. return sample_rate;
  430. }
  431. static int tdm_get_sample_rate_val(int sample_rate)
  432. {
  433. int sample_rate_val = 0;
  434. switch (sample_rate) {
  435. case SAMPLING_RATE_8KHZ:
  436. sample_rate_val = 0;
  437. break;
  438. case SAMPLING_RATE_16KHZ:
  439. sample_rate_val = 1;
  440. break;
  441. case SAMPLING_RATE_32KHZ:
  442. sample_rate_val = 2;
  443. break;
  444. case SAMPLING_RATE_44P1KHZ:
  445. sample_rate_val = 3;
  446. break;
  447. case SAMPLING_RATE_48KHZ:
  448. sample_rate_val = 4;
  449. break;
  450. case SAMPLING_RATE_96KHZ:
  451. sample_rate_val = 5;
  452. break;
  453. case SAMPLING_RATE_192KHZ:
  454. sample_rate_val = 6;
  455. break;
  456. case SAMPLING_RATE_352P8KHZ:
  457. sample_rate_val = 7;
  458. break;
  459. case SAMPLING_RATE_384KHZ:
  460. sample_rate_val = 8;
  461. break;
  462. default:
  463. sample_rate_val = 4;
  464. break;
  465. }
  466. return sample_rate_val;
  467. }
  468. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  469. struct tdm_port *port)
  470. {
  471. if (port) {
  472. if (strnstr(kcontrol->id.name, "PRI",
  473. sizeof(kcontrol->id.name))) {
  474. port->mode = TDM_PRI;
  475. } else if (strnstr(kcontrol->id.name, "SEC",
  476. sizeof(kcontrol->id.name))) {
  477. port->mode = TDM_SEC;
  478. } else if (strnstr(kcontrol->id.name, "TERT",
  479. sizeof(kcontrol->id.name))) {
  480. port->mode = TDM_TERT;
  481. } else if (strnstr(kcontrol->id.name, "QUAT",
  482. sizeof(kcontrol->id.name))) {
  483. port->mode = TDM_QUAT;
  484. } else {
  485. pr_err("%s: unsupported mode in: %s",
  486. __func__, kcontrol->id.name);
  487. return -EINVAL;
  488. }
  489. if (strnstr(kcontrol->id.name, "RX_0",
  490. sizeof(kcontrol->id.name)) ||
  491. strnstr(kcontrol->id.name, "TX_0",
  492. sizeof(kcontrol->id.name))) {
  493. port->channel = TDM_0;
  494. } else if (strnstr(kcontrol->id.name, "RX_1",
  495. sizeof(kcontrol->id.name)) ||
  496. strnstr(kcontrol->id.name, "TX_1",
  497. sizeof(kcontrol->id.name))) {
  498. port->channel = TDM_1;
  499. } else if (strnstr(kcontrol->id.name, "RX_2",
  500. sizeof(kcontrol->id.name)) ||
  501. strnstr(kcontrol->id.name, "TX_2",
  502. sizeof(kcontrol->id.name))) {
  503. port->channel = TDM_2;
  504. } else if (strnstr(kcontrol->id.name, "RX_3",
  505. sizeof(kcontrol->id.name)) ||
  506. strnstr(kcontrol->id.name, "TX_3",
  507. sizeof(kcontrol->id.name))) {
  508. port->channel = TDM_3;
  509. } else if (strnstr(kcontrol->id.name, "RX_4",
  510. sizeof(kcontrol->id.name)) ||
  511. strnstr(kcontrol->id.name, "TX_4",
  512. sizeof(kcontrol->id.name))) {
  513. port->channel = TDM_4;
  514. } else if (strnstr(kcontrol->id.name, "RX_5",
  515. sizeof(kcontrol->id.name)) ||
  516. strnstr(kcontrol->id.name, "TX_5",
  517. sizeof(kcontrol->id.name))) {
  518. port->channel = TDM_5;
  519. } else if (strnstr(kcontrol->id.name, "RX_6",
  520. sizeof(kcontrol->id.name)) ||
  521. strnstr(kcontrol->id.name, "TX_6",
  522. sizeof(kcontrol->id.name))) {
  523. port->channel = TDM_6;
  524. } else if (strnstr(kcontrol->id.name, "RX_7",
  525. sizeof(kcontrol->id.name)) ||
  526. strnstr(kcontrol->id.name, "TX_7",
  527. sizeof(kcontrol->id.name))) {
  528. port->channel = TDM_7;
  529. } else {
  530. pr_err("%s: unsupported channel in: %s",
  531. __func__, kcontrol->id.name);
  532. return -EINVAL;
  533. }
  534. } else
  535. return -EINVAL;
  536. return 0;
  537. }
  538. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  539. struct snd_ctl_elem_value *ucontrol)
  540. {
  541. struct tdm_port port;
  542. int ret = tdm_get_port_idx(kcontrol, &port);
  543. if (ret) {
  544. pr_err("%s: unsupported control: %s",
  545. __func__, kcontrol->id.name);
  546. } else {
  547. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  548. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  549. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  550. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  551. ucontrol->value.enumerated.item[0]);
  552. }
  553. return ret;
  554. }
  555. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  556. struct snd_ctl_elem_value *ucontrol)
  557. {
  558. struct tdm_port port;
  559. int ret = tdm_get_port_idx(kcontrol, &port);
  560. if (ret) {
  561. pr_err("%s: unsupported control: %s",
  562. __func__, kcontrol->id.name);
  563. } else {
  564. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  565. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  566. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  567. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  568. ucontrol->value.enumerated.item[0]);
  569. }
  570. return ret;
  571. }
  572. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  573. struct snd_ctl_elem_value *ucontrol)
  574. {
  575. struct tdm_port port;
  576. int ret = tdm_get_port_idx(kcontrol, &port);
  577. if (ret) {
  578. pr_err("%s: unsupported control: %s",
  579. __func__, kcontrol->id.name);
  580. } else {
  581. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  582. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  583. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  584. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  585. ucontrol->value.enumerated.item[0]);
  586. }
  587. return ret;
  588. }
  589. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  590. struct snd_ctl_elem_value *ucontrol)
  591. {
  592. struct tdm_port port;
  593. int ret = tdm_get_port_idx(kcontrol, &port);
  594. if (ret) {
  595. pr_err("%s: unsupported control: %s",
  596. __func__, kcontrol->id.name);
  597. } else {
  598. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  599. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  600. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  601. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  602. ucontrol->value.enumerated.item[0]);
  603. }
  604. return ret;
  605. }
  606. static int tdm_get_format(int value)
  607. {
  608. int format = 0;
  609. switch (value) {
  610. case 0:
  611. format = SNDRV_PCM_FORMAT_S16_LE;
  612. break;
  613. case 1:
  614. format = SNDRV_PCM_FORMAT_S24_LE;
  615. break;
  616. case 2:
  617. format = SNDRV_PCM_FORMAT_S32_LE;
  618. break;
  619. default:
  620. format = SNDRV_PCM_FORMAT_S16_LE;
  621. break;
  622. }
  623. return format;
  624. }
  625. static int tdm_get_format_val(int format)
  626. {
  627. int value = 0;
  628. switch (format) {
  629. case SNDRV_PCM_FORMAT_S16_LE:
  630. value = 0;
  631. break;
  632. case SNDRV_PCM_FORMAT_S24_LE:
  633. value = 1;
  634. break;
  635. case SNDRV_PCM_FORMAT_S32_LE:
  636. value = 2;
  637. break;
  638. default:
  639. value = 0;
  640. break;
  641. }
  642. return value;
  643. }
  644. static int mi2s_get_format(int value)
  645. {
  646. int format = 0;
  647. switch (value) {
  648. case 0:
  649. format = SNDRV_PCM_FORMAT_S16_LE;
  650. break;
  651. case 1:
  652. format = SNDRV_PCM_FORMAT_S24_LE;
  653. break;
  654. case 2:
  655. format = SNDRV_PCM_FORMAT_S24_3LE;
  656. break;
  657. case 3:
  658. format = SNDRV_PCM_FORMAT_S32_LE;
  659. break;
  660. default:
  661. format = SNDRV_PCM_FORMAT_S16_LE;
  662. break;
  663. }
  664. return format;
  665. }
  666. static int mi2s_get_format_value(int format)
  667. {
  668. int value = 0;
  669. switch (format) {
  670. case SNDRV_PCM_FORMAT_S16_LE:
  671. value = 0;
  672. break;
  673. case SNDRV_PCM_FORMAT_S24_LE:
  674. value = 1;
  675. break;
  676. case SNDRV_PCM_FORMAT_S24_3LE:
  677. value = 2;
  678. break;
  679. case SNDRV_PCM_FORMAT_S32_LE:
  680. value = 3;
  681. break;
  682. default:
  683. value = 0;
  684. break;
  685. }
  686. return value;
  687. }
  688. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  689. struct snd_ctl_elem_value *ucontrol)
  690. {
  691. struct tdm_port port;
  692. int ret = tdm_get_port_idx(kcontrol, &port);
  693. if (ret) {
  694. pr_err("%s: unsupported control: %s",
  695. __func__, kcontrol->id.name);
  696. } else {
  697. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  698. tdm_rx_cfg[port.mode][port.channel].bit_format);
  699. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  700. tdm_rx_cfg[port.mode][port.channel].bit_format,
  701. ucontrol->value.enumerated.item[0]);
  702. }
  703. return ret;
  704. }
  705. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  706. struct snd_ctl_elem_value *ucontrol)
  707. {
  708. struct tdm_port port;
  709. int ret = tdm_get_port_idx(kcontrol, &port);
  710. if (ret) {
  711. pr_err("%s: unsupported control: %s",
  712. __func__, kcontrol->id.name);
  713. } else {
  714. tdm_rx_cfg[port.mode][port.channel].bit_format =
  715. tdm_get_format(ucontrol->value.enumerated.item[0]);
  716. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  717. tdm_rx_cfg[port.mode][port.channel].bit_format,
  718. ucontrol->value.enumerated.item[0]);
  719. }
  720. return ret;
  721. }
  722. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  723. struct snd_ctl_elem_value *ucontrol)
  724. {
  725. struct tdm_port port;
  726. int ret = tdm_get_port_idx(kcontrol, &port);
  727. if (ret) {
  728. pr_err("%s: unsupported control: %s",
  729. __func__, kcontrol->id.name);
  730. } else {
  731. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  732. tdm_tx_cfg[port.mode][port.channel].bit_format);
  733. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  734. tdm_tx_cfg[port.mode][port.channel].bit_format,
  735. ucontrol->value.enumerated.item[0]);
  736. }
  737. return ret;
  738. }
  739. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  740. struct snd_ctl_elem_value *ucontrol)
  741. {
  742. struct tdm_port port;
  743. int ret = tdm_get_port_idx(kcontrol, &port);
  744. if (ret) {
  745. pr_err("%s: unsupported control: %s",
  746. __func__, kcontrol->id.name);
  747. } else {
  748. tdm_tx_cfg[port.mode][port.channel].bit_format =
  749. tdm_get_format(ucontrol->value.enumerated.item[0]);
  750. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  751. tdm_tx_cfg[port.mode][port.channel].bit_format,
  752. ucontrol->value.enumerated.item[0]);
  753. }
  754. return ret;
  755. }
  756. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  757. struct snd_ctl_elem_value *ucontrol)
  758. {
  759. struct tdm_port port;
  760. int ret = tdm_get_port_idx(kcontrol, &port);
  761. if (ret) {
  762. pr_err("%s: unsupported control: %s",
  763. __func__, kcontrol->id.name);
  764. } else {
  765. ucontrol->value.enumerated.item[0] =
  766. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  767. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  768. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  769. ucontrol->value.enumerated.item[0]);
  770. }
  771. return ret;
  772. }
  773. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  774. struct snd_ctl_elem_value *ucontrol)
  775. {
  776. struct tdm_port port;
  777. int ret = tdm_get_port_idx(kcontrol, &port);
  778. if (ret) {
  779. pr_err("%s: unsupported control: %s",
  780. __func__, kcontrol->id.name);
  781. } else {
  782. tdm_rx_cfg[port.mode][port.channel].channels =
  783. ucontrol->value.enumerated.item[0] + 1;
  784. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  785. tdm_rx_cfg[port.mode][port.channel].channels,
  786. ucontrol->value.enumerated.item[0] + 1);
  787. }
  788. return ret;
  789. }
  790. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  791. struct snd_ctl_elem_value *ucontrol)
  792. {
  793. struct tdm_port port;
  794. int ret = tdm_get_port_idx(kcontrol, &port);
  795. if (ret) {
  796. pr_err("%s: unsupported control: %s",
  797. __func__, kcontrol->id.name);
  798. } else {
  799. ucontrol->value.enumerated.item[0] =
  800. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  801. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  802. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  803. ucontrol->value.enumerated.item[0]);
  804. }
  805. return ret;
  806. }
  807. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  808. struct snd_ctl_elem_value *ucontrol)
  809. {
  810. struct tdm_port port;
  811. int ret = tdm_get_port_idx(kcontrol, &port);
  812. if (ret) {
  813. pr_err("%s: unsupported control: %s",
  814. __func__, kcontrol->id.name);
  815. } else {
  816. tdm_tx_cfg[port.mode][port.channel].channels =
  817. ucontrol->value.enumerated.item[0] + 1;
  818. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  819. tdm_tx_cfg[port.mode][port.channel].channels,
  820. ucontrol->value.enumerated.item[0] + 1);
  821. }
  822. return ret;
  823. }
  824. static int aux_pcm_get_sample_rate(int value)
  825. {
  826. int sample_rate;
  827. switch (value) {
  828. case 1:
  829. sample_rate = SAMPLING_RATE_16KHZ;
  830. break;
  831. case 0:
  832. default:
  833. sample_rate = SAMPLING_RATE_8KHZ;
  834. break;
  835. }
  836. return sample_rate;
  837. }
  838. static int aux_pcm_get_sample_rate_val(int sample_rate)
  839. {
  840. int sample_rate_val;
  841. switch (sample_rate) {
  842. case SAMPLING_RATE_16KHZ:
  843. sample_rate_val = 1;
  844. break;
  845. case SAMPLING_RATE_8KHZ:
  846. default:
  847. sample_rate_val = 0;
  848. break;
  849. }
  850. return sample_rate_val;
  851. }
  852. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  853. {
  854. int idx;
  855. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  856. sizeof("PRIM_AUX_PCM")))
  857. idx = PRIM_AUX_PCM;
  858. else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  859. sizeof("SEC_AUX_PCM")))
  860. idx = SEC_AUX_PCM;
  861. else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  862. sizeof("TERT_AUX_PCM")))
  863. idx = TERT_AUX_PCM;
  864. else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  865. sizeof("QUAT_AUX_PCM")))
  866. idx = QUAT_AUX_PCM;
  867. else {
  868. pr_err("%s: unsupported port: %s",
  869. __func__, kcontrol->id.name);
  870. idx = -EINVAL;
  871. }
  872. return idx;
  873. }
  874. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  875. struct snd_ctl_elem_value *ucontrol)
  876. {
  877. int idx = aux_pcm_get_port_idx(kcontrol);
  878. if (idx < 0)
  879. return idx;
  880. aux_pcm_rx_cfg[idx].sample_rate =
  881. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  882. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  883. idx, aux_pcm_rx_cfg[idx].sample_rate,
  884. ucontrol->value.enumerated.item[0]);
  885. return 0;
  886. }
  887. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  888. struct snd_ctl_elem_value *ucontrol)
  889. {
  890. int idx = aux_pcm_get_port_idx(kcontrol);
  891. if (idx < 0)
  892. return idx;
  893. ucontrol->value.enumerated.item[0] =
  894. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  895. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  896. idx, aux_pcm_rx_cfg[idx].sample_rate,
  897. ucontrol->value.enumerated.item[0]);
  898. return 0;
  899. }
  900. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  901. struct snd_ctl_elem_value *ucontrol)
  902. {
  903. int idx = aux_pcm_get_port_idx(kcontrol);
  904. if (idx < 0)
  905. return idx;
  906. aux_pcm_tx_cfg[idx].sample_rate =
  907. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  908. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  909. idx, aux_pcm_tx_cfg[idx].sample_rate,
  910. ucontrol->value.enumerated.item[0]);
  911. return 0;
  912. }
  913. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  914. struct snd_ctl_elem_value *ucontrol)
  915. {
  916. int idx = aux_pcm_get_port_idx(kcontrol);
  917. if (idx < 0)
  918. return idx;
  919. ucontrol->value.enumerated.item[0] =
  920. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  921. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  922. idx, aux_pcm_tx_cfg[idx].sample_rate,
  923. ucontrol->value.enumerated.item[0]);
  924. return 0;
  925. }
  926. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  927. {
  928. int idx;
  929. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  930. sizeof("PRIM_MI2S_RX")))
  931. idx = PRIM_MI2S;
  932. else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  933. sizeof("SEC_MI2S_RX")))
  934. idx = SEC_MI2S;
  935. else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  936. sizeof("TERT_MI2S_RX")))
  937. idx = TERT_MI2S;
  938. else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  939. sizeof("QUAT_MI2S_RX")))
  940. idx = QUAT_MI2S;
  941. else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  942. sizeof("PRIM_MI2S_TX")))
  943. idx = PRIM_MI2S;
  944. else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  945. sizeof("SEC_MI2S_TX")))
  946. idx = SEC_MI2S;
  947. else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  948. sizeof("TERT_MI2S_TX")))
  949. idx = TERT_MI2S;
  950. else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  951. sizeof("QUAT_MI2S_TX")))
  952. idx = QUAT_MI2S;
  953. else {
  954. pr_err("%s: unsupported channel: %s",
  955. __func__, kcontrol->id.name);
  956. idx = -EINVAL;
  957. }
  958. return idx;
  959. }
  960. static int mi2s_get_sample_rate_val(int sample_rate)
  961. {
  962. int sample_rate_val;
  963. switch (sample_rate) {
  964. case SAMPLING_RATE_8KHZ:
  965. sample_rate_val = 0;
  966. break;
  967. case SAMPLING_RATE_16KHZ:
  968. sample_rate_val = 1;
  969. break;
  970. case SAMPLING_RATE_32KHZ:
  971. sample_rate_val = 2;
  972. break;
  973. case SAMPLING_RATE_44P1KHZ:
  974. sample_rate_val = 3;
  975. break;
  976. case SAMPLING_RATE_48KHZ:
  977. sample_rate_val = 4;
  978. break;
  979. case SAMPLING_RATE_96KHZ:
  980. sample_rate_val = 5;
  981. break;
  982. case SAMPLING_RATE_192KHZ:
  983. sample_rate_val = 6;
  984. break;
  985. default:
  986. sample_rate_val = 4;
  987. break;
  988. }
  989. return sample_rate_val;
  990. }
  991. static int mi2s_get_sample_rate(int value)
  992. {
  993. int sample_rate;
  994. switch (value) {
  995. case 0:
  996. sample_rate = SAMPLING_RATE_8KHZ;
  997. break;
  998. case 1:
  999. sample_rate = SAMPLING_RATE_16KHZ;
  1000. break;
  1001. case 2:
  1002. sample_rate = SAMPLING_RATE_32KHZ;
  1003. break;
  1004. case 3:
  1005. sample_rate = SAMPLING_RATE_44P1KHZ;
  1006. break;
  1007. case 4:
  1008. sample_rate = SAMPLING_RATE_48KHZ;
  1009. break;
  1010. case 5:
  1011. sample_rate = SAMPLING_RATE_96KHZ;
  1012. break;
  1013. case 6:
  1014. sample_rate = SAMPLING_RATE_192KHZ;
  1015. break;
  1016. default:
  1017. sample_rate = SAMPLING_RATE_48KHZ;
  1018. break;
  1019. }
  1020. return sample_rate;
  1021. }
  1022. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1023. struct snd_ctl_elem_value *ucontrol)
  1024. {
  1025. int idx = mi2s_get_port_idx(kcontrol);
  1026. if (idx < 0)
  1027. return idx;
  1028. mi2s_rx_cfg[idx].sample_rate =
  1029. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1030. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1031. idx, mi2s_rx_cfg[idx].sample_rate,
  1032. ucontrol->value.enumerated.item[0]);
  1033. return 0;
  1034. }
  1035. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1036. struct snd_ctl_elem_value *ucontrol)
  1037. {
  1038. int idx = mi2s_get_port_idx(kcontrol);
  1039. if (idx < 0)
  1040. return idx;
  1041. ucontrol->value.enumerated.item[0] =
  1042. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  1043. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1044. idx, mi2s_rx_cfg[idx].sample_rate,
  1045. ucontrol->value.enumerated.item[0]);
  1046. return 0;
  1047. }
  1048. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1049. struct snd_ctl_elem_value *ucontrol)
  1050. {
  1051. int idx = mi2s_get_port_idx(kcontrol);
  1052. if (idx < 0)
  1053. return idx;
  1054. mi2s_tx_cfg[idx].sample_rate =
  1055. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1056. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1057. idx, mi2s_tx_cfg[idx].sample_rate,
  1058. ucontrol->value.enumerated.item[0]);
  1059. return 0;
  1060. }
  1061. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1062. struct snd_ctl_elem_value *ucontrol)
  1063. {
  1064. int idx = mi2s_get_port_idx(kcontrol);
  1065. if (idx < 0)
  1066. return idx;
  1067. ucontrol->value.enumerated.item[0] =
  1068. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  1069. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1070. idx, mi2s_tx_cfg[idx].sample_rate,
  1071. ucontrol->value.enumerated.item[0]);
  1072. return 0;
  1073. }
  1074. static int mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  1075. struct snd_ctl_elem_value *ucontrol)
  1076. {
  1077. int idx = mi2s_get_port_idx(kcontrol);
  1078. if (idx < 0)
  1079. return idx;
  1080. mi2s_tx_cfg[idx].bit_format =
  1081. mi2s_get_format(ucontrol->value.enumerated.item[0]);
  1082. pr_debug("%s: idx[%d] _tx_format = %d, item = %d\n", __func__,
  1083. idx, mi2s_tx_cfg[idx].bit_format,
  1084. ucontrol->value.enumerated.item[0]);
  1085. return 0;
  1086. }
  1087. static int mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  1088. struct snd_ctl_elem_value *ucontrol)
  1089. {
  1090. int idx = mi2s_get_port_idx(kcontrol);
  1091. if (idx < 0)
  1092. return idx;
  1093. ucontrol->value.enumerated.item[0] =
  1094. mi2s_get_format_value(mi2s_tx_cfg[idx].bit_format);
  1095. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1096. idx, mi2s_tx_cfg[idx].bit_format,
  1097. ucontrol->value.enumerated.item[0]);
  1098. return 0;
  1099. }
  1100. static int mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  1101. struct snd_ctl_elem_value *ucontrol)
  1102. {
  1103. int idx = mi2s_get_port_idx(kcontrol);
  1104. if (idx < 0)
  1105. return idx;
  1106. mi2s_rx_cfg[idx].bit_format =
  1107. mi2s_get_format(ucontrol->value.enumerated.item[0]);
  1108. pr_debug("%s: idx[%d] _rx_format = %d, item = %d\n", __func__,
  1109. idx, mi2s_rx_cfg[idx].bit_format,
  1110. ucontrol->value.enumerated.item[0]);
  1111. return 0;
  1112. }
  1113. static int mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  1114. struct snd_ctl_elem_value *ucontrol)
  1115. {
  1116. int idx = mi2s_get_port_idx(kcontrol);
  1117. if (idx < 0)
  1118. return idx;
  1119. ucontrol->value.enumerated.item[0] =
  1120. mi2s_get_format_value(mi2s_rx_cfg[idx].bit_format);
  1121. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1122. idx, mi2s_rx_cfg[idx].bit_format,
  1123. ucontrol->value.enumerated.item[0]);
  1124. return 0;
  1125. }
  1126. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  1127. struct snd_ctl_elem_value *ucontrol)
  1128. {
  1129. int idx = mi2s_get_port_idx(kcontrol);
  1130. if (idx < 0)
  1131. return idx;
  1132. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1133. idx, mi2s_rx_cfg[idx].channels);
  1134. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  1135. return 0;
  1136. }
  1137. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  1138. struct snd_ctl_elem_value *ucontrol)
  1139. {
  1140. int idx = mi2s_get_port_idx(kcontrol);
  1141. if (idx < 0)
  1142. return idx;
  1143. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1144. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1145. idx, mi2s_rx_cfg[idx].channels);
  1146. return 1;
  1147. }
  1148. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  1149. struct snd_ctl_elem_value *ucontrol)
  1150. {
  1151. int idx = mi2s_get_port_idx(kcontrol);
  1152. if (idx < 0)
  1153. return idx;
  1154. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1155. idx, mi2s_tx_cfg[idx].channels);
  1156. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  1157. return 0;
  1158. }
  1159. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  1160. struct snd_ctl_elem_value *ucontrol)
  1161. {
  1162. int idx = mi2s_get_port_idx(kcontrol);
  1163. if (idx < 0)
  1164. return idx;
  1165. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1166. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1167. idx, mi2s_tx_cfg[idx].channels);
  1168. return 1;
  1169. }
  1170. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  1171. struct snd_ctl_elem_value *ucontrol)
  1172. {
  1173. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  1174. usb_rx_cfg.channels);
  1175. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  1176. return 0;
  1177. }
  1178. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  1179. struct snd_ctl_elem_value *ucontrol)
  1180. {
  1181. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1182. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  1183. return 1;
  1184. }
  1185. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1186. struct snd_ctl_elem_value *ucontrol)
  1187. {
  1188. int sample_rate_val;
  1189. switch (usb_rx_cfg.sample_rate) {
  1190. case SAMPLING_RATE_384KHZ:
  1191. sample_rate_val = 9;
  1192. break;
  1193. case SAMPLING_RATE_192KHZ:
  1194. sample_rate_val = 8;
  1195. break;
  1196. case SAMPLING_RATE_96KHZ:
  1197. sample_rate_val = 7;
  1198. break;
  1199. case SAMPLING_RATE_48KHZ:
  1200. sample_rate_val = 6;
  1201. break;
  1202. case SAMPLING_RATE_44P1KHZ:
  1203. sample_rate_val = 5;
  1204. break;
  1205. case SAMPLING_RATE_32KHZ:
  1206. sample_rate_val = 4;
  1207. break;
  1208. case SAMPLING_RATE_22P05KHZ:
  1209. sample_rate_val = 3;
  1210. break;
  1211. case SAMPLING_RATE_16KHZ:
  1212. sample_rate_val = 2;
  1213. break;
  1214. case SAMPLING_RATE_11P025KHZ:
  1215. sample_rate_val = 1;
  1216. break;
  1217. case SAMPLING_RATE_8KHZ:
  1218. default:
  1219. sample_rate_val = 0;
  1220. break;
  1221. }
  1222. ucontrol->value.integer.value[0] = sample_rate_val;
  1223. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  1224. usb_rx_cfg.sample_rate);
  1225. return 0;
  1226. }
  1227. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1228. struct snd_ctl_elem_value *ucontrol)
  1229. {
  1230. switch (ucontrol->value.integer.value[0]) {
  1231. case 9:
  1232. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1233. break;
  1234. case 8:
  1235. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1236. break;
  1237. case 7:
  1238. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1239. break;
  1240. case 6:
  1241. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1242. break;
  1243. case 5:
  1244. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1245. break;
  1246. case 4:
  1247. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1248. break;
  1249. case 3:
  1250. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1251. break;
  1252. case 2:
  1253. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1254. break;
  1255. case 1:
  1256. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1257. break;
  1258. case 0:
  1259. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1260. break;
  1261. default:
  1262. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1263. break;
  1264. }
  1265. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  1266. __func__, ucontrol->value.integer.value[0],
  1267. usb_rx_cfg.sample_rate);
  1268. return 0;
  1269. }
  1270. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  1271. struct snd_ctl_elem_value *ucontrol)
  1272. {
  1273. switch (usb_rx_cfg.bit_format) {
  1274. case SNDRV_PCM_FORMAT_S32_LE:
  1275. ucontrol->value.integer.value[0] = 3;
  1276. break;
  1277. case SNDRV_PCM_FORMAT_S24_3LE:
  1278. ucontrol->value.integer.value[0] = 2;
  1279. break;
  1280. case SNDRV_PCM_FORMAT_S24_LE:
  1281. ucontrol->value.integer.value[0] = 1;
  1282. break;
  1283. case SNDRV_PCM_FORMAT_S16_LE:
  1284. default:
  1285. ucontrol->value.integer.value[0] = 0;
  1286. break;
  1287. }
  1288. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1289. __func__, usb_rx_cfg.bit_format,
  1290. ucontrol->value.integer.value[0]);
  1291. return 0;
  1292. }
  1293. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  1294. struct snd_ctl_elem_value *ucontrol)
  1295. {
  1296. int rc = 0;
  1297. switch (ucontrol->value.integer.value[0]) {
  1298. case 3:
  1299. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1300. break;
  1301. case 2:
  1302. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1303. break;
  1304. case 1:
  1305. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1306. break;
  1307. case 0:
  1308. default:
  1309. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1310. break;
  1311. }
  1312. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1313. __func__, usb_rx_cfg.bit_format,
  1314. ucontrol->value.integer.value[0]);
  1315. return rc;
  1316. }
  1317. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  1318. struct snd_ctl_elem_value *ucontrol)
  1319. {
  1320. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  1321. usb_tx_cfg.channels);
  1322. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  1323. return 0;
  1324. }
  1325. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  1326. struct snd_ctl_elem_value *ucontrol)
  1327. {
  1328. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1329. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  1330. return 1;
  1331. }
  1332. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1333. struct snd_ctl_elem_value *ucontrol)
  1334. {
  1335. int sample_rate_val;
  1336. switch (usb_tx_cfg.sample_rate) {
  1337. case SAMPLING_RATE_384KHZ:
  1338. sample_rate_val = 9;
  1339. break;
  1340. case SAMPLING_RATE_192KHZ:
  1341. sample_rate_val = 8;
  1342. break;
  1343. case SAMPLING_RATE_96KHZ:
  1344. sample_rate_val = 7;
  1345. break;
  1346. case SAMPLING_RATE_48KHZ:
  1347. sample_rate_val = 6;
  1348. break;
  1349. case SAMPLING_RATE_44P1KHZ:
  1350. sample_rate_val = 5;
  1351. break;
  1352. case SAMPLING_RATE_32KHZ:
  1353. sample_rate_val = 4;
  1354. break;
  1355. case SAMPLING_RATE_22P05KHZ:
  1356. sample_rate_val = 3;
  1357. break;
  1358. case SAMPLING_RATE_16KHZ:
  1359. sample_rate_val = 2;
  1360. break;
  1361. case SAMPLING_RATE_11P025KHZ:
  1362. sample_rate_val = 1;
  1363. break;
  1364. case SAMPLING_RATE_8KHZ:
  1365. sample_rate_val = 0;
  1366. break;
  1367. default:
  1368. sample_rate_val = 6;
  1369. break;
  1370. }
  1371. ucontrol->value.integer.value[0] = sample_rate_val;
  1372. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  1373. usb_tx_cfg.sample_rate);
  1374. return 0;
  1375. }
  1376. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1377. struct snd_ctl_elem_value *ucontrol)
  1378. {
  1379. switch (ucontrol->value.integer.value[0]) {
  1380. case 9:
  1381. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1382. break;
  1383. case 8:
  1384. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1385. break;
  1386. case 7:
  1387. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1388. break;
  1389. case 6:
  1390. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1391. break;
  1392. case 5:
  1393. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1394. break;
  1395. case 4:
  1396. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1397. break;
  1398. case 3:
  1399. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1400. break;
  1401. case 2:
  1402. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1403. break;
  1404. case 1:
  1405. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1406. break;
  1407. case 0:
  1408. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1409. break;
  1410. default:
  1411. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1412. break;
  1413. }
  1414. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  1415. __func__, ucontrol->value.integer.value[0],
  1416. usb_tx_cfg.sample_rate);
  1417. return 0;
  1418. }
  1419. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  1420. struct snd_ctl_elem_value *ucontrol)
  1421. {
  1422. switch (usb_tx_cfg.bit_format) {
  1423. case SNDRV_PCM_FORMAT_S32_LE:
  1424. ucontrol->value.integer.value[0] = 3;
  1425. break;
  1426. case SNDRV_PCM_FORMAT_S24_3LE:
  1427. ucontrol->value.integer.value[0] = 2;
  1428. break;
  1429. case SNDRV_PCM_FORMAT_S24_LE:
  1430. ucontrol->value.integer.value[0] = 1;
  1431. break;
  1432. case SNDRV_PCM_FORMAT_S16_LE:
  1433. default:
  1434. ucontrol->value.integer.value[0] = 0;
  1435. break;
  1436. }
  1437. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1438. __func__, usb_tx_cfg.bit_format,
  1439. ucontrol->value.integer.value[0]);
  1440. return 0;
  1441. }
  1442. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  1443. struct snd_ctl_elem_value *ucontrol)
  1444. {
  1445. int rc = 0;
  1446. switch (ucontrol->value.integer.value[0]) {
  1447. case 3:
  1448. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1449. break;
  1450. case 2:
  1451. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1452. break;
  1453. case 1:
  1454. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1455. break;
  1456. case 0:
  1457. default:
  1458. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1459. break;
  1460. }
  1461. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1462. __func__, usb_tx_cfg.bit_format,
  1463. ucontrol->value.integer.value[0]);
  1464. return rc;
  1465. }
  1466. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  1467. {
  1468. int idx;
  1469. if (strnstr(kcontrol->id.name, "Display Port RX",
  1470. sizeof("Display Port RX")))
  1471. idx = DP_RX_IDX;
  1472. else {
  1473. pr_err("%s: unsupported BE: %s",
  1474. __func__, kcontrol->id.name);
  1475. idx = -EINVAL;
  1476. }
  1477. return idx;
  1478. }
  1479. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  1480. struct snd_ctl_elem_value *ucontrol)
  1481. {
  1482. int idx = ext_disp_get_port_idx(kcontrol);
  1483. if (idx < 0)
  1484. return idx;
  1485. switch (ext_disp_rx_cfg[idx].bit_format) {
  1486. case SNDRV_PCM_FORMAT_S24_LE:
  1487. ucontrol->value.integer.value[0] = 1;
  1488. break;
  1489. case SNDRV_PCM_FORMAT_S16_LE:
  1490. default:
  1491. ucontrol->value.integer.value[0] = 0;
  1492. break;
  1493. }
  1494. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  1495. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  1496. ucontrol->value.integer.value[0]);
  1497. return 0;
  1498. }
  1499. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  1500. struct snd_ctl_elem_value *ucontrol)
  1501. {
  1502. int idx = ext_disp_get_port_idx(kcontrol);
  1503. if (idx < 0)
  1504. return idx;
  1505. switch (ucontrol->value.integer.value[0]) {
  1506. case 1:
  1507. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1508. break;
  1509. case 0:
  1510. default:
  1511. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1512. break;
  1513. }
  1514. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  1515. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  1516. ucontrol->value.integer.value[0]);
  1517. return 0;
  1518. }
  1519. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  1520. struct snd_ctl_elem_value *ucontrol)
  1521. {
  1522. int idx = ext_disp_get_port_idx(kcontrol);
  1523. if (idx < 0)
  1524. return idx;
  1525. ucontrol->value.integer.value[0] =
  1526. ext_disp_rx_cfg[idx].channels - 2;
  1527. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1528. idx, ext_disp_rx_cfg[idx].channels);
  1529. return 0;
  1530. }
  1531. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  1532. struct snd_ctl_elem_value *ucontrol)
  1533. {
  1534. int idx = ext_disp_get_port_idx(kcontrol);
  1535. if (idx < 0)
  1536. return idx;
  1537. ext_disp_rx_cfg[idx].channels =
  1538. ucontrol->value.integer.value[0] + 2;
  1539. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1540. idx, ext_disp_rx_cfg[idx].channels);
  1541. return 1;
  1542. }
  1543. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1544. struct snd_ctl_elem_value *ucontrol)
  1545. {
  1546. int sample_rate_val;
  1547. int idx = ext_disp_get_port_idx(kcontrol);
  1548. if (idx < 0)
  1549. return idx;
  1550. switch (ext_disp_rx_cfg[idx].sample_rate) {
  1551. case SAMPLING_RATE_192KHZ:
  1552. sample_rate_val = 2;
  1553. break;
  1554. case SAMPLING_RATE_96KHZ:
  1555. sample_rate_val = 1;
  1556. break;
  1557. case SAMPLING_RATE_48KHZ:
  1558. default:
  1559. sample_rate_val = 0;
  1560. break;
  1561. }
  1562. ucontrol->value.integer.value[0] = sample_rate_val;
  1563. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  1564. idx, ext_disp_rx_cfg[idx].sample_rate);
  1565. return 0;
  1566. }
  1567. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1568. struct snd_ctl_elem_value *ucontrol)
  1569. {
  1570. int idx = ext_disp_get_port_idx(kcontrol);
  1571. if (idx < 0)
  1572. return idx;
  1573. switch (ucontrol->value.integer.value[0]) {
  1574. case 2:
  1575. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  1576. break;
  1577. case 1:
  1578. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  1579. break;
  1580. case 0:
  1581. default:
  1582. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  1583. break;
  1584. }
  1585. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  1586. __func__, ucontrol->value.integer.value[0], idx,
  1587. ext_disp_rx_cfg[idx].sample_rate);
  1588. return 0;
  1589. }
  1590. const struct snd_kcontrol_new msm_common_snd_controls[] = {
  1591. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  1592. proxy_rx_ch_get, proxy_rx_ch_put),
  1593. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  1594. aux_pcm_rx_sample_rate_get,
  1595. aux_pcm_rx_sample_rate_put),
  1596. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  1597. aux_pcm_rx_sample_rate_get,
  1598. aux_pcm_rx_sample_rate_put),
  1599. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  1600. aux_pcm_rx_sample_rate_get,
  1601. aux_pcm_rx_sample_rate_put),
  1602. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  1603. aux_pcm_rx_sample_rate_get,
  1604. aux_pcm_rx_sample_rate_put),
  1605. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  1606. aux_pcm_tx_sample_rate_get,
  1607. aux_pcm_tx_sample_rate_put),
  1608. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  1609. aux_pcm_tx_sample_rate_get,
  1610. aux_pcm_tx_sample_rate_put),
  1611. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  1612. aux_pcm_tx_sample_rate_get,
  1613. aux_pcm_tx_sample_rate_put),
  1614. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  1615. aux_pcm_tx_sample_rate_get,
  1616. aux_pcm_tx_sample_rate_put),
  1617. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  1618. mi2s_rx_sample_rate_get,
  1619. mi2s_rx_sample_rate_put),
  1620. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  1621. mi2s_rx_sample_rate_get,
  1622. mi2s_rx_sample_rate_put),
  1623. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  1624. mi2s_rx_sample_rate_get,
  1625. mi2s_rx_sample_rate_put),
  1626. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  1627. mi2s_rx_sample_rate_get,
  1628. mi2s_rx_sample_rate_put),
  1629. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  1630. mi2s_tx_sample_rate_get,
  1631. mi2s_tx_sample_rate_put),
  1632. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  1633. mi2s_tx_sample_rate_get,
  1634. mi2s_tx_sample_rate_put),
  1635. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  1636. mi2s_tx_sample_rate_get,
  1637. mi2s_tx_sample_rate_put),
  1638. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  1639. mi2s_tx_sample_rate_get,
  1640. mi2s_tx_sample_rate_put),
  1641. SOC_ENUM_EXT("PRIM_MI2S_RX Format", prim_mi2s_rx_format,
  1642. mi2s_rx_format_get,
  1643. mi2s_rx_format_put),
  1644. SOC_ENUM_EXT("SEC_MI2S_RX Format", sec_mi2s_rx_format,
  1645. mi2s_rx_format_get,
  1646. mi2s_rx_format_put),
  1647. SOC_ENUM_EXT("TERT_MI2S_RX Format", tert_mi2s_rx_format,
  1648. mi2s_rx_format_get,
  1649. mi2s_rx_format_put),
  1650. SOC_ENUM_EXT("QUAT_MI2S_RX Format", quat_mi2s_rx_format,
  1651. mi2s_rx_format_get,
  1652. mi2s_rx_format_put),
  1653. SOC_ENUM_EXT("PRIM_MI2S_TX Format", prim_mi2s_tx_format,
  1654. mi2s_tx_format_get,
  1655. mi2s_tx_format_put),
  1656. SOC_ENUM_EXT("SEC_MI2S_TX Format", sec_mi2s_tx_format,
  1657. mi2s_tx_format_get,
  1658. mi2s_tx_format_put),
  1659. SOC_ENUM_EXT("TERT_MI2S_TX Format", tert_mi2s_tx_format,
  1660. mi2s_tx_format_get,
  1661. mi2s_tx_format_put),
  1662. SOC_ENUM_EXT("QUAT_MI2S_TX Format", quat_mi2s_tx_format,
  1663. mi2s_tx_format_get,
  1664. mi2s_tx_format_put),
  1665. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  1666. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  1667. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  1668. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  1669. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  1670. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  1671. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  1672. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  1673. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  1674. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  1675. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  1676. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  1677. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  1678. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  1679. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  1680. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  1681. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  1682. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  1683. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  1684. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  1685. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  1686. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  1687. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  1688. usb_audio_rx_format_get, usb_audio_rx_format_put),
  1689. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  1690. usb_audio_tx_format_get, usb_audio_tx_format_put),
  1691. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  1692. ext_disp_rx_format_get, ext_disp_rx_format_put),
  1693. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  1694. usb_audio_rx_sample_rate_get,
  1695. usb_audio_rx_sample_rate_put),
  1696. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  1697. usb_audio_tx_sample_rate_get,
  1698. usb_audio_tx_sample_rate_put),
  1699. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  1700. ext_disp_rx_sample_rate_get,
  1701. ext_disp_rx_sample_rate_put),
  1702. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  1703. tdm_rx_sample_rate_get,
  1704. tdm_rx_sample_rate_put),
  1705. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  1706. tdm_tx_sample_rate_get,
  1707. tdm_tx_sample_rate_put),
  1708. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  1709. tdm_rx_format_get,
  1710. tdm_rx_format_put),
  1711. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  1712. tdm_tx_format_get,
  1713. tdm_tx_format_put),
  1714. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  1715. tdm_rx_ch_get,
  1716. tdm_rx_ch_put),
  1717. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  1718. tdm_tx_ch_get,
  1719. tdm_tx_ch_put),
  1720. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  1721. tdm_rx_sample_rate_get,
  1722. tdm_rx_sample_rate_put),
  1723. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  1724. tdm_tx_sample_rate_get,
  1725. tdm_tx_sample_rate_put),
  1726. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  1727. tdm_rx_format_get,
  1728. tdm_rx_format_put),
  1729. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  1730. tdm_tx_format_get,
  1731. tdm_tx_format_put),
  1732. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  1733. tdm_rx_ch_get,
  1734. tdm_rx_ch_put),
  1735. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  1736. tdm_tx_ch_get,
  1737. tdm_tx_ch_put),
  1738. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  1739. tdm_rx_sample_rate_get,
  1740. tdm_rx_sample_rate_put),
  1741. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  1742. tdm_tx_sample_rate_get,
  1743. tdm_tx_sample_rate_put),
  1744. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  1745. tdm_rx_format_get,
  1746. tdm_rx_format_put),
  1747. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  1748. tdm_tx_format_get,
  1749. tdm_tx_format_put),
  1750. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  1751. tdm_rx_ch_get,
  1752. tdm_rx_ch_put),
  1753. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  1754. tdm_tx_ch_get,
  1755. tdm_tx_ch_put),
  1756. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  1757. tdm_rx_sample_rate_get,
  1758. tdm_rx_sample_rate_put),
  1759. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  1760. tdm_tx_sample_rate_get,
  1761. tdm_tx_sample_rate_put),
  1762. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  1763. tdm_rx_format_get,
  1764. tdm_rx_format_put),
  1765. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  1766. tdm_tx_format_get,
  1767. tdm_tx_format_put),
  1768. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  1769. tdm_rx_ch_get,
  1770. tdm_rx_ch_put),
  1771. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  1772. tdm_tx_ch_get,
  1773. tdm_tx_ch_put),
  1774. };
  1775. /**
  1776. * msm_common_snd_controls_size - to return controls size
  1777. *
  1778. * Return: returns size of common controls array
  1779. */
  1780. int msm_common_snd_controls_size(void)
  1781. {
  1782. return ARRAY_SIZE(msm_common_snd_controls);
  1783. }
  1784. EXPORT_SYMBOL(msm_common_snd_controls_size);
  1785. static inline int param_is_mask(int p)
  1786. {
  1787. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  1788. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  1789. }
  1790. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  1791. int n)
  1792. {
  1793. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  1794. }
  1795. static void param_set_mask(struct snd_pcm_hw_params *p, int n, unsigned int bit)
  1796. {
  1797. if (bit >= SNDRV_MASK_MAX)
  1798. return;
  1799. if (param_is_mask(n)) {
  1800. struct snd_mask *m = param_to_mask(p, n);
  1801. m->bits[0] = 0;
  1802. m->bits[1] = 0;
  1803. m->bits[bit >> 5] |= (1 << (bit & 31));
  1804. }
  1805. }
  1806. static int msm_ext_disp_get_idx_from_beid(int32_t id)
  1807. {
  1808. int idx;
  1809. switch (id) {
  1810. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  1811. idx = DP_RX_IDX;
  1812. break;
  1813. default:
  1814. pr_err("%s: Incorrect ext_disp id %d\n", __func__, id);
  1815. idx = -EINVAL;
  1816. break;
  1817. }
  1818. return idx;
  1819. }
  1820. /**
  1821. * msm_common_be_hw_params_fixup - updates settings of ALSA BE hw params.
  1822. *
  1823. * @rtd: runtime dailink instance
  1824. * @params: HW params of associated backend dailink.
  1825. *
  1826. * Returns 0.
  1827. */
  1828. int msm_common_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  1829. struct snd_pcm_hw_params *params)
  1830. {
  1831. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  1832. struct snd_interval *rate = hw_param_interval(params,
  1833. SNDRV_PCM_HW_PARAM_RATE);
  1834. struct snd_interval *channels = hw_param_interval(params,
  1835. SNDRV_PCM_HW_PARAM_CHANNELS);
  1836. int rc = 0;
  1837. int idx;
  1838. pr_debug("%s: format = %d, rate = %d\n",
  1839. __func__, params_format(params), params_rate(params));
  1840. switch (dai_link->id) {
  1841. case MSM_BACKEND_DAI_USB_RX:
  1842. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  1843. usb_rx_cfg.bit_format);
  1844. rate->min = rate->max = usb_rx_cfg.sample_rate;
  1845. channels->min = channels->max = usb_rx_cfg.channels;
  1846. break;
  1847. case MSM_BACKEND_DAI_USB_TX:
  1848. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  1849. usb_tx_cfg.bit_format);
  1850. rate->min = rate->max = usb_tx_cfg.sample_rate;
  1851. channels->min = channels->max = usb_tx_cfg.channels;
  1852. break;
  1853. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  1854. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  1855. if (idx < 0) {
  1856. pr_err("%s: Incorrect ext disp idx %d\n",
  1857. __func__, idx);
  1858. rc = idx;
  1859. break;
  1860. }
  1861. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  1862. ext_disp_rx_cfg[idx].bit_format);
  1863. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  1864. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  1865. break;
  1866. case MSM_BACKEND_DAI_AFE_PCM_RX:
  1867. channels->min = channels->max = proxy_rx_cfg.channels;
  1868. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  1869. break;
  1870. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  1871. channels->min = channels->max =
  1872. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  1873. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  1874. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  1875. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  1876. break;
  1877. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  1878. channels->min = channels->max =
  1879. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  1880. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  1881. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  1882. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  1883. break;
  1884. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  1885. channels->min = channels->max =
  1886. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  1887. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  1888. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  1889. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  1890. break;
  1891. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  1892. channels->min = channels->max =
  1893. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  1894. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  1895. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  1896. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  1897. break;
  1898. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  1899. channels->min = channels->max =
  1900. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  1901. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  1902. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  1903. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  1904. break;
  1905. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  1906. channels->min = channels->max =
  1907. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  1908. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  1909. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  1910. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  1911. break;
  1912. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  1913. channels->min = channels->max =
  1914. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  1915. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  1916. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  1917. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  1918. break;
  1919. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  1920. channels->min = channels->max =
  1921. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  1922. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  1923. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  1924. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  1925. break;
  1926. case MSM_BACKEND_DAI_AUXPCM_RX:
  1927. rate->min = rate->max =
  1928. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  1929. channels->min = channels->max =
  1930. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  1931. break;
  1932. case MSM_BACKEND_DAI_AUXPCM_TX:
  1933. rate->min = rate->max =
  1934. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  1935. channels->min = channels->max =
  1936. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  1937. break;
  1938. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  1939. rate->min = rate->max =
  1940. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  1941. channels->min = channels->max =
  1942. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  1943. break;
  1944. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  1945. rate->min = rate->max =
  1946. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  1947. channels->min = channels->max =
  1948. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  1949. break;
  1950. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  1951. rate->min = rate->max =
  1952. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  1953. channels->min = channels->max =
  1954. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  1955. break;
  1956. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  1957. rate->min = rate->max =
  1958. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  1959. channels->min = channels->max =
  1960. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  1961. break;
  1962. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  1963. rate->min = rate->max =
  1964. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  1965. channels->min = channels->max =
  1966. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  1967. break;
  1968. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  1969. rate->min = rate->max =
  1970. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  1971. channels->min = channels->max =
  1972. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  1973. break;
  1974. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  1975. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  1976. channels->min = channels->max =
  1977. mi2s_rx_cfg[PRIM_MI2S].channels;
  1978. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  1979. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  1980. break;
  1981. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  1982. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  1983. channels->min = channels->max =
  1984. mi2s_tx_cfg[PRIM_MI2S].channels;
  1985. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  1986. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  1987. break;
  1988. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  1989. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  1990. channels->min = channels->max =
  1991. mi2s_rx_cfg[SEC_MI2S].channels;
  1992. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  1993. mi2s_rx_cfg[SEC_MI2S].bit_format);
  1994. break;
  1995. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  1996. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  1997. channels->min = channels->max =
  1998. mi2s_tx_cfg[SEC_MI2S].channels;
  1999. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2000. mi2s_tx_cfg[SEC_MI2S].bit_format);
  2001. break;
  2002. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  2003. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  2004. channels->min = channels->max =
  2005. mi2s_rx_cfg[TERT_MI2S].channels;
  2006. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2007. mi2s_rx_cfg[TERT_MI2S].bit_format);
  2008. break;
  2009. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  2010. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  2011. channels->min = channels->max =
  2012. mi2s_tx_cfg[TERT_MI2S].channels;
  2013. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2014. mi2s_tx_cfg[TERT_MI2S].bit_format);
  2015. break;
  2016. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  2017. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  2018. channels->min = channels->max =
  2019. mi2s_rx_cfg[QUAT_MI2S].channels;
  2020. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2021. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  2022. break;
  2023. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  2024. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  2025. channels->min = channels->max =
  2026. mi2s_tx_cfg[QUAT_MI2S].channels;
  2027. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2028. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  2029. break;
  2030. default:
  2031. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  2032. break;
  2033. }
  2034. return rc;
  2035. }
  2036. EXPORT_SYMBOL(msm_common_be_hw_params_fixup);
  2037. /**
  2038. * msm_aux_pcm_snd_startup - startup ops of auxpcm.
  2039. *
  2040. * @substream: PCM stream pointer of associated backend dailink
  2041. *
  2042. * Returns 0 on success or -EINVAL on error.
  2043. */
  2044. int msm_aux_pcm_snd_startup(struct snd_pcm_substream *substream)
  2045. {
  2046. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  2047. dev_dbg(rtd->card->dev,
  2048. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  2049. __func__, substream->name, substream->stream,
  2050. rtd->cpu_dai->name, rtd->cpu_dai->id);
  2051. return 0;
  2052. }
  2053. EXPORT_SYMBOL(msm_aux_pcm_snd_startup);
  2054. /**
  2055. * msm_aux_pcm_snd_shutdown - shutdown ops of auxpcm.
  2056. *
  2057. * @substream: PCM stream pointer of associated backend dailink
  2058. */
  2059. void msm_aux_pcm_snd_shutdown(struct snd_pcm_substream *substream)
  2060. {
  2061. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  2062. dev_dbg(rtd->card->dev,
  2063. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  2064. __func__,
  2065. substream->name, substream->stream,
  2066. rtd->cpu_dai->name, rtd->cpu_dai->id);
  2067. }
  2068. EXPORT_SYMBOL(msm_aux_pcm_snd_shutdown);
  2069. static int msm_get_port_id(int id)
  2070. {
  2071. int afe_port_id;
  2072. switch (id) {
  2073. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  2074. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  2075. break;
  2076. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  2077. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  2078. break;
  2079. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  2080. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  2081. break;
  2082. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  2083. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  2084. break;
  2085. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  2086. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  2087. break;
  2088. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  2089. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  2090. break;
  2091. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  2092. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  2093. break;
  2094. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  2095. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  2096. break;
  2097. default:
  2098. pr_err("%s: Invalid id: %d\n", __func__, id);
  2099. afe_port_id = -EINVAL;
  2100. }
  2101. return afe_port_id;
  2102. }
  2103. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  2104. {
  2105. u32 bit_per_sample;
  2106. switch (bit_format) {
  2107. case SNDRV_PCM_FORMAT_S32_LE:
  2108. case SNDRV_PCM_FORMAT_S24_3LE:
  2109. case SNDRV_PCM_FORMAT_S24_LE:
  2110. bit_per_sample = 32;
  2111. break;
  2112. case SNDRV_PCM_FORMAT_S16_LE:
  2113. default:
  2114. bit_per_sample = 16;
  2115. break;
  2116. }
  2117. return bit_per_sample;
  2118. }
  2119. static void update_mi2s_clk_val(int dai_id, int stream)
  2120. {
  2121. u32 bit_per_sample;
  2122. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  2123. bit_per_sample =
  2124. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  2125. mi2s_clk[dai_id].clk_freq_in_hz =
  2126. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  2127. } else {
  2128. bit_per_sample =
  2129. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  2130. mi2s_clk[dai_id].clk_freq_in_hz =
  2131. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  2132. }
  2133. }
  2134. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  2135. {
  2136. int ret = 0;
  2137. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  2138. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  2139. int port_id = 0;
  2140. int index = cpu_dai->id;
  2141. port_id = msm_get_port_id(rtd->dai_link->id);
  2142. if (port_id < 0) {
  2143. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  2144. ret = port_id;
  2145. goto done;
  2146. }
  2147. if (enable) {
  2148. update_mi2s_clk_val(index, substream->stream);
  2149. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  2150. mi2s_clk[index].clk_freq_in_hz);
  2151. }
  2152. mi2s_clk[index].enable = enable;
  2153. ret = afe_set_lpass_clock_v2(port_id,
  2154. &mi2s_clk[index]);
  2155. if (ret < 0) {
  2156. dev_err(rtd->card->dev,
  2157. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  2158. __func__, port_id, ret);
  2159. goto done;
  2160. }
  2161. done:
  2162. return ret;
  2163. }
  2164. /**
  2165. * msm_mi2s_snd_startup - startup ops of mi2s.
  2166. *
  2167. * @substream: PCM stream pointer of associated backend dailink
  2168. *
  2169. * Returns 0 on success or -EINVAL on error.
  2170. */
  2171. int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  2172. {
  2173. int ret = 0;
  2174. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  2175. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  2176. int port_id = msm_get_port_id(rtd->dai_link->id);
  2177. int index = cpu_dai->id;
  2178. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  2179. dev_dbg(rtd->card->dev,
  2180. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  2181. __func__, substream->name, substream->stream,
  2182. cpu_dai->name, cpu_dai->id);
  2183. if (index < PRIM_MI2S || index > QUAT_MI2S) {
  2184. ret = -EINVAL;
  2185. dev_err(rtd->card->dev,
  2186. "%s: CPU DAI id (%d) out of range\n",
  2187. __func__, cpu_dai->id);
  2188. goto done;
  2189. }
  2190. /*
  2191. * Muxtex protection in case the same MI2S
  2192. * interface using for both TX and RX so
  2193. * that the same clock won't be enable twice.
  2194. */
  2195. mutex_lock(&mi2s_intf_conf[index].lock);
  2196. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  2197. /* Check if msm needs to provide the clock to the interface */
  2198. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  2199. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  2200. fmt = SND_SOC_DAIFMT_CBM_CFM;
  2201. }
  2202. ret = msm_mi2s_set_sclk(substream, true);
  2203. if (ret < 0) {
  2204. dev_err(rtd->card->dev,
  2205. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  2206. __func__, ret);
  2207. goto clean_up;
  2208. }
  2209. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  2210. if (ret < 0) {
  2211. dev_err(rtd->card->dev,
  2212. "%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  2213. __func__, index, ret);
  2214. goto clk_off;
  2215. }
  2216. if (mi2s_intf_conf[index].msm_is_ext_mclk) {
  2217. mi2s_mclk[index].enable = 1;
  2218. pr_debug("%s: Enabling mclk, clk_freq_in_hz = %u\n",
  2219. __func__, mi2s_mclk[index].clk_freq_in_hz);
  2220. ret = afe_set_lpass_clock_v2(port_id,
  2221. &mi2s_mclk[index]);
  2222. if (ret < 0) {
  2223. pr_err("%s: afe lpass mclk failed, err:%d\n",
  2224. __func__, ret);
  2225. goto clk_off;
  2226. }
  2227. }
  2228. }
  2229. mutex_unlock(&mi2s_intf_conf[index].lock);
  2230. return 0;
  2231. clk_off:
  2232. if (ret < 0)
  2233. msm_mi2s_set_sclk(substream, false);
  2234. clean_up:
  2235. if (ret < 0)
  2236. mi2s_intf_conf[index].ref_cnt--;
  2237. mutex_unlock(&mi2s_intf_conf[index].lock);
  2238. done:
  2239. return ret;
  2240. }
  2241. EXPORT_SYMBOL(msm_mi2s_snd_startup);
  2242. /**
  2243. * msm_mi2s_snd_shutdown - shutdown ops of mi2s.
  2244. *
  2245. * @substream: PCM stream pointer of associated backend dailink
  2246. */
  2247. void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  2248. {
  2249. int ret;
  2250. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  2251. int port_id = msm_get_port_id(rtd->dai_link->id);
  2252. int index = rtd->cpu_dai->id;
  2253. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  2254. substream->name, substream->stream);
  2255. if (index < PRIM_MI2S || index > QUAT_MI2S) {
  2256. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  2257. return;
  2258. }
  2259. mutex_lock(&mi2s_intf_conf[index].lock);
  2260. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  2261. ret = msm_mi2s_set_sclk(substream, false);
  2262. if (ret < 0) {
  2263. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  2264. __func__, index, ret);
  2265. mi2s_intf_conf[index].ref_cnt++;
  2266. }
  2267. if (mi2s_intf_conf[index].msm_is_ext_mclk) {
  2268. mi2s_mclk[index].enable = 0;
  2269. pr_debug("%s: Disabling mclk, clk_freq_in_hz = %u\n",
  2270. __func__, mi2s_mclk[index].clk_freq_in_hz);
  2271. ret = afe_set_lpass_clock_v2(port_id,
  2272. &mi2s_mclk[index]);
  2273. if (ret < 0) {
  2274. pr_err("%s: mclk disable failed for MCLK (%d); ret=%d\n",
  2275. __func__, index, ret);
  2276. }
  2277. }
  2278. }
  2279. mutex_unlock(&mi2s_intf_conf[index].lock);
  2280. }
  2281. EXPORT_SYMBOL(msm_mi2s_snd_shutdown);
  2282. /* Validate whether US EU switch is present or not */
  2283. static int msm_prepare_us_euro(struct snd_soc_card *card)
  2284. {
  2285. struct msm_asoc_mach_data *pdata =
  2286. snd_soc_card_get_drvdata(card);
  2287. int ret = 0;
  2288. if (pdata->us_euro_gpio >= 0) {
  2289. dev_dbg(card->dev, "%s: us_euro gpio request %d", __func__,
  2290. pdata->us_euro_gpio);
  2291. ret = gpio_request(pdata->us_euro_gpio, "TASHA_CODEC_US_EURO");
  2292. if (ret) {
  2293. dev_err(card->dev,
  2294. "%s: Failed to request codec US/EURO gpio %d error %d\n",
  2295. __func__, pdata->us_euro_gpio, ret);
  2296. }
  2297. }
  2298. return ret;
  2299. }
  2300. static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  2301. {
  2302. struct snd_soc_card *card = codec->component.card;
  2303. struct msm_asoc_mach_data *pdata =
  2304. snd_soc_card_get_drvdata(card);
  2305. int value = 0;
  2306. if (pdata->us_euro_gpio_p) {
  2307. value = msm_cdc_pinctrl_get_state(pdata->us_euro_gpio_p);
  2308. if (value)
  2309. msm_cdc_pinctrl_select_sleep_state(
  2310. pdata->us_euro_gpio_p);
  2311. else
  2312. msm_cdc_pinctrl_select_active_state(
  2313. pdata->us_euro_gpio_p);
  2314. } else if (pdata->us_euro_gpio >= 0) {
  2315. value = gpio_get_value_cansleep(pdata->us_euro_gpio);
  2316. gpio_set_value_cansleep(pdata->us_euro_gpio, !value);
  2317. }
  2318. pr_debug("%s: swap select switch %d to %d\n", __func__, value, !value);
  2319. return true;
  2320. }
  2321. static int msm_populate_dai_link_component_of_node(
  2322. struct msm_asoc_mach_data *pdata,
  2323. struct snd_soc_card *card)
  2324. {
  2325. int i, index, ret = 0;
  2326. struct device *cdev = card->dev;
  2327. struct snd_soc_dai_link *dai_link = card->dai_link;
  2328. struct device_node *phandle;
  2329. if (!cdev) {
  2330. pr_err("%s: Sound card device memory NULL\n", __func__);
  2331. return -ENODEV;
  2332. }
  2333. for (i = 0; i < card->num_links; i++) {
  2334. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  2335. continue;
  2336. /* populate platform_of_node for snd card dai links */
  2337. if (dai_link[i].platform_name &&
  2338. !dai_link[i].platform_of_node) {
  2339. index = of_property_match_string(cdev->of_node,
  2340. "asoc-platform-names",
  2341. dai_link[i].platform_name);
  2342. if (index < 0) {
  2343. pr_err("%s: No match found for platform name: %s\n",
  2344. __func__, dai_link[i].platform_name);
  2345. ret = index;
  2346. goto cpu_dai;
  2347. }
  2348. phandle = of_parse_phandle(cdev->of_node,
  2349. "asoc-platform",
  2350. index);
  2351. if (!phandle) {
  2352. pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
  2353. __func__, dai_link[i].platform_name,
  2354. index);
  2355. ret = -ENODEV;
  2356. goto err;
  2357. }
  2358. dai_link[i].platform_of_node = phandle;
  2359. dai_link[i].platform_name = NULL;
  2360. }
  2361. cpu_dai:
  2362. /* populate cpu_of_node for snd card dai links */
  2363. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  2364. index = of_property_match_string(cdev->of_node,
  2365. "asoc-cpu-names",
  2366. dai_link[i].cpu_dai_name);
  2367. if (index < 0)
  2368. goto codec_dai;
  2369. phandle = of_parse_phandle(cdev->of_node, "asoc-cpu",
  2370. index);
  2371. if (!phandle) {
  2372. pr_err("%s: retrieving phandle for cpu dai %s failed\n",
  2373. __func__, dai_link[i].cpu_dai_name);
  2374. ret = -ENODEV;
  2375. goto err;
  2376. }
  2377. dai_link[i].cpu_of_node = phandle;
  2378. dai_link[i].cpu_dai_name = NULL;
  2379. }
  2380. codec_dai:
  2381. /* populate codec_of_node for snd card dai links */
  2382. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  2383. index = of_property_match_string(cdev->of_node,
  2384. "asoc-codec-names",
  2385. dai_link[i].codec_name);
  2386. if (index < 0)
  2387. continue;
  2388. phandle = of_parse_phandle(cdev->of_node, "asoc-codec",
  2389. index);
  2390. if (!phandle) {
  2391. pr_err("%s: retrieving phandle for codec dai %s failed\n",
  2392. __func__, dai_link[i].codec_name);
  2393. ret = -ENODEV;
  2394. goto err;
  2395. }
  2396. dai_link[i].codec_of_node = phandle;
  2397. dai_link[i].codec_name = NULL;
  2398. }
  2399. if (pdata->snd_card_val == INT_SND_CARD) {
  2400. if ((dai_link[i].id ==
  2401. MSM_BACKEND_DAI_INT0_MI2S_RX) ||
  2402. (dai_link[i].id ==
  2403. MSM_BACKEND_DAI_INT1_MI2S_RX) ||
  2404. (dai_link[i].id ==
  2405. MSM_BACKEND_DAI_INT2_MI2S_TX) ||
  2406. (dai_link[i].id ==
  2407. MSM_BACKEND_DAI_INT3_MI2S_TX)) {
  2408. index = of_property_match_string(cdev->of_node,
  2409. "asoc-codec-names",
  2410. MSM_INT_DIGITAL_CODEC);
  2411. phandle = of_parse_phandle(cdev->of_node,
  2412. "asoc-codec",
  2413. index);
  2414. dai_link[i].codecs[DIG_CDC].of_node = phandle;
  2415. index = of_property_match_string(cdev->of_node,
  2416. "asoc-codec-names",
  2417. PMIC_INT_ANALOG_CODEC);
  2418. phandle = of_parse_phandle(cdev->of_node,
  2419. "asoc-codec",
  2420. index);
  2421. dai_link[i].codecs[ANA_CDC].of_node = phandle;
  2422. }
  2423. }
  2424. }
  2425. err:
  2426. return ret;
  2427. }
  2428. static int msm_wsa881x_init(struct snd_soc_component *component)
  2429. {
  2430. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {100, 101, 102, 106};
  2431. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {103, 104, 105, 107};
  2432. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  2433. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  2434. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  2435. struct msm_asoc_mach_data *pdata;
  2436. struct snd_soc_dapm_context *dapm =
  2437. snd_soc_codec_get_dapm(codec);
  2438. if (!codec) {
  2439. pr_err("%s codec is NULL\n", __func__);
  2440. return -EINVAL;
  2441. }
  2442. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  2443. dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
  2444. __func__, codec->component.name);
  2445. wsa881x_set_channel_map(codec, &spkleft_ports[0],
  2446. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  2447. &ch_rate[0]);
  2448. if (dapm->component) {
  2449. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  2450. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  2451. }
  2452. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  2453. dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
  2454. __func__, codec->component.name);
  2455. wsa881x_set_channel_map(codec, &spkright_ports[0],
  2456. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  2457. &ch_rate[0]);
  2458. if (dapm->component) {
  2459. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  2460. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  2461. }
  2462. } else {
  2463. dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
  2464. codec->component.name);
  2465. return -EINVAL;
  2466. }
  2467. pdata = snd_soc_card_get_drvdata(component->card);
  2468. if (pdata && pdata->codec_root)
  2469. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  2470. codec);
  2471. return 0;
  2472. }
  2473. static int msm_init_wsa_dev(struct platform_device *pdev,
  2474. struct snd_soc_card *card)
  2475. {
  2476. struct device_node *wsa_of_node;
  2477. u32 wsa_max_devs;
  2478. u32 wsa_dev_cnt;
  2479. char *dev_name_str = NULL;
  2480. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  2481. const char *wsa_auxdev_name_prefix[1];
  2482. int found = 0;
  2483. int i;
  2484. int ret;
  2485. /* Get maximum WSA device count for this platform */
  2486. ret = of_property_read_u32(pdev->dev.of_node,
  2487. "qcom,wsa-max-devs", &wsa_max_devs);
  2488. if (ret) {
  2489. dev_dbg(&pdev->dev,
  2490. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  2491. __func__, pdev->dev.of_node->full_name, ret);
  2492. goto err_dt;
  2493. }
  2494. if (wsa_max_devs == 0) {
  2495. dev_warn(&pdev->dev,
  2496. "%s: Max WSA devices is 0 for this target?\n",
  2497. __func__);
  2498. goto err_dt;
  2499. }
  2500. /* Get count of WSA device phandles for this platform */
  2501. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  2502. "qcom,wsa-devs", NULL);
  2503. if (wsa_dev_cnt == -ENOENT) {
  2504. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  2505. __func__);
  2506. goto err_dt;
  2507. } else if (wsa_dev_cnt <= 0) {
  2508. dev_err(&pdev->dev,
  2509. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  2510. __func__, wsa_dev_cnt);
  2511. ret = -EINVAL;
  2512. goto err_dt;
  2513. }
  2514. /*
  2515. * Expect total phandles count to be NOT less than maximum possible
  2516. * WSA count. However, if it is less, then assign same value to
  2517. * max count as well.
  2518. */
  2519. if (wsa_dev_cnt < wsa_max_devs) {
  2520. dev_dbg(&pdev->dev,
  2521. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  2522. __func__, wsa_max_devs, wsa_dev_cnt);
  2523. wsa_max_devs = wsa_dev_cnt;
  2524. }
  2525. /* Make sure prefix string passed for each WSA device */
  2526. ret = of_property_count_strings(pdev->dev.of_node,
  2527. "qcom,wsa-aux-dev-prefix");
  2528. if (ret != wsa_dev_cnt) {
  2529. dev_err(&pdev->dev,
  2530. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  2531. __func__, wsa_dev_cnt, ret);
  2532. ret = -EINVAL;
  2533. goto err_dt;
  2534. }
  2535. /*
  2536. * Alloc mem to store phandle and index info of WSA device, if already
  2537. * registered with ALSA core
  2538. */
  2539. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  2540. sizeof(struct msm_wsa881x_dev_info),
  2541. GFP_KERNEL);
  2542. if (!wsa881x_dev_info) {
  2543. ret = -ENOMEM;
  2544. goto err_mem;
  2545. }
  2546. /*
  2547. * search and check whether all WSA devices are already
  2548. * registered with ALSA core or not. If found a node, store
  2549. * the node and the index in a local array of struct for later
  2550. * use.
  2551. */
  2552. for (i = 0; i < wsa_dev_cnt; i++) {
  2553. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  2554. "qcom,wsa-devs", i);
  2555. if (unlikely(!wsa_of_node)) {
  2556. /* we should not be here */
  2557. dev_err(&pdev->dev,
  2558. "%s: wsa dev node is not present\n",
  2559. __func__);
  2560. ret = -EINVAL;
  2561. goto err_dev_node;
  2562. }
  2563. if (soc_find_component(wsa_of_node, NULL)) {
  2564. /* WSA device registered with ALSA core */
  2565. wsa881x_dev_info[found].of_node = wsa_of_node;
  2566. wsa881x_dev_info[found].index = i;
  2567. found++;
  2568. if (found == wsa_max_devs)
  2569. break;
  2570. }
  2571. }
  2572. if (found < wsa_max_devs) {
  2573. dev_dbg(&pdev->dev,
  2574. "%s: failed to find %d components. Found only %d\n",
  2575. __func__, wsa_max_devs, found);
  2576. return -EPROBE_DEFER;
  2577. }
  2578. dev_info(&pdev->dev,
  2579. "%s: found %d wsa881x devices registered with ALSA core\n",
  2580. __func__, found);
  2581. card->num_aux_devs = wsa_max_devs;
  2582. card->num_configs = wsa_max_devs;
  2583. /* Alloc array of AUX devs struct */
  2584. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  2585. sizeof(struct snd_soc_aux_dev),
  2586. GFP_KERNEL);
  2587. if (!msm_aux_dev) {
  2588. ret = -ENOMEM;
  2589. goto err_auxdev_mem;
  2590. }
  2591. /* Alloc array of codec conf struct */
  2592. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  2593. sizeof(struct snd_soc_codec_conf),
  2594. GFP_KERNEL);
  2595. if (!msm_codec_conf) {
  2596. ret = -ENOMEM;
  2597. goto err_codec_conf;
  2598. }
  2599. for (i = 0; i < card->num_aux_devs; i++) {
  2600. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  2601. GFP_KERNEL);
  2602. if (!dev_name_str) {
  2603. ret = -ENOMEM;
  2604. goto err_dev_str;
  2605. }
  2606. ret = of_property_read_string_index(pdev->dev.of_node,
  2607. "qcom,wsa-aux-dev-prefix",
  2608. wsa881x_dev_info[i].index,
  2609. wsa_auxdev_name_prefix);
  2610. if (ret) {
  2611. dev_err(&pdev->dev,
  2612. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  2613. __func__, ret);
  2614. ret = -EINVAL;
  2615. goto err_dt_prop;
  2616. }
  2617. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  2618. msm_aux_dev[i].name = dev_name_str;
  2619. msm_aux_dev[i].codec_name = NULL;
  2620. msm_aux_dev[i].codec_of_node =
  2621. wsa881x_dev_info[i].of_node;
  2622. msm_aux_dev[i].init = msm_wsa881x_init;
  2623. msm_codec_conf[i].dev_name = NULL;
  2624. msm_codec_conf[i].name_prefix = wsa_auxdev_name_prefix[0];
  2625. msm_codec_conf[i].of_node = wsa881x_dev_info[i].of_node;
  2626. }
  2627. card->codec_conf = msm_codec_conf;
  2628. card->aux_dev = msm_aux_dev;
  2629. return 0;
  2630. err_dt_prop:
  2631. devm_kfree(&pdev->dev, dev_name_str);
  2632. err_dev_str:
  2633. devm_kfree(&pdev->dev, msm_codec_conf);
  2634. err_codec_conf:
  2635. devm_kfree(&pdev->dev, msm_aux_dev);
  2636. err_auxdev_mem:
  2637. err_dev_node:
  2638. devm_kfree(&pdev->dev, wsa881x_dev_info);
  2639. err_mem:
  2640. err_dt:
  2641. return ret;
  2642. }
  2643. static void msm_free_auxdev_mem(struct platform_device *pdev)
  2644. {
  2645. struct snd_soc_card *card = platform_get_drvdata(pdev);
  2646. int i;
  2647. if (card->num_aux_devs > 0) {
  2648. for (i = 0; i < card->num_aux_devs; i++) {
  2649. kfree(msm_aux_dev[i].codec_name);
  2650. kfree(msm_codec_conf[i].dev_name);
  2651. kfree(msm_codec_conf[i].name_prefix);
  2652. }
  2653. }
  2654. }
  2655. static void i2s_auxpcm_init(struct platform_device *pdev)
  2656. {
  2657. int count;
  2658. u32 mi2s_master_slave[MI2S_MAX];
  2659. u32 mi2s_ext_mclk[MI2S_MAX];
  2660. int ret;
  2661. for (count = 0; count < MI2S_MAX; count++) {
  2662. mutex_init(&mi2s_intf_conf[count].lock);
  2663. mi2s_intf_conf[count].ref_cnt = 0;
  2664. }
  2665. ret = of_property_read_u32_array(pdev->dev.of_node,
  2666. "qcom,msm-mi2s-master",
  2667. mi2s_master_slave, MI2S_MAX);
  2668. if (ret) {
  2669. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  2670. __func__);
  2671. } else {
  2672. for (count = 0; count < MI2S_MAX; count++) {
  2673. mi2s_intf_conf[count].msm_is_mi2s_master =
  2674. mi2s_master_slave[count];
  2675. }
  2676. }
  2677. ret = of_property_read_u32_array(pdev->dev.of_node,
  2678. "qcom,msm-mi2s-ext-mclk",
  2679. mi2s_ext_mclk, MI2S_MAX);
  2680. if (ret) {
  2681. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-ext-mclk in DT node\n",
  2682. __func__);
  2683. } else {
  2684. for (count = 0; count < MI2S_MAX; count++)
  2685. mi2s_intf_conf[count].msm_is_ext_mclk =
  2686. mi2s_ext_mclk[count];
  2687. }
  2688. }
  2689. static const struct of_device_id sdm660_asoc_machine_of_match[] = {
  2690. { .compatible = "qcom,sdm660-asoc-snd",
  2691. .data = "internal_codec"},
  2692. { .compatible = "qcom,sdm660-asoc-snd-tasha",
  2693. .data = "tasha_codec"},
  2694. { .compatible = "qcom,sdm660-asoc-snd-tavil",
  2695. .data = "tavil_codec"},
  2696. {},
  2697. };
  2698. static int msm_asoc_machine_probe(struct platform_device *pdev)
  2699. {
  2700. struct snd_soc_card *card = NULL;
  2701. struct msm_asoc_mach_data *pdata = NULL;
  2702. const char *mclk = "qcom,msm-mclk-freq";
  2703. int ret = -EINVAL, id;
  2704. const struct of_device_id *match;
  2705. pdata = devm_kzalloc(&pdev->dev,
  2706. sizeof(struct msm_asoc_mach_data),
  2707. GFP_KERNEL);
  2708. if (!pdata)
  2709. return -ENOMEM;
  2710. match = of_match_node(sdm660_asoc_machine_of_match,
  2711. pdev->dev.of_node);
  2712. if (!match)
  2713. goto err;
  2714. ret = of_property_read_u32(pdev->dev.of_node, mclk, &id);
  2715. if (ret) {
  2716. dev_err(&pdev->dev,
  2717. "%s: missing %s in dt node\n", __func__, mclk);
  2718. id = DEFAULT_MCLK_RATE;
  2719. }
  2720. pdata->mclk_freq = id;
  2721. if (!strcmp(match->data, "tasha_codec") ||
  2722. !strcmp(match->data, "tavil_codec")) {
  2723. if (!strcmp(match->data, "tasha_codec"))
  2724. pdata->snd_card_val = EXT_SND_CARD_TASHA;
  2725. else
  2726. pdata->snd_card_val = EXT_SND_CARD_TAVIL;
  2727. ret = msm_ext_cdc_init(pdev, pdata, &card, &mbhc_cfg);
  2728. if (ret)
  2729. goto err;
  2730. } else if (!strcmp(match->data, "internal_codec")) {
  2731. pdata->snd_card_val = INT_SND_CARD;
  2732. ret = msm_int_cdc_init(pdev, pdata, &card, &mbhc_cfg);
  2733. if (ret)
  2734. goto err;
  2735. } else {
  2736. dev_err(&pdev->dev,
  2737. "%s: Not a matching DT sound node\n", __func__);
  2738. goto err;
  2739. }
  2740. if (!card)
  2741. goto err;
  2742. if (pdata->snd_card_val == INT_SND_CARD) {
  2743. /*reading the gpio configurations from dtsi file*/
  2744. pdata->pdm_gpio_p = of_parse_phandle(pdev->dev.of_node,
  2745. "qcom,cdc-pdm-gpios", 0);
  2746. pdata->comp_gpio_p = of_parse_phandle(pdev->dev.of_node,
  2747. "qcom,cdc-comp-gpios", 0);
  2748. pdata->dmic_gpio_p = of_parse_phandle(pdev->dev.of_node,
  2749. "qcom,cdc-dmic-gpios", 0);
  2750. pdata->ext_spk_gpio_p = of_parse_phandle(pdev->dev.of_node,
  2751. "qcom,cdc-ext-spk-gpios", 0);
  2752. }
  2753. /*
  2754. * Parse US-Euro gpio info from DT. Report no error if us-euro
  2755. * entry is not found in DT file as some targets do not support
  2756. * US-Euro detection
  2757. */
  2758. pdata->us_euro_gpio = of_get_named_gpio(pdev->dev.of_node,
  2759. "qcom,us-euro-gpios", 0);
  2760. if (!gpio_is_valid(pdata->us_euro_gpio))
  2761. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  2762. "qcom,us-euro-gpios", 0);
  2763. if (!gpio_is_valid(pdata->us_euro_gpio) && (!pdata->us_euro_gpio_p)) {
  2764. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  2765. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  2766. } else {
  2767. dev_dbg(&pdev->dev, "%s detected",
  2768. "qcom,us-euro-gpios");
  2769. mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  2770. }
  2771. ret = msm_prepare_us_euro(card);
  2772. if (ret)
  2773. dev_dbg(&pdev->dev, "msm_prepare_us_euro failed (%d)\n",
  2774. ret);
  2775. i2s_auxpcm_init(pdev);
  2776. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  2777. if (ret)
  2778. goto err;
  2779. ret = msm_populate_dai_link_component_of_node(pdata, card);
  2780. if (ret) {
  2781. ret = -EPROBE_DEFER;
  2782. goto err;
  2783. }
  2784. if (!of_property_read_bool(pdev->dev.of_node, "qcom,wsa-disable")) {
  2785. ret = msm_init_wsa_dev(pdev, card);
  2786. if (ret)
  2787. goto err;
  2788. }
  2789. ret = devm_snd_soc_register_card(&pdev->dev, card);
  2790. if (ret == -EPROBE_DEFER) {
  2791. if (codec_reg_done) {
  2792. /*
  2793. * return failure as EINVAL since other codec
  2794. * registered sound card successfully.
  2795. * This avoids any further probe calls.
  2796. */
  2797. ret = -EINVAL;
  2798. }
  2799. goto err;
  2800. } else if (ret) {
  2801. dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
  2802. ret);
  2803. goto err;
  2804. }
  2805. if (pdata->snd_card_val != INT_SND_CARD)
  2806. msm_ext_register_audio_notifier(pdev);
  2807. return 0;
  2808. err:
  2809. if (pdata->us_euro_gpio > 0) {
  2810. dev_dbg(&pdev->dev, "%s free us_euro gpio %d\n",
  2811. __func__, pdata->us_euro_gpio);
  2812. pdata->us_euro_gpio = 0;
  2813. }
  2814. if (pdata->hph_en1_gpio > 0) {
  2815. dev_dbg(&pdev->dev, "%s free hph_en1_gpio %d\n",
  2816. __func__, pdata->hph_en1_gpio);
  2817. gpio_free(pdata->hph_en1_gpio);
  2818. pdata->hph_en1_gpio = 0;
  2819. }
  2820. if (pdata->hph_en0_gpio > 0) {
  2821. dev_dbg(&pdev->dev, "%s free hph_en0_gpio %d\n",
  2822. __func__, pdata->hph_en0_gpio);
  2823. gpio_free(pdata->hph_en0_gpio);
  2824. pdata->hph_en0_gpio = 0;
  2825. }
  2826. if (pdata->snd_card_val != INT_SND_CARD)
  2827. msm_ext_cdc_deinit(pdata);
  2828. devm_kfree(&pdev->dev, pdata);
  2829. return ret;
  2830. }
  2831. static int msm_asoc_machine_remove(struct platform_device *pdev)
  2832. {
  2833. struct snd_soc_card *card = platform_get_drvdata(pdev);
  2834. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  2835. if (pdata->snd_card_val == INT_SND_CARD)
  2836. mutex_destroy(&pdata->cdc_int_mclk0_mutex);
  2837. else
  2838. msm_ext_cdc_deinit(pdata);
  2839. msm_free_auxdev_mem(pdev);
  2840. gpio_free(pdata->us_euro_gpio);
  2841. gpio_free(pdata->hph_en1_gpio);
  2842. gpio_free(pdata->hph_en0_gpio);
  2843. snd_soc_unregister_card(card);
  2844. return 0;
  2845. }
  2846. static struct platform_driver sdm660_asoc_machine_driver = {
  2847. .driver = {
  2848. .name = DRV_NAME,
  2849. .owner = THIS_MODULE,
  2850. .pm = &snd_soc_pm_ops,
  2851. .of_match_table = sdm660_asoc_machine_of_match,
  2852. },
  2853. .probe = msm_asoc_machine_probe,
  2854. .remove = msm_asoc_machine_remove,
  2855. };
  2856. module_platform_driver(sdm660_asoc_machine_driver);
  2857. MODULE_DESCRIPTION("ALSA SoC msm");
  2858. MODULE_LICENSE("GPL v2");
  2859. MODULE_ALIAS("platform:" DRV_NAME);
  2860. MODULE_DEVICE_TABLE(of, sdm660_asoc_machine_of_match);