sm6150.c 241 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/delay.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/slab.h>
  11. #include <linux/io.h>
  12. #include <linux/module.h>
  13. #include <linux/input.h>
  14. #include <linux/of_device.h>
  15. #include <linux/pm_qos.h>
  16. #include <linux/soc/qcom/fsa4480-i2c.h>
  17. #include <sound/core.h>
  18. #include <sound/soc.h>
  19. #include <sound/soc-dapm.h>
  20. #include <sound/pcm.h>
  21. #include <sound/pcm_params.h>
  22. #include <sound/info.h>
  23. #include <soc/snd_event.h>
  24. #include <soc/qcom/socinfo.h>
  25. #include <dsp/q6afe-v2.h>
  26. #include <dsp/q6core.h>
  27. #include "device_event.h"
  28. #include "msm-pcm-routing-v2.h"
  29. #include <asoc/msm-cdc-pinctrl.h>
  30. #include "codecs/wcd934x/wcd934x.h"
  31. #include "codecs/wcd934x/wcd934x-mbhc.h"
  32. #include "codecs/wcd937x/wcd937x-mbhc.h"
  33. #include "codecs/wsa881x.h"
  34. #include "codecs/bolero/bolero-cdc.h"
  35. #include <dt-bindings/sound/audio-codec-port-types.h>
  36. #include "codecs/bolero/wsa-macro.h"
  37. #include "codecs/wcd937x/wcd937x.h"
  38. #define DRV_NAME "sm6150-asoc-snd"
  39. #define __CHIPSET__ "SM6150 "
  40. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  41. #define SAMPLING_RATE_8KHZ 8000
  42. #define SAMPLING_RATE_11P025KHZ 11025
  43. #define SAMPLING_RATE_16KHZ 16000
  44. #define SAMPLING_RATE_22P05KHZ 22050
  45. #define SAMPLING_RATE_32KHZ 32000
  46. #define SAMPLING_RATE_44P1KHZ 44100
  47. #define SAMPLING_RATE_48KHZ 48000
  48. #define SAMPLING_RATE_88P2KHZ 88200
  49. #define SAMPLING_RATE_96KHZ 96000
  50. #define SAMPLING_RATE_176P4KHZ 176400
  51. #define SAMPLING_RATE_192KHZ 192000
  52. #define SAMPLING_RATE_352P8KHZ 352800
  53. #define SAMPLING_RATE_384KHZ 384000
  54. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  55. #define WCD9XXX_MBHC_DEF_RLOADS 5
  56. #define CODEC_EXT_CLK_RATE 9600000
  57. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  58. #define DEV_NAME_STR_LEN 32
  59. #define WSA8810_NAME_1 "wsa881x.20170211"
  60. #define WSA8810_NAME_2 "wsa881x.20170212"
  61. #define WCN_CDC_SLIM_RX_CH_MAX 2
  62. #define WCN_CDC_SLIM_TX_CH_MAX 3
  63. #define TDM_CHANNEL_MAX 8
  64. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  65. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  66. #define MSM_HIFI_ON 1
  67. #define SM6150_SOC_VERSION_1_0 0x00010000
  68. #define SM6150_SOC_MSM_ID 0x163
  69. enum {
  70. SLIM_RX_0 = 0,
  71. SLIM_RX_1,
  72. SLIM_RX_2,
  73. SLIM_RX_3,
  74. SLIM_RX_4,
  75. SLIM_RX_5,
  76. SLIM_RX_6,
  77. SLIM_RX_7,
  78. SLIM_RX_MAX,
  79. };
  80. enum {
  81. SLIM_TX_0 = 0,
  82. SLIM_TX_1,
  83. SLIM_TX_2,
  84. SLIM_TX_3,
  85. SLIM_TX_4,
  86. SLIM_TX_5,
  87. SLIM_TX_6,
  88. SLIM_TX_7,
  89. SLIM_TX_8,
  90. SLIM_TX_MAX,
  91. };
  92. enum {
  93. PRIM_MI2S = 0,
  94. SEC_MI2S,
  95. TERT_MI2S,
  96. QUAT_MI2S,
  97. QUIN_MI2S,
  98. MI2S_MAX,
  99. };
  100. enum {
  101. PRIM_AUX_PCM = 0,
  102. SEC_AUX_PCM,
  103. TERT_AUX_PCM,
  104. QUAT_AUX_PCM,
  105. QUIN_AUX_PCM,
  106. AUX_PCM_MAX,
  107. };
  108. enum {
  109. TDM_0 = 0,
  110. TDM_1,
  111. TDM_2,
  112. TDM_3,
  113. TDM_4,
  114. TDM_5,
  115. TDM_6,
  116. TDM_7,
  117. TDM_PORT_MAX,
  118. };
  119. enum {
  120. TDM_PRI = 0,
  121. TDM_SEC,
  122. TDM_TERT,
  123. TDM_QUAT,
  124. TDM_QUIN,
  125. TDM_INTERFACE_MAX,
  126. };
  127. struct tdm_port {
  128. u32 mode;
  129. u32 channel;
  130. };
  131. enum {
  132. WSA_CDC_DMA_RX_0 = 0,
  133. WSA_CDC_DMA_RX_1,
  134. RX_CDC_DMA_RX_0,
  135. RX_CDC_DMA_RX_1,
  136. RX_CDC_DMA_RX_2,
  137. RX_CDC_DMA_RX_3,
  138. RX_CDC_DMA_RX_5,
  139. CDC_DMA_RX_MAX,
  140. };
  141. enum {
  142. WSA_CDC_DMA_TX_0 = 0,
  143. WSA_CDC_DMA_TX_1,
  144. WSA_CDC_DMA_TX_2,
  145. TX_CDC_DMA_TX_0,
  146. TX_CDC_DMA_TX_3,
  147. TX_CDC_DMA_TX_4,
  148. CDC_DMA_TX_MAX,
  149. };
  150. struct mi2s_conf {
  151. struct mutex lock;
  152. u32 ref_cnt;
  153. u32 msm_is_mi2s_master;
  154. u32 msm_is_ext_mclk;
  155. };
  156. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  157. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  158. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  159. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  160. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
  161. Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
  162. };
  163. struct dev_config {
  164. u32 sample_rate;
  165. u32 bit_format;
  166. u32 channels;
  167. };
  168. enum {
  169. DP_RX_IDX = 0,
  170. EXT_DISP_RX_IDX_MAX,
  171. };
  172. struct msm_wsa881x_dev_info {
  173. struct device_node *of_node;
  174. u32 index;
  175. };
  176. struct aux_codec_dev_info {
  177. struct device_node *of_node;
  178. u32 index;
  179. };
  180. struct msm_asoc_mach_data {
  181. struct snd_info_entry *codec_root;
  182. int usbc_en2_gpio; /* used by gpio driver API */
  183. struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
  184. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  185. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  186. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  187. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  188. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  189. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  190. bool is_afe_config_done;
  191. struct device_node *fsa_handle;
  192. };
  193. struct msm_asoc_wcd93xx_codec {
  194. void* (*get_afe_config_fn)(struct snd_soc_component *component,
  195. enum afe_config_type config_type);
  196. };
  197. static struct snd_soc_card snd_soc_card_sm6150_msm;
  198. /* TDM default config */
  199. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  200. { /* PRI TDM */
  201. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  202. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  203. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  204. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  205. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  206. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  207. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  208. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  209. },
  210. { /* SEC TDM */
  211. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  212. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  213. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  214. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  215. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  216. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  217. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  218. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  219. },
  220. { /* TERT TDM */
  221. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  222. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  223. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  224. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  225. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  226. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  227. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  229. },
  230. { /* QUAT TDM */
  231. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  232. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  233. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  236. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  239. },
  240. { /* QUIN TDM */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  242. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  243. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  249. }
  250. };
  251. /* TDM default config */
  252. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  253. { /* PRI TDM */
  254. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  255. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  256. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  257. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  262. },
  263. { /* SEC TDM */
  264. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  265. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  266. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  267. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  268. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  269. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  270. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  272. },
  273. { /* TERT TDM */
  274. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  275. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  276. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  277. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  278. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  279. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  280. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  281. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  282. },
  283. { /* QUAT TDM */
  284. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  285. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  286. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  287. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  288. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  289. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  290. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  291. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  292. },
  293. { /* QUIN TDM */
  294. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  295. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  296. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  297. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  298. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  299. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  300. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  301. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  302. }
  303. };
  304. /* Default configuration of slimbus channels */
  305. static struct dev_config slim_rx_cfg[] = {
  306. [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  307. [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  308. [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  309. [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  310. [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  311. [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  312. [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  313. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  314. };
  315. static struct dev_config slim_tx_cfg[] = {
  316. [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  317. [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  318. [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  319. [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  320. [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  321. [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  322. [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  323. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  324. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  325. };
  326. /* Default configuration of Codec DMA Interface Tx */
  327. static struct dev_config cdc_dma_rx_cfg[] = {
  328. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  329. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  330. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  331. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  332. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  333. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  334. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  335. };
  336. /* Default configuration of Codec DMA Interface Rx */
  337. static struct dev_config cdc_dma_tx_cfg[] = {
  338. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  339. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  340. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  341. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  342. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  343. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  344. };
  345. /* Default configuration of external display BE */
  346. static struct dev_config ext_disp_rx_cfg[] = {
  347. [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  348. };
  349. static struct dev_config usb_rx_cfg = {
  350. .sample_rate = SAMPLING_RATE_48KHZ,
  351. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  352. .channels = 2,
  353. };
  354. static struct dev_config usb_tx_cfg = {
  355. .sample_rate = SAMPLING_RATE_48KHZ,
  356. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  357. .channels = 1,
  358. };
  359. static struct dev_config proxy_rx_cfg = {
  360. .sample_rate = SAMPLING_RATE_48KHZ,
  361. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  362. .channels = 2,
  363. };
  364. /* Default configuration of MI2S channels */
  365. static struct dev_config mi2s_rx_cfg[] = {
  366. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  367. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  368. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  369. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  370. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  371. };
  372. static struct dev_config mi2s_tx_cfg[] = {
  373. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  374. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  375. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  376. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  377. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  378. };
  379. static struct dev_config aux_pcm_rx_cfg[] = {
  380. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  381. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  382. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  383. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  384. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  385. };
  386. static struct dev_config aux_pcm_tx_cfg[] = {
  387. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  388. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  389. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  390. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  391. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  392. };
  393. static int msm_vi_feed_tx_ch = 2;
  394. static const char *const slim_rx_ch_text[] = {"One", "Two"};
  395. static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
  396. "Five", "Six", "Seven",
  397. "Eight"};
  398. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  399. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  400. "S32_LE"};
  401. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  402. "S24_3LE"};
  403. static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  404. "KHZ_32", "KHZ_44P1", "KHZ_48",
  405. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  406. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  407. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  408. "KHZ_44P1", "KHZ_48",
  409. "KHZ_88P2", "KHZ_96"};
  410. static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
  411. "KHZ_44P1", "KHZ_48",
  412. "KHZ_88P2", "KHZ_96"};
  413. static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
  414. "KHZ_44P1", "KHZ_48",
  415. "KHZ_88P2", "KHZ_96"};
  416. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  417. "Five", "Six", "Seven",
  418. "Eight"};
  419. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  420. "Six", "Seven", "Eight"};
  421. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  422. "KHZ_16", "KHZ_22P05",
  423. "KHZ_32", "KHZ_44P1", "KHZ_48",
  424. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  425. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  426. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  427. "KHZ_192", "KHZ_32", "KHZ_44P1",
  428. "KHZ_88P2", "KHZ_176P4" };
  429. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  430. "Five", "Six", "Seven", "Eight"};
  431. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  432. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  433. "KHZ_48", "KHZ_176P4",
  434. "KHZ_352P8"};
  435. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  436. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  437. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  438. "KHZ_48", "KHZ_96", "KHZ_192"};
  439. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  440. "Five", "Six", "Seven",
  441. "Eight"};
  442. static const char *const hifi_text[] = {"Off", "On"};
  443. static const char *const qos_text[] = {"Disable", "Enable"};
  444. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  445. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  446. "Five", "Six", "Seven",
  447. "Eight"};
  448. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  449. "KHZ_16", "KHZ_22P05",
  450. "KHZ_32", "KHZ_44P1", "KHZ_48",
  451. "KHZ_88P2", "KHZ_96",
  452. "KHZ_176P4", "KHZ_192",
  453. "KHZ_352P8", "KHZ_384"};
  454. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
  455. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
  456. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
  457. static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
  458. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
  459. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
  460. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  461. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  462. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  463. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  464. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  465. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
  466. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
  467. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
  468. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
  469. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  470. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  471. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
  473. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
  475. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
  477. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
  479. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  481. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  483. ext_disp_sample_rate_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  485. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  486. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  487. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  488. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  489. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  490. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  491. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  492. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  493. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  494. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  496. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  497. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  498. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  499. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  500. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  501. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  502. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  503. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  504. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
  505. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  506. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  507. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  508. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  509. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
  510. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  511. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  512. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  513. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  514. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  515. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  516. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  517. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  518. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
  519. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
  520. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  521. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  522. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  523. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  524. static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
  525. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  526. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  527. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  528. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  529. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  530. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  531. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  532. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  533. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  534. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  535. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  536. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  537. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  538. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  539. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  540. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  541. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  542. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  543. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  544. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  545. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  546. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  547. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  548. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  549. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  550. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  551. cdc_dma_sample_rate_text);
  552. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  553. cdc_dma_sample_rate_text);
  554. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  555. cdc_dma_sample_rate_text);
  556. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  557. cdc_dma_sample_rate_text);
  558. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  559. cdc_dma_sample_rate_text);
  560. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  561. cdc_dma_sample_rate_text);
  562. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  563. cdc_dma_sample_rate_text);
  564. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  565. cdc_dma_sample_rate_text);
  566. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  567. cdc_dma_sample_rate_text);
  568. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  569. cdc_dma_sample_rate_text);
  570. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  571. cdc_dma_sample_rate_text);
  572. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  573. cdc_dma_sample_rate_text);
  574. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  575. cdc_dma_sample_rate_text);
  576. static int msm_hifi_control;
  577. static bool codec_reg_done;
  578. static struct snd_soc_aux_dev *msm_aux_dev;
  579. static struct snd_soc_codec_conf *msm_codec_conf;
  580. static struct msm_asoc_wcd93xx_codec msm_codec_fn;
  581. static int dmic_0_1_gpio_cnt;
  582. static int dmic_2_3_gpio_cnt;
  583. static void *def_wcd_mbhc_cal(void);
  584. static int msm_snd_enable_codec_ext_clk(struct snd_soc_component *component,
  585. int enable, bool dapm);
  586. static int msm_wsa881x_init(struct snd_soc_component *component);
  587. static int msm_aux_codec_init(struct snd_soc_component *component);
  588. /*
  589. * Need to report LINEIN
  590. * if R/L channel impedance is larger than 5K ohm
  591. */
  592. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  593. .read_fw_bin = false,
  594. .calibration = NULL,
  595. .detect_extn_cable = true,
  596. .mono_stero_detection = false,
  597. .swap_gnd_mic = NULL,
  598. .hs_ext_micbias = true,
  599. .key_code[0] = KEY_MEDIA,
  600. .key_code[1] = KEY_VOICECOMMAND,
  601. .key_code[2] = KEY_VOLUMEUP,
  602. .key_code[3] = KEY_VOLUMEDOWN,
  603. .key_code[4] = 0,
  604. .key_code[5] = 0,
  605. .key_code[6] = 0,
  606. .key_code[7] = 0,
  607. .linein_th = 5000,
  608. .moisture_en = true,
  609. .mbhc_micbias = MIC_BIAS_2,
  610. .anc_micbias = MIC_BIAS_2,
  611. .enable_anc_mic_detect = false,
  612. };
  613. static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
  614. {"MIC BIAS1", NULL, "MCLK TX"},
  615. {"MIC BIAS2", NULL, "MCLK TX"},
  616. {"MIC BIAS3", NULL, "MCLK TX"},
  617. {"MIC BIAS4", NULL, "MCLK TX"},
  618. };
  619. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  620. {
  621. AFE_API_VERSION_I2S_CONFIG,
  622. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  623. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  624. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  625. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  626. 0,
  627. },
  628. {
  629. AFE_API_VERSION_I2S_CONFIG,
  630. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  631. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  632. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  633. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  634. 0,
  635. },
  636. {
  637. AFE_API_VERSION_I2S_CONFIG,
  638. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  639. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  640. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  641. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  642. 0,
  643. },
  644. {
  645. AFE_API_VERSION_I2S_CONFIG,
  646. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  647. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  648. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  649. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  650. 0,
  651. },
  652. {
  653. AFE_API_VERSION_I2S_CONFIG,
  654. Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
  655. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  656. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  657. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  658. 0,
  659. }
  660. };
  661. static struct afe_clk_set mi2s_mclk[MI2S_MAX] = {
  662. {
  663. AFE_API_VERSION_I2S_CONFIG,
  664. Q6AFE_LPASS_CLK_ID_MCLK_3,
  665. Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
  666. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  667. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  668. 0,
  669. },
  670. {
  671. AFE_API_VERSION_I2S_CONFIG,
  672. Q6AFE_LPASS_CLK_ID_MCLK_2,
  673. Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
  674. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  675. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  676. 0,
  677. },
  678. {
  679. AFE_API_VERSION_I2S_CONFIG,
  680. Q6AFE_LPASS_CLK_ID_MCLK_1,
  681. Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
  682. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  683. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  684. 0,
  685. },
  686. {
  687. AFE_API_VERSION_I2S_CONFIG,
  688. Q6AFE_LPASS_CLK_ID_MCLK_1,
  689. Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
  690. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  691. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  692. 0,
  693. },
  694. {
  695. AFE_API_VERSION_I2S_CONFIG,
  696. Q6AFE_LPASS_CLK_ID_QUI_MI2S_OSR,
  697. Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
  698. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  699. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  700. 0,
  701. }
  702. };
  703. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  704. static int slim_get_sample_rate_val(int sample_rate)
  705. {
  706. int sample_rate_val = 0;
  707. switch (sample_rate) {
  708. case SAMPLING_RATE_8KHZ:
  709. sample_rate_val = 0;
  710. break;
  711. case SAMPLING_RATE_16KHZ:
  712. sample_rate_val = 1;
  713. break;
  714. case SAMPLING_RATE_32KHZ:
  715. sample_rate_val = 2;
  716. break;
  717. case SAMPLING_RATE_44P1KHZ:
  718. sample_rate_val = 3;
  719. break;
  720. case SAMPLING_RATE_48KHZ:
  721. sample_rate_val = 4;
  722. break;
  723. case SAMPLING_RATE_88P2KHZ:
  724. sample_rate_val = 5;
  725. break;
  726. case SAMPLING_RATE_96KHZ:
  727. sample_rate_val = 6;
  728. break;
  729. case SAMPLING_RATE_176P4KHZ:
  730. sample_rate_val = 7;
  731. break;
  732. case SAMPLING_RATE_192KHZ:
  733. sample_rate_val = 8;
  734. break;
  735. case SAMPLING_RATE_352P8KHZ:
  736. sample_rate_val = 9;
  737. break;
  738. case SAMPLING_RATE_384KHZ:
  739. sample_rate_val = 10;
  740. break;
  741. default:
  742. sample_rate_val = 4;
  743. break;
  744. }
  745. return sample_rate_val;
  746. }
  747. static int slim_get_sample_rate(int value)
  748. {
  749. int sample_rate = 0;
  750. switch (value) {
  751. case 0:
  752. sample_rate = SAMPLING_RATE_8KHZ;
  753. break;
  754. case 1:
  755. sample_rate = SAMPLING_RATE_16KHZ;
  756. break;
  757. case 2:
  758. sample_rate = SAMPLING_RATE_32KHZ;
  759. break;
  760. case 3:
  761. sample_rate = SAMPLING_RATE_44P1KHZ;
  762. break;
  763. case 4:
  764. sample_rate = SAMPLING_RATE_48KHZ;
  765. break;
  766. case 5:
  767. sample_rate = SAMPLING_RATE_88P2KHZ;
  768. break;
  769. case 6:
  770. sample_rate = SAMPLING_RATE_96KHZ;
  771. break;
  772. case 7:
  773. sample_rate = SAMPLING_RATE_176P4KHZ;
  774. break;
  775. case 8:
  776. sample_rate = SAMPLING_RATE_192KHZ;
  777. break;
  778. case 9:
  779. sample_rate = SAMPLING_RATE_352P8KHZ;
  780. break;
  781. case 10:
  782. sample_rate = SAMPLING_RATE_384KHZ;
  783. break;
  784. default:
  785. sample_rate = SAMPLING_RATE_48KHZ;
  786. break;
  787. }
  788. return sample_rate;
  789. }
  790. static int slim_get_bit_format_val(int bit_format)
  791. {
  792. int val = 0;
  793. switch (bit_format) {
  794. case SNDRV_PCM_FORMAT_S32_LE:
  795. val = 3;
  796. break;
  797. case SNDRV_PCM_FORMAT_S24_3LE:
  798. val = 2;
  799. break;
  800. case SNDRV_PCM_FORMAT_S24_LE:
  801. val = 1;
  802. break;
  803. case SNDRV_PCM_FORMAT_S16_LE:
  804. default:
  805. val = 0;
  806. break;
  807. }
  808. return val;
  809. }
  810. static int slim_get_bit_format(int val)
  811. {
  812. int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  813. switch (val) {
  814. case 0:
  815. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  816. break;
  817. case 1:
  818. bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
  819. break;
  820. case 2:
  821. bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
  822. break;
  823. case 3:
  824. bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
  825. break;
  826. default:
  827. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  828. break;
  829. }
  830. return bit_fmt;
  831. }
  832. static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
  833. {
  834. int port_id = 0;
  835. if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
  836. port_id = SLIM_RX_0;
  837. } else if (strnstr(kcontrol->id.name,
  838. "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
  839. port_id = SLIM_RX_2;
  840. } else if (strnstr(kcontrol->id.name,
  841. "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
  842. port_id = SLIM_RX_5;
  843. } else if (strnstr(kcontrol->id.name,
  844. "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
  845. port_id = SLIM_RX_6;
  846. } else if (strnstr(kcontrol->id.name,
  847. "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
  848. port_id = SLIM_TX_0;
  849. } else if (strnstr(kcontrol->id.name,
  850. "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
  851. port_id = SLIM_TX_1;
  852. } else {
  853. pr_err("%s: unsupported channel: %s\n",
  854. __func__, kcontrol->id.name);
  855. return -EINVAL;
  856. }
  857. return port_id;
  858. }
  859. static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  860. struct snd_ctl_elem_value *ucontrol)
  861. {
  862. int ch_num = slim_get_port_idx(kcontrol);
  863. if (ch_num < 0)
  864. return ch_num;
  865. ucontrol->value.enumerated.item[0] =
  866. slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
  867. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  868. ch_num, slim_rx_cfg[ch_num].sample_rate,
  869. ucontrol->value.enumerated.item[0]);
  870. return 0;
  871. }
  872. static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  873. struct snd_ctl_elem_value *ucontrol)
  874. {
  875. int ch_num = slim_get_port_idx(kcontrol);
  876. if (ch_num < 0)
  877. return ch_num;
  878. slim_rx_cfg[ch_num].sample_rate =
  879. slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  880. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  881. ch_num, slim_rx_cfg[ch_num].sample_rate,
  882. ucontrol->value.enumerated.item[0]);
  883. return 0;
  884. }
  885. static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  886. struct snd_ctl_elem_value *ucontrol)
  887. {
  888. int ch_num = slim_get_port_idx(kcontrol);
  889. if (ch_num < 0)
  890. return ch_num;
  891. ucontrol->value.enumerated.item[0] =
  892. slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
  893. pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  894. ch_num, slim_tx_cfg[ch_num].sample_rate,
  895. ucontrol->value.enumerated.item[0]);
  896. return 0;
  897. }
  898. static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  899. struct snd_ctl_elem_value *ucontrol)
  900. {
  901. int sample_rate = 0;
  902. int ch_num = slim_get_port_idx(kcontrol);
  903. if (ch_num < 0)
  904. return ch_num;
  905. sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  906. if (sample_rate == SAMPLING_RATE_44P1KHZ) {
  907. pr_err("%s: Unsupported sample rate %d: for Tx path\n",
  908. __func__, sample_rate);
  909. return -EINVAL;
  910. }
  911. slim_tx_cfg[ch_num].sample_rate = sample_rate;
  912. pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
  913. ch_num, slim_tx_cfg[ch_num].sample_rate,
  914. ucontrol->value.enumerated.item[0]);
  915. return 0;
  916. }
  917. static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
  918. struct snd_ctl_elem_value *ucontrol)
  919. {
  920. int ch_num = slim_get_port_idx(kcontrol);
  921. if (ch_num < 0)
  922. return ch_num;
  923. ucontrol->value.enumerated.item[0] =
  924. slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
  925. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  926. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  927. ucontrol->value.enumerated.item[0]);
  928. return 0;
  929. }
  930. static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
  931. struct snd_ctl_elem_value *ucontrol)
  932. {
  933. int ch_num = slim_get_port_idx(kcontrol);
  934. if (ch_num < 0)
  935. return ch_num;
  936. slim_rx_cfg[ch_num].bit_format =
  937. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  938. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  939. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  940. ucontrol->value.enumerated.item[0]);
  941. return 0;
  942. }
  943. static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
  944. struct snd_ctl_elem_value *ucontrol)
  945. {
  946. int ch_num = slim_get_port_idx(kcontrol);
  947. if (ch_num < 0)
  948. return ch_num;
  949. ucontrol->value.enumerated.item[0] =
  950. slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
  951. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  952. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  953. ucontrol->value.enumerated.item[0]);
  954. return 0;
  955. }
  956. static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
  957. struct snd_ctl_elem_value *ucontrol)
  958. {
  959. int ch_num = slim_get_port_idx(kcontrol);
  960. if (ch_num < 0)
  961. return ch_num;
  962. slim_tx_cfg[ch_num].bit_format =
  963. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  964. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  965. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  966. ucontrol->value.enumerated.item[0]);
  967. return 0;
  968. }
  969. static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
  970. struct snd_ctl_elem_value *ucontrol)
  971. {
  972. int ch_num = slim_get_port_idx(kcontrol);
  973. if (ch_num < 0)
  974. return ch_num;
  975. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  976. ch_num, slim_rx_cfg[ch_num].channels);
  977. ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
  978. return 0;
  979. }
  980. static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
  981. struct snd_ctl_elem_value *ucontrol)
  982. {
  983. int ch_num = slim_get_port_idx(kcontrol);
  984. if (ch_num < 0)
  985. return ch_num;
  986. slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  987. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  988. ch_num, slim_rx_cfg[ch_num].channels);
  989. return 1;
  990. }
  991. static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
  992. struct snd_ctl_elem_value *ucontrol)
  993. {
  994. int ch_num = slim_get_port_idx(kcontrol);
  995. if (ch_num < 0)
  996. return ch_num;
  997. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  998. ch_num, slim_tx_cfg[ch_num].channels);
  999. ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
  1000. return 0;
  1001. }
  1002. static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
  1003. struct snd_ctl_elem_value *ucontrol)
  1004. {
  1005. int ch_num = slim_get_port_idx(kcontrol);
  1006. if (ch_num < 0)
  1007. return ch_num;
  1008. slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  1009. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  1010. ch_num, slim_tx_cfg[ch_num].channels);
  1011. return 1;
  1012. }
  1013. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  1014. struct snd_ctl_elem_value *ucontrol)
  1015. {
  1016. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  1017. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  1018. ucontrol->value.integer.value[0]);
  1019. return 0;
  1020. }
  1021. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  1022. struct snd_ctl_elem_value *ucontrol)
  1023. {
  1024. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  1025. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  1026. return 1;
  1027. }
  1028. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  1029. struct snd_ctl_elem_value *ucontrol)
  1030. {
  1031. /*
  1032. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  1033. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  1034. * value.
  1035. */
  1036. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1037. case SAMPLING_RATE_96KHZ:
  1038. ucontrol->value.integer.value[0] = 5;
  1039. break;
  1040. case SAMPLING_RATE_88P2KHZ:
  1041. ucontrol->value.integer.value[0] = 4;
  1042. break;
  1043. case SAMPLING_RATE_48KHZ:
  1044. ucontrol->value.integer.value[0] = 3;
  1045. break;
  1046. case SAMPLING_RATE_44P1KHZ:
  1047. ucontrol->value.integer.value[0] = 2;
  1048. break;
  1049. case SAMPLING_RATE_16KHZ:
  1050. ucontrol->value.integer.value[0] = 1;
  1051. break;
  1052. case SAMPLING_RATE_8KHZ:
  1053. default:
  1054. ucontrol->value.integer.value[0] = 0;
  1055. break;
  1056. }
  1057. pr_debug("%s: sample rate = %d\n", __func__,
  1058. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1059. return 0;
  1060. }
  1061. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  1062. struct snd_ctl_elem_value *ucontrol)
  1063. {
  1064. switch (ucontrol->value.integer.value[0]) {
  1065. case 1:
  1066. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1067. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1068. break;
  1069. case 2:
  1070. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1071. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1072. break;
  1073. case 3:
  1074. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1075. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1076. break;
  1077. case 4:
  1078. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1079. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1080. break;
  1081. case 5:
  1082. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1083. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1084. break;
  1085. case 0:
  1086. default:
  1087. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1088. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1089. break;
  1090. }
  1091. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  1092. __func__,
  1093. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1094. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1095. ucontrol->value.enumerated.item[0]);
  1096. return 0;
  1097. }
  1098. static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
  1099. struct snd_ctl_elem_value *ucontrol)
  1100. {
  1101. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1102. case SAMPLING_RATE_96KHZ:
  1103. ucontrol->value.integer.value[0] = 5;
  1104. break;
  1105. case SAMPLING_RATE_88P2KHZ:
  1106. ucontrol->value.integer.value[0] = 4;
  1107. break;
  1108. case SAMPLING_RATE_48KHZ:
  1109. ucontrol->value.integer.value[0] = 3;
  1110. break;
  1111. case SAMPLING_RATE_44P1KHZ:
  1112. ucontrol->value.integer.value[0] = 2;
  1113. break;
  1114. case SAMPLING_RATE_16KHZ:
  1115. ucontrol->value.integer.value[0] = 1;
  1116. break;
  1117. case SAMPLING_RATE_8KHZ:
  1118. default:
  1119. ucontrol->value.integer.value[0] = 0;
  1120. break;
  1121. }
  1122. pr_debug("%s: sample rate rx = %d", __func__,
  1123. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1124. return 0;
  1125. }
  1126. static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
  1127. struct snd_ctl_elem_value *ucontrol)
  1128. {
  1129. switch (ucontrol->value.integer.value[0]) {
  1130. case 1:
  1131. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1132. break;
  1133. case 2:
  1134. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1135. break;
  1136. case 3:
  1137. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1138. break;
  1139. case 4:
  1140. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1141. break;
  1142. case 5:
  1143. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1144. break;
  1145. case 0:
  1146. default:
  1147. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1148. break;
  1149. }
  1150. pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
  1151. __func__,
  1152. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1153. ucontrol->value.enumerated.item[0]);
  1154. return 0;
  1155. }
  1156. static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
  1157. struct snd_ctl_elem_value *ucontrol)
  1158. {
  1159. switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
  1160. case SAMPLING_RATE_96KHZ:
  1161. ucontrol->value.integer.value[0] = 5;
  1162. break;
  1163. case SAMPLING_RATE_88P2KHZ:
  1164. ucontrol->value.integer.value[0] = 4;
  1165. break;
  1166. case SAMPLING_RATE_48KHZ:
  1167. ucontrol->value.integer.value[0] = 3;
  1168. break;
  1169. case SAMPLING_RATE_44P1KHZ:
  1170. ucontrol->value.integer.value[0] = 2;
  1171. break;
  1172. case SAMPLING_RATE_16KHZ:
  1173. ucontrol->value.integer.value[0] = 1;
  1174. break;
  1175. case SAMPLING_RATE_8KHZ:
  1176. default:
  1177. ucontrol->value.integer.value[0] = 0;
  1178. break;
  1179. }
  1180. pr_debug("%s: sample rate tx = %d", __func__,
  1181. slim_tx_cfg[SLIM_TX_7].sample_rate);
  1182. return 0;
  1183. }
  1184. static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
  1185. struct snd_ctl_elem_value *ucontrol)
  1186. {
  1187. switch (ucontrol->value.integer.value[0]) {
  1188. case 1:
  1189. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1190. break;
  1191. case 2:
  1192. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1193. break;
  1194. case 3:
  1195. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1196. break;
  1197. case 4:
  1198. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1199. break;
  1200. case 5:
  1201. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1202. break;
  1203. case 0:
  1204. default:
  1205. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1206. break;
  1207. }
  1208. pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
  1209. __func__,
  1210. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1211. ucontrol->value.enumerated.item[0]);
  1212. return 0;
  1213. }
  1214. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1215. {
  1216. int idx = 0;
  1217. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1218. sizeof("WSA_CDC_DMA_RX_0")))
  1219. idx = WSA_CDC_DMA_RX_0;
  1220. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1221. sizeof("WSA_CDC_DMA_RX_0")))
  1222. idx = WSA_CDC_DMA_RX_1;
  1223. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1224. sizeof("RX_CDC_DMA_RX_0")))
  1225. idx = RX_CDC_DMA_RX_0;
  1226. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1227. sizeof("RX_CDC_DMA_RX_1")))
  1228. idx = RX_CDC_DMA_RX_1;
  1229. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1230. sizeof("RX_CDC_DMA_RX_2")))
  1231. idx = RX_CDC_DMA_RX_2;
  1232. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1233. sizeof("RX_CDC_DMA_RX_3")))
  1234. idx = RX_CDC_DMA_RX_3;
  1235. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1236. sizeof("RX_CDC_DMA_RX_5")))
  1237. idx = RX_CDC_DMA_RX_5;
  1238. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1239. sizeof("WSA_CDC_DMA_TX_0")))
  1240. idx = WSA_CDC_DMA_TX_0;
  1241. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1242. sizeof("WSA_CDC_DMA_TX_1")))
  1243. idx = WSA_CDC_DMA_TX_1;
  1244. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1245. sizeof("WSA_CDC_DMA_TX_2")))
  1246. idx = WSA_CDC_DMA_TX_2;
  1247. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1248. sizeof("TX_CDC_DMA_TX_0")))
  1249. idx = TX_CDC_DMA_TX_0;
  1250. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1251. sizeof("TX_CDC_DMA_TX_3")))
  1252. idx = TX_CDC_DMA_TX_3;
  1253. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1254. sizeof("TX_CDC_DMA_TX_4")))
  1255. idx = TX_CDC_DMA_TX_4;
  1256. else {
  1257. pr_err("%s: unsupported channel: %s\n",
  1258. __func__, kcontrol->id.name);
  1259. return -EINVAL;
  1260. }
  1261. return idx;
  1262. }
  1263. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1264. struct snd_ctl_elem_value *ucontrol)
  1265. {
  1266. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1267. if (ch_num < 0) {
  1268. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1269. return ch_num;
  1270. }
  1271. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1272. cdc_dma_rx_cfg[ch_num].channels - 1);
  1273. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1274. return 0;
  1275. }
  1276. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1277. struct snd_ctl_elem_value *ucontrol)
  1278. {
  1279. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1280. if (ch_num < 0) {
  1281. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1282. return ch_num;
  1283. }
  1284. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1285. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1286. cdc_dma_rx_cfg[ch_num].channels);
  1287. return 1;
  1288. }
  1289. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1290. struct snd_ctl_elem_value *ucontrol)
  1291. {
  1292. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1293. if (ch_num < 0) {
  1294. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1295. return ch_num;
  1296. }
  1297. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1298. case SNDRV_PCM_FORMAT_S32_LE:
  1299. ucontrol->value.integer.value[0] = 3;
  1300. break;
  1301. case SNDRV_PCM_FORMAT_S24_3LE:
  1302. ucontrol->value.integer.value[0] = 2;
  1303. break;
  1304. case SNDRV_PCM_FORMAT_S24_LE:
  1305. ucontrol->value.integer.value[0] = 1;
  1306. break;
  1307. case SNDRV_PCM_FORMAT_S16_LE:
  1308. default:
  1309. ucontrol->value.integer.value[0] = 0;
  1310. break;
  1311. }
  1312. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1313. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1314. ucontrol->value.integer.value[0]);
  1315. return 0;
  1316. }
  1317. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1318. struct snd_ctl_elem_value *ucontrol)
  1319. {
  1320. int rc = 0;
  1321. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1322. if (ch_num < 0) {
  1323. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1324. return ch_num;
  1325. }
  1326. switch (ucontrol->value.integer.value[0]) {
  1327. case 3:
  1328. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1329. break;
  1330. case 2:
  1331. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1332. break;
  1333. case 1:
  1334. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1335. break;
  1336. case 0:
  1337. default:
  1338. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1339. break;
  1340. }
  1341. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1342. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1343. ucontrol->value.integer.value[0]);
  1344. return rc;
  1345. }
  1346. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1347. {
  1348. int sample_rate_val = 0;
  1349. switch (sample_rate) {
  1350. case SAMPLING_RATE_8KHZ:
  1351. sample_rate_val = 0;
  1352. break;
  1353. case SAMPLING_RATE_11P025KHZ:
  1354. sample_rate_val = 1;
  1355. break;
  1356. case SAMPLING_RATE_16KHZ:
  1357. sample_rate_val = 2;
  1358. break;
  1359. case SAMPLING_RATE_22P05KHZ:
  1360. sample_rate_val = 3;
  1361. break;
  1362. case SAMPLING_RATE_32KHZ:
  1363. sample_rate_val = 4;
  1364. break;
  1365. case SAMPLING_RATE_44P1KHZ:
  1366. sample_rate_val = 5;
  1367. break;
  1368. case SAMPLING_RATE_48KHZ:
  1369. sample_rate_val = 6;
  1370. break;
  1371. case SAMPLING_RATE_88P2KHZ:
  1372. sample_rate_val = 7;
  1373. break;
  1374. case SAMPLING_RATE_96KHZ:
  1375. sample_rate_val = 8;
  1376. break;
  1377. case SAMPLING_RATE_176P4KHZ:
  1378. sample_rate_val = 9;
  1379. break;
  1380. case SAMPLING_RATE_192KHZ:
  1381. sample_rate_val = 10;
  1382. break;
  1383. case SAMPLING_RATE_352P8KHZ:
  1384. sample_rate_val = 11;
  1385. break;
  1386. case SAMPLING_RATE_384KHZ:
  1387. sample_rate_val = 12;
  1388. break;
  1389. default:
  1390. sample_rate_val = 6;
  1391. break;
  1392. }
  1393. return sample_rate_val;
  1394. }
  1395. static int cdc_dma_get_sample_rate(int value)
  1396. {
  1397. int sample_rate = 0;
  1398. switch (value) {
  1399. case 0:
  1400. sample_rate = SAMPLING_RATE_8KHZ;
  1401. break;
  1402. case 1:
  1403. sample_rate = SAMPLING_RATE_11P025KHZ;
  1404. break;
  1405. case 2:
  1406. sample_rate = SAMPLING_RATE_16KHZ;
  1407. break;
  1408. case 3:
  1409. sample_rate = SAMPLING_RATE_22P05KHZ;
  1410. break;
  1411. case 4:
  1412. sample_rate = SAMPLING_RATE_32KHZ;
  1413. break;
  1414. case 5:
  1415. sample_rate = SAMPLING_RATE_44P1KHZ;
  1416. break;
  1417. case 6:
  1418. sample_rate = SAMPLING_RATE_48KHZ;
  1419. break;
  1420. case 7:
  1421. sample_rate = SAMPLING_RATE_88P2KHZ;
  1422. break;
  1423. case 8:
  1424. sample_rate = SAMPLING_RATE_96KHZ;
  1425. break;
  1426. case 9:
  1427. sample_rate = SAMPLING_RATE_176P4KHZ;
  1428. break;
  1429. case 10:
  1430. sample_rate = SAMPLING_RATE_192KHZ;
  1431. break;
  1432. case 11:
  1433. sample_rate = SAMPLING_RATE_352P8KHZ;
  1434. break;
  1435. case 12:
  1436. sample_rate = SAMPLING_RATE_384KHZ;
  1437. break;
  1438. default:
  1439. sample_rate = SAMPLING_RATE_48KHZ;
  1440. break;
  1441. }
  1442. return sample_rate;
  1443. }
  1444. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1445. struct snd_ctl_elem_value *ucontrol)
  1446. {
  1447. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1448. if (ch_num < 0) {
  1449. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1450. return ch_num;
  1451. }
  1452. ucontrol->value.enumerated.item[0] =
  1453. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1454. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1455. cdc_dma_rx_cfg[ch_num].sample_rate);
  1456. return 0;
  1457. }
  1458. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1459. struct snd_ctl_elem_value *ucontrol)
  1460. {
  1461. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1462. if (ch_num < 0) {
  1463. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1464. return ch_num;
  1465. }
  1466. cdc_dma_rx_cfg[ch_num].sample_rate =
  1467. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1468. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  1469. __func__, ucontrol->value.enumerated.item[0],
  1470. cdc_dma_rx_cfg[ch_num].sample_rate);
  1471. return 0;
  1472. }
  1473. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  1474. struct snd_ctl_elem_value *ucontrol)
  1475. {
  1476. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1477. if (ch_num < 0) {
  1478. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1479. return ch_num;
  1480. }
  1481. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1482. cdc_dma_tx_cfg[ch_num].channels);
  1483. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  1484. return 0;
  1485. }
  1486. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  1487. struct snd_ctl_elem_value *ucontrol)
  1488. {
  1489. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1490. if (ch_num < 0) {
  1491. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1492. return ch_num;
  1493. }
  1494. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1495. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1496. cdc_dma_tx_cfg[ch_num].channels);
  1497. return 1;
  1498. }
  1499. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1500. struct snd_ctl_elem_value *ucontrol)
  1501. {
  1502. int sample_rate_val;
  1503. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1504. if (ch_num < 0) {
  1505. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1506. return ch_num;
  1507. }
  1508. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  1509. case SAMPLING_RATE_384KHZ:
  1510. sample_rate_val = 12;
  1511. break;
  1512. case SAMPLING_RATE_352P8KHZ:
  1513. sample_rate_val = 11;
  1514. break;
  1515. case SAMPLING_RATE_192KHZ:
  1516. sample_rate_val = 10;
  1517. break;
  1518. case SAMPLING_RATE_176P4KHZ:
  1519. sample_rate_val = 9;
  1520. break;
  1521. case SAMPLING_RATE_96KHZ:
  1522. sample_rate_val = 8;
  1523. break;
  1524. case SAMPLING_RATE_88P2KHZ:
  1525. sample_rate_val = 7;
  1526. break;
  1527. case SAMPLING_RATE_48KHZ:
  1528. sample_rate_val = 6;
  1529. break;
  1530. case SAMPLING_RATE_44P1KHZ:
  1531. sample_rate_val = 5;
  1532. break;
  1533. case SAMPLING_RATE_32KHZ:
  1534. sample_rate_val = 4;
  1535. break;
  1536. case SAMPLING_RATE_22P05KHZ:
  1537. sample_rate_val = 3;
  1538. break;
  1539. case SAMPLING_RATE_16KHZ:
  1540. sample_rate_val = 2;
  1541. break;
  1542. case SAMPLING_RATE_11P025KHZ:
  1543. sample_rate_val = 1;
  1544. break;
  1545. case SAMPLING_RATE_8KHZ:
  1546. sample_rate_val = 0;
  1547. break;
  1548. default:
  1549. sample_rate_val = 6;
  1550. break;
  1551. }
  1552. ucontrol->value.integer.value[0] = sample_rate_val;
  1553. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  1554. cdc_dma_tx_cfg[ch_num].sample_rate);
  1555. return 0;
  1556. }
  1557. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1558. struct snd_ctl_elem_value *ucontrol)
  1559. {
  1560. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1561. if (ch_num < 0) {
  1562. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1563. return ch_num;
  1564. }
  1565. switch (ucontrol->value.integer.value[0]) {
  1566. case 12:
  1567. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  1568. break;
  1569. case 11:
  1570. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  1571. break;
  1572. case 10:
  1573. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  1574. break;
  1575. case 9:
  1576. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  1577. break;
  1578. case 8:
  1579. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  1580. break;
  1581. case 7:
  1582. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  1583. break;
  1584. case 6:
  1585. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1586. break;
  1587. case 5:
  1588. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  1589. break;
  1590. case 4:
  1591. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  1592. break;
  1593. case 3:
  1594. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  1595. break;
  1596. case 2:
  1597. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  1598. break;
  1599. case 1:
  1600. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  1601. break;
  1602. case 0:
  1603. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  1604. break;
  1605. default:
  1606. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1607. break;
  1608. }
  1609. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  1610. __func__, ucontrol->value.integer.value[0],
  1611. cdc_dma_tx_cfg[ch_num].sample_rate);
  1612. return 0;
  1613. }
  1614. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  1615. struct snd_ctl_elem_value *ucontrol)
  1616. {
  1617. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1618. if (ch_num < 0) {
  1619. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1620. return ch_num;
  1621. }
  1622. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  1623. case SNDRV_PCM_FORMAT_S32_LE:
  1624. ucontrol->value.integer.value[0] = 3;
  1625. break;
  1626. case SNDRV_PCM_FORMAT_S24_3LE:
  1627. ucontrol->value.integer.value[0] = 2;
  1628. break;
  1629. case SNDRV_PCM_FORMAT_S24_LE:
  1630. ucontrol->value.integer.value[0] = 1;
  1631. break;
  1632. case SNDRV_PCM_FORMAT_S16_LE:
  1633. default:
  1634. ucontrol->value.integer.value[0] = 0;
  1635. break;
  1636. }
  1637. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1638. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1639. ucontrol->value.integer.value[0]);
  1640. return 0;
  1641. }
  1642. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  1643. struct snd_ctl_elem_value *ucontrol)
  1644. {
  1645. int rc = 0;
  1646. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1647. if (ch_num < 0) {
  1648. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1649. return ch_num;
  1650. }
  1651. switch (ucontrol->value.integer.value[0]) {
  1652. case 3:
  1653. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1654. break;
  1655. case 2:
  1656. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1657. break;
  1658. case 1:
  1659. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1660. break;
  1661. case 0:
  1662. default:
  1663. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1664. break;
  1665. }
  1666. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1667. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1668. ucontrol->value.integer.value[0]);
  1669. return rc;
  1670. }
  1671. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  1672. struct snd_ctl_elem_value *ucontrol)
  1673. {
  1674. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  1675. usb_rx_cfg.channels);
  1676. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  1677. return 0;
  1678. }
  1679. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  1680. struct snd_ctl_elem_value *ucontrol)
  1681. {
  1682. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1683. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  1684. return 1;
  1685. }
  1686. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1687. struct snd_ctl_elem_value *ucontrol)
  1688. {
  1689. int sample_rate_val;
  1690. switch (usb_rx_cfg.sample_rate) {
  1691. case SAMPLING_RATE_384KHZ:
  1692. sample_rate_val = 12;
  1693. break;
  1694. case SAMPLING_RATE_352P8KHZ:
  1695. sample_rate_val = 11;
  1696. break;
  1697. case SAMPLING_RATE_192KHZ:
  1698. sample_rate_val = 10;
  1699. break;
  1700. case SAMPLING_RATE_176P4KHZ:
  1701. sample_rate_val = 9;
  1702. break;
  1703. case SAMPLING_RATE_96KHZ:
  1704. sample_rate_val = 8;
  1705. break;
  1706. case SAMPLING_RATE_88P2KHZ:
  1707. sample_rate_val = 7;
  1708. break;
  1709. case SAMPLING_RATE_48KHZ:
  1710. sample_rate_val = 6;
  1711. break;
  1712. case SAMPLING_RATE_44P1KHZ:
  1713. sample_rate_val = 5;
  1714. break;
  1715. case SAMPLING_RATE_32KHZ:
  1716. sample_rate_val = 4;
  1717. break;
  1718. case SAMPLING_RATE_22P05KHZ:
  1719. sample_rate_val = 3;
  1720. break;
  1721. case SAMPLING_RATE_16KHZ:
  1722. sample_rate_val = 2;
  1723. break;
  1724. case SAMPLING_RATE_11P025KHZ:
  1725. sample_rate_val = 1;
  1726. break;
  1727. case SAMPLING_RATE_8KHZ:
  1728. default:
  1729. sample_rate_val = 0;
  1730. break;
  1731. }
  1732. ucontrol->value.integer.value[0] = sample_rate_val;
  1733. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  1734. usb_rx_cfg.sample_rate);
  1735. return 0;
  1736. }
  1737. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1738. struct snd_ctl_elem_value *ucontrol)
  1739. {
  1740. switch (ucontrol->value.integer.value[0]) {
  1741. case 12:
  1742. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1743. break;
  1744. case 11:
  1745. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1746. break;
  1747. case 10:
  1748. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1749. break;
  1750. case 9:
  1751. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1752. break;
  1753. case 8:
  1754. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1755. break;
  1756. case 7:
  1757. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1758. break;
  1759. case 6:
  1760. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1761. break;
  1762. case 5:
  1763. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1764. break;
  1765. case 4:
  1766. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1767. break;
  1768. case 3:
  1769. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1770. break;
  1771. case 2:
  1772. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1773. break;
  1774. case 1:
  1775. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1776. break;
  1777. case 0:
  1778. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1779. break;
  1780. default:
  1781. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1782. break;
  1783. }
  1784. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  1785. __func__, ucontrol->value.integer.value[0],
  1786. usb_rx_cfg.sample_rate);
  1787. return 0;
  1788. }
  1789. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  1790. struct snd_ctl_elem_value *ucontrol)
  1791. {
  1792. switch (usb_rx_cfg.bit_format) {
  1793. case SNDRV_PCM_FORMAT_S32_LE:
  1794. ucontrol->value.integer.value[0] = 3;
  1795. break;
  1796. case SNDRV_PCM_FORMAT_S24_3LE:
  1797. ucontrol->value.integer.value[0] = 2;
  1798. break;
  1799. case SNDRV_PCM_FORMAT_S24_LE:
  1800. ucontrol->value.integer.value[0] = 1;
  1801. break;
  1802. case SNDRV_PCM_FORMAT_S16_LE:
  1803. default:
  1804. ucontrol->value.integer.value[0] = 0;
  1805. break;
  1806. }
  1807. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1808. __func__, usb_rx_cfg.bit_format,
  1809. ucontrol->value.integer.value[0]);
  1810. return 0;
  1811. }
  1812. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  1813. struct snd_ctl_elem_value *ucontrol)
  1814. {
  1815. int rc = 0;
  1816. switch (ucontrol->value.integer.value[0]) {
  1817. case 3:
  1818. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1819. break;
  1820. case 2:
  1821. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1822. break;
  1823. case 1:
  1824. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1825. break;
  1826. case 0:
  1827. default:
  1828. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1829. break;
  1830. }
  1831. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1832. __func__, usb_rx_cfg.bit_format,
  1833. ucontrol->value.integer.value[0]);
  1834. return rc;
  1835. }
  1836. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  1837. struct snd_ctl_elem_value *ucontrol)
  1838. {
  1839. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  1840. usb_tx_cfg.channels);
  1841. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  1842. return 0;
  1843. }
  1844. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  1845. struct snd_ctl_elem_value *ucontrol)
  1846. {
  1847. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1848. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  1849. return 1;
  1850. }
  1851. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1852. struct snd_ctl_elem_value *ucontrol)
  1853. {
  1854. int sample_rate_val;
  1855. switch (usb_tx_cfg.sample_rate) {
  1856. case SAMPLING_RATE_384KHZ:
  1857. sample_rate_val = 12;
  1858. break;
  1859. case SAMPLING_RATE_352P8KHZ:
  1860. sample_rate_val = 11;
  1861. break;
  1862. case SAMPLING_RATE_192KHZ:
  1863. sample_rate_val = 10;
  1864. break;
  1865. case SAMPLING_RATE_176P4KHZ:
  1866. sample_rate_val = 9;
  1867. break;
  1868. case SAMPLING_RATE_96KHZ:
  1869. sample_rate_val = 8;
  1870. break;
  1871. case SAMPLING_RATE_88P2KHZ:
  1872. sample_rate_val = 7;
  1873. break;
  1874. case SAMPLING_RATE_48KHZ:
  1875. sample_rate_val = 6;
  1876. break;
  1877. case SAMPLING_RATE_44P1KHZ:
  1878. sample_rate_val = 5;
  1879. break;
  1880. case SAMPLING_RATE_32KHZ:
  1881. sample_rate_val = 4;
  1882. break;
  1883. case SAMPLING_RATE_22P05KHZ:
  1884. sample_rate_val = 3;
  1885. break;
  1886. case SAMPLING_RATE_16KHZ:
  1887. sample_rate_val = 2;
  1888. break;
  1889. case SAMPLING_RATE_11P025KHZ:
  1890. sample_rate_val = 1;
  1891. break;
  1892. case SAMPLING_RATE_8KHZ:
  1893. sample_rate_val = 0;
  1894. break;
  1895. default:
  1896. sample_rate_val = 6;
  1897. break;
  1898. }
  1899. ucontrol->value.integer.value[0] = sample_rate_val;
  1900. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  1901. usb_tx_cfg.sample_rate);
  1902. return 0;
  1903. }
  1904. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1905. struct snd_ctl_elem_value *ucontrol)
  1906. {
  1907. switch (ucontrol->value.integer.value[0]) {
  1908. case 12:
  1909. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1910. break;
  1911. case 11:
  1912. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1913. break;
  1914. case 10:
  1915. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1916. break;
  1917. case 9:
  1918. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1919. break;
  1920. case 8:
  1921. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1922. break;
  1923. case 7:
  1924. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1925. break;
  1926. case 6:
  1927. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1928. break;
  1929. case 5:
  1930. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1931. break;
  1932. case 4:
  1933. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1934. break;
  1935. case 3:
  1936. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1937. break;
  1938. case 2:
  1939. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1940. break;
  1941. case 1:
  1942. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1943. break;
  1944. case 0:
  1945. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1946. break;
  1947. default:
  1948. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1949. break;
  1950. }
  1951. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  1952. __func__, ucontrol->value.integer.value[0],
  1953. usb_tx_cfg.sample_rate);
  1954. return 0;
  1955. }
  1956. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  1957. struct snd_ctl_elem_value *ucontrol)
  1958. {
  1959. switch (usb_tx_cfg.bit_format) {
  1960. case SNDRV_PCM_FORMAT_S32_LE:
  1961. ucontrol->value.integer.value[0] = 3;
  1962. break;
  1963. case SNDRV_PCM_FORMAT_S24_3LE:
  1964. ucontrol->value.integer.value[0] = 2;
  1965. break;
  1966. case SNDRV_PCM_FORMAT_S24_LE:
  1967. ucontrol->value.integer.value[0] = 1;
  1968. break;
  1969. case SNDRV_PCM_FORMAT_S16_LE:
  1970. default:
  1971. ucontrol->value.integer.value[0] = 0;
  1972. break;
  1973. }
  1974. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1975. __func__, usb_tx_cfg.bit_format,
  1976. ucontrol->value.integer.value[0]);
  1977. return 0;
  1978. }
  1979. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  1980. struct snd_ctl_elem_value *ucontrol)
  1981. {
  1982. int rc = 0;
  1983. switch (ucontrol->value.integer.value[0]) {
  1984. case 3:
  1985. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1986. break;
  1987. case 2:
  1988. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1989. break;
  1990. case 1:
  1991. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1992. break;
  1993. case 0:
  1994. default:
  1995. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1996. break;
  1997. }
  1998. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1999. __func__, usb_tx_cfg.bit_format,
  2000. ucontrol->value.integer.value[0]);
  2001. return rc;
  2002. }
  2003. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  2004. {
  2005. int idx;
  2006. if (strnstr(kcontrol->id.name, "Display Port RX",
  2007. sizeof("Display Port RX"))) {
  2008. idx = DP_RX_IDX;
  2009. } else {
  2010. pr_err("%s: unsupported BE: %s\n",
  2011. __func__, kcontrol->id.name);
  2012. idx = -EINVAL;
  2013. }
  2014. return idx;
  2015. }
  2016. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  2017. struct snd_ctl_elem_value *ucontrol)
  2018. {
  2019. int idx = ext_disp_get_port_idx(kcontrol);
  2020. if (idx < 0)
  2021. return idx;
  2022. switch (ext_disp_rx_cfg[idx].bit_format) {
  2023. case SNDRV_PCM_FORMAT_S24_3LE:
  2024. ucontrol->value.integer.value[0] = 2;
  2025. break;
  2026. case SNDRV_PCM_FORMAT_S24_LE:
  2027. ucontrol->value.integer.value[0] = 1;
  2028. break;
  2029. case SNDRV_PCM_FORMAT_S16_LE:
  2030. default:
  2031. ucontrol->value.integer.value[0] = 0;
  2032. break;
  2033. }
  2034. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  2035. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  2036. ucontrol->value.integer.value[0]);
  2037. return 0;
  2038. }
  2039. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  2040. struct snd_ctl_elem_value *ucontrol)
  2041. {
  2042. int idx = ext_disp_get_port_idx(kcontrol);
  2043. if (idx < 0)
  2044. return idx;
  2045. switch (ucontrol->value.integer.value[0]) {
  2046. case 2:
  2047. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2048. break;
  2049. case 1:
  2050. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2051. break;
  2052. case 0:
  2053. default:
  2054. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2055. break;
  2056. }
  2057. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  2058. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  2059. ucontrol->value.integer.value[0]);
  2060. return 0;
  2061. }
  2062. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  2063. struct snd_ctl_elem_value *ucontrol)
  2064. {
  2065. int idx = ext_disp_get_port_idx(kcontrol);
  2066. if (idx < 0)
  2067. return idx;
  2068. ucontrol->value.integer.value[0] =
  2069. ext_disp_rx_cfg[idx].channels - 2;
  2070. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  2071. idx, ext_disp_rx_cfg[idx].channels);
  2072. return 0;
  2073. }
  2074. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  2075. struct snd_ctl_elem_value *ucontrol)
  2076. {
  2077. int idx = ext_disp_get_port_idx(kcontrol);
  2078. if (idx < 0)
  2079. return idx;
  2080. ext_disp_rx_cfg[idx].channels =
  2081. ucontrol->value.integer.value[0] + 2;
  2082. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  2083. idx, ext_disp_rx_cfg[idx].channels);
  2084. return 1;
  2085. }
  2086. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2087. struct snd_ctl_elem_value *ucontrol)
  2088. {
  2089. int sample_rate_val;
  2090. int idx = ext_disp_get_port_idx(kcontrol);
  2091. if (idx < 0)
  2092. return idx;
  2093. switch (ext_disp_rx_cfg[idx].sample_rate) {
  2094. case SAMPLING_RATE_176P4KHZ:
  2095. sample_rate_val = 6;
  2096. break;
  2097. case SAMPLING_RATE_88P2KHZ:
  2098. sample_rate_val = 5;
  2099. break;
  2100. case SAMPLING_RATE_44P1KHZ:
  2101. sample_rate_val = 4;
  2102. break;
  2103. case SAMPLING_RATE_32KHZ:
  2104. sample_rate_val = 3;
  2105. break;
  2106. case SAMPLING_RATE_192KHZ:
  2107. sample_rate_val = 2;
  2108. break;
  2109. case SAMPLING_RATE_96KHZ:
  2110. sample_rate_val = 1;
  2111. break;
  2112. case SAMPLING_RATE_48KHZ:
  2113. default:
  2114. sample_rate_val = 0;
  2115. break;
  2116. }
  2117. ucontrol->value.integer.value[0] = sample_rate_val;
  2118. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  2119. idx, ext_disp_rx_cfg[idx].sample_rate);
  2120. return 0;
  2121. }
  2122. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2123. struct snd_ctl_elem_value *ucontrol)
  2124. {
  2125. int idx = ext_disp_get_port_idx(kcontrol);
  2126. if (idx < 0)
  2127. return idx;
  2128. switch (ucontrol->value.integer.value[0]) {
  2129. case 6:
  2130. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  2131. break;
  2132. case 5:
  2133. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  2134. break;
  2135. case 4:
  2136. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  2137. break;
  2138. case 3:
  2139. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  2140. break;
  2141. case 2:
  2142. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  2143. break;
  2144. case 1:
  2145. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  2146. break;
  2147. case 0:
  2148. default:
  2149. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  2150. break;
  2151. }
  2152. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  2153. __func__, ucontrol->value.integer.value[0], idx,
  2154. ext_disp_rx_cfg[idx].sample_rate);
  2155. return 0;
  2156. }
  2157. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  2158. struct snd_ctl_elem_value *ucontrol)
  2159. {
  2160. pr_debug("%s: proxy_rx channels = %d\n",
  2161. __func__, proxy_rx_cfg.channels);
  2162. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  2163. return 0;
  2164. }
  2165. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  2166. struct snd_ctl_elem_value *ucontrol)
  2167. {
  2168. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  2169. pr_debug("%s: proxy_rx channels = %d\n",
  2170. __func__, proxy_rx_cfg.channels);
  2171. return 1;
  2172. }
  2173. static int tdm_get_sample_rate(int value)
  2174. {
  2175. int sample_rate = 0;
  2176. switch (value) {
  2177. case 0:
  2178. sample_rate = SAMPLING_RATE_8KHZ;
  2179. break;
  2180. case 1:
  2181. sample_rate = SAMPLING_RATE_16KHZ;
  2182. break;
  2183. case 2:
  2184. sample_rate = SAMPLING_RATE_32KHZ;
  2185. break;
  2186. case 3:
  2187. sample_rate = SAMPLING_RATE_48KHZ;
  2188. break;
  2189. case 4:
  2190. sample_rate = SAMPLING_RATE_176P4KHZ;
  2191. break;
  2192. case 5:
  2193. sample_rate = SAMPLING_RATE_352P8KHZ;
  2194. break;
  2195. default:
  2196. sample_rate = SAMPLING_RATE_48KHZ;
  2197. break;
  2198. }
  2199. return sample_rate;
  2200. }
  2201. static int aux_pcm_get_sample_rate(int value)
  2202. {
  2203. int sample_rate;
  2204. switch (value) {
  2205. case 1:
  2206. sample_rate = SAMPLING_RATE_16KHZ;
  2207. break;
  2208. case 0:
  2209. default:
  2210. sample_rate = SAMPLING_RATE_8KHZ;
  2211. break;
  2212. }
  2213. return sample_rate;
  2214. }
  2215. static int tdm_get_sample_rate_val(int sample_rate)
  2216. {
  2217. int sample_rate_val = 0;
  2218. switch (sample_rate) {
  2219. case SAMPLING_RATE_8KHZ:
  2220. sample_rate_val = 0;
  2221. break;
  2222. case SAMPLING_RATE_16KHZ:
  2223. sample_rate_val = 1;
  2224. break;
  2225. case SAMPLING_RATE_32KHZ:
  2226. sample_rate_val = 2;
  2227. break;
  2228. case SAMPLING_RATE_48KHZ:
  2229. sample_rate_val = 3;
  2230. break;
  2231. case SAMPLING_RATE_176P4KHZ:
  2232. sample_rate_val = 4;
  2233. break;
  2234. case SAMPLING_RATE_352P8KHZ:
  2235. sample_rate_val = 5;
  2236. break;
  2237. default:
  2238. sample_rate_val = 3;
  2239. break;
  2240. }
  2241. return sample_rate_val;
  2242. }
  2243. static int aux_pcm_get_sample_rate_val(int sample_rate)
  2244. {
  2245. int sample_rate_val;
  2246. switch (sample_rate) {
  2247. case SAMPLING_RATE_16KHZ:
  2248. sample_rate_val = 1;
  2249. break;
  2250. case SAMPLING_RATE_8KHZ:
  2251. default:
  2252. sample_rate_val = 0;
  2253. break;
  2254. }
  2255. return sample_rate_val;
  2256. }
  2257. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  2258. struct tdm_port *port)
  2259. {
  2260. if (port) {
  2261. if (strnstr(kcontrol->id.name, "PRI",
  2262. sizeof(kcontrol->id.name))) {
  2263. port->mode = TDM_PRI;
  2264. } else if (strnstr(kcontrol->id.name, "SEC",
  2265. sizeof(kcontrol->id.name))) {
  2266. port->mode = TDM_SEC;
  2267. } else if (strnstr(kcontrol->id.name, "TERT",
  2268. sizeof(kcontrol->id.name))) {
  2269. port->mode = TDM_TERT;
  2270. } else if (strnstr(kcontrol->id.name, "QUAT",
  2271. sizeof(kcontrol->id.name))) {
  2272. port->mode = TDM_QUAT;
  2273. } else if (strnstr(kcontrol->id.name, "QUIN",
  2274. sizeof(kcontrol->id.name))) {
  2275. port->mode = TDM_QUIN;
  2276. } else {
  2277. pr_err("%s: unsupported mode in: %s\n",
  2278. __func__, kcontrol->id.name);
  2279. return -EINVAL;
  2280. }
  2281. if (strnstr(kcontrol->id.name, "RX_0",
  2282. sizeof(kcontrol->id.name)) ||
  2283. strnstr(kcontrol->id.name, "TX_0",
  2284. sizeof(kcontrol->id.name))) {
  2285. port->channel = TDM_0;
  2286. } else if (strnstr(kcontrol->id.name, "RX_1",
  2287. sizeof(kcontrol->id.name)) ||
  2288. strnstr(kcontrol->id.name, "TX_1",
  2289. sizeof(kcontrol->id.name))) {
  2290. port->channel = TDM_1;
  2291. } else if (strnstr(kcontrol->id.name, "RX_2",
  2292. sizeof(kcontrol->id.name)) ||
  2293. strnstr(kcontrol->id.name, "TX_2",
  2294. sizeof(kcontrol->id.name))) {
  2295. port->channel = TDM_2;
  2296. } else if (strnstr(kcontrol->id.name, "RX_3",
  2297. sizeof(kcontrol->id.name)) ||
  2298. strnstr(kcontrol->id.name, "TX_3",
  2299. sizeof(kcontrol->id.name))) {
  2300. port->channel = TDM_3;
  2301. } else if (strnstr(kcontrol->id.name, "RX_4",
  2302. sizeof(kcontrol->id.name)) ||
  2303. strnstr(kcontrol->id.name, "TX_4",
  2304. sizeof(kcontrol->id.name))) {
  2305. port->channel = TDM_4;
  2306. } else if (strnstr(kcontrol->id.name, "RX_5",
  2307. sizeof(kcontrol->id.name)) ||
  2308. strnstr(kcontrol->id.name, "TX_5",
  2309. sizeof(kcontrol->id.name))) {
  2310. port->channel = TDM_5;
  2311. } else if (strnstr(kcontrol->id.name, "RX_6",
  2312. sizeof(kcontrol->id.name)) ||
  2313. strnstr(kcontrol->id.name, "TX_6",
  2314. sizeof(kcontrol->id.name))) {
  2315. port->channel = TDM_6;
  2316. } else if (strnstr(kcontrol->id.name, "RX_7",
  2317. sizeof(kcontrol->id.name)) ||
  2318. strnstr(kcontrol->id.name, "TX_7",
  2319. sizeof(kcontrol->id.name))) {
  2320. port->channel = TDM_7;
  2321. } else {
  2322. pr_err("%s: unsupported channel in: %s\n",
  2323. __func__, kcontrol->id.name);
  2324. return -EINVAL;
  2325. }
  2326. } else {
  2327. return -EINVAL;
  2328. }
  2329. return 0;
  2330. }
  2331. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2332. struct snd_ctl_elem_value *ucontrol)
  2333. {
  2334. struct tdm_port port;
  2335. int ret = tdm_get_port_idx(kcontrol, &port);
  2336. if (ret) {
  2337. pr_err("%s: unsupported control: %s\n",
  2338. __func__, kcontrol->id.name);
  2339. } else {
  2340. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2341. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  2342. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2343. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2344. ucontrol->value.enumerated.item[0]);
  2345. }
  2346. return ret;
  2347. }
  2348. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2349. struct snd_ctl_elem_value *ucontrol)
  2350. {
  2351. struct tdm_port port;
  2352. int ret = tdm_get_port_idx(kcontrol, &port);
  2353. if (ret) {
  2354. pr_err("%s: unsupported control: %s\n",
  2355. __func__, kcontrol->id.name);
  2356. } else {
  2357. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  2358. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2359. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2360. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2361. ucontrol->value.enumerated.item[0]);
  2362. }
  2363. return ret;
  2364. }
  2365. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2366. struct snd_ctl_elem_value *ucontrol)
  2367. {
  2368. struct tdm_port port;
  2369. int ret = tdm_get_port_idx(kcontrol, &port);
  2370. if (ret) {
  2371. pr_err("%s: unsupported control: %s\n",
  2372. __func__, kcontrol->id.name);
  2373. } else {
  2374. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2375. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  2376. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2377. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2378. ucontrol->value.enumerated.item[0]);
  2379. }
  2380. return ret;
  2381. }
  2382. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2383. struct snd_ctl_elem_value *ucontrol)
  2384. {
  2385. struct tdm_port port;
  2386. int ret = tdm_get_port_idx(kcontrol, &port);
  2387. if (ret) {
  2388. pr_err("%s: unsupported control: %s\n",
  2389. __func__, kcontrol->id.name);
  2390. } else {
  2391. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  2392. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2393. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2394. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2395. ucontrol->value.enumerated.item[0]);
  2396. }
  2397. return ret;
  2398. }
  2399. static int tdm_get_format(int value)
  2400. {
  2401. int format = 0;
  2402. switch (value) {
  2403. case 0:
  2404. format = SNDRV_PCM_FORMAT_S16_LE;
  2405. break;
  2406. case 1:
  2407. format = SNDRV_PCM_FORMAT_S24_LE;
  2408. break;
  2409. case 2:
  2410. format = SNDRV_PCM_FORMAT_S32_LE;
  2411. break;
  2412. default:
  2413. format = SNDRV_PCM_FORMAT_S16_LE;
  2414. break;
  2415. }
  2416. return format;
  2417. }
  2418. static int tdm_get_format_val(int format)
  2419. {
  2420. int value = 0;
  2421. switch (format) {
  2422. case SNDRV_PCM_FORMAT_S16_LE:
  2423. value = 0;
  2424. break;
  2425. case SNDRV_PCM_FORMAT_S24_LE:
  2426. value = 1;
  2427. break;
  2428. case SNDRV_PCM_FORMAT_S32_LE:
  2429. value = 2;
  2430. break;
  2431. default:
  2432. value = 0;
  2433. break;
  2434. }
  2435. return value;
  2436. }
  2437. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  2438. struct snd_ctl_elem_value *ucontrol)
  2439. {
  2440. struct tdm_port port;
  2441. int ret = tdm_get_port_idx(kcontrol, &port);
  2442. if (ret) {
  2443. pr_err("%s: unsupported control: %s\n",
  2444. __func__, kcontrol->id.name);
  2445. } else {
  2446. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2447. tdm_rx_cfg[port.mode][port.channel].bit_format);
  2448. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2449. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2450. ucontrol->value.enumerated.item[0]);
  2451. }
  2452. return ret;
  2453. }
  2454. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  2455. struct snd_ctl_elem_value *ucontrol)
  2456. {
  2457. struct tdm_port port;
  2458. int ret = tdm_get_port_idx(kcontrol, &port);
  2459. if (ret) {
  2460. pr_err("%s: unsupported control: %s\n",
  2461. __func__, kcontrol->id.name);
  2462. } else {
  2463. tdm_rx_cfg[port.mode][port.channel].bit_format =
  2464. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2465. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2466. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2467. ucontrol->value.enumerated.item[0]);
  2468. }
  2469. return ret;
  2470. }
  2471. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  2472. struct snd_ctl_elem_value *ucontrol)
  2473. {
  2474. struct tdm_port port;
  2475. int ret = tdm_get_port_idx(kcontrol, &port);
  2476. if (ret) {
  2477. pr_err("%s: unsupported control: %s\n",
  2478. __func__, kcontrol->id.name);
  2479. } else {
  2480. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2481. tdm_tx_cfg[port.mode][port.channel].bit_format);
  2482. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2483. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2484. ucontrol->value.enumerated.item[0]);
  2485. }
  2486. return ret;
  2487. }
  2488. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  2489. struct snd_ctl_elem_value *ucontrol)
  2490. {
  2491. struct tdm_port port;
  2492. int ret = tdm_get_port_idx(kcontrol, &port);
  2493. if (ret) {
  2494. pr_err("%s: unsupported control: %s\n",
  2495. __func__, kcontrol->id.name);
  2496. } else {
  2497. tdm_tx_cfg[port.mode][port.channel].bit_format =
  2498. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2499. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2500. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2501. ucontrol->value.enumerated.item[0]);
  2502. }
  2503. return ret;
  2504. }
  2505. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  2506. struct snd_ctl_elem_value *ucontrol)
  2507. {
  2508. struct tdm_port port;
  2509. int ret = tdm_get_port_idx(kcontrol, &port);
  2510. if (ret) {
  2511. pr_err("%s: unsupported control: %s\n",
  2512. __func__, kcontrol->id.name);
  2513. } else {
  2514. ucontrol->value.enumerated.item[0] =
  2515. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  2516. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2517. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  2518. ucontrol->value.enumerated.item[0]);
  2519. }
  2520. return ret;
  2521. }
  2522. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  2523. struct snd_ctl_elem_value *ucontrol)
  2524. {
  2525. struct tdm_port port;
  2526. int ret = tdm_get_port_idx(kcontrol, &port);
  2527. if (ret) {
  2528. pr_err("%s: unsupported control: %s\n",
  2529. __func__, kcontrol->id.name);
  2530. } else {
  2531. tdm_rx_cfg[port.mode][port.channel].channels =
  2532. ucontrol->value.enumerated.item[0] + 1;
  2533. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2534. tdm_rx_cfg[port.mode][port.channel].channels,
  2535. ucontrol->value.enumerated.item[0] + 1);
  2536. }
  2537. return ret;
  2538. }
  2539. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  2540. struct snd_ctl_elem_value *ucontrol)
  2541. {
  2542. struct tdm_port port;
  2543. int ret = tdm_get_port_idx(kcontrol, &port);
  2544. if (ret) {
  2545. pr_err("%s: unsupported control: %s\n",
  2546. __func__, kcontrol->id.name);
  2547. } else {
  2548. ucontrol->value.enumerated.item[0] =
  2549. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  2550. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2551. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  2552. ucontrol->value.enumerated.item[0]);
  2553. }
  2554. return ret;
  2555. }
  2556. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  2557. struct snd_ctl_elem_value *ucontrol)
  2558. {
  2559. struct tdm_port port;
  2560. int ret = tdm_get_port_idx(kcontrol, &port);
  2561. if (ret) {
  2562. pr_err("%s: unsupported control: %s\n",
  2563. __func__, kcontrol->id.name);
  2564. } else {
  2565. tdm_tx_cfg[port.mode][port.channel].channels =
  2566. ucontrol->value.enumerated.item[0] + 1;
  2567. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2568. tdm_tx_cfg[port.mode][port.channel].channels,
  2569. ucontrol->value.enumerated.item[0] + 1);
  2570. }
  2571. return ret;
  2572. }
  2573. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  2574. {
  2575. int idx;
  2576. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  2577. sizeof("PRIM_AUX_PCM"))) {
  2578. idx = PRIM_AUX_PCM;
  2579. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  2580. sizeof("SEC_AUX_PCM"))) {
  2581. idx = SEC_AUX_PCM;
  2582. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  2583. sizeof("TERT_AUX_PCM"))) {
  2584. idx = TERT_AUX_PCM;
  2585. } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  2586. sizeof("QUAT_AUX_PCM"))) {
  2587. idx = QUAT_AUX_PCM;
  2588. } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
  2589. sizeof("QUIN_AUX_PCM"))) {
  2590. idx = QUIN_AUX_PCM;
  2591. } else {
  2592. pr_err("%s: unsupported port: %s\n",
  2593. __func__, kcontrol->id.name);
  2594. idx = -EINVAL;
  2595. }
  2596. return idx;
  2597. }
  2598. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2599. struct snd_ctl_elem_value *ucontrol)
  2600. {
  2601. int idx = aux_pcm_get_port_idx(kcontrol);
  2602. if (idx < 0)
  2603. return idx;
  2604. aux_pcm_rx_cfg[idx].sample_rate =
  2605. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2606. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2607. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2608. ucontrol->value.enumerated.item[0]);
  2609. return 0;
  2610. }
  2611. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2612. struct snd_ctl_elem_value *ucontrol)
  2613. {
  2614. int idx = aux_pcm_get_port_idx(kcontrol);
  2615. if (idx < 0)
  2616. return idx;
  2617. ucontrol->value.enumerated.item[0] =
  2618. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  2619. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2620. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2621. ucontrol->value.enumerated.item[0]);
  2622. return 0;
  2623. }
  2624. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2625. struct snd_ctl_elem_value *ucontrol)
  2626. {
  2627. int idx = aux_pcm_get_port_idx(kcontrol);
  2628. if (idx < 0)
  2629. return idx;
  2630. aux_pcm_tx_cfg[idx].sample_rate =
  2631. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2632. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2633. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2634. ucontrol->value.enumerated.item[0]);
  2635. return 0;
  2636. }
  2637. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2638. struct snd_ctl_elem_value *ucontrol)
  2639. {
  2640. int idx = aux_pcm_get_port_idx(kcontrol);
  2641. if (idx < 0)
  2642. return idx;
  2643. ucontrol->value.enumerated.item[0] =
  2644. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  2645. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2646. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2647. ucontrol->value.enumerated.item[0]);
  2648. return 0;
  2649. }
  2650. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  2651. {
  2652. int idx;
  2653. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  2654. sizeof("PRIM_MI2S_RX"))) {
  2655. idx = PRIM_MI2S;
  2656. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  2657. sizeof("SEC_MI2S_RX"))) {
  2658. idx = SEC_MI2S;
  2659. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  2660. sizeof("TERT_MI2S_RX"))) {
  2661. idx = TERT_MI2S;
  2662. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  2663. sizeof("QUAT_MI2S_RX"))) {
  2664. idx = QUAT_MI2S;
  2665. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
  2666. sizeof("QUIN_MI2S_RX"))) {
  2667. idx = QUIN_MI2S;
  2668. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  2669. sizeof("PRIM_MI2S_TX"))) {
  2670. idx = PRIM_MI2S;
  2671. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  2672. sizeof("SEC_MI2S_TX"))) {
  2673. idx = SEC_MI2S;
  2674. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  2675. sizeof("TERT_MI2S_TX"))) {
  2676. idx = TERT_MI2S;
  2677. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  2678. sizeof("QUAT_MI2S_TX"))) {
  2679. idx = QUAT_MI2S;
  2680. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
  2681. sizeof("QUIN_MI2S_TX"))) {
  2682. idx = QUIN_MI2S;
  2683. } else {
  2684. pr_err("%s: unsupported channel: %s\n",
  2685. __func__, kcontrol->id.name);
  2686. idx = -EINVAL;
  2687. }
  2688. return idx;
  2689. }
  2690. static int mi2s_get_sample_rate_val(int sample_rate)
  2691. {
  2692. int sample_rate_val;
  2693. switch (sample_rate) {
  2694. case SAMPLING_RATE_8KHZ:
  2695. sample_rate_val = 0;
  2696. break;
  2697. case SAMPLING_RATE_11P025KHZ:
  2698. sample_rate_val = 1;
  2699. break;
  2700. case SAMPLING_RATE_16KHZ:
  2701. sample_rate_val = 2;
  2702. break;
  2703. case SAMPLING_RATE_22P05KHZ:
  2704. sample_rate_val = 3;
  2705. break;
  2706. case SAMPLING_RATE_32KHZ:
  2707. sample_rate_val = 4;
  2708. break;
  2709. case SAMPLING_RATE_44P1KHZ:
  2710. sample_rate_val = 5;
  2711. break;
  2712. case SAMPLING_RATE_48KHZ:
  2713. sample_rate_val = 6;
  2714. break;
  2715. case SAMPLING_RATE_96KHZ:
  2716. sample_rate_val = 7;
  2717. break;
  2718. case SAMPLING_RATE_192KHZ:
  2719. sample_rate_val = 8;
  2720. break;
  2721. default:
  2722. sample_rate_val = 6;
  2723. break;
  2724. }
  2725. return sample_rate_val;
  2726. }
  2727. static int mi2s_get_sample_rate(int value)
  2728. {
  2729. int sample_rate;
  2730. switch (value) {
  2731. case 0:
  2732. sample_rate = SAMPLING_RATE_8KHZ;
  2733. break;
  2734. case 1:
  2735. sample_rate = SAMPLING_RATE_11P025KHZ;
  2736. break;
  2737. case 2:
  2738. sample_rate = SAMPLING_RATE_16KHZ;
  2739. break;
  2740. case 3:
  2741. sample_rate = SAMPLING_RATE_22P05KHZ;
  2742. break;
  2743. case 4:
  2744. sample_rate = SAMPLING_RATE_32KHZ;
  2745. break;
  2746. case 5:
  2747. sample_rate = SAMPLING_RATE_44P1KHZ;
  2748. break;
  2749. case 6:
  2750. sample_rate = SAMPLING_RATE_48KHZ;
  2751. break;
  2752. case 7:
  2753. sample_rate = SAMPLING_RATE_96KHZ;
  2754. break;
  2755. case 8:
  2756. sample_rate = SAMPLING_RATE_192KHZ;
  2757. break;
  2758. default:
  2759. sample_rate = SAMPLING_RATE_48KHZ;
  2760. break;
  2761. }
  2762. return sample_rate;
  2763. }
  2764. static int mi2s_auxpcm_get_format(int value)
  2765. {
  2766. int format;
  2767. switch (value) {
  2768. case 0:
  2769. format = SNDRV_PCM_FORMAT_S16_LE;
  2770. break;
  2771. case 1:
  2772. format = SNDRV_PCM_FORMAT_S24_LE;
  2773. break;
  2774. case 2:
  2775. format = SNDRV_PCM_FORMAT_S24_3LE;
  2776. break;
  2777. case 3:
  2778. format = SNDRV_PCM_FORMAT_S32_LE;
  2779. break;
  2780. default:
  2781. format = SNDRV_PCM_FORMAT_S16_LE;
  2782. break;
  2783. }
  2784. return format;
  2785. }
  2786. static int mi2s_auxpcm_get_format_value(int format)
  2787. {
  2788. int value;
  2789. switch (format) {
  2790. case SNDRV_PCM_FORMAT_S16_LE:
  2791. value = 0;
  2792. break;
  2793. case SNDRV_PCM_FORMAT_S24_LE:
  2794. value = 1;
  2795. break;
  2796. case SNDRV_PCM_FORMAT_S24_3LE:
  2797. value = 2;
  2798. break;
  2799. case SNDRV_PCM_FORMAT_S32_LE:
  2800. value = 3;
  2801. break;
  2802. default:
  2803. value = 0;
  2804. break;
  2805. }
  2806. return value;
  2807. }
  2808. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2809. struct snd_ctl_elem_value *ucontrol)
  2810. {
  2811. int idx = mi2s_get_port_idx(kcontrol);
  2812. if (idx < 0)
  2813. return idx;
  2814. mi2s_rx_cfg[idx].sample_rate =
  2815. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2816. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2817. idx, mi2s_rx_cfg[idx].sample_rate,
  2818. ucontrol->value.enumerated.item[0]);
  2819. return 0;
  2820. }
  2821. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2822. struct snd_ctl_elem_value *ucontrol)
  2823. {
  2824. int idx = mi2s_get_port_idx(kcontrol);
  2825. if (idx < 0)
  2826. return idx;
  2827. ucontrol->value.enumerated.item[0] =
  2828. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  2829. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2830. idx, mi2s_rx_cfg[idx].sample_rate,
  2831. ucontrol->value.enumerated.item[0]);
  2832. return 0;
  2833. }
  2834. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2835. struct snd_ctl_elem_value *ucontrol)
  2836. {
  2837. int idx = mi2s_get_port_idx(kcontrol);
  2838. if (idx < 0)
  2839. return idx;
  2840. mi2s_tx_cfg[idx].sample_rate =
  2841. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2842. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2843. idx, mi2s_tx_cfg[idx].sample_rate,
  2844. ucontrol->value.enumerated.item[0]);
  2845. return 0;
  2846. }
  2847. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2848. struct snd_ctl_elem_value *ucontrol)
  2849. {
  2850. int idx = mi2s_get_port_idx(kcontrol);
  2851. if (idx < 0)
  2852. return idx;
  2853. ucontrol->value.enumerated.item[0] =
  2854. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  2855. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2856. idx, mi2s_tx_cfg[idx].sample_rate,
  2857. ucontrol->value.enumerated.item[0]);
  2858. return 0;
  2859. }
  2860. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  2861. struct snd_ctl_elem_value *ucontrol)
  2862. {
  2863. int idx = mi2s_get_port_idx(kcontrol);
  2864. if (idx < 0)
  2865. return idx;
  2866. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2867. idx, mi2s_rx_cfg[idx].channels);
  2868. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  2869. return 0;
  2870. }
  2871. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  2872. struct snd_ctl_elem_value *ucontrol)
  2873. {
  2874. int idx = mi2s_get_port_idx(kcontrol);
  2875. if (idx < 0)
  2876. return idx;
  2877. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2878. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2879. idx, mi2s_rx_cfg[idx].channels);
  2880. return 1;
  2881. }
  2882. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  2883. struct snd_ctl_elem_value *ucontrol)
  2884. {
  2885. int idx = mi2s_get_port_idx(kcontrol);
  2886. if (idx < 0)
  2887. return idx;
  2888. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2889. idx, mi2s_tx_cfg[idx].channels);
  2890. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  2891. return 0;
  2892. }
  2893. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  2894. struct snd_ctl_elem_value *ucontrol)
  2895. {
  2896. int idx = mi2s_get_port_idx(kcontrol);
  2897. if (idx < 0)
  2898. return idx;
  2899. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2900. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2901. idx, mi2s_tx_cfg[idx].channels);
  2902. return 1;
  2903. }
  2904. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  2905. struct snd_ctl_elem_value *ucontrol)
  2906. {
  2907. int idx = mi2s_get_port_idx(kcontrol);
  2908. if (idx < 0)
  2909. return idx;
  2910. ucontrol->value.enumerated.item[0] =
  2911. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  2912. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2913. idx, mi2s_rx_cfg[idx].bit_format,
  2914. ucontrol->value.enumerated.item[0]);
  2915. return 0;
  2916. }
  2917. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  2918. struct snd_ctl_elem_value *ucontrol)
  2919. {
  2920. int idx = mi2s_get_port_idx(kcontrol);
  2921. if (idx < 0)
  2922. return idx;
  2923. mi2s_rx_cfg[idx].bit_format =
  2924. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2925. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2926. idx, mi2s_rx_cfg[idx].bit_format,
  2927. ucontrol->value.enumerated.item[0]);
  2928. return 0;
  2929. }
  2930. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  2931. struct snd_ctl_elem_value *ucontrol)
  2932. {
  2933. int idx = mi2s_get_port_idx(kcontrol);
  2934. if (idx < 0)
  2935. return idx;
  2936. ucontrol->value.enumerated.item[0] =
  2937. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  2938. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2939. idx, mi2s_tx_cfg[idx].bit_format,
  2940. ucontrol->value.enumerated.item[0]);
  2941. return 0;
  2942. }
  2943. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  2944. struct snd_ctl_elem_value *ucontrol)
  2945. {
  2946. int idx = mi2s_get_port_idx(kcontrol);
  2947. if (idx < 0)
  2948. return idx;
  2949. mi2s_tx_cfg[idx].bit_format =
  2950. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2951. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2952. idx, mi2s_tx_cfg[idx].bit_format,
  2953. ucontrol->value.enumerated.item[0]);
  2954. return 0;
  2955. }
  2956. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  2957. struct snd_ctl_elem_value *ucontrol)
  2958. {
  2959. int idx = aux_pcm_get_port_idx(kcontrol);
  2960. if (idx < 0)
  2961. return idx;
  2962. ucontrol->value.enumerated.item[0] =
  2963. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  2964. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2965. idx, aux_pcm_rx_cfg[idx].bit_format,
  2966. ucontrol->value.enumerated.item[0]);
  2967. return 0;
  2968. }
  2969. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  2970. struct snd_ctl_elem_value *ucontrol)
  2971. {
  2972. int idx = aux_pcm_get_port_idx(kcontrol);
  2973. if (idx < 0)
  2974. return idx;
  2975. aux_pcm_rx_cfg[idx].bit_format =
  2976. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2977. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2978. idx, aux_pcm_rx_cfg[idx].bit_format,
  2979. ucontrol->value.enumerated.item[0]);
  2980. return 0;
  2981. }
  2982. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  2983. struct snd_ctl_elem_value *ucontrol)
  2984. {
  2985. int idx = aux_pcm_get_port_idx(kcontrol);
  2986. if (idx < 0)
  2987. return idx;
  2988. ucontrol->value.enumerated.item[0] =
  2989. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  2990. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2991. idx, aux_pcm_tx_cfg[idx].bit_format,
  2992. ucontrol->value.enumerated.item[0]);
  2993. return 0;
  2994. }
  2995. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  2996. struct snd_ctl_elem_value *ucontrol)
  2997. {
  2998. int idx = aux_pcm_get_port_idx(kcontrol);
  2999. if (idx < 0)
  3000. return idx;
  3001. aux_pcm_tx_cfg[idx].bit_format =
  3002. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  3003. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  3004. idx, aux_pcm_tx_cfg[idx].bit_format,
  3005. ucontrol->value.enumerated.item[0]);
  3006. return 0;
  3007. }
  3008. static int msm_hifi_ctrl(struct snd_soc_component *component)
  3009. {
  3010. struct snd_soc_dapm_context *dapm =
  3011. snd_soc_component_get_dapm(component);
  3012. struct snd_soc_card *card = component->card;
  3013. struct msm_asoc_mach_data *pdata =
  3014. snd_soc_card_get_drvdata(card);
  3015. dev_dbg(component->dev, "%s: msm_hifi_control = %d\n", __func__,
  3016. msm_hifi_control);
  3017. if (!pdata || !pdata->hph_en1_gpio_p) {
  3018. dev_err(component->dev, "%s: hph_en1_gpio is invalid\n",
  3019. __func__);
  3020. return -EINVAL;
  3021. }
  3022. if (msm_hifi_control == MSM_HIFI_ON) {
  3023. msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
  3024. /* 5msec delay needed as per HW requirement */
  3025. usleep_range(5000, 5010);
  3026. } else {
  3027. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
  3028. }
  3029. snd_soc_dapm_sync(dapm);
  3030. return 0;
  3031. }
  3032. static int msm_hifi_get(struct snd_kcontrol *kcontrol,
  3033. struct snd_ctl_elem_value *ucontrol)
  3034. {
  3035. pr_debug("%s: msm_hifi_control = %d\n",
  3036. __func__, msm_hifi_control);
  3037. ucontrol->value.integer.value[0] = msm_hifi_control;
  3038. return 0;
  3039. }
  3040. static int msm_hifi_put(struct snd_kcontrol *kcontrol,
  3041. struct snd_ctl_elem_value *ucontrol)
  3042. {
  3043. struct snd_soc_component *component =
  3044. snd_soc_kcontrol_component(kcontrol);
  3045. dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  3046. __func__, ucontrol->value.integer.value[0]);
  3047. msm_hifi_control = ucontrol->value.integer.value[0];
  3048. msm_hifi_ctrl(component);
  3049. return 0;
  3050. }
  3051. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  3052. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  3053. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3054. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  3055. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3056. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  3057. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3058. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  3059. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3060. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  3061. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3062. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  3063. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3064. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  3065. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3066. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  3067. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3068. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  3069. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3070. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  3071. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3072. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  3073. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3074. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  3075. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3076. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  3077. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3078. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  3079. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3080. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  3081. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3082. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  3083. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3084. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  3085. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3086. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  3087. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3088. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  3089. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3090. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  3091. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3092. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  3093. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3094. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  3095. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3096. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  3097. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3098. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  3099. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3100. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  3101. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3102. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  3103. wsa_cdc_dma_rx_0_sample_rate,
  3104. cdc_dma_rx_sample_rate_get,
  3105. cdc_dma_rx_sample_rate_put),
  3106. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  3107. wsa_cdc_dma_rx_1_sample_rate,
  3108. cdc_dma_rx_sample_rate_get,
  3109. cdc_dma_rx_sample_rate_put),
  3110. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  3111. rx_cdc_dma_rx_0_sample_rate,
  3112. cdc_dma_rx_sample_rate_get,
  3113. cdc_dma_rx_sample_rate_put),
  3114. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  3115. rx_cdc_dma_rx_1_sample_rate,
  3116. cdc_dma_rx_sample_rate_get,
  3117. cdc_dma_rx_sample_rate_put),
  3118. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  3119. rx_cdc_dma_rx_2_sample_rate,
  3120. cdc_dma_rx_sample_rate_get,
  3121. cdc_dma_rx_sample_rate_put),
  3122. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  3123. rx_cdc_dma_rx_3_sample_rate,
  3124. cdc_dma_rx_sample_rate_get,
  3125. cdc_dma_rx_sample_rate_put),
  3126. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  3127. rx_cdc_dma_rx_5_sample_rate,
  3128. cdc_dma_rx_sample_rate_get,
  3129. cdc_dma_rx_sample_rate_put),
  3130. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  3131. wsa_cdc_dma_tx_0_sample_rate,
  3132. cdc_dma_tx_sample_rate_get,
  3133. cdc_dma_tx_sample_rate_put),
  3134. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  3135. wsa_cdc_dma_tx_1_sample_rate,
  3136. cdc_dma_tx_sample_rate_get,
  3137. cdc_dma_tx_sample_rate_put),
  3138. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  3139. wsa_cdc_dma_tx_2_sample_rate,
  3140. cdc_dma_tx_sample_rate_get,
  3141. cdc_dma_tx_sample_rate_put),
  3142. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  3143. tx_cdc_dma_tx_0_sample_rate,
  3144. cdc_dma_tx_sample_rate_get,
  3145. cdc_dma_tx_sample_rate_put),
  3146. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  3147. tx_cdc_dma_tx_3_sample_rate,
  3148. cdc_dma_tx_sample_rate_get,
  3149. cdc_dma_tx_sample_rate_put),
  3150. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  3151. tx_cdc_dma_tx_4_sample_rate,
  3152. cdc_dma_tx_sample_rate_get,
  3153. cdc_dma_tx_sample_rate_put),
  3154. };
  3155. static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
  3156. SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
  3157. slim_rx_ch_get, slim_rx_ch_put),
  3158. SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
  3159. slim_rx_ch_get, slim_rx_ch_put),
  3160. SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
  3161. slim_tx_ch_get, slim_tx_ch_put),
  3162. SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
  3163. slim_tx_ch_get, slim_tx_ch_put),
  3164. SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
  3165. slim_rx_ch_get, slim_rx_ch_put),
  3166. SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
  3167. slim_rx_ch_get, slim_rx_ch_put),
  3168. SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
  3169. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3170. SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
  3171. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3172. SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
  3173. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3174. SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
  3175. slim_tx_bit_format_get, slim_tx_bit_format_put),
  3176. SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
  3177. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3178. SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
  3179. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3180. SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
  3181. slim_tx_sample_rate_get, slim_tx_sample_rate_put),
  3182. SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
  3183. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3184. SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
  3185. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3186. };
  3187. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  3188. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  3189. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  3190. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  3191. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  3192. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  3193. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  3194. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  3195. proxy_rx_ch_get, proxy_rx_ch_put),
  3196. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  3197. usb_audio_rx_format_get, usb_audio_rx_format_put),
  3198. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  3199. usb_audio_tx_format_get, usb_audio_tx_format_put),
  3200. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  3201. ext_disp_rx_format_get, ext_disp_rx_format_put),
  3202. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  3203. usb_audio_rx_sample_rate_get,
  3204. usb_audio_rx_sample_rate_put),
  3205. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  3206. usb_audio_tx_sample_rate_get,
  3207. usb_audio_tx_sample_rate_put),
  3208. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  3209. ext_disp_rx_sample_rate_get,
  3210. ext_disp_rx_sample_rate_put),
  3211. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3212. tdm_rx_sample_rate_get,
  3213. tdm_rx_sample_rate_put),
  3214. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3215. tdm_tx_sample_rate_get,
  3216. tdm_tx_sample_rate_put),
  3217. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  3218. tdm_rx_format_get,
  3219. tdm_rx_format_put),
  3220. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  3221. tdm_tx_format_get,
  3222. tdm_tx_format_put),
  3223. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  3224. tdm_rx_ch_get,
  3225. tdm_rx_ch_put),
  3226. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  3227. tdm_tx_ch_get,
  3228. tdm_tx_ch_put),
  3229. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3230. tdm_rx_sample_rate_get,
  3231. tdm_rx_sample_rate_put),
  3232. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3233. tdm_tx_sample_rate_get,
  3234. tdm_tx_sample_rate_put),
  3235. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  3236. tdm_rx_format_get,
  3237. tdm_rx_format_put),
  3238. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  3239. tdm_tx_format_get,
  3240. tdm_tx_format_put),
  3241. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  3242. tdm_rx_ch_get,
  3243. tdm_rx_ch_put),
  3244. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  3245. tdm_tx_ch_get,
  3246. tdm_tx_ch_put),
  3247. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3248. tdm_rx_sample_rate_get,
  3249. tdm_rx_sample_rate_put),
  3250. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3251. tdm_tx_sample_rate_get,
  3252. tdm_tx_sample_rate_put),
  3253. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  3254. tdm_rx_format_get,
  3255. tdm_rx_format_put),
  3256. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  3257. tdm_tx_format_get,
  3258. tdm_tx_format_put),
  3259. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  3260. tdm_rx_ch_get,
  3261. tdm_rx_ch_put),
  3262. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  3263. tdm_tx_ch_get,
  3264. tdm_tx_ch_put),
  3265. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3266. tdm_rx_sample_rate_get,
  3267. tdm_rx_sample_rate_put),
  3268. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3269. tdm_tx_sample_rate_get,
  3270. tdm_tx_sample_rate_put),
  3271. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  3272. tdm_rx_format_get,
  3273. tdm_rx_format_put),
  3274. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  3275. tdm_tx_format_get,
  3276. tdm_tx_format_put),
  3277. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  3278. tdm_rx_ch_get,
  3279. tdm_rx_ch_put),
  3280. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  3281. tdm_tx_ch_get,
  3282. tdm_tx_ch_put),
  3283. SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3284. tdm_rx_sample_rate_get,
  3285. tdm_rx_sample_rate_put),
  3286. SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3287. tdm_tx_sample_rate_get,
  3288. tdm_tx_sample_rate_put),
  3289. SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
  3290. tdm_rx_format_get,
  3291. tdm_rx_format_put),
  3292. SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
  3293. tdm_tx_format_get,
  3294. tdm_tx_format_put),
  3295. SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
  3296. tdm_rx_ch_get,
  3297. tdm_rx_ch_put),
  3298. SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
  3299. tdm_tx_ch_get,
  3300. tdm_tx_ch_put),
  3301. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  3302. aux_pcm_rx_sample_rate_get,
  3303. aux_pcm_rx_sample_rate_put),
  3304. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  3305. aux_pcm_rx_sample_rate_get,
  3306. aux_pcm_rx_sample_rate_put),
  3307. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  3308. aux_pcm_rx_sample_rate_get,
  3309. aux_pcm_rx_sample_rate_put),
  3310. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  3311. aux_pcm_rx_sample_rate_get,
  3312. aux_pcm_rx_sample_rate_put),
  3313. SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
  3314. aux_pcm_rx_sample_rate_get,
  3315. aux_pcm_rx_sample_rate_put),
  3316. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  3317. aux_pcm_tx_sample_rate_get,
  3318. aux_pcm_tx_sample_rate_put),
  3319. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  3320. aux_pcm_tx_sample_rate_get,
  3321. aux_pcm_tx_sample_rate_put),
  3322. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  3323. aux_pcm_tx_sample_rate_get,
  3324. aux_pcm_tx_sample_rate_put),
  3325. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  3326. aux_pcm_tx_sample_rate_get,
  3327. aux_pcm_tx_sample_rate_put),
  3328. SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
  3329. aux_pcm_tx_sample_rate_get,
  3330. aux_pcm_tx_sample_rate_put),
  3331. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  3332. mi2s_rx_sample_rate_get,
  3333. mi2s_rx_sample_rate_put),
  3334. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  3335. mi2s_rx_sample_rate_get,
  3336. mi2s_rx_sample_rate_put),
  3337. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  3338. mi2s_rx_sample_rate_get,
  3339. mi2s_rx_sample_rate_put),
  3340. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  3341. mi2s_rx_sample_rate_get,
  3342. mi2s_rx_sample_rate_put),
  3343. SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
  3344. mi2s_rx_sample_rate_get,
  3345. mi2s_rx_sample_rate_put),
  3346. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  3347. mi2s_tx_sample_rate_get,
  3348. mi2s_tx_sample_rate_put),
  3349. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  3350. mi2s_tx_sample_rate_get,
  3351. mi2s_tx_sample_rate_put),
  3352. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  3353. mi2s_tx_sample_rate_get,
  3354. mi2s_tx_sample_rate_put),
  3355. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  3356. mi2s_tx_sample_rate_get,
  3357. mi2s_tx_sample_rate_put),
  3358. SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
  3359. mi2s_tx_sample_rate_get,
  3360. mi2s_tx_sample_rate_put),
  3361. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  3362. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3363. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  3364. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3365. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  3366. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3367. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  3368. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3369. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  3370. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3371. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  3372. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3373. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  3374. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3375. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  3376. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3377. SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
  3378. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3379. SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
  3380. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3381. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  3382. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3383. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  3384. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3385. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  3386. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3387. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  3388. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3389. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  3390. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3391. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  3392. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3393. SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
  3394. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3395. SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
  3396. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3397. SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
  3398. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3399. SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
  3400. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3401. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  3402. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3403. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  3404. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3405. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  3406. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3407. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  3408. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3409. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3410. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3411. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3412. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3413. SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3414. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3415. SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3416. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3417. SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
  3418. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3419. SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
  3420. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3421. SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
  3422. msm_hifi_put),
  3423. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  3424. msm_bt_sample_rate_get,
  3425. msm_bt_sample_rate_put),
  3426. SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
  3427. msm_bt_sample_rate_rx_get,
  3428. msm_bt_sample_rate_rx_put),
  3429. SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
  3430. msm_bt_sample_rate_tx_get,
  3431. msm_bt_sample_rate_tx_put),
  3432. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  3433. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  3434. };
  3435. static int msm_snd_enable_codec_ext_clk(struct snd_soc_component *component,
  3436. int enable, bool dapm)
  3437. {
  3438. int ret = 0;
  3439. if (!strcmp(component->name, "tavil_codec")) {
  3440. ret = tavil_cdc_mclk_enable(component, enable);
  3441. } else {
  3442. dev_err(component->dev, "%s: unknown codec to enable ext clk\n",
  3443. __func__);
  3444. ret = -EINVAL;
  3445. }
  3446. return ret;
  3447. }
  3448. static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_component *component,
  3449. int enable, bool dapm)
  3450. {
  3451. int ret = 0;
  3452. if (!strcmp(component->name, "tavil_codec")) {
  3453. ret = tavil_cdc_mclk_tx_enable(component, enable);
  3454. } else {
  3455. dev_err(component->dev, "%s: unknown codec to enable TX ext clk\n",
  3456. __func__);
  3457. ret = -EINVAL;
  3458. }
  3459. return ret;
  3460. }
  3461. static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
  3462. struct snd_kcontrol *kcontrol, int event)
  3463. {
  3464. struct snd_soc_component *component =
  3465. snd_soc_dapm_to_component(w->dapm);
  3466. pr_debug("%s: event = %d\n", __func__, event);
  3467. switch (event) {
  3468. case SND_SOC_DAPM_PRE_PMU:
  3469. return msm_snd_enable_codec_ext_tx_clk(component, 1, true);
  3470. case SND_SOC_DAPM_POST_PMD:
  3471. return msm_snd_enable_codec_ext_tx_clk(component, 0, true);
  3472. }
  3473. return 0;
  3474. }
  3475. static int msm_mclk_event(struct snd_soc_dapm_widget *w,
  3476. struct snd_kcontrol *kcontrol, int event)
  3477. {
  3478. struct snd_soc_component *component =
  3479. snd_soc_dapm_to_component(w->dapm);
  3480. pr_debug("%s: event = %d\n", __func__, event);
  3481. switch (event) {
  3482. case SND_SOC_DAPM_PRE_PMU:
  3483. return msm_snd_enable_codec_ext_clk(component, 1, true);
  3484. case SND_SOC_DAPM_POST_PMD:
  3485. return msm_snd_enable_codec_ext_clk(component, 0, true);
  3486. }
  3487. return 0;
  3488. }
  3489. static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
  3490. struct snd_kcontrol *k, int event)
  3491. {
  3492. struct snd_soc_component *component =
  3493. snd_soc_dapm_to_component(w->dapm);
  3494. struct snd_soc_card *card = component->card;
  3495. struct msm_asoc_mach_data *pdata =
  3496. snd_soc_card_get_drvdata(card);
  3497. dev_dbg(component->dev, "%s: msm_hifi_control = %d\n",
  3498. __func__, msm_hifi_control);
  3499. if (!pdata || !pdata->hph_en0_gpio_p) {
  3500. dev_err(component->dev, "%s: hph_en0_gpio is invalid\n",
  3501. __func__);
  3502. return -EINVAL;
  3503. }
  3504. if (msm_hifi_control != MSM_HIFI_ON) {
  3505. dev_dbg(component->dev, "%s: HiFi mixer control is not set\n",
  3506. __func__);
  3507. return 0;
  3508. }
  3509. switch (event) {
  3510. case SND_SOC_DAPM_POST_PMU:
  3511. msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
  3512. break;
  3513. case SND_SOC_DAPM_PRE_PMD:
  3514. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
  3515. break;
  3516. }
  3517. return 0;
  3518. }
  3519. static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
  3520. SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
  3521. msm_mclk_event,
  3522. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3523. SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
  3524. msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3525. SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
  3526. SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
  3527. SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
  3528. SND_SOC_DAPM_MIC("Handset Mic", NULL),
  3529. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  3530. SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
  3531. SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
  3532. SND_SOC_DAPM_MIC("Analog Mic5", NULL),
  3533. SND_SOC_DAPM_MIC("Digital Mic0", NULL),
  3534. SND_SOC_DAPM_MIC("Digital Mic1", NULL),
  3535. SND_SOC_DAPM_MIC("Digital Mic2", NULL),
  3536. SND_SOC_DAPM_MIC("Digital Mic3", NULL),
  3537. SND_SOC_DAPM_MIC("Digital Mic4", NULL),
  3538. SND_SOC_DAPM_MIC("Digital Mic5", NULL),
  3539. };
  3540. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3541. struct snd_kcontrol *kcontrol, int event)
  3542. {
  3543. struct msm_asoc_mach_data *pdata = NULL;
  3544. struct snd_soc_component *component =
  3545. snd_soc_dapm_to_component(w->dapm);
  3546. int ret = 0;
  3547. u32 dmic_idx;
  3548. int *dmic_gpio_cnt;
  3549. struct device_node *dmic_gpio;
  3550. char *wname;
  3551. wname = strpbrk(w->name, "0123");
  3552. if (!wname) {
  3553. dev_err(component->dev, "%s: widget not found\n", __func__);
  3554. return -EINVAL;
  3555. }
  3556. ret = kstrtouint(wname, 10, &dmic_idx);
  3557. if (ret < 0) {
  3558. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  3559. __func__);
  3560. return -EINVAL;
  3561. }
  3562. pdata = snd_soc_card_get_drvdata(component->card);
  3563. switch (dmic_idx) {
  3564. case 0:
  3565. case 1:
  3566. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3567. dmic_gpio = pdata->dmic01_gpio_p;
  3568. break;
  3569. case 2:
  3570. case 3:
  3571. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3572. dmic_gpio = pdata->dmic23_gpio_p;
  3573. break;
  3574. default:
  3575. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  3576. __func__);
  3577. return -EINVAL;
  3578. }
  3579. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3580. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3581. switch (event) {
  3582. case SND_SOC_DAPM_PRE_PMU:
  3583. (*dmic_gpio_cnt)++;
  3584. if (*dmic_gpio_cnt == 1) {
  3585. ret = msm_cdc_pinctrl_select_active_state(
  3586. dmic_gpio);
  3587. if (ret < 0) {
  3588. pr_err("%s: gpio set cannot be activated %sd",
  3589. __func__, "dmic_gpio");
  3590. return ret;
  3591. }
  3592. }
  3593. break;
  3594. case SND_SOC_DAPM_POST_PMD:
  3595. (*dmic_gpio_cnt)--;
  3596. if (*dmic_gpio_cnt == 0) {
  3597. ret = msm_cdc_pinctrl_select_sleep_state(
  3598. dmic_gpio);
  3599. if (ret < 0) {
  3600. pr_err("%s: gpio set cannot be de-activated %sd",
  3601. __func__, "dmic_gpio");
  3602. return ret;
  3603. }
  3604. }
  3605. break;
  3606. default:
  3607. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3608. return -EINVAL;
  3609. }
  3610. return 0;
  3611. }
  3612. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3613. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3614. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3615. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3616. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3617. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3618. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3619. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3620. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3621. };
  3622. static inline int param_is_mask(int p)
  3623. {
  3624. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  3625. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  3626. }
  3627. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  3628. int n)
  3629. {
  3630. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  3631. }
  3632. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  3633. unsigned int bit)
  3634. {
  3635. if (bit >= SNDRV_MASK_MAX)
  3636. return;
  3637. if (param_is_mask(n)) {
  3638. struct snd_mask *m = param_to_mask(p, n);
  3639. m->bits[0] = 0;
  3640. m->bits[1] = 0;
  3641. m->bits[bit >> 5] |= (1 << (bit & 31));
  3642. }
  3643. }
  3644. static int msm_slim_get_ch_from_beid(int32_t be_id)
  3645. {
  3646. int ch_id = 0;
  3647. switch (be_id) {
  3648. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3649. ch_id = SLIM_RX_0;
  3650. break;
  3651. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3652. ch_id = SLIM_RX_1;
  3653. break;
  3654. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3655. ch_id = SLIM_RX_2;
  3656. break;
  3657. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3658. ch_id = SLIM_RX_3;
  3659. break;
  3660. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3661. ch_id = SLIM_RX_4;
  3662. break;
  3663. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3664. ch_id = SLIM_RX_6;
  3665. break;
  3666. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3667. ch_id = SLIM_TX_0;
  3668. break;
  3669. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3670. ch_id = SLIM_TX_3;
  3671. break;
  3672. default:
  3673. ch_id = SLIM_RX_0;
  3674. break;
  3675. }
  3676. return ch_id;
  3677. }
  3678. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  3679. {
  3680. int idx = 0;
  3681. switch (be_id) {
  3682. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3683. idx = WSA_CDC_DMA_RX_0;
  3684. break;
  3685. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3686. idx = WSA_CDC_DMA_TX_0;
  3687. break;
  3688. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3689. idx = WSA_CDC_DMA_RX_1;
  3690. break;
  3691. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3692. idx = WSA_CDC_DMA_TX_1;
  3693. break;
  3694. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3695. idx = WSA_CDC_DMA_TX_2;
  3696. break;
  3697. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3698. idx = RX_CDC_DMA_RX_0;
  3699. break;
  3700. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3701. idx = RX_CDC_DMA_RX_1;
  3702. break;
  3703. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3704. idx = RX_CDC_DMA_RX_2;
  3705. break;
  3706. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3707. idx = RX_CDC_DMA_RX_3;
  3708. break;
  3709. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3710. idx = RX_CDC_DMA_RX_5;
  3711. break;
  3712. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3713. idx = TX_CDC_DMA_TX_0;
  3714. break;
  3715. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3716. idx = TX_CDC_DMA_TX_3;
  3717. break;
  3718. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3719. idx = TX_CDC_DMA_TX_4;
  3720. break;
  3721. default:
  3722. idx = RX_CDC_DMA_RX_0;
  3723. break;
  3724. }
  3725. return idx;
  3726. }
  3727. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  3728. {
  3729. int idx = -EINVAL;
  3730. switch (be_id) {
  3731. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3732. idx = DP_RX_IDX;
  3733. break;
  3734. default:
  3735. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  3736. idx = -EINVAL;
  3737. break;
  3738. }
  3739. return idx;
  3740. }
  3741. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3742. struct snd_pcm_hw_params *params)
  3743. {
  3744. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3745. struct snd_interval *rate = hw_param_interval(params,
  3746. SNDRV_PCM_HW_PARAM_RATE);
  3747. struct snd_interval *channels = hw_param_interval(params,
  3748. SNDRV_PCM_HW_PARAM_CHANNELS);
  3749. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3750. int rc = 0;
  3751. int idx;
  3752. void *config = NULL;
  3753. struct snd_soc_component *component = NULL;
  3754. pr_debug("%s: format = %d, rate = %d\n",
  3755. __func__, params_format(params), params_rate(params));
  3756. switch (dai_link->id) {
  3757. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3758. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3759. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3760. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3761. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3762. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3763. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3764. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3765. slim_rx_cfg[idx].bit_format);
  3766. rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
  3767. channels->min = channels->max = slim_rx_cfg[idx].channels;
  3768. break;
  3769. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3770. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3771. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3772. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3773. slim_tx_cfg[idx].bit_format);
  3774. rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
  3775. channels->min = channels->max = slim_tx_cfg[idx].channels;
  3776. break;
  3777. case MSM_BACKEND_DAI_SLIMBUS_1_TX:
  3778. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3779. slim_tx_cfg[1].bit_format);
  3780. rate->min = rate->max = slim_tx_cfg[1].sample_rate;
  3781. channels->min = channels->max = slim_tx_cfg[1].channels;
  3782. break;
  3783. case MSM_BACKEND_DAI_SLIMBUS_4_TX:
  3784. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3785. SNDRV_PCM_FORMAT_S32_LE);
  3786. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3787. channels->min = channels->max = msm_vi_feed_tx_ch;
  3788. break;
  3789. case MSM_BACKEND_DAI_SLIMBUS_5_RX:
  3790. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3791. slim_rx_cfg[5].bit_format);
  3792. rate->min = rate->max = slim_rx_cfg[5].sample_rate;
  3793. channels->min = channels->max = slim_rx_cfg[5].channels;
  3794. break;
  3795. case MSM_BACKEND_DAI_SLIMBUS_5_TX:
  3796. component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
  3797. if (!component) {
  3798. pr_err("%s: component is NULL\n", __func__);
  3799. rc = -EINVAL;
  3800. goto done;
  3801. }
  3802. rate->min = rate->max = SAMPLING_RATE_16KHZ;
  3803. channels->min = channels->max = 1;
  3804. config = msm_codec_fn.get_afe_config_fn(component,
  3805. AFE_SLIMBUS_SLAVE_PORT_CONFIG);
  3806. if (config) {
  3807. rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
  3808. config, SLIMBUS_5_TX);
  3809. if (rc)
  3810. pr_err("%s: Failed to set slimbus slave port config %d\n",
  3811. __func__, rc);
  3812. }
  3813. break;
  3814. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3815. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3816. slim_rx_cfg[SLIM_RX_7].bit_format);
  3817. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3818. channels->min = channels->max =
  3819. slim_rx_cfg[SLIM_RX_7].channels;
  3820. break;
  3821. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3822. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3823. channels->min = channels->max =
  3824. slim_tx_cfg[SLIM_TX_7].channels;
  3825. break;
  3826. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3827. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3828. channels->min = channels->max =
  3829. slim_tx_cfg[SLIM_TX_8].channels;
  3830. break;
  3831. case MSM_BACKEND_DAI_USB_RX:
  3832. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3833. usb_rx_cfg.bit_format);
  3834. rate->min = rate->max = usb_rx_cfg.sample_rate;
  3835. channels->min = channels->max = usb_rx_cfg.channels;
  3836. break;
  3837. case MSM_BACKEND_DAI_USB_TX:
  3838. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3839. usb_tx_cfg.bit_format);
  3840. rate->min = rate->max = usb_tx_cfg.sample_rate;
  3841. channels->min = channels->max = usb_tx_cfg.channels;
  3842. break;
  3843. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3844. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  3845. if (idx < 0) {
  3846. pr_err("%s: Incorrect ext disp idx %d\n",
  3847. __func__, idx);
  3848. rc = idx;
  3849. goto done;
  3850. }
  3851. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3852. ext_disp_rx_cfg[idx].bit_format);
  3853. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  3854. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  3855. break;
  3856. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3857. channels->min = channels->max = proxy_rx_cfg.channels;
  3858. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3859. break;
  3860. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3861. channels->min = channels->max =
  3862. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3863. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3864. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3865. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3866. break;
  3867. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3868. channels->min = channels->max =
  3869. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3870. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3871. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3872. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3873. break;
  3874. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3875. channels->min = channels->max =
  3876. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3877. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3878. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3879. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3880. break;
  3881. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3882. channels->min = channels->max =
  3883. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3884. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3885. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3886. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3887. break;
  3888. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3889. channels->min = channels->max =
  3890. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3891. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3892. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3893. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3894. break;
  3895. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3896. channels->min = channels->max =
  3897. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3898. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3899. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3900. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3901. break;
  3902. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  3903. channels->min = channels->max =
  3904. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3905. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3906. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  3907. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3908. break;
  3909. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  3910. channels->min = channels->max =
  3911. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  3912. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3913. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  3914. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3915. break;
  3916. case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
  3917. channels->min = channels->max =
  3918. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  3919. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3920. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  3921. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3922. break;
  3923. case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
  3924. channels->min = channels->max =
  3925. tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  3926. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3927. tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
  3928. rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3929. break;
  3930. case MSM_BACKEND_DAI_AUXPCM_RX:
  3931. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3932. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3933. rate->min = rate->max =
  3934. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3935. channels->min = channels->max =
  3936. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3937. break;
  3938. case MSM_BACKEND_DAI_AUXPCM_TX:
  3939. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3940. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3941. rate->min = rate->max =
  3942. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3943. channels->min = channels->max =
  3944. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3945. break;
  3946. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3947. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3948. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3949. rate->min = rate->max =
  3950. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3951. channels->min = channels->max =
  3952. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3953. break;
  3954. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3955. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3956. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3957. rate->min = rate->max =
  3958. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3959. channels->min = channels->max =
  3960. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3961. break;
  3962. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3963. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3964. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3965. rate->min = rate->max =
  3966. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3967. channels->min = channels->max =
  3968. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3969. break;
  3970. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3971. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3972. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3973. rate->min = rate->max =
  3974. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3975. channels->min = channels->max =
  3976. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3977. break;
  3978. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  3979. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3980. aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
  3981. rate->min = rate->max =
  3982. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  3983. channels->min = channels->max =
  3984. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  3985. break;
  3986. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  3987. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3988. aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
  3989. rate->min = rate->max =
  3990. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  3991. channels->min = channels->max =
  3992. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  3993. break;
  3994. case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
  3995. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3996. aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
  3997. rate->min = rate->max =
  3998. aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
  3999. channels->min = channels->max =
  4000. aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
  4001. break;
  4002. case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
  4003. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4004. aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
  4005. rate->min = rate->max =
  4006. aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
  4007. channels->min = channels->max =
  4008. aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
  4009. break;
  4010. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  4011. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4012. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  4013. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  4014. channels->min = channels->max =
  4015. mi2s_rx_cfg[PRIM_MI2S].channels;
  4016. break;
  4017. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  4018. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4019. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  4020. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  4021. channels->min = channels->max =
  4022. mi2s_tx_cfg[PRIM_MI2S].channels;
  4023. break;
  4024. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  4025. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4026. mi2s_rx_cfg[SEC_MI2S].bit_format);
  4027. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  4028. channels->min = channels->max =
  4029. mi2s_rx_cfg[SEC_MI2S].channels;
  4030. break;
  4031. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  4032. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4033. mi2s_tx_cfg[SEC_MI2S].bit_format);
  4034. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  4035. channels->min = channels->max =
  4036. mi2s_tx_cfg[SEC_MI2S].channels;
  4037. break;
  4038. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4039. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4040. mi2s_rx_cfg[TERT_MI2S].bit_format);
  4041. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  4042. channels->min = channels->max =
  4043. mi2s_rx_cfg[TERT_MI2S].channels;
  4044. break;
  4045. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4046. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4047. mi2s_tx_cfg[TERT_MI2S].bit_format);
  4048. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  4049. channels->min = channels->max =
  4050. mi2s_tx_cfg[TERT_MI2S].channels;
  4051. break;
  4052. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4053. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4054. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  4055. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  4056. channels->min = channels->max =
  4057. mi2s_rx_cfg[QUAT_MI2S].channels;
  4058. break;
  4059. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4060. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4061. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  4062. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  4063. channels->min = channels->max =
  4064. mi2s_tx_cfg[QUAT_MI2S].channels;
  4065. break;
  4066. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4067. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4068. mi2s_rx_cfg[QUIN_MI2S].bit_format);
  4069. rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
  4070. channels->min = channels->max =
  4071. mi2s_rx_cfg[QUIN_MI2S].channels;
  4072. break;
  4073. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4074. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4075. mi2s_tx_cfg[QUIN_MI2S].bit_format);
  4076. rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
  4077. channels->min = channels->max =
  4078. mi2s_tx_cfg[QUIN_MI2S].channels;
  4079. break;
  4080. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4081. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4082. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4083. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4084. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4085. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4086. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4087. cdc_dma_rx_cfg[idx].bit_format);
  4088. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  4089. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  4090. break;
  4091. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4092. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4093. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4094. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  4095. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  4096. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4097. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4098. cdc_dma_tx_cfg[idx].bit_format);
  4099. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  4100. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  4101. break;
  4102. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4103. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4104. SNDRV_PCM_FORMAT_S32_LE);
  4105. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  4106. channels->min = channels->max = msm_vi_feed_tx_ch;
  4107. break;
  4108. default:
  4109. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  4110. break;
  4111. }
  4112. done:
  4113. return rc;
  4114. }
  4115. static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component,
  4116. bool active)
  4117. {
  4118. struct snd_soc_card *card = component->card;
  4119. struct msm_asoc_mach_data *pdata =
  4120. snd_soc_card_get_drvdata(card);
  4121. if (!pdata->fsa_handle)
  4122. return false;
  4123. return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
  4124. }
  4125. static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
  4126. {
  4127. int value = 0;
  4128. bool ret = false;
  4129. struct snd_soc_card *card;
  4130. struct msm_asoc_mach_data *pdata;
  4131. if (!component) {
  4132. pr_err("%s component is NULL\n", __func__);
  4133. return false;
  4134. }
  4135. card = component->card;
  4136. pdata = snd_soc_card_get_drvdata(card);
  4137. if (!pdata)
  4138. return false;
  4139. if (wcd_mbhc_cfg.enable_usbc_analog)
  4140. return msm_usbc_swap_gnd_mic(component, active);
  4141. /* if usbc is not defined, swap using us_euro_gpio_p */
  4142. if (pdata->us_euro_gpio_p) {
  4143. value = msm_cdc_pinctrl_get_state(
  4144. pdata->us_euro_gpio_p);
  4145. if (value)
  4146. msm_cdc_pinctrl_select_sleep_state(
  4147. pdata->us_euro_gpio_p);
  4148. else
  4149. msm_cdc_pinctrl_select_active_state(
  4150. pdata->us_euro_gpio_p);
  4151. dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
  4152. __func__, value, !value);
  4153. ret = true;
  4154. }
  4155. return ret;
  4156. }
  4157. static int msm_afe_set_config(struct snd_soc_component *component)
  4158. {
  4159. int ret = 0;
  4160. void *config_data = NULL;
  4161. if (!msm_codec_fn.get_afe_config_fn) {
  4162. dev_err(component->dev, "%s: codec get afe config not init'ed\n",
  4163. __func__);
  4164. return -EINVAL;
  4165. }
  4166. config_data = msm_codec_fn.get_afe_config_fn(component,
  4167. AFE_CDC_REGISTERS_CONFIG);
  4168. if (config_data) {
  4169. ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
  4170. if (ret) {
  4171. dev_err(component->dev,
  4172. "%s: Failed to set codec registers config %d\n",
  4173. __func__, ret);
  4174. return ret;
  4175. }
  4176. }
  4177. config_data = msm_codec_fn.get_afe_config_fn(component,
  4178. AFE_CDC_REGISTER_PAGE_CONFIG);
  4179. if (config_data) {
  4180. ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
  4181. 0);
  4182. if (ret)
  4183. dev_err(component->dev,
  4184. "%s: Failed to set cdc register page config\n",
  4185. __func__);
  4186. }
  4187. config_data = msm_codec_fn.get_afe_config_fn(component,
  4188. AFE_SLIMBUS_SLAVE_CONFIG);
  4189. if (config_data) {
  4190. ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
  4191. if (ret) {
  4192. dev_err(component->dev,
  4193. "%s: Failed to set slimbus slave config %d\n",
  4194. __func__, ret);
  4195. return ret;
  4196. }
  4197. }
  4198. return 0;
  4199. }
  4200. static void msm_afe_clear_config(void)
  4201. {
  4202. afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
  4203. afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
  4204. }
  4205. static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
  4206. {
  4207. int ret = 0;
  4208. void *config_data;
  4209. struct snd_soc_component *component = NULL;
  4210. struct snd_soc_dapm_context *dapm;
  4211. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4212. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4213. struct snd_soc_component *aux_comp;
  4214. struct snd_card *card = rtd->card->snd_card;
  4215. struct snd_info_entry *entry;
  4216. struct msm_asoc_mach_data *pdata =
  4217. snd_soc_card_get_drvdata(rtd->card);
  4218. /*
  4219. * Codec SLIMBUS configuration
  4220. * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
  4221. * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
  4222. * TX14, TX15, TX16
  4223. */
  4224. unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
  4225. 150, 151};
  4226. unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
  4227. 134, 135, 136, 137, 138, 139,
  4228. 140, 141, 142, 143};
  4229. pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
  4230. rtd->pmdown_time = 0;
  4231. component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
  4232. if (!component) {
  4233. pr_err("%s: component is NULL\n", __func__);
  4234. return -EINVAL;
  4235. }
  4236. dapm = snd_soc_component_get_dapm(component);
  4237. ret = snd_soc_add_component_controls(component, msm_tavil_snd_controls,
  4238. ARRAY_SIZE(msm_tavil_snd_controls));
  4239. if (ret < 0) {
  4240. pr_err("%s: add_codec_controls failed, err %d\n",
  4241. __func__, ret);
  4242. return ret;
  4243. }
  4244. ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
  4245. ARRAY_SIZE(msm_common_snd_controls));
  4246. if (ret < 0) {
  4247. pr_err("%s: add_codec_controls failed, err %d\n",
  4248. __func__, ret);
  4249. return ret;
  4250. }
  4251. snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
  4252. ARRAY_SIZE(msm_dapm_widgets_tavil));
  4253. snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
  4254. ARRAY_SIZE(wcd_audio_paths_tavil));
  4255. snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
  4256. snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
  4257. snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
  4258. snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
  4259. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4260. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4261. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4262. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4263. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  4264. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  4265. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
  4266. snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
  4267. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
  4268. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
  4269. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
  4270. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4271. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
  4272. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
  4273. snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
  4274. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  4275. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  4276. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4277. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4278. snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
  4279. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
  4280. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
  4281. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
  4282. snd_soc_dapm_sync(dapm);
  4283. snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4284. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4285. msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
  4286. ret = msm_afe_set_config(component);
  4287. if (ret) {
  4288. pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
  4289. goto err;
  4290. }
  4291. pdata->is_afe_config_done = true;
  4292. config_data = msm_codec_fn.get_afe_config_fn(component,
  4293. AFE_AANC_VERSION);
  4294. if (config_data) {
  4295. ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
  4296. if (ret) {
  4297. pr_err("%s: Failed to set aanc version %d\n",
  4298. __func__, ret);
  4299. goto err;
  4300. }
  4301. }
  4302. /*
  4303. * Send speaker configuration only for WSA8810.
  4304. * Default configuration is for WSA8815.
  4305. */
  4306. pr_debug("%s: Number of aux devices: %d\n",
  4307. __func__, rtd->card->num_aux_devs);
  4308. if (rtd->card->num_aux_devs &&
  4309. !list_empty(&rtd->card->aux_comp_list)) {
  4310. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  4311. struct snd_soc_component, card_aux_list);
  4312. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4313. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4314. tavil_set_spkr_mode(component, WCD934X_SPKR_MODE_1);
  4315. tavil_set_spkr_gain_offset(component,
  4316. WCD934X_RX_GAIN_OFFSET_M1P5_DB);
  4317. }
  4318. }
  4319. card = rtd->card->snd_card;
  4320. entry = snd_info_create_subdir(card->module, "codecs",
  4321. card->proc_root);
  4322. if (!entry) {
  4323. pr_debug("%s: Cannot create codecs module entry\n",
  4324. __func__);
  4325. ret = 0;
  4326. goto err;
  4327. }
  4328. pdata->codec_root = entry;
  4329. tavil_codec_info_create_codec_entry(pdata->codec_root, component);
  4330. codec_reg_done = true;
  4331. return 0;
  4332. err:
  4333. return ret;
  4334. }
  4335. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  4336. {
  4337. int ret = 0;
  4338. struct snd_soc_component *component;
  4339. struct snd_soc_dapm_context *dapm;
  4340. struct snd_card *card;
  4341. struct snd_info_entry *entry;
  4342. struct snd_soc_component *aux_comp;
  4343. struct msm_asoc_mach_data *pdata =
  4344. snd_soc_card_get_drvdata(rtd->card);
  4345. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4346. component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
  4347. if (!component) {
  4348. pr_err("%s: component is NULL\n", __func__);
  4349. return -EINVAL;
  4350. }
  4351. dapm = snd_soc_component_get_dapm(component);
  4352. ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
  4353. ARRAY_SIZE(msm_int_snd_controls));
  4354. if (ret < 0) {
  4355. pr_err("%s: add_component_controls failed: %d\n",
  4356. __func__, ret);
  4357. return ret;
  4358. }
  4359. ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
  4360. ARRAY_SIZE(msm_common_snd_controls));
  4361. if (ret < 0) {
  4362. pr_err("%s: add common snd controls failed: %d\n",
  4363. __func__, ret);
  4364. return ret;
  4365. }
  4366. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  4367. ARRAY_SIZE(msm_int_dapm_widgets));
  4368. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4369. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4370. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4371. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4372. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  4373. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  4374. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  4375. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  4376. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  4377. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  4378. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  4379. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  4380. snd_soc_dapm_sync(dapm);
  4381. /*
  4382. * Send speaker configuration only for WSA8810.
  4383. * Default configuration is for WSA8815.
  4384. */
  4385. dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
  4386. __func__, rtd->card->num_aux_devs);
  4387. if (rtd->card->num_aux_devs &&
  4388. !list_empty(&rtd->card->aux_comp_list)) {
  4389. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  4390. struct snd_soc_component, card_aux_list);
  4391. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4392. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4393. wsa_macro_set_spkr_mode(component,
  4394. WSA_MACRO_SPKR_MODE_1);
  4395. wsa_macro_set_spkr_gain_offset(component,
  4396. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  4397. }
  4398. }
  4399. card = rtd->card->snd_card;
  4400. if (!pdata->codec_root) {
  4401. entry = snd_info_create_subdir(card->module, "codecs",
  4402. card->proc_root);
  4403. if (!entry) {
  4404. pr_debug("%s: Cannot create codecs module entry\n",
  4405. __func__);
  4406. ret = 0;
  4407. goto err;
  4408. }
  4409. pdata->codec_root = entry;
  4410. }
  4411. bolero_info_create_codec_entry(pdata->codec_root, codec);
  4412. /*
  4413. * SM6150 MSM 1.0 doesn't have hardware wake up interrupt line
  4414. * from AOSS to APSS. So, it uses SW workaround and listens to
  4415. * interrupt from AFE over IPC.
  4416. * Check for MSM version and MSM ID and register wake irq
  4417. * accordingly to provide compatibility to all chipsets.
  4418. */
  4419. if (socinfo_get_id() == SM6150_SOC_MSM_ID &&
  4420. socinfo_get_version() == SM6150_SOC_VERSION_1_0)
  4421. bolero_register_wake_irq(component, true);
  4422. else
  4423. bolero_register_wake_irq(component, false);
  4424. codec_reg_done = true;
  4425. return 0;
  4426. err:
  4427. return ret;
  4428. }
  4429. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  4430. {
  4431. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  4432. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  4433. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4434. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4435. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4436. }
  4437. static void *def_wcd_mbhc_cal(void)
  4438. {
  4439. void *wcd_mbhc_cal;
  4440. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  4441. u16 *btn_high;
  4442. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  4443. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  4444. if (!wcd_mbhc_cal)
  4445. return NULL;
  4446. #define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
  4447. S(v_hs_max, 1600);
  4448. #undef S
  4449. #define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
  4450. S(num_btn, WCD_MBHC_DEF_BUTTONS);
  4451. #undef S
  4452. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  4453. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  4454. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  4455. btn_high[0] = 75;
  4456. btn_high[1] = 150;
  4457. btn_high[2] = 237;
  4458. btn_high[3] = 500;
  4459. btn_high[4] = 500;
  4460. btn_high[5] = 500;
  4461. btn_high[6] = 500;
  4462. btn_high[7] = 500;
  4463. return wcd_mbhc_cal;
  4464. }
  4465. static int msm_snd_hw_params(struct snd_pcm_substream *substream,
  4466. struct snd_pcm_hw_params *params)
  4467. {
  4468. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4469. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4470. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4471. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4472. int ret = 0;
  4473. u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4474. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4475. u32 user_set_tx_ch = 0;
  4476. u32 rx_ch_count;
  4477. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4478. ret = snd_soc_dai_get_channel_map(codec_dai,
  4479. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4480. if (ret < 0) {
  4481. pr_err("%s: failed to get codec chan map, err:%d\n",
  4482. __func__, ret);
  4483. goto err;
  4484. }
  4485. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
  4486. pr_debug("%s: rx_5_ch=%d\n", __func__,
  4487. slim_rx_cfg[5].channels);
  4488. rx_ch_count = slim_rx_cfg[5].channels;
  4489. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
  4490. pr_debug("%s: rx_2_ch=%d\n", __func__,
  4491. slim_rx_cfg[2].channels);
  4492. rx_ch_count = slim_rx_cfg[2].channels;
  4493. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
  4494. pr_debug("%s: rx_6_ch=%d\n", __func__,
  4495. slim_rx_cfg[6].channels);
  4496. rx_ch_count = slim_rx_cfg[6].channels;
  4497. } else {
  4498. pr_debug("%s: rx_0_ch=%d\n", __func__,
  4499. slim_rx_cfg[0].channels);
  4500. rx_ch_count = slim_rx_cfg[0].channels;
  4501. }
  4502. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4503. rx_ch_count, rx_ch);
  4504. if (ret < 0) {
  4505. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4506. __func__, ret);
  4507. goto err;
  4508. }
  4509. } else {
  4510. pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
  4511. codec_dai->name, codec_dai->id, user_set_tx_ch);
  4512. ret = snd_soc_dai_get_channel_map(codec_dai,
  4513. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4514. if (ret < 0) {
  4515. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4516. __func__, ret);
  4517. goto err;
  4518. }
  4519. /* For <codec>_tx1 case */
  4520. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
  4521. user_set_tx_ch = slim_tx_cfg[0].channels;
  4522. /* For <codec>_tx3 case */
  4523. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
  4524. user_set_tx_ch = slim_tx_cfg[1].channels;
  4525. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
  4526. user_set_tx_ch = msm_vi_feed_tx_ch;
  4527. else
  4528. user_set_tx_ch = tx_ch_cnt;
  4529. pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
  4530. __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
  4531. tx_ch_cnt, dai_link->id);
  4532. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4533. user_set_tx_ch, tx_ch, 0, 0);
  4534. if (ret < 0)
  4535. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4536. __func__, ret);
  4537. }
  4538. err:
  4539. return ret;
  4540. }
  4541. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  4542. struct snd_pcm_hw_params *params)
  4543. {
  4544. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4545. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4546. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4547. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4548. int ret = 0;
  4549. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  4550. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4551. u32 user_set_tx_ch = 0;
  4552. u32 user_set_rx_ch = 0;
  4553. u32 ch_id;
  4554. ret = snd_soc_dai_get_channel_map(codec_dai,
  4555. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  4556. &rx_ch_cdc_dma);
  4557. if (ret < 0) {
  4558. pr_err("%s: failed to get codec chan map, err:%d\n",
  4559. __func__, ret);
  4560. goto err;
  4561. }
  4562. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4563. switch (dai_link->id) {
  4564. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4565. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4566. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4567. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4568. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4569. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  4570. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  4571. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  4572. {
  4573. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4574. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  4575. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  4576. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  4577. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4578. user_set_rx_ch, &rx_ch_cdc_dma);
  4579. if (ret < 0) {
  4580. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4581. __func__, ret);
  4582. goto err;
  4583. }
  4584. }
  4585. break;
  4586. }
  4587. } else {
  4588. switch (dai_link->id) {
  4589. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4590. {
  4591. user_set_tx_ch = msm_vi_feed_tx_ch;
  4592. }
  4593. break;
  4594. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4595. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4596. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4597. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  4598. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  4599. {
  4600. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4601. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  4602. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  4603. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  4604. }
  4605. break;
  4606. }
  4607. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  4608. &tx_ch_cdc_dma, 0, 0);
  4609. if (ret < 0) {
  4610. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4611. __func__, ret);
  4612. goto err;
  4613. }
  4614. }
  4615. err:
  4616. return ret;
  4617. }
  4618. static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
  4619. struct snd_pcm_hw_params *params)
  4620. {
  4621. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4622. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4623. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4624. unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4625. unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
  4626. unsigned int num_tx_ch = 0;
  4627. unsigned int num_rx_ch = 0;
  4628. int ret = 0;
  4629. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4630. num_rx_ch = params_channels(params);
  4631. pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
  4632. codec_dai->name, codec_dai->id, num_rx_ch);
  4633. ret = snd_soc_dai_get_channel_map(codec_dai,
  4634. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4635. if (ret < 0) {
  4636. pr_err("%s: failed to get codec chan map, err:%d\n",
  4637. __func__, ret);
  4638. goto err;
  4639. }
  4640. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4641. num_rx_ch, rx_ch);
  4642. if (ret < 0) {
  4643. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4644. __func__, ret);
  4645. goto err;
  4646. }
  4647. } else {
  4648. num_tx_ch = params_channels(params);
  4649. pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
  4650. codec_dai->name, codec_dai->id, num_tx_ch);
  4651. ret = snd_soc_dai_get_channel_map(codec_dai,
  4652. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4653. if (ret < 0) {
  4654. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4655. __func__, ret);
  4656. goto err;
  4657. }
  4658. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4659. num_tx_ch, tx_ch, 0, 0);
  4660. if (ret < 0) {
  4661. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4662. __func__, ret);
  4663. goto err;
  4664. }
  4665. }
  4666. err:
  4667. return ret;
  4668. }
  4669. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  4670. struct snd_pcm_hw_params *params)
  4671. {
  4672. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4673. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4674. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4675. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4676. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  4677. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4678. int ret;
  4679. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  4680. codec_dai->name, codec_dai->id);
  4681. ret = snd_soc_dai_get_channel_map(codec_dai,
  4682. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4683. if (ret) {
  4684. dev_err(rtd->dev,
  4685. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  4686. __func__, ret);
  4687. goto err;
  4688. }
  4689. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  4690. __func__, tx_ch_cnt, dai_link->id);
  4691. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4692. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  4693. if (ret)
  4694. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  4695. __func__, ret);
  4696. err:
  4697. return ret;
  4698. }
  4699. static int msm_get_port_id(int be_id)
  4700. {
  4701. int afe_port_id;
  4702. switch (be_id) {
  4703. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  4704. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  4705. break;
  4706. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  4707. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  4708. break;
  4709. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  4710. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  4711. break;
  4712. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  4713. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  4714. break;
  4715. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4716. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  4717. break;
  4718. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4719. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  4720. break;
  4721. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4722. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  4723. break;
  4724. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4725. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  4726. break;
  4727. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4728. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
  4729. break;
  4730. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4731. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
  4732. break;
  4733. default:
  4734. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  4735. afe_port_id = -EINVAL;
  4736. }
  4737. return afe_port_id;
  4738. }
  4739. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  4740. {
  4741. u32 bit_per_sample;
  4742. switch (bit_format) {
  4743. case SNDRV_PCM_FORMAT_S32_LE:
  4744. case SNDRV_PCM_FORMAT_S24_3LE:
  4745. case SNDRV_PCM_FORMAT_S24_LE:
  4746. bit_per_sample = 32;
  4747. break;
  4748. case SNDRV_PCM_FORMAT_S16_LE:
  4749. default:
  4750. bit_per_sample = 16;
  4751. break;
  4752. }
  4753. return bit_per_sample;
  4754. }
  4755. static void update_mi2s_clk_val(int dai_id, int stream)
  4756. {
  4757. u32 bit_per_sample;
  4758. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4759. bit_per_sample =
  4760. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  4761. mi2s_clk[dai_id].clk_freq_in_hz =
  4762. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4763. } else {
  4764. bit_per_sample =
  4765. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  4766. mi2s_clk[dai_id].clk_freq_in_hz =
  4767. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4768. }
  4769. }
  4770. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  4771. {
  4772. int ret = 0;
  4773. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4774. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4775. int port_id = 0;
  4776. int index = cpu_dai->id;
  4777. port_id = msm_get_port_id(rtd->dai_link->id);
  4778. if (port_id < 0) {
  4779. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  4780. ret = port_id;
  4781. goto err;
  4782. }
  4783. if (enable) {
  4784. update_mi2s_clk_val(index, substream->stream);
  4785. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  4786. mi2s_clk[index].clk_freq_in_hz);
  4787. }
  4788. mi2s_clk[index].enable = enable;
  4789. ret = afe_set_lpass_clock_v2(port_id,
  4790. &mi2s_clk[index]);
  4791. if (ret < 0) {
  4792. dev_err(rtd->card->dev,
  4793. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  4794. __func__, port_id, ret);
  4795. goto err;
  4796. }
  4797. err:
  4798. return ret;
  4799. }
  4800. static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  4801. struct snd_pcm_hw_params *params)
  4802. {
  4803. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4804. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4805. int ret = 0;
  4806. int slot_width = 32;
  4807. int channels, slots;
  4808. unsigned int slot_mask, rate, clk_freq;
  4809. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  4810. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  4811. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4812. switch (cpu_dai->id) {
  4813. case AFE_PORT_ID_PRIMARY_TDM_RX:
  4814. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  4815. break;
  4816. case AFE_PORT_ID_SECONDARY_TDM_RX:
  4817. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4818. break;
  4819. case AFE_PORT_ID_TERTIARY_TDM_RX:
  4820. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  4821. break;
  4822. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  4823. slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4824. break;
  4825. case AFE_PORT_ID_QUINARY_TDM_RX:
  4826. slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4827. break;
  4828. case AFE_PORT_ID_PRIMARY_TDM_TX:
  4829. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  4830. break;
  4831. case AFE_PORT_ID_SECONDARY_TDM_TX:
  4832. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  4833. break;
  4834. case AFE_PORT_ID_TERTIARY_TDM_TX:
  4835. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  4836. break;
  4837. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  4838. slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  4839. break;
  4840. case AFE_PORT_ID_QUINARY_TDM_TX:
  4841. slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  4842. break;
  4843. default:
  4844. pr_err("%s: dai id 0x%x not supported\n",
  4845. __func__, cpu_dai->id);
  4846. return -EINVAL;
  4847. }
  4848. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4849. /*2 slot config - bits 0 and 1 set for the first two slots */
  4850. slot_mask = 0x0000FFFF >> (16-slots);
  4851. channels = slots;
  4852. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  4853. __func__, slot_width, slots);
  4854. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  4855. slots, slot_width);
  4856. if (ret < 0) {
  4857. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  4858. __func__, ret);
  4859. goto end;
  4860. }
  4861. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4862. 0, NULL, channels, slot_offset);
  4863. if (ret < 0) {
  4864. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  4865. __func__, ret);
  4866. goto end;
  4867. }
  4868. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  4869. /*2 slot config - bits 0 and 1 set for the first two slots */
  4870. slot_mask = 0x0000FFFF >> (16-slots);
  4871. channels = slots;
  4872. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  4873. __func__, slot_width, slots);
  4874. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  4875. slots, slot_width);
  4876. if (ret < 0) {
  4877. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  4878. __func__, ret);
  4879. goto end;
  4880. }
  4881. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4882. channels, slot_offset, 0, NULL);
  4883. if (ret < 0) {
  4884. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  4885. __func__, ret);
  4886. goto end;
  4887. }
  4888. } else {
  4889. ret = -EINVAL;
  4890. pr_err("%s: invalid use case, err:%d\n",
  4891. __func__, ret);
  4892. goto end;
  4893. }
  4894. rate = params_rate(params);
  4895. clk_freq = rate * slot_width * slots;
  4896. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  4897. if (ret < 0)
  4898. pr_err("%s: failed to set tdm clk, err:%d\n",
  4899. __func__, ret);
  4900. end:
  4901. return ret;
  4902. }
  4903. static int msm_get_tdm_mode(u32 port_id)
  4904. {
  4905. int tdm_mode;
  4906. switch (port_id) {
  4907. case AFE_PORT_ID_PRIMARY_TDM_RX:
  4908. case AFE_PORT_ID_PRIMARY_TDM_TX:
  4909. tdm_mode = TDM_PRI;
  4910. break;
  4911. case AFE_PORT_ID_SECONDARY_TDM_RX:
  4912. case AFE_PORT_ID_SECONDARY_TDM_TX:
  4913. tdm_mode = TDM_SEC;
  4914. break;
  4915. case AFE_PORT_ID_TERTIARY_TDM_RX:
  4916. case AFE_PORT_ID_TERTIARY_TDM_TX:
  4917. tdm_mode = TDM_TERT;
  4918. break;
  4919. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  4920. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  4921. tdm_mode = TDM_QUAT;
  4922. break;
  4923. case AFE_PORT_ID_QUINARY_TDM_RX:
  4924. case AFE_PORT_ID_QUINARY_TDM_TX:
  4925. tdm_mode = TDM_QUIN;
  4926. break;
  4927. default:
  4928. pr_err("%s: Invalid port id: %d\n", __func__, port_id);
  4929. tdm_mode = -EINVAL;
  4930. }
  4931. return tdm_mode;
  4932. }
  4933. static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
  4934. {
  4935. int ret = 0;
  4936. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4937. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4938. struct snd_soc_card *card = rtd->card;
  4939. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4940. int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
  4941. if (tdm_mode < 0) {
  4942. dev_err(rtd->card->dev, "%s: Invalid tdm_mode\n", __func__);
  4943. return tdm_mode;
  4944. }
  4945. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4946. if (pdata->mi2s_gpio_p[tdm_mode])
  4947. ret = msm_cdc_pinctrl_select_active_state(
  4948. pdata->mi2s_gpio_p[tdm_mode]);
  4949. return ret;
  4950. }
  4951. static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
  4952. {
  4953. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4954. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4955. struct snd_soc_card *card = rtd->card;
  4956. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4957. int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
  4958. if (tdm_mode < 0) {
  4959. dev_err(rtd->card->dev, "%s: Invalid tdm_mode\n", __func__);
  4960. return;
  4961. }
  4962. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4963. if (pdata->mi2s_gpio_p[tdm_mode])
  4964. msm_cdc_pinctrl_select_sleep_state(
  4965. pdata->mi2s_gpio_p[tdm_mode]);
  4966. }
  4967. static struct snd_soc_ops sm6150_tdm_be_ops = {
  4968. .hw_params = sm6150_tdm_snd_hw_params,
  4969. .startup = sm6150_tdm_snd_startup,
  4970. .shutdown = sm6150_tdm_snd_shutdown
  4971. };
  4972. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  4973. {
  4974. cpumask_t mask;
  4975. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  4976. pm_qos_remove_request(&substream->latency_pm_qos_req);
  4977. cpumask_clear(&mask);
  4978. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  4979. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  4980. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  4981. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  4982. pm_qos_add_request(&substream->latency_pm_qos_req,
  4983. PM_QOS_CPU_DMA_LATENCY,
  4984. MSM_LL_QOS_VALUE);
  4985. return 0;
  4986. }
  4987. static struct snd_soc_ops msm_fe_qos_ops = {
  4988. .prepare = msm_fe_qos_prepare,
  4989. };
  4990. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  4991. {
  4992. int ret = 0;
  4993. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4994. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4995. int index = cpu_dai->id;
  4996. int port_id = msm_get_port_id(rtd->dai_link->id);
  4997. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  4998. struct snd_soc_card *card = rtd->card;
  4999. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5000. dev_dbg(rtd->card->dev,
  5001. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  5002. __func__, substream->name, substream->stream,
  5003. cpu_dai->name, cpu_dai->id);
  5004. if (port_id < 0) {
  5005. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  5006. ret = port_id;
  5007. goto err;
  5008. }
  5009. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5010. ret = -EINVAL;
  5011. dev_err(rtd->card->dev,
  5012. "%s: CPU DAI id (%d) out of range\n",
  5013. __func__, cpu_dai->id);
  5014. goto err;
  5015. }
  5016. /*
  5017. * Mutex protection in case the same MI2S
  5018. * interface using for both TX and RX so
  5019. * that the same clock won't be enable twice.
  5020. */
  5021. mutex_lock(&mi2s_intf_conf[index].lock);
  5022. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  5023. /* Check if msm needs to provide the clock to the interface */
  5024. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  5025. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  5026. fmt = SND_SOC_DAIFMT_CBM_CFM;
  5027. }
  5028. ret = msm_mi2s_set_sclk(substream, true);
  5029. if (ret < 0) {
  5030. dev_err(rtd->card->dev,
  5031. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  5032. __func__, ret);
  5033. goto clean_up;
  5034. }
  5035. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  5036. if (ret < 0) {
  5037. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  5038. __func__, index, ret);
  5039. goto clk_off;
  5040. }
  5041. if (mi2s_intf_conf[index].msm_is_ext_mclk) {
  5042. pr_debug("%s: Enabling mclk, clk_freq_in_hz = %u\n",
  5043. __func__, mi2s_mclk[index].clk_freq_in_hz);
  5044. ret = afe_set_lpass_clock_v2(port_id,
  5045. &mi2s_mclk[index]);
  5046. if (ret < 0) {
  5047. pr_err("%s: afe lpass mclk failed, err:%d\n",
  5048. __func__, ret);
  5049. goto clk_off;
  5050. }
  5051. mi2s_mclk[index].enable = 1;
  5052. }
  5053. if (pdata->mi2s_gpio_p[index])
  5054. msm_cdc_pinctrl_select_active_state(
  5055. pdata->mi2s_gpio_p[index]);
  5056. }
  5057. clk_off:
  5058. if (ret < 0)
  5059. msm_mi2s_set_sclk(substream, false);
  5060. clean_up:
  5061. if (ret < 0)
  5062. mi2s_intf_conf[index].ref_cnt--;
  5063. mutex_unlock(&mi2s_intf_conf[index].lock);
  5064. err:
  5065. return ret;
  5066. }
  5067. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  5068. {
  5069. int ret;
  5070. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5071. int index = rtd->cpu_dai->id;
  5072. int port_id = msm_get_port_id(rtd->dai_link->id);
  5073. struct snd_soc_card *card = rtd->card;
  5074. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5075. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  5076. substream->name, substream->stream);
  5077. if (port_id < 0) {
  5078. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  5079. return;
  5080. }
  5081. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5082. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  5083. return;
  5084. }
  5085. mutex_lock(&mi2s_intf_conf[index].lock);
  5086. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  5087. if (pdata->mi2s_gpio_p[index])
  5088. msm_cdc_pinctrl_select_sleep_state(
  5089. pdata->mi2s_gpio_p[index]);
  5090. ret = msm_mi2s_set_sclk(substream, false);
  5091. if (ret < 0)
  5092. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  5093. __func__, index, ret);
  5094. if (mi2s_intf_conf[index].msm_is_ext_mclk) {
  5095. pr_debug("%s: Disabling mclk, clk_freq_in_hz = %u\n",
  5096. __func__, mi2s_mclk[index].clk_freq_in_hz);
  5097. ret = afe_set_lpass_clock_v2(port_id,
  5098. &mi2s_mclk[index]);
  5099. if (ret < 0)
  5100. pr_err("%s: mclk disable failed for MCLK (%d); ret=%d\n",
  5101. __func__, index, ret);
  5102. mi2s_mclk[index].enable = 0;
  5103. }
  5104. }
  5105. mutex_unlock(&mi2s_intf_conf[index].lock);
  5106. }
  5107. static struct snd_soc_ops msm_mi2s_be_ops = {
  5108. .startup = msm_mi2s_snd_startup,
  5109. .shutdown = msm_mi2s_snd_shutdown,
  5110. };
  5111. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  5112. .hw_params = msm_snd_cdc_dma_hw_params,
  5113. };
  5114. static struct snd_soc_ops msm_be_ops = {
  5115. .hw_params = msm_snd_hw_params,
  5116. };
  5117. static struct snd_soc_ops msm_slimbus_2_be_ops = {
  5118. .hw_params = msm_slimbus_2_hw_params,
  5119. };
  5120. static struct snd_soc_ops msm_wcn_ops = {
  5121. .hw_params = msm_wcn_hw_params,
  5122. };
  5123. /* Digital audio interface glue - connects codec <---> CPU */
  5124. static struct snd_soc_dai_link msm_common_dai_links[] = {
  5125. /* FrontEnd DAI Links */
  5126. {/* hw:x,0 */
  5127. .name = MSM_DAILINK_NAME(Media1),
  5128. .stream_name = "MultiMedia1",
  5129. .cpu_dai_name = "MultiMedia1",
  5130. .platform_name = "msm-pcm-dsp.0",
  5131. .dynamic = 1,
  5132. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5133. .dpcm_playback = 1,
  5134. .dpcm_capture = 1,
  5135. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5136. SND_SOC_DPCM_TRIGGER_POST},
  5137. .codec_dai_name = "snd-soc-dummy-dai",
  5138. .codec_name = "snd-soc-dummy",
  5139. .ignore_suspend = 1,
  5140. /* this dainlink has playback support */
  5141. .ignore_pmdown_time = 1,
  5142. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5143. },
  5144. {/* hw:x,1 */
  5145. .name = MSM_DAILINK_NAME(Media2),
  5146. .stream_name = "MultiMedia2",
  5147. .cpu_dai_name = "MultiMedia2",
  5148. .platform_name = "msm-pcm-dsp.0",
  5149. .dynamic = 1,
  5150. .dpcm_playback = 1,
  5151. .dpcm_capture = 1,
  5152. .codec_dai_name = "snd-soc-dummy-dai",
  5153. .codec_name = "snd-soc-dummy",
  5154. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5155. SND_SOC_DPCM_TRIGGER_POST},
  5156. .ignore_suspend = 1,
  5157. /* this dainlink has playback support */
  5158. .ignore_pmdown_time = 1,
  5159. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  5160. },
  5161. {/* hw:x,2 */
  5162. .name = "VoiceMMode1",
  5163. .stream_name = "VoiceMMode1",
  5164. .cpu_dai_name = "VoiceMMode1",
  5165. .platform_name = "msm-pcm-voice",
  5166. .dynamic = 1,
  5167. .dpcm_playback = 1,
  5168. .dpcm_capture = 1,
  5169. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5170. SND_SOC_DPCM_TRIGGER_POST},
  5171. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5172. .ignore_suspend = 1,
  5173. .ignore_pmdown_time = 1,
  5174. .codec_dai_name = "snd-soc-dummy-dai",
  5175. .codec_name = "snd-soc-dummy",
  5176. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  5177. },
  5178. {/* hw:x,3 */
  5179. .name = "MSM VoIP",
  5180. .stream_name = "VoIP",
  5181. .cpu_dai_name = "VoIP",
  5182. .platform_name = "msm-voip-dsp",
  5183. .dynamic = 1,
  5184. .dpcm_playback = 1,
  5185. .dpcm_capture = 1,
  5186. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5187. SND_SOC_DPCM_TRIGGER_POST},
  5188. .codec_dai_name = "snd-soc-dummy-dai",
  5189. .codec_name = "snd-soc-dummy",
  5190. .ignore_suspend = 1,
  5191. /* this dainlink has playback support */
  5192. .ignore_pmdown_time = 1,
  5193. .id = MSM_FRONTEND_DAI_VOIP,
  5194. },
  5195. {/* hw:x,4 */
  5196. .name = MSM_DAILINK_NAME(ULL),
  5197. .stream_name = "MultiMedia3",
  5198. .cpu_dai_name = "MultiMedia3",
  5199. .platform_name = "msm-pcm-dsp.2",
  5200. .dynamic = 1,
  5201. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5202. .dpcm_playback = 1,
  5203. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5204. SND_SOC_DPCM_TRIGGER_POST},
  5205. .codec_dai_name = "snd-soc-dummy-dai",
  5206. .codec_name = "snd-soc-dummy",
  5207. .ignore_suspend = 1,
  5208. /* this dainlink has playback support */
  5209. .ignore_pmdown_time = 1,
  5210. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  5211. },
  5212. /* Hostless PCM purpose */
  5213. {/* hw:x,5 */
  5214. .name = "SLIMBUS_0 Hostless",
  5215. .stream_name = "SLIMBUS_0 Hostless",
  5216. .cpu_dai_name = "SLIMBUS0_HOSTLESS",
  5217. .platform_name = "msm-pcm-hostless",
  5218. .dynamic = 1,
  5219. .dpcm_playback = 1,
  5220. .dpcm_capture = 1,
  5221. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5222. SND_SOC_DPCM_TRIGGER_POST},
  5223. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5224. .ignore_suspend = 1,
  5225. /* this dailink has playback support */
  5226. .ignore_pmdown_time = 1,
  5227. .codec_dai_name = "snd-soc-dummy-dai",
  5228. .codec_name = "snd-soc-dummy",
  5229. },
  5230. {/* hw:x,6 */
  5231. .name = "MSM AFE-PCM RX",
  5232. .stream_name = "AFE-PROXY RX",
  5233. .cpu_dai_name = "msm-dai-q6-dev.241",
  5234. .codec_name = "msm-stub-codec.1",
  5235. .codec_dai_name = "msm-stub-rx",
  5236. .platform_name = "msm-pcm-afe",
  5237. .dpcm_playback = 1,
  5238. .ignore_suspend = 1,
  5239. /* this dainlink has playback support */
  5240. .ignore_pmdown_time = 1,
  5241. },
  5242. {/* hw:x,7 */
  5243. .name = "MSM AFE-PCM TX",
  5244. .stream_name = "AFE-PROXY TX",
  5245. .cpu_dai_name = "msm-dai-q6-dev.240",
  5246. .codec_name = "msm-stub-codec.1",
  5247. .codec_dai_name = "msm-stub-tx",
  5248. .platform_name = "msm-pcm-afe",
  5249. .dpcm_capture = 1,
  5250. .ignore_suspend = 1,
  5251. },
  5252. {/* hw:x,8 */
  5253. .name = MSM_DAILINK_NAME(Compress1),
  5254. .stream_name = "Compress1",
  5255. .cpu_dai_name = "MultiMedia4",
  5256. .platform_name = "msm-compress-dsp",
  5257. .dynamic = 1,
  5258. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  5259. .dpcm_playback = 1,
  5260. .dpcm_capture = 1,
  5261. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5262. SND_SOC_DPCM_TRIGGER_POST},
  5263. .codec_dai_name = "snd-soc-dummy-dai",
  5264. .codec_name = "snd-soc-dummy",
  5265. .ignore_suspend = 1,
  5266. .ignore_pmdown_time = 1,
  5267. /* this dainlink has playback support */
  5268. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  5269. },
  5270. {/* hw:x,9 */
  5271. .name = "AUXPCM Hostless",
  5272. .stream_name = "AUXPCM Hostless",
  5273. .cpu_dai_name = "AUXPCM_HOSTLESS",
  5274. .platform_name = "msm-pcm-hostless",
  5275. .dynamic = 1,
  5276. .dpcm_playback = 1,
  5277. .dpcm_capture = 1,
  5278. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5279. SND_SOC_DPCM_TRIGGER_POST},
  5280. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5281. .ignore_suspend = 1,
  5282. /* this dainlink has playback support */
  5283. .ignore_pmdown_time = 1,
  5284. .codec_dai_name = "snd-soc-dummy-dai",
  5285. .codec_name = "snd-soc-dummy",
  5286. },
  5287. {/* hw:x,10 */
  5288. .name = "SLIMBUS_1 Hostless",
  5289. .stream_name = "SLIMBUS_1 Hostless",
  5290. .cpu_dai_name = "SLIMBUS1_HOSTLESS",
  5291. .platform_name = "msm-pcm-hostless",
  5292. .dynamic = 1,
  5293. .dpcm_playback = 1,
  5294. .dpcm_capture = 1,
  5295. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5296. SND_SOC_DPCM_TRIGGER_POST},
  5297. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5298. .ignore_suspend = 1,
  5299. /* this dailink has playback support */
  5300. .ignore_pmdown_time = 1,
  5301. .codec_dai_name = "snd-soc-dummy-dai",
  5302. .codec_name = "snd-soc-dummy",
  5303. },
  5304. {/* hw:x,11 */
  5305. .name = "SLIMBUS_3 Hostless",
  5306. .stream_name = "SLIMBUS_3 Hostless",
  5307. .cpu_dai_name = "SLIMBUS3_HOSTLESS",
  5308. .platform_name = "msm-pcm-hostless",
  5309. .dynamic = 1,
  5310. .dpcm_playback = 1,
  5311. .dpcm_capture = 1,
  5312. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5313. SND_SOC_DPCM_TRIGGER_POST},
  5314. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5315. .ignore_suspend = 1,
  5316. /* this dailink has playback support */
  5317. .ignore_pmdown_time = 1,
  5318. .codec_dai_name = "snd-soc-dummy-dai",
  5319. .codec_name = "snd-soc-dummy",
  5320. },
  5321. {/* hw:x,12 */
  5322. .name = "SLIMBUS_7 Hostless",
  5323. .stream_name = "SLIMBUS_7 Hostless",
  5324. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  5325. .platform_name = "msm-pcm-hostless",
  5326. .dynamic = 1,
  5327. .dpcm_playback = 1,
  5328. .dpcm_capture = 1,
  5329. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5330. SND_SOC_DPCM_TRIGGER_POST},
  5331. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5332. .ignore_suspend = 1,
  5333. /* this dailink has playback support */
  5334. .ignore_pmdown_time = 1,
  5335. .codec_dai_name = "snd-soc-dummy-dai",
  5336. .codec_name = "snd-soc-dummy",
  5337. },
  5338. {/* hw:x,13 */
  5339. .name = MSM_DAILINK_NAME(LowLatency),
  5340. .stream_name = "MultiMedia5",
  5341. .cpu_dai_name = "MultiMedia5",
  5342. .platform_name = "msm-pcm-dsp.1",
  5343. .dynamic = 1,
  5344. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5345. .dpcm_playback = 1,
  5346. .dpcm_capture = 1,
  5347. .codec_dai_name = "snd-soc-dummy-dai",
  5348. .codec_name = "snd-soc-dummy",
  5349. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5350. SND_SOC_DPCM_TRIGGER_POST},
  5351. .ignore_suspend = 1,
  5352. /* this dainlink has playback support */
  5353. .ignore_pmdown_time = 1,
  5354. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  5355. .ops = &msm_fe_qos_ops,
  5356. },
  5357. {/* hw:x,14 */
  5358. .name = "Listen 1 Audio Service",
  5359. .stream_name = "Listen 1 Audio Service",
  5360. .cpu_dai_name = "LSM1",
  5361. .platform_name = "msm-lsm-client",
  5362. .dynamic = 1,
  5363. .dpcm_capture = 1,
  5364. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5365. SND_SOC_DPCM_TRIGGER_POST },
  5366. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5367. .ignore_suspend = 1,
  5368. .codec_dai_name = "snd-soc-dummy-dai",
  5369. .codec_name = "snd-soc-dummy",
  5370. .id = MSM_FRONTEND_DAI_LSM1,
  5371. },
  5372. /* Multiple Tunnel instances */
  5373. {/* hw:x,15 */
  5374. .name = MSM_DAILINK_NAME(Compress2),
  5375. .stream_name = "Compress2",
  5376. .cpu_dai_name = "MultiMedia7",
  5377. .platform_name = "msm-compress-dsp",
  5378. .dynamic = 1,
  5379. .dpcm_playback = 1,
  5380. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5381. SND_SOC_DPCM_TRIGGER_POST},
  5382. .codec_dai_name = "snd-soc-dummy-dai",
  5383. .codec_name = "snd-soc-dummy",
  5384. .ignore_suspend = 1,
  5385. .ignore_pmdown_time = 1,
  5386. /* this dainlink has playback support */
  5387. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  5388. },
  5389. {/* hw:x,16 */
  5390. .name = MSM_DAILINK_NAME(MultiMedia10),
  5391. .stream_name = "MultiMedia10",
  5392. .cpu_dai_name = "MultiMedia10",
  5393. .platform_name = "msm-pcm-dsp.1",
  5394. .dynamic = 1,
  5395. .dpcm_playback = 1,
  5396. .dpcm_capture = 1,
  5397. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5398. SND_SOC_DPCM_TRIGGER_POST},
  5399. .codec_dai_name = "snd-soc-dummy-dai",
  5400. .codec_name = "snd-soc-dummy",
  5401. .ignore_suspend = 1,
  5402. .ignore_pmdown_time = 1,
  5403. /* this dainlink has playback support */
  5404. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  5405. },
  5406. {/* hw:x,17 */
  5407. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  5408. .stream_name = "MM_NOIRQ",
  5409. .cpu_dai_name = "MultiMedia8",
  5410. .platform_name = "msm-pcm-dsp-noirq",
  5411. .dynamic = 1,
  5412. .dpcm_playback = 1,
  5413. .dpcm_capture = 1,
  5414. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5415. SND_SOC_DPCM_TRIGGER_POST},
  5416. .codec_dai_name = "snd-soc-dummy-dai",
  5417. .codec_name = "snd-soc-dummy",
  5418. .ignore_suspend = 1,
  5419. .ignore_pmdown_time = 1,
  5420. /* this dainlink has playback support */
  5421. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  5422. .ops = &msm_fe_qos_ops,
  5423. },
  5424. /* HDMI Hostless */
  5425. {/* hw:x,18 */
  5426. .name = "HDMI_RX_HOSTLESS",
  5427. .stream_name = "HDMI_RX_HOSTLESS",
  5428. .cpu_dai_name = "HDMI_HOSTLESS",
  5429. .platform_name = "msm-pcm-hostless",
  5430. .dynamic = 1,
  5431. .dpcm_playback = 1,
  5432. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5433. SND_SOC_DPCM_TRIGGER_POST},
  5434. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5435. .ignore_suspend = 1,
  5436. .ignore_pmdown_time = 1,
  5437. .codec_dai_name = "snd-soc-dummy-dai",
  5438. .codec_name = "snd-soc-dummy",
  5439. },
  5440. {/* hw:x,19 */
  5441. .name = "VoiceMMode2",
  5442. .stream_name = "VoiceMMode2",
  5443. .cpu_dai_name = "VoiceMMode2",
  5444. .platform_name = "msm-pcm-voice",
  5445. .dynamic = 1,
  5446. .dpcm_playback = 1,
  5447. .dpcm_capture = 1,
  5448. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5449. SND_SOC_DPCM_TRIGGER_POST},
  5450. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5451. .ignore_suspend = 1,
  5452. .ignore_pmdown_time = 1,
  5453. .codec_dai_name = "snd-soc-dummy-dai",
  5454. .codec_name = "snd-soc-dummy",
  5455. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  5456. },
  5457. /* LSM FE */
  5458. {/* hw:x,20 */
  5459. .name = "Listen 2 Audio Service",
  5460. .stream_name = "Listen 2 Audio Service",
  5461. .cpu_dai_name = "LSM2",
  5462. .platform_name = "msm-lsm-client",
  5463. .dynamic = 1,
  5464. .dpcm_capture = 1,
  5465. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5466. SND_SOC_DPCM_TRIGGER_POST },
  5467. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5468. .ignore_suspend = 1,
  5469. .codec_dai_name = "snd-soc-dummy-dai",
  5470. .codec_name = "snd-soc-dummy",
  5471. .id = MSM_FRONTEND_DAI_LSM2,
  5472. },
  5473. {/* hw:x,21 */
  5474. .name = "Listen 3 Audio Service",
  5475. .stream_name = "Listen 3 Audio Service",
  5476. .cpu_dai_name = "LSM3",
  5477. .platform_name = "msm-lsm-client",
  5478. .dynamic = 1,
  5479. .dpcm_capture = 1,
  5480. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5481. SND_SOC_DPCM_TRIGGER_POST },
  5482. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5483. .ignore_suspend = 1,
  5484. .codec_dai_name = "snd-soc-dummy-dai",
  5485. .codec_name = "snd-soc-dummy",
  5486. .id = MSM_FRONTEND_DAI_LSM3,
  5487. },
  5488. {/* hw:x,22 */
  5489. .name = "Listen 4 Audio Service",
  5490. .stream_name = "Listen 4 Audio Service",
  5491. .cpu_dai_name = "LSM4",
  5492. .platform_name = "msm-lsm-client",
  5493. .dynamic = 1,
  5494. .dpcm_capture = 1,
  5495. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5496. SND_SOC_DPCM_TRIGGER_POST },
  5497. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5498. .ignore_suspend = 1,
  5499. .codec_dai_name = "snd-soc-dummy-dai",
  5500. .codec_name = "snd-soc-dummy",
  5501. .id = MSM_FRONTEND_DAI_LSM4,
  5502. },
  5503. {/* hw:x,23 */
  5504. .name = "Listen 5 Audio Service",
  5505. .stream_name = "Listen 5 Audio Service",
  5506. .cpu_dai_name = "LSM5",
  5507. .platform_name = "msm-lsm-client",
  5508. .dynamic = 1,
  5509. .dpcm_capture = 1,
  5510. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5511. SND_SOC_DPCM_TRIGGER_POST },
  5512. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5513. .ignore_suspend = 1,
  5514. .codec_dai_name = "snd-soc-dummy-dai",
  5515. .codec_name = "snd-soc-dummy",
  5516. .id = MSM_FRONTEND_DAI_LSM5,
  5517. },
  5518. {/* hw:x,24 */
  5519. .name = "Listen 6 Audio Service",
  5520. .stream_name = "Listen 6 Audio Service",
  5521. .cpu_dai_name = "LSM6",
  5522. .platform_name = "msm-lsm-client",
  5523. .dynamic = 1,
  5524. .dpcm_capture = 1,
  5525. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5526. SND_SOC_DPCM_TRIGGER_POST },
  5527. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5528. .ignore_suspend = 1,
  5529. .codec_dai_name = "snd-soc-dummy-dai",
  5530. .codec_name = "snd-soc-dummy",
  5531. .id = MSM_FRONTEND_DAI_LSM6,
  5532. },
  5533. {/* hw:x,25 */
  5534. .name = "Listen 7 Audio Service",
  5535. .stream_name = "Listen 7 Audio Service",
  5536. .cpu_dai_name = "LSM7",
  5537. .platform_name = "msm-lsm-client",
  5538. .dynamic = 1,
  5539. .dpcm_capture = 1,
  5540. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5541. SND_SOC_DPCM_TRIGGER_POST },
  5542. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5543. .ignore_suspend = 1,
  5544. .codec_dai_name = "snd-soc-dummy-dai",
  5545. .codec_name = "snd-soc-dummy",
  5546. .id = MSM_FRONTEND_DAI_LSM7,
  5547. },
  5548. {/* hw:x,26 */
  5549. .name = "Listen 8 Audio Service",
  5550. .stream_name = "Listen 8 Audio Service",
  5551. .cpu_dai_name = "LSM8",
  5552. .platform_name = "msm-lsm-client",
  5553. .dynamic = 1,
  5554. .dpcm_capture = 1,
  5555. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5556. SND_SOC_DPCM_TRIGGER_POST },
  5557. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5558. .ignore_suspend = 1,
  5559. .codec_dai_name = "snd-soc-dummy-dai",
  5560. .codec_name = "snd-soc-dummy",
  5561. .id = MSM_FRONTEND_DAI_LSM8,
  5562. },
  5563. {/* hw:x,27 */
  5564. .name = MSM_DAILINK_NAME(Media9),
  5565. .stream_name = "MultiMedia9",
  5566. .cpu_dai_name = "MultiMedia9",
  5567. .platform_name = "msm-pcm-dsp.0",
  5568. .dynamic = 1,
  5569. .dpcm_playback = 1,
  5570. .dpcm_capture = 1,
  5571. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5572. SND_SOC_DPCM_TRIGGER_POST},
  5573. .codec_dai_name = "snd-soc-dummy-dai",
  5574. .codec_name = "snd-soc-dummy",
  5575. .ignore_suspend = 1,
  5576. /* this dainlink has playback support */
  5577. .ignore_pmdown_time = 1,
  5578. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  5579. },
  5580. {/* hw:x,28 */
  5581. .name = MSM_DAILINK_NAME(Compress4),
  5582. .stream_name = "Compress4",
  5583. .cpu_dai_name = "MultiMedia11",
  5584. .platform_name = "msm-compress-dsp",
  5585. .dynamic = 1,
  5586. .dpcm_playback = 1,
  5587. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5588. SND_SOC_DPCM_TRIGGER_POST},
  5589. .codec_dai_name = "snd-soc-dummy-dai",
  5590. .codec_name = "snd-soc-dummy",
  5591. .ignore_suspend = 1,
  5592. .ignore_pmdown_time = 1,
  5593. /* this dainlink has playback support */
  5594. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  5595. },
  5596. {/* hw:x,29 */
  5597. .name = MSM_DAILINK_NAME(Compress5),
  5598. .stream_name = "Compress5",
  5599. .cpu_dai_name = "MultiMedia12",
  5600. .platform_name = "msm-compress-dsp",
  5601. .dynamic = 1,
  5602. .dpcm_playback = 1,
  5603. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5604. SND_SOC_DPCM_TRIGGER_POST},
  5605. .codec_dai_name = "snd-soc-dummy-dai",
  5606. .codec_name = "snd-soc-dummy",
  5607. .ignore_suspend = 1,
  5608. .ignore_pmdown_time = 1,
  5609. /* this dainlink has playback support */
  5610. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  5611. },
  5612. {/* hw:x,30 */
  5613. .name = MSM_DAILINK_NAME(Compress6),
  5614. .stream_name = "Compress6",
  5615. .cpu_dai_name = "MultiMedia13",
  5616. .platform_name = "msm-compress-dsp",
  5617. .dynamic = 1,
  5618. .dpcm_playback = 1,
  5619. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5620. SND_SOC_DPCM_TRIGGER_POST},
  5621. .codec_dai_name = "snd-soc-dummy-dai",
  5622. .codec_name = "snd-soc-dummy",
  5623. .ignore_suspend = 1,
  5624. .ignore_pmdown_time = 1,
  5625. /* this dainlink has playback support */
  5626. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  5627. },
  5628. {/* hw:x,31 */
  5629. .name = MSM_DAILINK_NAME(Compress7),
  5630. .stream_name = "Compress7",
  5631. .cpu_dai_name = "MultiMedia14",
  5632. .platform_name = "msm-compress-dsp",
  5633. .dynamic = 1,
  5634. .dpcm_playback = 1,
  5635. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5636. SND_SOC_DPCM_TRIGGER_POST},
  5637. .codec_dai_name = "snd-soc-dummy-dai",
  5638. .codec_name = "snd-soc-dummy",
  5639. .ignore_suspend = 1,
  5640. .ignore_pmdown_time = 1,
  5641. /* this dainlink has playback support */
  5642. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  5643. },
  5644. {/* hw:x,32 */
  5645. .name = MSM_DAILINK_NAME(Compress8),
  5646. .stream_name = "Compress8",
  5647. .cpu_dai_name = "MultiMedia15",
  5648. .platform_name = "msm-compress-dsp",
  5649. .dynamic = 1,
  5650. .dpcm_playback = 1,
  5651. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5652. SND_SOC_DPCM_TRIGGER_POST},
  5653. .codec_dai_name = "snd-soc-dummy-dai",
  5654. .codec_name = "snd-soc-dummy",
  5655. .ignore_suspend = 1,
  5656. .ignore_pmdown_time = 1,
  5657. /* this dainlink has playback support */
  5658. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  5659. },
  5660. {/* hw:x,33 */
  5661. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  5662. .stream_name = "MM_NOIRQ_2",
  5663. .cpu_dai_name = "MultiMedia16",
  5664. .platform_name = "msm-pcm-dsp-noirq",
  5665. .dynamic = 1,
  5666. .dpcm_playback = 1,
  5667. .dpcm_capture = 1,
  5668. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5669. SND_SOC_DPCM_TRIGGER_POST},
  5670. .codec_dai_name = "snd-soc-dummy-dai",
  5671. .codec_name = "snd-soc-dummy",
  5672. .ignore_suspend = 1,
  5673. .ignore_pmdown_time = 1,
  5674. /* this dainlink has playback support */
  5675. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  5676. },
  5677. {/* hw:x,34 */
  5678. .name = "SLIMBUS_8 Hostless",
  5679. .stream_name = "SLIMBUS8_HOSTLESS Capture",
  5680. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  5681. .platform_name = "msm-pcm-hostless",
  5682. .dynamic = 1,
  5683. .dpcm_capture = 1,
  5684. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5685. SND_SOC_DPCM_TRIGGER_POST},
  5686. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5687. .ignore_suspend = 1,
  5688. .codec_dai_name = "snd-soc-dummy-dai",
  5689. .codec_name = "snd-soc-dummy",
  5690. },
  5691. {/* hw:x,35 */
  5692. .name = "CDC_DMA Hostless",
  5693. .stream_name = "CDC_DMA Hostless",
  5694. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  5695. .platform_name = "msm-pcm-hostless",
  5696. .dynamic = 1,
  5697. .dpcm_playback = 1,
  5698. .dpcm_capture = 1,
  5699. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5700. SND_SOC_DPCM_TRIGGER_POST},
  5701. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5702. .ignore_suspend = 1,
  5703. /* this dailink has playback support */
  5704. .ignore_pmdown_time = 1,
  5705. .codec_dai_name = "snd-soc-dummy-dai",
  5706. .codec_name = "snd-soc-dummy",
  5707. },
  5708. {/* hw:x,36 */
  5709. .name = "TX3_CDC_DMA Hostless",
  5710. .stream_name = "TX3_CDC_DMA Hostless",
  5711. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  5712. .platform_name = "msm-pcm-hostless",
  5713. .dynamic = 1,
  5714. .dpcm_capture = 1,
  5715. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5716. SND_SOC_DPCM_TRIGGER_POST},
  5717. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5718. .ignore_suspend = 1,
  5719. .codec_dai_name = "snd-soc-dummy-dai",
  5720. .codec_name = "snd-soc-dummy",
  5721. },
  5722. };
  5723. static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
  5724. {/* hw:x,37 */
  5725. .name = LPASS_BE_SLIMBUS_4_TX,
  5726. .stream_name = "Slimbus4 Capture",
  5727. .cpu_dai_name = "msm-dai-q6-dev.16393",
  5728. .platform_name = "msm-pcm-hostless",
  5729. .codec_name = "tavil_codec",
  5730. .codec_dai_name = "tavil_vifeedback",
  5731. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  5732. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5733. .ops = &msm_be_ops,
  5734. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5735. .ignore_suspend = 1,
  5736. },
  5737. /* Ultrasound RX DAI Link */
  5738. {/* hw:x,38 */
  5739. .name = "SLIMBUS_2 Hostless Playback",
  5740. .stream_name = "SLIMBUS_2 Hostless Playback",
  5741. .cpu_dai_name = "msm-dai-q6-dev.16388",
  5742. .platform_name = "msm-pcm-hostless",
  5743. .codec_name = "tavil_codec",
  5744. .codec_dai_name = "tavil_rx2",
  5745. .ignore_suspend = 1,
  5746. .ignore_pmdown_time = 1,
  5747. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5748. .ops = &msm_slimbus_2_be_ops,
  5749. },
  5750. /* Ultrasound TX DAI Link */
  5751. {/* hw:x,39 */
  5752. .name = "SLIMBUS_2 Hostless Capture",
  5753. .stream_name = "SLIMBUS_2 Hostless Capture",
  5754. .cpu_dai_name = "msm-dai-q6-dev.16389",
  5755. .platform_name = "msm-pcm-hostless",
  5756. .codec_name = "tavil_codec",
  5757. .codec_dai_name = "tavil_tx2",
  5758. .ignore_suspend = 1,
  5759. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5760. .ops = &msm_slimbus_2_be_ops,
  5761. },
  5762. };
  5763. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  5764. {/* hw:x,37 */
  5765. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  5766. .stream_name = "WSA CDC DMA0 Capture",
  5767. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  5768. .platform_name = "msm-pcm-hostless",
  5769. .codec_name = "bolero_codec",
  5770. .codec_dai_name = "wsa_macro_vifeedback",
  5771. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  5772. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5773. .ignore_suspend = 1,
  5774. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5775. .ops = &msm_cdc_dma_be_ops,
  5776. },
  5777. };
  5778. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  5779. {
  5780. .name = MSM_DAILINK_NAME(ASM Loopback),
  5781. .stream_name = "MultiMedia6",
  5782. .cpu_dai_name = "MultiMedia6",
  5783. .platform_name = "msm-pcm-loopback",
  5784. .dynamic = 1,
  5785. .dpcm_playback = 1,
  5786. .dpcm_capture = 1,
  5787. .codec_dai_name = "snd-soc-dummy-dai",
  5788. .codec_name = "snd-soc-dummy",
  5789. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5790. SND_SOC_DPCM_TRIGGER_POST},
  5791. .ignore_suspend = 1,
  5792. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5793. .ignore_pmdown_time = 1,
  5794. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  5795. },
  5796. {
  5797. .name = "USB Audio Hostless",
  5798. .stream_name = "USB Audio Hostless",
  5799. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  5800. .platform_name = "msm-pcm-hostless",
  5801. .dynamic = 1,
  5802. .dpcm_playback = 1,
  5803. .dpcm_capture = 1,
  5804. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5805. SND_SOC_DPCM_TRIGGER_POST},
  5806. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5807. .ignore_suspend = 1,
  5808. .ignore_pmdown_time = 1,
  5809. .codec_dai_name = "snd-soc-dummy-dai",
  5810. .codec_name = "snd-soc-dummy",
  5811. },
  5812. };
  5813. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  5814. /* Backend AFE DAI Links */
  5815. {
  5816. .name = LPASS_BE_AFE_PCM_RX,
  5817. .stream_name = "AFE Playback",
  5818. .cpu_dai_name = "msm-dai-q6-dev.224",
  5819. .platform_name = "msm-pcm-routing",
  5820. .codec_name = "msm-stub-codec.1",
  5821. .codec_dai_name = "msm-stub-rx",
  5822. .no_pcm = 1,
  5823. .dpcm_playback = 1,
  5824. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  5825. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5826. /* this dainlink has playback support */
  5827. .ignore_pmdown_time = 1,
  5828. .ignore_suspend = 1,
  5829. },
  5830. {
  5831. .name = LPASS_BE_AFE_PCM_TX,
  5832. .stream_name = "AFE Capture",
  5833. .cpu_dai_name = "msm-dai-q6-dev.225",
  5834. .platform_name = "msm-pcm-routing",
  5835. .codec_name = "msm-stub-codec.1",
  5836. .codec_dai_name = "msm-stub-tx",
  5837. .no_pcm = 1,
  5838. .dpcm_capture = 1,
  5839. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  5840. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5841. .ignore_suspend = 1,
  5842. },
  5843. /* Incall Record Uplink BACK END DAI Link */
  5844. {
  5845. .name = LPASS_BE_INCALL_RECORD_TX,
  5846. .stream_name = "Voice Uplink Capture",
  5847. .cpu_dai_name = "msm-dai-q6-dev.32772",
  5848. .platform_name = "msm-pcm-routing",
  5849. .codec_name = "msm-stub-codec.1",
  5850. .codec_dai_name = "msm-stub-tx",
  5851. .no_pcm = 1,
  5852. .dpcm_capture = 1,
  5853. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  5854. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5855. .ignore_suspend = 1,
  5856. },
  5857. /* Incall Record Downlink BACK END DAI Link */
  5858. {
  5859. .name = LPASS_BE_INCALL_RECORD_RX,
  5860. .stream_name = "Voice Downlink Capture",
  5861. .cpu_dai_name = "msm-dai-q6-dev.32771",
  5862. .platform_name = "msm-pcm-routing",
  5863. .codec_name = "msm-stub-codec.1",
  5864. .codec_dai_name = "msm-stub-tx",
  5865. .no_pcm = 1,
  5866. .dpcm_capture = 1,
  5867. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  5868. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5869. .ignore_suspend = 1,
  5870. },
  5871. /* Incall Music BACK END DAI Link */
  5872. {
  5873. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  5874. .stream_name = "Voice Farend Playback",
  5875. .cpu_dai_name = "msm-dai-q6-dev.32773",
  5876. .platform_name = "msm-pcm-routing",
  5877. .codec_name = "msm-stub-codec.1",
  5878. .codec_dai_name = "msm-stub-rx",
  5879. .no_pcm = 1,
  5880. .dpcm_playback = 1,
  5881. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  5882. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5883. .ignore_suspend = 1,
  5884. .ignore_pmdown_time = 1,
  5885. },
  5886. /* Incall Music 2 BACK END DAI Link */
  5887. {
  5888. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  5889. .stream_name = "Voice2 Farend Playback",
  5890. .cpu_dai_name = "msm-dai-q6-dev.32770",
  5891. .platform_name = "msm-pcm-routing",
  5892. .codec_name = "msm-stub-codec.1",
  5893. .codec_dai_name = "msm-stub-rx",
  5894. .no_pcm = 1,
  5895. .dpcm_playback = 1,
  5896. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  5897. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5898. .ignore_suspend = 1,
  5899. .ignore_pmdown_time = 1,
  5900. },
  5901. {
  5902. .name = LPASS_BE_USB_AUDIO_RX,
  5903. .stream_name = "USB Audio Playback",
  5904. .cpu_dai_name = "msm-dai-q6-dev.28672",
  5905. .platform_name = "msm-pcm-routing",
  5906. .codec_name = "msm-stub-codec.1",
  5907. .codec_dai_name = "msm-stub-rx",
  5908. .no_pcm = 1,
  5909. .dpcm_playback = 1,
  5910. .id = MSM_BACKEND_DAI_USB_RX,
  5911. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5912. .ignore_pmdown_time = 1,
  5913. .ignore_suspend = 1,
  5914. },
  5915. {
  5916. .name = LPASS_BE_USB_AUDIO_TX,
  5917. .stream_name = "USB Audio Capture",
  5918. .cpu_dai_name = "msm-dai-q6-dev.28673",
  5919. .platform_name = "msm-pcm-routing",
  5920. .codec_name = "msm-stub-codec.1",
  5921. .codec_dai_name = "msm-stub-tx",
  5922. .no_pcm = 1,
  5923. .dpcm_capture = 1,
  5924. .id = MSM_BACKEND_DAI_USB_TX,
  5925. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5926. .ignore_suspend = 1,
  5927. },
  5928. {
  5929. .name = LPASS_BE_PRI_TDM_RX_0,
  5930. .stream_name = "Primary TDM0 Playback",
  5931. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  5932. .platform_name = "msm-pcm-routing",
  5933. .codec_name = "msm-stub-codec.1",
  5934. .codec_dai_name = "msm-stub-rx",
  5935. .no_pcm = 1,
  5936. .dpcm_playback = 1,
  5937. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  5938. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5939. .ops = &sm6150_tdm_be_ops,
  5940. .ignore_suspend = 1,
  5941. .ignore_pmdown_time = 1,
  5942. },
  5943. {
  5944. .name = LPASS_BE_PRI_TDM_TX_0,
  5945. .stream_name = "Primary TDM0 Capture",
  5946. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  5947. .platform_name = "msm-pcm-routing",
  5948. .codec_name = "msm-stub-codec.1",
  5949. .codec_dai_name = "msm-stub-tx",
  5950. .no_pcm = 1,
  5951. .dpcm_capture = 1,
  5952. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  5953. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5954. .ops = &sm6150_tdm_be_ops,
  5955. .ignore_suspend = 1,
  5956. },
  5957. {
  5958. .name = LPASS_BE_SEC_TDM_RX_0,
  5959. .stream_name = "Secondary TDM0 Playback",
  5960. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  5961. .platform_name = "msm-pcm-routing",
  5962. .codec_name = "msm-stub-codec.1",
  5963. .codec_dai_name = "msm-stub-rx",
  5964. .no_pcm = 1,
  5965. .dpcm_playback = 1,
  5966. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  5967. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5968. .ops = &sm6150_tdm_be_ops,
  5969. .ignore_suspend = 1,
  5970. .ignore_pmdown_time = 1,
  5971. },
  5972. {
  5973. .name = LPASS_BE_SEC_TDM_TX_0,
  5974. .stream_name = "Secondary TDM0 Capture",
  5975. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  5976. .platform_name = "msm-pcm-routing",
  5977. .codec_name = "msm-stub-codec.1",
  5978. .codec_dai_name = "msm-stub-tx",
  5979. .no_pcm = 1,
  5980. .dpcm_capture = 1,
  5981. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  5982. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5983. .ops = &sm6150_tdm_be_ops,
  5984. .ignore_suspend = 1,
  5985. },
  5986. {
  5987. .name = LPASS_BE_TERT_TDM_RX_0,
  5988. .stream_name = "Tertiary TDM0 Playback",
  5989. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  5990. .platform_name = "msm-pcm-routing",
  5991. .codec_name = "msm-stub-codec.1",
  5992. .codec_dai_name = "msm-stub-rx",
  5993. .no_pcm = 1,
  5994. .dpcm_playback = 1,
  5995. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  5996. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5997. .ops = &sm6150_tdm_be_ops,
  5998. .ignore_suspend = 1,
  5999. .ignore_pmdown_time = 1,
  6000. },
  6001. {
  6002. .name = LPASS_BE_TERT_TDM_TX_0,
  6003. .stream_name = "Tertiary TDM0 Capture",
  6004. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  6005. .platform_name = "msm-pcm-routing",
  6006. .codec_name = "msm-stub-codec.1",
  6007. .codec_dai_name = "msm-stub-tx",
  6008. .no_pcm = 1,
  6009. .dpcm_capture = 1,
  6010. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  6011. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6012. .ops = &sm6150_tdm_be_ops,
  6013. .ignore_suspend = 1,
  6014. },
  6015. {
  6016. .name = LPASS_BE_QUAT_TDM_RX_0,
  6017. .stream_name = "Quaternary TDM0 Playback",
  6018. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  6019. .platform_name = "msm-pcm-routing",
  6020. .codec_name = "msm-stub-codec.1",
  6021. .codec_dai_name = "msm-stub-rx",
  6022. .no_pcm = 1,
  6023. .dpcm_playback = 1,
  6024. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  6025. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6026. .ops = &sm6150_tdm_be_ops,
  6027. .ignore_suspend = 1,
  6028. .ignore_pmdown_time = 1,
  6029. },
  6030. {
  6031. .name = LPASS_BE_QUAT_TDM_TX_0,
  6032. .stream_name = "Quaternary TDM0 Capture",
  6033. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  6034. .platform_name = "msm-pcm-routing",
  6035. .codec_name = "msm-stub-codec.1",
  6036. .codec_dai_name = "msm-stub-tx",
  6037. .no_pcm = 1,
  6038. .dpcm_capture = 1,
  6039. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  6040. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6041. .ops = &sm6150_tdm_be_ops,
  6042. .ignore_suspend = 1,
  6043. },
  6044. {
  6045. .name = LPASS_BE_QUIN_TDM_RX_0,
  6046. .stream_name = "Quinary TDM0 Playback",
  6047. .cpu_dai_name = "msm-dai-q6-tdm.36928",
  6048. .platform_name = "msm-pcm-routing",
  6049. .codec_name = "msm-stub-codec.1",
  6050. .codec_dai_name = "msm-stub-rx",
  6051. .no_pcm = 1,
  6052. .dpcm_playback = 1,
  6053. .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
  6054. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6055. .ops = &sm6150_tdm_be_ops,
  6056. .ignore_suspend = 1,
  6057. .ignore_pmdown_time = 1,
  6058. },
  6059. {
  6060. .name = LPASS_BE_QUIN_TDM_TX_0,
  6061. .stream_name = "Quinary TDM0 Capture",
  6062. .cpu_dai_name = "msm-dai-q6-tdm.36929",
  6063. .platform_name = "msm-pcm-routing",
  6064. .codec_name = "msm-stub-codec.1",
  6065. .codec_dai_name = "msm-stub-tx",
  6066. .no_pcm = 1,
  6067. .dpcm_capture = 1,
  6068. .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
  6069. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6070. .ops = &sm6150_tdm_be_ops,
  6071. .ignore_suspend = 1,
  6072. },
  6073. };
  6074. static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
  6075. {
  6076. .name = LPASS_BE_SLIMBUS_0_RX,
  6077. .stream_name = "Slimbus Playback",
  6078. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6079. .platform_name = "msm-pcm-routing",
  6080. .codec_name = "tavil_codec",
  6081. .codec_dai_name = "tavil_rx1",
  6082. .no_pcm = 1,
  6083. .dpcm_playback = 1,
  6084. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6085. .init = &msm_audrx_tavil_init,
  6086. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6087. /* this dainlink has playback support */
  6088. .ignore_pmdown_time = 1,
  6089. .ignore_suspend = 1,
  6090. .ops = &msm_be_ops,
  6091. },
  6092. {
  6093. .name = LPASS_BE_SLIMBUS_0_TX,
  6094. .stream_name = "Slimbus Capture",
  6095. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6096. .platform_name = "msm-pcm-routing",
  6097. .codec_name = "tavil_codec",
  6098. .codec_dai_name = "tavil_tx1",
  6099. .no_pcm = 1,
  6100. .dpcm_capture = 1,
  6101. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6102. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6103. .ignore_suspend = 1,
  6104. .ops = &msm_be_ops,
  6105. },
  6106. {
  6107. .name = LPASS_BE_SLIMBUS_1_RX,
  6108. .stream_name = "Slimbus1 Playback",
  6109. .cpu_dai_name = "msm-dai-q6-dev.16386",
  6110. .platform_name = "msm-pcm-routing",
  6111. .codec_name = "tavil_codec",
  6112. .codec_dai_name = "tavil_rx1",
  6113. .no_pcm = 1,
  6114. .dpcm_playback = 1,
  6115. .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
  6116. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6117. .ops = &msm_be_ops,
  6118. /* dai link has playback support */
  6119. .ignore_pmdown_time = 1,
  6120. .ignore_suspend = 1,
  6121. },
  6122. {
  6123. .name = LPASS_BE_SLIMBUS_1_TX,
  6124. .stream_name = "Slimbus1 Capture",
  6125. .cpu_dai_name = "msm-dai-q6-dev.16387",
  6126. .platform_name = "msm-pcm-routing",
  6127. .codec_name = "tavil_codec",
  6128. .codec_dai_name = "tavil_tx3",
  6129. .no_pcm = 1,
  6130. .dpcm_capture = 1,
  6131. .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
  6132. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6133. .ops = &msm_be_ops,
  6134. .ignore_suspend = 1,
  6135. },
  6136. {
  6137. .name = LPASS_BE_SLIMBUS_2_RX,
  6138. .stream_name = "Slimbus2 Playback",
  6139. .cpu_dai_name = "msm-dai-q6-dev.16388",
  6140. .platform_name = "msm-pcm-routing",
  6141. .codec_name = "tavil_codec",
  6142. .codec_dai_name = "tavil_rx2",
  6143. .no_pcm = 1,
  6144. .dpcm_playback = 1,
  6145. .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
  6146. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6147. .ops = &msm_be_ops,
  6148. .ignore_pmdown_time = 1,
  6149. .ignore_suspend = 1,
  6150. },
  6151. {
  6152. .name = LPASS_BE_SLIMBUS_3_RX,
  6153. .stream_name = "Slimbus3 Playback",
  6154. .cpu_dai_name = "msm-dai-q6-dev.16390",
  6155. .platform_name = "msm-pcm-routing",
  6156. .codec_name = "tavil_codec",
  6157. .codec_dai_name = "tavil_rx1",
  6158. .no_pcm = 1,
  6159. .dpcm_playback = 1,
  6160. .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
  6161. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6162. .ops = &msm_be_ops,
  6163. /* dai link has playback support */
  6164. .ignore_pmdown_time = 1,
  6165. .ignore_suspend = 1,
  6166. },
  6167. {
  6168. .name = LPASS_BE_SLIMBUS_3_TX,
  6169. .stream_name = "Slimbus3 Capture",
  6170. .cpu_dai_name = "msm-dai-q6-dev.16391",
  6171. .platform_name = "msm-pcm-routing",
  6172. .codec_name = "tavil_codec",
  6173. .codec_dai_name = "tavil_tx1",
  6174. .no_pcm = 1,
  6175. .dpcm_capture = 1,
  6176. .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
  6177. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6178. .ops = &msm_be_ops,
  6179. .ignore_suspend = 1,
  6180. },
  6181. {
  6182. .name = LPASS_BE_SLIMBUS_4_RX,
  6183. .stream_name = "Slimbus4 Playback",
  6184. .cpu_dai_name = "msm-dai-q6-dev.16392",
  6185. .platform_name = "msm-pcm-routing",
  6186. .codec_name = "tavil_codec",
  6187. .codec_dai_name = "tavil_rx1",
  6188. .no_pcm = 1,
  6189. .dpcm_playback = 1,
  6190. .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
  6191. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6192. .ops = &msm_be_ops,
  6193. /* dai link has playback support */
  6194. .ignore_pmdown_time = 1,
  6195. .ignore_suspend = 1,
  6196. },
  6197. {
  6198. .name = LPASS_BE_SLIMBUS_5_RX,
  6199. .stream_name = "Slimbus5 Playback",
  6200. .cpu_dai_name = "msm-dai-q6-dev.16394",
  6201. .platform_name = "msm-pcm-routing",
  6202. .codec_name = "tavil_codec",
  6203. .codec_dai_name = "tavil_rx3",
  6204. .no_pcm = 1,
  6205. .dpcm_playback = 1,
  6206. .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
  6207. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6208. .ops = &msm_be_ops,
  6209. /* dai link has playback support */
  6210. .ignore_pmdown_time = 1,
  6211. .ignore_suspend = 1,
  6212. },
  6213. /* MAD BE */
  6214. {
  6215. .name = LPASS_BE_SLIMBUS_5_TX,
  6216. .stream_name = "Slimbus5 Capture",
  6217. .cpu_dai_name = "msm-dai-q6-dev.16395",
  6218. .platform_name = "msm-pcm-routing",
  6219. .codec_name = "tavil_codec",
  6220. .codec_dai_name = "tavil_mad1",
  6221. .no_pcm = 1,
  6222. .dpcm_capture = 1,
  6223. .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
  6224. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6225. .ops = &msm_be_ops,
  6226. .ignore_suspend = 1,
  6227. },
  6228. {
  6229. .name = LPASS_BE_SLIMBUS_6_RX,
  6230. .stream_name = "Slimbus6 Playback",
  6231. .cpu_dai_name = "msm-dai-q6-dev.16396",
  6232. .platform_name = "msm-pcm-routing",
  6233. .codec_name = "tavil_codec",
  6234. .codec_dai_name = "tavil_rx4",
  6235. .no_pcm = 1,
  6236. .dpcm_playback = 1,
  6237. .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
  6238. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6239. .ops = &msm_be_ops,
  6240. /* dai link has playback support */
  6241. .ignore_pmdown_time = 1,
  6242. .ignore_suspend = 1,
  6243. },
  6244. /* Slimbus VI Recording */
  6245. {
  6246. .name = LPASS_BE_SLIMBUS_TX_VI,
  6247. .stream_name = "Slimbus4 Capture",
  6248. .cpu_dai_name = "msm-dai-q6-dev.16393",
  6249. .platform_name = "msm-pcm-routing",
  6250. .codec_name = "tavil_codec",
  6251. .codec_dai_name = "tavil_vifeedback",
  6252. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  6253. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6254. .ops = &msm_be_ops,
  6255. .ignore_suspend = 1,
  6256. .no_pcm = 1,
  6257. .dpcm_capture = 1,
  6258. },
  6259. };
  6260. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  6261. {
  6262. .name = LPASS_BE_SLIMBUS_7_RX,
  6263. .stream_name = "Slimbus7 Playback",
  6264. .cpu_dai_name = "msm-dai-q6-dev.16398",
  6265. .platform_name = "msm-pcm-routing",
  6266. .codec_name = "btfmslim_slave",
  6267. /* BT codec driver determines capabilities based on
  6268. * dai name, bt codecdai name should always contains
  6269. * supported usecase information
  6270. */
  6271. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  6272. .no_pcm = 1,
  6273. .dpcm_playback = 1,
  6274. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  6275. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6276. .ops = &msm_wcn_ops,
  6277. /* dai link has playback support */
  6278. .ignore_pmdown_time = 1,
  6279. .ignore_suspend = 1,
  6280. },
  6281. {
  6282. .name = LPASS_BE_SLIMBUS_7_TX,
  6283. .stream_name = "Slimbus7 Capture",
  6284. .cpu_dai_name = "msm-dai-q6-dev.16399",
  6285. .platform_name = "msm-pcm-routing",
  6286. .codec_name = "btfmslim_slave",
  6287. .codec_dai_name = "btfm_bt_sco_slim_tx",
  6288. .no_pcm = 1,
  6289. .dpcm_capture = 1,
  6290. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  6291. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6292. .ops = &msm_wcn_ops,
  6293. .ignore_suspend = 1,
  6294. },
  6295. {
  6296. .name = LPASS_BE_SLIMBUS_8_TX,
  6297. .stream_name = "Slimbus8 Capture",
  6298. .cpu_dai_name = "msm-dai-q6-dev.16401",
  6299. .platform_name = "msm-pcm-routing",
  6300. .codec_name = "btfmslim_slave",
  6301. .codec_dai_name = "btfm_fm_slim_tx",
  6302. .no_pcm = 1,
  6303. .dpcm_capture = 1,
  6304. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  6305. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6306. .init = &msm_wcn_init,
  6307. .ops = &msm_wcn_ops,
  6308. .ignore_suspend = 1,
  6309. },
  6310. };
  6311. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  6312. /* DISP PORT BACK END DAI Link */
  6313. {
  6314. .name = LPASS_BE_DISPLAY_PORT,
  6315. .stream_name = "Display Port Playback",
  6316. .cpu_dai_name = "msm-dai-q6-dp.24608",
  6317. .platform_name = "msm-pcm-routing",
  6318. .codec_name = "msm-ext-disp-audio-codec-rx",
  6319. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  6320. .no_pcm = 1,
  6321. .dpcm_playback = 1,
  6322. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  6323. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6324. .ignore_pmdown_time = 1,
  6325. .ignore_suspend = 1,
  6326. },
  6327. };
  6328. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  6329. {
  6330. .name = LPASS_BE_PRI_MI2S_RX,
  6331. .stream_name = "Primary MI2S Playback",
  6332. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6333. .platform_name = "msm-pcm-routing",
  6334. .codec_name = "msm-stub-codec.1",
  6335. .codec_dai_name = "msm-stub-rx",
  6336. .no_pcm = 1,
  6337. .dpcm_playback = 1,
  6338. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  6339. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6340. .ops = &msm_mi2s_be_ops,
  6341. .ignore_suspend = 1,
  6342. .ignore_pmdown_time = 1,
  6343. },
  6344. {
  6345. .name = LPASS_BE_PRI_MI2S_TX,
  6346. .stream_name = "Primary MI2S Capture",
  6347. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6348. .platform_name = "msm-pcm-routing",
  6349. .codec_name = "msm-stub-codec.1",
  6350. .codec_dai_name = "msm-stub-tx",
  6351. .no_pcm = 1,
  6352. .dpcm_capture = 1,
  6353. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  6354. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6355. .ops = &msm_mi2s_be_ops,
  6356. .ignore_suspend = 1,
  6357. },
  6358. {
  6359. .name = LPASS_BE_SEC_MI2S_RX,
  6360. .stream_name = "Secondary MI2S Playback",
  6361. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6362. .platform_name = "msm-pcm-routing",
  6363. .codec_name = "msm-stub-codec.1",
  6364. .codec_dai_name = "msm-stub-rx",
  6365. .no_pcm = 1,
  6366. .dpcm_playback = 1,
  6367. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  6368. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6369. .ops = &msm_mi2s_be_ops,
  6370. .ignore_suspend = 1,
  6371. .ignore_pmdown_time = 1,
  6372. },
  6373. {
  6374. .name = LPASS_BE_SEC_MI2S_TX,
  6375. .stream_name = "Secondary MI2S Capture",
  6376. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6377. .platform_name = "msm-pcm-routing",
  6378. .codec_name = "msm-stub-codec.1",
  6379. .codec_dai_name = "msm-stub-tx",
  6380. .no_pcm = 1,
  6381. .dpcm_capture = 1,
  6382. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  6383. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6384. .ops = &msm_mi2s_be_ops,
  6385. .ignore_suspend = 1,
  6386. },
  6387. {
  6388. .name = LPASS_BE_TERT_MI2S_RX,
  6389. .stream_name = "Tertiary MI2S Playback",
  6390. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6391. .platform_name = "msm-pcm-routing",
  6392. .codec_name = "msm-stub-codec.1",
  6393. .codec_dai_name = "msm-stub-rx",
  6394. .no_pcm = 1,
  6395. .dpcm_playback = 1,
  6396. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  6397. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6398. .ops = &msm_mi2s_be_ops,
  6399. .ignore_suspend = 1,
  6400. .ignore_pmdown_time = 1,
  6401. },
  6402. {
  6403. .name = LPASS_BE_TERT_MI2S_TX,
  6404. .stream_name = "Tertiary MI2S Capture",
  6405. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6406. .platform_name = "msm-pcm-routing",
  6407. .codec_name = "msm-stub-codec.1",
  6408. .codec_dai_name = "msm-stub-tx",
  6409. .no_pcm = 1,
  6410. .dpcm_capture = 1,
  6411. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  6412. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6413. .ops = &msm_mi2s_be_ops,
  6414. .ignore_suspend = 1,
  6415. },
  6416. {
  6417. .name = LPASS_BE_QUAT_MI2S_RX,
  6418. .stream_name = "Quaternary MI2S Playback",
  6419. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6420. .platform_name = "msm-pcm-routing",
  6421. .codec_name = "msm-stub-codec.1",
  6422. .codec_dai_name = "msm-stub-rx",
  6423. .no_pcm = 1,
  6424. .dpcm_playback = 1,
  6425. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  6426. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6427. .ops = &msm_mi2s_be_ops,
  6428. .ignore_suspend = 1,
  6429. .ignore_pmdown_time = 1,
  6430. },
  6431. {
  6432. .name = LPASS_BE_QUAT_MI2S_TX,
  6433. .stream_name = "Quaternary MI2S Capture",
  6434. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6435. .platform_name = "msm-pcm-routing",
  6436. .codec_name = "msm-stub-codec.1",
  6437. .codec_dai_name = "msm-stub-tx",
  6438. .no_pcm = 1,
  6439. .dpcm_capture = 1,
  6440. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  6441. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6442. .ops = &msm_mi2s_be_ops,
  6443. .ignore_suspend = 1,
  6444. },
  6445. {
  6446. .name = LPASS_BE_QUIN_MI2S_RX,
  6447. .stream_name = "Quinary MI2S Playback",
  6448. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6449. .platform_name = "msm-pcm-routing",
  6450. .codec_name = "msm-stub-codec.1",
  6451. .codec_dai_name = "msm-stub-rx",
  6452. .no_pcm = 1,
  6453. .dpcm_playback = 1,
  6454. .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
  6455. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6456. .ops = &msm_mi2s_be_ops,
  6457. .ignore_suspend = 1,
  6458. .ignore_pmdown_time = 1,
  6459. },
  6460. {
  6461. .name = LPASS_BE_QUIN_MI2S_TX,
  6462. .stream_name = "Quinary MI2S Capture",
  6463. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6464. .platform_name = "msm-pcm-routing",
  6465. .codec_name = "msm-stub-codec.1",
  6466. .codec_dai_name = "msm-stub-tx",
  6467. .no_pcm = 1,
  6468. .dpcm_capture = 1,
  6469. .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
  6470. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6471. .ops = &msm_mi2s_be_ops,
  6472. .ignore_suspend = 1,
  6473. },
  6474. };
  6475. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  6476. /* Primary AUX PCM Backend DAI Links */
  6477. {
  6478. .name = LPASS_BE_AUXPCM_RX,
  6479. .stream_name = "AUX PCM Playback",
  6480. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6481. .platform_name = "msm-pcm-routing",
  6482. .codec_name = "msm-stub-codec.1",
  6483. .codec_dai_name = "msm-stub-rx",
  6484. .no_pcm = 1,
  6485. .dpcm_playback = 1,
  6486. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  6487. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6488. .ignore_pmdown_time = 1,
  6489. .ignore_suspend = 1,
  6490. },
  6491. {
  6492. .name = LPASS_BE_AUXPCM_TX,
  6493. .stream_name = "AUX PCM Capture",
  6494. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6495. .platform_name = "msm-pcm-routing",
  6496. .codec_name = "msm-stub-codec.1",
  6497. .codec_dai_name = "msm-stub-tx",
  6498. .no_pcm = 1,
  6499. .dpcm_capture = 1,
  6500. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  6501. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6502. .ignore_suspend = 1,
  6503. },
  6504. /* Secondary AUX PCM Backend DAI Links */
  6505. {
  6506. .name = LPASS_BE_SEC_AUXPCM_RX,
  6507. .stream_name = "Sec AUX PCM Playback",
  6508. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6509. .platform_name = "msm-pcm-routing",
  6510. .codec_name = "msm-stub-codec.1",
  6511. .codec_dai_name = "msm-stub-rx",
  6512. .no_pcm = 1,
  6513. .dpcm_playback = 1,
  6514. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  6515. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6516. .ignore_pmdown_time = 1,
  6517. .ignore_suspend = 1,
  6518. },
  6519. {
  6520. .name = LPASS_BE_SEC_AUXPCM_TX,
  6521. .stream_name = "Sec AUX PCM Capture",
  6522. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6523. .platform_name = "msm-pcm-routing",
  6524. .codec_name = "msm-stub-codec.1",
  6525. .codec_dai_name = "msm-stub-tx",
  6526. .no_pcm = 1,
  6527. .dpcm_capture = 1,
  6528. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  6529. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6530. .ignore_suspend = 1,
  6531. },
  6532. /* Tertiary AUX PCM Backend DAI Links */
  6533. {
  6534. .name = LPASS_BE_TERT_AUXPCM_RX,
  6535. .stream_name = "Tert AUX PCM Playback",
  6536. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6537. .platform_name = "msm-pcm-routing",
  6538. .codec_name = "msm-stub-codec.1",
  6539. .codec_dai_name = "msm-stub-rx",
  6540. .no_pcm = 1,
  6541. .dpcm_playback = 1,
  6542. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  6543. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6544. .ignore_suspend = 1,
  6545. },
  6546. {
  6547. .name = LPASS_BE_TERT_AUXPCM_TX,
  6548. .stream_name = "Tert AUX PCM Capture",
  6549. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6550. .platform_name = "msm-pcm-routing",
  6551. .codec_name = "msm-stub-codec.1",
  6552. .codec_dai_name = "msm-stub-tx",
  6553. .no_pcm = 1,
  6554. .dpcm_capture = 1,
  6555. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  6556. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6557. .ignore_suspend = 1,
  6558. },
  6559. /* Quaternary AUX PCM Backend DAI Links */
  6560. {
  6561. .name = LPASS_BE_QUAT_AUXPCM_RX,
  6562. .stream_name = "Quat AUX PCM Playback",
  6563. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6564. .platform_name = "msm-pcm-routing",
  6565. .codec_name = "msm-stub-codec.1",
  6566. .codec_dai_name = "msm-stub-rx",
  6567. .no_pcm = 1,
  6568. .dpcm_playback = 1,
  6569. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  6570. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6571. .ignore_pmdown_time = 1,
  6572. .ignore_suspend = 1,
  6573. },
  6574. {
  6575. .name = LPASS_BE_QUAT_AUXPCM_TX,
  6576. .stream_name = "Quat AUX PCM Capture",
  6577. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6578. .platform_name = "msm-pcm-routing",
  6579. .codec_name = "msm-stub-codec.1",
  6580. .codec_dai_name = "msm-stub-tx",
  6581. .no_pcm = 1,
  6582. .dpcm_capture = 1,
  6583. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  6584. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6585. .ignore_suspend = 1,
  6586. },
  6587. /* Quinary AUX PCM Backend DAI Links */
  6588. {
  6589. .name = LPASS_BE_QUIN_AUXPCM_RX,
  6590. .stream_name = "Quin AUX PCM Playback",
  6591. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6592. .platform_name = "msm-pcm-routing",
  6593. .codec_name = "msm-stub-codec.1",
  6594. .codec_dai_name = "msm-stub-rx",
  6595. .no_pcm = 1,
  6596. .dpcm_playback = 1,
  6597. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
  6598. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6599. .ignore_pmdown_time = 1,
  6600. .ignore_suspend = 1,
  6601. },
  6602. {
  6603. .name = LPASS_BE_QUIN_AUXPCM_TX,
  6604. .stream_name = "Quin AUX PCM Capture",
  6605. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6606. .platform_name = "msm-pcm-routing",
  6607. .codec_name = "msm-stub-codec.1",
  6608. .codec_dai_name = "msm-stub-tx",
  6609. .no_pcm = 1,
  6610. .dpcm_capture = 1,
  6611. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
  6612. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6613. .ignore_suspend = 1,
  6614. },
  6615. };
  6616. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  6617. /* WSA CDC DMA Backend DAI Links */
  6618. {
  6619. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  6620. .stream_name = "WSA CDC DMA0 Playback",
  6621. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  6622. .platform_name = "msm-pcm-routing",
  6623. .codec_name = "bolero_codec",
  6624. .codec_dai_name = "wsa_macro_rx1",
  6625. .no_pcm = 1,
  6626. .dpcm_playback = 1,
  6627. .init = &msm_int_audrx_init,
  6628. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  6629. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6630. .ignore_pmdown_time = 1,
  6631. .ignore_suspend = 1,
  6632. .ops = &msm_cdc_dma_be_ops,
  6633. },
  6634. {
  6635. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  6636. .stream_name = "WSA CDC DMA1 Playback",
  6637. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  6638. .platform_name = "msm-pcm-routing",
  6639. .codec_name = "bolero_codec",
  6640. .codec_dai_name = "wsa_macro_rx_mix",
  6641. .no_pcm = 1,
  6642. .dpcm_playback = 1,
  6643. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  6644. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6645. .ignore_pmdown_time = 1,
  6646. .ignore_suspend = 1,
  6647. .ops = &msm_cdc_dma_be_ops,
  6648. },
  6649. {
  6650. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  6651. .stream_name = "WSA CDC DMA1 Capture",
  6652. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  6653. .platform_name = "msm-pcm-routing",
  6654. .codec_name = "bolero_codec",
  6655. .codec_dai_name = "wsa_macro_echo",
  6656. .no_pcm = 1,
  6657. .dpcm_capture = 1,
  6658. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  6659. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6660. .ignore_suspend = 1,
  6661. .ops = &msm_cdc_dma_be_ops,
  6662. },
  6663. };
  6664. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  6665. /* RX CDC DMA Backend DAI Links */
  6666. {
  6667. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  6668. .stream_name = "RX CDC DMA0 Playback",
  6669. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  6670. .platform_name = "msm-pcm-routing",
  6671. .codec_name = "bolero_codec",
  6672. .codec_dai_name = "rx_macro_rx1",
  6673. .no_pcm = 1,
  6674. .dpcm_playback = 1,
  6675. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  6676. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6677. .ignore_pmdown_time = 1,
  6678. .ignore_suspend = 1,
  6679. .ops = &msm_cdc_dma_be_ops,
  6680. },
  6681. {
  6682. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  6683. .stream_name = "RX CDC DMA1 Playback",
  6684. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  6685. .platform_name = "msm-pcm-routing",
  6686. .codec_name = "bolero_codec",
  6687. .codec_dai_name = "rx_macro_rx2",
  6688. .no_pcm = 1,
  6689. .dpcm_playback = 1,
  6690. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  6691. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6692. .ignore_pmdown_time = 1,
  6693. .ignore_suspend = 1,
  6694. .ops = &msm_cdc_dma_be_ops,
  6695. },
  6696. {
  6697. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  6698. .stream_name = "RX CDC DMA2 Playback",
  6699. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  6700. .platform_name = "msm-pcm-routing",
  6701. .codec_name = "bolero_codec",
  6702. .codec_dai_name = "rx_macro_rx3",
  6703. .no_pcm = 1,
  6704. .dpcm_playback = 1,
  6705. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  6706. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6707. .ignore_pmdown_time = 1,
  6708. .ignore_suspend = 1,
  6709. .ops = &msm_cdc_dma_be_ops,
  6710. },
  6711. {
  6712. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  6713. .stream_name = "RX CDC DMA3 Playback",
  6714. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  6715. .platform_name = "msm-pcm-routing",
  6716. .codec_name = "bolero_codec",
  6717. .codec_dai_name = "rx_macro_rx4",
  6718. .no_pcm = 1,
  6719. .dpcm_playback = 1,
  6720. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  6721. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6722. .ignore_pmdown_time = 1,
  6723. .ignore_suspend = 1,
  6724. .ops = &msm_cdc_dma_be_ops,
  6725. },
  6726. /* TX CDC DMA Backend DAI Links */
  6727. {
  6728. .name = LPASS_BE_TX_CDC_DMA_TX_0,
  6729. .stream_name = "TX CDC DMA0 Capture",
  6730. .cpu_dai_name = "msm-dai-cdc-dma-dev.45105",
  6731. .platform_name = "msm-pcm-routing",
  6732. .codec_name = "bolero_codec",
  6733. .codec_dai_name = "rx_macro_echo",
  6734. .no_pcm = 1,
  6735. .dpcm_capture = 1,
  6736. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_0,
  6737. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6738. .ignore_suspend = 1,
  6739. .ops = &msm_cdc_dma_be_ops,
  6740. },
  6741. {
  6742. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  6743. .stream_name = "TX CDC DMA3 Capture",
  6744. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  6745. .platform_name = "msm-pcm-routing",
  6746. .codec_name = "bolero_codec",
  6747. .codec_dai_name = "tx_macro_tx1",
  6748. .no_pcm = 1,
  6749. .dpcm_capture = 1,
  6750. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  6751. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6752. .ignore_suspend = 1,
  6753. .ops = &msm_cdc_dma_be_ops,
  6754. },
  6755. {
  6756. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  6757. .stream_name = "TX CDC DMA4 Capture",
  6758. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  6759. .platform_name = "msm-pcm-routing",
  6760. .codec_name = "bolero_codec",
  6761. .codec_dai_name = "tx_macro_tx2",
  6762. .no_pcm = 1,
  6763. .dpcm_capture = 1,
  6764. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  6765. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6766. .ignore_suspend = 1,
  6767. .ops = &msm_cdc_dma_be_ops,
  6768. },
  6769. };
  6770. static struct snd_soc_dai_link msm_sm6150_dai_links[
  6771. ARRAY_SIZE(msm_common_dai_links) +
  6772. ARRAY_SIZE(msm_tavil_fe_dai_links) +
  6773. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  6774. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  6775. ARRAY_SIZE(msm_common_be_dai_links) +
  6776. ARRAY_SIZE(msm_tavil_be_dai_links) +
  6777. ARRAY_SIZE(msm_wcn_be_dai_links) +
  6778. ARRAY_SIZE(ext_disp_be_dai_link) +
  6779. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  6780. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  6781. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  6782. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
  6783. static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
  6784. {
  6785. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  6786. struct snd_soc_pcm_runtime *rtd;
  6787. struct snd_soc_component *component;
  6788. int ret = 0;
  6789. void *mbhc_calibration;
  6790. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  6791. if (!rtd) {
  6792. dev_err(card->dev,
  6793. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  6794. __func__, be_dl_name);
  6795. ret = -EINVAL;
  6796. goto err_pcm_runtime;
  6797. }
  6798. component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
  6799. if (!component) {
  6800. pr_err("%s: component is NULL\n", __func__);
  6801. ret = -EINVAL;
  6802. goto err_pcm_runtime;
  6803. }
  6804. mbhc_calibration = def_wcd_mbhc_cal();
  6805. if (!mbhc_calibration) {
  6806. ret = -ENOMEM;
  6807. goto err_mbhc_cal;
  6808. }
  6809. wcd_mbhc_cfg.calibration = mbhc_calibration;
  6810. ret = tavil_mbhc_hs_detect(component, &wcd_mbhc_cfg);
  6811. if (ret) {
  6812. dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
  6813. __func__, ret);
  6814. goto err_hs_detect;
  6815. }
  6816. return 0;
  6817. err_hs_detect:
  6818. kfree(mbhc_calibration);
  6819. err_mbhc_cal:
  6820. err_pcm_runtime:
  6821. return ret;
  6822. }
  6823. static int msm_populate_dai_link_component_of_node(
  6824. struct snd_soc_card *card)
  6825. {
  6826. int i, index, ret = 0;
  6827. struct device *cdev = card->dev;
  6828. struct snd_soc_dai_link *dai_link = card->dai_link;
  6829. struct device_node *np;
  6830. if (!cdev) {
  6831. pr_err("%s: Sound card device memory NULL\n", __func__);
  6832. return -ENODEV;
  6833. }
  6834. for (i = 0; i < card->num_links; i++) {
  6835. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  6836. continue;
  6837. /* populate platform_of_node for snd card dai links */
  6838. if (dai_link[i].platform_name &&
  6839. !dai_link[i].platform_of_node) {
  6840. index = of_property_match_string(cdev->of_node,
  6841. "asoc-platform-names",
  6842. dai_link[i].platform_name);
  6843. if (index < 0) {
  6844. pr_err("%s: No match found for platform name: %s\n",
  6845. __func__, dai_link[i].platform_name);
  6846. ret = index;
  6847. goto err;
  6848. }
  6849. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  6850. index);
  6851. if (!np) {
  6852. pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
  6853. __func__, dai_link[i].platform_name,
  6854. index);
  6855. ret = -ENODEV;
  6856. goto err;
  6857. }
  6858. dai_link[i].platform_of_node = np;
  6859. dai_link[i].platform_name = NULL;
  6860. }
  6861. /* populate cpu_of_node for snd card dai links */
  6862. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  6863. index = of_property_match_string(cdev->of_node,
  6864. "asoc-cpu-names",
  6865. dai_link[i].cpu_dai_name);
  6866. if (index >= 0) {
  6867. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  6868. index);
  6869. if (!np) {
  6870. pr_err("%s: retrieving phandle for cpu dai %s failed\n",
  6871. __func__,
  6872. dai_link[i].cpu_dai_name);
  6873. ret = -ENODEV;
  6874. goto err;
  6875. }
  6876. dai_link[i].cpu_of_node = np;
  6877. dai_link[i].cpu_dai_name = NULL;
  6878. }
  6879. }
  6880. /* populate codec_of_node for snd card dai links */
  6881. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  6882. index = of_property_match_string(cdev->of_node,
  6883. "asoc-codec-names",
  6884. dai_link[i].codec_name);
  6885. if (index < 0)
  6886. continue;
  6887. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  6888. index);
  6889. if (!np) {
  6890. pr_err("%s: retrieving phandle for codec %s failed\n",
  6891. __func__, dai_link[i].codec_name);
  6892. ret = -ENODEV;
  6893. goto err;
  6894. }
  6895. dai_link[i].codec_of_node = np;
  6896. dai_link[i].codec_name = NULL;
  6897. }
  6898. }
  6899. err:
  6900. return ret;
  6901. }
  6902. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  6903. {
  6904. int ret = 0;
  6905. struct snd_soc_component *component =
  6906. snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
  6907. ret = snd_soc_add_component_controls(component, msm_tavil_snd_controls,
  6908. ARRAY_SIZE(msm_tavil_snd_controls));
  6909. if (ret < 0) {
  6910. dev_err(component->dev,
  6911. "%s: add_codec_controls failed, err = %d\n",
  6912. __func__, ret);
  6913. return ret;
  6914. }
  6915. return 0;
  6916. }
  6917. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  6918. struct snd_pcm_hw_params *params)
  6919. {
  6920. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  6921. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  6922. int ret = 0;
  6923. unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
  6924. 151};
  6925. unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
  6926. 134, 135, 136, 137, 138, 139,
  6927. 140, 141, 142, 143};
  6928. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  6929. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  6930. slim_rx_cfg[SLIM_RX_0].channels,
  6931. rx_ch);
  6932. if (ret < 0)
  6933. pr_err("%s: RX failed to set cpu chan map error %d\n",
  6934. __func__, ret);
  6935. } else {
  6936. ret = snd_soc_dai_set_channel_map(cpu_dai,
  6937. slim_tx_cfg[SLIM_TX_0].channels,
  6938. tx_ch, 0, 0);
  6939. if (ret < 0)
  6940. pr_err("%s: TX failed to set cpu chan map error %d\n",
  6941. __func__, ret);
  6942. }
  6943. return ret;
  6944. }
  6945. static struct snd_soc_ops msm_stub_be_ops = {
  6946. .hw_params = msm_snd_stub_hw_params,
  6947. };
  6948. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  6949. /* FrontEnd DAI Links */
  6950. {
  6951. .name = "MSMSTUB Media1",
  6952. .stream_name = "MultiMedia1",
  6953. .cpu_dai_name = "MultiMedia1",
  6954. .platform_name = "msm-pcm-dsp.0",
  6955. .dynamic = 1,
  6956. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  6957. .dpcm_playback = 1,
  6958. .dpcm_capture = 1,
  6959. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6960. SND_SOC_DPCM_TRIGGER_POST},
  6961. .codec_dai_name = "snd-soc-dummy-dai",
  6962. .codec_name = "snd-soc-dummy",
  6963. .ignore_suspend = 1,
  6964. /* this dainlink has playback support */
  6965. .ignore_pmdown_time = 1,
  6966. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  6967. },
  6968. };
  6969. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  6970. /* Backend DAI Links */
  6971. {
  6972. .name = LPASS_BE_SLIMBUS_0_RX,
  6973. .stream_name = "Slimbus Playback",
  6974. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6975. .platform_name = "msm-pcm-routing",
  6976. .codec_name = "msm-stub-codec.1",
  6977. .codec_dai_name = "msm-stub-rx",
  6978. .no_pcm = 1,
  6979. .dpcm_playback = 1,
  6980. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6981. .init = &msm_audrx_stub_init,
  6982. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6983. .ignore_pmdown_time = 1, /* dai link has playback support */
  6984. .ignore_suspend = 1,
  6985. .ops = &msm_stub_be_ops,
  6986. },
  6987. {
  6988. .name = LPASS_BE_SLIMBUS_0_TX,
  6989. .stream_name = "Slimbus Capture",
  6990. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6991. .platform_name = "msm-pcm-routing",
  6992. .codec_name = "msm-stub-codec.1",
  6993. .codec_dai_name = "msm-stub-tx",
  6994. .no_pcm = 1,
  6995. .dpcm_capture = 1,
  6996. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6997. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6998. .ignore_suspend = 1,
  6999. .ops = &msm_stub_be_ops,
  7000. },
  7001. };
  7002. static struct snd_soc_dai_link msm_stub_dai_links[
  7003. ARRAY_SIZE(msm_stub_fe_dai_links) +
  7004. ARRAY_SIZE(msm_stub_be_dai_links)];
  7005. struct snd_soc_card snd_soc_card_stub_msm = {
  7006. .name = "sm6150-stub-snd-card",
  7007. };
  7008. static const struct of_device_id sm6150_asoc_machine_of_match[] = {
  7009. { .compatible = "qcom,sm6150-asoc-snd",
  7010. .data = "codec"},
  7011. { .compatible = "qcom,sm6150-asoc-snd-stub",
  7012. .data = "stub_codec"},
  7013. {},
  7014. };
  7015. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  7016. {
  7017. struct snd_soc_card *card = NULL;
  7018. struct snd_soc_dai_link *dailink;
  7019. int total_links = 0, rc = 0;
  7020. u32 tavil_codec = 0, auxpcm_audio_intf = 0;
  7021. u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
  7022. u32 wcn_btfm_intf = 0;
  7023. const struct of_device_id *match;
  7024. match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
  7025. if (!match) {
  7026. dev_err(dev, "%s: No DT match found for sound card\n",
  7027. __func__);
  7028. return NULL;
  7029. }
  7030. if (!strcmp(match->data, "codec")) {
  7031. card = &snd_soc_card_sm6150_msm;
  7032. memcpy(msm_sm6150_dai_links + total_links,
  7033. msm_common_dai_links,
  7034. sizeof(msm_common_dai_links));
  7035. total_links += ARRAY_SIZE(msm_common_dai_links);
  7036. memcpy(msm_sm6150_dai_links + total_links,
  7037. msm_common_misc_fe_dai_links,
  7038. sizeof(msm_common_misc_fe_dai_links));
  7039. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  7040. rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
  7041. &tavil_codec);
  7042. if (rc) {
  7043. dev_dbg(dev, "%s: No DT match for tavil codec\n",
  7044. __func__);
  7045. } else {
  7046. if (tavil_codec) {
  7047. card->late_probe =
  7048. msm_snd_card_tavil_late_probe;
  7049. memcpy(msm_sm6150_dai_links + total_links,
  7050. msm_tavil_fe_dai_links,
  7051. sizeof(msm_tavil_fe_dai_links));
  7052. total_links +=
  7053. ARRAY_SIZE(msm_tavil_fe_dai_links);
  7054. }
  7055. }
  7056. if (!tavil_codec) {
  7057. memcpy(msm_sm6150_dai_links + total_links,
  7058. msm_bolero_fe_dai_links,
  7059. sizeof(msm_bolero_fe_dai_links));
  7060. total_links +=
  7061. ARRAY_SIZE(msm_bolero_fe_dai_links);
  7062. }
  7063. memcpy(msm_sm6150_dai_links + total_links,
  7064. msm_common_be_dai_links,
  7065. sizeof(msm_common_be_dai_links));
  7066. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  7067. if (tavil_codec) {
  7068. memcpy(msm_sm6150_dai_links + total_links,
  7069. msm_tavil_be_dai_links,
  7070. sizeof(msm_tavil_be_dai_links));
  7071. total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
  7072. } else {
  7073. memcpy(msm_sm6150_dai_links + total_links,
  7074. msm_wsa_cdc_dma_be_dai_links,
  7075. sizeof(msm_wsa_cdc_dma_be_dai_links));
  7076. total_links +=
  7077. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  7078. memcpy(msm_sm6150_dai_links + total_links,
  7079. msm_rx_tx_cdc_dma_be_dai_links,
  7080. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  7081. total_links +=
  7082. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  7083. }
  7084. rc = of_property_read_u32(dev->of_node,
  7085. "qcom,ext-disp-audio-rx",
  7086. &ext_disp_audio_intf);
  7087. if (rc) {
  7088. dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
  7089. __func__);
  7090. } else {
  7091. if (ext_disp_audio_intf) {
  7092. memcpy(msm_sm6150_dai_links + total_links,
  7093. ext_disp_be_dai_link,
  7094. sizeof(ext_disp_be_dai_link));
  7095. total_links +=
  7096. ARRAY_SIZE(ext_disp_be_dai_link);
  7097. }
  7098. }
  7099. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  7100. &mi2s_audio_intf);
  7101. if (rc) {
  7102. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  7103. __func__);
  7104. } else {
  7105. if (mi2s_audio_intf) {
  7106. memcpy(msm_sm6150_dai_links + total_links,
  7107. msm_mi2s_be_dai_links,
  7108. sizeof(msm_mi2s_be_dai_links));
  7109. total_links +=
  7110. ARRAY_SIZE(msm_mi2s_be_dai_links);
  7111. }
  7112. }
  7113. rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
  7114. &wcn_btfm_intf);
  7115. if (rc) {
  7116. dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
  7117. __func__);
  7118. } else {
  7119. if (wcn_btfm_intf) {
  7120. memcpy(msm_sm6150_dai_links + total_links,
  7121. msm_wcn_be_dai_links,
  7122. sizeof(msm_wcn_be_dai_links));
  7123. total_links +=
  7124. ARRAY_SIZE(msm_wcn_be_dai_links);
  7125. }
  7126. }
  7127. rc = of_property_read_u32(dev->of_node,
  7128. "qcom,auxpcm-audio-intf",
  7129. &auxpcm_audio_intf);
  7130. if (rc) {
  7131. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  7132. __func__);
  7133. } else {
  7134. if (auxpcm_audio_intf) {
  7135. memcpy(msm_sm6150_dai_links + total_links,
  7136. msm_auxpcm_be_dai_links,
  7137. sizeof(msm_auxpcm_be_dai_links));
  7138. total_links +=
  7139. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  7140. }
  7141. }
  7142. dailink = msm_sm6150_dai_links;
  7143. } else if (!strcmp(match->data, "stub_codec")) {
  7144. card = &snd_soc_card_stub_msm;
  7145. memcpy(msm_stub_dai_links + total_links,
  7146. msm_stub_fe_dai_links,
  7147. sizeof(msm_stub_fe_dai_links));
  7148. total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
  7149. memcpy(msm_stub_dai_links + total_links,
  7150. msm_stub_be_dai_links,
  7151. sizeof(msm_stub_be_dai_links));
  7152. total_links += ARRAY_SIZE(msm_stub_be_dai_links);
  7153. dailink = msm_stub_dai_links;
  7154. }
  7155. if (card) {
  7156. card->dai_link = dailink;
  7157. card->num_links = total_links;
  7158. }
  7159. return card;
  7160. }
  7161. static int msm_wsa881x_init(struct snd_soc_component *component)
  7162. {
  7163. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7164. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7165. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  7166. SPKR_L_BOOST, SPKR_L_VI};
  7167. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  7168. SPKR_R_BOOST, SPKR_R_VI};
  7169. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  7170. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  7171. struct msm_asoc_mach_data *pdata;
  7172. struct snd_soc_dapm_context *dapm;
  7173. struct snd_card *card = component->card->snd_card;
  7174. struct snd_info_entry *entry;
  7175. int ret = 0;
  7176. if (!component) {
  7177. pr_err("%s codec is NULL\n", __func__);
  7178. return -EINVAL;
  7179. }
  7180. dapm = snd_soc_component_get_dapm(component);
  7181. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  7182. dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
  7183. __func__, component->name);
  7184. wsa881x_set_channel_map(component, &spkleft_ports[0],
  7185. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7186. &ch_rate[0], &spkleft_port_types[0]);
  7187. if (dapm->component) {
  7188. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  7189. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  7190. }
  7191. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  7192. dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
  7193. __func__, component->name);
  7194. wsa881x_set_channel_map(component, &spkright_ports[0],
  7195. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7196. &ch_rate[0], &spkright_port_types[0]);
  7197. if (dapm->component) {
  7198. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  7199. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  7200. }
  7201. } else {
  7202. dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
  7203. component->name);
  7204. ret = -EINVAL;
  7205. goto err;
  7206. }
  7207. pdata = snd_soc_card_get_drvdata(component->card);
  7208. if (!pdata->codec_root) {
  7209. entry = snd_info_create_subdir(card->module, "codecs",
  7210. card->proc_root);
  7211. if (!entry) {
  7212. pr_err("%s: Cannot create codecs module entry\n",
  7213. __func__);
  7214. ret = 0;
  7215. goto err;
  7216. }
  7217. pdata->codec_root = entry;
  7218. }
  7219. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  7220. component);
  7221. err:
  7222. return ret;
  7223. }
  7224. static int msm_aux_codec_init(struct snd_soc_component *component)
  7225. {
  7226. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  7227. int ret = 0;
  7228. void *mbhc_calibration;
  7229. struct snd_info_entry *entry;
  7230. struct snd_card *card = component->card->snd_card;
  7231. struct msm_asoc_mach_data *pdata;
  7232. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  7233. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  7234. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  7235. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  7236. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  7237. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  7238. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  7239. snd_soc_dapm_sync(dapm);
  7240. pdata = snd_soc_card_get_drvdata(component->card);
  7241. if (!pdata->codec_root) {
  7242. entry = snd_info_create_subdir(card->module, "codecs",
  7243. card->proc_root);
  7244. if (!entry) {
  7245. pr_err("%s: Cannot create codecs module entry\n",
  7246. __func__);
  7247. ret = 0;
  7248. goto codec_root_err;
  7249. }
  7250. pdata->codec_root = entry;
  7251. }
  7252. wcd937x_info_create_codec_entry(pdata->codec_root, component);
  7253. codec_root_err:
  7254. mbhc_calibration = def_wcd_mbhc_cal();
  7255. if (!mbhc_calibration) {
  7256. return -ENOMEM;
  7257. }
  7258. wcd_mbhc_cfg.calibration = mbhc_calibration;
  7259. ret = wcd937x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
  7260. return ret;
  7261. }
  7262. static int msm_init_aux_dev(struct platform_device *pdev,
  7263. struct snd_soc_card *card)
  7264. {
  7265. struct device_node *wsa_of_node;
  7266. struct device_node *aux_codec_of_node;
  7267. u32 wsa_max_devs;
  7268. u32 wsa_dev_cnt;
  7269. u32 codec_max_aux_devs = 0;
  7270. u32 codec_aux_dev_cnt = 0;
  7271. int i;
  7272. struct msm_wsa881x_dev_info *wsa881x_dev_info = NULL;
  7273. struct aux_codec_dev_info *aux_cdc_dev_info = NULL;
  7274. const char *auxdev_name_prefix[1];
  7275. char *dev_name_str = NULL;
  7276. int found = 0;
  7277. int codecs_found = 0;
  7278. int ret = 0;
  7279. /* Get maximum WSA device count for this platform */
  7280. ret = of_property_read_u32(pdev->dev.of_node,
  7281. "qcom,wsa-max-devs", &wsa_max_devs);
  7282. if (ret) {
  7283. dev_err(&pdev->dev,
  7284. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  7285. __func__, pdev->dev.of_node->full_name, ret);
  7286. wsa_max_devs = 0;
  7287. goto codec_aux_dev;
  7288. }
  7289. if (wsa_max_devs == 0) {
  7290. dev_dbg(&pdev->dev,
  7291. "%s: Max WSA devices is 0 for this target?\n",
  7292. __func__);
  7293. goto codec_aux_dev;
  7294. }
  7295. /* Get count of WSA device phandles for this platform */
  7296. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  7297. "qcom,wsa-devs", NULL);
  7298. if (wsa_dev_cnt == -ENOENT) {
  7299. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  7300. __func__);
  7301. goto err;
  7302. } else if (wsa_dev_cnt <= 0) {
  7303. dev_err(&pdev->dev,
  7304. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  7305. __func__, wsa_dev_cnt);
  7306. ret = -EINVAL;
  7307. goto err;
  7308. }
  7309. /*
  7310. * Expect total phandles count to be NOT less than maximum possible
  7311. * WSA count. However, if it is less, then assign same value to
  7312. * max count as well.
  7313. */
  7314. if (wsa_dev_cnt < wsa_max_devs) {
  7315. dev_dbg(&pdev->dev,
  7316. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  7317. __func__, wsa_max_devs, wsa_dev_cnt);
  7318. wsa_max_devs = wsa_dev_cnt;
  7319. }
  7320. /* Make sure prefix string passed for each WSA device */
  7321. ret = of_property_count_strings(pdev->dev.of_node,
  7322. "qcom,wsa-aux-dev-prefix");
  7323. if (ret != wsa_dev_cnt) {
  7324. dev_err(&pdev->dev,
  7325. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  7326. __func__, wsa_dev_cnt, ret);
  7327. ret = -EINVAL;
  7328. goto err;
  7329. }
  7330. /*
  7331. * Alloc mem to store phandle and index info of WSA device, if already
  7332. * registered with ALSA core
  7333. */
  7334. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  7335. sizeof(struct msm_wsa881x_dev_info),
  7336. GFP_KERNEL);
  7337. if (!wsa881x_dev_info) {
  7338. ret = -ENOMEM;
  7339. goto err;
  7340. }
  7341. /*
  7342. * search and check whether all WSA devices are already
  7343. * registered with ALSA core or not. If found a node, store
  7344. * the node and the index in a local array of struct for later
  7345. * use.
  7346. */
  7347. for (i = 0; i < wsa_dev_cnt; i++) {
  7348. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  7349. "qcom,wsa-devs", i);
  7350. if (unlikely(!wsa_of_node)) {
  7351. /* we should not be here */
  7352. dev_err(&pdev->dev,
  7353. "%s: wsa dev node is not present\n",
  7354. __func__);
  7355. ret = -EINVAL;
  7356. goto err;
  7357. }
  7358. if (soc_find_component_locked(wsa_of_node, NULL)) {
  7359. /* WSA device registered with ALSA core */
  7360. wsa881x_dev_info[found].of_node = wsa_of_node;
  7361. wsa881x_dev_info[found].index = i;
  7362. found++;
  7363. if (found == wsa_max_devs)
  7364. break;
  7365. }
  7366. }
  7367. if (found < wsa_max_devs) {
  7368. dev_dbg(&pdev->dev,
  7369. "%s: failed to find %d components. Found only %d\n",
  7370. __func__, wsa_max_devs, found);
  7371. return -EPROBE_DEFER;
  7372. }
  7373. dev_info(&pdev->dev,
  7374. "%s: found %d wsa881x devices registered with ALSA core\n",
  7375. __func__, found);
  7376. codec_aux_dev:
  7377. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7378. /* Get maximum aux codec device count for this platform */
  7379. ret = of_property_read_u32(pdev->dev.of_node,
  7380. "qcom,codec-max-aux-devs",
  7381. &codec_max_aux_devs);
  7382. if (ret) {
  7383. dev_err(&pdev->dev,
  7384. "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
  7385. __func__, pdev->dev.of_node->full_name, ret);
  7386. codec_max_aux_devs = 0;
  7387. goto aux_dev_register;
  7388. }
  7389. if (codec_max_aux_devs == 0) {
  7390. dev_dbg(&pdev->dev,
  7391. "%s: Max aux codec devices is 0 for this target?\n",
  7392. __func__);
  7393. goto aux_dev_register;
  7394. }
  7395. /* Get count of aux codec device phandles for this platform */
  7396. codec_aux_dev_cnt = of_count_phandle_with_args(
  7397. pdev->dev.of_node,
  7398. "qcom,codec-aux-devs", NULL);
  7399. if (codec_aux_dev_cnt == -ENOENT) {
  7400. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  7401. __func__);
  7402. goto err;
  7403. } else if (codec_aux_dev_cnt <= 0) {
  7404. dev_err(&pdev->dev,
  7405. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  7406. __func__, codec_aux_dev_cnt);
  7407. ret = -EINVAL;
  7408. goto err;
  7409. }
  7410. /*
  7411. * Expect total phandles count to be NOT less than maximum possible
  7412. * AUX device count. However, if it is less, then assign same value to
  7413. * max count as well.
  7414. */
  7415. if (codec_aux_dev_cnt < codec_max_aux_devs) {
  7416. dev_dbg(&pdev->dev,
  7417. "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
  7418. __func__, codec_max_aux_devs,
  7419. codec_aux_dev_cnt);
  7420. codec_max_aux_devs = codec_aux_dev_cnt;
  7421. }
  7422. /*
  7423. * Alloc mem to store phandle and index info of aux codec
  7424. * if already registered with ALSA core
  7425. */
  7426. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_max_aux_devs,
  7427. sizeof(struct aux_codec_dev_info),
  7428. GFP_KERNEL);
  7429. if (!aux_cdc_dev_info) {
  7430. ret = -ENOMEM;
  7431. goto err;
  7432. }
  7433. /*
  7434. * search and check whether all aux codecs are already
  7435. * registered with ALSA core or not. If found a node, store
  7436. * the node and the index in a local array of struct for later
  7437. * use.
  7438. */
  7439. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7440. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  7441. "qcom,codec-aux-devs", i);
  7442. if (unlikely(!aux_codec_of_node)) {
  7443. /* we should not be here */
  7444. dev_err(&pdev->dev,
  7445. "%s: aux codec dev node is not present\n",
  7446. __func__);
  7447. ret = -EINVAL;
  7448. goto err;
  7449. }
  7450. if (soc_find_component_locked(aux_codec_of_node, NULL)) {
  7451. /* AUX codec registered with ALSA core */
  7452. aux_cdc_dev_info[codecs_found].of_node =
  7453. aux_codec_of_node;
  7454. aux_cdc_dev_info[codecs_found].index = i;
  7455. codecs_found++;
  7456. }
  7457. }
  7458. if (codecs_found < codec_max_aux_devs) {
  7459. dev_dbg(&pdev->dev,
  7460. "%s: failed to find %d components. Found only %d\n",
  7461. __func__, codec_max_aux_devs, codecs_found);
  7462. return -EPROBE_DEFER;
  7463. }
  7464. dev_info(&pdev->dev,
  7465. "%s: found %d AUX codecs registered with ALSA core\n",
  7466. __func__, codecs_found);
  7467. }
  7468. aux_dev_register:
  7469. card->num_aux_devs = wsa_max_devs + codec_max_aux_devs;
  7470. card->num_configs = wsa_max_devs + codec_max_aux_devs;
  7471. /* Alloc array of AUX devs struct */
  7472. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  7473. sizeof(struct snd_soc_aux_dev),
  7474. GFP_KERNEL);
  7475. if (!msm_aux_dev) {
  7476. ret = -ENOMEM;
  7477. goto err;
  7478. }
  7479. /* Alloc array of codec conf struct */
  7480. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  7481. sizeof(struct snd_soc_codec_conf),
  7482. GFP_KERNEL);
  7483. if (!msm_codec_conf) {
  7484. ret = -ENOMEM;
  7485. goto err;
  7486. }
  7487. for (i = 0; i < wsa_max_devs; i++) {
  7488. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  7489. GFP_KERNEL);
  7490. if (!dev_name_str) {
  7491. ret = -ENOMEM;
  7492. goto err;
  7493. }
  7494. ret = of_property_read_string_index(pdev->dev.of_node,
  7495. "qcom,wsa-aux-dev-prefix",
  7496. wsa881x_dev_info[i].index,
  7497. auxdev_name_prefix);
  7498. if (ret) {
  7499. dev_err(&pdev->dev,
  7500. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  7501. __func__, ret);
  7502. ret = -EINVAL;
  7503. goto err;
  7504. }
  7505. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  7506. msm_aux_dev[i].name = dev_name_str;
  7507. msm_aux_dev[i].codec_name = NULL;
  7508. msm_aux_dev[i].codec_of_node =
  7509. wsa881x_dev_info[i].of_node;
  7510. msm_aux_dev[i].init = msm_wsa881x_init;
  7511. msm_codec_conf[i].dev_name = NULL;
  7512. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  7513. msm_codec_conf[i].of_node =
  7514. wsa881x_dev_info[i].of_node;
  7515. }
  7516. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7517. msm_aux_dev[wsa_max_devs + i].name = "aux_codec";
  7518. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  7519. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  7520. aux_cdc_dev_info[i].of_node;
  7521. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  7522. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  7523. msm_codec_conf[wsa_max_devs + i].name_prefix =
  7524. NULL;
  7525. msm_codec_conf[wsa_max_devs + i].of_node =
  7526. aux_cdc_dev_info[i].of_node;
  7527. }
  7528. card->codec_conf = msm_codec_conf;
  7529. card->aux_dev = msm_aux_dev;
  7530. err:
  7531. return ret;
  7532. }
  7533. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  7534. {
  7535. int count;
  7536. u32 mi2s_master_slave[MI2S_MAX];
  7537. u32 mi2s_ext_mclk[MI2S_MAX];
  7538. int ret;
  7539. for (count = 0; count < MI2S_MAX; count++) {
  7540. mutex_init(&mi2s_intf_conf[count].lock);
  7541. mi2s_intf_conf[count].ref_cnt = 0;
  7542. }
  7543. ret = of_property_read_u32_array(pdev->dev.of_node,
  7544. "qcom,msm-mi2s-master",
  7545. mi2s_master_slave, MI2S_MAX);
  7546. if (ret) {
  7547. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  7548. __func__);
  7549. } else {
  7550. for (count = 0; count < MI2S_MAX; count++) {
  7551. mi2s_intf_conf[count].msm_is_mi2s_master =
  7552. mi2s_master_slave[count];
  7553. }
  7554. }
  7555. ret = of_property_read_u32_array(pdev->dev.of_node,
  7556. "qcom,msm-mi2s-ext-mclk",
  7557. mi2s_ext_mclk, MI2S_MAX);
  7558. if (ret) {
  7559. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-ext-mclk in DT node\n",
  7560. __func__);
  7561. } else {
  7562. for (count = 0; count < MI2S_MAX; count++)
  7563. mi2s_intf_conf[count].msm_is_ext_mclk =
  7564. mi2s_ext_mclk[count];
  7565. }
  7566. }
  7567. static void msm_i2s_auxpcm_deinit(void)
  7568. {
  7569. int count;
  7570. for (count = 0; count < MI2S_MAX; count++) {
  7571. mutex_destroy(&mi2s_intf_conf[count].lock);
  7572. mi2s_intf_conf[count].ref_cnt = 0;
  7573. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  7574. mi2s_intf_conf[count].msm_is_ext_mclk = 0;
  7575. }
  7576. }
  7577. static int sm6150_ssr_enable(struct device *dev, void *data)
  7578. {
  7579. struct platform_device *pdev = to_platform_device(dev);
  7580. struct snd_soc_card *card = platform_get_drvdata(pdev);
  7581. struct msm_asoc_mach_data *pdata = NULL;
  7582. struct snd_soc_component *component = NULL;
  7583. int ret = 0;
  7584. if (!card) {
  7585. dev_err(dev, "%s: card is NULL\n", __func__);
  7586. ret = -EINVAL;
  7587. goto err;
  7588. }
  7589. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7590. pdata = snd_soc_card_get_drvdata(card);
  7591. if (!pdata->is_afe_config_done) {
  7592. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  7593. struct snd_soc_pcm_runtime *rtd;
  7594. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  7595. if (!rtd) {
  7596. dev_err(dev,
  7597. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  7598. __func__, be_dl_name);
  7599. ret = -EINVAL;
  7600. goto err;
  7601. }
  7602. component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
  7603. if (!component) {
  7604. dev_err(dev, "%s: component is NULL\n",
  7605. __func__);
  7606. ret = -EINVAL;
  7607. goto err;
  7608. }
  7609. ret = msm_afe_set_config(component);
  7610. if (ret)
  7611. dev_err(dev, "%s: Failed to set AFE config. err %d\n",
  7612. __func__, ret);
  7613. else
  7614. pdata->is_afe_config_done = true;
  7615. }
  7616. }
  7617. snd_soc_card_change_online_state(card, 1);
  7618. dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
  7619. err:
  7620. return ret;
  7621. }
  7622. static void sm6150_ssr_disable(struct device *dev, void *data)
  7623. {
  7624. struct platform_device *pdev = to_platform_device(dev);
  7625. struct snd_soc_card *card = platform_get_drvdata(pdev);
  7626. struct msm_asoc_mach_data *pdata;
  7627. if (!card) {
  7628. dev_err(dev, "%s: card is NULL\n", __func__);
  7629. return;
  7630. }
  7631. dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
  7632. snd_soc_card_change_online_state(card, 0);
  7633. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7634. pdata = snd_soc_card_get_drvdata(card);
  7635. msm_afe_clear_config();
  7636. pdata->is_afe_config_done = false;
  7637. }
  7638. }
  7639. static const struct snd_event_ops sm6150_ssr_ops = {
  7640. .enable = sm6150_ssr_enable,
  7641. .disable = sm6150_ssr_disable,
  7642. };
  7643. static int msm_audio_ssr_compare(struct device *dev, void *data)
  7644. {
  7645. struct device_node *node = data;
  7646. dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
  7647. __func__, dev->of_node, node);
  7648. return (dev->of_node && dev->of_node == node);
  7649. }
  7650. static int msm_audio_ssr_register(struct device *dev)
  7651. {
  7652. struct device_node *np = dev->of_node;
  7653. struct snd_event_clients *ssr_clients = NULL;
  7654. struct device_node *node;
  7655. int ret;
  7656. int i;
  7657. for (i = 0; ; i++) {
  7658. node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
  7659. if (!node)
  7660. break;
  7661. snd_event_mstr_add_client(&ssr_clients,
  7662. msm_audio_ssr_compare, node);
  7663. }
  7664. ret = snd_event_master_register(dev, &sm6150_ssr_ops,
  7665. ssr_clients, NULL);
  7666. if (!ret)
  7667. snd_event_notify(dev, SND_EVENT_UP);
  7668. return ret;
  7669. }
  7670. static int msm_asoc_machine_probe(struct platform_device *pdev)
  7671. {
  7672. struct snd_soc_card *card;
  7673. struct msm_asoc_mach_data *pdata;
  7674. const char *mbhc_audio_jack_type = NULL;
  7675. int ret;
  7676. if (!pdev->dev.of_node) {
  7677. dev_err(&pdev->dev, "No platform supplied from device tree\n");
  7678. return -EINVAL;
  7679. }
  7680. pdata = devm_kzalloc(&pdev->dev,
  7681. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  7682. if (!pdata)
  7683. return -ENOMEM;
  7684. card = populate_snd_card_dailinks(&pdev->dev);
  7685. if (!card) {
  7686. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  7687. ret = -EINVAL;
  7688. goto err;
  7689. }
  7690. card->dev = &pdev->dev;
  7691. platform_set_drvdata(pdev, card);
  7692. snd_soc_card_set_drvdata(card, pdata);
  7693. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  7694. if (ret) {
  7695. dev_err(&pdev->dev, "parse card name failed, err:%d\n",
  7696. ret);
  7697. goto err;
  7698. }
  7699. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  7700. if (ret) {
  7701. dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
  7702. ret);
  7703. goto err;
  7704. }
  7705. ret = msm_populate_dai_link_component_of_node(card);
  7706. if (ret) {
  7707. ret = -EPROBE_DEFER;
  7708. goto err;
  7709. }
  7710. ret = msm_init_aux_dev(pdev, card);
  7711. if (ret)
  7712. goto err;
  7713. ret = devm_snd_soc_register_card(&pdev->dev, card);
  7714. if (ret == -EPROBE_DEFER) {
  7715. if (codec_reg_done)
  7716. ret = -EINVAL;
  7717. goto err;
  7718. } else if (ret) {
  7719. dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
  7720. ret);
  7721. goto err;
  7722. }
  7723. dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
  7724. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7725. "qcom,hph-en1-gpio", 0);
  7726. if (!pdata->hph_en1_gpio_p) {
  7727. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7728. "qcom,hph-en1-gpio",
  7729. pdev->dev.of_node->full_name);
  7730. }
  7731. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7732. "qcom,hph-en0-gpio", 0);
  7733. if (!pdata->hph_en0_gpio_p) {
  7734. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7735. "qcom,hph-en0-gpio",
  7736. pdev->dev.of_node->full_name);
  7737. }
  7738. ret = of_property_read_string(pdev->dev.of_node,
  7739. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  7740. if (ret) {
  7741. dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
  7742. "qcom,mbhc-audio-jack-type",
  7743. pdev->dev.of_node->full_name);
  7744. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  7745. ret = 0;
  7746. } else {
  7747. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  7748. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7749. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  7750. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  7751. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7752. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  7753. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  7754. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7755. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  7756. } else {
  7757. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7758. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  7759. }
  7760. }
  7761. pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
  7762. "qcom,pri-mi2s-gpios", 0);
  7763. pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
  7764. "qcom,sec-mi2s-gpios", 0);
  7765. pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
  7766. "qcom,tert-mi2s-gpios", 0);
  7767. pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
  7768. "qcom,quat-mi2s-gpios", 0);
  7769. pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node,
  7770. "qcom,quin-mi2s-gpios", 0);
  7771. /*
  7772. * Parse US-Euro gpio info from DT. Report no error if us-euro
  7773. * entry is not found in DT file as some targets do not support
  7774. * US-Euro detection
  7775. */
  7776. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7777. "qcom,us-euro-gpios", 0);
  7778. if (!pdata->us_euro_gpio_p) {
  7779. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  7780. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  7781. } else {
  7782. dev_dbg(&pdev->dev, "%s detected\n",
  7783. "qcom,us-euro-gpios");
  7784. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  7785. }
  7786. if (wcd_mbhc_cfg.enable_usbc_analog) {
  7787. wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
  7788. pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
  7789. "fsa4480-i2c-handle", 0);
  7790. if (!pdata->fsa_handle)
  7791. dev_err(&pdev->dev,
  7792. "property %s not detected in node %s\n",
  7793. "fsa4480-i2c-handle",
  7794. pdev->dev.of_node->full_name);
  7795. }
  7796. msm_i2s_auxpcm_init(pdev);
  7797. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7798. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7799. "qcom,cdc-dmic01-gpios",
  7800. 0);
  7801. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7802. "qcom,cdc-dmic23-gpios",
  7803. 0);
  7804. }
  7805. ret = msm_audio_ssr_register(&pdev->dev);
  7806. if (ret)
  7807. pr_err("%s: Registration with SND event FWK failed ret = %d\n",
  7808. __func__, ret);
  7809. err:
  7810. return ret;
  7811. }
  7812. static int msm_asoc_machine_remove(struct platform_device *pdev)
  7813. {
  7814. snd_event_master_deregister(&pdev->dev);
  7815. msm_i2s_auxpcm_deinit();
  7816. return 0;
  7817. }
  7818. static struct platform_driver sm6150_asoc_machine_driver = {
  7819. .driver = {
  7820. .name = DRV_NAME,
  7821. .owner = THIS_MODULE,
  7822. .pm = &snd_soc_pm_ops,
  7823. .of_match_table = sm6150_asoc_machine_of_match,
  7824. },
  7825. .probe = msm_asoc_machine_probe,
  7826. .remove = msm_asoc_machine_remove,
  7827. };
  7828. module_platform_driver(sm6150_asoc_machine_driver);
  7829. MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
  7830. MODULE_LICENSE("GPL v2");
  7831. MODULE_ALIAS("platform:" DRV_NAME);
  7832. MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);