qmi.c 91 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/soc/qcom/qmi.h>
  8. #include "bus.h"
  9. #include "debug.h"
  10. #include "main.h"
  11. #include "qmi.h"
  12. #include "genl.h"
  13. #define WLFW_SERVICE_INS_ID_V01 1
  14. #define WLFW_CLIENT_ID 0x4b4e454c
  15. #define BDF_FILE_NAME_PREFIX "bdwlan"
  16. #define ELF_BDF_FILE_NAME "bdwlan.elf"
  17. #define ELF_BDF_FILE_NAME_GF "bdwlang.elf"
  18. #define ELF_BDF_FILE_NAME_PREFIX "bdwlan.e"
  19. #define ELF_BDF_FILE_NAME_GF_PREFIX "bdwlang.e"
  20. #define BIN_BDF_FILE_NAME "bdwlan.bin"
  21. #define BIN_BDF_FILE_NAME_GF "bdwlang.bin"
  22. #define BIN_BDF_FILE_NAME_PREFIX "bdwlan.b"
  23. #define BIN_BDF_FILE_NAME_GF_PREFIX "bdwlang.b"
  24. #define REGDB_FILE_NAME "regdb.bin"
  25. #define HDS_FILE_NAME "hds.bin"
  26. #define CHIP_ID_GF_MASK 0x10
  27. #define QDSS_TRACE_CONFIG_FILE "qdss_trace_config"
  28. #ifdef CONFIG_CNSS2_DEBUG
  29. #define QDSS_DEBUG_FILE_STR "debug_"
  30. #else
  31. #define QDSS_DEBUG_FILE_STR ""
  32. #endif
  33. #define HW_V1_NUMBER "v1"
  34. #define HW_V2_NUMBER "v2"
  35. #define QMI_WLFW_TIMEOUT_MS (plat_priv->ctrl_params.qmi_timeout)
  36. #define QMI_WLFW_TIMEOUT_JF msecs_to_jiffies(QMI_WLFW_TIMEOUT_MS)
  37. #define COEX_TIMEOUT QMI_WLFW_TIMEOUT_JF
  38. #define IMS_TIMEOUT QMI_WLFW_TIMEOUT_JF
  39. #define QMI_WLFW_MAX_RECV_BUF_SIZE SZ_8K
  40. #define IMSPRIVATE_SERVICE_MAX_MSG_LEN SZ_8K
  41. #define DMS_QMI_MAX_MSG_LEN SZ_256
  42. #define QMI_WLFW_MAC_READY_TIMEOUT_MS 50
  43. #define QMI_WLFW_MAC_READY_MAX_RETRY 200
  44. #ifdef CONFIG_CNSS2_DEBUG
  45. static bool ignore_qmi_failure;
  46. #define CNSS_QMI_ASSERT() CNSS_ASSERT(ignore_qmi_failure)
  47. void cnss_ignore_qmi_failure(bool ignore)
  48. {
  49. ignore_qmi_failure = ignore;
  50. }
  51. #else
  52. #define CNSS_QMI_ASSERT() do { } while (0)
  53. void cnss_ignore_qmi_failure(bool ignore) { }
  54. #endif
  55. static char *cnss_qmi_mode_to_str(enum cnss_driver_mode mode)
  56. {
  57. switch (mode) {
  58. case CNSS_MISSION:
  59. return "MISSION";
  60. case CNSS_FTM:
  61. return "FTM";
  62. case CNSS_EPPING:
  63. return "EPPING";
  64. case CNSS_WALTEST:
  65. return "WALTEST";
  66. case CNSS_OFF:
  67. return "OFF";
  68. case CNSS_CCPM:
  69. return "CCPM";
  70. case CNSS_QVIT:
  71. return "QVIT";
  72. case CNSS_CALIBRATION:
  73. return "CALIBRATION";
  74. default:
  75. return "UNKNOWN";
  76. }
  77. };
  78. static int cnss_wlfw_ind_register_send_sync(struct cnss_plat_data *plat_priv)
  79. {
  80. struct wlfw_ind_register_req_msg_v01 *req;
  81. struct wlfw_ind_register_resp_msg_v01 *resp;
  82. struct qmi_txn txn;
  83. int ret = 0;
  84. cnss_pr_dbg("Sending indication register message, state: 0x%lx\n",
  85. plat_priv->driver_state);
  86. req = kzalloc(sizeof(*req), GFP_KERNEL);
  87. if (!req)
  88. return -ENOMEM;
  89. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  90. if (!resp) {
  91. kfree(req);
  92. return -ENOMEM;
  93. }
  94. req->client_id_valid = 1;
  95. req->client_id = WLFW_CLIENT_ID;
  96. req->request_mem_enable_valid = 1;
  97. req->request_mem_enable = 1;
  98. req->fw_mem_ready_enable_valid = 1;
  99. req->fw_mem_ready_enable = 1;
  100. /* fw_ready indication is replaced by fw_init_done in HST/HSP */
  101. req->fw_init_done_enable_valid = 1;
  102. req->fw_init_done_enable = 1;
  103. req->pin_connect_result_enable_valid = 1;
  104. req->pin_connect_result_enable = 1;
  105. req->cal_done_enable_valid = 1;
  106. req->cal_done_enable = 1;
  107. req->qdss_trace_req_mem_enable_valid = 1;
  108. req->qdss_trace_req_mem_enable = 1;
  109. req->qdss_trace_save_enable_valid = 1;
  110. req->qdss_trace_save_enable = 1;
  111. req->qdss_trace_free_enable_valid = 1;
  112. req->qdss_trace_free_enable = 1;
  113. req->respond_get_info_enable_valid = 1;
  114. req->respond_get_info_enable = 1;
  115. req->wfc_call_twt_config_enable_valid = 1;
  116. req->wfc_call_twt_config_enable = 1;
  117. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  118. wlfw_ind_register_resp_msg_v01_ei, resp);
  119. if (ret < 0) {
  120. cnss_pr_err("Failed to initialize txn for indication register request, err: %d\n",
  121. ret);
  122. goto out;
  123. }
  124. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  125. QMI_WLFW_IND_REGISTER_REQ_V01,
  126. WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN,
  127. wlfw_ind_register_req_msg_v01_ei, req);
  128. if (ret < 0) {
  129. qmi_txn_cancel(&txn);
  130. cnss_pr_err("Failed to send indication register request, err: %d\n",
  131. ret);
  132. goto out;
  133. }
  134. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  135. if (ret < 0) {
  136. cnss_pr_err("Failed to wait for response of indication register request, err: %d\n",
  137. ret);
  138. goto out;
  139. }
  140. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  141. cnss_pr_err("Indication register request failed, result: %d, err: %d\n",
  142. resp->resp.result, resp->resp.error);
  143. ret = -resp->resp.result;
  144. goto out;
  145. }
  146. if (resp->fw_status_valid) {
  147. if (resp->fw_status & QMI_WLFW_ALREADY_REGISTERED_V01) {
  148. ret = -EALREADY;
  149. goto qmi_registered;
  150. }
  151. }
  152. kfree(req);
  153. kfree(resp);
  154. return 0;
  155. out:
  156. CNSS_QMI_ASSERT();
  157. qmi_registered:
  158. kfree(req);
  159. kfree(resp);
  160. return ret;
  161. }
  162. static void cnss_wlfw_host_cap_parse_mlo(struct cnss_plat_data *plat_priv,
  163. struct wlfw_host_cap_req_msg_v01 *req)
  164. {
  165. if (plat_priv->device_id == KIWI_DEVICE_ID) {
  166. req->mlo_capable_valid = 1;
  167. req->mlo_capable = 1;
  168. req->mlo_chip_id_valid = 1;
  169. req->mlo_chip_id = 0;
  170. req->mlo_group_id_valid = 1;
  171. req->mlo_group_id = 0;
  172. req->max_mlo_peer_valid = 1;
  173. /* Max peer number generally won't change for the same device
  174. * but needs to be synced with host driver.
  175. */
  176. req->max_mlo_peer = 32;
  177. req->mlo_num_chips_valid = 1;
  178. req->mlo_num_chips = 1;
  179. req->mlo_chip_info_valid = 1;
  180. req->mlo_chip_info[0].chip_id = 0;
  181. req->mlo_chip_info[0].num_local_links = 2;
  182. req->mlo_chip_info[0].hw_link_id[0] = 0;
  183. req->mlo_chip_info[0].hw_link_id[1] = 1;
  184. req->mlo_chip_info[0].valid_mlo_link_id[0] = 1;
  185. req->mlo_chip_info[0].valid_mlo_link_id[1] = 1;
  186. }
  187. }
  188. static int cnss_wlfw_host_cap_send_sync(struct cnss_plat_data *plat_priv)
  189. {
  190. struct wlfw_host_cap_req_msg_v01 *req;
  191. struct wlfw_host_cap_resp_msg_v01 *resp;
  192. struct qmi_txn txn;
  193. int ret = 0;
  194. u64 iova_start = 0, iova_size = 0,
  195. iova_ipa_start = 0, iova_ipa_size = 0;
  196. u64 feature_list = 0;
  197. cnss_pr_dbg("Sending host capability message, state: 0x%lx\n",
  198. plat_priv->driver_state);
  199. req = kzalloc(sizeof(*req), GFP_KERNEL);
  200. if (!req)
  201. return -ENOMEM;
  202. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  203. if (!resp) {
  204. kfree(req);
  205. return -ENOMEM;
  206. }
  207. req->num_clients_valid = 1;
  208. req->num_clients = 1;
  209. cnss_pr_dbg("Number of clients is %d\n", req->num_clients);
  210. req->wake_msi = cnss_bus_get_wake_irq(plat_priv);
  211. if (req->wake_msi) {
  212. cnss_pr_dbg("WAKE MSI base data is %d\n", req->wake_msi);
  213. req->wake_msi_valid = 1;
  214. }
  215. req->bdf_support_valid = 1;
  216. req->bdf_support = 1;
  217. req->m3_support_valid = 1;
  218. req->m3_support = 1;
  219. req->m3_cache_support_valid = 1;
  220. req->m3_cache_support = 1;
  221. req->cal_done_valid = 1;
  222. req->cal_done = plat_priv->cal_done;
  223. cnss_pr_dbg("Calibration done is %d\n", plat_priv->cal_done);
  224. if (!cnss_bus_get_iova(plat_priv, &iova_start, &iova_size) &&
  225. !cnss_bus_get_iova_ipa(plat_priv, &iova_ipa_start,
  226. &iova_ipa_size)) {
  227. req->ddr_range_valid = 1;
  228. req->ddr_range[0].start = iova_start;
  229. req->ddr_range[0].size = iova_size + iova_ipa_size;
  230. cnss_pr_dbg("Sending iova starting 0x%llx with size 0x%llx\n",
  231. req->ddr_range[0].start, req->ddr_range[0].size);
  232. }
  233. req->host_build_type_valid = 1;
  234. req->host_build_type = cnss_get_host_build_type();
  235. cnss_wlfw_host_cap_parse_mlo(plat_priv, req);
  236. ret = cnss_get_feature_list(plat_priv, &feature_list);
  237. if (!ret) {
  238. req->feature_list_valid = 1;
  239. req->feature_list = feature_list;
  240. cnss_pr_dbg("Sending feature list 0x%llx\n",
  241. req->feature_list);
  242. }
  243. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  244. wlfw_host_cap_resp_msg_v01_ei, resp);
  245. if (ret < 0) {
  246. cnss_pr_err("Failed to initialize txn for host capability request, err: %d\n",
  247. ret);
  248. goto out;
  249. }
  250. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  251. QMI_WLFW_HOST_CAP_REQ_V01,
  252. WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  253. wlfw_host_cap_req_msg_v01_ei, req);
  254. if (ret < 0) {
  255. qmi_txn_cancel(&txn);
  256. cnss_pr_err("Failed to send host capability request, err: %d\n",
  257. ret);
  258. goto out;
  259. }
  260. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  261. if (ret < 0) {
  262. cnss_pr_err("Failed to wait for response of host capability request, err: %d\n",
  263. ret);
  264. goto out;
  265. }
  266. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  267. cnss_pr_err("Host capability request failed, result: %d, err: %d\n",
  268. resp->resp.result, resp->resp.error);
  269. ret = -resp->resp.result;
  270. goto out;
  271. }
  272. kfree(req);
  273. kfree(resp);
  274. return 0;
  275. out:
  276. CNSS_QMI_ASSERT();
  277. kfree(req);
  278. kfree(resp);
  279. return ret;
  280. }
  281. int cnss_wlfw_respond_mem_send_sync(struct cnss_plat_data *plat_priv)
  282. {
  283. struct wlfw_respond_mem_req_msg_v01 *req;
  284. struct wlfw_respond_mem_resp_msg_v01 *resp;
  285. struct qmi_txn txn;
  286. struct cnss_fw_mem *fw_mem = plat_priv->fw_mem;
  287. int ret = 0, i;
  288. cnss_pr_dbg("Sending respond memory message, state: 0x%lx\n",
  289. plat_priv->driver_state);
  290. req = kzalloc(sizeof(*req), GFP_KERNEL);
  291. if (!req)
  292. return -ENOMEM;
  293. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  294. if (!resp) {
  295. kfree(req);
  296. return -ENOMEM;
  297. }
  298. req->mem_seg_len = plat_priv->fw_mem_seg_len;
  299. for (i = 0; i < req->mem_seg_len; i++) {
  300. if (!fw_mem[i].pa || !fw_mem[i].size) {
  301. if (fw_mem[i].type == 0) {
  302. cnss_pr_err("Invalid memory for FW type, segment = %d\n",
  303. i);
  304. ret = -EINVAL;
  305. goto out;
  306. }
  307. cnss_pr_err("Memory for FW is not available for type: %u\n",
  308. fw_mem[i].type);
  309. ret = -ENOMEM;
  310. goto out;
  311. }
  312. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  313. fw_mem[i].va, &fw_mem[i].pa,
  314. fw_mem[i].size, fw_mem[i].type);
  315. req->mem_seg[i].addr = fw_mem[i].pa;
  316. req->mem_seg[i].size = fw_mem[i].size;
  317. req->mem_seg[i].type = fw_mem[i].type;
  318. }
  319. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  320. wlfw_respond_mem_resp_msg_v01_ei, resp);
  321. if (ret < 0) {
  322. cnss_pr_err("Failed to initialize txn for respond memory request, err: %d\n",
  323. ret);
  324. goto out;
  325. }
  326. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  327. QMI_WLFW_RESPOND_MEM_REQ_V01,
  328. WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN,
  329. wlfw_respond_mem_req_msg_v01_ei, req);
  330. if (ret < 0) {
  331. qmi_txn_cancel(&txn);
  332. cnss_pr_err("Failed to send respond memory request, err: %d\n",
  333. ret);
  334. goto out;
  335. }
  336. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  337. if (ret < 0) {
  338. cnss_pr_err("Failed to wait for response of respond memory request, err: %d\n",
  339. ret);
  340. goto out;
  341. }
  342. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  343. cnss_pr_err("Respond memory request failed, result: %d, err: %d\n",
  344. resp->resp.result, resp->resp.error);
  345. ret = -resp->resp.result;
  346. goto out;
  347. }
  348. kfree(req);
  349. kfree(resp);
  350. return 0;
  351. out:
  352. CNSS_QMI_ASSERT();
  353. kfree(req);
  354. kfree(resp);
  355. return ret;
  356. }
  357. int cnss_wlfw_tgt_cap_send_sync(struct cnss_plat_data *plat_priv)
  358. {
  359. struct wlfw_cap_req_msg_v01 *req;
  360. struct wlfw_cap_resp_msg_v01 *resp;
  361. struct qmi_txn txn;
  362. char *fw_build_timestamp;
  363. int ret = 0, i;
  364. cnss_pr_dbg("Sending target capability message, state: 0x%lx\n",
  365. plat_priv->driver_state);
  366. req = kzalloc(sizeof(*req), GFP_KERNEL);
  367. if (!req)
  368. return -ENOMEM;
  369. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  370. if (!resp) {
  371. kfree(req);
  372. return -ENOMEM;
  373. }
  374. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  375. wlfw_cap_resp_msg_v01_ei, resp);
  376. if (ret < 0) {
  377. cnss_pr_err("Failed to initialize txn for target capability request, err: %d\n",
  378. ret);
  379. goto out;
  380. }
  381. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  382. QMI_WLFW_CAP_REQ_V01,
  383. WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  384. wlfw_cap_req_msg_v01_ei, req);
  385. if (ret < 0) {
  386. qmi_txn_cancel(&txn);
  387. cnss_pr_err("Failed to send respond target capability request, err: %d\n",
  388. ret);
  389. goto out;
  390. }
  391. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  392. if (ret < 0) {
  393. cnss_pr_err("Failed to wait for response of target capability request, err: %d\n",
  394. ret);
  395. goto out;
  396. }
  397. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  398. cnss_pr_err("Target capability request failed, result: %d, err: %d\n",
  399. resp->resp.result, resp->resp.error);
  400. ret = -resp->resp.result;
  401. goto out;
  402. }
  403. if (resp->chip_info_valid) {
  404. plat_priv->chip_info.chip_id = resp->chip_info.chip_id;
  405. plat_priv->chip_info.chip_family = resp->chip_info.chip_family;
  406. }
  407. if (resp->board_info_valid)
  408. plat_priv->board_info.board_id = resp->board_info.board_id;
  409. else
  410. plat_priv->board_info.board_id = 0xFF;
  411. if (resp->soc_info_valid)
  412. plat_priv->soc_info.soc_id = resp->soc_info.soc_id;
  413. if (resp->fw_version_info_valid) {
  414. plat_priv->fw_version_info.fw_version =
  415. resp->fw_version_info.fw_version;
  416. fw_build_timestamp = resp->fw_version_info.fw_build_timestamp;
  417. fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN] = '\0';
  418. strlcpy(plat_priv->fw_version_info.fw_build_timestamp,
  419. resp->fw_version_info.fw_build_timestamp,
  420. QMI_WLFW_MAX_TIMESTAMP_LEN + 1);
  421. }
  422. if (resp->fw_build_id_valid) {
  423. resp->fw_build_id[QMI_WLFW_MAX_BUILD_ID_LEN] = '\0';
  424. strlcpy(plat_priv->fw_build_id, resp->fw_build_id,
  425. QMI_WLFW_MAX_BUILD_ID_LEN + 1);
  426. }
  427. if (resp->voltage_mv_valid) {
  428. plat_priv->cpr_info.voltage = resp->voltage_mv;
  429. cnss_pr_dbg("Voltage for CPR: %dmV\n",
  430. plat_priv->cpr_info.voltage);
  431. cnss_update_cpr_info(plat_priv);
  432. }
  433. if (resp->time_freq_hz_valid) {
  434. plat_priv->device_freq_hz = resp->time_freq_hz;
  435. cnss_pr_dbg("Device frequency is %d HZ\n",
  436. plat_priv->device_freq_hz);
  437. }
  438. if (resp->otp_version_valid)
  439. plat_priv->otp_version = resp->otp_version;
  440. if (resp->dev_mem_info_valid) {
  441. for (i = 0; i < QMI_WLFW_MAX_DEV_MEM_NUM_V01; i++) {
  442. plat_priv->dev_mem_info[i].start =
  443. resp->dev_mem_info[i].start;
  444. plat_priv->dev_mem_info[i].size =
  445. resp->dev_mem_info[i].size;
  446. cnss_pr_buf("Device memory info[%d]: start = 0x%llx, size = 0x%llx\n",
  447. i, plat_priv->dev_mem_info[i].start,
  448. plat_priv->dev_mem_info[i].size);
  449. }
  450. }
  451. if (resp->fw_caps_valid)
  452. plat_priv->fw_pcie_gen_switch =
  453. !!(resp->fw_caps & QMI_WLFW_HOST_PCIE_GEN_SWITCH_V01);
  454. if (resp->hang_data_length_valid &&
  455. resp->hang_data_length &&
  456. resp->hang_data_length <= WLFW_MAX_HANG_EVENT_DATA_SIZE)
  457. plat_priv->hang_event_data_len = resp->hang_data_length;
  458. else
  459. plat_priv->hang_event_data_len = 0;
  460. if (resp->hang_data_addr_offset_valid)
  461. plat_priv->hang_data_addr_offset = resp->hang_data_addr_offset;
  462. else
  463. plat_priv->hang_data_addr_offset = 0;
  464. cnss_pr_dbg("Target capability: chip_id: 0x%x, chip_family: 0x%x, board_id: 0x%x, soc_id: 0x%x, otp_version: 0x%x\n",
  465. plat_priv->chip_info.chip_id,
  466. plat_priv->chip_info.chip_family,
  467. plat_priv->board_info.board_id, plat_priv->soc_info.soc_id,
  468. plat_priv->otp_version);
  469. cnss_pr_dbg("fw_version: 0x%x, fw_build_timestamp: %s, fw_build_id: %s\n",
  470. plat_priv->fw_version_info.fw_version,
  471. plat_priv->fw_version_info.fw_build_timestamp,
  472. plat_priv->fw_build_id);
  473. cnss_pr_dbg("Hang event params, Length: 0x%x, Offset Address: 0x%x\n",
  474. plat_priv->hang_event_data_len,
  475. plat_priv->hang_data_addr_offset);
  476. kfree(req);
  477. kfree(resp);
  478. return 0;
  479. out:
  480. CNSS_QMI_ASSERT();
  481. kfree(req);
  482. kfree(resp);
  483. return ret;
  484. }
  485. static int cnss_get_bdf_file_name(struct cnss_plat_data *plat_priv,
  486. u32 bdf_type, char *filename,
  487. u32 filename_len)
  488. {
  489. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  490. int ret = 0;
  491. switch (bdf_type) {
  492. case CNSS_BDF_ELF:
  493. /* Board ID will be equal or less than 0xFF in GF mask case */
  494. if (plat_priv->board_info.board_id == 0xFF) {
  495. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  496. snprintf(filename_tmp, filename_len,
  497. ELF_BDF_FILE_NAME_GF);
  498. else
  499. snprintf(filename_tmp, filename_len,
  500. ELF_BDF_FILE_NAME);
  501. } else if (plat_priv->board_info.board_id < 0xFF) {
  502. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  503. snprintf(filename_tmp, filename_len,
  504. ELF_BDF_FILE_NAME_GF_PREFIX "%02x",
  505. plat_priv->board_info.board_id);
  506. else
  507. snprintf(filename_tmp, filename_len,
  508. ELF_BDF_FILE_NAME_PREFIX "%02x",
  509. plat_priv->board_info.board_id);
  510. } else {
  511. snprintf(filename_tmp, filename_len,
  512. BDF_FILE_NAME_PREFIX "%02x.e%02x",
  513. plat_priv->board_info.board_id >> 8 & 0xFF,
  514. plat_priv->board_info.board_id & 0xFF);
  515. }
  516. break;
  517. case CNSS_BDF_BIN:
  518. if (plat_priv->board_info.board_id == 0xFF) {
  519. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  520. snprintf(filename_tmp, filename_len,
  521. BIN_BDF_FILE_NAME_GF);
  522. else
  523. snprintf(filename_tmp, filename_len,
  524. BIN_BDF_FILE_NAME);
  525. } else if (plat_priv->board_info.board_id < 0xFF) {
  526. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  527. snprintf(filename_tmp, filename_len,
  528. BIN_BDF_FILE_NAME_GF_PREFIX "%02x",
  529. plat_priv->board_info.board_id);
  530. else
  531. snprintf(filename_tmp, filename_len,
  532. BIN_BDF_FILE_NAME_PREFIX "%02x",
  533. plat_priv->board_info.board_id);
  534. } else {
  535. snprintf(filename_tmp, filename_len,
  536. BDF_FILE_NAME_PREFIX "%02x.b%02x",
  537. plat_priv->board_info.board_id >> 8 & 0xFF,
  538. plat_priv->board_info.board_id & 0xFF);
  539. }
  540. break;
  541. case CNSS_BDF_REGDB:
  542. snprintf(filename_tmp, filename_len, REGDB_FILE_NAME);
  543. break;
  544. case CNSS_BDF_HDS:
  545. snprintf(filename_tmp, filename_len, HDS_FILE_NAME);
  546. break;
  547. default:
  548. cnss_pr_err("Invalid BDF type: %d\n",
  549. plat_priv->ctrl_params.bdf_type);
  550. ret = -EINVAL;
  551. break;
  552. }
  553. if (!ret)
  554. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  555. return ret;
  556. }
  557. int cnss_wlfw_bdf_dnld_send_sync(struct cnss_plat_data *plat_priv,
  558. u32 bdf_type)
  559. {
  560. struct wlfw_bdf_download_req_msg_v01 *req;
  561. struct wlfw_bdf_download_resp_msg_v01 *resp;
  562. struct qmi_txn txn;
  563. char filename[MAX_FIRMWARE_NAME_LEN];
  564. const struct firmware *fw_entry = NULL;
  565. const u8 *temp;
  566. unsigned int remaining;
  567. int ret = 0;
  568. cnss_pr_dbg("Sending BDF download message, state: 0x%lx, type: %d\n",
  569. plat_priv->driver_state, bdf_type);
  570. req = kzalloc(sizeof(*req), GFP_KERNEL);
  571. if (!req)
  572. return -ENOMEM;
  573. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  574. if (!resp) {
  575. kfree(req);
  576. return -ENOMEM;
  577. }
  578. ret = cnss_get_bdf_file_name(plat_priv, bdf_type,
  579. filename, sizeof(filename));
  580. if (ret)
  581. goto err_req_fw;
  582. if (bdf_type == CNSS_BDF_REGDB)
  583. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  584. filename);
  585. else
  586. ret = firmware_request_nowarn(&fw_entry, filename,
  587. &plat_priv->plat_dev->dev);
  588. if (ret) {
  589. cnss_pr_err("Failed to load BDF: %s, ret: %d\n", filename, ret);
  590. goto err_req_fw;
  591. }
  592. temp = fw_entry->data;
  593. remaining = fw_entry->size;
  594. cnss_pr_dbg("Downloading BDF: %s, size: %u\n", filename, remaining);
  595. while (remaining) {
  596. req->valid = 1;
  597. req->file_id_valid = 1;
  598. req->file_id = plat_priv->board_info.board_id;
  599. req->total_size_valid = 1;
  600. req->total_size = remaining;
  601. req->seg_id_valid = 1;
  602. req->data_valid = 1;
  603. req->end_valid = 1;
  604. req->bdf_type_valid = 1;
  605. req->bdf_type = bdf_type;
  606. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  607. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  608. } else {
  609. req->data_len = remaining;
  610. req->end = 1;
  611. }
  612. memcpy(req->data, temp, req->data_len);
  613. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  614. wlfw_bdf_download_resp_msg_v01_ei, resp);
  615. if (ret < 0) {
  616. cnss_pr_err("Failed to initialize txn for BDF download request, err: %d\n",
  617. ret);
  618. goto err_send;
  619. }
  620. ret = qmi_send_request
  621. (&plat_priv->qmi_wlfw, NULL, &txn,
  622. QMI_WLFW_BDF_DOWNLOAD_REQ_V01,
  623. WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  624. wlfw_bdf_download_req_msg_v01_ei, req);
  625. if (ret < 0) {
  626. qmi_txn_cancel(&txn);
  627. cnss_pr_err("Failed to send respond BDF download request, err: %d\n",
  628. ret);
  629. goto err_send;
  630. }
  631. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  632. if (ret < 0) {
  633. cnss_pr_err("Failed to wait for response of BDF download request, err: %d\n",
  634. ret);
  635. goto err_send;
  636. }
  637. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  638. cnss_pr_err("BDF download request failed, result: %d, err: %d\n",
  639. resp->resp.result, resp->resp.error);
  640. ret = -resp->resp.result;
  641. goto err_send;
  642. }
  643. remaining -= req->data_len;
  644. temp += req->data_len;
  645. req->seg_id++;
  646. }
  647. release_firmware(fw_entry);
  648. if (resp->host_bdf_data_valid) {
  649. /* QCA6490 enable S3E regulator for IPA configuration only */
  650. if (!(resp->host_bdf_data & QMI_WLFW_HW_XPA_V01))
  651. cnss_enable_int_pow_amp_vreg(plat_priv);
  652. plat_priv->cbc_file_download =
  653. resp->host_bdf_data & QMI_WLFW_CBC_FILE_DOWNLOAD_V01;
  654. cnss_pr_info("Host BDF config: HW_XPA: %d CalDB: %d\n",
  655. resp->host_bdf_data & QMI_WLFW_HW_XPA_V01,
  656. plat_priv->cbc_file_download);
  657. }
  658. kfree(req);
  659. kfree(resp);
  660. return 0;
  661. err_send:
  662. release_firmware(fw_entry);
  663. err_req_fw:
  664. if (!(bdf_type == CNSS_BDF_REGDB ||
  665. test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state) ||
  666. ret == -EAGAIN))
  667. CNSS_QMI_ASSERT();
  668. kfree(req);
  669. kfree(resp);
  670. return ret;
  671. }
  672. int cnss_wlfw_m3_dnld_send_sync(struct cnss_plat_data *plat_priv)
  673. {
  674. struct wlfw_m3_info_req_msg_v01 *req;
  675. struct wlfw_m3_info_resp_msg_v01 *resp;
  676. struct qmi_txn txn;
  677. struct cnss_fw_mem *m3_mem = &plat_priv->m3_mem;
  678. int ret = 0;
  679. cnss_pr_dbg("Sending M3 information message, state: 0x%lx\n",
  680. plat_priv->driver_state);
  681. req = kzalloc(sizeof(*req), GFP_KERNEL);
  682. if (!req)
  683. return -ENOMEM;
  684. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  685. if (!resp) {
  686. kfree(req);
  687. return -ENOMEM;
  688. }
  689. if (!m3_mem->pa || !m3_mem->size) {
  690. cnss_pr_err("Memory for M3 is not available\n");
  691. ret = -ENOMEM;
  692. goto out;
  693. }
  694. cnss_pr_dbg("M3 memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  695. m3_mem->va, &m3_mem->pa, m3_mem->size);
  696. req->addr = plat_priv->m3_mem.pa;
  697. req->size = plat_priv->m3_mem.size;
  698. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  699. wlfw_m3_info_resp_msg_v01_ei, resp);
  700. if (ret < 0) {
  701. cnss_pr_err("Failed to initialize txn for M3 information request, err: %d\n",
  702. ret);
  703. goto out;
  704. }
  705. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  706. QMI_WLFW_M3_INFO_REQ_V01,
  707. WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  708. wlfw_m3_info_req_msg_v01_ei, req);
  709. if (ret < 0) {
  710. qmi_txn_cancel(&txn);
  711. cnss_pr_err("Failed to send M3 information request, err: %d\n",
  712. ret);
  713. goto out;
  714. }
  715. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  716. if (ret < 0) {
  717. cnss_pr_err("Failed to wait for response of M3 information request, err: %d\n",
  718. ret);
  719. goto out;
  720. }
  721. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  722. cnss_pr_err("M3 information request failed, result: %d, err: %d\n",
  723. resp->resp.result, resp->resp.error);
  724. ret = -resp->resp.result;
  725. goto out;
  726. }
  727. kfree(req);
  728. kfree(resp);
  729. return 0;
  730. out:
  731. CNSS_QMI_ASSERT();
  732. kfree(req);
  733. kfree(resp);
  734. return ret;
  735. }
  736. int cnss_wlfw_wlan_mac_req_send_sync(struct cnss_plat_data *plat_priv,
  737. u8 *mac, u32 mac_len)
  738. {
  739. struct wlfw_mac_addr_req_msg_v01 req;
  740. struct wlfw_mac_addr_resp_msg_v01 resp = {0};
  741. struct qmi_txn txn;
  742. int ret;
  743. if (!plat_priv || !mac || mac_len != QMI_WLFW_MAC_ADDR_SIZE_V01)
  744. return -EINVAL;
  745. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  746. wlfw_mac_addr_resp_msg_v01_ei, &resp);
  747. if (ret < 0) {
  748. cnss_pr_err("Failed to initialize txn for mac req, err: %d\n",
  749. ret);
  750. ret = -EIO;
  751. goto out;
  752. }
  753. cnss_pr_dbg("Sending WLAN mac req [%pM], state: 0x%lx\n",
  754. mac, plat_priv->driver_state);
  755. memcpy(req.mac_addr, mac, mac_len);
  756. req.mac_addr_valid = 1;
  757. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  758. QMI_WLFW_MAC_ADDR_REQ_V01,
  759. WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN,
  760. wlfw_mac_addr_req_msg_v01_ei, &req);
  761. if (ret < 0) {
  762. qmi_txn_cancel(&txn);
  763. cnss_pr_err("Failed to send mac req, err: %d\n", ret);
  764. ret = -EIO;
  765. goto out;
  766. }
  767. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  768. if (ret < 0) {
  769. cnss_pr_err("Failed to wait for resp of mac req, err: %d\n",
  770. ret);
  771. ret = -EIO;
  772. goto out;
  773. }
  774. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  775. cnss_pr_err("WLAN mac req failed, result: %d, err: %d\n",
  776. resp.resp.result);
  777. ret = -resp.resp.result;
  778. }
  779. out:
  780. return ret;
  781. }
  782. int cnss_wlfw_qdss_data_send_sync(struct cnss_plat_data *plat_priv, char *file_name,
  783. u32 total_size)
  784. {
  785. int ret = 0;
  786. struct wlfw_qdss_trace_data_req_msg_v01 *req;
  787. struct wlfw_qdss_trace_data_resp_msg_v01 *resp;
  788. unsigned char *p_qdss_trace_data_temp, *p_qdss_trace_data = NULL;
  789. unsigned int remaining;
  790. struct qmi_txn txn;
  791. cnss_pr_dbg("%s\n", __func__);
  792. req = kzalloc(sizeof(*req), GFP_KERNEL);
  793. if (!req)
  794. return -ENOMEM;
  795. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  796. if (!resp) {
  797. kfree(req);
  798. return -ENOMEM;
  799. }
  800. p_qdss_trace_data = kzalloc(total_size, GFP_KERNEL);
  801. if (!p_qdss_trace_data) {
  802. ret = ENOMEM;
  803. goto end;
  804. }
  805. remaining = total_size;
  806. p_qdss_trace_data_temp = p_qdss_trace_data;
  807. while (remaining && resp->end == 0) {
  808. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  809. wlfw_qdss_trace_data_resp_msg_v01_ei, resp);
  810. if (ret < 0) {
  811. cnss_pr_err("Fail to init txn for QDSS trace resp %d\n",
  812. ret);
  813. goto fail;
  814. }
  815. ret = qmi_send_request
  816. (&plat_priv->qmi_wlfw, NULL, &txn,
  817. QMI_WLFW_QDSS_TRACE_DATA_REQ_V01,
  818. WLFW_QDSS_TRACE_DATA_REQ_MSG_V01_MAX_MSG_LEN,
  819. wlfw_qdss_trace_data_req_msg_v01_ei, req);
  820. if (ret < 0) {
  821. qmi_txn_cancel(&txn);
  822. cnss_pr_err("Fail to send QDSS trace data req %d\n",
  823. ret);
  824. goto fail;
  825. }
  826. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  827. if (ret < 0) {
  828. cnss_pr_err("QDSS trace resp wait failed with rc %d\n",
  829. ret);
  830. goto fail;
  831. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  832. cnss_pr_err("QMI QDSS trace request rejected, result:%d error:%d\n",
  833. resp->resp.result, resp->resp.error);
  834. ret = -resp->resp.result;
  835. goto fail;
  836. } else {
  837. ret = 0;
  838. }
  839. cnss_pr_dbg("%s: response total size %d data len %d",
  840. __func__, resp->total_size, resp->data_len);
  841. if ((resp->total_size_valid == 1 &&
  842. resp->total_size == total_size) &&
  843. (resp->seg_id_valid == 1 && resp->seg_id == req->seg_id) &&
  844. (resp->data_valid == 1 &&
  845. resp->data_len <= QMI_WLFW_MAX_DATA_SIZE_V01)) {
  846. memcpy(p_qdss_trace_data_temp,
  847. resp->data, resp->data_len);
  848. } else {
  849. cnss_pr_err("%s: Unmatched qdss trace data, Expect total_size %u, seg_id %u, Recv total_size_valid %u, total_size %u, seg_id_valid %u, seg_id %u, data_len_valid %u, data_len %u",
  850. __func__,
  851. total_size, req->seg_id,
  852. resp->total_size_valid,
  853. resp->total_size,
  854. resp->seg_id_valid,
  855. resp->seg_id,
  856. resp->data_valid,
  857. resp->data_len);
  858. ret = -1;
  859. goto fail;
  860. }
  861. remaining -= resp->data_len;
  862. p_qdss_trace_data_temp += resp->data_len;
  863. req->seg_id++;
  864. }
  865. if (remaining == 0 && (resp->end_valid && resp->end)) {
  866. ret = cnss_genl_send_msg(p_qdss_trace_data,
  867. CNSS_GENL_MSG_TYPE_QDSS, file_name,
  868. total_size);
  869. if (ret < 0) {
  870. cnss_pr_err("Fail to save QDSS trace data: %d\n",
  871. ret);
  872. ret = -1;
  873. goto fail;
  874. }
  875. } else {
  876. cnss_pr_err("%s: QDSS trace file corrupted: remaining %u, end_valid %u, end %u",
  877. __func__,
  878. remaining, resp->end_valid, resp->end);
  879. ret = -1;
  880. goto fail;
  881. }
  882. fail:
  883. kfree(p_qdss_trace_data);
  884. end:
  885. kfree(req);
  886. kfree(resp);
  887. return ret;
  888. }
  889. void cnss_get_qdss_cfg_filename(struct cnss_plat_data *plat_priv,
  890. char *filename, u32 filename_len)
  891. {
  892. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  893. char *debug_str = QDSS_DEBUG_FILE_STR;
  894. if (plat_priv->device_id == KIWI_DEVICE_ID)
  895. debug_str = "";
  896. if (plat_priv->device_version.major_version == FW_V2_NUMBER)
  897. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  898. "_%s%s.cfg", debug_str, HW_V2_NUMBER);
  899. else
  900. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  901. "_%s%s.cfg", debug_str, HW_V1_NUMBER);
  902. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  903. }
  904. int cnss_wlfw_qdss_dnld_send_sync(struct cnss_plat_data *plat_priv)
  905. {
  906. struct wlfw_qdss_trace_config_download_req_msg_v01 *req;
  907. struct wlfw_qdss_trace_config_download_resp_msg_v01 *resp;
  908. struct qmi_txn txn;
  909. const struct firmware *fw_entry = NULL;
  910. const u8 *temp;
  911. char qdss_cfg_filename[MAX_FIRMWARE_NAME_LEN];
  912. unsigned int remaining;
  913. int ret = 0;
  914. cnss_pr_dbg("Sending QDSS config download message, state: 0x%lx\n",
  915. plat_priv->driver_state);
  916. req = kzalloc(sizeof(*req), GFP_KERNEL);
  917. if (!req)
  918. return -ENOMEM;
  919. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  920. if (!resp) {
  921. kfree(req);
  922. return -ENOMEM;
  923. }
  924. cnss_get_qdss_cfg_filename(plat_priv, qdss_cfg_filename, sizeof(qdss_cfg_filename));
  925. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  926. qdss_cfg_filename);
  927. if (ret) {
  928. cnss_pr_dbg("Unable to load %s\n",
  929. qdss_cfg_filename);
  930. goto err_req_fw;
  931. }
  932. temp = fw_entry->data;
  933. remaining = fw_entry->size;
  934. cnss_pr_dbg("Downloading QDSS: %s, size: %u\n",
  935. qdss_cfg_filename, remaining);
  936. while (remaining) {
  937. req->total_size_valid = 1;
  938. req->total_size = remaining;
  939. req->seg_id_valid = 1;
  940. req->data_valid = 1;
  941. req->end_valid = 1;
  942. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  943. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  944. } else {
  945. req->data_len = remaining;
  946. req->end = 1;
  947. }
  948. memcpy(req->data, temp, req->data_len);
  949. ret = qmi_txn_init
  950. (&plat_priv->qmi_wlfw, &txn,
  951. wlfw_qdss_trace_config_download_resp_msg_v01_ei,
  952. resp);
  953. if (ret < 0) {
  954. cnss_pr_err("Failed to initialize txn for QDSS download request, err: %d\n",
  955. ret);
  956. goto err_send;
  957. }
  958. ret = qmi_send_request
  959. (&plat_priv->qmi_wlfw, NULL, &txn,
  960. QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_V01,
  961. WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  962. wlfw_qdss_trace_config_download_req_msg_v01_ei, req);
  963. if (ret < 0) {
  964. qmi_txn_cancel(&txn);
  965. cnss_pr_err("Failed to send respond QDSS download request, err: %d\n",
  966. ret);
  967. goto err_send;
  968. }
  969. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  970. if (ret < 0) {
  971. cnss_pr_err("Failed to wait for response of QDSS download request, err: %d\n",
  972. ret);
  973. goto err_send;
  974. }
  975. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  976. cnss_pr_err("QDSS download request failed, result: %d, err: %d\n",
  977. resp->resp.result, resp->resp.error);
  978. ret = -resp->resp.result;
  979. goto err_send;
  980. }
  981. remaining -= req->data_len;
  982. temp += req->data_len;
  983. req->seg_id++;
  984. }
  985. release_firmware(fw_entry);
  986. kfree(req);
  987. kfree(resp);
  988. return 0;
  989. err_send:
  990. release_firmware(fw_entry);
  991. err_req_fw:
  992. kfree(req);
  993. kfree(resp);
  994. return ret;
  995. }
  996. static int wlfw_send_qdss_trace_mode_req
  997. (struct cnss_plat_data *plat_priv,
  998. enum wlfw_qdss_trace_mode_enum_v01 mode,
  999. unsigned long long option)
  1000. {
  1001. int rc = 0;
  1002. int tmp = 0;
  1003. struct wlfw_qdss_trace_mode_req_msg_v01 *req;
  1004. struct wlfw_qdss_trace_mode_resp_msg_v01 *resp;
  1005. struct qmi_txn txn;
  1006. if (!plat_priv)
  1007. return -ENODEV;
  1008. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1009. if (!req)
  1010. return -ENOMEM;
  1011. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1012. if (!resp) {
  1013. kfree(req);
  1014. return -ENOMEM;
  1015. }
  1016. req->mode_valid = 1;
  1017. req->mode = mode;
  1018. req->option_valid = 1;
  1019. req->option = option;
  1020. tmp = plat_priv->hw_trc_override;
  1021. req->hw_trc_disable_override_valid = 1;
  1022. req->hw_trc_disable_override =
  1023. (tmp > QMI_PARAM_DISABLE_V01 ? QMI_PARAM_DISABLE_V01 :
  1024. (tmp < 0 ? QMI_PARAM_INVALID_V01 : tmp));
  1025. cnss_pr_dbg("%s: mode %u, option %llu, hw_trc_disable_override: %u",
  1026. __func__, mode, option, req->hw_trc_disable_override);
  1027. rc = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1028. wlfw_qdss_trace_mode_resp_msg_v01_ei, resp);
  1029. if (rc < 0) {
  1030. cnss_pr_err("Fail to init txn for QDSS Mode resp %d\n",
  1031. rc);
  1032. goto out;
  1033. }
  1034. rc = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1035. QMI_WLFW_QDSS_TRACE_MODE_REQ_V01,
  1036. WLFW_QDSS_TRACE_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1037. wlfw_qdss_trace_mode_req_msg_v01_ei, req);
  1038. if (rc < 0) {
  1039. qmi_txn_cancel(&txn);
  1040. cnss_pr_err("Fail to send QDSS Mode req %d\n", rc);
  1041. goto out;
  1042. }
  1043. rc = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1044. if (rc < 0) {
  1045. cnss_pr_err("QDSS Mode resp wait failed with rc %d\n",
  1046. rc);
  1047. goto out;
  1048. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1049. cnss_pr_err("QMI QDSS Mode request rejected, result:%d error:%d\n",
  1050. resp->resp.result, resp->resp.error);
  1051. rc = -resp->resp.result;
  1052. goto out;
  1053. }
  1054. kfree(resp);
  1055. kfree(req);
  1056. return rc;
  1057. out:
  1058. kfree(resp);
  1059. kfree(req);
  1060. CNSS_QMI_ASSERT();
  1061. return rc;
  1062. }
  1063. int wlfw_qdss_trace_start(struct cnss_plat_data *plat_priv)
  1064. {
  1065. return wlfw_send_qdss_trace_mode_req(plat_priv,
  1066. QMI_WLFW_QDSS_TRACE_ON_V01, 0);
  1067. }
  1068. int wlfw_qdss_trace_stop(struct cnss_plat_data *plat_priv, unsigned long long option)
  1069. {
  1070. return wlfw_send_qdss_trace_mode_req(plat_priv, QMI_WLFW_QDSS_TRACE_OFF_V01,
  1071. option);
  1072. }
  1073. int cnss_wlfw_wlan_mode_send_sync(struct cnss_plat_data *plat_priv,
  1074. enum cnss_driver_mode mode)
  1075. {
  1076. struct wlfw_wlan_mode_req_msg_v01 *req;
  1077. struct wlfw_wlan_mode_resp_msg_v01 *resp;
  1078. struct qmi_txn txn;
  1079. int ret = 0;
  1080. if (!plat_priv)
  1081. return -ENODEV;
  1082. cnss_pr_dbg("Sending mode message, mode: %s(%d), state: 0x%lx\n",
  1083. cnss_qmi_mode_to_str(mode), mode, plat_priv->driver_state);
  1084. if (mode == CNSS_OFF &&
  1085. test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1086. cnss_pr_dbg("Recovery is in progress, ignore mode off request\n");
  1087. return 0;
  1088. }
  1089. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1090. if (!req)
  1091. return -ENOMEM;
  1092. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1093. if (!resp) {
  1094. kfree(req);
  1095. return -ENOMEM;
  1096. }
  1097. req->mode = (enum wlfw_driver_mode_enum_v01)mode;
  1098. req->hw_debug_valid = 1;
  1099. req->hw_debug = 0;
  1100. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1101. wlfw_wlan_mode_resp_msg_v01_ei, resp);
  1102. if (ret < 0) {
  1103. cnss_pr_err("Failed to initialize txn for mode request, mode: %s(%d), err: %d\n",
  1104. cnss_qmi_mode_to_str(mode), mode, ret);
  1105. goto out;
  1106. }
  1107. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1108. QMI_WLFW_WLAN_MODE_REQ_V01,
  1109. WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1110. wlfw_wlan_mode_req_msg_v01_ei, req);
  1111. if (ret < 0) {
  1112. qmi_txn_cancel(&txn);
  1113. cnss_pr_err("Failed to send mode request, mode: %s(%d), err: %d\n",
  1114. cnss_qmi_mode_to_str(mode), mode, ret);
  1115. goto out;
  1116. }
  1117. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1118. if (ret < 0) {
  1119. cnss_pr_err("Failed to wait for response of mode request, mode: %s(%d), err: %d\n",
  1120. cnss_qmi_mode_to_str(mode), mode, ret);
  1121. goto out;
  1122. }
  1123. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1124. cnss_pr_err("Mode request failed, mode: %s(%d), result: %d, err: %d\n",
  1125. cnss_qmi_mode_to_str(mode), mode, resp->resp.result,
  1126. resp->resp.error);
  1127. ret = -resp->resp.result;
  1128. goto out;
  1129. }
  1130. kfree(req);
  1131. kfree(resp);
  1132. return 0;
  1133. out:
  1134. if (mode == CNSS_OFF) {
  1135. cnss_pr_dbg("WLFW service is disconnected while sending mode off request\n");
  1136. ret = 0;
  1137. } else {
  1138. CNSS_QMI_ASSERT();
  1139. }
  1140. kfree(req);
  1141. kfree(resp);
  1142. return ret;
  1143. }
  1144. int cnss_wlfw_wlan_cfg_send_sync(struct cnss_plat_data *plat_priv,
  1145. struct cnss_wlan_enable_cfg *config,
  1146. const char *host_version)
  1147. {
  1148. struct wlfw_wlan_cfg_req_msg_v01 *req;
  1149. struct wlfw_wlan_cfg_resp_msg_v01 *resp;
  1150. struct qmi_txn txn;
  1151. u32 i;
  1152. int ret = 0;
  1153. if (!plat_priv)
  1154. return -ENODEV;
  1155. cnss_pr_dbg("Sending WLAN config message, state: 0x%lx\n",
  1156. plat_priv->driver_state);
  1157. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1158. if (!req)
  1159. return -ENOMEM;
  1160. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1161. if (!resp) {
  1162. kfree(req);
  1163. return -ENOMEM;
  1164. }
  1165. req->host_version_valid = 1;
  1166. strlcpy(req->host_version, host_version,
  1167. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  1168. req->tgt_cfg_valid = 1;
  1169. if (config->num_ce_tgt_cfg > QMI_WLFW_MAX_NUM_CE_V01)
  1170. req->tgt_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1171. else
  1172. req->tgt_cfg_len = config->num_ce_tgt_cfg;
  1173. for (i = 0; i < req->tgt_cfg_len; i++) {
  1174. req->tgt_cfg[i].pipe_num = config->ce_tgt_cfg[i].pipe_num;
  1175. req->tgt_cfg[i].pipe_dir = config->ce_tgt_cfg[i].pipe_dir;
  1176. req->tgt_cfg[i].nentries = config->ce_tgt_cfg[i].nentries;
  1177. req->tgt_cfg[i].nbytes_max = config->ce_tgt_cfg[i].nbytes_max;
  1178. req->tgt_cfg[i].flags = config->ce_tgt_cfg[i].flags;
  1179. }
  1180. req->svc_cfg_valid = 1;
  1181. if (config->num_ce_svc_pipe_cfg > QMI_WLFW_MAX_NUM_SVC_V01)
  1182. req->svc_cfg_len = QMI_WLFW_MAX_NUM_SVC_V01;
  1183. else
  1184. req->svc_cfg_len = config->num_ce_svc_pipe_cfg;
  1185. for (i = 0; i < req->svc_cfg_len; i++) {
  1186. req->svc_cfg[i].service_id = config->ce_svc_cfg[i].service_id;
  1187. req->svc_cfg[i].pipe_dir = config->ce_svc_cfg[i].pipe_dir;
  1188. req->svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num;
  1189. }
  1190. req->shadow_reg_v2_valid = 1;
  1191. if (config->num_shadow_reg_v2_cfg >
  1192. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01)
  1193. req->shadow_reg_v2_len = QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01;
  1194. else
  1195. req->shadow_reg_v2_len = config->num_shadow_reg_v2_cfg;
  1196. memcpy(req->shadow_reg_v2, config->shadow_reg_v2_cfg,
  1197. sizeof(struct wlfw_shadow_reg_v2_cfg_s_v01)
  1198. * req->shadow_reg_v2_len);
  1199. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1200. wlfw_wlan_cfg_resp_msg_v01_ei, resp);
  1201. if (ret < 0) {
  1202. cnss_pr_err("Failed to initialize txn for WLAN config request, err: %d\n",
  1203. ret);
  1204. goto out;
  1205. }
  1206. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1207. QMI_WLFW_WLAN_CFG_REQ_V01,
  1208. WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN,
  1209. wlfw_wlan_cfg_req_msg_v01_ei, req);
  1210. if (ret < 0) {
  1211. qmi_txn_cancel(&txn);
  1212. cnss_pr_err("Failed to send WLAN config request, err: %d\n",
  1213. ret);
  1214. goto out;
  1215. }
  1216. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1217. if (ret < 0) {
  1218. cnss_pr_err("Failed to wait for response of WLAN config request, err: %d\n",
  1219. ret);
  1220. goto out;
  1221. }
  1222. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1223. cnss_pr_err("WLAN config request failed, result: %d, err: %d\n",
  1224. resp->resp.result, resp->resp.error);
  1225. ret = -resp->resp.result;
  1226. goto out;
  1227. }
  1228. kfree(req);
  1229. kfree(resp);
  1230. return 0;
  1231. out:
  1232. CNSS_QMI_ASSERT();
  1233. kfree(req);
  1234. kfree(resp);
  1235. return ret;
  1236. }
  1237. int cnss_wlfw_athdiag_read_send_sync(struct cnss_plat_data *plat_priv,
  1238. u32 offset, u32 mem_type,
  1239. u32 data_len, u8 *data)
  1240. {
  1241. struct wlfw_athdiag_read_req_msg_v01 *req;
  1242. struct wlfw_athdiag_read_resp_msg_v01 *resp;
  1243. struct qmi_txn txn;
  1244. int ret = 0;
  1245. if (!plat_priv)
  1246. return -ENODEV;
  1247. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1248. cnss_pr_err("Invalid parameters for athdiag read: data %pK, data_len %u\n",
  1249. data, data_len);
  1250. return -EINVAL;
  1251. }
  1252. cnss_pr_dbg("athdiag read: state 0x%lx, offset %x, mem_type %x, data_len %u\n",
  1253. plat_priv->driver_state, offset, mem_type, data_len);
  1254. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1255. if (!req)
  1256. return -ENOMEM;
  1257. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1258. if (!resp) {
  1259. kfree(req);
  1260. return -ENOMEM;
  1261. }
  1262. req->offset = offset;
  1263. req->mem_type = mem_type;
  1264. req->data_len = data_len;
  1265. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1266. wlfw_athdiag_read_resp_msg_v01_ei, resp);
  1267. if (ret < 0) {
  1268. cnss_pr_err("Failed to initialize txn for athdiag read request, err: %d\n",
  1269. ret);
  1270. goto out;
  1271. }
  1272. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1273. QMI_WLFW_ATHDIAG_READ_REQ_V01,
  1274. WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN,
  1275. wlfw_athdiag_read_req_msg_v01_ei, req);
  1276. if (ret < 0) {
  1277. qmi_txn_cancel(&txn);
  1278. cnss_pr_err("Failed to send athdiag read request, err: %d\n",
  1279. ret);
  1280. goto out;
  1281. }
  1282. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1283. if (ret < 0) {
  1284. cnss_pr_err("Failed to wait for response of athdiag read request, err: %d\n",
  1285. ret);
  1286. goto out;
  1287. }
  1288. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1289. cnss_pr_err("Athdiag read request failed, result: %d, err: %d\n",
  1290. resp->resp.result, resp->resp.error);
  1291. ret = -resp->resp.result;
  1292. goto out;
  1293. }
  1294. if (!resp->data_valid || resp->data_len != data_len) {
  1295. cnss_pr_err("athdiag read data is invalid, data_valid = %u, data_len = %u\n",
  1296. resp->data_valid, resp->data_len);
  1297. ret = -EINVAL;
  1298. goto out;
  1299. }
  1300. memcpy(data, resp->data, resp->data_len);
  1301. kfree(req);
  1302. kfree(resp);
  1303. return 0;
  1304. out:
  1305. kfree(req);
  1306. kfree(resp);
  1307. return ret;
  1308. }
  1309. int cnss_wlfw_athdiag_write_send_sync(struct cnss_plat_data *plat_priv,
  1310. u32 offset, u32 mem_type,
  1311. u32 data_len, u8 *data)
  1312. {
  1313. struct wlfw_athdiag_write_req_msg_v01 *req;
  1314. struct wlfw_athdiag_write_resp_msg_v01 *resp;
  1315. struct qmi_txn txn;
  1316. int ret = 0;
  1317. if (!plat_priv)
  1318. return -ENODEV;
  1319. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1320. cnss_pr_err("Invalid parameters for athdiag write: data %pK, data_len %u\n",
  1321. data, data_len);
  1322. return -EINVAL;
  1323. }
  1324. cnss_pr_dbg("athdiag write: state 0x%lx, offset %x, mem_type %x, data_len %u, data %pK\n",
  1325. plat_priv->driver_state, offset, mem_type, data_len, data);
  1326. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1327. if (!req)
  1328. return -ENOMEM;
  1329. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1330. if (!resp) {
  1331. kfree(req);
  1332. return -ENOMEM;
  1333. }
  1334. req->offset = offset;
  1335. req->mem_type = mem_type;
  1336. req->data_len = data_len;
  1337. memcpy(req->data, data, data_len);
  1338. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1339. wlfw_athdiag_write_resp_msg_v01_ei, resp);
  1340. if (ret < 0) {
  1341. cnss_pr_err("Failed to initialize txn for athdiag write request, err: %d\n",
  1342. ret);
  1343. goto out;
  1344. }
  1345. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1346. QMI_WLFW_ATHDIAG_WRITE_REQ_V01,
  1347. WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN,
  1348. wlfw_athdiag_write_req_msg_v01_ei, req);
  1349. if (ret < 0) {
  1350. qmi_txn_cancel(&txn);
  1351. cnss_pr_err("Failed to send athdiag write request, err: %d\n",
  1352. ret);
  1353. goto out;
  1354. }
  1355. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1356. if (ret < 0) {
  1357. cnss_pr_err("Failed to wait for response of athdiag write request, err: %d\n",
  1358. ret);
  1359. goto out;
  1360. }
  1361. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1362. cnss_pr_err("Athdiag write request failed, result: %d, err: %d\n",
  1363. resp->resp.result, resp->resp.error);
  1364. ret = -resp->resp.result;
  1365. goto out;
  1366. }
  1367. kfree(req);
  1368. kfree(resp);
  1369. return 0;
  1370. out:
  1371. kfree(req);
  1372. kfree(resp);
  1373. return ret;
  1374. }
  1375. int cnss_wlfw_ini_send_sync(struct cnss_plat_data *plat_priv,
  1376. u8 fw_log_mode)
  1377. {
  1378. struct wlfw_ini_req_msg_v01 *req;
  1379. struct wlfw_ini_resp_msg_v01 *resp;
  1380. struct qmi_txn txn;
  1381. int ret = 0;
  1382. if (!plat_priv)
  1383. return -ENODEV;
  1384. cnss_pr_dbg("Sending ini sync request, state: 0x%lx, fw_log_mode: %d\n",
  1385. plat_priv->driver_state, fw_log_mode);
  1386. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1387. if (!req)
  1388. return -ENOMEM;
  1389. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1390. if (!resp) {
  1391. kfree(req);
  1392. return -ENOMEM;
  1393. }
  1394. req->enablefwlog_valid = 1;
  1395. req->enablefwlog = fw_log_mode;
  1396. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1397. wlfw_ini_resp_msg_v01_ei, resp);
  1398. if (ret < 0) {
  1399. cnss_pr_err("Failed to initialize txn for ini request, fw_log_mode: %d, err: %d\n",
  1400. fw_log_mode, ret);
  1401. goto out;
  1402. }
  1403. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1404. QMI_WLFW_INI_REQ_V01,
  1405. WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN,
  1406. wlfw_ini_req_msg_v01_ei, req);
  1407. if (ret < 0) {
  1408. qmi_txn_cancel(&txn);
  1409. cnss_pr_err("Failed to send ini request, fw_log_mode: %d, err: %d\n",
  1410. fw_log_mode, ret);
  1411. goto out;
  1412. }
  1413. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1414. if (ret < 0) {
  1415. cnss_pr_err("Failed to wait for response of ini request, fw_log_mode: %d, err: %d\n",
  1416. fw_log_mode, ret);
  1417. goto out;
  1418. }
  1419. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1420. cnss_pr_err("Ini request failed, fw_log_mode: %d, result: %d, err: %d\n",
  1421. fw_log_mode, resp->resp.result, resp->resp.error);
  1422. ret = -resp->resp.result;
  1423. goto out;
  1424. }
  1425. kfree(req);
  1426. kfree(resp);
  1427. return 0;
  1428. out:
  1429. kfree(req);
  1430. kfree(resp);
  1431. return ret;
  1432. }
  1433. int cnss_wlfw_send_pcie_gen_speed_sync(struct cnss_plat_data *plat_priv)
  1434. {
  1435. struct wlfw_pcie_gen_switch_req_msg_v01 req;
  1436. struct wlfw_pcie_gen_switch_resp_msg_v01 resp = {0};
  1437. struct qmi_txn txn;
  1438. int ret = 0;
  1439. if (!plat_priv)
  1440. return -ENODEV;
  1441. if (plat_priv->pcie_gen_speed == QMI_PCIE_GEN_SPEED_INVALID_V01 ||
  1442. !plat_priv->fw_pcie_gen_switch) {
  1443. cnss_pr_dbg("PCIE Gen speed not setup\n");
  1444. return 0;
  1445. }
  1446. cnss_pr_dbg("Sending PCIE Gen speed: %d state: 0x%lx\n",
  1447. plat_priv->pcie_gen_speed, plat_priv->driver_state);
  1448. req.pcie_speed = (enum wlfw_pcie_gen_speed_v01)
  1449. plat_priv->pcie_gen_speed;
  1450. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1451. wlfw_pcie_gen_switch_resp_msg_v01_ei, &resp);
  1452. if (ret < 0) {
  1453. cnss_pr_err("Failed to initialize txn for PCIE speed switch err: %d\n",
  1454. ret);
  1455. goto out;
  1456. }
  1457. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1458. QMI_WLFW_PCIE_GEN_SWITCH_REQ_V01,
  1459. WLFW_PCIE_GEN_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1460. wlfw_pcie_gen_switch_req_msg_v01_ei, &req);
  1461. if (ret < 0) {
  1462. qmi_txn_cancel(&txn);
  1463. cnss_pr_err("Failed to send PCIE speed switch, err: %d\n", ret);
  1464. goto out;
  1465. }
  1466. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1467. if (ret < 0) {
  1468. cnss_pr_err("Failed to wait for PCIE Gen switch resp, err: %d\n",
  1469. ret);
  1470. goto out;
  1471. }
  1472. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  1473. cnss_pr_err("PCIE Gen Switch req failed, Speed: %d, result: %d, err: %d\n",
  1474. plat_priv->pcie_gen_speed, resp.resp.result,
  1475. resp.resp.error);
  1476. ret = -resp.resp.result;
  1477. }
  1478. out:
  1479. /* Reset PCIE Gen speed after one time use */
  1480. plat_priv->pcie_gen_speed = QMI_PCIE_GEN_SPEED_INVALID_V01;
  1481. return ret;
  1482. }
  1483. int cnss_wlfw_antenna_switch_send_sync(struct cnss_plat_data *plat_priv)
  1484. {
  1485. struct wlfw_antenna_switch_req_msg_v01 *req;
  1486. struct wlfw_antenna_switch_resp_msg_v01 *resp;
  1487. struct qmi_txn txn;
  1488. int ret = 0;
  1489. if (!plat_priv)
  1490. return -ENODEV;
  1491. cnss_pr_dbg("Sending antenna switch sync request, state: 0x%lx\n",
  1492. plat_priv->driver_state);
  1493. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1494. if (!req)
  1495. return -ENOMEM;
  1496. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1497. if (!resp) {
  1498. kfree(req);
  1499. return -ENOMEM;
  1500. }
  1501. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1502. wlfw_antenna_switch_resp_msg_v01_ei, resp);
  1503. if (ret < 0) {
  1504. cnss_pr_err("Failed to initialize txn for antenna switch request, err: %d\n",
  1505. ret);
  1506. goto out;
  1507. }
  1508. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1509. QMI_WLFW_ANTENNA_SWITCH_REQ_V01,
  1510. WLFW_ANTENNA_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1511. wlfw_antenna_switch_req_msg_v01_ei, req);
  1512. if (ret < 0) {
  1513. qmi_txn_cancel(&txn);
  1514. cnss_pr_err("Failed to send antenna switch request, err: %d\n",
  1515. ret);
  1516. goto out;
  1517. }
  1518. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1519. if (ret < 0) {
  1520. cnss_pr_err("Failed to wait for response of antenna switch request, err: %d\n",
  1521. ret);
  1522. goto out;
  1523. }
  1524. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1525. cnss_pr_dbg("Antenna switch request failed, result: %d, err: %d\n",
  1526. resp->resp.result, resp->resp.error);
  1527. ret = -resp->resp.result;
  1528. goto out;
  1529. }
  1530. if (resp->antenna_valid)
  1531. plat_priv->antenna = resp->antenna;
  1532. cnss_pr_dbg("Antenna valid: %u, antenna 0x%llx\n",
  1533. resp->antenna_valid, resp->antenna);
  1534. kfree(req);
  1535. kfree(resp);
  1536. return 0;
  1537. out:
  1538. kfree(req);
  1539. kfree(resp);
  1540. return ret;
  1541. }
  1542. int cnss_wlfw_antenna_grant_send_sync(struct cnss_plat_data *plat_priv)
  1543. {
  1544. struct wlfw_antenna_grant_req_msg_v01 *req;
  1545. struct wlfw_antenna_grant_resp_msg_v01 *resp;
  1546. struct qmi_txn txn;
  1547. int ret = 0;
  1548. if (!plat_priv)
  1549. return -ENODEV;
  1550. cnss_pr_dbg("Sending antenna grant sync request, state: 0x%lx, grant 0x%llx\n",
  1551. plat_priv->driver_state, plat_priv->grant);
  1552. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1553. if (!req)
  1554. return -ENOMEM;
  1555. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1556. if (!resp) {
  1557. kfree(req);
  1558. return -ENOMEM;
  1559. }
  1560. req->grant_valid = 1;
  1561. req->grant = plat_priv->grant;
  1562. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1563. wlfw_antenna_grant_resp_msg_v01_ei, resp);
  1564. if (ret < 0) {
  1565. cnss_pr_err("Failed to initialize txn for antenna grant request, err: %d\n",
  1566. ret);
  1567. goto out;
  1568. }
  1569. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1570. QMI_WLFW_ANTENNA_GRANT_REQ_V01,
  1571. WLFW_ANTENNA_GRANT_REQ_MSG_V01_MAX_MSG_LEN,
  1572. wlfw_antenna_grant_req_msg_v01_ei, req);
  1573. if (ret < 0) {
  1574. qmi_txn_cancel(&txn);
  1575. cnss_pr_err("Failed to send antenna grant request, err: %d\n",
  1576. ret);
  1577. goto out;
  1578. }
  1579. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1580. if (ret < 0) {
  1581. cnss_pr_err("Failed to wait for response of antenna grant request, err: %d\n",
  1582. ret);
  1583. goto out;
  1584. }
  1585. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1586. cnss_pr_err("Antenna grant request failed, result: %d, err: %d\n",
  1587. resp->resp.result, resp->resp.error);
  1588. ret = -resp->resp.result;
  1589. goto out;
  1590. }
  1591. kfree(req);
  1592. kfree(resp);
  1593. return 0;
  1594. out:
  1595. kfree(req);
  1596. kfree(resp);
  1597. return ret;
  1598. }
  1599. int cnss_wlfw_qdss_trace_mem_info_send_sync(struct cnss_plat_data *plat_priv)
  1600. {
  1601. struct wlfw_qdss_trace_mem_info_req_msg_v01 *req;
  1602. struct wlfw_qdss_trace_mem_info_resp_msg_v01 *resp;
  1603. struct qmi_txn txn;
  1604. struct cnss_fw_mem *qdss_mem = plat_priv->qdss_mem;
  1605. int ret = 0;
  1606. int i;
  1607. cnss_pr_dbg("Sending QDSS trace mem info, state: 0x%lx\n",
  1608. plat_priv->driver_state);
  1609. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1610. if (!req)
  1611. return -ENOMEM;
  1612. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1613. if (!resp) {
  1614. kfree(req);
  1615. return -ENOMEM;
  1616. }
  1617. req->mem_seg_len = plat_priv->qdss_mem_seg_len;
  1618. for (i = 0; i < req->mem_seg_len; i++) {
  1619. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  1620. qdss_mem[i].va, &qdss_mem[i].pa,
  1621. qdss_mem[i].size, qdss_mem[i].type);
  1622. req->mem_seg[i].addr = qdss_mem[i].pa;
  1623. req->mem_seg[i].size = qdss_mem[i].size;
  1624. req->mem_seg[i].type = qdss_mem[i].type;
  1625. }
  1626. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1627. wlfw_qdss_trace_mem_info_resp_msg_v01_ei, resp);
  1628. if (ret < 0) {
  1629. cnss_pr_err("Fail to initialize txn for QDSS trace mem request: err %d\n",
  1630. ret);
  1631. goto out;
  1632. }
  1633. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1634. QMI_WLFW_QDSS_TRACE_MEM_INFO_REQ_V01,
  1635. WLFW_QDSS_TRACE_MEM_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1636. wlfw_qdss_trace_mem_info_req_msg_v01_ei, req);
  1637. if (ret < 0) {
  1638. qmi_txn_cancel(&txn);
  1639. cnss_pr_err("Fail to send QDSS trace mem info request: err %d\n",
  1640. ret);
  1641. goto out;
  1642. }
  1643. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1644. if (ret < 0) {
  1645. cnss_pr_err("Fail to wait for response of QDSS trace mem info request, err %d\n",
  1646. ret);
  1647. goto out;
  1648. }
  1649. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1650. cnss_pr_err("QDSS trace mem info request failed, result: %d, err: %d\n",
  1651. resp->resp.result, resp->resp.error);
  1652. ret = -resp->resp.result;
  1653. goto out;
  1654. }
  1655. kfree(req);
  1656. kfree(resp);
  1657. return 0;
  1658. out:
  1659. kfree(req);
  1660. kfree(resp);
  1661. return ret;
  1662. }
  1663. static int cnss_wlfw_wfc_call_status_send_sync
  1664. (struct cnss_plat_data *plat_priv,
  1665. const struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg)
  1666. {
  1667. struct wlfw_wfc_call_status_req_msg_v01 *req;
  1668. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  1669. struct qmi_txn txn;
  1670. int ret = 0;
  1671. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1672. cnss_pr_err("Drop IMS WFC indication as FW not initialized\n");
  1673. return -EINVAL;
  1674. }
  1675. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1676. if (!req)
  1677. return -ENOMEM;
  1678. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1679. if (!resp) {
  1680. kfree(req);
  1681. return -ENOMEM;
  1682. }
  1683. /**
  1684. * WFC Call r1 design has CNSS as pass thru using opaque hex buffer.
  1685. * But in r2 update QMI structure is expanded and as an effect qmi
  1686. * decoded structures have padding. Thus we cannot use buffer design.
  1687. * For backward compatibility for r1 design copy only wfc_call_active
  1688. * value in hex buffer.
  1689. */
  1690. req->wfc_call_status_len = sizeof(ind_msg->wfc_call_active);
  1691. req->wfc_call_status[0] = ind_msg->wfc_call_active;
  1692. /* wfc_call_active is mandatory in IMS indication */
  1693. req->wfc_call_active_valid = 1;
  1694. req->wfc_call_active = ind_msg->wfc_call_active;
  1695. req->all_wfc_calls_held_valid = ind_msg->all_wfc_calls_held_valid;
  1696. req->all_wfc_calls_held = ind_msg->all_wfc_calls_held;
  1697. req->is_wfc_emergency_valid = ind_msg->is_wfc_emergency_valid;
  1698. req->is_wfc_emergency = ind_msg->is_wfc_emergency;
  1699. req->twt_ims_start_valid = ind_msg->twt_ims_start_valid;
  1700. req->twt_ims_start = ind_msg->twt_ims_start;
  1701. req->twt_ims_int_valid = ind_msg->twt_ims_int_valid;
  1702. req->twt_ims_int = ind_msg->twt_ims_int;
  1703. req->media_quality_valid = ind_msg->media_quality_valid;
  1704. req->media_quality =
  1705. (enum wlfw_wfc_media_quality_v01)ind_msg->media_quality;
  1706. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  1707. plat_priv->driver_state);
  1708. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1709. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  1710. if (ret < 0) {
  1711. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  1712. ret);
  1713. goto out;
  1714. }
  1715. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1716. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  1717. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  1718. wlfw_wfc_call_status_req_msg_v01_ei, req);
  1719. if (ret < 0) {
  1720. qmi_txn_cancel(&txn);
  1721. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  1722. ret);
  1723. goto out;
  1724. }
  1725. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1726. if (ret < 0) {
  1727. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  1728. ret);
  1729. goto out;
  1730. }
  1731. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1732. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  1733. resp->resp.result, resp->resp.error);
  1734. ret = -resp->resp.result;
  1735. goto out;
  1736. }
  1737. ret = 0;
  1738. out:
  1739. kfree(req);
  1740. kfree(resp);
  1741. return ret;
  1742. }
  1743. int cnss_wlfw_dynamic_feature_mask_send_sync(struct cnss_plat_data *plat_priv)
  1744. {
  1745. struct wlfw_dynamic_feature_mask_req_msg_v01 *req;
  1746. struct wlfw_dynamic_feature_mask_resp_msg_v01 *resp;
  1747. struct qmi_txn txn;
  1748. int ret = 0;
  1749. cnss_pr_dbg("Sending dynamic feature mask 0x%llx, state: 0x%lx\n",
  1750. plat_priv->dynamic_feature,
  1751. plat_priv->driver_state);
  1752. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1753. if (!req)
  1754. return -ENOMEM;
  1755. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1756. if (!resp) {
  1757. kfree(req);
  1758. return -ENOMEM;
  1759. }
  1760. req->mask_valid = 1;
  1761. req->mask = plat_priv->dynamic_feature;
  1762. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1763. wlfw_dynamic_feature_mask_resp_msg_v01_ei, resp);
  1764. if (ret < 0) {
  1765. cnss_pr_err("Fail to initialize txn for dynamic feature mask request: err %d\n",
  1766. ret);
  1767. goto out;
  1768. }
  1769. ret = qmi_send_request
  1770. (&plat_priv->qmi_wlfw, NULL, &txn,
  1771. QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01,
  1772. WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN,
  1773. wlfw_dynamic_feature_mask_req_msg_v01_ei, req);
  1774. if (ret < 0) {
  1775. qmi_txn_cancel(&txn);
  1776. cnss_pr_err("Fail to send dynamic feature mask request: err %d\n",
  1777. ret);
  1778. goto out;
  1779. }
  1780. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1781. if (ret < 0) {
  1782. cnss_pr_err("Fail to wait for response of dynamic feature mask request, err %d\n",
  1783. ret);
  1784. goto out;
  1785. }
  1786. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1787. cnss_pr_err("Dynamic feature mask request failed, result: %d, err: %d\n",
  1788. resp->resp.result, resp->resp.error);
  1789. ret = -resp->resp.result;
  1790. goto out;
  1791. }
  1792. out:
  1793. kfree(req);
  1794. kfree(resp);
  1795. return ret;
  1796. }
  1797. int cnss_wlfw_get_info_send_sync(struct cnss_plat_data *plat_priv, int type,
  1798. void *cmd, int cmd_len)
  1799. {
  1800. struct wlfw_get_info_req_msg_v01 *req;
  1801. struct wlfw_get_info_resp_msg_v01 *resp;
  1802. struct qmi_txn txn;
  1803. int ret = 0;
  1804. cnss_pr_buf("Sending get info message, type: %d, cmd length: %d, state: 0x%lx\n",
  1805. type, cmd_len, plat_priv->driver_state);
  1806. if (cmd_len > QMI_WLFW_MAX_DATA_SIZE_V01)
  1807. return -EINVAL;
  1808. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1809. if (!req)
  1810. return -ENOMEM;
  1811. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1812. if (!resp) {
  1813. kfree(req);
  1814. return -ENOMEM;
  1815. }
  1816. req->type = type;
  1817. req->data_len = cmd_len;
  1818. memcpy(req->data, cmd, req->data_len);
  1819. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1820. wlfw_get_info_resp_msg_v01_ei, resp);
  1821. if (ret < 0) {
  1822. cnss_pr_err("Failed to initialize txn for get info request, err: %d\n",
  1823. ret);
  1824. goto out;
  1825. }
  1826. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1827. QMI_WLFW_GET_INFO_REQ_V01,
  1828. WLFW_GET_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1829. wlfw_get_info_req_msg_v01_ei, req);
  1830. if (ret < 0) {
  1831. qmi_txn_cancel(&txn);
  1832. cnss_pr_err("Failed to send get info request, err: %d\n",
  1833. ret);
  1834. goto out;
  1835. }
  1836. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1837. if (ret < 0) {
  1838. cnss_pr_err("Failed to wait for response of get info request, err: %d\n",
  1839. ret);
  1840. goto out;
  1841. }
  1842. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1843. cnss_pr_err("Get info request failed, result: %d, err: %d\n",
  1844. resp->resp.result, resp->resp.error);
  1845. ret = -resp->resp.result;
  1846. goto out;
  1847. }
  1848. kfree(req);
  1849. kfree(resp);
  1850. return 0;
  1851. out:
  1852. kfree(req);
  1853. kfree(resp);
  1854. return ret;
  1855. }
  1856. unsigned int cnss_get_qmi_timeout(struct cnss_plat_data *plat_priv)
  1857. {
  1858. return QMI_WLFW_TIMEOUT_MS;
  1859. }
  1860. static void cnss_wlfw_request_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  1861. struct sockaddr_qrtr *sq,
  1862. struct qmi_txn *txn, const void *data)
  1863. {
  1864. struct cnss_plat_data *plat_priv =
  1865. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  1866. const struct wlfw_request_mem_ind_msg_v01 *ind_msg = data;
  1867. int i;
  1868. cnss_pr_dbg("Received QMI WLFW request memory indication\n");
  1869. if (!txn) {
  1870. cnss_pr_err("Spurious indication\n");
  1871. return;
  1872. }
  1873. plat_priv->fw_mem_seg_len = ind_msg->mem_seg_len;
  1874. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  1875. cnss_pr_dbg("FW requests for memory, size: 0x%x, type: %u\n",
  1876. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  1877. plat_priv->fw_mem[i].type = ind_msg->mem_seg[i].type;
  1878. plat_priv->fw_mem[i].size = ind_msg->mem_seg[i].size;
  1879. if (plat_priv->fw_mem[i].type == CNSS_MEM_TYPE_DDR)
  1880. plat_priv->fw_mem[i].attrs |=
  1881. DMA_ATTR_FORCE_CONTIGUOUS;
  1882. if (plat_priv->fw_mem[i].type == CNSS_MEM_CAL_V01)
  1883. plat_priv->cal_mem = &plat_priv->fw_mem[i];
  1884. }
  1885. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_REQUEST_MEM,
  1886. 0, NULL);
  1887. }
  1888. static void cnss_wlfw_fw_mem_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  1889. struct sockaddr_qrtr *sq,
  1890. struct qmi_txn *txn, const void *data)
  1891. {
  1892. struct cnss_plat_data *plat_priv =
  1893. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  1894. cnss_pr_dbg("Received QMI WLFW FW memory ready indication\n");
  1895. if (!txn) {
  1896. cnss_pr_err("Spurious indication\n");
  1897. return;
  1898. }
  1899. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_READY,
  1900. 0, NULL);
  1901. }
  1902. /**
  1903. * cnss_wlfw_fw_ready_ind_cb: FW ready indication handler (Helium arch)
  1904. *
  1905. * This event is not required for HST/ HSP as FW calibration done is
  1906. * provided in QMI_WLFW_CAL_DONE_IND_V01
  1907. */
  1908. static void cnss_wlfw_fw_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  1909. struct sockaddr_qrtr *sq,
  1910. struct qmi_txn *txn, const void *data)
  1911. {
  1912. struct cnss_plat_data *plat_priv =
  1913. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  1914. struct cnss_cal_info *cal_info;
  1915. if (!txn) {
  1916. cnss_pr_err("Spurious indication\n");
  1917. return;
  1918. }
  1919. if (plat_priv->device_id == QCA6390_DEVICE_ID ||
  1920. plat_priv->device_id == QCA6490_DEVICE_ID) {
  1921. cnss_pr_dbg("Ignore FW Ready Indication for HST/HSP");
  1922. return;
  1923. }
  1924. cnss_pr_dbg("Received QMI WLFW FW ready indication.\n");
  1925. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  1926. if (!cal_info)
  1927. return;
  1928. cal_info->cal_status = CNSS_CAL_DONE;
  1929. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  1930. 0, cal_info);
  1931. }
  1932. static void cnss_wlfw_fw_init_done_ind_cb(struct qmi_handle *qmi_wlfw,
  1933. struct sockaddr_qrtr *sq,
  1934. struct qmi_txn *txn, const void *data)
  1935. {
  1936. struct cnss_plat_data *plat_priv =
  1937. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  1938. cnss_pr_dbg("Received QMI WLFW FW initialization done indication\n");
  1939. if (!txn) {
  1940. cnss_pr_err("Spurious indication\n");
  1941. return;
  1942. }
  1943. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_READY, 0, NULL);
  1944. }
  1945. static void cnss_wlfw_pin_result_ind_cb(struct qmi_handle *qmi_wlfw,
  1946. struct sockaddr_qrtr *sq,
  1947. struct qmi_txn *txn, const void *data)
  1948. {
  1949. struct cnss_plat_data *plat_priv =
  1950. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  1951. const struct wlfw_pin_connect_result_ind_msg_v01 *ind_msg = data;
  1952. cnss_pr_dbg("Received QMI WLFW pin connect result indication\n");
  1953. if (!txn) {
  1954. cnss_pr_err("Spurious indication\n");
  1955. return;
  1956. }
  1957. if (ind_msg->pwr_pin_result_valid)
  1958. plat_priv->pin_result.fw_pwr_pin_result =
  1959. ind_msg->pwr_pin_result;
  1960. if (ind_msg->phy_io_pin_result_valid)
  1961. plat_priv->pin_result.fw_phy_io_pin_result =
  1962. ind_msg->phy_io_pin_result;
  1963. if (ind_msg->rf_pin_result_valid)
  1964. plat_priv->pin_result.fw_rf_pin_result = ind_msg->rf_pin_result;
  1965. cnss_pr_dbg("Pin connect Result: pwr_pin: 0x%x phy_io_pin: 0x%x rf_io_pin: 0x%x\n",
  1966. ind_msg->pwr_pin_result, ind_msg->phy_io_pin_result,
  1967. ind_msg->rf_pin_result);
  1968. }
  1969. int cnss_wlfw_cal_report_req_send_sync(struct cnss_plat_data *plat_priv,
  1970. u32 cal_file_download_size)
  1971. {
  1972. struct wlfw_cal_report_req_msg_v01 req = {0};
  1973. struct wlfw_cal_report_resp_msg_v01 resp = {0};
  1974. struct qmi_txn txn;
  1975. int ret = 0;
  1976. cnss_pr_dbg("Sending cal file report request. File size: %d, state: 0x%lx\n",
  1977. cal_file_download_size, plat_priv->driver_state);
  1978. req.cal_file_download_size_valid = 1;
  1979. req.cal_file_download_size = cal_file_download_size;
  1980. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1981. wlfw_cal_report_resp_msg_v01_ei, &resp);
  1982. if (ret < 0) {
  1983. cnss_pr_err("Failed to initialize txn for Cal Report request, err: %d\n",
  1984. ret);
  1985. goto out;
  1986. }
  1987. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1988. QMI_WLFW_CAL_REPORT_REQ_V01,
  1989. WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN,
  1990. wlfw_cal_report_req_msg_v01_ei, &req);
  1991. if (ret < 0) {
  1992. qmi_txn_cancel(&txn);
  1993. cnss_pr_err("Failed to send Cal Report request, err: %d\n",
  1994. ret);
  1995. goto out;
  1996. }
  1997. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1998. if (ret < 0) {
  1999. cnss_pr_err("Failed to wait for response of Cal Report request, err: %d\n",
  2000. ret);
  2001. goto out;
  2002. }
  2003. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2004. cnss_pr_err("Cal Report request failed, result: %d, err: %d\n",
  2005. resp.resp.result, resp.resp.error);
  2006. ret = -resp.resp.result;
  2007. goto out;
  2008. }
  2009. out:
  2010. return ret;
  2011. }
  2012. static void cnss_wlfw_cal_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2013. struct sockaddr_qrtr *sq,
  2014. struct qmi_txn *txn, const void *data)
  2015. {
  2016. struct cnss_plat_data *plat_priv =
  2017. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2018. const struct wlfw_cal_done_ind_msg_v01 *ind = data;
  2019. struct cnss_cal_info *cal_info;
  2020. cnss_pr_dbg("Received Cal done indication. File size: %d\n",
  2021. ind->cal_file_upload_size);
  2022. cnss_pr_info("Calibration took %d ms\n",
  2023. jiffies_to_msecs(jiffies - plat_priv->cal_time));
  2024. if (!txn) {
  2025. cnss_pr_err("Spurious indication\n");
  2026. return;
  2027. }
  2028. if (ind->cal_file_upload_size_valid)
  2029. plat_priv->cal_file_size = ind->cal_file_upload_size;
  2030. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2031. if (!cal_info)
  2032. return;
  2033. cal_info->cal_status = CNSS_CAL_DONE;
  2034. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2035. 0, cal_info);
  2036. }
  2037. static void cnss_wlfw_qdss_trace_req_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2038. struct sockaddr_qrtr *sq,
  2039. struct qmi_txn *txn,
  2040. const void *data)
  2041. {
  2042. struct cnss_plat_data *plat_priv =
  2043. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2044. const struct wlfw_qdss_trace_req_mem_ind_msg_v01 *ind_msg = data;
  2045. int i;
  2046. cnss_pr_dbg("Received QMI WLFW QDSS trace request mem indication\n");
  2047. if (!txn) {
  2048. cnss_pr_err("Spurious indication\n");
  2049. return;
  2050. }
  2051. if (plat_priv->qdss_mem_seg_len) {
  2052. cnss_pr_err("Ignore double allocation for QDSS trace, current len %u\n",
  2053. plat_priv->qdss_mem_seg_len);
  2054. return;
  2055. }
  2056. plat_priv->qdss_mem_seg_len = ind_msg->mem_seg_len;
  2057. for (i = 0; i < plat_priv->qdss_mem_seg_len; i++) {
  2058. cnss_pr_dbg("QDSS requests for memory, size: 0x%x, type: %u\n",
  2059. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2060. plat_priv->qdss_mem[i].type = ind_msg->mem_seg[i].type;
  2061. plat_priv->qdss_mem[i].size = ind_msg->mem_seg[i].size;
  2062. }
  2063. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM,
  2064. 0, NULL);
  2065. }
  2066. /**
  2067. * cnss_wlfw_fw_mem_file_save_ind_cb: Save given FW mem to filesystem
  2068. *
  2069. * QDSS_TRACE_SAVE_IND feature is overloaded to provide any host allocated
  2070. * fw memory segment for dumping to file system. Only one type of mem can be
  2071. * saved per indication and is provided in mem seg index 0.
  2072. *
  2073. * Return: None
  2074. */
  2075. static void cnss_wlfw_fw_mem_file_save_ind_cb(struct qmi_handle *qmi_wlfw,
  2076. struct sockaddr_qrtr *sq,
  2077. struct qmi_txn *txn,
  2078. const void *data)
  2079. {
  2080. struct cnss_plat_data *plat_priv =
  2081. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2082. const struct wlfw_qdss_trace_save_ind_msg_v01 *ind_msg = data;
  2083. struct cnss_qmi_event_fw_mem_file_save_data *event_data;
  2084. int i = 0;
  2085. if (!txn || !data) {
  2086. cnss_pr_err("Spurious indication\n");
  2087. return;
  2088. }
  2089. cnss_pr_dbg("QMI fw_mem_file_save: source: %d mem_seg: %d type: %u len: %u\n",
  2090. ind_msg->source, ind_msg->mem_seg_valid,
  2091. ind_msg->mem_seg[0].type, ind_msg->mem_seg_len);
  2092. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2093. if (!event_data)
  2094. return;
  2095. event_data->mem_type = ind_msg->mem_seg[0].type;
  2096. event_data->mem_seg_len = ind_msg->mem_seg_len;
  2097. event_data->total_size = ind_msg->total_size;
  2098. if (ind_msg->mem_seg_valid) {
  2099. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_STR_LEN_V01) {
  2100. cnss_pr_err("Invalid seg len indication\n");
  2101. goto free_event_data;
  2102. }
  2103. for (i = 0; i < ind_msg->mem_seg_len; i++) {
  2104. event_data->mem_seg[i].addr = ind_msg->mem_seg[i].addr;
  2105. event_data->mem_seg[i].size = ind_msg->mem_seg[i].size;
  2106. if (event_data->mem_type != ind_msg->mem_seg[i].type) {
  2107. cnss_pr_err("FW Mem file save ind cannot have multiple mem types\n");
  2108. goto free_event_data;
  2109. }
  2110. cnss_pr_dbg("seg-%d: addr 0x%llx size 0x%x\n",
  2111. i, ind_msg->mem_seg[i].addr,
  2112. ind_msg->mem_seg[i].size);
  2113. }
  2114. }
  2115. if (ind_msg->file_name_valid)
  2116. strlcpy(event_data->file_name, ind_msg->file_name,
  2117. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2118. if (ind_msg->source == 1) {
  2119. if (!ind_msg->file_name_valid)
  2120. strlcpy(event_data->file_name, "qdss_trace_wcss_etb",
  2121. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2122. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA,
  2123. 0, event_data);
  2124. } else {
  2125. if (event_data->mem_type == QMI_WLFW_MEM_QDSS_V01) {
  2126. if (!ind_msg->file_name_valid)
  2127. strlcpy(event_data->file_name, "qdss_trace_ddr",
  2128. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2129. } else {
  2130. if (!ind_msg->file_name_valid)
  2131. strlcpy(event_data->file_name, "fw_mem_dump",
  2132. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2133. }
  2134. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE,
  2135. 0, event_data);
  2136. }
  2137. return;
  2138. free_event_data:
  2139. kfree(event_data);
  2140. }
  2141. static void cnss_wlfw_qdss_trace_free_ind_cb(struct qmi_handle *qmi_wlfw,
  2142. struct sockaddr_qrtr *sq,
  2143. struct qmi_txn *txn,
  2144. const void *data)
  2145. {
  2146. struct cnss_plat_data *plat_priv =
  2147. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2148. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_FREE,
  2149. 0, NULL);
  2150. }
  2151. static void cnss_wlfw_respond_get_info_ind_cb(struct qmi_handle *qmi_wlfw,
  2152. struct sockaddr_qrtr *sq,
  2153. struct qmi_txn *txn,
  2154. const void *data)
  2155. {
  2156. struct cnss_plat_data *plat_priv =
  2157. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2158. const struct wlfw_respond_get_info_ind_msg_v01 *ind_msg = data;
  2159. cnss_pr_buf("Received QMI WLFW respond get info indication\n");
  2160. if (!txn) {
  2161. cnss_pr_err("Spurious indication\n");
  2162. return;
  2163. }
  2164. cnss_pr_buf("Extract message with event length: %d, type: %d, is last: %d, seq no: %d\n",
  2165. ind_msg->data_len, ind_msg->type,
  2166. ind_msg->is_last, ind_msg->seq_no);
  2167. if (plat_priv->get_info_cb_ctx && plat_priv->get_info_cb)
  2168. plat_priv->get_info_cb(plat_priv->get_info_cb_ctx,
  2169. (void *)ind_msg->data,
  2170. ind_msg->data_len);
  2171. }
  2172. static int cnss_ims_wfc_call_twt_cfg_send_sync
  2173. (struct cnss_plat_data *plat_priv,
  2174. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg)
  2175. {
  2176. struct ims_private_service_wfc_call_twt_config_req_msg_v01 *req;
  2177. struct ims_private_service_wfc_call_twt_config_rsp_msg_v01 *resp;
  2178. struct qmi_txn txn;
  2179. int ret = 0;
  2180. if (!test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  2181. cnss_pr_err("Drop FW WFC indication as IMS QMI not connected\n");
  2182. return -EINVAL;
  2183. }
  2184. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2185. if (!req)
  2186. return -ENOMEM;
  2187. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2188. if (!resp) {
  2189. kfree(req);
  2190. return -ENOMEM;
  2191. }
  2192. req->twt_sta_start_valid = ind_msg->twt_sta_start_valid;
  2193. req->twt_sta_start = ind_msg->twt_sta_start;
  2194. req->twt_sta_int_valid = ind_msg->twt_sta_int_valid;
  2195. req->twt_sta_int = ind_msg->twt_sta_int;
  2196. req->twt_sta_upo_valid = ind_msg->twt_sta_upo_valid;
  2197. req->twt_sta_upo = ind_msg->twt_sta_upo;
  2198. req->twt_sta_sp_valid = ind_msg->twt_sta_sp_valid;
  2199. req->twt_sta_sp = ind_msg->twt_sta_sp;
  2200. req->twt_sta_dl_valid = req->twt_sta_dl_valid;
  2201. req->twt_sta_dl = req->twt_sta_dl;
  2202. req->twt_sta_config_changed_valid =
  2203. ind_msg->twt_sta_config_changed_valid;
  2204. req->twt_sta_config_changed = ind_msg->twt_sta_config_changed;
  2205. cnss_pr_dbg("CNSS->IMS: TWT_CFG_REQ: state: 0x%lx\n",
  2206. plat_priv->driver_state);
  2207. ret =
  2208. qmi_txn_init(&plat_priv->ims_qmi, &txn,
  2209. ims_private_service_wfc_call_twt_config_rsp_msg_v01_ei,
  2210. resp);
  2211. if (ret < 0) {
  2212. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Txn Init Err: %d\n",
  2213. ret);
  2214. goto out;
  2215. }
  2216. ret =
  2217. qmi_send_request(&plat_priv->ims_qmi, NULL, &txn,
  2218. QMI_IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_V01,
  2219. IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_MSG_V01_MAX_MSG_LEN,
  2220. ims_private_service_wfc_call_twt_config_req_msg_v01_ei, req);
  2221. if (ret < 0) {
  2222. qmi_txn_cancel(&txn);
  2223. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Send Err: %d\n", ret);
  2224. goto out;
  2225. }
  2226. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2227. if (ret < 0) {
  2228. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: QMI Wait Err: %d\n", ret);
  2229. goto out;
  2230. }
  2231. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2232. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: Result: %d Err: %d\n",
  2233. resp->resp.result, resp->resp.error);
  2234. ret = -resp->resp.result;
  2235. goto out;
  2236. }
  2237. ret = 0;
  2238. out:
  2239. kfree(req);
  2240. kfree(resp);
  2241. return ret;
  2242. }
  2243. int cnss_process_twt_cfg_ind_event(struct cnss_plat_data *plat_priv,
  2244. void *data)
  2245. {
  2246. int ret;
  2247. struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2248. ret = cnss_ims_wfc_call_twt_cfg_send_sync(plat_priv, ind_msg);
  2249. kfree(data);
  2250. return ret;
  2251. }
  2252. static void cnss_wlfw_process_twt_cfg_ind(struct qmi_handle *qmi_wlfw,
  2253. struct sockaddr_qrtr *sq,
  2254. struct qmi_txn *txn,
  2255. const void *data)
  2256. {
  2257. struct cnss_plat_data *plat_priv =
  2258. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2259. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2260. struct wlfw_wfc_call_twt_config_ind_msg_v01 *event_data;
  2261. if (!txn) {
  2262. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Spurious indication\n");
  2263. return;
  2264. }
  2265. if (!ind_msg) {
  2266. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Invalid indication\n");
  2267. return;
  2268. }
  2269. cnss_pr_dbg("FW->CNSS: TWT_CFG_IND: %x %llx, %x %x, %x %x, %x %x, %x %x, %x %x\n",
  2270. ind_msg->twt_sta_start_valid, ind_msg->twt_sta_start,
  2271. ind_msg->twt_sta_int_valid, ind_msg->twt_sta_int,
  2272. ind_msg->twt_sta_upo_valid, ind_msg->twt_sta_upo,
  2273. ind_msg->twt_sta_sp_valid, ind_msg->twt_sta_sp,
  2274. ind_msg->twt_sta_dl_valid, ind_msg->twt_sta_dl,
  2275. ind_msg->twt_sta_config_changed_valid,
  2276. ind_msg->twt_sta_config_changed);
  2277. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2278. if (!event_data)
  2279. return;
  2280. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND, 0,
  2281. event_data);
  2282. }
  2283. static struct qmi_msg_handler qmi_wlfw_msg_handlers[] = {
  2284. {
  2285. .type = QMI_INDICATION,
  2286. .msg_id = QMI_WLFW_REQUEST_MEM_IND_V01,
  2287. .ei = wlfw_request_mem_ind_msg_v01_ei,
  2288. .decoded_size = sizeof(struct wlfw_request_mem_ind_msg_v01),
  2289. .fn = cnss_wlfw_request_mem_ind_cb
  2290. },
  2291. {
  2292. .type = QMI_INDICATION,
  2293. .msg_id = QMI_WLFW_FW_MEM_READY_IND_V01,
  2294. .ei = wlfw_fw_mem_ready_ind_msg_v01_ei,
  2295. .decoded_size = sizeof(struct wlfw_fw_mem_ready_ind_msg_v01),
  2296. .fn = cnss_wlfw_fw_mem_ready_ind_cb
  2297. },
  2298. {
  2299. .type = QMI_INDICATION,
  2300. .msg_id = QMI_WLFW_FW_READY_IND_V01,
  2301. .ei = wlfw_fw_ready_ind_msg_v01_ei,
  2302. .decoded_size = sizeof(struct wlfw_fw_ready_ind_msg_v01),
  2303. .fn = cnss_wlfw_fw_ready_ind_cb
  2304. },
  2305. {
  2306. .type = QMI_INDICATION,
  2307. .msg_id = QMI_WLFW_FW_INIT_DONE_IND_V01,
  2308. .ei = wlfw_fw_init_done_ind_msg_v01_ei,
  2309. .decoded_size = sizeof(struct wlfw_fw_init_done_ind_msg_v01),
  2310. .fn = cnss_wlfw_fw_init_done_ind_cb
  2311. },
  2312. {
  2313. .type = QMI_INDICATION,
  2314. .msg_id = QMI_WLFW_PIN_CONNECT_RESULT_IND_V01,
  2315. .ei = wlfw_pin_connect_result_ind_msg_v01_ei,
  2316. .decoded_size =
  2317. sizeof(struct wlfw_pin_connect_result_ind_msg_v01),
  2318. .fn = cnss_wlfw_pin_result_ind_cb
  2319. },
  2320. {
  2321. .type = QMI_INDICATION,
  2322. .msg_id = QMI_WLFW_CAL_DONE_IND_V01,
  2323. .ei = wlfw_cal_done_ind_msg_v01_ei,
  2324. .decoded_size = sizeof(struct wlfw_cal_done_ind_msg_v01),
  2325. .fn = cnss_wlfw_cal_done_ind_cb
  2326. },
  2327. {
  2328. .type = QMI_INDICATION,
  2329. .msg_id = QMI_WLFW_QDSS_TRACE_REQ_MEM_IND_V01,
  2330. .ei = wlfw_qdss_trace_req_mem_ind_msg_v01_ei,
  2331. .decoded_size =
  2332. sizeof(struct wlfw_qdss_trace_req_mem_ind_msg_v01),
  2333. .fn = cnss_wlfw_qdss_trace_req_mem_ind_cb
  2334. },
  2335. {
  2336. .type = QMI_INDICATION,
  2337. .msg_id = QMI_WLFW_QDSS_TRACE_SAVE_IND_V01,
  2338. .ei = wlfw_qdss_trace_save_ind_msg_v01_ei,
  2339. .decoded_size =
  2340. sizeof(struct wlfw_qdss_trace_save_ind_msg_v01),
  2341. .fn = cnss_wlfw_fw_mem_file_save_ind_cb
  2342. },
  2343. {
  2344. .type = QMI_INDICATION,
  2345. .msg_id = QMI_WLFW_QDSS_TRACE_FREE_IND_V01,
  2346. .ei = wlfw_qdss_trace_free_ind_msg_v01_ei,
  2347. .decoded_size =
  2348. sizeof(struct wlfw_qdss_trace_free_ind_msg_v01),
  2349. .fn = cnss_wlfw_qdss_trace_free_ind_cb
  2350. },
  2351. {
  2352. .type = QMI_INDICATION,
  2353. .msg_id = QMI_WLFW_RESPOND_GET_INFO_IND_V01,
  2354. .ei = wlfw_respond_get_info_ind_msg_v01_ei,
  2355. .decoded_size =
  2356. sizeof(struct wlfw_respond_get_info_ind_msg_v01),
  2357. .fn = cnss_wlfw_respond_get_info_ind_cb
  2358. },
  2359. {
  2360. .type = QMI_INDICATION,
  2361. .msg_id = QMI_WLFW_WFC_CALL_TWT_CONFIG_IND_V01,
  2362. .ei = wlfw_wfc_call_twt_config_ind_msg_v01_ei,
  2363. .decoded_size =
  2364. sizeof(struct wlfw_wfc_call_twt_config_ind_msg_v01),
  2365. .fn = cnss_wlfw_process_twt_cfg_ind
  2366. },
  2367. {}
  2368. };
  2369. static int cnss_wlfw_connect_to_server(struct cnss_plat_data *plat_priv,
  2370. void *data)
  2371. {
  2372. struct cnss_qmi_event_server_arrive_data *event_data = data;
  2373. struct qmi_handle *qmi_wlfw = &plat_priv->qmi_wlfw;
  2374. struct sockaddr_qrtr sq = { 0 };
  2375. int ret = 0;
  2376. if (!event_data)
  2377. return -EINVAL;
  2378. sq.sq_family = AF_QIPCRTR;
  2379. sq.sq_node = event_data->node;
  2380. sq.sq_port = event_data->port;
  2381. ret = kernel_connect(qmi_wlfw->sock, (struct sockaddr *)&sq,
  2382. sizeof(sq), 0);
  2383. if (ret < 0) {
  2384. cnss_pr_err("Failed to connect to QMI WLFW remote service port\n");
  2385. goto out;
  2386. }
  2387. set_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2388. cnss_pr_info("QMI WLFW service connected, state: 0x%lx\n",
  2389. plat_priv->driver_state);
  2390. kfree(data);
  2391. return 0;
  2392. out:
  2393. CNSS_QMI_ASSERT();
  2394. kfree(data);
  2395. return ret;
  2396. }
  2397. int cnss_wlfw_server_arrive(struct cnss_plat_data *plat_priv, void *data)
  2398. {
  2399. int ret = 0;
  2400. if (!plat_priv)
  2401. return -ENODEV;
  2402. if (test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state)) {
  2403. cnss_pr_err("Unexpected WLFW server arrive\n");
  2404. CNSS_ASSERT(0);
  2405. return -EINVAL;
  2406. }
  2407. cnss_ignore_qmi_failure(false);
  2408. ret = cnss_wlfw_connect_to_server(plat_priv, data);
  2409. if (ret < 0)
  2410. goto out;
  2411. ret = cnss_wlfw_ind_register_send_sync(plat_priv);
  2412. if (ret < 0) {
  2413. if (ret == -EALREADY)
  2414. ret = 0;
  2415. goto out;
  2416. }
  2417. ret = cnss_wlfw_host_cap_send_sync(plat_priv);
  2418. if (ret < 0)
  2419. goto out;
  2420. return 0;
  2421. out:
  2422. return ret;
  2423. }
  2424. int cnss_wlfw_server_exit(struct cnss_plat_data *plat_priv)
  2425. {
  2426. int ret;
  2427. if (!plat_priv)
  2428. return -ENODEV;
  2429. clear_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2430. cnss_pr_info("QMI WLFW service disconnected, state: 0x%lx\n",
  2431. plat_priv->driver_state);
  2432. cnss_qmi_deinit(plat_priv);
  2433. clear_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2434. ret = cnss_qmi_init(plat_priv);
  2435. if (ret < 0) {
  2436. cnss_pr_err("QMI WLFW service registraton failed, ret\n", ret);
  2437. CNSS_ASSERT(0);
  2438. }
  2439. return 0;
  2440. }
  2441. static int wlfw_new_server(struct qmi_handle *qmi_wlfw,
  2442. struct qmi_service *service)
  2443. {
  2444. struct cnss_plat_data *plat_priv =
  2445. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2446. struct cnss_qmi_event_server_arrive_data *event_data;
  2447. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2448. cnss_pr_info("WLFW server delete in progress, Ignore server arrive, state: 0x%lx\n",
  2449. plat_priv->driver_state);
  2450. return 0;
  2451. }
  2452. cnss_pr_dbg("WLFW server arriving: node %u port %u\n",
  2453. service->node, service->port);
  2454. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2455. if (!event_data)
  2456. return -ENOMEM;
  2457. event_data->node = service->node;
  2458. event_data->port = service->port;
  2459. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_ARRIVE,
  2460. 0, event_data);
  2461. return 0;
  2462. }
  2463. static void wlfw_del_server(struct qmi_handle *qmi_wlfw,
  2464. struct qmi_service *service)
  2465. {
  2466. struct cnss_plat_data *plat_priv =
  2467. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2468. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2469. cnss_pr_info("WLFW server delete in progress, Ignore server delete, state: 0x%lx\n",
  2470. plat_priv->driver_state);
  2471. return;
  2472. }
  2473. cnss_pr_dbg("WLFW server exiting\n");
  2474. if (plat_priv) {
  2475. cnss_ignore_qmi_failure(true);
  2476. set_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2477. }
  2478. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_EXIT,
  2479. 0, NULL);
  2480. }
  2481. static struct qmi_ops qmi_wlfw_ops = {
  2482. .new_server = wlfw_new_server,
  2483. .del_server = wlfw_del_server,
  2484. };
  2485. int cnss_qmi_init(struct cnss_plat_data *plat_priv)
  2486. {
  2487. int ret = 0;
  2488. ret = qmi_handle_init(&plat_priv->qmi_wlfw,
  2489. QMI_WLFW_MAX_RECV_BUF_SIZE,
  2490. &qmi_wlfw_ops, qmi_wlfw_msg_handlers);
  2491. if (ret < 0) {
  2492. cnss_pr_err("Failed to initialize WLFW QMI handle, err: %d\n",
  2493. ret);
  2494. goto out;
  2495. }
  2496. ret = qmi_add_lookup(&plat_priv->qmi_wlfw, WLFW_SERVICE_ID_V01,
  2497. WLFW_SERVICE_VERS_V01, WLFW_SERVICE_INS_ID_V01);
  2498. if (ret < 0)
  2499. cnss_pr_err("Failed to add WLFW QMI lookup, err: %d\n", ret);
  2500. out:
  2501. return ret;
  2502. }
  2503. void cnss_qmi_deinit(struct cnss_plat_data *plat_priv)
  2504. {
  2505. qmi_handle_release(&plat_priv->qmi_wlfw);
  2506. }
  2507. int cnss_qmi_get_dms_mac(struct cnss_plat_data *plat_priv)
  2508. {
  2509. struct dms_get_mac_address_req_msg_v01 req;
  2510. struct dms_get_mac_address_resp_msg_v01 resp;
  2511. struct qmi_txn txn;
  2512. int ret = 0;
  2513. if (!test_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state)) {
  2514. cnss_pr_err("DMS QMI connection not established\n");
  2515. return -EINVAL;
  2516. }
  2517. cnss_pr_dbg("Requesting DMS MAC address");
  2518. memset(&resp, 0, sizeof(resp));
  2519. ret = qmi_txn_init(&plat_priv->qmi_dms, &txn,
  2520. dms_get_mac_address_resp_msg_v01_ei, &resp);
  2521. if (ret < 0) {
  2522. cnss_pr_err("Failed to initialize txn for dms, err: %d\n",
  2523. ret);
  2524. goto out;
  2525. }
  2526. req.device = DMS_DEVICE_MAC_WLAN_V01;
  2527. ret = qmi_send_request(&plat_priv->qmi_dms, NULL, &txn,
  2528. QMI_DMS_GET_MAC_ADDRESS_REQ_V01,
  2529. DMS_GET_MAC_ADDRESS_REQ_MSG_V01_MAX_MSG_LEN,
  2530. dms_get_mac_address_req_msg_v01_ei, &req);
  2531. if (ret < 0) {
  2532. qmi_txn_cancel(&txn);
  2533. cnss_pr_err("Failed to send QMI_DMS_GET_MAC_ADDRESS_REQ_V01, err: %d\n",
  2534. ret);
  2535. goto out;
  2536. }
  2537. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2538. if (ret < 0) {
  2539. cnss_pr_err("Failed to wait for QMI_DMS_GET_MAC_ADDRESS_RESP_V01, err: %d\n",
  2540. ret);
  2541. goto out;
  2542. }
  2543. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2544. cnss_pr_err("QMI_DMS_GET_MAC_ADDRESS_REQ_V01 failed, result: %d, err: %d\n",
  2545. resp.resp.result, resp.resp.error);
  2546. ret = -resp.resp.result;
  2547. goto out;
  2548. }
  2549. if (!resp.mac_address_valid ||
  2550. resp.mac_address_len != QMI_WLFW_MAC_ADDR_SIZE_V01) {
  2551. cnss_pr_err("Invalid MAC address received from DMS\n");
  2552. plat_priv->dms.mac_valid = false;
  2553. goto out;
  2554. }
  2555. plat_priv->dms.mac_valid = true;
  2556. memcpy(plat_priv->dms.mac, resp.mac_address, QMI_WLFW_MAC_ADDR_SIZE_V01);
  2557. cnss_pr_info("Received DMS MAC: [%pM]\n", plat_priv->dms.mac);
  2558. out:
  2559. return ret;
  2560. }
  2561. static int cnss_dms_connect_to_server(struct cnss_plat_data *plat_priv,
  2562. unsigned int node, unsigned int port)
  2563. {
  2564. struct qmi_handle *qmi_dms = &plat_priv->qmi_dms;
  2565. struct sockaddr_qrtr sq = {0};
  2566. int ret = 0;
  2567. sq.sq_family = AF_QIPCRTR;
  2568. sq.sq_node = node;
  2569. sq.sq_port = port;
  2570. ret = kernel_connect(qmi_dms->sock, (struct sockaddr *)&sq,
  2571. sizeof(sq), 0);
  2572. if (ret < 0) {
  2573. cnss_pr_err("Failed to connect to QMI DMS remote service Node: %d Port: %d\n",
  2574. node, port);
  2575. goto out;
  2576. }
  2577. set_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2578. cnss_pr_info("QMI DMS service connected, state: 0x%lx\n",
  2579. plat_priv->driver_state);
  2580. out:
  2581. return ret;
  2582. }
  2583. static int dms_new_server(struct qmi_handle *qmi_dms,
  2584. struct qmi_service *service)
  2585. {
  2586. struct cnss_plat_data *plat_priv =
  2587. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2588. if (!service)
  2589. return -EINVAL;
  2590. return cnss_dms_connect_to_server(plat_priv, service->node,
  2591. service->port);
  2592. }
  2593. static void dms_del_server(struct qmi_handle *qmi_dms,
  2594. struct qmi_service *service)
  2595. {
  2596. struct cnss_plat_data *plat_priv =
  2597. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2598. clear_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2599. cnss_pr_info("QMI DMS service disconnected, state: 0x%lx\n",
  2600. plat_priv->driver_state);
  2601. }
  2602. static struct qmi_ops qmi_dms_ops = {
  2603. .new_server = dms_new_server,
  2604. .del_server = dms_del_server,
  2605. };
  2606. int cnss_dms_init(struct cnss_plat_data *plat_priv)
  2607. {
  2608. int ret = 0;
  2609. ret = qmi_handle_init(&plat_priv->qmi_dms, DMS_QMI_MAX_MSG_LEN,
  2610. &qmi_dms_ops, NULL);
  2611. if (ret < 0) {
  2612. cnss_pr_err("Failed to initialize DMS handle, err: %d\n", ret);
  2613. goto out;
  2614. }
  2615. ret = qmi_add_lookup(&plat_priv->qmi_dms, DMS_SERVICE_ID_V01,
  2616. DMS_SERVICE_VERS_V01, 0);
  2617. if (ret < 0)
  2618. cnss_pr_err("Failed to add DMS lookup, err: %d\n", ret);
  2619. out:
  2620. return ret;
  2621. }
  2622. void cnss_dms_deinit(struct cnss_plat_data *plat_priv)
  2623. {
  2624. qmi_handle_release(&plat_priv->qmi_dms);
  2625. }
  2626. int coex_antenna_switch_to_wlan_send_sync_msg(struct cnss_plat_data *plat_priv)
  2627. {
  2628. int ret;
  2629. struct coex_antenna_switch_to_wlan_req_msg_v01 *req;
  2630. struct coex_antenna_switch_to_wlan_resp_msg_v01 *resp;
  2631. struct qmi_txn txn;
  2632. if (!plat_priv)
  2633. return -ENODEV;
  2634. cnss_pr_dbg("Sending coex antenna switch_to_wlan\n");
  2635. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2636. if (!req)
  2637. return -ENOMEM;
  2638. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2639. if (!resp) {
  2640. kfree(req);
  2641. return -ENOMEM;
  2642. }
  2643. req->antenna = plat_priv->antenna;
  2644. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2645. coex_antenna_switch_to_wlan_resp_msg_v01_ei, resp);
  2646. if (ret < 0) {
  2647. cnss_pr_err("Fail to init txn for coex antenna switch_to_wlan resp %d\n",
  2648. ret);
  2649. goto out;
  2650. }
  2651. ret = qmi_send_request
  2652. (&plat_priv->coex_qmi, NULL, &txn,
  2653. QMI_COEX_SWITCH_ANTENNA_TO_WLAN_REQ_V01,
  2654. COEX_ANTENNA_SWITCH_TO_WLAN_REQ_MSG_V01_MAX_MSG_LEN,
  2655. coex_antenna_switch_to_wlan_req_msg_v01_ei, req);
  2656. if (ret < 0) {
  2657. qmi_txn_cancel(&txn);
  2658. cnss_pr_err("Fail to send coex antenna switch_to_wlan req %d\n",
  2659. ret);
  2660. goto out;
  2661. }
  2662. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2663. if (ret < 0) {
  2664. cnss_pr_err("Coex antenna switch_to_wlan resp wait failed with ret %d\n",
  2665. ret);
  2666. goto out;
  2667. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2668. cnss_pr_err("Coex antenna switch_to_wlan request rejected, result:%d error:%d\n",
  2669. resp->resp.result, resp->resp.error);
  2670. ret = -resp->resp.result;
  2671. goto out;
  2672. }
  2673. if (resp->grant_valid)
  2674. plat_priv->grant = resp->grant;
  2675. cnss_pr_dbg("Coex antenna grant: 0x%llx\n", resp->grant);
  2676. kfree(resp);
  2677. kfree(req);
  2678. return 0;
  2679. out:
  2680. kfree(resp);
  2681. kfree(req);
  2682. return ret;
  2683. }
  2684. int coex_antenna_switch_to_mdm_send_sync_msg(struct cnss_plat_data *plat_priv)
  2685. {
  2686. int ret;
  2687. struct coex_antenna_switch_to_mdm_req_msg_v01 *req;
  2688. struct coex_antenna_switch_to_mdm_resp_msg_v01 *resp;
  2689. struct qmi_txn txn;
  2690. if (!plat_priv)
  2691. return -ENODEV;
  2692. cnss_pr_dbg("Sending coex antenna switch_to_mdm\n");
  2693. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2694. if (!req)
  2695. return -ENOMEM;
  2696. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2697. if (!resp) {
  2698. kfree(req);
  2699. return -ENOMEM;
  2700. }
  2701. req->antenna = plat_priv->antenna;
  2702. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2703. coex_antenna_switch_to_mdm_resp_msg_v01_ei, resp);
  2704. if (ret < 0) {
  2705. cnss_pr_err("Fail to init txn for coex antenna switch_to_mdm resp %d\n",
  2706. ret);
  2707. goto out;
  2708. }
  2709. ret = qmi_send_request
  2710. (&plat_priv->coex_qmi, NULL, &txn,
  2711. QMI_COEX_SWITCH_ANTENNA_TO_MDM_REQ_V01,
  2712. COEX_ANTENNA_SWITCH_TO_MDM_REQ_MSG_V01_MAX_MSG_LEN,
  2713. coex_antenna_switch_to_mdm_req_msg_v01_ei, req);
  2714. if (ret < 0) {
  2715. qmi_txn_cancel(&txn);
  2716. cnss_pr_err("Fail to send coex antenna switch_to_mdm req %d\n",
  2717. ret);
  2718. goto out;
  2719. }
  2720. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2721. if (ret < 0) {
  2722. cnss_pr_err("Coex antenna switch_to_mdm resp wait failed with ret %d\n",
  2723. ret);
  2724. goto out;
  2725. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2726. cnss_pr_err("Coex antenna switch_to_mdm request rejected, result:%d error:%d\n",
  2727. resp->resp.result, resp->resp.error);
  2728. ret = -resp->resp.result;
  2729. goto out;
  2730. }
  2731. kfree(resp);
  2732. kfree(req);
  2733. return 0;
  2734. out:
  2735. kfree(resp);
  2736. kfree(req);
  2737. return ret;
  2738. }
  2739. static int coex_new_server(struct qmi_handle *qmi,
  2740. struct qmi_service *service)
  2741. {
  2742. struct cnss_plat_data *plat_priv =
  2743. container_of(qmi, struct cnss_plat_data, coex_qmi);
  2744. struct sockaddr_qrtr sq = { 0 };
  2745. int ret = 0;
  2746. cnss_pr_dbg("COEX server arrive: node %u port %u\n",
  2747. service->node, service->port);
  2748. sq.sq_family = AF_QIPCRTR;
  2749. sq.sq_node = service->node;
  2750. sq.sq_port = service->port;
  2751. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  2752. if (ret < 0) {
  2753. cnss_pr_err("Fail to connect to remote service port\n");
  2754. return ret;
  2755. }
  2756. set_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  2757. cnss_pr_dbg("COEX Server Connected: 0x%lx\n",
  2758. plat_priv->driver_state);
  2759. return 0;
  2760. }
  2761. static void coex_del_server(struct qmi_handle *qmi,
  2762. struct qmi_service *service)
  2763. {
  2764. struct cnss_plat_data *plat_priv =
  2765. container_of(qmi, struct cnss_plat_data, coex_qmi);
  2766. cnss_pr_dbg("COEX server exit\n");
  2767. clear_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  2768. }
  2769. static struct qmi_ops coex_qmi_ops = {
  2770. .new_server = coex_new_server,
  2771. .del_server = coex_del_server,
  2772. };
  2773. int cnss_register_coex_service(struct cnss_plat_data *plat_priv)
  2774. { int ret;
  2775. ret = qmi_handle_init(&plat_priv->coex_qmi,
  2776. COEX_SERVICE_MAX_MSG_LEN,
  2777. &coex_qmi_ops, NULL);
  2778. if (ret < 0)
  2779. return ret;
  2780. ret = qmi_add_lookup(&plat_priv->coex_qmi, COEX_SERVICE_ID_V01,
  2781. COEX_SERVICE_VERS_V01, 0);
  2782. return ret;
  2783. }
  2784. void cnss_unregister_coex_service(struct cnss_plat_data *plat_priv)
  2785. {
  2786. qmi_handle_release(&plat_priv->coex_qmi);
  2787. }
  2788. /* IMS Service */
  2789. int ims_subscribe_for_indication_send_async(struct cnss_plat_data *plat_priv)
  2790. {
  2791. int ret;
  2792. struct ims_private_service_subscribe_for_indications_req_msg_v01 *req;
  2793. struct qmi_txn *txn;
  2794. if (!plat_priv)
  2795. return -ENODEV;
  2796. cnss_pr_dbg("Sending ASYNC ims subscribe for indication\n");
  2797. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2798. if (!req)
  2799. return -ENOMEM;
  2800. req->wfc_call_status_valid = 1;
  2801. req->wfc_call_status = 1;
  2802. txn = &plat_priv->txn;
  2803. ret = qmi_txn_init(&plat_priv->ims_qmi, txn, NULL, NULL);
  2804. if (ret < 0) {
  2805. cnss_pr_err("Fail to init txn for ims subscribe for indication resp %d\n",
  2806. ret);
  2807. goto out;
  2808. }
  2809. ret = qmi_send_request
  2810. (&plat_priv->ims_qmi, NULL, txn,
  2811. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  2812. IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_MSG_V01_MAX_MSG_LEN,
  2813. ims_private_service_subscribe_for_indications_req_msg_v01_ei, req);
  2814. if (ret < 0) {
  2815. qmi_txn_cancel(txn);
  2816. cnss_pr_err("Fail to send ims subscribe for indication req %d\n",
  2817. ret);
  2818. goto out;
  2819. }
  2820. kfree(req);
  2821. return 0;
  2822. out:
  2823. kfree(req);
  2824. return ret;
  2825. }
  2826. static void ims_subscribe_for_indication_resp_cb(struct qmi_handle *qmi,
  2827. struct sockaddr_qrtr *sq,
  2828. struct qmi_txn *txn,
  2829. const void *data)
  2830. {
  2831. const
  2832. struct ims_private_service_subscribe_for_indications_rsp_msg_v01 *resp =
  2833. data;
  2834. cnss_pr_dbg("Received IMS subscribe indication response\n");
  2835. if (!txn) {
  2836. cnss_pr_err("spurious response\n");
  2837. return;
  2838. }
  2839. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2840. cnss_pr_err("IMS subscribe for indication request rejected, result:%d error:%d\n",
  2841. resp->resp.result, resp->resp.error);
  2842. txn->result = -resp->resp.result;
  2843. }
  2844. }
  2845. int cnss_process_wfc_call_ind_event(struct cnss_plat_data *plat_priv,
  2846. void *data)
  2847. {
  2848. int ret;
  2849. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  2850. ret = cnss_wlfw_wfc_call_status_send_sync(plat_priv, ind_msg);
  2851. kfree(data);
  2852. return ret;
  2853. }
  2854. static void
  2855. cnss_ims_process_wfc_call_ind_cb(struct qmi_handle *ims_qmi,
  2856. struct sockaddr_qrtr *sq,
  2857. struct qmi_txn *txn, const void *data)
  2858. {
  2859. struct cnss_plat_data *plat_priv =
  2860. container_of(ims_qmi, struct cnss_plat_data, ims_qmi);
  2861. const
  2862. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  2863. struct ims_private_service_wfc_call_status_ind_msg_v01 *event_data;
  2864. if (!txn) {
  2865. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Spurious indication\n");
  2866. return;
  2867. }
  2868. if (!ind_msg) {
  2869. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Invalid indication\n");
  2870. return;
  2871. }
  2872. cnss_pr_dbg("IMS->CNSS: WFC_CALL_IND: %x, %x %x, %x %x, %x %llx, %x %x, %x %x\n",
  2873. ind_msg->wfc_call_active, ind_msg->all_wfc_calls_held_valid,
  2874. ind_msg->all_wfc_calls_held,
  2875. ind_msg->is_wfc_emergency_valid, ind_msg->is_wfc_emergency,
  2876. ind_msg->twt_ims_start_valid, ind_msg->twt_ims_start,
  2877. ind_msg->twt_ims_int_valid, ind_msg->twt_ims_int,
  2878. ind_msg->media_quality_valid, ind_msg->media_quality);
  2879. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2880. if (!event_data)
  2881. return;
  2882. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND,
  2883. 0, event_data);
  2884. }
  2885. static struct qmi_msg_handler qmi_ims_msg_handlers[] = {
  2886. {
  2887. .type = QMI_RESPONSE,
  2888. .msg_id =
  2889. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  2890. .ei =
  2891. ims_private_service_subscribe_for_indications_rsp_msg_v01_ei,
  2892. .decoded_size = sizeof(struct
  2893. ims_private_service_subscribe_for_indications_rsp_msg_v01),
  2894. .fn = ims_subscribe_for_indication_resp_cb
  2895. },
  2896. {
  2897. .type = QMI_INDICATION,
  2898. .msg_id = QMI_IMS_PRIVATE_SERVICE_WFC_CALL_STATUS_IND_V01,
  2899. .ei = ims_private_service_wfc_call_status_ind_msg_v01_ei,
  2900. .decoded_size =
  2901. sizeof(struct ims_private_service_wfc_call_status_ind_msg_v01),
  2902. .fn = cnss_ims_process_wfc_call_ind_cb
  2903. },
  2904. {}
  2905. };
  2906. static int ims_new_server(struct qmi_handle *qmi,
  2907. struct qmi_service *service)
  2908. {
  2909. struct cnss_plat_data *plat_priv =
  2910. container_of(qmi, struct cnss_plat_data, ims_qmi);
  2911. struct sockaddr_qrtr sq = { 0 };
  2912. int ret = 0;
  2913. cnss_pr_dbg("IMS server arrive: node %u port %u\n",
  2914. service->node, service->port);
  2915. sq.sq_family = AF_QIPCRTR;
  2916. sq.sq_node = service->node;
  2917. sq.sq_port = service->port;
  2918. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  2919. if (ret < 0) {
  2920. cnss_pr_err("Fail to connect to remote service port\n");
  2921. return ret;
  2922. }
  2923. set_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  2924. cnss_pr_dbg("IMS Server Connected: 0x%lx\n",
  2925. plat_priv->driver_state);
  2926. ret = ims_subscribe_for_indication_send_async(plat_priv);
  2927. return ret;
  2928. }
  2929. static void ims_del_server(struct qmi_handle *qmi,
  2930. struct qmi_service *service)
  2931. {
  2932. struct cnss_plat_data *plat_priv =
  2933. container_of(qmi, struct cnss_plat_data, ims_qmi);
  2934. cnss_pr_dbg("IMS server exit\n");
  2935. clear_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  2936. }
  2937. static struct qmi_ops ims_qmi_ops = {
  2938. .new_server = ims_new_server,
  2939. .del_server = ims_del_server,
  2940. };
  2941. int cnss_register_ims_service(struct cnss_plat_data *plat_priv)
  2942. { int ret;
  2943. ret = qmi_handle_init(&plat_priv->ims_qmi,
  2944. IMSPRIVATE_SERVICE_MAX_MSG_LEN,
  2945. &ims_qmi_ops, qmi_ims_msg_handlers);
  2946. if (ret < 0)
  2947. return ret;
  2948. ret = qmi_add_lookup(&plat_priv->ims_qmi, IMSPRIVATE_SERVICE_ID_V01,
  2949. IMSPRIVATE_SERVICE_VERS_V01, 0);
  2950. return ret;
  2951. }
  2952. void cnss_unregister_ims_service(struct cnss_plat_data *plat_priv)
  2953. {
  2954. qmi_handle_release(&plat_priv->ims_qmi);
  2955. }