wcd934x-dsp-cntl.h 2.8 KB

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  1. /*
  2. * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #ifndef __WCD934X_DSP_CNTL_H__
  14. #define __WCD934X_DSP_CNTL_H__
  15. #include <sound/soc.h>
  16. #include <sound/wcd-dsp-mgr.h>
  17. enum cdc_ssr_event {
  18. WCD_CDC_DOWN_EVENT,
  19. WCD_CDC_UP_EVENT,
  20. };
  21. struct wcd_dsp_cdc_cb {
  22. /* Callback to enable codec clock */
  23. int (*cdc_clk_en)(struct snd_soc_codec *, bool);
  24. /* Callback to vote and unvote for SVS2 mode */
  25. void (*cdc_vote_svs)(struct snd_soc_codec *, bool);
  26. };
  27. struct wcd_dsp_irq_info {
  28. /* IPC interrupt */
  29. int cpe_ipc1_irq;
  30. /* CPE error summary interrupt */
  31. int cpe_err_irq;
  32. /*
  33. * Bit mask to indicate which of the
  34. * error interrupts are to be considered
  35. * as fatal.
  36. */
  37. u16 fatal_irqs;
  38. };
  39. struct wcd_dsp_params {
  40. struct wcd_dsp_cdc_cb *cb;
  41. struct wcd_dsp_irq_info irqs;
  42. /* Rate at which the codec clock operates */
  43. u32 clk_rate;
  44. /*
  45. * Represents the dsp instance, will be used
  46. * to create sysfs and debugfs entries with
  47. * directory wdsp<dsp-instance>
  48. */
  49. u32 dsp_instance;
  50. };
  51. struct wdsp_ssr_entry {
  52. u8 offline;
  53. u8 offline_change;
  54. wait_queue_head_t offline_poll_wait;
  55. struct snd_info_entry *entry;
  56. };
  57. struct wcd_dsp_cntl {
  58. /* Handle to codec */
  59. struct snd_soc_codec *codec;
  60. /* Clk rate of the codec clock */
  61. u32 clk_rate;
  62. /* Callbacks to codec driver */
  63. const struct wcd_dsp_cdc_cb *cdc_cb;
  64. /* Completion to indicate WDSP boot done */
  65. struct completion boot_complete;
  66. struct wcd_dsp_irq_info irqs;
  67. u32 dsp_instance;
  68. /* Sysfs entries related */
  69. int boot_reqs;
  70. struct kobject wcd_kobj;
  71. /* Debugfs related */
  72. struct dentry *entry;
  73. u32 debug_mode;
  74. bool ramdump_enable;
  75. /* WDSP manager drivers data */
  76. struct device *m_dev;
  77. struct wdsp_mgr_ops *m_ops;
  78. /* clk related */
  79. struct mutex clk_mutex;
  80. bool is_clk_enabled;
  81. /* Keep track of WDSP boot status */
  82. bool is_wdsp_booted;
  83. /* SSR related */
  84. struct wdsp_ssr_entry ssr_entry;
  85. struct mutex ssr_mutex;
  86. /* Misc device related */
  87. char miscdev_name[256];
  88. struct miscdevice miscdev;
  89. #ifdef CONFIG_DEBUG_FS
  90. /* Debug dump related */
  91. atomic_t err_irq_flag;
  92. #endif
  93. };
  94. void wcd_dsp_cntl_init(struct snd_soc_codec *codec,
  95. struct wcd_dsp_params *params,
  96. struct wcd_dsp_cntl **cntl);
  97. void wcd_dsp_cntl_deinit(struct wcd_dsp_cntl **cntl);
  98. int wcd_dsp_ssr_event(struct wcd_dsp_cntl *cntl, enum cdc_ssr_event event);
  99. #endif /* end __WCD_DSP_CONTROL_H__ */