dp_rx.c 87 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "hal_hw_headers.h"
  20. #include "dp_types.h"
  21. #include "dp_rx.h"
  22. #include "dp_tx.h"
  23. #include "dp_peer.h"
  24. #include "hal_rx.h"
  25. #include "hal_api.h"
  26. #include "qdf_nbuf.h"
  27. #ifdef MESH_MODE_SUPPORT
  28. #include "if_meta_hdr.h"
  29. #endif
  30. #include "dp_internal.h"
  31. #include "dp_ipa.h"
  32. #include "dp_hist.h"
  33. #include "dp_rx_buffer_pool.h"
  34. #ifdef WIFI_MONITOR_SUPPORT
  35. #include "dp_htt.h"
  36. #include <dp_mon.h>
  37. #endif
  38. #ifdef FEATURE_WDS
  39. #include "dp_txrx_wds.h"
  40. #endif
  41. #ifdef DP_RATETABLE_SUPPORT
  42. #include "dp_ratetable.h"
  43. #endif
  44. #ifndef WLAN_SOFTUMAC_SUPPORT /* WLAN_SOFTUMAC_SUPPORT */
  45. #ifdef DUP_RX_DESC_WAR
  46. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  47. hal_ring_handle_t hal_ring,
  48. hal_ring_desc_t ring_desc,
  49. struct dp_rx_desc *rx_desc)
  50. {
  51. void *hal_soc = soc->hal_soc;
  52. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  53. dp_rx_desc_dump(rx_desc);
  54. }
  55. #else
  56. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  57. hal_ring_handle_t hal_ring_hdl,
  58. hal_ring_desc_t ring_desc,
  59. struct dp_rx_desc *rx_desc)
  60. {
  61. hal_soc_handle_t hal_soc = soc->hal_soc;
  62. dp_rx_desc_dump(rx_desc);
  63. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  64. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  65. qdf_assert_always(0);
  66. }
  67. #endif
  68. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  69. #ifdef RX_DESC_SANITY_WAR
  70. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  71. hal_ring_handle_t hal_ring_hdl,
  72. hal_ring_desc_t ring_desc,
  73. struct dp_rx_desc *rx_desc)
  74. {
  75. uint8_t return_buffer_manager;
  76. if (qdf_unlikely(!rx_desc)) {
  77. /*
  78. * This is an unlikely case where the cookie obtained
  79. * from the ring_desc is invalid and hence we are not
  80. * able to find the corresponding rx_desc
  81. */
  82. goto fail;
  83. }
  84. return_buffer_manager = hal_rx_ret_buf_manager_get(hal_soc, ring_desc);
  85. if (qdf_unlikely(!(return_buffer_manager ==
  86. HAL_RX_BUF_RBM_SW1_BM(soc->wbm_sw0_bm_id) ||
  87. return_buffer_manager ==
  88. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id)))) {
  89. goto fail;
  90. }
  91. return QDF_STATUS_SUCCESS;
  92. fail:
  93. DP_STATS_INC(soc, rx.err.invalid_cookie, 1);
  94. dp_err("Ring Desc:");
  95. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl,
  96. ring_desc);
  97. return QDF_STATUS_E_NULL_VALUE;
  98. }
  99. #endif
  100. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  101. hal_ring_handle_t hal_ring_hdl,
  102. uint32_t num_entries,
  103. bool *near_full)
  104. {
  105. uint32_t num_pending = 0;
  106. num_pending = hal_srng_dst_num_valid_locked(hal_soc,
  107. hal_ring_hdl,
  108. true);
  109. if (num_entries && (num_pending >= num_entries >> 1))
  110. *near_full = true;
  111. else
  112. *near_full = false;
  113. return num_pending;
  114. }
  115. #ifdef RX_DESC_DEBUG_CHECK
  116. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  117. hal_ring_desc_t ring_desc,
  118. struct dp_rx_desc *rx_desc)
  119. {
  120. struct hal_buf_info hbi;
  121. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  122. /* Sanity check for possible buffer paddr corruption */
  123. if (dp_rx_desc_paddr_sanity_check(rx_desc, (&hbi)->paddr))
  124. return QDF_STATUS_SUCCESS;
  125. return QDF_STATUS_E_FAILURE;
  126. }
  127. /**
  128. * dp_rx_desc_nbuf_len_sanity_check - Add sanity check to catch Rx buffer
  129. * out of bound access from H.W
  130. *
  131. * @soc: DP soc
  132. * @pkt_len: Packet length received from H.W
  133. *
  134. * Return: NONE
  135. */
  136. static inline void
  137. dp_rx_desc_nbuf_len_sanity_check(struct dp_soc *soc,
  138. uint32_t pkt_len)
  139. {
  140. struct rx_desc_pool *rx_desc_pool;
  141. rx_desc_pool = &soc->rx_desc_buf[0];
  142. qdf_assert_always(pkt_len <= rx_desc_pool->buf_size);
  143. }
  144. #else
  145. static inline void
  146. dp_rx_desc_nbuf_len_sanity_check(struct dp_soc *soc, uint32_t pkt_len) { }
  147. #endif
  148. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  149. void
  150. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  151. hal_ring_desc_t ring_desc)
  152. {
  153. struct dp_buf_info_record *record;
  154. struct hal_buf_info hbi;
  155. uint32_t idx;
  156. if (qdf_unlikely(!soc->rx_ring_history[ring_num]))
  157. return;
  158. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  159. /* buffer_addr_info is the first element of ring_desc */
  160. hal_rx_buf_cookie_rbm_get(soc->hal_soc, (uint32_t *)ring_desc,
  161. &hbi);
  162. idx = dp_history_get_next_index(&soc->rx_ring_history[ring_num]->index,
  163. DP_RX_HIST_MAX);
  164. /* No NULL check needed for record since its an array */
  165. record = &soc->rx_ring_history[ring_num]->entry[idx];
  166. record->timestamp = qdf_get_log_timestamp();
  167. record->hbi.paddr = hbi.paddr;
  168. record->hbi.sw_cookie = hbi.sw_cookie;
  169. record->hbi.rbm = hbi.rbm;
  170. }
  171. #endif
  172. #ifdef WLAN_FEATURE_MARK_FIRST_WAKEUP_PACKET
  173. void dp_rx_mark_first_packet_after_wow_wakeup(struct dp_pdev *pdev,
  174. uint8_t *rx_tlv,
  175. qdf_nbuf_t nbuf)
  176. {
  177. struct dp_soc *soc;
  178. if (!pdev->is_first_wakeup_packet)
  179. return;
  180. soc = pdev->soc;
  181. if (hal_get_first_wow_wakeup_packet(soc->hal_soc, rx_tlv)) {
  182. qdf_nbuf_mark_wakeup_frame(nbuf);
  183. dp_info("First packet after WOW Wakeup rcvd");
  184. }
  185. }
  186. #endif
  187. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  188. #endif /* WLAN_SOFTUMAC_SUPPORT */
  189. /**
  190. * dp_pdev_frag_alloc_and_map() - Allocate frag for desc buffer and map
  191. *
  192. * @dp_soc: struct dp_soc *
  193. * @nbuf_frag_info_t: nbuf frag info
  194. * @dp_pdev: struct dp_pdev *
  195. * @rx_desc_pool: Rx desc pool
  196. *
  197. * Return: QDF_STATUS
  198. */
  199. #ifdef DP_RX_MON_MEM_FRAG
  200. static inline QDF_STATUS
  201. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  202. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  203. struct dp_pdev *dp_pdev,
  204. struct rx_desc_pool *rx_desc_pool)
  205. {
  206. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  207. (nbuf_frag_info_t->virt_addr).vaddr =
  208. qdf_frag_alloc(NULL, rx_desc_pool->buf_size);
  209. if (!((nbuf_frag_info_t->virt_addr).vaddr)) {
  210. dp_err("Frag alloc failed");
  211. DP_STATS_INC(dp_pdev, replenish.frag_alloc_fail, 1);
  212. return QDF_STATUS_E_NOMEM;
  213. }
  214. ret = qdf_mem_map_page(dp_soc->osdev,
  215. (nbuf_frag_info_t->virt_addr).vaddr,
  216. QDF_DMA_FROM_DEVICE,
  217. rx_desc_pool->buf_size,
  218. &nbuf_frag_info_t->paddr);
  219. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  220. qdf_frag_free((nbuf_frag_info_t->virt_addr).vaddr);
  221. dp_err("Frag map failed");
  222. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  223. return QDF_STATUS_E_FAULT;
  224. }
  225. return QDF_STATUS_SUCCESS;
  226. }
  227. #else
  228. static inline QDF_STATUS
  229. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  230. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  231. struct dp_pdev *dp_pdev,
  232. struct rx_desc_pool *rx_desc_pool)
  233. {
  234. return QDF_STATUS_SUCCESS;
  235. }
  236. #endif /* DP_RX_MON_MEM_FRAG */
  237. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  238. /**
  239. * dp_rx_refill_ring_record_entry() - Record an entry into refill_ring history
  240. * @soc: Datapath soc structure
  241. * @ring_num: Refill ring number
  242. * @hal_ring_hdl:
  243. * @num_req: number of buffers requested for refill
  244. * @num_refill: number of buffers refilled
  245. *
  246. * Return: None
  247. */
  248. static inline void
  249. dp_rx_refill_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  250. hal_ring_handle_t hal_ring_hdl,
  251. uint32_t num_req, uint32_t num_refill)
  252. {
  253. struct dp_refill_info_record *record;
  254. uint32_t idx;
  255. uint32_t tp;
  256. uint32_t hp;
  257. if (qdf_unlikely(ring_num >= MAX_PDEV_CNT ||
  258. !soc->rx_refill_ring_history[ring_num]))
  259. return;
  260. idx = dp_history_get_next_index(&soc->rx_refill_ring_history[ring_num]->index,
  261. DP_RX_REFILL_HIST_MAX);
  262. /* No NULL check needed for record since its an array */
  263. record = &soc->rx_refill_ring_history[ring_num]->entry[idx];
  264. hal_get_sw_hptp(soc->hal_soc, hal_ring_hdl, &tp, &hp);
  265. record->timestamp = qdf_get_log_timestamp();
  266. record->num_req = num_req;
  267. record->num_refill = num_refill;
  268. record->hp = hp;
  269. record->tp = tp;
  270. }
  271. #else
  272. static inline void
  273. dp_rx_refill_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  274. hal_ring_handle_t hal_ring_hdl,
  275. uint32_t num_req, uint32_t num_refill)
  276. {
  277. }
  278. #endif
  279. /**
  280. * dp_pdev_nbuf_alloc_and_map_replenish() - Allocate nbuf for desc buffer and
  281. * map
  282. * @dp_soc: struct dp_soc *
  283. * @mac_id: Mac id
  284. * @num_entries_avail: num_entries_avail
  285. * @nbuf_frag_info_t: nbuf frag info
  286. * @dp_pdev: struct dp_pdev *
  287. * @rx_desc_pool: Rx desc pool
  288. *
  289. * Return: QDF_STATUS
  290. */
  291. static inline QDF_STATUS
  292. dp_pdev_nbuf_alloc_and_map_replenish(struct dp_soc *dp_soc,
  293. uint32_t mac_id,
  294. uint32_t num_entries_avail,
  295. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  296. struct dp_pdev *dp_pdev,
  297. struct rx_desc_pool *rx_desc_pool)
  298. {
  299. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  300. (nbuf_frag_info_t->virt_addr).nbuf =
  301. dp_rx_buffer_pool_nbuf_alloc(dp_soc,
  302. mac_id,
  303. rx_desc_pool,
  304. num_entries_avail);
  305. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  306. dp_err("nbuf alloc failed");
  307. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  308. return QDF_STATUS_E_NOMEM;
  309. }
  310. ret = dp_rx_buffer_pool_nbuf_map(dp_soc, rx_desc_pool,
  311. nbuf_frag_info_t);
  312. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  313. dp_rx_buffer_pool_nbuf_free(dp_soc,
  314. (nbuf_frag_info_t->virt_addr).nbuf, mac_id);
  315. dp_err("nbuf map failed");
  316. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  317. return QDF_STATUS_E_FAULT;
  318. }
  319. nbuf_frag_info_t->paddr =
  320. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  321. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, (qdf_nbuf_t)(
  322. (nbuf_frag_info_t->virt_addr).nbuf),
  323. rx_desc_pool->buf_size,
  324. true, __func__, __LINE__);
  325. ret = dp_check_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  326. &nbuf_frag_info_t->paddr,
  327. rx_desc_pool);
  328. if (ret == QDF_STATUS_E_FAILURE) {
  329. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  330. return QDF_STATUS_E_ADDRNOTAVAIL;
  331. }
  332. return QDF_STATUS_SUCCESS;
  333. }
  334. #if defined(QCA_DP_RX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  335. QDF_STATUS
  336. __dp_rx_buffers_no_map_lt_replenish(struct dp_soc *soc, uint32_t mac_id,
  337. struct dp_srng *dp_rxdma_srng,
  338. struct rx_desc_pool *rx_desc_pool)
  339. {
  340. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  341. uint32_t count;
  342. void *rxdma_ring_entry;
  343. union dp_rx_desc_list_elem_t *next = NULL;
  344. void *rxdma_srng;
  345. qdf_nbuf_t nbuf;
  346. qdf_dma_addr_t paddr;
  347. uint16_t num_entries_avail = 0;
  348. uint16_t num_alloc_desc = 0;
  349. union dp_rx_desc_list_elem_t *desc_list = NULL;
  350. union dp_rx_desc_list_elem_t *tail = NULL;
  351. int sync_hw_ptr = 0;
  352. rxdma_srng = dp_rxdma_srng->hal_srng;
  353. if (qdf_unlikely(!dp_pdev)) {
  354. dp_rx_err("%pK: pdev is null for mac_id = %d", soc, mac_id);
  355. return QDF_STATUS_E_FAILURE;
  356. }
  357. if (qdf_unlikely(!rxdma_srng)) {
  358. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  359. return QDF_STATUS_E_FAILURE;
  360. }
  361. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  362. num_entries_avail = hal_srng_src_num_avail(soc->hal_soc,
  363. rxdma_srng,
  364. sync_hw_ptr);
  365. dp_rx_debug("%pK: no of available entries in rxdma ring: %d",
  366. soc, num_entries_avail);
  367. if (qdf_unlikely(num_entries_avail <
  368. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  369. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  370. return QDF_STATUS_E_FAILURE;
  371. }
  372. DP_STATS_INC(dp_pdev, replenish.low_thresh_intrs, 1);
  373. num_alloc_desc = dp_rx_get_free_desc_list(soc, mac_id,
  374. rx_desc_pool,
  375. num_entries_avail,
  376. &desc_list,
  377. &tail);
  378. if (!num_alloc_desc) {
  379. dp_rx_err("%pK: no free rx_descs in freelist", soc);
  380. DP_STATS_INC(dp_pdev, err.desc_lt_alloc_fail,
  381. num_entries_avail);
  382. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  383. return QDF_STATUS_E_NOMEM;
  384. }
  385. for (count = 0; count < num_alloc_desc; count++) {
  386. next = desc_list->next;
  387. qdf_prefetch(next);
  388. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  389. if (qdf_unlikely(!nbuf)) {
  390. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  391. break;
  392. }
  393. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  394. rx_desc_pool->buf_size);
  395. rxdma_ring_entry = hal_srng_src_get_next(soc->hal_soc,
  396. rxdma_srng);
  397. qdf_assert_always(rxdma_ring_entry);
  398. desc_list->rx_desc.nbuf = nbuf;
  399. desc_list->rx_desc.rx_buf_start = nbuf->data;
  400. desc_list->rx_desc.unmapped = 0;
  401. /* rx_desc.in_use should be zero at this time*/
  402. qdf_assert_always(desc_list->rx_desc.in_use == 0);
  403. desc_list->rx_desc.in_use = 1;
  404. desc_list->rx_desc.in_err_state = 0;
  405. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  406. paddr,
  407. desc_list->rx_desc.cookie,
  408. rx_desc_pool->owner);
  409. desc_list = next;
  410. }
  411. qdf_dsb();
  412. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  413. /* No need to count the number of bytes received during replenish.
  414. * Therefore set replenish.pkts.bytes as 0.
  415. */
  416. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  417. DP_STATS_INC(dp_pdev, buf_freelist, (num_alloc_desc - count));
  418. /*
  419. * add any available free desc back to the free list
  420. */
  421. if (desc_list)
  422. dp_rx_add_desc_list_to_free_list(soc, &desc_list, &tail,
  423. mac_id, rx_desc_pool);
  424. return QDF_STATUS_SUCCESS;
  425. }
  426. QDF_STATUS
  427. __dp_rx_buffers_no_map_replenish(struct dp_soc *soc, uint32_t mac_id,
  428. struct dp_srng *dp_rxdma_srng,
  429. struct rx_desc_pool *rx_desc_pool,
  430. uint32_t num_req_buffers,
  431. union dp_rx_desc_list_elem_t **desc_list,
  432. union dp_rx_desc_list_elem_t **tail)
  433. {
  434. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  435. uint32_t count;
  436. void *rxdma_ring_entry;
  437. union dp_rx_desc_list_elem_t *next;
  438. void *rxdma_srng;
  439. qdf_nbuf_t nbuf;
  440. qdf_nbuf_t nbuf_next;
  441. qdf_nbuf_t nbuf_head = NULL;
  442. qdf_nbuf_t nbuf_tail = NULL;
  443. qdf_dma_addr_t paddr;
  444. rxdma_srng = dp_rxdma_srng->hal_srng;
  445. if (qdf_unlikely(!dp_pdev)) {
  446. dp_rx_err("%pK: pdev is null for mac_id = %d",
  447. soc, mac_id);
  448. return QDF_STATUS_E_FAILURE;
  449. }
  450. if (qdf_unlikely(!rxdma_srng)) {
  451. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  452. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  453. return QDF_STATUS_E_FAILURE;
  454. }
  455. /* Allocate required number of nbufs */
  456. for (count = 0; count < num_req_buffers; count++) {
  457. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  458. if (qdf_unlikely(!nbuf)) {
  459. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  460. /* Update num_req_buffers to nbufs allocated count */
  461. num_req_buffers = count;
  462. break;
  463. }
  464. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  465. rx_desc_pool->buf_size);
  466. QDF_NBUF_CB_PADDR(nbuf) = paddr;
  467. DP_RX_LIST_APPEND(nbuf_head,
  468. nbuf_tail,
  469. nbuf);
  470. }
  471. qdf_dsb();
  472. nbuf = nbuf_head;
  473. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  474. for (count = 0; count < num_req_buffers; count++) {
  475. next = (*desc_list)->next;
  476. nbuf_next = nbuf->next;
  477. qdf_prefetch(next);
  478. rxdma_ring_entry = (struct dp_buffer_addr_info *)
  479. hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  480. if (!rxdma_ring_entry)
  481. break;
  482. (*desc_list)->rx_desc.nbuf = nbuf;
  483. (*desc_list)->rx_desc.rx_buf_start = nbuf->data;
  484. (*desc_list)->rx_desc.unmapped = 0;
  485. /* rx_desc.in_use should be zero at this time*/
  486. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  487. (*desc_list)->rx_desc.in_use = 1;
  488. (*desc_list)->rx_desc.in_err_state = 0;
  489. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  490. QDF_NBUF_CB_PADDR(nbuf),
  491. (*desc_list)->rx_desc.cookie,
  492. rx_desc_pool->owner);
  493. *desc_list = next;
  494. nbuf = nbuf_next;
  495. }
  496. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  497. /* No need to count the number of bytes received during replenish.
  498. * Therefore set replenish.pkts.bytes as 0.
  499. */
  500. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  501. DP_STATS_INC(dp_pdev, buf_freelist, (num_req_buffers - count));
  502. /*
  503. * add any available free desc back to the free list
  504. */
  505. if (*desc_list)
  506. dp_rx_add_desc_list_to_free_list(soc, desc_list, tail,
  507. mac_id, rx_desc_pool);
  508. while (nbuf) {
  509. nbuf_next = nbuf->next;
  510. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  511. qdf_nbuf_free(nbuf);
  512. nbuf = nbuf_next;
  513. }
  514. return QDF_STATUS_SUCCESS;
  515. }
  516. QDF_STATUS __dp_pdev_rx_buffers_no_map_attach(struct dp_soc *soc,
  517. uint32_t mac_id,
  518. struct dp_srng *dp_rxdma_srng,
  519. struct rx_desc_pool *rx_desc_pool,
  520. uint32_t num_req_buffers)
  521. {
  522. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  523. uint32_t count;
  524. uint32_t nr_descs = 0;
  525. void *rxdma_ring_entry;
  526. union dp_rx_desc_list_elem_t *next;
  527. void *rxdma_srng;
  528. qdf_nbuf_t nbuf;
  529. qdf_dma_addr_t paddr;
  530. union dp_rx_desc_list_elem_t *desc_list = NULL;
  531. union dp_rx_desc_list_elem_t *tail = NULL;
  532. rxdma_srng = dp_rxdma_srng->hal_srng;
  533. if (qdf_unlikely(!dp_pdev)) {
  534. dp_rx_err("%pK: pdev is null for mac_id = %d",
  535. soc, mac_id);
  536. return QDF_STATUS_E_FAILURE;
  537. }
  538. if (qdf_unlikely(!rxdma_srng)) {
  539. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  540. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  541. return QDF_STATUS_E_FAILURE;
  542. }
  543. dp_rx_debug("%pK: requested %d buffers for replenish",
  544. soc, num_req_buffers);
  545. nr_descs = dp_rx_get_free_desc_list(soc, mac_id, rx_desc_pool,
  546. num_req_buffers, &desc_list, &tail);
  547. if (!nr_descs) {
  548. dp_err("no free rx_descs in freelist");
  549. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  550. return QDF_STATUS_E_NOMEM;
  551. }
  552. dp_debug("got %u RX descs for driver attach", nr_descs);
  553. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  554. for (count = 0; count < nr_descs; count++) {
  555. next = desc_list->next;
  556. qdf_prefetch(next);
  557. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  558. if (qdf_unlikely(!nbuf)) {
  559. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  560. break;
  561. }
  562. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  563. rx_desc_pool->buf_size);
  564. rxdma_ring_entry = (struct dp_buffer_addr_info *)
  565. hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  566. if (!rxdma_ring_entry)
  567. break;
  568. qdf_assert_always(rxdma_ring_entry);
  569. desc_list->rx_desc.nbuf = nbuf;
  570. desc_list->rx_desc.rx_buf_start = nbuf->data;
  571. desc_list->rx_desc.unmapped = 0;
  572. /* rx_desc.in_use should be zero at this time*/
  573. qdf_assert_always(desc_list->rx_desc.in_use == 0);
  574. desc_list->rx_desc.in_use = 1;
  575. desc_list->rx_desc.in_err_state = 0;
  576. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  577. paddr,
  578. desc_list->rx_desc.cookie,
  579. rx_desc_pool->owner);
  580. desc_list = next;
  581. }
  582. qdf_dsb();
  583. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  584. /* No need to count the number of bytes received during replenish.
  585. * Therefore set replenish.pkts.bytes as 0.
  586. */
  587. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  588. return QDF_STATUS_SUCCESS;
  589. }
  590. #endif
  591. #ifdef DP_UMAC_HW_RESET_SUPPORT
  592. #if defined(QCA_DP_RX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  593. static inline
  594. qdf_dma_addr_t dp_rx_rep_retrieve_paddr(struct dp_soc *dp_soc, qdf_nbuf_t nbuf,
  595. uint32_t buf_size)
  596. {
  597. return dp_rx_nbuf_sync_no_dsb(dp_soc, nbuf, buf_size);
  598. }
  599. #else
  600. static inline
  601. qdf_dma_addr_t dp_rx_rep_retrieve_paddr(struct dp_soc *dp_soc, qdf_nbuf_t nbuf,
  602. uint32_t buf_size)
  603. {
  604. return qdf_nbuf_get_frag_paddr(nbuf, 0);
  605. }
  606. #endif
  607. /**
  608. * dp_rx_desc_replenish() - Replenish the rx descriptors one at a time
  609. * @soc: core txrx main context
  610. * @dp_rxdma_srng: rxdma ring
  611. * @rx_desc_pool: rx descriptor pool
  612. * @rx_desc:rx descriptor
  613. *
  614. * Return: void
  615. */
  616. static inline
  617. void dp_rx_desc_replenish(struct dp_soc *soc, struct dp_srng *dp_rxdma_srng,
  618. struct rx_desc_pool *rx_desc_pool,
  619. struct dp_rx_desc *rx_desc)
  620. {
  621. void *rxdma_srng;
  622. void *rxdma_ring_entry;
  623. qdf_dma_addr_t paddr;
  624. rxdma_srng = dp_rxdma_srng->hal_srng;
  625. /* No one else should be accessing the srng at this point */
  626. hal_srng_access_start_unlocked(soc->hal_soc, rxdma_srng);
  627. rxdma_ring_entry = hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  628. qdf_assert_always(rxdma_ring_entry);
  629. rx_desc->in_err_state = 0;
  630. paddr = dp_rx_rep_retrieve_paddr(soc, rx_desc->nbuf,
  631. rx_desc_pool->buf_size);
  632. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry, paddr,
  633. rx_desc->cookie, rx_desc_pool->owner);
  634. hal_srng_access_end_unlocked(soc->hal_soc, rxdma_srng);
  635. }
  636. void dp_rx_desc_reuse(struct dp_soc *soc, qdf_nbuf_t *nbuf_list)
  637. {
  638. int mac_id, i, j;
  639. union dp_rx_desc_list_elem_t *head = NULL;
  640. union dp_rx_desc_list_elem_t *tail = NULL;
  641. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  642. struct dp_srng *dp_rxdma_srng =
  643. &soc->rx_refill_buf_ring[mac_id];
  644. struct rx_desc_pool *rx_desc_pool = &soc->rx_desc_buf[mac_id];
  645. uint32_t rx_sw_desc_num = rx_desc_pool->pool_size;
  646. /* Only fill up 1/3 of the ring size */
  647. uint32_t num_req_decs;
  648. if (!dp_rxdma_srng || !dp_rxdma_srng->hal_srng ||
  649. !rx_desc_pool->array)
  650. continue;
  651. num_req_decs = dp_rxdma_srng->num_entries / 3;
  652. for (i = 0, j = 0; i < rx_sw_desc_num; i++) {
  653. struct dp_rx_desc *rx_desc =
  654. (struct dp_rx_desc *)&rx_desc_pool->array[i];
  655. if (rx_desc->in_use) {
  656. if (j < (dp_rxdma_srng->num_entries - 1)) {
  657. dp_rx_desc_replenish(soc, dp_rxdma_srng,
  658. rx_desc_pool,
  659. rx_desc);
  660. } else {
  661. dp_rx_nbuf_unmap(soc, rx_desc, 0);
  662. rx_desc->unmapped = 0;
  663. rx_desc->nbuf->next = *nbuf_list;
  664. *nbuf_list = rx_desc->nbuf;
  665. dp_rx_add_to_free_desc_list(&head,
  666. &tail,
  667. rx_desc);
  668. }
  669. j++;
  670. }
  671. }
  672. if (head)
  673. dp_rx_add_desc_list_to_free_list(soc, &head, &tail,
  674. mac_id, rx_desc_pool);
  675. /* If num of descs in use were less, then we need to replenish
  676. * the ring with some buffers
  677. */
  678. head = NULL;
  679. tail = NULL;
  680. if (j < (num_req_decs - 1))
  681. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  682. rx_desc_pool,
  683. ((num_req_decs - 1) - j),
  684. &head, &tail, true);
  685. }
  686. }
  687. #endif
  688. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  689. struct dp_srng *dp_rxdma_srng,
  690. struct rx_desc_pool *rx_desc_pool,
  691. uint32_t num_req_buffers,
  692. union dp_rx_desc_list_elem_t **desc_list,
  693. union dp_rx_desc_list_elem_t **tail,
  694. bool req_only, const char *func_name)
  695. {
  696. uint32_t num_alloc_desc;
  697. uint16_t num_desc_to_free = 0;
  698. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  699. uint32_t num_entries_avail;
  700. uint32_t count;
  701. uint32_t extra_buffers;
  702. int sync_hw_ptr = 1;
  703. struct dp_rx_nbuf_frag_info nbuf_frag_info = {0};
  704. void *rxdma_ring_entry;
  705. union dp_rx_desc_list_elem_t *next;
  706. QDF_STATUS ret;
  707. void *rxdma_srng;
  708. union dp_rx_desc_list_elem_t *desc_list_append = NULL;
  709. union dp_rx_desc_list_elem_t *tail_append = NULL;
  710. union dp_rx_desc_list_elem_t *temp_list = NULL;
  711. rxdma_srng = dp_rxdma_srng->hal_srng;
  712. if (qdf_unlikely(!dp_pdev)) {
  713. dp_rx_err("%pK: pdev is null for mac_id = %d",
  714. dp_soc, mac_id);
  715. return QDF_STATUS_E_FAILURE;
  716. }
  717. if (qdf_unlikely(!rxdma_srng)) {
  718. dp_rx_debug("%pK: rxdma srng not initialized", dp_soc);
  719. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  720. return QDF_STATUS_E_FAILURE;
  721. }
  722. dp_verbose_debug("%pK: requested %d buffers for replenish",
  723. dp_soc, num_req_buffers);
  724. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  725. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  726. rxdma_srng,
  727. sync_hw_ptr);
  728. dp_verbose_debug("%pK: no of available entries in rxdma ring: %d",
  729. dp_soc, num_entries_avail);
  730. if (!req_only && !(*desc_list) && (num_entries_avail >
  731. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  732. num_req_buffers = num_entries_avail;
  733. DP_STATS_INC(dp_pdev, replenish.low_thresh_intrs, 1);
  734. } else if (num_entries_avail < num_req_buffers) {
  735. num_desc_to_free = num_req_buffers - num_entries_avail;
  736. num_req_buffers = num_entries_avail;
  737. } else if ((*desc_list) &&
  738. dp_rxdma_srng->num_entries - num_entries_avail <
  739. CRITICAL_BUFFER_THRESHOLD) {
  740. /* set extra buffers to CRITICAL_BUFFER_THRESHOLD only if
  741. * total buff requested after adding extra buffers is less
  742. * than or equal to num entries available, else set it to max
  743. * possible additional buffers available at that moment
  744. */
  745. extra_buffers =
  746. ((num_req_buffers + CRITICAL_BUFFER_THRESHOLD) > num_entries_avail) ?
  747. (num_entries_avail - num_req_buffers) :
  748. CRITICAL_BUFFER_THRESHOLD;
  749. /* Append some free descriptors to tail */
  750. num_alloc_desc =
  751. dp_rx_get_free_desc_list(dp_soc, mac_id,
  752. rx_desc_pool,
  753. extra_buffers,
  754. &desc_list_append,
  755. &tail_append);
  756. if (num_alloc_desc) {
  757. temp_list = *desc_list;
  758. *desc_list = desc_list_append;
  759. tail_append->next = temp_list;
  760. num_req_buffers += num_alloc_desc;
  761. DP_STATS_DEC(dp_pdev,
  762. replenish.free_list,
  763. num_alloc_desc);
  764. } else
  765. dp_err_rl("%pK: no free rx_descs in freelist", dp_soc);
  766. }
  767. if (qdf_unlikely(!num_req_buffers)) {
  768. num_desc_to_free = num_req_buffers;
  769. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  770. goto free_descs;
  771. }
  772. /*
  773. * if desc_list is NULL, allocate the descs from freelist
  774. */
  775. if (!(*desc_list)) {
  776. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  777. rx_desc_pool,
  778. num_req_buffers,
  779. desc_list,
  780. tail);
  781. if (!num_alloc_desc) {
  782. dp_rx_err("%pK: no free rx_descs in freelist", dp_soc);
  783. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  784. num_req_buffers);
  785. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  786. return QDF_STATUS_E_NOMEM;
  787. }
  788. dp_verbose_debug("%pK: %d rx desc allocated", dp_soc,
  789. num_alloc_desc);
  790. num_req_buffers = num_alloc_desc;
  791. }
  792. count = 0;
  793. while (count < num_req_buffers) {
  794. /* Flag is set while pdev rx_desc_pool initialization */
  795. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  796. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  797. &nbuf_frag_info,
  798. dp_pdev,
  799. rx_desc_pool);
  800. else
  801. ret = dp_pdev_nbuf_alloc_and_map_replenish(dp_soc,
  802. mac_id,
  803. num_entries_avail, &nbuf_frag_info,
  804. dp_pdev, rx_desc_pool);
  805. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  806. if (qdf_unlikely(ret == QDF_STATUS_E_FAULT))
  807. continue;
  808. break;
  809. }
  810. count++;
  811. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  812. rxdma_srng);
  813. qdf_assert_always(rxdma_ring_entry);
  814. next = (*desc_list)->next;
  815. /* Flag is set while pdev rx_desc_pool initialization */
  816. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  817. dp_rx_desc_frag_prep(&((*desc_list)->rx_desc),
  818. &nbuf_frag_info);
  819. else
  820. dp_rx_desc_prep(&((*desc_list)->rx_desc),
  821. &nbuf_frag_info);
  822. /* rx_desc.in_use should be zero at this time*/
  823. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  824. (*desc_list)->rx_desc.in_use = 1;
  825. (*desc_list)->rx_desc.in_err_state = 0;
  826. dp_rx_desc_update_dbg_info(&(*desc_list)->rx_desc,
  827. func_name, RX_DESC_REPLENISHED);
  828. dp_verbose_debug("rx_netbuf=%pK, paddr=0x%llx, cookie=%d",
  829. nbuf_frag_info.virt_addr.nbuf,
  830. (unsigned long long)(nbuf_frag_info.paddr),
  831. (*desc_list)->rx_desc.cookie);
  832. hal_rxdma_buff_addr_info_set(dp_soc->hal_soc, rxdma_ring_entry,
  833. nbuf_frag_info.paddr,
  834. (*desc_list)->rx_desc.cookie,
  835. rx_desc_pool->owner);
  836. *desc_list = next;
  837. }
  838. dp_rx_refill_ring_record_entry(dp_soc, dp_pdev->lmac_id, rxdma_srng,
  839. num_req_buffers, count);
  840. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  841. dp_rx_schedule_refill_thread(dp_soc);
  842. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  843. count, num_desc_to_free);
  844. /* No need to count the number of bytes received during replenish.
  845. * Therefore set replenish.pkts.bytes as 0.
  846. */
  847. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  848. DP_STATS_INC(dp_pdev, replenish.free_list, num_req_buffers - count);
  849. free_descs:
  850. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  851. /*
  852. * add any available free desc back to the free list
  853. */
  854. if (*desc_list)
  855. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  856. mac_id, rx_desc_pool);
  857. return QDF_STATUS_SUCCESS;
  858. }
  859. qdf_export_symbol(__dp_rx_buffers_replenish);
  860. void
  861. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  862. struct dp_txrx_peer *txrx_peer)
  863. {
  864. qdf_nbuf_t deliver_list_head = NULL;
  865. qdf_nbuf_t deliver_list_tail = NULL;
  866. qdf_nbuf_t nbuf;
  867. nbuf = nbuf_list;
  868. while (nbuf) {
  869. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  870. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  871. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  872. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.raw, 1,
  873. qdf_nbuf_len(nbuf));
  874. /*
  875. * reset the chfrag_start and chfrag_end bits in nbuf cb
  876. * as this is a non-amsdu pkt and RAW mode simulation expects
  877. * these bit s to be 0 for non-amsdu pkt.
  878. */
  879. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  880. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  881. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  882. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  883. }
  884. nbuf = next;
  885. }
  886. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  887. &deliver_list_tail);
  888. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  889. }
  890. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  891. #ifndef FEATURE_WDS
  892. void dp_rx_da_learn(struct dp_soc *soc, uint8_t *rx_tlv_hdr,
  893. struct dp_txrx_peer *ta_peer, qdf_nbuf_t nbuf)
  894. {
  895. }
  896. #endif
  897. #ifdef QCA_SUPPORT_TX_MIN_RATES_FOR_SPECIAL_FRAMES
  898. /**
  899. * dp_classify_critical_pkts() - API for marking critical packets
  900. * @soc: dp_soc context
  901. * @vdev: vdev on which packet is to be sent
  902. * @nbuf: nbuf that has to be classified
  903. *
  904. * The function parses the packet, identifies whether its a critical frame and
  905. * marks QDF_NBUF_CB_TX_EXTRA_IS_CRITICAL bit in qdf_nbuf_cb for the nbuf.
  906. * Code for marking which frames are CRITICAL is accessed via callback.
  907. * EAPOL, ARP, DHCP, DHCPv6, ICMPv6 NS/NA are the typical critical frames.
  908. *
  909. * Return: None
  910. */
  911. static
  912. void dp_classify_critical_pkts(struct dp_soc *soc, struct dp_vdev *vdev,
  913. qdf_nbuf_t nbuf)
  914. {
  915. if (vdev->tx_classify_critical_pkt_cb)
  916. vdev->tx_classify_critical_pkt_cb(vdev->osif_vdev, nbuf);
  917. }
  918. #else
  919. static inline
  920. void dp_classify_critical_pkts(struct dp_soc *soc, struct dp_vdev *vdev,
  921. qdf_nbuf_t nbuf)
  922. {
  923. }
  924. #endif
  925. #ifdef QCA_OL_TX_MULTIQ_SUPPORT
  926. static inline
  927. void dp_rx_nbuf_queue_mapping_set(qdf_nbuf_t nbuf, uint8_t ring_id)
  928. {
  929. qdf_nbuf_set_queue_mapping(nbuf, ring_id);
  930. }
  931. #else
  932. static inline
  933. void dp_rx_nbuf_queue_mapping_set(qdf_nbuf_t nbuf, uint8_t ring_id)
  934. {
  935. }
  936. #endif
  937. bool dp_rx_intrabss_mcbc_fwd(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  938. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  939. struct cdp_tid_rx_stats *tid_stats)
  940. {
  941. uint16_t len;
  942. qdf_nbuf_t nbuf_copy;
  943. if (dp_rx_intrabss_eapol_drop_check(soc, ta_peer, rx_tlv_hdr,
  944. nbuf))
  945. return true;
  946. if (!dp_rx_check_ndi_mdns_fwding(ta_peer, nbuf))
  947. return false;
  948. /* If the source peer in the isolation list
  949. * then dont forward instead push to bridge stack
  950. */
  951. if (dp_get_peer_isolation(ta_peer))
  952. return false;
  953. nbuf_copy = qdf_nbuf_copy(nbuf);
  954. if (!nbuf_copy)
  955. return false;
  956. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  957. qdf_mem_set(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  958. dp_classify_critical_pkts(soc, ta_peer->vdev, nbuf_copy);
  959. if (soc->arch_ops.dp_rx_intrabss_mcast_handler(soc, ta_peer,
  960. nbuf_copy,
  961. tid_stats))
  962. return false;
  963. /* Don't send packets if tx is paused */
  964. if (!soc->is_tx_pause &&
  965. !dp_tx_send((struct cdp_soc_t *)soc,
  966. ta_peer->vdev->vdev_id, nbuf_copy)) {
  967. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  968. len);
  969. tid_stats->intrabss_cnt++;
  970. } else {
  971. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  972. len);
  973. tid_stats->fail_cnt[INTRABSS_DROP]++;
  974. dp_rx_nbuf_free(nbuf_copy);
  975. }
  976. return false;
  977. }
  978. bool dp_rx_intrabss_ucast_fwd(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  979. uint8_t tx_vdev_id,
  980. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  981. struct cdp_tid_rx_stats *tid_stats)
  982. {
  983. uint16_t len;
  984. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  985. /* linearize the nbuf just before we send to
  986. * dp_tx_send()
  987. */
  988. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  989. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  990. return false;
  991. nbuf = qdf_nbuf_unshare(nbuf);
  992. if (!nbuf) {
  993. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer,
  994. rx.intra_bss.fail,
  995. 1, len);
  996. /* return true even though the pkt is
  997. * not forwarded. Basically skb_unshare
  998. * failed and we want to continue with
  999. * next nbuf.
  1000. */
  1001. tid_stats->fail_cnt[INTRABSS_DROP]++;
  1002. return false;
  1003. }
  1004. }
  1005. qdf_mem_set(nbuf->cb, 0x0, sizeof(nbuf->cb));
  1006. dp_classify_critical_pkts(soc, ta_peer->vdev, nbuf);
  1007. /* Don't send packets if tx is paused */
  1008. if (!soc->is_tx_pause && !dp_tx_send((struct cdp_soc_t *)soc,
  1009. tx_vdev_id, nbuf)) {
  1010. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  1011. len);
  1012. } else {
  1013. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  1014. len);
  1015. tid_stats->fail_cnt[INTRABSS_DROP]++;
  1016. return false;
  1017. }
  1018. return true;
  1019. }
  1020. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1021. #ifdef MESH_MODE_SUPPORT
  1022. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1023. uint8_t *rx_tlv_hdr,
  1024. struct dp_txrx_peer *txrx_peer)
  1025. {
  1026. struct mesh_recv_hdr_s *rx_info = NULL;
  1027. uint32_t pkt_type;
  1028. uint32_t nss;
  1029. uint32_t rate_mcs;
  1030. uint32_t bw;
  1031. uint8_t primary_chan_num;
  1032. uint32_t center_chan_freq;
  1033. struct dp_soc *soc = vdev->pdev->soc;
  1034. struct dp_peer *peer;
  1035. struct dp_peer *primary_link_peer;
  1036. struct dp_soc *link_peer_soc;
  1037. cdp_peer_stats_param_t buf = {0};
  1038. /* fill recv mesh stats */
  1039. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  1040. /* upper layers are responsible to free this memory */
  1041. if (!rx_info) {
  1042. dp_rx_err("%pK: Memory allocation failed for mesh rx stats",
  1043. vdev->pdev->soc);
  1044. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  1045. return;
  1046. }
  1047. rx_info->rs_flags = MESH_RXHDR_VER1;
  1048. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  1049. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  1050. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  1051. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  1052. peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id, DP_MOD_ID_MESH);
  1053. if (peer) {
  1054. if (hal_rx_tlv_get_is_decrypted(soc->hal_soc, rx_tlv_hdr)) {
  1055. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  1056. rx_info->rs_keyix = hal_rx_msdu_get_keyid(soc->hal_soc,
  1057. rx_tlv_hdr);
  1058. if (vdev->osif_get_key)
  1059. vdev->osif_get_key(vdev->osif_vdev,
  1060. &rx_info->rs_decryptkey[0],
  1061. &peer->mac_addr.raw[0],
  1062. rx_info->rs_keyix);
  1063. }
  1064. dp_peer_unref_delete(peer, DP_MOD_ID_MESH);
  1065. }
  1066. primary_link_peer = dp_get_primary_link_peer_by_id(soc,
  1067. txrx_peer->peer_id,
  1068. DP_MOD_ID_MESH);
  1069. if (qdf_likely(primary_link_peer)) {
  1070. link_peer_soc = primary_link_peer->vdev->pdev->soc;
  1071. dp_monitor_peer_get_stats_param(link_peer_soc,
  1072. primary_link_peer,
  1073. cdp_peer_rx_snr, &buf);
  1074. rx_info->rs_snr = buf.rx_snr;
  1075. dp_peer_unref_delete(primary_link_peer, DP_MOD_ID_MESH);
  1076. }
  1077. rx_info->rs_rssi = rx_info->rs_snr + DP_DEFAULT_NOISEFLOOR;
  1078. soc = vdev->pdev->soc;
  1079. primary_chan_num = hal_rx_tlv_get_freq(soc->hal_soc, rx_tlv_hdr);
  1080. center_chan_freq = hal_rx_tlv_get_freq(soc->hal_soc, rx_tlv_hdr) >> 16;
  1081. if (soc->cdp_soc.ol_ops && soc->cdp_soc.ol_ops->freq_to_band) {
  1082. rx_info->rs_band = soc->cdp_soc.ol_ops->freq_to_band(
  1083. soc->ctrl_psoc,
  1084. vdev->pdev->pdev_id,
  1085. center_chan_freq);
  1086. }
  1087. rx_info->rs_channel = primary_chan_num;
  1088. pkt_type = hal_rx_tlv_get_pkt_type(soc->hal_soc, rx_tlv_hdr);
  1089. rate_mcs = hal_rx_tlv_rate_mcs_get(soc->hal_soc, rx_tlv_hdr);
  1090. bw = hal_rx_tlv_bw_get(soc->hal_soc, rx_tlv_hdr);
  1091. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1092. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  1093. (bw << 24);
  1094. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  1095. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  1096. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x, snr %x"),
  1097. rx_info->rs_flags,
  1098. rx_info->rs_rssi,
  1099. rx_info->rs_channel,
  1100. rx_info->rs_ratephy1,
  1101. rx_info->rs_keyix,
  1102. rx_info->rs_snr);
  1103. }
  1104. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1105. uint8_t *rx_tlv_hdr)
  1106. {
  1107. union dp_align_mac_addr mac_addr;
  1108. struct dp_soc *soc = vdev->pdev->soc;
  1109. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  1110. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  1111. if (hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  1112. rx_tlv_hdr))
  1113. return QDF_STATUS_SUCCESS;
  1114. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  1115. if (hal_rx_mpdu_get_to_ds(soc->hal_soc,
  1116. rx_tlv_hdr))
  1117. return QDF_STATUS_SUCCESS;
  1118. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  1119. if (!hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  1120. rx_tlv_hdr) &&
  1121. !hal_rx_mpdu_get_to_ds(soc->hal_soc,
  1122. rx_tlv_hdr))
  1123. return QDF_STATUS_SUCCESS;
  1124. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  1125. if (hal_rx_mpdu_get_addr1(soc->hal_soc,
  1126. rx_tlv_hdr,
  1127. &mac_addr.raw[0]))
  1128. return QDF_STATUS_E_FAILURE;
  1129. if (!qdf_mem_cmp(&mac_addr.raw[0],
  1130. &vdev->mac_addr.raw[0],
  1131. QDF_MAC_ADDR_SIZE))
  1132. return QDF_STATUS_SUCCESS;
  1133. }
  1134. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  1135. if (hal_rx_mpdu_get_addr2(soc->hal_soc,
  1136. rx_tlv_hdr,
  1137. &mac_addr.raw[0]))
  1138. return QDF_STATUS_E_FAILURE;
  1139. if (!qdf_mem_cmp(&mac_addr.raw[0],
  1140. &vdev->mac_addr.raw[0],
  1141. QDF_MAC_ADDR_SIZE))
  1142. return QDF_STATUS_SUCCESS;
  1143. }
  1144. }
  1145. return QDF_STATUS_E_FAILURE;
  1146. }
  1147. #else
  1148. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1149. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer)
  1150. {
  1151. }
  1152. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1153. uint8_t *rx_tlv_hdr)
  1154. {
  1155. return QDF_STATUS_E_FAILURE;
  1156. }
  1157. #endif
  1158. #ifdef RX_PEER_INVALID_ENH
  1159. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  1160. uint8_t mac_id)
  1161. {
  1162. struct dp_invalid_peer_msg msg;
  1163. struct dp_vdev *vdev = NULL;
  1164. struct dp_pdev *pdev = NULL;
  1165. struct ieee80211_frame *wh;
  1166. qdf_nbuf_t curr_nbuf, next_nbuf;
  1167. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  1168. uint8_t *rx_pkt_hdr = NULL;
  1169. int i = 0;
  1170. if (!HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, rx_tlv_hdr)) {
  1171. dp_rx_debug("%pK: Drop decapped frames", soc);
  1172. goto free;
  1173. }
  1174. /* In RAW packet, packet header will be part of data */
  1175. rx_pkt_hdr = rx_tlv_hdr + soc->rx_pkt_tlv_size;
  1176. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  1177. if (!DP_FRAME_IS_DATA(wh)) {
  1178. dp_rx_debug("%pK: NAWDS valid only for data frames", soc);
  1179. goto free;
  1180. }
  1181. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  1182. dp_rx_err("%pK: Invalid nbuf length", soc);
  1183. goto free;
  1184. }
  1185. /* In DMAC case the rx_desc_pools are common across PDEVs
  1186. * so PDEV cannot be derived from the pool_id.
  1187. *
  1188. * link_id need to derived from the TLV tag word which is
  1189. * disabled by default. For now adding a WAR to get vdev
  1190. * with brute force this need to fixed with word based subscription
  1191. * support is added by enabling TLV tag word
  1192. */
  1193. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1194. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1195. pdev = soc->pdev_list[i];
  1196. if (!pdev || qdf_unlikely(pdev->is_pdev_down))
  1197. continue;
  1198. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1199. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1200. QDF_MAC_ADDR_SIZE) == 0) {
  1201. goto out;
  1202. }
  1203. }
  1204. }
  1205. } else {
  1206. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1207. if (!pdev || qdf_unlikely(pdev->is_pdev_down)) {
  1208. dp_rx_err("%pK: PDEV %s",
  1209. soc, !pdev ? "not found" : "down");
  1210. goto free;
  1211. }
  1212. if (dp_monitor_filter_neighbour_peer(pdev, rx_pkt_hdr) ==
  1213. QDF_STATUS_SUCCESS)
  1214. return 0;
  1215. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1216. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1217. QDF_MAC_ADDR_SIZE) == 0) {
  1218. goto out;
  1219. }
  1220. }
  1221. }
  1222. if (!vdev) {
  1223. dp_rx_err("%pK: VDEV not found", soc);
  1224. goto free;
  1225. }
  1226. out:
  1227. msg.wh = wh;
  1228. qdf_nbuf_pull_head(mpdu, soc->rx_pkt_tlv_size);
  1229. msg.nbuf = mpdu;
  1230. msg.vdev_id = vdev->vdev_id;
  1231. /*
  1232. * NOTE: Only valid for HKv1.
  1233. * If smart monitor mode is enabled on RE, we are getting invalid
  1234. * peer frames with RA as STA mac of RE and the TA not matching
  1235. * with any NAC list or the the BSSID.Such frames need to dropped
  1236. * in order to avoid HM_WDS false addition.
  1237. */
  1238. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer) {
  1239. if (dp_monitor_drop_inv_peer_pkts(vdev) == QDF_STATUS_SUCCESS) {
  1240. dp_rx_warn("%pK: Drop inv peer pkts with STA RA:%pm",
  1241. soc, wh->i_addr1);
  1242. goto free;
  1243. }
  1244. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(
  1245. (struct cdp_ctrl_objmgr_psoc *)soc->ctrl_psoc,
  1246. pdev->pdev_id, &msg);
  1247. }
  1248. free:
  1249. /* Drop and free packet */
  1250. curr_nbuf = mpdu;
  1251. while (curr_nbuf) {
  1252. next_nbuf = qdf_nbuf_next(curr_nbuf);
  1253. dp_rx_nbuf_free(curr_nbuf);
  1254. curr_nbuf = next_nbuf;
  1255. }
  1256. return 0;
  1257. }
  1258. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  1259. qdf_nbuf_t mpdu, bool mpdu_done,
  1260. uint8_t mac_id)
  1261. {
  1262. /* Only trigger the process when mpdu is completed */
  1263. if (mpdu_done)
  1264. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  1265. }
  1266. #else
  1267. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  1268. uint8_t mac_id)
  1269. {
  1270. qdf_nbuf_t curr_nbuf, next_nbuf;
  1271. struct dp_pdev *pdev;
  1272. struct dp_vdev *vdev = NULL;
  1273. struct ieee80211_frame *wh;
  1274. struct dp_peer *peer = NULL;
  1275. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  1276. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(soc->hal_soc, rx_tlv_hdr);
  1277. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  1278. if (!DP_FRAME_IS_DATA(wh)) {
  1279. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  1280. "only for data frames");
  1281. goto free;
  1282. }
  1283. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  1284. dp_rx_info_rl("%pK: Invalid nbuf length", soc);
  1285. goto free;
  1286. }
  1287. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1288. if (!pdev) {
  1289. dp_rx_info_rl("%pK: PDEV not found", soc);
  1290. goto free;
  1291. }
  1292. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1293. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1294. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1295. QDF_MAC_ADDR_SIZE) == 0) {
  1296. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1297. goto out;
  1298. }
  1299. }
  1300. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1301. if (!vdev) {
  1302. dp_rx_info_rl("%pK: VDEV not found", soc);
  1303. goto free;
  1304. }
  1305. out:
  1306. if (vdev->opmode == wlan_op_mode_ap) {
  1307. peer = dp_peer_find_hash_find(soc, wh->i_addr2, 0,
  1308. vdev->vdev_id,
  1309. DP_MOD_ID_RX_ERR);
  1310. /* If SA is a valid peer in vdev,
  1311. * don't send disconnect
  1312. */
  1313. if (peer) {
  1314. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  1315. DP_STATS_INC(soc, rx.err.decrypt_err_drop, 1);
  1316. dp_err_rl("invalid peer frame with correct SA/RA is freed");
  1317. goto free;
  1318. }
  1319. }
  1320. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  1321. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  1322. free:
  1323. /* Drop and free packet */
  1324. curr_nbuf = mpdu;
  1325. while (curr_nbuf) {
  1326. next_nbuf = qdf_nbuf_next(curr_nbuf);
  1327. dp_rx_nbuf_free(curr_nbuf);
  1328. curr_nbuf = next_nbuf;
  1329. }
  1330. /* Reset the head and tail pointers */
  1331. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1332. if (pdev) {
  1333. pdev->invalid_peer_head_msdu = NULL;
  1334. pdev->invalid_peer_tail_msdu = NULL;
  1335. }
  1336. return 0;
  1337. }
  1338. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  1339. qdf_nbuf_t mpdu, bool mpdu_done,
  1340. uint8_t mac_id)
  1341. {
  1342. /* Process the nbuf */
  1343. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  1344. }
  1345. #endif
  1346. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1347. #ifdef RECEIVE_OFFLOAD
  1348. /**
  1349. * dp_rx_print_offload_info() - Print offload info from RX TLV
  1350. * @soc: dp soc handle
  1351. * @msdu: MSDU for which the offload info is to be printed
  1352. *
  1353. * Return: None
  1354. */
  1355. static void dp_rx_print_offload_info(struct dp_soc *soc,
  1356. qdf_nbuf_t msdu)
  1357. {
  1358. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  1359. dp_verbose_debug("lro_eligible 0x%x",
  1360. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu));
  1361. dp_verbose_debug("pure_ack 0x%x", QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu));
  1362. dp_verbose_debug("chksum 0x%x", QDF_NBUF_CB_RX_TCP_CHKSUM(msdu));
  1363. dp_verbose_debug("TCP seq num 0x%x", QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu));
  1364. dp_verbose_debug("TCP ack num 0x%x", QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu));
  1365. dp_verbose_debug("TCP window 0x%x", QDF_NBUF_CB_RX_TCP_WIN(msdu));
  1366. dp_verbose_debug("TCP protocol 0x%x", QDF_NBUF_CB_RX_TCP_PROTO(msdu));
  1367. dp_verbose_debug("TCP offset 0x%x", QDF_NBUF_CB_RX_TCP_OFFSET(msdu));
  1368. dp_verbose_debug("toeplitz 0x%x", QDF_NBUF_CB_RX_FLOW_ID(msdu));
  1369. dp_verbose_debug("---------------------------------------------------------");
  1370. }
  1371. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1372. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  1373. {
  1374. struct hal_offload_info offload_info;
  1375. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  1376. return;
  1377. if (hal_rx_tlv_get_offload_info(soc->hal_soc, rx_tlv, &offload_info))
  1378. return;
  1379. *rx_ol_pkt_cnt = *rx_ol_pkt_cnt + 1;
  1380. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) = offload_info.lro_eligible;
  1381. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) = offload_info.tcp_pure_ack;
  1382. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  1383. hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  1384. rx_tlv);
  1385. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) = offload_info.tcp_seq_num;
  1386. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) = offload_info.tcp_ack_num;
  1387. QDF_NBUF_CB_RX_TCP_WIN(msdu) = offload_info.tcp_win;
  1388. QDF_NBUF_CB_RX_TCP_PROTO(msdu) = offload_info.tcp_proto;
  1389. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) = offload_info.ipv6_proto;
  1390. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) = offload_info.tcp_offset;
  1391. QDF_NBUF_CB_RX_FLOW_ID(msdu) = offload_info.flow_id;
  1392. dp_rx_print_offload_info(soc, msdu);
  1393. }
  1394. #endif /* RECEIVE_OFFLOAD */
  1395. /**
  1396. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  1397. *
  1398. * @soc: DP soc handle
  1399. * @nbuf: pointer to msdu.
  1400. * @mpdu_len: mpdu length
  1401. * @l3_pad_len: L3 padding length by HW
  1402. *
  1403. * Return: returns true if nbuf is last msdu of mpdu else returns false.
  1404. */
  1405. static inline bool dp_rx_adjust_nbuf_len(struct dp_soc *soc,
  1406. qdf_nbuf_t nbuf,
  1407. uint16_t *mpdu_len,
  1408. uint32_t l3_pad_len)
  1409. {
  1410. bool last_nbuf;
  1411. uint32_t pkt_hdr_size;
  1412. pkt_hdr_size = soc->rx_pkt_tlv_size + l3_pad_len;
  1413. if ((*mpdu_len + pkt_hdr_size) > RX_DATA_BUFFER_SIZE) {
  1414. qdf_nbuf_set_pktlen(nbuf, RX_DATA_BUFFER_SIZE);
  1415. last_nbuf = false;
  1416. *mpdu_len -= (RX_DATA_BUFFER_SIZE - pkt_hdr_size);
  1417. } else {
  1418. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + pkt_hdr_size));
  1419. last_nbuf = true;
  1420. *mpdu_len = 0;
  1421. }
  1422. return last_nbuf;
  1423. }
  1424. /**
  1425. * dp_get_l3_hdr_pad_len() - get L3 header padding length.
  1426. *
  1427. * @soc: DP soc handle
  1428. * @nbuf: pointer to msdu.
  1429. *
  1430. * Return: returns padding length in bytes.
  1431. */
  1432. static inline uint32_t dp_get_l3_hdr_pad_len(struct dp_soc *soc,
  1433. qdf_nbuf_t nbuf)
  1434. {
  1435. uint32_t l3_hdr_pad = 0;
  1436. uint8_t *rx_tlv_hdr;
  1437. struct hal_rx_msdu_metadata msdu_metadata;
  1438. while (nbuf) {
  1439. if (!qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  1440. /* scattered msdu end with continuation is 0 */
  1441. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1442. hal_rx_msdu_metadata_get(soc->hal_soc,
  1443. rx_tlv_hdr,
  1444. &msdu_metadata);
  1445. l3_hdr_pad = msdu_metadata.l3_hdr_pad;
  1446. break;
  1447. }
  1448. nbuf = nbuf->next;
  1449. }
  1450. return l3_hdr_pad;
  1451. }
  1452. qdf_nbuf_t dp_rx_sg_create(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1453. {
  1454. qdf_nbuf_t parent, frag_list, next = NULL;
  1455. uint16_t frag_list_len = 0;
  1456. uint16_t mpdu_len;
  1457. bool last_nbuf;
  1458. uint32_t l3_hdr_pad_offset = 0;
  1459. /*
  1460. * Use msdu len got from REO entry descriptor instead since
  1461. * there is case the RX PKT TLV is corrupted while msdu_len
  1462. * from REO descriptor is right for non-raw RX scatter msdu.
  1463. */
  1464. mpdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1465. /*
  1466. * this is a case where the complete msdu fits in one single nbuf.
  1467. * in this case HW sets both start and end bit and we only need to
  1468. * reset these bits for RAW mode simulator to decap the pkt
  1469. */
  1470. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  1471. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  1472. qdf_nbuf_set_pktlen(nbuf, mpdu_len + soc->rx_pkt_tlv_size);
  1473. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1474. return nbuf;
  1475. }
  1476. l3_hdr_pad_offset = dp_get_l3_hdr_pad_len(soc, nbuf);
  1477. /*
  1478. * This is a case where we have multiple msdus (A-MSDU) spread across
  1479. * multiple nbufs. here we create a fraglist out of these nbufs.
  1480. *
  1481. * the moment we encounter a nbuf with continuation bit set we
  1482. * know for sure we have an MSDU which is spread across multiple
  1483. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  1484. */
  1485. parent = nbuf;
  1486. frag_list = nbuf->next;
  1487. nbuf = nbuf->next;
  1488. /*
  1489. * set the start bit in the first nbuf we encounter with continuation
  1490. * bit set. This has the proper mpdu length set as it is the first
  1491. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  1492. * nbufs will form the frag_list of the parent nbuf.
  1493. */
  1494. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  1495. /*
  1496. * L3 header padding is only needed for the 1st buffer
  1497. * in a scattered msdu
  1498. */
  1499. last_nbuf = dp_rx_adjust_nbuf_len(soc, parent, &mpdu_len,
  1500. l3_hdr_pad_offset);
  1501. /*
  1502. * MSDU cont bit is set but reported MPDU length can fit
  1503. * in to single buffer
  1504. *
  1505. * Increment error stats and avoid SG list creation
  1506. */
  1507. if (last_nbuf) {
  1508. DP_STATS_INC(soc, rx.err.msdu_continuation_err, 1);
  1509. qdf_nbuf_pull_head(parent,
  1510. soc->rx_pkt_tlv_size + l3_hdr_pad_offset);
  1511. return parent;
  1512. }
  1513. /*
  1514. * this is where we set the length of the fragments which are
  1515. * associated to the parent nbuf. We iterate through the frag_list
  1516. * till we hit the last_nbuf of the list.
  1517. */
  1518. do {
  1519. last_nbuf = dp_rx_adjust_nbuf_len(soc, nbuf, &mpdu_len, 0);
  1520. qdf_nbuf_pull_head(nbuf,
  1521. soc->rx_pkt_tlv_size);
  1522. frag_list_len += qdf_nbuf_len(nbuf);
  1523. if (last_nbuf) {
  1524. next = nbuf->next;
  1525. nbuf->next = NULL;
  1526. break;
  1527. } else if (qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  1528. dp_err("Invalid packet length\n");
  1529. qdf_assert_always(0);
  1530. }
  1531. nbuf = nbuf->next;
  1532. } while (!last_nbuf);
  1533. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  1534. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  1535. parent->next = next;
  1536. qdf_nbuf_pull_head(parent,
  1537. soc->rx_pkt_tlv_size + l3_hdr_pad_offset);
  1538. return parent;
  1539. }
  1540. #ifdef DP_RX_SG_FRAME_SUPPORT
  1541. bool dp_rx_is_sg_supported(void)
  1542. {
  1543. return true;
  1544. }
  1545. #else
  1546. bool dp_rx_is_sg_supported(void)
  1547. {
  1548. return false;
  1549. }
  1550. #endif
  1551. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1552. #ifdef QCA_PEER_EXT_STATS
  1553. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1554. qdf_nbuf_t nbuf)
  1555. {
  1556. struct cdp_delay_rx_stats *rx_delay = &stats->rx_delay;
  1557. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1558. dp_hist_update_stats(&rx_delay->to_stack_delay, to_stack);
  1559. }
  1560. #endif /* QCA_PEER_EXT_STATS */
  1561. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1562. {
  1563. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1564. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  1565. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1566. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1567. uint32_t interframe_delay =
  1568. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  1569. struct cdp_tid_rx_stats *rstats =
  1570. &vdev->pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1571. dp_update_delay_stats(NULL, rstats, to_stack, tid,
  1572. CDP_DELAY_STATS_REAP_STACK, ring_id, false);
  1573. /*
  1574. * Update interframe delay stats calculated at deliver_data_ol point.
  1575. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  1576. * interframe delay will not be calculate correctly for 1st frame.
  1577. * On the other side, this will help in avoiding extra per packet check
  1578. * of vdev->prev_rx_deliver_tstamp.
  1579. */
  1580. dp_update_delay_stats(NULL, rstats, interframe_delay, tid,
  1581. CDP_DELAY_STATS_RX_INTERFRAME, ring_id, false);
  1582. vdev->prev_rx_deliver_tstamp = current_ts;
  1583. }
  1584. /**
  1585. * dp_rx_drop_nbuf_list() - drop an nbuf list
  1586. * @pdev: dp pdev reference
  1587. * @buf_list: buffer list to be dropepd
  1588. *
  1589. * Return: int (number of bufs dropped)
  1590. */
  1591. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  1592. qdf_nbuf_t buf_list)
  1593. {
  1594. struct cdp_tid_rx_stats *stats = NULL;
  1595. uint8_t tid = 0, ring_id = 0;
  1596. int num_dropped = 0;
  1597. qdf_nbuf_t buf, next_buf;
  1598. buf = buf_list;
  1599. while (buf) {
  1600. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  1601. next_buf = qdf_nbuf_queue_next(buf);
  1602. tid = qdf_nbuf_get_tid_val(buf);
  1603. if (qdf_likely(pdev)) {
  1604. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1605. stats->fail_cnt[INVALID_PEER_VDEV]++;
  1606. stats->delivered_to_stack--;
  1607. }
  1608. dp_rx_nbuf_free(buf);
  1609. buf = next_buf;
  1610. num_dropped++;
  1611. }
  1612. return num_dropped;
  1613. }
  1614. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1615. /**
  1616. * dp_rx_deliver_to_stack_ext() - Deliver to netdev per sta
  1617. * @soc: core txrx main context
  1618. * @vdev: vdev
  1619. * @txrx_peer: txrx peer
  1620. * @nbuf_head: skb list head
  1621. *
  1622. * Return: true if packet is delivered to netdev per STA.
  1623. */
  1624. static inline bool
  1625. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1626. struct dp_txrx_peer *txrx_peer, qdf_nbuf_t nbuf_head)
  1627. {
  1628. /*
  1629. * When extended WDS is disabled, frames are sent to AP netdevice.
  1630. */
  1631. if (qdf_likely(!vdev->wds_ext_enabled))
  1632. return false;
  1633. /*
  1634. * There can be 2 cases:
  1635. * 1. Send frame to parent netdev if its not for netdev per STA
  1636. * 2. If frame is meant for netdev per STA:
  1637. * a. Send frame to appropriate netdev using registered fp.
  1638. * b. If fp is NULL, drop the frames.
  1639. */
  1640. if (!txrx_peer->wds_ext.init)
  1641. return false;
  1642. if (txrx_peer->osif_rx)
  1643. txrx_peer->osif_rx(txrx_peer->wds_ext.osif_peer, nbuf_head);
  1644. else
  1645. dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1646. return true;
  1647. }
  1648. #else
  1649. static inline bool
  1650. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1651. struct dp_txrx_peer *txrx_peer, qdf_nbuf_t nbuf_head)
  1652. {
  1653. return false;
  1654. }
  1655. #endif
  1656. #ifdef PEER_CACHE_RX_PKTS
  1657. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1658. {
  1659. struct dp_peer_cached_bufq *bufqi;
  1660. struct dp_rx_cached_buf *cache_buf = NULL;
  1661. ol_txrx_rx_fp data_rx = NULL;
  1662. int num_buff_elem;
  1663. QDF_STATUS status;
  1664. /*
  1665. * Flush dp cached frames only for mld peers and legacy peers, as
  1666. * link peers don't store cached frames
  1667. */
  1668. if (IS_MLO_DP_LINK_PEER(peer))
  1669. return;
  1670. if (!peer->txrx_peer) {
  1671. dp_err("txrx_peer NULL!! peer mac_addr("QDF_MAC_ADDR_FMT")",
  1672. QDF_MAC_ADDR_REF(peer->mac_addr.raw));
  1673. return;
  1674. }
  1675. if (qdf_atomic_inc_return(&peer->txrx_peer->flush_in_progress) > 1) {
  1676. qdf_atomic_dec(&peer->txrx_peer->flush_in_progress);
  1677. return;
  1678. }
  1679. qdf_spin_lock_bh(&peer->peer_info_lock);
  1680. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1681. data_rx = peer->vdev->osif_rx;
  1682. else
  1683. drop = true;
  1684. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1685. bufqi = &peer->txrx_peer->bufq_info;
  1686. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1687. qdf_list_remove_front(&bufqi->cached_bufq,
  1688. (qdf_list_node_t **)&cache_buf);
  1689. while (cache_buf) {
  1690. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1691. cache_buf->buf);
  1692. bufqi->entries -= num_buff_elem;
  1693. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1694. if (drop) {
  1695. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1696. cache_buf->buf);
  1697. } else {
  1698. /* Flush the cached frames to OSIF DEV */
  1699. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1700. if (status != QDF_STATUS_SUCCESS)
  1701. bufqi->dropped = dp_rx_drop_nbuf_list(
  1702. peer->vdev->pdev,
  1703. cache_buf->buf);
  1704. }
  1705. qdf_mem_free(cache_buf);
  1706. cache_buf = NULL;
  1707. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1708. qdf_list_remove_front(&bufqi->cached_bufq,
  1709. (qdf_list_node_t **)&cache_buf);
  1710. }
  1711. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1712. qdf_atomic_dec(&peer->txrx_peer->flush_in_progress);
  1713. }
  1714. /**
  1715. * dp_rx_enqueue_rx() - cache rx frames
  1716. * @peer: peer
  1717. * @txrx_peer: DP txrx_peer
  1718. * @rx_buf_list: cache buffer list
  1719. *
  1720. * Return: None
  1721. */
  1722. static QDF_STATUS
  1723. dp_rx_enqueue_rx(struct dp_peer *peer,
  1724. struct dp_txrx_peer *txrx_peer,
  1725. qdf_nbuf_t rx_buf_list)
  1726. {
  1727. struct dp_rx_cached_buf *cache_buf;
  1728. struct dp_peer_cached_bufq *bufqi = &txrx_peer->bufq_info;
  1729. int num_buff_elem;
  1730. QDF_STATUS ret = QDF_STATUS_SUCCESS;
  1731. struct dp_soc *soc = txrx_peer->vdev->pdev->soc;
  1732. struct dp_peer *ta_peer = NULL;
  1733. /*
  1734. * If peer id is invalid which likely peer map has not completed,
  1735. * then need caller provide dp_peer pointer, else it's ok to use
  1736. * txrx_peer->peer_id to get dp_peer.
  1737. */
  1738. if (peer) {
  1739. if (QDF_STATUS_SUCCESS ==
  1740. dp_peer_get_ref(soc, peer, DP_MOD_ID_RX))
  1741. ta_peer = peer;
  1742. } else {
  1743. ta_peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id,
  1744. DP_MOD_ID_RX);
  1745. }
  1746. if (!ta_peer) {
  1747. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1748. rx_buf_list);
  1749. return QDF_STATUS_E_INVAL;
  1750. }
  1751. dp_debug_rl("bufq->curr %d bufq->drops %d", bufqi->entries,
  1752. bufqi->dropped);
  1753. if (!ta_peer->valid) {
  1754. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1755. rx_buf_list);
  1756. ret = QDF_STATUS_E_INVAL;
  1757. goto fail;
  1758. }
  1759. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1760. if (bufqi->entries >= bufqi->thresh) {
  1761. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1762. rx_buf_list);
  1763. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1764. ret = QDF_STATUS_E_RESOURCES;
  1765. goto fail;
  1766. }
  1767. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1768. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1769. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1770. if (!cache_buf) {
  1771. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1772. "Failed to allocate buf to cache rx frames");
  1773. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1774. rx_buf_list);
  1775. ret = QDF_STATUS_E_NOMEM;
  1776. goto fail;
  1777. }
  1778. cache_buf->buf = rx_buf_list;
  1779. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1780. qdf_list_insert_back(&bufqi->cached_bufq,
  1781. &cache_buf->node);
  1782. bufqi->entries += num_buff_elem;
  1783. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1784. fail:
  1785. dp_peer_unref_delete(ta_peer, DP_MOD_ID_RX);
  1786. return ret;
  1787. }
  1788. static inline
  1789. bool dp_rx_is_peer_cache_bufq_supported(void)
  1790. {
  1791. return true;
  1792. }
  1793. #else
  1794. static inline
  1795. bool dp_rx_is_peer_cache_bufq_supported(void)
  1796. {
  1797. return false;
  1798. }
  1799. static inline QDF_STATUS
  1800. dp_rx_enqueue_rx(struct dp_peer *peer,
  1801. struct dp_txrx_peer *txrx_peer,
  1802. qdf_nbuf_t rx_buf_list)
  1803. {
  1804. return QDF_STATUS_SUCCESS;
  1805. }
  1806. #endif
  1807. #ifndef DELIVERY_TO_STACK_STATUS_CHECK
  1808. /**
  1809. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1810. * using the appropriate call back functions.
  1811. * @soc: soc
  1812. * @vdev: vdev
  1813. * @txrx_peer: peer
  1814. * @nbuf_head: skb list head
  1815. *
  1816. * Return: None
  1817. */
  1818. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1819. struct dp_vdev *vdev,
  1820. struct dp_txrx_peer *txrx_peer,
  1821. qdf_nbuf_t nbuf_head)
  1822. {
  1823. if (qdf_unlikely(dp_rx_deliver_to_stack_ext(soc, vdev,
  1824. txrx_peer, nbuf_head)))
  1825. return;
  1826. /* Function pointer initialized only when FISA is enabled */
  1827. if (vdev->osif_fisa_rx)
  1828. /* on failure send it via regular path */
  1829. vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1830. else
  1831. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1832. }
  1833. #else
  1834. /**
  1835. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1836. * using the appropriate call back functions.
  1837. * @soc: soc
  1838. * @vdev: vdev
  1839. * @txrx_peer: txrx peer
  1840. * @nbuf_head: skb list head
  1841. *
  1842. * Check the return status of the call back function and drop
  1843. * the packets if the return status indicates a failure.
  1844. *
  1845. * Return: None
  1846. */
  1847. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1848. struct dp_vdev *vdev,
  1849. struct dp_txrx_peer *txrx_peer,
  1850. qdf_nbuf_t nbuf_head)
  1851. {
  1852. int num_nbuf = 0;
  1853. QDF_STATUS ret_val = QDF_STATUS_E_FAILURE;
  1854. /* Function pointer initialized only when FISA is enabled */
  1855. if (vdev->osif_fisa_rx)
  1856. /* on failure send it via regular path */
  1857. ret_val = vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1858. else if (vdev->osif_rx)
  1859. ret_val = vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1860. if (!QDF_IS_STATUS_SUCCESS(ret_val)) {
  1861. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1862. DP_STATS_INC(soc, rx.err.rejected, num_nbuf);
  1863. if (txrx_peer)
  1864. DP_PEER_STATS_FLAT_DEC(txrx_peer, to_stack.num,
  1865. num_nbuf);
  1866. }
  1867. }
  1868. #endif /* ifdef DELIVERY_TO_STACK_STATUS_CHECK */
  1869. /**
  1870. * dp_rx_validate_rx_callbacks() - validate rx callbacks
  1871. * @soc: DP soc
  1872. * @vdev: DP vdev handle
  1873. * @txrx_peer: pointer to the txrx peer object
  1874. * @nbuf_head: skb list head
  1875. *
  1876. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  1877. * QDF_STATUS_E_FAILURE
  1878. */
  1879. static inline QDF_STATUS
  1880. dp_rx_validate_rx_callbacks(struct dp_soc *soc,
  1881. struct dp_vdev *vdev,
  1882. struct dp_txrx_peer *txrx_peer,
  1883. qdf_nbuf_t nbuf_head)
  1884. {
  1885. int num_nbuf;
  1886. if (qdf_unlikely(!vdev || vdev->delete.pending)) {
  1887. num_nbuf = dp_rx_drop_nbuf_list(NULL, nbuf_head);
  1888. /*
  1889. * This is a special case where vdev is invalid,
  1890. * so we cannot know the pdev to which this packet
  1891. * belonged. Hence we update the soc rx error stats.
  1892. */
  1893. DP_STATS_INC(soc, rx.err.invalid_vdev, num_nbuf);
  1894. return QDF_STATUS_E_FAILURE;
  1895. }
  1896. /*
  1897. * highly unlikely to have a vdev without a registered rx
  1898. * callback function. if so let us free the nbuf_list.
  1899. */
  1900. if (qdf_unlikely(!vdev->osif_rx)) {
  1901. if (txrx_peer && dp_rx_is_peer_cache_bufq_supported()) {
  1902. dp_rx_enqueue_rx(NULL, txrx_peer, nbuf_head);
  1903. } else {
  1904. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev,
  1905. nbuf_head);
  1906. DP_PEER_TO_STACK_DECC(txrx_peer, num_nbuf,
  1907. vdev->pdev->enhanced_stats_en);
  1908. }
  1909. return QDF_STATUS_E_FAILURE;
  1910. }
  1911. return QDF_STATUS_SUCCESS;
  1912. }
  1913. QDF_STATUS dp_rx_deliver_to_stack(struct dp_soc *soc,
  1914. struct dp_vdev *vdev,
  1915. struct dp_txrx_peer *txrx_peer,
  1916. qdf_nbuf_t nbuf_head,
  1917. qdf_nbuf_t nbuf_tail)
  1918. {
  1919. if (dp_rx_validate_rx_callbacks(soc, vdev, txrx_peer, nbuf_head) !=
  1920. QDF_STATUS_SUCCESS)
  1921. return QDF_STATUS_E_FAILURE;
  1922. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1923. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1924. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1925. &nbuf_tail);
  1926. }
  1927. dp_rx_check_delivery_to_stack(soc, vdev, txrx_peer, nbuf_head);
  1928. return QDF_STATUS_SUCCESS;
  1929. }
  1930. #ifdef QCA_SUPPORT_EAPOL_OVER_CONTROL_PORT
  1931. QDF_STATUS dp_rx_eapol_deliver_to_stack(struct dp_soc *soc,
  1932. struct dp_vdev *vdev,
  1933. struct dp_txrx_peer *txrx_peer,
  1934. qdf_nbuf_t nbuf_head,
  1935. qdf_nbuf_t nbuf_tail)
  1936. {
  1937. if (dp_rx_validate_rx_callbacks(soc, vdev, txrx_peer, nbuf_head) !=
  1938. QDF_STATUS_SUCCESS)
  1939. return QDF_STATUS_E_FAILURE;
  1940. vdev->osif_rx_eapol(vdev->osif_vdev, nbuf_head);
  1941. return QDF_STATUS_SUCCESS;
  1942. }
  1943. #endif
  1944. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1945. #ifdef VDEV_PEER_PROTOCOL_COUNT
  1946. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, txrx_peer) \
  1947. { \
  1948. qdf_nbuf_t nbuf_local; \
  1949. struct dp_txrx_peer *txrx_peer_local; \
  1950. struct dp_vdev *vdev_local = vdev_hdl; \
  1951. do { \
  1952. if (qdf_likely(!((vdev_local)->peer_protocol_count_track))) \
  1953. break; \
  1954. nbuf_local = nbuf; \
  1955. txrx_peer_local = txrx_peer; \
  1956. if (qdf_unlikely(qdf_nbuf_is_frag((nbuf_local)))) \
  1957. break; \
  1958. else if (qdf_unlikely(qdf_nbuf_is_raw_frame((nbuf_local)))) \
  1959. break; \
  1960. dp_vdev_peer_stats_update_protocol_cnt((vdev_local), \
  1961. (nbuf_local), \
  1962. (txrx_peer_local), 0, 1); \
  1963. } while (0); \
  1964. }
  1965. #else
  1966. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, txrx_peer)
  1967. #endif
  1968. #ifdef FEATURE_RX_LINKSPEED_ROAM_TRIGGER
  1969. /**
  1970. * dp_rx_rates_stats_update() - update rate stats
  1971. * from rx msdu.
  1972. * @soc: datapath soc handle
  1973. * @nbuf: received msdu buffer
  1974. * @rx_tlv_hdr: rx tlv header
  1975. * @txrx_peer: datapath txrx_peer handle
  1976. * @sgi: Short Guard Interval
  1977. * @mcs: Modulation and Coding Set
  1978. * @nss: Number of Spatial Streams
  1979. * @bw: BandWidth
  1980. * @pkt_type: Corresponds to preamble
  1981. *
  1982. * To be precisely record rates, following factors are considered:
  1983. * Exclude specific frames, ARP, DHCP, ssdp, etc.
  1984. * Make sure to affect rx throughput as least as possible.
  1985. *
  1986. * Return: void
  1987. */
  1988. static void
  1989. dp_rx_rates_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1990. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *txrx_peer,
  1991. uint32_t sgi, uint32_t mcs,
  1992. uint32_t nss, uint32_t bw, uint32_t pkt_type)
  1993. {
  1994. uint32_t rix;
  1995. uint16_t ratecode;
  1996. uint32_t avg_rx_rate;
  1997. uint32_t ratekbps;
  1998. enum cdp_punctured_modes punc_mode = NO_PUNCTURE;
  1999. if (soc->high_throughput ||
  2000. dp_rx_data_is_specific(soc->hal_soc, rx_tlv_hdr, nbuf)) {
  2001. return;
  2002. }
  2003. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.rx_rate, mcs);
  2004. /* In 11b mode, the nss we get from tlv is 0, invalid and should be 1 */
  2005. if (qdf_unlikely(pkt_type == DOT11_B))
  2006. nss = 1;
  2007. /* here pkt_type corresponds to preamble */
  2008. ratekbps = dp_getrateindex(sgi,
  2009. mcs,
  2010. nss - 1,
  2011. pkt_type,
  2012. bw,
  2013. punc_mode,
  2014. &rix,
  2015. &ratecode);
  2016. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.last_rx_rate, ratekbps);
  2017. avg_rx_rate =
  2018. dp_ath_rate_lpf(txrx_peer->stats.extd_stats.rx.avg_rx_rate,
  2019. ratekbps);
  2020. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.avg_rx_rate, avg_rx_rate);
  2021. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.nss_info, nss);
  2022. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.mcs_info, mcs);
  2023. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.bw_info, bw);
  2024. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.gi_info, sgi);
  2025. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.preamble_info, pkt_type);
  2026. }
  2027. #else
  2028. static inline void
  2029. dp_rx_rates_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2030. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *txrx_peer,
  2031. uint32_t sgi, uint32_t mcs,
  2032. uint32_t nss, uint32_t bw, uint32_t pkt_type)
  2033. {
  2034. }
  2035. #endif /* FEATURE_RX_LINKSPEED_ROAM_TRIGGER */
  2036. #ifndef QCA_ENHANCED_STATS_SUPPORT
  2037. /**
  2038. * dp_rx_msdu_extd_stats_update(): Update Rx extended path stats for peer
  2039. *
  2040. * @soc: datapath soc handle
  2041. * @nbuf: received msdu buffer
  2042. * @rx_tlv_hdr: rx tlv header
  2043. * @txrx_peer: datapath txrx_peer handle
  2044. *
  2045. * Return: void
  2046. */
  2047. static inline
  2048. void dp_rx_msdu_extd_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2049. uint8_t *rx_tlv_hdr,
  2050. struct dp_txrx_peer *txrx_peer)
  2051. {
  2052. bool is_ampdu;
  2053. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  2054. uint8_t dst_mcs_idx;
  2055. /*
  2056. * TODO - For KIWI this field is present in ring_desc
  2057. * Try to use ring desc instead of tlv.
  2058. */
  2059. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(soc->hal_soc, rx_tlv_hdr);
  2060. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.ampdu_cnt, 1, is_ampdu);
  2061. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  2062. sgi = hal_rx_tlv_sgi_get(soc->hal_soc, rx_tlv_hdr);
  2063. mcs = hal_rx_tlv_rate_mcs_get(soc->hal_soc, rx_tlv_hdr);
  2064. tid = qdf_nbuf_get_tid_val(nbuf);
  2065. bw = hal_rx_tlv_bw_get(soc->hal_soc, rx_tlv_hdr);
  2066. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  2067. rx_tlv_hdr);
  2068. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  2069. pkt_type = hal_rx_tlv_get_pkt_type(soc->hal_soc, rx_tlv_hdr);
  2070. /* do HW to SW pkt type conversion */
  2071. pkt_type = (pkt_type >= HAL_DOT11_MAX ? DOT11_MAX :
  2072. hal_2_dp_pkt_type_map[pkt_type]);
  2073. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.rx_mpdu_cnt[mcs], 1,
  2074. ((mcs < MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  2075. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.rx_mpdu_cnt[MAX_MCS - 1], 1,
  2076. ((mcs >= MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  2077. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.bw[bw], 1);
  2078. /*
  2079. * only if nss > 0 and pkt_type is 11N/AC/AX,
  2080. * then increase index [nss - 1] in array counter.
  2081. */
  2082. if (nss > 0 && CDP_IS_PKT_TYPE_SUPPORT_NSS(pkt_type))
  2083. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.nss[nss - 1], 1);
  2084. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.sgi_count[sgi], 1);
  2085. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.err.mic_err, 1,
  2086. hal_rx_tlv_mic_err_get(soc->hal_soc,
  2087. rx_tlv_hdr));
  2088. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.err.decrypt_err, 1,
  2089. hal_rx_tlv_decrypt_err_get(soc->hal_soc,
  2090. rx_tlv_hdr));
  2091. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  2092. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.reception_type[reception_type], 1);
  2093. dst_mcs_idx = dp_get_mcs_array_index_by_pkt_type_mcs(pkt_type, mcs);
  2094. if (MCS_INVALID_ARRAY_INDEX != dst_mcs_idx)
  2095. DP_PEER_EXTD_STATS_INC(txrx_peer,
  2096. rx.pkt_type[pkt_type].mcs_count[dst_mcs_idx],
  2097. 1);
  2098. dp_rx_rates_stats_update(soc, nbuf, rx_tlv_hdr, txrx_peer,
  2099. sgi, mcs, nss, bw, pkt_type);
  2100. }
  2101. #else
  2102. static inline
  2103. void dp_rx_msdu_extd_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2104. uint8_t *rx_tlv_hdr,
  2105. struct dp_txrx_peer *txrx_peer)
  2106. {
  2107. }
  2108. #endif
  2109. #if defined(DP_PKT_STATS_PER_LMAC) && defined(WLAN_FEATURE_11BE_MLO)
  2110. static inline void
  2111. dp_peer_update_rx_pkt_per_lmac(struct dp_txrx_peer *txrx_peer,
  2112. qdf_nbuf_t nbuf)
  2113. {
  2114. uint8_t lmac_id = qdf_nbuf_get_lmac_id(nbuf);
  2115. if (qdf_unlikely(lmac_id >= CDP_MAX_LMACS)) {
  2116. dp_err_rl("Invalid lmac_id: %u vdev_id: %u",
  2117. lmac_id, QDF_NBUF_CB_RX_VDEV_ID(nbuf));
  2118. if (qdf_likely(txrx_peer))
  2119. dp_err_rl("peer_id: %u", txrx_peer->peer_id);
  2120. return;
  2121. }
  2122. /* only count stats per lmac for MLO connection*/
  2123. DP_PEER_PER_PKT_STATS_INCC_PKT(txrx_peer, rx.rx_lmac[lmac_id], 1,
  2124. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  2125. txrx_peer->mld_peer);
  2126. }
  2127. #else
  2128. static inline void
  2129. dp_peer_update_rx_pkt_per_lmac(struct dp_txrx_peer *txrx_peer,
  2130. qdf_nbuf_t nbuf)
  2131. {
  2132. }
  2133. #endif
  2134. void dp_rx_msdu_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2135. uint8_t *rx_tlv_hdr,
  2136. struct dp_txrx_peer *txrx_peer,
  2137. uint8_t ring_id,
  2138. struct cdp_tid_rx_stats *tid_stats)
  2139. {
  2140. bool is_not_amsdu;
  2141. struct dp_vdev *vdev = txrx_peer->vdev;
  2142. bool enh_flag;
  2143. qdf_ether_header_t *eh;
  2144. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2145. dp_rx_msdu_stats_update_prot_cnts(vdev, nbuf, txrx_peer);
  2146. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  2147. qdf_nbuf_is_rx_chfrag_end(nbuf);
  2148. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.rcvd_reo[ring_id], 1,
  2149. msdu_len);
  2150. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.non_amsdu_cnt, 1,
  2151. is_not_amsdu);
  2152. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  2153. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.rx_retries, 1,
  2154. qdf_nbuf_is_rx_retry_flag(nbuf));
  2155. dp_peer_update_rx_pkt_per_lmac(txrx_peer, nbuf);
  2156. tid_stats->msdu_cnt++;
  2157. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  2158. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  2159. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  2160. enh_flag = vdev->pdev->enhanced_stats_en;
  2161. DP_PEER_MC_INCC_PKT(txrx_peer, 1, msdu_len, enh_flag);
  2162. tid_stats->mcast_msdu_cnt++;
  2163. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  2164. DP_PEER_BC_INCC_PKT(txrx_peer, 1, msdu_len, enh_flag);
  2165. tid_stats->bcast_msdu_cnt++;
  2166. }
  2167. }
  2168. txrx_peer->stats.per_pkt_stats.rx.last_rx_ts = qdf_system_ticks();
  2169. dp_rx_msdu_extd_stats_update(soc, nbuf, rx_tlv_hdr, txrx_peer);
  2170. }
  2171. #ifndef WDS_VENDOR_EXTENSION
  2172. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  2173. struct dp_vdev *vdev,
  2174. struct dp_txrx_peer *txrx_peer)
  2175. {
  2176. return 1;
  2177. }
  2178. #endif
  2179. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  2180. #ifdef DP_RX_UDP_OVER_PEER_ROAM
  2181. /**
  2182. * dp_rx_is_udp_allowed_over_roam_peer() - check if udp data received
  2183. * during roaming
  2184. * @vdev: dp_vdev pointer
  2185. * @rx_tlv_hdr: rx tlv header
  2186. * @nbuf: pkt skb pointer
  2187. *
  2188. * This function will check if rx udp data is received from authorised
  2189. * roamed peer before peer map indication is received from FW after
  2190. * roaming. This is needed for VoIP scenarios in which packet loss
  2191. * expected during roaming is minimal.
  2192. *
  2193. * Return: bool
  2194. */
  2195. static bool dp_rx_is_udp_allowed_over_roam_peer(struct dp_vdev *vdev,
  2196. uint8_t *rx_tlv_hdr,
  2197. qdf_nbuf_t nbuf)
  2198. {
  2199. char *hdr_desc;
  2200. struct ieee80211_frame *wh = NULL;
  2201. hdr_desc = hal_rx_desc_get_80211_hdr(vdev->pdev->soc->hal_soc,
  2202. rx_tlv_hdr);
  2203. wh = (struct ieee80211_frame *)hdr_desc;
  2204. if (vdev->roaming_peer_status ==
  2205. WLAN_ROAM_PEER_AUTH_STATUS_AUTHENTICATED &&
  2206. !qdf_mem_cmp(vdev->roaming_peer_mac.raw, wh->i_addr2,
  2207. QDF_MAC_ADDR_SIZE) && (qdf_nbuf_is_ipv4_udp_pkt(nbuf) ||
  2208. qdf_nbuf_is_ipv6_udp_pkt(nbuf)))
  2209. return true;
  2210. return false;
  2211. }
  2212. #else
  2213. static bool dp_rx_is_udp_allowed_over_roam_peer(struct dp_vdev *vdev,
  2214. uint8_t *rx_tlv_hdr,
  2215. qdf_nbuf_t nbuf)
  2216. {
  2217. return false;
  2218. }
  2219. #endif
  2220. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2221. {
  2222. uint16_t peer_id;
  2223. uint8_t vdev_id;
  2224. struct dp_vdev *vdev = NULL;
  2225. uint32_t l2_hdr_offset = 0;
  2226. uint16_t msdu_len = 0;
  2227. uint32_t pkt_len = 0;
  2228. uint8_t *rx_tlv_hdr;
  2229. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  2230. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  2231. bool is_special_frame = false;
  2232. struct dp_peer *peer = NULL;
  2233. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  2234. if (peer_id > soc->max_peer_id)
  2235. goto deliver_fail;
  2236. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  2237. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_RX);
  2238. if (!vdev || vdev->delete.pending)
  2239. goto deliver_fail;
  2240. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf)))
  2241. goto deliver_fail;
  2242. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  2243. l2_hdr_offset =
  2244. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2245. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2246. pkt_len = msdu_len + l2_hdr_offset + soc->rx_pkt_tlv_size;
  2247. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2248. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  2249. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size + l2_hdr_offset);
  2250. is_special_frame = dp_rx_is_special_frame(nbuf, frame_mask);
  2251. if (qdf_likely(vdev->osif_rx)) {
  2252. if (is_special_frame ||
  2253. dp_rx_is_udp_allowed_over_roam_peer(vdev, rx_tlv_hdr,
  2254. nbuf)) {
  2255. qdf_nbuf_set_exc_frame(nbuf, 1);
  2256. if (QDF_STATUS_SUCCESS !=
  2257. vdev->osif_rx(vdev->osif_vdev, nbuf))
  2258. goto deliver_fail;
  2259. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  2260. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  2261. return;
  2262. }
  2263. } else if (is_special_frame) {
  2264. /*
  2265. * If MLO connection, txrx_peer for link peer does not exist,
  2266. * try to store these RX packets to txrx_peer's bufq of MLD
  2267. * peer until vdev->osif_rx is registered from CP and flush
  2268. * them to stack.
  2269. */
  2270. peer = dp_peer_get_tgt_peer_by_id(soc, peer_id,
  2271. DP_MOD_ID_RX);
  2272. if (!peer)
  2273. goto deliver_fail;
  2274. /* only check for MLO connection */
  2275. if (IS_MLO_DP_MLD_PEER(peer) && peer->txrx_peer &&
  2276. dp_rx_is_peer_cache_bufq_supported()) {
  2277. qdf_nbuf_set_exc_frame(nbuf, 1);
  2278. if (QDF_STATUS_SUCCESS ==
  2279. dp_rx_enqueue_rx(peer, peer->txrx_peer, nbuf)) {
  2280. DP_STATS_INC(soc,
  2281. rx.err.pkt_delivered_no_peer,
  2282. 1);
  2283. } else {
  2284. DP_STATS_INC(soc,
  2285. rx.err.rx_invalid_peer.num,
  2286. 1);
  2287. }
  2288. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  2289. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  2290. return;
  2291. }
  2292. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  2293. }
  2294. deliver_fail:
  2295. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  2296. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2297. dp_rx_nbuf_free(nbuf);
  2298. if (vdev)
  2299. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  2300. }
  2301. #else
  2302. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2303. {
  2304. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  2305. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2306. dp_rx_nbuf_free(nbuf);
  2307. }
  2308. #endif
  2309. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2310. #ifdef WLAN_SUPPORT_RX_FISA
  2311. void dp_rx_skip_tlvs(struct dp_soc *soc, qdf_nbuf_t nbuf, uint32_t l3_padding)
  2312. {
  2313. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  2314. qdf_nbuf_pull_head(nbuf, l3_padding + soc->rx_pkt_tlv_size);
  2315. }
  2316. #else
  2317. void dp_rx_skip_tlvs(struct dp_soc *soc, qdf_nbuf_t nbuf, uint32_t l3_padding)
  2318. {
  2319. qdf_nbuf_pull_head(nbuf, l3_padding + soc->rx_pkt_tlv_size);
  2320. }
  2321. #endif
  2322. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  2323. #ifdef DP_RX_DROP_RAW_FRM
  2324. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  2325. {
  2326. if (qdf_nbuf_is_raw_frame(nbuf)) {
  2327. dp_rx_nbuf_free(nbuf);
  2328. return true;
  2329. }
  2330. return false;
  2331. }
  2332. #endif
  2333. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  2334. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2335. {
  2336. DP_STATS_INC_PKT(soc, rx.ingress, 1,
  2337. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2338. }
  2339. #endif
  2340. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  2341. void dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  2342. uint16_t peer_id, uint32_t is_offload,
  2343. qdf_nbuf_t netbuf)
  2344. {
  2345. if (wlan_cfg_get_pkt_capture_mode(soc->wlan_cfg_ctx))
  2346. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_RX_DATA, soc, netbuf,
  2347. peer_id, is_offload, pdev->pdev_id);
  2348. }
  2349. void dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2350. uint32_t is_offload)
  2351. {
  2352. if (wlan_cfg_get_pkt_capture_mode(soc->wlan_cfg_ctx))
  2353. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_RX_DATA_NO_PEER,
  2354. soc, nbuf, HTT_INVALID_VDEV,
  2355. is_offload, 0);
  2356. }
  2357. #endif
  2358. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2359. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev)
  2360. {
  2361. QDF_STATUS ret;
  2362. if (vdev->osif_rx_flush) {
  2363. ret = vdev->osif_rx_flush(vdev->osif_vdev, vdev->vdev_id);
  2364. if (!QDF_IS_STATUS_SUCCESS(ret)) {
  2365. dp_err("Failed to flush rx pkts for vdev %d\n",
  2366. vdev->vdev_id);
  2367. return ret;
  2368. }
  2369. }
  2370. return QDF_STATUS_SUCCESS;
  2371. }
  2372. static QDF_STATUS
  2373. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc,
  2374. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  2375. struct dp_pdev *dp_pdev,
  2376. struct rx_desc_pool *rx_desc_pool)
  2377. {
  2378. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  2379. (nbuf_frag_info_t->virt_addr).nbuf =
  2380. qdf_nbuf_alloc(dp_soc->osdev, rx_desc_pool->buf_size,
  2381. RX_BUFFER_RESERVATION,
  2382. rx_desc_pool->buf_alignment, FALSE);
  2383. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  2384. dp_err("nbuf alloc failed");
  2385. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  2386. return ret;
  2387. }
  2388. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  2389. (nbuf_frag_info_t->virt_addr).nbuf,
  2390. QDF_DMA_FROM_DEVICE,
  2391. rx_desc_pool->buf_size);
  2392. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2393. qdf_nbuf_free((nbuf_frag_info_t->virt_addr).nbuf);
  2394. dp_err("nbuf map failed");
  2395. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  2396. return ret;
  2397. }
  2398. nbuf_frag_info_t->paddr =
  2399. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  2400. ret = dp_check_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  2401. &nbuf_frag_info_t->paddr,
  2402. rx_desc_pool);
  2403. if (ret == QDF_STATUS_E_FAILURE) {
  2404. dp_err("nbuf check x86 failed");
  2405. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  2406. return ret;
  2407. }
  2408. return QDF_STATUS_SUCCESS;
  2409. }
  2410. QDF_STATUS
  2411. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  2412. struct dp_srng *dp_rxdma_srng,
  2413. struct rx_desc_pool *rx_desc_pool,
  2414. uint32_t num_req_buffers)
  2415. {
  2416. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  2417. hal_ring_handle_t rxdma_srng = dp_rxdma_srng->hal_srng;
  2418. union dp_rx_desc_list_elem_t *next;
  2419. void *rxdma_ring_entry;
  2420. qdf_dma_addr_t paddr;
  2421. struct dp_rx_nbuf_frag_info *nf_info;
  2422. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  2423. uint32_t buffer_index, nbuf_ptrs_per_page;
  2424. qdf_nbuf_t nbuf;
  2425. QDF_STATUS ret;
  2426. int page_idx, total_pages;
  2427. union dp_rx_desc_list_elem_t *desc_list = NULL;
  2428. union dp_rx_desc_list_elem_t *tail = NULL;
  2429. int sync_hw_ptr = 1;
  2430. uint32_t num_entries_avail;
  2431. if (qdf_unlikely(!dp_pdev)) {
  2432. dp_rx_err("%pK: pdev is null for mac_id = %d",
  2433. dp_soc, mac_id);
  2434. return QDF_STATUS_E_FAILURE;
  2435. }
  2436. if (qdf_unlikely(!rxdma_srng)) {
  2437. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2438. return QDF_STATUS_E_FAILURE;
  2439. }
  2440. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  2441. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2442. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  2443. rxdma_srng,
  2444. sync_hw_ptr);
  2445. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2446. if (!num_entries_avail) {
  2447. dp_err("Num of available entries is zero, nothing to do");
  2448. return QDF_STATUS_E_NOMEM;
  2449. }
  2450. if (num_entries_avail < num_req_buffers)
  2451. num_req_buffers = num_entries_avail;
  2452. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  2453. num_req_buffers, &desc_list, &tail);
  2454. if (!nr_descs) {
  2455. dp_err("no free rx_descs in freelist");
  2456. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  2457. return QDF_STATUS_E_NOMEM;
  2458. }
  2459. dp_debug("got %u RX descs for driver attach", nr_descs);
  2460. /*
  2461. * Try to allocate pointers to the nbuf one page at a time.
  2462. * Take pointers that can fit in one page of memory and
  2463. * iterate through the total descriptors that need to be
  2464. * allocated in order of pages. Reuse the pointers that
  2465. * have been allocated to fit in one page across each
  2466. * iteration to index into the nbuf.
  2467. */
  2468. total_pages = (nr_descs * sizeof(*nf_info)) / DP_BLOCKMEM_SIZE;
  2469. /*
  2470. * Add an extra page to store the remainder if any
  2471. */
  2472. if ((nr_descs * sizeof(*nf_info)) % DP_BLOCKMEM_SIZE)
  2473. total_pages++;
  2474. nf_info = qdf_mem_malloc(DP_BLOCKMEM_SIZE);
  2475. if (!nf_info) {
  2476. dp_err("failed to allocate nbuf array");
  2477. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2478. QDF_BUG(0);
  2479. return QDF_STATUS_E_NOMEM;
  2480. }
  2481. nbuf_ptrs_per_page = DP_BLOCKMEM_SIZE / sizeof(*nf_info);
  2482. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  2483. qdf_mem_zero(nf_info, DP_BLOCKMEM_SIZE);
  2484. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  2485. /*
  2486. * The last page of buffer pointers may not be required
  2487. * completely based on the number of descriptors. Below
  2488. * check will ensure we are allocating only the
  2489. * required number of descriptors.
  2490. */
  2491. if (nr_nbuf_total >= nr_descs)
  2492. break;
  2493. /* Flag is set while pdev rx_desc_pool initialization */
  2494. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2495. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  2496. &nf_info[nr_nbuf], dp_pdev,
  2497. rx_desc_pool);
  2498. else
  2499. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  2500. &nf_info[nr_nbuf], dp_pdev,
  2501. rx_desc_pool);
  2502. if (QDF_IS_STATUS_ERROR(ret))
  2503. break;
  2504. nr_nbuf_total++;
  2505. }
  2506. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2507. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  2508. rxdma_ring_entry =
  2509. hal_srng_src_get_next(dp_soc->hal_soc,
  2510. rxdma_srng);
  2511. qdf_assert_always(rxdma_ring_entry);
  2512. next = desc_list->next;
  2513. paddr = nf_info[buffer_index].paddr;
  2514. nbuf = nf_info[buffer_index].virt_addr.nbuf;
  2515. /* Flag is set while pdev rx_desc_pool initialization */
  2516. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2517. dp_rx_desc_frag_prep(&desc_list->rx_desc,
  2518. &nf_info[buffer_index]);
  2519. else
  2520. dp_rx_desc_prep(&desc_list->rx_desc,
  2521. &nf_info[buffer_index]);
  2522. desc_list->rx_desc.in_use = 1;
  2523. dp_rx_desc_alloc_dbg_info(&desc_list->rx_desc);
  2524. dp_rx_desc_update_dbg_info(&desc_list->rx_desc,
  2525. __func__,
  2526. RX_DESC_REPLENISHED);
  2527. hal_rxdma_buff_addr_info_set(dp_soc->hal_soc ,rxdma_ring_entry, paddr,
  2528. desc_list->rx_desc.cookie,
  2529. rx_desc_pool->owner);
  2530. dp_ipa_handle_rx_buf_smmu_mapping(
  2531. dp_soc, nbuf,
  2532. rx_desc_pool->buf_size, true,
  2533. __func__, __LINE__);
  2534. dp_audio_smmu_map(dp_soc->osdev,
  2535. qdf_mem_paddr_from_dmaaddr(dp_soc->osdev,
  2536. QDF_NBUF_CB_PADDR(nbuf)),
  2537. QDF_NBUF_CB_PADDR(nbuf),
  2538. rx_desc_pool->buf_size);
  2539. desc_list = next;
  2540. }
  2541. dp_rx_refill_ring_record_entry(dp_soc, dp_pdev->lmac_id,
  2542. rxdma_srng, nr_nbuf, nr_nbuf);
  2543. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2544. }
  2545. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2546. qdf_mem_free(nf_info);
  2547. if (!nr_nbuf_total) {
  2548. dp_err("No nbuf's allocated");
  2549. QDF_BUG(0);
  2550. return QDF_STATUS_E_RESOURCES;
  2551. }
  2552. /* No need to count the number of bytes received during replenish.
  2553. * Therefore set replenish.pkts.bytes as 0.
  2554. */
  2555. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf, 0);
  2556. return QDF_STATUS_SUCCESS;
  2557. }
  2558. qdf_export_symbol(dp_pdev_rx_buffers_attach);
  2559. #ifdef DP_RX_MON_MEM_FRAG
  2560. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2561. bool is_mon_dest_desc)
  2562. {
  2563. rx_desc_pool->rx_mon_dest_frag_enable = is_mon_dest_desc;
  2564. if (is_mon_dest_desc)
  2565. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is enabled");
  2566. }
  2567. #else
  2568. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2569. bool is_mon_dest_desc)
  2570. {
  2571. rx_desc_pool->rx_mon_dest_frag_enable = false;
  2572. if (is_mon_dest_desc)
  2573. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is disabled");
  2574. }
  2575. #endif
  2576. qdf_export_symbol(dp_rx_enable_mon_dest_frag);
  2577. QDF_STATUS
  2578. dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev)
  2579. {
  2580. struct dp_soc *soc = pdev->soc;
  2581. uint32_t rxdma_entries;
  2582. uint32_t rx_sw_desc_num;
  2583. struct dp_srng *dp_rxdma_srng;
  2584. struct rx_desc_pool *rx_desc_pool;
  2585. uint32_t status = QDF_STATUS_SUCCESS;
  2586. int mac_for_pdev;
  2587. mac_for_pdev = pdev->lmac_id;
  2588. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2589. dp_rx_info("%pK: nss-wifi<4> skip Rx refil %d",
  2590. soc, mac_for_pdev);
  2591. return status;
  2592. }
  2593. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2594. rxdma_entries = dp_rxdma_srng->num_entries;
  2595. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2596. rx_sw_desc_num = wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2597. rx_desc_pool->desc_type = DP_RX_DESC_BUF_TYPE;
  2598. status = dp_rx_desc_pool_alloc(soc,
  2599. rx_sw_desc_num,
  2600. rx_desc_pool);
  2601. if (status != QDF_STATUS_SUCCESS)
  2602. return status;
  2603. return status;
  2604. }
  2605. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev)
  2606. {
  2607. int mac_for_pdev = pdev->lmac_id;
  2608. struct dp_soc *soc = pdev->soc;
  2609. struct rx_desc_pool *rx_desc_pool;
  2610. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2611. dp_rx_desc_pool_free(soc, rx_desc_pool);
  2612. }
  2613. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev)
  2614. {
  2615. int mac_for_pdev = pdev->lmac_id;
  2616. struct dp_soc *soc = pdev->soc;
  2617. uint32_t rxdma_entries;
  2618. uint32_t rx_sw_desc_num;
  2619. struct dp_srng *dp_rxdma_srng;
  2620. struct rx_desc_pool *rx_desc_pool;
  2621. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2622. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2623. /*
  2624. * If NSS is enabled, rx_desc_pool is already filled.
  2625. * Hence, just disable desc_pool frag flag.
  2626. */
  2627. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2628. dp_rx_info("%pK: nss-wifi<4> skip Rx refil %d",
  2629. soc, mac_for_pdev);
  2630. return QDF_STATUS_SUCCESS;
  2631. }
  2632. if (dp_rx_desc_pool_is_allocated(rx_desc_pool) == QDF_STATUS_E_NOMEM)
  2633. return QDF_STATUS_E_NOMEM;
  2634. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2635. rxdma_entries = dp_rxdma_srng->num_entries;
  2636. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2637. rx_sw_desc_num =
  2638. wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2639. rx_desc_pool->owner = dp_rx_get_rx_bm_id(soc);
  2640. rx_desc_pool->buf_size = RX_DATA_BUFFER_SIZE;
  2641. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  2642. /* Disable monitor dest processing via frag */
  2643. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2644. dp_rx_desc_pool_init(soc, mac_for_pdev,
  2645. rx_sw_desc_num, rx_desc_pool);
  2646. return QDF_STATUS_SUCCESS;
  2647. }
  2648. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev)
  2649. {
  2650. int mac_for_pdev = pdev->lmac_id;
  2651. struct dp_soc *soc = pdev->soc;
  2652. struct rx_desc_pool *rx_desc_pool;
  2653. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2654. dp_rx_desc_pool_deinit(soc, rx_desc_pool, mac_for_pdev);
  2655. }
  2656. QDF_STATUS
  2657. dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev)
  2658. {
  2659. int mac_for_pdev = pdev->lmac_id;
  2660. struct dp_soc *soc = pdev->soc;
  2661. struct dp_srng *dp_rxdma_srng;
  2662. struct rx_desc_pool *rx_desc_pool;
  2663. uint32_t rxdma_entries;
  2664. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2665. rxdma_entries = dp_rxdma_srng->num_entries;
  2666. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2667. /* Initialize RX buffer pool which will be
  2668. * used during low memory conditions
  2669. */
  2670. dp_rx_buffer_pool_init(soc, mac_for_pdev);
  2671. return dp_pdev_rx_buffers_attach_simple(soc, mac_for_pdev,
  2672. dp_rxdma_srng,
  2673. rx_desc_pool,
  2674. rxdma_entries - 1);
  2675. }
  2676. void
  2677. dp_rx_pdev_buffers_free(struct dp_pdev *pdev)
  2678. {
  2679. int mac_for_pdev = pdev->lmac_id;
  2680. struct dp_soc *soc = pdev->soc;
  2681. struct rx_desc_pool *rx_desc_pool;
  2682. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2683. dp_rx_desc_nbuf_free(soc, rx_desc_pool, false);
  2684. dp_rx_buffer_pool_deinit(soc, mac_for_pdev);
  2685. }
  2686. #ifdef DP_RX_SPECIAL_FRAME_NEED
  2687. bool dp_rx_deliver_special_frame(struct dp_soc *soc,
  2688. struct dp_txrx_peer *txrx_peer,
  2689. qdf_nbuf_t nbuf, uint32_t frame_mask,
  2690. uint8_t *rx_tlv_hdr)
  2691. {
  2692. uint32_t l2_hdr_offset = 0;
  2693. uint16_t msdu_len = 0;
  2694. uint32_t skip_len;
  2695. l2_hdr_offset =
  2696. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2697. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  2698. skip_len = l2_hdr_offset;
  2699. } else {
  2700. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2701. skip_len = l2_hdr_offset + soc->rx_pkt_tlv_size;
  2702. qdf_nbuf_set_pktlen(nbuf, msdu_len + skip_len);
  2703. }
  2704. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2705. dp_rx_set_hdr_pad(nbuf, l2_hdr_offset);
  2706. qdf_nbuf_pull_head(nbuf, skip_len);
  2707. if (txrx_peer->vdev) {
  2708. dp_rx_send_pktlog(soc, txrx_peer->vdev->pdev, nbuf,
  2709. QDF_TX_RX_STATUS_OK);
  2710. }
  2711. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  2712. dp_info("special frame, mpdu sn 0x%x",
  2713. hal_rx_get_rx_sequence(soc->hal_soc, rx_tlv_hdr));
  2714. qdf_nbuf_set_exc_frame(nbuf, 1);
  2715. dp_rx_deliver_to_stack(soc, txrx_peer->vdev, txrx_peer,
  2716. nbuf, NULL);
  2717. return true;
  2718. }
  2719. return false;
  2720. }
  2721. #endif