dp_rx_err.c 99 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585
  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "hal_hw_headers.h"
  20. #include "dp_types.h"
  21. #include "dp_rx.h"
  22. #include "dp_tx.h"
  23. #include "dp_peer.h"
  24. #include "dp_internal.h"
  25. #include "hal_api.h"
  26. #include "qdf_trace.h"
  27. #include "qdf_nbuf.h"
  28. #include "dp_rx_defrag.h"
  29. #include "dp_ipa.h"
  30. #ifdef WIFI_MONITOR_SUPPORT
  31. #include "dp_htt.h"
  32. #include <dp_mon.h>
  33. #endif
  34. #ifdef FEATURE_WDS
  35. #include "dp_txrx_wds.h"
  36. #endif
  37. #include <enet.h> /* LLC_SNAP_HDR_LEN */
  38. #include "qdf_net_types.h"
  39. #include "dp_rx_buffer_pool.h"
  40. #define dp_rx_err_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_RX_ERROR, params)
  41. #define dp_rx_err_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_RX_ERROR, params)
  42. #define dp_rx_err_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_RX_ERROR, params)
  43. #define dp_rx_err_info(params...) \
  44. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX_ERROR, ## params)
  45. #define dp_rx_err_info_rl(params...) \
  46. __QDF_TRACE_RL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX_ERROR, ## params)
  47. #define dp_rx_err_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_RX_ERROR, params)
  48. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  49. /* Max buffer in invalid peer SG list*/
  50. #define DP_MAX_INVALID_BUFFERS 10
  51. /* Max regular Rx packet routing error */
  52. #define DP_MAX_REG_RX_ROUTING_ERRS_THRESHOLD 20
  53. #define DP_MAX_REG_RX_ROUTING_ERRS_IN_TIMEOUT 10
  54. #define DP_RX_ERR_ROUTE_TIMEOUT_US (5 * 1000 * 1000) /* micro seconds */
  55. #ifdef FEATURE_MEC
  56. bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  57. struct dp_txrx_peer *txrx_peer,
  58. uint8_t *rx_tlv_hdr,
  59. qdf_nbuf_t nbuf)
  60. {
  61. struct dp_vdev *vdev = txrx_peer->vdev;
  62. struct dp_pdev *pdev = vdev->pdev;
  63. struct dp_mec_entry *mecentry = NULL;
  64. struct dp_ast_entry *ase = NULL;
  65. uint16_t sa_idx = 0;
  66. uint8_t *data;
  67. /*
  68. * Multicast Echo Check is required only if vdev is STA and
  69. * received pkt is a multicast/broadcast pkt. otherwise
  70. * skip the MEC check.
  71. */
  72. if (vdev->opmode != wlan_op_mode_sta)
  73. return false;
  74. if (!hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc, rx_tlv_hdr))
  75. return false;
  76. data = qdf_nbuf_data(nbuf);
  77. /*
  78. * if the received pkts src mac addr matches with vdev
  79. * mac address then drop the pkt as it is looped back
  80. */
  81. if (!(qdf_mem_cmp(&data[QDF_MAC_ADDR_SIZE],
  82. vdev->mac_addr.raw,
  83. QDF_MAC_ADDR_SIZE)))
  84. return true;
  85. /*
  86. * In case of qwrap isolation mode, donot drop loopback packets.
  87. * In isolation mode, all packets from the wired stations need to go
  88. * to rootap and loop back to reach the wireless stations and
  89. * vice-versa.
  90. */
  91. if (qdf_unlikely(vdev->isolation_vdev))
  92. return false;
  93. /*
  94. * if the received pkts src mac addr matches with the
  95. * wired PCs MAC addr which is behind the STA or with
  96. * wireless STAs MAC addr which are behind the Repeater,
  97. * then drop the pkt as it is looped back
  98. */
  99. if (hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc, rx_tlv_hdr)) {
  100. sa_idx = hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr);
  101. if ((sa_idx < 0) ||
  102. (sa_idx >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) {
  103. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  104. "invalid sa_idx: %d", sa_idx);
  105. qdf_assert_always(0);
  106. }
  107. qdf_spin_lock_bh(&soc->ast_lock);
  108. ase = soc->ast_table[sa_idx];
  109. /*
  110. * this check was not needed since MEC is not dependent on AST,
  111. * but if we dont have this check SON has some issues in
  112. * dual backhaul scenario. in APS SON mode, client connected
  113. * to RE 2G and sends multicast packets. the RE sends it to CAP
  114. * over 5G backhaul. the CAP loopback it on 2G to RE.
  115. * On receiving in 2G STA vap, we assume that client has roamed
  116. * and kickout the client.
  117. */
  118. if (ase && (ase->peer_id != txrx_peer->peer_id)) {
  119. qdf_spin_unlock_bh(&soc->ast_lock);
  120. goto drop;
  121. }
  122. qdf_spin_unlock_bh(&soc->ast_lock);
  123. }
  124. qdf_spin_lock_bh(&soc->mec_lock);
  125. mecentry = dp_peer_mec_hash_find_by_pdevid(soc, pdev->pdev_id,
  126. &data[QDF_MAC_ADDR_SIZE]);
  127. if (!mecentry) {
  128. qdf_spin_unlock_bh(&soc->mec_lock);
  129. return false;
  130. }
  131. qdf_spin_unlock_bh(&soc->mec_lock);
  132. drop:
  133. dp_rx_err_info("%pK: received pkt with same src mac " QDF_MAC_ADDR_FMT,
  134. soc, QDF_MAC_ADDR_REF(&data[QDF_MAC_ADDR_SIZE]));
  135. return true;
  136. }
  137. #endif
  138. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  139. void dp_rx_link_desc_refill_duplicate_check(
  140. struct dp_soc *soc,
  141. struct hal_buf_info *buf_info,
  142. hal_buff_addrinfo_t ring_buf_info)
  143. {
  144. struct hal_buf_info current_link_desc_buf_info = { 0 };
  145. /* do duplicate link desc address check */
  146. hal_rx_buffer_addr_info_get_paddr(ring_buf_info,
  147. &current_link_desc_buf_info);
  148. /*
  149. * TODO - Check if the hal soc api call can be removed
  150. * since the cookie is just used for print.
  151. * buffer_addr_info is the first element of ring_desc
  152. */
  153. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  154. (uint32_t *)ring_buf_info,
  155. &current_link_desc_buf_info);
  156. if (qdf_unlikely(current_link_desc_buf_info.paddr ==
  157. buf_info->paddr)) {
  158. dp_info_rl("duplicate link desc addr: %llu, cookie: 0x%x",
  159. current_link_desc_buf_info.paddr,
  160. current_link_desc_buf_info.sw_cookie);
  161. DP_STATS_INC(soc, rx.err.dup_refill_link_desc, 1);
  162. }
  163. *buf_info = current_link_desc_buf_info;
  164. }
  165. /**
  166. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  167. * (WBM) by address
  168. *
  169. * @soc: core DP main context
  170. * @link_desc_addr: link descriptor addr
  171. *
  172. * Return: QDF_STATUS
  173. */
  174. QDF_STATUS
  175. dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
  176. hal_buff_addrinfo_t link_desc_addr,
  177. uint8_t bm_action)
  178. {
  179. struct dp_srng *wbm_desc_rel_ring = &soc->wbm_desc_rel_ring;
  180. hal_ring_handle_t wbm_rel_srng = wbm_desc_rel_ring->hal_srng;
  181. hal_soc_handle_t hal_soc = soc->hal_soc;
  182. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  183. void *src_srng_desc;
  184. if (!wbm_rel_srng) {
  185. dp_rx_err_err("%pK: WBM RELEASE RING not initialized", soc);
  186. return status;
  187. }
  188. /* do duplicate link desc address check */
  189. dp_rx_link_desc_refill_duplicate_check(
  190. soc,
  191. &soc->last_op_info.wbm_rel_link_desc,
  192. link_desc_addr);
  193. if (qdf_unlikely(hal_srng_access_start(hal_soc, wbm_rel_srng))) {
  194. /* TODO */
  195. /*
  196. * Need API to convert from hal_ring pointer to
  197. * Ring Type / Ring Id combo
  198. */
  199. dp_rx_err_err("%pK: HAL RING Access For WBM Release SRNG Failed - %pK",
  200. soc, wbm_rel_srng);
  201. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  202. goto done;
  203. }
  204. src_srng_desc = hal_srng_src_get_next(hal_soc, wbm_rel_srng);
  205. if (qdf_likely(src_srng_desc)) {
  206. /* Return link descriptor through WBM ring (SW2WBM)*/
  207. hal_rx_msdu_link_desc_set(hal_soc,
  208. src_srng_desc, link_desc_addr, bm_action);
  209. status = QDF_STATUS_SUCCESS;
  210. } else {
  211. struct hal_srng *srng = (struct hal_srng *)wbm_rel_srng;
  212. DP_STATS_INC(soc, rx.err.hal_ring_access_full_fail, 1);
  213. dp_info_rl("WBM Release Ring (Id %d) Full(Fail CNT %u)",
  214. srng->ring_id,
  215. soc->stats.rx.err.hal_ring_access_full_fail);
  216. dp_info_rl("HP 0x%x Reap HP 0x%x TP 0x%x Cached TP 0x%x",
  217. *srng->u.src_ring.hp_addr,
  218. srng->u.src_ring.reap_hp,
  219. *srng->u.src_ring.tp_addr,
  220. srng->u.src_ring.cached_tp);
  221. QDF_BUG(0);
  222. }
  223. done:
  224. hal_srng_access_end(hal_soc, wbm_rel_srng);
  225. return status;
  226. }
  227. qdf_export_symbol(dp_rx_link_desc_return_by_addr);
  228. /**
  229. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  230. * (WBM), following error handling
  231. *
  232. * @soc: core DP main context
  233. * @ring_desc: opaque pointer to the REO error ring descriptor
  234. *
  235. * Return: QDF_STATUS
  236. */
  237. QDF_STATUS
  238. dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  239. uint8_t bm_action)
  240. {
  241. void *buf_addr_info = HAL_RX_REO_BUF_ADDR_INFO_GET(ring_desc);
  242. return dp_rx_link_desc_return_by_addr(soc, buf_addr_info, bm_action);
  243. }
  244. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  245. /**
  246. * dp_rx_msdus_drop() - Drops all MSDU's per MPDU
  247. *
  248. * @soc: core txrx main context
  249. * @ring_desc: opaque pointer to the REO error ring descriptor
  250. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  251. * @head: head of the local descriptor free-list
  252. * @tail: tail of the local descriptor free-list
  253. * @quota: No. of units (packets) that can be serviced in one shot.
  254. *
  255. * This function is used to drop all MSDU in an MPDU
  256. *
  257. * Return: uint32_t: No. of elements processed
  258. */
  259. static uint32_t
  260. dp_rx_msdus_drop(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  261. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  262. uint8_t *mac_id,
  263. uint32_t quota)
  264. {
  265. uint32_t rx_bufs_used = 0;
  266. void *link_desc_va;
  267. struct hal_buf_info buf_info;
  268. struct dp_pdev *pdev;
  269. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  270. int i;
  271. uint8_t *rx_tlv_hdr;
  272. uint32_t tid;
  273. struct rx_desc_pool *rx_desc_pool;
  274. struct dp_rx_desc *rx_desc;
  275. /* First field in REO Dst ring Desc is buffer_addr_info */
  276. void *buf_addr_info = ring_desc;
  277. struct buffer_addr_info cur_link_desc_addr_info = { 0 };
  278. struct buffer_addr_info next_link_desc_addr_info = { 0 };
  279. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &buf_info);
  280. /* buffer_addr_info is the first element of ring_desc */
  281. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  282. (uint32_t *)ring_desc,
  283. &buf_info);
  284. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  285. if (!link_desc_va) {
  286. dp_rx_err_debug("link desc va is null, soc %pk", soc);
  287. return rx_bufs_used;
  288. }
  289. more_msdu_link_desc:
  290. /* No UNMAP required -- this is "malloc_consistent" memory */
  291. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  292. &mpdu_desc_info->msdu_count);
  293. for (i = 0; (i < mpdu_desc_info->msdu_count); i++) {
  294. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  295. soc, msdu_list.sw_cookie[i]);
  296. qdf_assert_always(rx_desc);
  297. /* all buffers from a MSDU link link belong to same pdev */
  298. *mac_id = rx_desc->pool_id;
  299. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  300. if (!pdev) {
  301. dp_rx_err_debug("%pK: pdev is null for pool_id = %d",
  302. soc, rx_desc->pool_id);
  303. return rx_bufs_used;
  304. }
  305. if (!dp_rx_desc_check_magic(rx_desc)) {
  306. dp_rx_err_err("%pK: Invalid rx_desc cookie=%d",
  307. soc, msdu_list.sw_cookie[i]);
  308. return rx_bufs_used;
  309. }
  310. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  311. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  312. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, rx_desc->nbuf);
  313. rx_desc->unmapped = 1;
  314. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  315. rx_desc->rx_buf_start = qdf_nbuf_data(rx_desc->nbuf);
  316. rx_bufs_used++;
  317. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  318. rx_desc->rx_buf_start);
  319. dp_rx_err_err("%pK: Packet received with PN error for tid :%d",
  320. soc, tid);
  321. rx_tlv_hdr = qdf_nbuf_data(rx_desc->nbuf);
  322. if (hal_rx_encryption_info_valid(soc->hal_soc, rx_tlv_hdr))
  323. hal_rx_print_pn(soc->hal_soc, rx_tlv_hdr);
  324. /* Just free the buffers */
  325. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf, *mac_id);
  326. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  327. &pdev->free_list_tail, rx_desc);
  328. }
  329. /*
  330. * If the msdu's are spread across multiple link-descriptors,
  331. * we cannot depend solely on the msdu_count(e.g., if msdu is
  332. * spread across multiple buffers).Hence, it is
  333. * necessary to check the next link_descriptor and release
  334. * all the msdu's that are part of it.
  335. */
  336. hal_rx_get_next_msdu_link_desc_buf_addr_info(
  337. link_desc_va,
  338. &next_link_desc_addr_info);
  339. if (hal_rx_is_buf_addr_info_valid(
  340. &next_link_desc_addr_info)) {
  341. /* Clear the next link desc info for the current link_desc */
  342. hal_rx_clear_next_msdu_link_desc_buf_addr_info(link_desc_va);
  343. dp_rx_link_desc_return_by_addr(soc, buf_addr_info,
  344. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  345. hal_rx_buffer_addr_info_get_paddr(
  346. &next_link_desc_addr_info,
  347. &buf_info);
  348. /* buffer_addr_info is the first element of ring_desc */
  349. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  350. (uint32_t *)&next_link_desc_addr_info,
  351. &buf_info);
  352. cur_link_desc_addr_info = next_link_desc_addr_info;
  353. buf_addr_info = &cur_link_desc_addr_info;
  354. link_desc_va =
  355. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  356. goto more_msdu_link_desc;
  357. }
  358. quota--;
  359. dp_rx_link_desc_return_by_addr(soc, buf_addr_info,
  360. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  361. return rx_bufs_used;
  362. }
  363. /**
  364. * dp_rx_pn_error_handle() - Handles PN check errors
  365. *
  366. * @soc: core txrx main context
  367. * @ring_desc: opaque pointer to the REO error ring descriptor
  368. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  369. * @head: head of the local descriptor free-list
  370. * @tail: tail of the local descriptor free-list
  371. * @quota: No. of units (packets) that can be serviced in one shot.
  372. *
  373. * This function implements PN error handling
  374. * If the peer is configured to ignore the PN check errors
  375. * or if DP feels, that this frame is still OK, the frame can be
  376. * re-injected back to REO to use some of the other features
  377. * of REO e.g. duplicate detection/routing to other cores
  378. *
  379. * Return: uint32_t: No. of elements processed
  380. */
  381. static uint32_t
  382. dp_rx_pn_error_handle(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  383. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  384. uint8_t *mac_id,
  385. uint32_t quota)
  386. {
  387. uint16_t peer_id;
  388. uint32_t rx_bufs_used = 0;
  389. struct dp_txrx_peer *txrx_peer;
  390. bool peer_pn_policy = false;
  391. dp_txrx_ref_handle txrx_ref_handle = NULL;
  392. peer_id = dp_rx_peer_metadata_peer_id_get(soc,
  393. mpdu_desc_info->peer_meta_data);
  394. txrx_peer = dp_tgt_txrx_peer_get_ref_by_id(soc, peer_id,
  395. &txrx_ref_handle,
  396. DP_MOD_ID_RX_ERR);
  397. if (qdf_likely(txrx_peer)) {
  398. /*
  399. * TODO: Check for peer specific policies & set peer_pn_policy
  400. */
  401. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  402. "discard rx due to PN error for peer %pK",
  403. txrx_peer);
  404. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX_ERR);
  405. }
  406. dp_rx_err_err("%pK: Packet received with PN error", soc);
  407. /* No peer PN policy -- definitely drop */
  408. if (!peer_pn_policy)
  409. rx_bufs_used = dp_rx_msdus_drop(soc, ring_desc,
  410. mpdu_desc_info,
  411. mac_id, quota);
  412. return rx_bufs_used;
  413. }
  414. #ifdef DP_RX_DELIVER_ALL_OOR_FRAMES
  415. /**
  416. * dp_rx_deliver_oor_frame() - deliver OOR frames to stack
  417. * @soc: Datapath soc handler
  418. * @peer: pointer to DP peer
  419. * @nbuf: pointer to the skb of RX frame
  420. * @frame_mask: the mask for speical frame needed
  421. * @rx_tlv_hdr: start of rx tlv header
  422. *
  423. * note: Msdu_len must have been stored in QDF_NBUF_CB_RX_PKT_LEN(nbuf) and
  424. * single nbuf is expected.
  425. *
  426. * return: true - nbuf has been delivered to stack, false - not.
  427. */
  428. static bool
  429. dp_rx_deliver_oor_frame(struct dp_soc *soc,
  430. struct dp_txrx_peer *txrx_peer,
  431. qdf_nbuf_t nbuf, uint32_t frame_mask,
  432. uint8_t *rx_tlv_hdr)
  433. {
  434. uint32_t l2_hdr_offset = 0;
  435. uint16_t msdu_len = 0;
  436. uint32_t skip_len;
  437. l2_hdr_offset =
  438. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  439. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  440. skip_len = l2_hdr_offset;
  441. } else {
  442. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  443. skip_len = l2_hdr_offset + soc->rx_pkt_tlv_size;
  444. qdf_nbuf_set_pktlen(nbuf, msdu_len + skip_len);
  445. }
  446. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  447. dp_rx_set_hdr_pad(nbuf, l2_hdr_offset);
  448. qdf_nbuf_pull_head(nbuf, skip_len);
  449. qdf_nbuf_set_exc_frame(nbuf, 1);
  450. dp_info_rl("OOR frame, mpdu sn 0x%x",
  451. hal_rx_get_rx_sequence(soc->hal_soc, rx_tlv_hdr));
  452. dp_rx_deliver_to_stack(soc, txrx_peer->vdev, txrx_peer, nbuf, NULL);
  453. return true;
  454. }
  455. #else
  456. static bool
  457. dp_rx_deliver_oor_frame(struct dp_soc *soc,
  458. struct dp_txrx_peer *txrx_peer,
  459. qdf_nbuf_t nbuf, uint32_t frame_mask,
  460. uint8_t *rx_tlv_hdr)
  461. {
  462. return dp_rx_deliver_special_frame(soc, txrx_peer, nbuf, frame_mask,
  463. rx_tlv_hdr);
  464. }
  465. #endif
  466. /**
  467. * dp_rx_oor_handle() - Handles the msdu which is OOR error
  468. *
  469. * @soc: core txrx main context
  470. * @nbuf: pointer to msdu skb
  471. * @peer_id: dp peer ID
  472. * @rx_tlv_hdr: start of rx tlv header
  473. *
  474. * This function process the msdu delivered from REO2TCL
  475. * ring with error type OOR
  476. *
  477. * Return: None
  478. */
  479. static void
  480. dp_rx_oor_handle(struct dp_soc *soc,
  481. qdf_nbuf_t nbuf,
  482. uint16_t peer_id,
  483. uint8_t *rx_tlv_hdr)
  484. {
  485. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  486. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  487. struct dp_txrx_peer *txrx_peer = NULL;
  488. dp_txrx_ref_handle txrx_ref_handle = NULL;
  489. txrx_peer = dp_tgt_txrx_peer_get_ref_by_id(soc, peer_id,
  490. &txrx_ref_handle,
  491. DP_MOD_ID_RX_ERR);
  492. if (!txrx_peer) {
  493. dp_info_rl("peer not found");
  494. goto free_nbuf;
  495. }
  496. if (dp_rx_deliver_oor_frame(soc, txrx_peer, nbuf, frame_mask,
  497. rx_tlv_hdr)) {
  498. DP_STATS_INC(soc, rx.err.reo_err_oor_to_stack, 1);
  499. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX_ERR);
  500. return;
  501. }
  502. free_nbuf:
  503. if (txrx_peer)
  504. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX_ERR);
  505. DP_STATS_INC(soc, rx.err.reo_err_oor_drop, 1);
  506. dp_rx_nbuf_free(nbuf);
  507. }
  508. /**
  509. * dp_rx_err_nbuf_pn_check() - Check if the PN number of this current packet
  510. * is a monotonous increment of packet number
  511. * from the previous successfully re-ordered
  512. * frame.
  513. * @soc: Datapath SOC handle
  514. * @ring_desc: REO ring descriptor
  515. * @nbuf: Current packet
  516. *
  517. * Return: QDF_STATUS_SUCCESS, if the pn check passes, else QDF_STATUS_E_FAILURE
  518. */
  519. static inline QDF_STATUS
  520. dp_rx_err_nbuf_pn_check(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  521. qdf_nbuf_t nbuf)
  522. {
  523. uint64_t prev_pn, curr_pn[2];
  524. if (!hal_rx_encryption_info_valid(soc->hal_soc, qdf_nbuf_data(nbuf)))
  525. return QDF_STATUS_SUCCESS;
  526. hal_rx_reo_prev_pn_get(soc->hal_soc, ring_desc, &prev_pn);
  527. hal_rx_tlv_get_pn_num(soc->hal_soc, qdf_nbuf_data(nbuf), curr_pn);
  528. if (curr_pn[0] > prev_pn)
  529. return QDF_STATUS_SUCCESS;
  530. return QDF_STATUS_E_FAILURE;
  531. }
  532. #ifdef WLAN_SKIP_BAR_UPDATE
  533. static
  534. void dp_rx_err_handle_bar(struct dp_soc *soc,
  535. struct dp_peer *peer,
  536. qdf_nbuf_t nbuf)
  537. {
  538. dp_info_rl("BAR update to H.W is skipped");
  539. DP_STATS_INC(soc, rx.err.bar_handle_fail_count, 1);
  540. }
  541. #else
  542. static
  543. void dp_rx_err_handle_bar(struct dp_soc *soc,
  544. struct dp_peer *peer,
  545. qdf_nbuf_t nbuf)
  546. {
  547. uint8_t *rx_tlv_hdr;
  548. unsigned char type, subtype;
  549. uint16_t start_seq_num;
  550. uint32_t tid;
  551. QDF_STATUS status;
  552. struct ieee80211_frame_bar *bar;
  553. /*
  554. * 1. Is this a BAR frame. If not Discard it.
  555. * 2. If it is, get the peer id, tid, ssn
  556. * 2a Do a tid update
  557. */
  558. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  559. bar = (struct ieee80211_frame_bar *)(rx_tlv_hdr + soc->rx_pkt_tlv_size);
  560. type = bar->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
  561. subtype = bar->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
  562. if (!(type == IEEE80211_FC0_TYPE_CTL &&
  563. subtype == QDF_IEEE80211_FC0_SUBTYPE_BAR)) {
  564. dp_err_rl("Not a BAR frame!");
  565. return;
  566. }
  567. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc, rx_tlv_hdr);
  568. qdf_assert_always(tid < DP_MAX_TIDS);
  569. start_seq_num = le16toh(bar->i_seq) >> IEEE80211_SEQ_SEQ_SHIFT;
  570. dp_info_rl("tid %u window_size %u start_seq_num %u",
  571. tid, peer->rx_tid[tid].ba_win_size, start_seq_num);
  572. status = dp_rx_tid_update_wifi3(peer, tid,
  573. peer->rx_tid[tid].ba_win_size,
  574. start_seq_num,
  575. true);
  576. if (status != QDF_STATUS_SUCCESS) {
  577. dp_err_rl("failed to handle bar frame update rx tid");
  578. DP_STATS_INC(soc, rx.err.bar_handle_fail_count, 1);
  579. } else {
  580. DP_STATS_INC(soc, rx.err.ssn_update_count, 1);
  581. }
  582. }
  583. #endif
  584. /**
  585. * _dp_rx_bar_frame_handle(): Core of the BAR frame handling
  586. * @soc: Datapath SoC handle
  587. * @nbuf: packet being processed
  588. * @mpdu_desc_info: mpdu desc info for the current packet
  589. * @tid: tid on which the packet arrived
  590. * @err_status: Flag to indicate if REO encountered an error while routing this
  591. * frame
  592. * @error_code: REO error code
  593. *
  594. * Return: None
  595. */
  596. static void
  597. _dp_rx_bar_frame_handle(struct dp_soc *soc, qdf_nbuf_t nbuf,
  598. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  599. uint32_t tid, uint8_t err_status, uint32_t error_code)
  600. {
  601. uint16_t peer_id;
  602. struct dp_peer *peer;
  603. peer_id = dp_rx_peer_metadata_peer_id_get(soc,
  604. mpdu_desc_info->peer_meta_data);
  605. peer = dp_peer_get_tgt_peer_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  606. if (!peer)
  607. return;
  608. dp_info("BAR frame: "
  609. " peer_id = %d"
  610. " tid = %u"
  611. " SSN = %d"
  612. " error status = %d",
  613. peer->peer_id,
  614. tid,
  615. mpdu_desc_info->mpdu_seq,
  616. err_status);
  617. if (err_status == HAL_REO_ERROR_DETECTED) {
  618. switch (error_code) {
  619. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  620. /* fallthrough */
  621. case HAL_REO_ERR_BAR_FRAME_OOR:
  622. dp_rx_err_handle_bar(soc, peer, nbuf);
  623. DP_STATS_INC(soc, rx.err.reo_error[error_code], 1);
  624. break;
  625. default:
  626. DP_STATS_INC(soc, rx.bar_frame, 1);
  627. }
  628. }
  629. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  630. }
  631. #ifdef DP_INVALID_PEER_ASSERT
  632. #define DP_PDEV_INVALID_PEER_MSDU_CHECK(head, tail) \
  633. do { \
  634. qdf_assert_always(!(head)); \
  635. qdf_assert_always(!(tail)); \
  636. } while (0)
  637. #else
  638. #define DP_PDEV_INVALID_PEER_MSDU_CHECK(head, tail) /* no op */
  639. #endif
  640. /**
  641. * dp_rx_chain_msdus() - Function to chain all msdus of a mpdu
  642. * to pdev invalid peer list
  643. *
  644. * @soc: core DP main context
  645. * @nbuf: Buffer pointer
  646. * @rx_tlv_hdr: start of rx tlv header
  647. * @mac_id: mac id
  648. *
  649. * Return: bool: true for last msdu of mpdu
  650. */
  651. static bool
  652. dp_rx_chain_msdus(struct dp_soc *soc, qdf_nbuf_t nbuf,
  653. uint8_t *rx_tlv_hdr, uint8_t mac_id)
  654. {
  655. bool mpdu_done = false;
  656. qdf_nbuf_t curr_nbuf = NULL;
  657. qdf_nbuf_t tmp_nbuf = NULL;
  658. /* TODO: Currently only single radio is supported, hence
  659. * pdev hard coded to '0' index
  660. */
  661. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  662. if (!dp_pdev) {
  663. dp_rx_err_debug("%pK: pdev is null for mac_id = %d", soc, mac_id);
  664. return mpdu_done;
  665. }
  666. /* if invalid peer SG list has max values free the buffers in list
  667. * and treat current buffer as start of list
  668. *
  669. * current logic to detect the last buffer from attn_tlv is not reliable
  670. * in OFDMA UL scenario hence add max buffers check to avoid list pile
  671. * up
  672. */
  673. if (!dp_pdev->first_nbuf ||
  674. (dp_pdev->invalid_peer_head_msdu &&
  675. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST
  676. (dp_pdev->invalid_peer_head_msdu) >= DP_MAX_INVALID_BUFFERS)) {
  677. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  678. dp_pdev->ppdu_id = hal_rx_get_ppdu_id(soc->hal_soc,
  679. rx_tlv_hdr);
  680. dp_pdev->first_nbuf = true;
  681. /* If the new nbuf received is the first msdu of the
  682. * amsdu and there are msdus in the invalid peer msdu
  683. * list, then let us free all the msdus of the invalid
  684. * peer msdu list.
  685. * This scenario can happen when we start receiving
  686. * new a-msdu even before the previous a-msdu is completely
  687. * received.
  688. */
  689. curr_nbuf = dp_pdev->invalid_peer_head_msdu;
  690. while (curr_nbuf) {
  691. tmp_nbuf = curr_nbuf->next;
  692. dp_rx_nbuf_free(curr_nbuf);
  693. curr_nbuf = tmp_nbuf;
  694. }
  695. dp_pdev->invalid_peer_head_msdu = NULL;
  696. dp_pdev->invalid_peer_tail_msdu = NULL;
  697. dp_monitor_get_mpdu_status(dp_pdev, soc, rx_tlv_hdr);
  698. }
  699. if (dp_pdev->ppdu_id == hal_rx_attn_phy_ppdu_id_get(soc->hal_soc,
  700. rx_tlv_hdr) &&
  701. hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  702. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  703. qdf_assert_always(dp_pdev->first_nbuf == true);
  704. dp_pdev->first_nbuf = false;
  705. mpdu_done = true;
  706. }
  707. /*
  708. * For MCL, invalid_peer_head_msdu and invalid_peer_tail_msdu
  709. * should be NULL here, add the checking for debugging purpose
  710. * in case some corner case.
  711. */
  712. DP_PDEV_INVALID_PEER_MSDU_CHECK(dp_pdev->invalid_peer_head_msdu,
  713. dp_pdev->invalid_peer_tail_msdu);
  714. DP_RX_LIST_APPEND(dp_pdev->invalid_peer_head_msdu,
  715. dp_pdev->invalid_peer_tail_msdu,
  716. nbuf);
  717. return mpdu_done;
  718. }
  719. /**
  720. * dp_rx_bar_frame_handle() - Function to handle err BAR frames
  721. * @soc: core DP main context
  722. * @ring_desc: Hal ring desc
  723. * @rx_desc: dp rx desc
  724. * @mpdu_desc_info: mpdu desc info
  725. *
  726. * Handle the error BAR frames received. Ensure the SOC level
  727. * stats are updated based on the REO error code. The BAR frames
  728. * are further processed by updating the Rx tids with the start
  729. * sequence number (SSN) and BA window size. Desc is returned
  730. * to the free desc list
  731. *
  732. * Return: none
  733. */
  734. static void
  735. dp_rx_bar_frame_handle(struct dp_soc *soc,
  736. hal_ring_desc_t ring_desc,
  737. struct dp_rx_desc *rx_desc,
  738. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  739. uint8_t err_status,
  740. uint32_t err_code)
  741. {
  742. qdf_nbuf_t nbuf;
  743. struct dp_pdev *pdev;
  744. struct rx_desc_pool *rx_desc_pool;
  745. uint8_t *rx_tlv_hdr;
  746. uint32_t tid;
  747. nbuf = rx_desc->nbuf;
  748. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  749. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  750. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  751. rx_desc->unmapped = 1;
  752. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  753. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  754. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  755. rx_tlv_hdr);
  756. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  757. _dp_rx_bar_frame_handle(soc, nbuf, mpdu_desc_info, tid, err_status,
  758. err_code);
  759. dp_rx_link_desc_return(soc, ring_desc,
  760. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  761. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  762. rx_desc->pool_id);
  763. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  764. &pdev->free_list_tail,
  765. rx_desc);
  766. }
  767. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  768. /**
  769. * dp_2k_jump_handle() - Function to handle 2k jump exception
  770. * on WBM ring
  771. *
  772. * @soc: core DP main context
  773. * @nbuf: buffer pointer
  774. * @rx_tlv_hdr: start of rx tlv header
  775. * @peer_id: peer id of first msdu
  776. * @tid: Tid for which exception occurred
  777. *
  778. * This function handles 2k jump violations arising out
  779. * of receiving aggregates in non BA case. This typically
  780. * may happen if aggregates are received on a QOS enabled TID
  781. * while Rx window size is still initialized to value of 2. Or
  782. * it may also happen if negotiated window size is 1 but peer
  783. * sends aggregates.
  784. *
  785. */
  786. void
  787. dp_2k_jump_handle(struct dp_soc *soc,
  788. qdf_nbuf_t nbuf,
  789. uint8_t *rx_tlv_hdr,
  790. uint16_t peer_id,
  791. uint8_t tid)
  792. {
  793. struct dp_peer *peer = NULL;
  794. struct dp_rx_tid *rx_tid = NULL;
  795. uint32_t frame_mask = FRAME_MASK_IPV4_ARP;
  796. peer = dp_peer_get_ref_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  797. if (!peer) {
  798. dp_rx_err_info_rl("%pK: peer not found", soc);
  799. goto free_nbuf;
  800. }
  801. if (tid >= DP_MAX_TIDS) {
  802. dp_info_rl("invalid tid");
  803. goto nbuf_deliver;
  804. }
  805. rx_tid = &peer->rx_tid[tid];
  806. qdf_spin_lock_bh(&rx_tid->tid_lock);
  807. /* only if BA session is active, allow send Delba */
  808. if (rx_tid->ba_status != DP_RX_BA_ACTIVE) {
  809. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  810. goto nbuf_deliver;
  811. }
  812. if (!rx_tid->delba_tx_status) {
  813. rx_tid->delba_tx_retry++;
  814. rx_tid->delba_tx_status = 1;
  815. rx_tid->delba_rcode =
  816. IEEE80211_REASON_QOS_SETUP_REQUIRED;
  817. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  818. if (soc->cdp_soc.ol_ops->send_delba) {
  819. DP_STATS_INC(soc, rx.err.rx_2k_jump_delba_sent,
  820. 1);
  821. soc->cdp_soc.ol_ops->send_delba(
  822. peer->vdev->pdev->soc->ctrl_psoc,
  823. peer->vdev->vdev_id,
  824. peer->mac_addr.raw,
  825. tid,
  826. rx_tid->delba_rcode,
  827. CDP_DELBA_2K_JUMP);
  828. }
  829. } else {
  830. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  831. }
  832. nbuf_deliver:
  833. if (dp_rx_deliver_special_frame(soc, peer->txrx_peer, nbuf, frame_mask,
  834. rx_tlv_hdr)) {
  835. DP_STATS_INC(soc, rx.err.rx_2k_jump_to_stack, 1);
  836. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  837. return;
  838. }
  839. free_nbuf:
  840. if (peer)
  841. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  842. DP_STATS_INC(soc, rx.err.rx_2k_jump_drop, 1);
  843. dp_rx_nbuf_free(nbuf);
  844. }
  845. #if defined(QCA_WIFI_QCA6390) || defined(QCA_WIFI_QCA6490) || \
  846. defined(QCA_WIFI_QCA6750) || defined(QCA_WIFI_KIWI)
  847. /**
  848. * dp_rx_null_q_handle_invalid_peer_id_exception() - to find exception
  849. * @soc: pointer to dp_soc struct
  850. * @pool_id: Pool id to find dp_pdev
  851. * @rx_tlv_hdr: TLV header of received packet
  852. * @nbuf: SKB
  853. *
  854. * In certain types of packets if peer_id is not correct then
  855. * driver may not be able find. Try finding peer by addr_2 of
  856. * received MPDU. If you find the peer then most likely sw_peer_id &
  857. * ast_idx is corrupted.
  858. *
  859. * Return: True if you find the peer by addr_2 of received MPDU else false
  860. */
  861. static bool
  862. dp_rx_null_q_handle_invalid_peer_id_exception(struct dp_soc *soc,
  863. uint8_t pool_id,
  864. uint8_t *rx_tlv_hdr,
  865. qdf_nbuf_t nbuf)
  866. {
  867. struct dp_peer *peer = NULL;
  868. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(soc->hal_soc, rx_tlv_hdr);
  869. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  870. struct ieee80211_frame *wh = (struct ieee80211_frame *)rx_pkt_hdr;
  871. if (!pdev) {
  872. dp_rx_err_debug("%pK: pdev is null for pool_id = %d",
  873. soc, pool_id);
  874. return false;
  875. }
  876. /*
  877. * WAR- In certain types of packets if peer_id is not correct then
  878. * driver may not be able find. Try finding peer by addr_2 of
  879. * received MPDU
  880. */
  881. if (wh)
  882. peer = dp_peer_find_hash_find(soc, wh->i_addr2, 0,
  883. DP_VDEV_ALL, DP_MOD_ID_RX_ERR);
  884. if (peer) {
  885. dp_verbose_debug("MPDU sw_peer_id & ast_idx is corrupted");
  886. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  887. QDF_TRACE_LEVEL_DEBUG);
  888. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer_id,
  889. 1, qdf_nbuf_len(nbuf));
  890. dp_rx_nbuf_free(nbuf);
  891. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  892. return true;
  893. }
  894. return false;
  895. }
  896. /**
  897. * dp_rx_check_pkt_len() - Check for pktlen validity
  898. * @soc: DP SOC context
  899. * @pkt_len: computed length of the pkt from caller in bytes
  900. *
  901. * Return: true if pktlen > RX_BUFFER_SIZE, else return false
  902. *
  903. */
  904. static inline
  905. bool dp_rx_check_pkt_len(struct dp_soc *soc, uint32_t pkt_len)
  906. {
  907. if (qdf_unlikely(pkt_len > RX_DATA_BUFFER_SIZE)) {
  908. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_pkt_len,
  909. 1, pkt_len);
  910. return true;
  911. } else {
  912. return false;
  913. }
  914. }
  915. #else
  916. static inline bool
  917. dp_rx_null_q_handle_invalid_peer_id_exception(struct dp_soc *soc,
  918. uint8_t pool_id,
  919. uint8_t *rx_tlv_hdr,
  920. qdf_nbuf_t nbuf)
  921. {
  922. return false;
  923. }
  924. static inline
  925. bool dp_rx_check_pkt_len(struct dp_soc *soc, uint32_t pkt_len)
  926. {
  927. return false;
  928. }
  929. #endif
  930. /*
  931. * dp_rx_deliver_to_osif_stack() - function to deliver rx pkts to stack
  932. * @soc: DP soc
  933. * @vdv: DP vdev handle
  934. * @txrx_peer: pointer to the txrx_peer object
  935. * @nbuf: skb list head
  936. * @tail: skb list tail
  937. * @is_eapol: eapol pkt check
  938. *
  939. * Return: None
  940. */
  941. #ifdef QCA_SUPPORT_EAPOL_OVER_CONTROL_PORT
  942. static inline void
  943. dp_rx_deliver_to_osif_stack(struct dp_soc *soc,
  944. struct dp_vdev *vdev,
  945. struct dp_txrx_peer *txrx_peer,
  946. qdf_nbuf_t nbuf,
  947. qdf_nbuf_t tail,
  948. bool is_eapol)
  949. {
  950. if (is_eapol && soc->eapol_over_control_port)
  951. dp_rx_eapol_deliver_to_stack(soc, vdev, txrx_peer, nbuf, NULL);
  952. else
  953. dp_rx_deliver_to_stack(soc, vdev, txrx_peer, nbuf, NULL);
  954. }
  955. #else
  956. static inline void
  957. dp_rx_deliver_to_osif_stack(struct dp_soc *soc,
  958. struct dp_vdev *vdev,
  959. struct dp_txrx_peer *txrx_peer,
  960. qdf_nbuf_t nbuf,
  961. qdf_nbuf_t tail,
  962. bool is_eapol)
  963. {
  964. dp_rx_deliver_to_stack(soc, vdev, txrx_peer, nbuf, NULL);
  965. }
  966. #endif
  967. #ifdef WLAN_FEATURE_11BE_MLO
  968. /*
  969. * dp_rx_err_match_dhost() - function to check whether dest-mac is correct
  970. * @eh: Ethernet header of incoming packet
  971. * @vdev: dp_vdev object of the VAP on which this data packet is received
  972. *
  973. * Return: 1 if the destination mac is correct,
  974. * 0 if this frame is not correctly destined to this VAP/MLD
  975. */
  976. int dp_rx_err_match_dhost(qdf_ether_header_t *eh, struct dp_vdev *vdev)
  977. {
  978. return ((qdf_mem_cmp(eh->ether_dhost, &vdev->mac_addr.raw[0],
  979. QDF_MAC_ADDR_SIZE) == 0) ||
  980. (qdf_mem_cmp(eh->ether_dhost, &vdev->mld_mac_addr.raw[0],
  981. QDF_MAC_ADDR_SIZE) == 0));
  982. }
  983. #else
  984. int dp_rx_err_match_dhost(qdf_ether_header_t *eh, struct dp_vdev *vdev)
  985. {
  986. return (qdf_mem_cmp(eh->ether_dhost, &vdev->mac_addr.raw[0],
  987. QDF_MAC_ADDR_SIZE) == 0);
  988. }
  989. #endif
  990. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  991. /**
  992. * dp_rx_err_drop_3addr_mcast() - Check if feature drop_3ddr_mcast is enabled
  993. * If so, drop the multicast frame.
  994. * @vdev: datapath vdev
  995. * @rx_tlv_hdr: TLV header
  996. *
  997. * Return: true if packet is to be dropped,
  998. * false, if packet is not dropped.
  999. */
  1000. static bool
  1001. dp_rx_err_drop_3addr_mcast(struct dp_vdev *vdev, uint8_t *rx_tlv_hdr)
  1002. {
  1003. struct dp_soc *soc = vdev->pdev->soc;
  1004. if (!vdev->drop_3addr_mcast)
  1005. return false;
  1006. if (vdev->opmode != wlan_op_mode_sta)
  1007. return false;
  1008. if (hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc, rx_tlv_hdr))
  1009. return true;
  1010. return false;
  1011. }
  1012. /**
  1013. * dp_rx_err_is_pn_check_needed() - Check if the packet number check is needed
  1014. * for this frame received in REO error ring.
  1015. * @soc: Datapath SOC handle
  1016. * @error: REO error detected or not
  1017. * @error_code: Error code in case of REO error
  1018. *
  1019. * Return: true if pn check if needed in software,
  1020. * false, if pn check if not needed.
  1021. */
  1022. static inline bool
  1023. dp_rx_err_is_pn_check_needed(struct dp_soc *soc, uint8_t error,
  1024. uint32_t error_code)
  1025. {
  1026. return (soc->features.pn_in_reo_dest &&
  1027. (error == HAL_REO_ERROR_DETECTED &&
  1028. (hal_rx_reo_is_2k_jump(error_code) ||
  1029. hal_rx_reo_is_oor_error(error_code) ||
  1030. hal_rx_reo_is_bar_oor_2k_jump(error_code))));
  1031. }
  1032. /**
  1033. * dp_rx_null_q_desc_handle() - Function to handle NULL Queue
  1034. * descriptor violation on either a
  1035. * REO or WBM ring
  1036. *
  1037. * @soc: core DP main context
  1038. * @nbuf: buffer pointer
  1039. * @rx_tlv_hdr: start of rx tlv header
  1040. * @pool_id: mac id
  1041. * @txrx_peer: txrx peer handle
  1042. *
  1043. * This function handles NULL queue descriptor violations arising out
  1044. * a missing REO queue for a given peer or a given TID. This typically
  1045. * may happen if a packet is received on a QOS enabled TID before the
  1046. * ADDBA negotiation for that TID, when the TID queue is setup. Or
  1047. * it may also happen for MC/BC frames if they are not routed to the
  1048. * non-QOS TID queue, in the absence of any other default TID queue.
  1049. * This error can show up both in a REO destination or WBM release ring.
  1050. *
  1051. * Return: QDF_STATUS_SUCCESS, if nbuf handled successfully. QDF status code
  1052. * if nbuf could not be handled or dropped.
  1053. */
  1054. static QDF_STATUS
  1055. dp_rx_null_q_desc_handle(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1056. uint8_t *rx_tlv_hdr, uint8_t pool_id,
  1057. struct dp_txrx_peer *txrx_peer)
  1058. {
  1059. uint32_t pkt_len;
  1060. uint16_t msdu_len;
  1061. struct dp_vdev *vdev;
  1062. uint8_t tid;
  1063. qdf_ether_header_t *eh;
  1064. struct hal_rx_msdu_metadata msdu_metadata;
  1065. uint16_t sa_idx = 0;
  1066. bool is_eapol = 0;
  1067. bool enh_flag;
  1068. qdf_nbuf_set_rx_chfrag_start(nbuf,
  1069. hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1070. rx_tlv_hdr));
  1071. qdf_nbuf_set_rx_chfrag_end(nbuf,
  1072. hal_rx_msdu_end_last_msdu_get(soc->hal_soc,
  1073. rx_tlv_hdr));
  1074. qdf_nbuf_set_da_mcbc(nbuf, hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1075. rx_tlv_hdr));
  1076. qdf_nbuf_set_da_valid(nbuf,
  1077. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  1078. rx_tlv_hdr));
  1079. qdf_nbuf_set_sa_valid(nbuf,
  1080. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  1081. rx_tlv_hdr));
  1082. hal_rx_msdu_metadata_get(soc->hal_soc, rx_tlv_hdr, &msdu_metadata);
  1083. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1084. pkt_len = msdu_len + msdu_metadata.l3_hdr_pad + soc->rx_pkt_tlv_size;
  1085. if (qdf_likely(!qdf_nbuf_is_frag(nbuf))) {
  1086. if (dp_rx_check_pkt_len(soc, pkt_len))
  1087. goto drop_nbuf;
  1088. /* Set length in nbuf */
  1089. qdf_nbuf_set_pktlen(
  1090. nbuf, qdf_min(pkt_len, (uint32_t)RX_DATA_BUFFER_SIZE));
  1091. qdf_assert_always(nbuf->data == rx_tlv_hdr);
  1092. }
  1093. /*
  1094. * Check if DMA completed -- msdu_done is the last bit
  1095. * to be written
  1096. */
  1097. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1098. dp_err_rl("MSDU DONE failure");
  1099. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1100. QDF_TRACE_LEVEL_INFO);
  1101. qdf_assert(0);
  1102. }
  1103. if (!txrx_peer &&
  1104. dp_rx_null_q_handle_invalid_peer_id_exception(soc, pool_id,
  1105. rx_tlv_hdr, nbuf))
  1106. return QDF_STATUS_E_FAILURE;
  1107. if (!txrx_peer) {
  1108. bool mpdu_done = false;
  1109. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  1110. if (!pdev) {
  1111. dp_err_rl("pdev is null for pool_id = %d", pool_id);
  1112. return QDF_STATUS_E_FAILURE;
  1113. }
  1114. dp_err_rl("txrx_peer is NULL");
  1115. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1116. qdf_nbuf_len(nbuf));
  1117. /* QCN9000 has the support enabled */
  1118. if (qdf_unlikely(soc->wbm_release_desc_rx_sg_support)) {
  1119. mpdu_done = true;
  1120. nbuf->next = NULL;
  1121. /* Trigger invalid peer handler wrapper */
  1122. dp_rx_process_invalid_peer_wrapper(soc,
  1123. nbuf, mpdu_done, pool_id);
  1124. } else {
  1125. mpdu_done = dp_rx_chain_msdus(soc, nbuf, rx_tlv_hdr, pool_id);
  1126. /* Trigger invalid peer handler wrapper */
  1127. dp_rx_process_invalid_peer_wrapper(soc,
  1128. pdev->invalid_peer_head_msdu,
  1129. mpdu_done, pool_id);
  1130. }
  1131. if (mpdu_done) {
  1132. pdev->invalid_peer_head_msdu = NULL;
  1133. pdev->invalid_peer_tail_msdu = NULL;
  1134. }
  1135. return QDF_STATUS_E_FAILURE;
  1136. }
  1137. vdev = txrx_peer->vdev;
  1138. if (!vdev) {
  1139. dp_err_rl("Null vdev!");
  1140. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1141. goto drop_nbuf;
  1142. }
  1143. /*
  1144. * Advance the packet start pointer by total size of
  1145. * pre-header TLV's
  1146. */
  1147. if (qdf_nbuf_is_frag(nbuf))
  1148. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1149. else
  1150. qdf_nbuf_pull_head(nbuf, (msdu_metadata.l3_hdr_pad +
  1151. soc->rx_pkt_tlv_size));
  1152. DP_STATS_INC_PKT(vdev, rx_i.null_q_desc_pkt, 1, qdf_nbuf_len(nbuf));
  1153. dp_vdev_peer_stats_update_protocol_cnt(vdev, nbuf, NULL, 0, 1);
  1154. if (dp_rx_err_drop_3addr_mcast(vdev, rx_tlv_hdr)) {
  1155. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.mcast_3addr_drop, 1);
  1156. goto drop_nbuf;
  1157. }
  1158. if (hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc, rx_tlv_hdr)) {
  1159. sa_idx = hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr);
  1160. if ((sa_idx < 0) ||
  1161. (sa_idx >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) {
  1162. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1163. goto drop_nbuf;
  1164. }
  1165. }
  1166. if ((!soc->mec_fw_offload) &&
  1167. dp_rx_mcast_echo_check(soc, txrx_peer, rx_tlv_hdr, nbuf)) {
  1168. /* this is a looped back MCBC pkt, drop it */
  1169. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1170. qdf_nbuf_len(nbuf));
  1171. goto drop_nbuf;
  1172. }
  1173. /*
  1174. * In qwrap mode if the received packet matches with any of the vdev
  1175. * mac addresses, drop it. Donot receive multicast packets originated
  1176. * from any proxysta.
  1177. */
  1178. if (check_qwrap_multicast_loopback(vdev, nbuf)) {
  1179. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1180. qdf_nbuf_len(nbuf));
  1181. goto drop_nbuf;
  1182. }
  1183. if (qdf_unlikely(txrx_peer->nawds_enabled &&
  1184. hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1185. rx_tlv_hdr))) {
  1186. dp_err_rl("free buffer for multicast packet");
  1187. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.nawds_mcast_drop, 1);
  1188. goto drop_nbuf;
  1189. }
  1190. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, txrx_peer)) {
  1191. dp_err_rl("mcast Policy Check Drop pkt");
  1192. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.policy_check_drop, 1);
  1193. goto drop_nbuf;
  1194. }
  1195. /* WDS Source Port Learning */
  1196. if (!soc->ast_offload_support &&
  1197. qdf_likely(vdev->rx_decap_type == htt_cmn_pkt_type_ethernet &&
  1198. vdev->wds_enabled))
  1199. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, txrx_peer, nbuf,
  1200. msdu_metadata);
  1201. if (hal_rx_is_unicast(soc->hal_soc, rx_tlv_hdr)) {
  1202. struct dp_peer *peer;
  1203. tid = hal_rx_tid_get(soc->hal_soc, rx_tlv_hdr);
  1204. peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id,
  1205. DP_MOD_ID_RX_ERR);
  1206. if (peer) {
  1207. if (!peer->rx_tid[tid].hw_qdesc_vaddr_unaligned)
  1208. dp_rx_tid_setup_wifi3(peer, tid, 1,
  1209. IEEE80211_SEQ_MAX);
  1210. /* IEEE80211_SEQ_MAX indicates invalid start_seq */
  1211. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  1212. }
  1213. }
  1214. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1215. if (!txrx_peer->authorize) {
  1216. is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  1217. qdf_nbuf_is_ipv4_wapi_pkt(nbuf);
  1218. if (is_eapol) {
  1219. if (!dp_rx_err_match_dhost(eh, vdev))
  1220. goto drop_nbuf;
  1221. } else {
  1222. goto drop_nbuf;
  1223. }
  1224. }
  1225. /*
  1226. * Drop packets in this path if cce_match is found. Packets will come
  1227. * in following path depending on whether tidQ is setup.
  1228. * 1. If tidQ is setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE and
  1229. * cce_match = 1
  1230. * Packets with WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE are already
  1231. * dropped.
  1232. * 2. If tidQ is not setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ERROR and
  1233. * cce_match = 1
  1234. * These packets need to be dropped and should not get delivered
  1235. * to stack.
  1236. */
  1237. if (qdf_unlikely(dp_rx_err_cce_drop(soc, vdev, nbuf, rx_tlv_hdr))) {
  1238. goto drop_nbuf;
  1239. }
  1240. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  1241. qdf_nbuf_set_next(nbuf, NULL);
  1242. dp_rx_deliver_raw(vdev, nbuf, txrx_peer);
  1243. } else {
  1244. enh_flag = vdev->pdev->enhanced_stats_en;
  1245. qdf_nbuf_set_next(nbuf, NULL);
  1246. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1, qdf_nbuf_len(nbuf),
  1247. enh_flag);
  1248. /*
  1249. * Update the protocol tag in SKB based on
  1250. * CCE metadata
  1251. */
  1252. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1253. EXCEPTION_DEST_RING_ID,
  1254. true, true);
  1255. /* Update the flow tag in SKB based on FSE metadata */
  1256. dp_rx_update_flow_tag(soc, vdev, nbuf,
  1257. rx_tlv_hdr, true);
  1258. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(
  1259. soc->hal_soc, rx_tlv_hdr) &&
  1260. (vdev->rx_decap_type ==
  1261. htt_cmn_pkt_type_ethernet))) {
  1262. DP_PEER_MC_INCC_PKT(txrx_peer, 1, qdf_nbuf_len(nbuf),
  1263. enh_flag);
  1264. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost))
  1265. DP_PEER_BC_INCC_PKT(txrx_peer, 1,
  1266. qdf_nbuf_len(nbuf),
  1267. enh_flag);
  1268. }
  1269. qdf_nbuf_set_exc_frame(nbuf, 1);
  1270. dp_rx_deliver_to_osif_stack(soc, vdev, txrx_peer, nbuf, NULL,
  1271. is_eapol);
  1272. }
  1273. return QDF_STATUS_SUCCESS;
  1274. drop_nbuf:
  1275. dp_rx_nbuf_free(nbuf);
  1276. return QDF_STATUS_E_FAILURE;
  1277. }
  1278. /**
  1279. * dp_rx_reo_err_entry_process() - Handles for REO error entry processing
  1280. *
  1281. * @soc: core txrx main context
  1282. * @ring_desc: opaque pointer to the REO error ring descriptor
  1283. * @mpdu_desc_info: pointer to mpdu level description info
  1284. * @link_desc_va: pointer to msdu_link_desc virtual address
  1285. * @err_code: reo erro code fetched from ring entry
  1286. *
  1287. * Function to handle msdus fetched from msdu link desc, currently
  1288. * support REO error NULL queue, 2K jump, OOR.
  1289. *
  1290. * Return: msdu count processed
  1291. */
  1292. static uint32_t
  1293. dp_rx_reo_err_entry_process(struct dp_soc *soc,
  1294. void *ring_desc,
  1295. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  1296. void *link_desc_va,
  1297. enum hal_reo_error_code err_code)
  1298. {
  1299. uint32_t rx_bufs_used = 0;
  1300. struct dp_pdev *pdev;
  1301. int i;
  1302. uint8_t *rx_tlv_hdr_first;
  1303. uint8_t *rx_tlv_hdr_last;
  1304. uint32_t tid = DP_MAX_TIDS;
  1305. uint16_t peer_id;
  1306. struct dp_rx_desc *rx_desc;
  1307. struct rx_desc_pool *rx_desc_pool;
  1308. qdf_nbuf_t nbuf;
  1309. struct hal_buf_info buf_info;
  1310. struct hal_rx_msdu_list msdu_list;
  1311. uint16_t num_msdus;
  1312. struct buffer_addr_info cur_link_desc_addr_info = { 0 };
  1313. struct buffer_addr_info next_link_desc_addr_info = { 0 };
  1314. /* First field in REO Dst ring Desc is buffer_addr_info */
  1315. void *buf_addr_info = ring_desc;
  1316. qdf_nbuf_t head_nbuf = NULL;
  1317. qdf_nbuf_t tail_nbuf = NULL;
  1318. uint16_t msdu_processed = 0;
  1319. QDF_STATUS status;
  1320. bool ret, is_pn_check_needed;
  1321. uint8_t rx_desc_pool_id;
  1322. struct dp_txrx_peer *txrx_peer = NULL;
  1323. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1324. hal_ring_handle_t hal_ring_hdl = soc->reo_exception_ring.hal_srng;
  1325. peer_id = dp_rx_peer_metadata_peer_id_get(soc,
  1326. mpdu_desc_info->peer_meta_data);
  1327. is_pn_check_needed = dp_rx_err_is_pn_check_needed(soc,
  1328. HAL_REO_ERROR_DETECTED,
  1329. err_code);
  1330. more_msdu_link_desc:
  1331. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  1332. &num_msdus);
  1333. for (i = 0; i < num_msdus; i++) {
  1334. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  1335. soc,
  1336. msdu_list.sw_cookie[i]);
  1337. qdf_assert_always(rx_desc);
  1338. nbuf = rx_desc->nbuf;
  1339. /*
  1340. * this is a unlikely scenario where the host is reaping
  1341. * a descriptor which it already reaped just a while ago
  1342. * but is yet to replenish it back to HW.
  1343. * In this case host will dump the last 128 descriptors
  1344. * including the software descriptor rx_desc and assert.
  1345. */
  1346. if (qdf_unlikely(!rx_desc->in_use) ||
  1347. qdf_unlikely(!nbuf)) {
  1348. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1349. dp_info_rl("Reaping rx_desc not in use!");
  1350. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1351. ring_desc, rx_desc);
  1352. /* ignore duplicate RX desc and continue to process */
  1353. /* Pop out the descriptor */
  1354. continue;
  1355. }
  1356. ret = dp_rx_desc_paddr_sanity_check(rx_desc,
  1357. msdu_list.paddr[i]);
  1358. if (!ret) {
  1359. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1360. rx_desc->in_err_state = 1;
  1361. continue;
  1362. }
  1363. rx_desc_pool_id = rx_desc->pool_id;
  1364. /* all buffers from a MSDU link belong to same pdev */
  1365. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc_pool_id);
  1366. rx_desc_pool = &soc->rx_desc_buf[rx_desc_pool_id];
  1367. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  1368. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  1369. rx_desc->unmapped = 1;
  1370. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  1371. QDF_NBUF_CB_RX_PKT_LEN(nbuf) = msdu_list.msdu_info[i].msdu_len;
  1372. rx_bufs_used++;
  1373. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  1374. &pdev->free_list_tail, rx_desc);
  1375. DP_RX_LIST_APPEND(head_nbuf, tail_nbuf, nbuf);
  1376. if (qdf_unlikely(msdu_list.msdu_info[i].msdu_flags &
  1377. HAL_MSDU_F_MSDU_CONTINUATION))
  1378. continue;
  1379. if (dp_rx_buffer_pool_refill(soc, head_nbuf,
  1380. rx_desc_pool_id)) {
  1381. /* MSDU queued back to the pool */
  1382. goto process_next_msdu;
  1383. }
  1384. rx_tlv_hdr_first = qdf_nbuf_data(head_nbuf);
  1385. rx_tlv_hdr_last = qdf_nbuf_data(tail_nbuf);
  1386. if (qdf_unlikely(head_nbuf != tail_nbuf)) {
  1387. nbuf = dp_rx_sg_create(soc, head_nbuf);
  1388. qdf_nbuf_set_is_frag(nbuf, 1);
  1389. DP_STATS_INC(soc, rx.err.reo_err_oor_sg_count, 1);
  1390. }
  1391. if (is_pn_check_needed) {
  1392. status = dp_rx_err_nbuf_pn_check(soc, ring_desc, nbuf);
  1393. if (QDF_IS_STATUS_ERROR(status)) {
  1394. DP_STATS_INC(soc, rx.err.pn_in_dest_check_fail,
  1395. 1);
  1396. dp_rx_nbuf_free(nbuf);
  1397. goto process_next_msdu;
  1398. }
  1399. hal_rx_tlv_populate_mpdu_desc_info(soc->hal_soc,
  1400. qdf_nbuf_data(nbuf),
  1401. mpdu_desc_info);
  1402. peer_id = dp_rx_peer_metadata_peer_id_get(soc,
  1403. mpdu_desc_info->peer_meta_data);
  1404. if (mpdu_desc_info->bar_frame)
  1405. _dp_rx_bar_frame_handle(soc, nbuf,
  1406. mpdu_desc_info, tid,
  1407. HAL_REO_ERROR_DETECTED,
  1408. err_code);
  1409. }
  1410. switch (err_code) {
  1411. case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
  1412. case HAL_REO_ERR_2K_ERROR_HANDLING_FLAG_SET:
  1413. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  1414. /*
  1415. * only first msdu, mpdu start description tlv valid?
  1416. * and use it for following msdu.
  1417. */
  1418. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1419. rx_tlv_hdr_last))
  1420. tid = hal_rx_mpdu_start_tid_get(
  1421. soc->hal_soc,
  1422. rx_tlv_hdr_first);
  1423. dp_2k_jump_handle(soc, nbuf, rx_tlv_hdr_last,
  1424. peer_id, tid);
  1425. break;
  1426. case HAL_REO_ERR_REGULAR_FRAME_OOR:
  1427. case HAL_REO_ERR_BAR_FRAME_OOR:
  1428. dp_rx_oor_handle(soc, nbuf, peer_id, rx_tlv_hdr_last);
  1429. break;
  1430. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  1431. txrx_peer = dp_tgt_txrx_peer_get_ref_by_id(
  1432. soc, peer_id,
  1433. &txrx_ref_handle,
  1434. DP_MOD_ID_RX_ERR);
  1435. if (!txrx_peer)
  1436. dp_info_rl("txrx_peer is null peer_id %u",
  1437. peer_id);
  1438. dp_rx_null_q_desc_handle(soc, nbuf, rx_tlv_hdr_last,
  1439. rx_desc_pool_id, txrx_peer);
  1440. if (txrx_peer)
  1441. dp_txrx_peer_unref_delete(txrx_ref_handle,
  1442. DP_MOD_ID_RX_ERR);
  1443. break;
  1444. default:
  1445. dp_err_rl("Non-support error code %d", err_code);
  1446. dp_rx_nbuf_free(nbuf);
  1447. }
  1448. process_next_msdu:
  1449. msdu_processed++;
  1450. head_nbuf = NULL;
  1451. tail_nbuf = NULL;
  1452. }
  1453. /*
  1454. * If the msdu's are spread across multiple link-descriptors,
  1455. * we cannot depend solely on the msdu_count(e.g., if msdu is
  1456. * spread across multiple buffers).Hence, it is
  1457. * necessary to check the next link_descriptor and release
  1458. * all the msdu's that are part of it.
  1459. */
  1460. hal_rx_get_next_msdu_link_desc_buf_addr_info(
  1461. link_desc_va,
  1462. &next_link_desc_addr_info);
  1463. if (hal_rx_is_buf_addr_info_valid(
  1464. &next_link_desc_addr_info)) {
  1465. /* Clear the next link desc info for the current link_desc */
  1466. hal_rx_clear_next_msdu_link_desc_buf_addr_info(link_desc_va);
  1467. dp_rx_link_desc_return_by_addr(
  1468. soc,
  1469. buf_addr_info,
  1470. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  1471. hal_rx_buffer_addr_info_get_paddr(
  1472. &next_link_desc_addr_info,
  1473. &buf_info);
  1474. /* buffer_addr_info is the first element of ring_desc */
  1475. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  1476. (uint32_t *)&next_link_desc_addr_info,
  1477. &buf_info);
  1478. link_desc_va =
  1479. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  1480. cur_link_desc_addr_info = next_link_desc_addr_info;
  1481. buf_addr_info = &cur_link_desc_addr_info;
  1482. goto more_msdu_link_desc;
  1483. }
  1484. dp_rx_link_desc_return_by_addr(soc, buf_addr_info,
  1485. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  1486. if (qdf_unlikely(msdu_processed != mpdu_desc_info->msdu_count))
  1487. DP_STATS_INC(soc, rx.err.msdu_count_mismatch, 1);
  1488. return rx_bufs_used;
  1489. }
  1490. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1491. /**
  1492. * dp_rx_process_rxdma_err() - Function to deliver rxdma unencrypted_err
  1493. * frames to OS or wifi parse errors.
  1494. * @soc: core DP main context
  1495. * @nbuf: buffer pointer
  1496. * @rx_tlv_hdr: start of rx tlv header
  1497. * @txrx_peer: peer reference
  1498. * @err_code: rxdma err code
  1499. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  1500. * pool_id has same mapping)
  1501. *
  1502. * Return: None
  1503. */
  1504. void
  1505. dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1506. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *txrx_peer,
  1507. uint8_t err_code, uint8_t mac_id)
  1508. {
  1509. uint32_t pkt_len, l2_hdr_offset;
  1510. uint16_t msdu_len;
  1511. struct dp_vdev *vdev;
  1512. qdf_ether_header_t *eh;
  1513. bool is_broadcast;
  1514. /*
  1515. * Check if DMA completed -- msdu_done is the last bit
  1516. * to be written
  1517. */
  1518. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1519. dp_err_rl("MSDU DONE failure");
  1520. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1521. QDF_TRACE_LEVEL_INFO);
  1522. qdf_assert(0);
  1523. }
  1524. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc,
  1525. rx_tlv_hdr);
  1526. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1527. pkt_len = msdu_len + l2_hdr_offset + soc->rx_pkt_tlv_size;
  1528. if (dp_rx_check_pkt_len(soc, pkt_len)) {
  1529. /* Drop & free packet */
  1530. dp_rx_nbuf_free(nbuf);
  1531. return;
  1532. }
  1533. /* Set length in nbuf */
  1534. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1535. qdf_nbuf_set_next(nbuf, NULL);
  1536. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  1537. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  1538. if (!txrx_peer) {
  1539. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP, "txrx_peer is NULL");
  1540. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1541. qdf_nbuf_len(nbuf));
  1542. /* Trigger invalid peer handler wrapper */
  1543. dp_rx_process_invalid_peer_wrapper(soc, nbuf, true, mac_id);
  1544. return;
  1545. }
  1546. vdev = txrx_peer->vdev;
  1547. if (!vdev) {
  1548. dp_rx_err_info_rl("%pK: INVALID vdev %pK OR osif_rx", soc,
  1549. vdev);
  1550. /* Drop & free packet */
  1551. dp_rx_nbuf_free(nbuf);
  1552. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1553. return;
  1554. }
  1555. /*
  1556. * Advance the packet start pointer by total size of
  1557. * pre-header TLV's
  1558. */
  1559. dp_rx_skip_tlvs(soc, nbuf, l2_hdr_offset);
  1560. if (err_code == HAL_RXDMA_ERR_WIFI_PARSE) {
  1561. uint8_t *pkt_type;
  1562. pkt_type = qdf_nbuf_data(nbuf) + (2 * QDF_MAC_ADDR_SIZE);
  1563. if (*(uint16_t *)pkt_type == htons(QDF_ETH_TYPE_8021Q)) {
  1564. if (*(uint16_t *)(pkt_type + DP_SKIP_VLAN) ==
  1565. htons(QDF_LLC_STP)) {
  1566. DP_STATS_INC(vdev->pdev, vlan_tag_stp_cnt, 1);
  1567. goto process_mesh;
  1568. } else {
  1569. goto process_rx;
  1570. }
  1571. }
  1572. }
  1573. if (vdev->rx_decap_type == htt_cmn_pkt_type_raw)
  1574. goto process_mesh;
  1575. /*
  1576. * WAPI cert AP sends rekey frames as unencrypted.
  1577. * Thus RXDMA will report unencrypted frame error.
  1578. * To pass WAPI cert case, SW needs to pass unencrypted
  1579. * rekey frame to stack.
  1580. */
  1581. if (qdf_nbuf_is_ipv4_wapi_pkt(nbuf)) {
  1582. goto process_rx;
  1583. }
  1584. /*
  1585. * In dynamic WEP case rekey frames are not encrypted
  1586. * similar to WAPI. Allow EAPOL when 8021+wep is enabled and
  1587. * key install is already done
  1588. */
  1589. if ((vdev->sec_type == cdp_sec_type_wep104) &&
  1590. (qdf_nbuf_is_ipv4_eapol_pkt(nbuf)))
  1591. goto process_rx;
  1592. process_mesh:
  1593. if (!vdev->mesh_vdev && err_code == HAL_RXDMA_ERR_UNENCRYPTED) {
  1594. dp_rx_nbuf_free(nbuf);
  1595. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1596. return;
  1597. }
  1598. if (vdev->mesh_vdev) {
  1599. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  1600. == QDF_STATUS_SUCCESS) {
  1601. dp_rx_err_info("%pK: mesh pkt filtered", soc);
  1602. DP_STATS_INC(vdev->pdev, dropped.mesh_filter, 1);
  1603. dp_rx_nbuf_free(nbuf);
  1604. return;
  1605. }
  1606. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, txrx_peer);
  1607. }
  1608. process_rx:
  1609. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1610. rx_tlv_hdr) &&
  1611. (vdev->rx_decap_type ==
  1612. htt_cmn_pkt_type_ethernet))) {
  1613. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1614. is_broadcast = (QDF_IS_ADDR_BROADCAST
  1615. (eh->ether_dhost)) ? 1 : 0 ;
  1616. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.multicast, 1,
  1617. qdf_nbuf_len(nbuf));
  1618. if (is_broadcast) {
  1619. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.bcast, 1,
  1620. qdf_nbuf_len(nbuf));
  1621. }
  1622. }
  1623. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  1624. dp_rx_deliver_raw(vdev, nbuf, txrx_peer);
  1625. } else {
  1626. /* Update the protocol tag in SKB based on CCE metadata */
  1627. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1628. EXCEPTION_DEST_RING_ID, true, true);
  1629. /* Update the flow tag in SKB based on FSE metadata */
  1630. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  1631. DP_PEER_STATS_FLAT_INC(txrx_peer, to_stack.num, 1);
  1632. qdf_nbuf_set_exc_frame(nbuf, 1);
  1633. dp_rx_deliver_to_stack(soc, vdev, txrx_peer, nbuf, NULL);
  1634. }
  1635. return;
  1636. }
  1637. /**
  1638. * dp_rx_process_mic_error(): Function to pass mic error indication to umac
  1639. * @soc: core DP main context
  1640. * @nbuf: buffer pointer
  1641. * @rx_tlv_hdr: start of rx tlv header
  1642. * @txrx_peer: txrx peer handle
  1643. *
  1644. * return: void
  1645. */
  1646. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1647. uint8_t *rx_tlv_hdr,
  1648. struct dp_txrx_peer *txrx_peer)
  1649. {
  1650. struct dp_vdev *vdev = NULL;
  1651. struct dp_pdev *pdev = NULL;
  1652. struct ol_if_ops *tops = NULL;
  1653. uint16_t rx_seq, fragno;
  1654. uint8_t is_raw;
  1655. unsigned int tid;
  1656. QDF_STATUS status;
  1657. struct cdp_rx_mic_err_info mic_failure_info;
  1658. if (!hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1659. rx_tlv_hdr))
  1660. return;
  1661. if (!txrx_peer) {
  1662. dp_info_rl("txrx_peer not found");
  1663. goto fail;
  1664. }
  1665. vdev = txrx_peer->vdev;
  1666. if (!vdev) {
  1667. dp_info_rl("VDEV not found");
  1668. goto fail;
  1669. }
  1670. pdev = vdev->pdev;
  1671. if (!pdev) {
  1672. dp_info_rl("PDEV not found");
  1673. goto fail;
  1674. }
  1675. is_raw = HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, qdf_nbuf_data(nbuf));
  1676. if (is_raw) {
  1677. fragno = dp_rx_frag_get_mpdu_frag_number(soc,
  1678. qdf_nbuf_data(nbuf));
  1679. /* Can get only last fragment */
  1680. if (fragno) {
  1681. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  1682. qdf_nbuf_data(nbuf));
  1683. rx_seq = hal_rx_get_rx_sequence(soc->hal_soc,
  1684. qdf_nbuf_data(nbuf));
  1685. status = dp_rx_defrag_add_last_frag(soc, txrx_peer,
  1686. tid, rx_seq, nbuf);
  1687. dp_info_rl("Frag pkt seq# %d frag# %d consumed "
  1688. "status %d !", rx_seq, fragno, status);
  1689. return;
  1690. }
  1691. }
  1692. if (hal_rx_mpdu_get_addr1(soc->hal_soc, qdf_nbuf_data(nbuf),
  1693. &mic_failure_info.da_mac_addr.bytes[0])) {
  1694. dp_err_rl("Failed to get da_mac_addr");
  1695. goto fail;
  1696. }
  1697. if (hal_rx_mpdu_get_addr2(soc->hal_soc, qdf_nbuf_data(nbuf),
  1698. &mic_failure_info.ta_mac_addr.bytes[0])) {
  1699. dp_err_rl("Failed to get ta_mac_addr");
  1700. goto fail;
  1701. }
  1702. mic_failure_info.key_id = 0;
  1703. mic_failure_info.multicast =
  1704. IEEE80211_IS_MULTICAST(mic_failure_info.da_mac_addr.bytes);
  1705. qdf_mem_zero(mic_failure_info.tsc, MIC_SEQ_CTR_SIZE);
  1706. mic_failure_info.frame_type = cdp_rx_frame_type_802_11;
  1707. mic_failure_info.data = NULL;
  1708. mic_failure_info.vdev_id = vdev->vdev_id;
  1709. tops = pdev->soc->cdp_soc.ol_ops;
  1710. if (tops->rx_mic_error)
  1711. tops->rx_mic_error(soc->ctrl_psoc, pdev->pdev_id,
  1712. &mic_failure_info);
  1713. fail:
  1714. dp_rx_nbuf_free(nbuf);
  1715. return;
  1716. }
  1717. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  1718. defined(WLAN_MCAST_MLO)
  1719. static bool dp_rx_igmp_handler(struct dp_soc *soc,
  1720. struct dp_vdev *vdev,
  1721. struct dp_txrx_peer *peer,
  1722. qdf_nbuf_t nbuf)
  1723. {
  1724. if (soc->arch_ops.dp_rx_mcast_handler) {
  1725. if (soc->arch_ops.dp_rx_mcast_handler(soc, vdev, peer, nbuf))
  1726. return true;
  1727. }
  1728. return false;
  1729. }
  1730. #else
  1731. static bool dp_rx_igmp_handler(struct dp_soc *soc,
  1732. struct dp_vdev *vdev,
  1733. struct dp_txrx_peer *peer,
  1734. qdf_nbuf_t nbuf)
  1735. {
  1736. return false;
  1737. }
  1738. #endif
  1739. /**
  1740. * dp_rx_err_route_hdl() - Function to send EAPOL frames to stack
  1741. * Free any other packet which comes in
  1742. * this path.
  1743. *
  1744. * @soc: core DP main context
  1745. * @nbuf: buffer pointer
  1746. * @txrx_peer: txrx peer handle
  1747. * @rx_tlv_hdr: start of rx tlv header
  1748. * @err_src: rxdma/reo
  1749. *
  1750. * This function indicates EAPOL frame received in wbm error ring to stack.
  1751. * Any other frame should be dropped.
  1752. *
  1753. * Return: SUCCESS if delivered to stack
  1754. */
  1755. static void
  1756. dp_rx_err_route_hdl(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1757. struct dp_txrx_peer *txrx_peer, uint8_t *rx_tlv_hdr,
  1758. enum hal_rx_wbm_error_source err_src)
  1759. {
  1760. uint32_t pkt_len;
  1761. uint16_t msdu_len;
  1762. struct dp_vdev *vdev;
  1763. struct hal_rx_msdu_metadata msdu_metadata;
  1764. bool is_eapol;
  1765. hal_rx_msdu_metadata_get(soc->hal_soc, rx_tlv_hdr, &msdu_metadata);
  1766. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1767. pkt_len = msdu_len + msdu_metadata.l3_hdr_pad + soc->rx_pkt_tlv_size;
  1768. if (qdf_likely(!qdf_nbuf_is_frag(nbuf))) {
  1769. if (dp_rx_check_pkt_len(soc, pkt_len))
  1770. goto drop_nbuf;
  1771. /* Set length in nbuf */
  1772. qdf_nbuf_set_pktlen(
  1773. nbuf, qdf_min(pkt_len, (uint32_t)RX_DATA_BUFFER_SIZE));
  1774. qdf_assert_always(nbuf->data == rx_tlv_hdr);
  1775. }
  1776. /*
  1777. * Check if DMA completed -- msdu_done is the last bit
  1778. * to be written
  1779. */
  1780. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1781. dp_err_rl("MSDU DONE failure");
  1782. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1783. QDF_TRACE_LEVEL_INFO);
  1784. qdf_assert(0);
  1785. }
  1786. if (!txrx_peer)
  1787. goto drop_nbuf;
  1788. vdev = txrx_peer->vdev;
  1789. if (!vdev) {
  1790. dp_err_rl("Null vdev!");
  1791. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1792. goto drop_nbuf;
  1793. }
  1794. /*
  1795. * Advance the packet start pointer by total size of
  1796. * pre-header TLV's
  1797. */
  1798. if (qdf_nbuf_is_frag(nbuf))
  1799. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1800. else
  1801. qdf_nbuf_pull_head(nbuf, (msdu_metadata.l3_hdr_pad +
  1802. soc->rx_pkt_tlv_size));
  1803. if (dp_rx_igmp_handler(soc, vdev, txrx_peer, nbuf))
  1804. return;
  1805. dp_vdev_peer_stats_update_protocol_cnt(vdev, nbuf, NULL, 0, 1);
  1806. /*
  1807. * Indicate EAPOL frame to stack only when vap mac address
  1808. * matches the destination address.
  1809. */
  1810. is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf);
  1811. if (is_eapol || qdf_nbuf_is_ipv4_wapi_pkt(nbuf)) {
  1812. qdf_ether_header_t *eh =
  1813. (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1814. if (dp_rx_err_match_dhost(eh, vdev)) {
  1815. DP_STATS_INC_PKT(vdev, rx_i.routed_eapol_pkt, 1,
  1816. qdf_nbuf_len(nbuf));
  1817. /*
  1818. * Update the protocol tag in SKB based on
  1819. * CCE metadata.
  1820. */
  1821. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1822. EXCEPTION_DEST_RING_ID,
  1823. true, true);
  1824. /* Update the flow tag in SKB based on FSE metadata */
  1825. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1826. true);
  1827. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1,
  1828. qdf_nbuf_len(nbuf),
  1829. vdev->pdev->enhanced_stats_en);
  1830. qdf_nbuf_set_exc_frame(nbuf, 1);
  1831. qdf_nbuf_set_next(nbuf, NULL);
  1832. dp_rx_deliver_to_osif_stack(soc, vdev, txrx_peer, nbuf,
  1833. NULL, is_eapol);
  1834. return;
  1835. }
  1836. }
  1837. drop_nbuf:
  1838. DP_STATS_INCC(soc, rx.reo2rel_route_drop, 1,
  1839. err_src == HAL_RX_WBM_ERR_SRC_REO);
  1840. DP_STATS_INCC(soc, rx.rxdma2rel_route_drop, 1,
  1841. err_src == HAL_RX_WBM_ERR_SRC_RXDMA);
  1842. dp_rx_nbuf_free(nbuf);
  1843. }
  1844. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1845. #ifdef DP_RX_DESC_COOKIE_INVALIDATE
  1846. /**
  1847. * dp_rx_link_cookie_check() - Validate link desc cookie
  1848. * @ring_desc: ring descriptor
  1849. *
  1850. * Return: qdf status
  1851. */
  1852. static inline QDF_STATUS
  1853. dp_rx_link_cookie_check(hal_ring_desc_t ring_desc)
  1854. {
  1855. if (qdf_unlikely(HAL_RX_REO_BUF_LINK_COOKIE_INVALID_GET(ring_desc)))
  1856. return QDF_STATUS_E_FAILURE;
  1857. return QDF_STATUS_SUCCESS;
  1858. }
  1859. /**
  1860. * dp_rx_link_cookie_invalidate() - Invalidate link desc cookie
  1861. * @ring_desc: ring descriptor
  1862. *
  1863. * Return: None
  1864. */
  1865. static inline void
  1866. dp_rx_link_cookie_invalidate(hal_ring_desc_t ring_desc)
  1867. {
  1868. HAL_RX_REO_BUF_LINK_COOKIE_INVALID_SET(ring_desc);
  1869. }
  1870. #else
  1871. static inline QDF_STATUS
  1872. dp_rx_link_cookie_check(hal_ring_desc_t ring_desc)
  1873. {
  1874. return QDF_STATUS_SUCCESS;
  1875. }
  1876. static inline void
  1877. dp_rx_link_cookie_invalidate(hal_ring_desc_t ring_desc)
  1878. {
  1879. }
  1880. #endif
  1881. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  1882. /**
  1883. * dp_rx_err_ring_record_entry() - Record rx err ring history
  1884. * @soc: Datapath soc structure
  1885. * @paddr: paddr of the buffer in RX err ring
  1886. * @sw_cookie: SW cookie of the buffer in RX err ring
  1887. * @rbm: Return buffer manager of the buffer in RX err ring
  1888. *
  1889. * Returns: None
  1890. */
  1891. static inline void
  1892. dp_rx_err_ring_record_entry(struct dp_soc *soc, uint64_t paddr,
  1893. uint32_t sw_cookie, uint8_t rbm)
  1894. {
  1895. struct dp_buf_info_record *record;
  1896. uint32_t idx;
  1897. if (qdf_unlikely(!soc->rx_err_ring_history))
  1898. return;
  1899. idx = dp_history_get_next_index(&soc->rx_err_ring_history->index,
  1900. DP_RX_ERR_HIST_MAX);
  1901. /* No NULL check needed for record since its an array */
  1902. record = &soc->rx_err_ring_history->entry[idx];
  1903. record->timestamp = qdf_get_log_timestamp();
  1904. record->hbi.paddr = paddr;
  1905. record->hbi.sw_cookie = sw_cookie;
  1906. record->hbi.rbm = rbm;
  1907. }
  1908. #else
  1909. static inline void
  1910. dp_rx_err_ring_record_entry(struct dp_soc *soc, uint64_t paddr,
  1911. uint32_t sw_cookie, uint8_t rbm)
  1912. {
  1913. }
  1914. #endif
  1915. #ifdef HANDLE_RX_REROUTE_ERR
  1916. static int dp_rx_err_handle_msdu_buf(struct dp_soc *soc,
  1917. hal_ring_desc_t ring_desc)
  1918. {
  1919. int lmac_id = DP_INVALID_LMAC_ID;
  1920. struct dp_rx_desc *rx_desc;
  1921. struct hal_buf_info hbi;
  1922. struct dp_pdev *pdev;
  1923. struct rx_desc_pool *rx_desc_pool;
  1924. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  1925. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, hbi.sw_cookie);
  1926. /* sanity */
  1927. if (!rx_desc) {
  1928. DP_STATS_INC(soc, rx.err.reo_err_msdu_buf_invalid_cookie, 1);
  1929. goto assert_return;
  1930. }
  1931. if (!rx_desc->nbuf)
  1932. goto assert_return;
  1933. dp_rx_err_ring_record_entry(soc, hbi.paddr,
  1934. hbi.sw_cookie,
  1935. hal_rx_ret_buf_manager_get(soc->hal_soc,
  1936. ring_desc));
  1937. if (hbi.paddr != qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0)) {
  1938. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1939. rx_desc->in_err_state = 1;
  1940. goto assert_return;
  1941. }
  1942. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  1943. /* After this point the rx_desc and nbuf are valid */
  1944. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  1945. qdf_assert_always(!rx_desc->unmapped);
  1946. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, rx_desc->nbuf);
  1947. rx_desc->unmapped = 1;
  1948. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  1949. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  1950. rx_desc->pool_id);
  1951. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  1952. lmac_id = rx_desc->pool_id;
  1953. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  1954. &pdev->free_list_tail,
  1955. rx_desc);
  1956. return lmac_id;
  1957. assert_return:
  1958. qdf_assert(0);
  1959. return lmac_id;
  1960. }
  1961. static int dp_rx_err_exception(struct dp_soc *soc, hal_ring_desc_t ring_desc)
  1962. {
  1963. int ret;
  1964. uint64_t cur_time_stamp;
  1965. DP_STATS_INC(soc, rx.err.reo_err_msdu_buf_rcved, 1);
  1966. /* Recover if overall error count exceeds threshold */
  1967. if (soc->stats.rx.err.reo_err_msdu_buf_rcved >
  1968. DP_MAX_REG_RX_ROUTING_ERRS_THRESHOLD) {
  1969. dp_err("pkt threshold breached! reo_err_msdu_buf_rcved %u first err pkt time_stamp %llu",
  1970. soc->stats.rx.err.reo_err_msdu_buf_rcved,
  1971. soc->rx_route_err_start_pkt_ts);
  1972. qdf_trigger_self_recovery(NULL, QDF_RX_REG_PKT_ROUTE_ERR);
  1973. }
  1974. cur_time_stamp = qdf_get_log_timestamp_usecs();
  1975. if (!soc->rx_route_err_start_pkt_ts)
  1976. soc->rx_route_err_start_pkt_ts = cur_time_stamp;
  1977. /* Recover if threshold number of packets received in threshold time */
  1978. if ((cur_time_stamp - soc->rx_route_err_start_pkt_ts) >
  1979. DP_RX_ERR_ROUTE_TIMEOUT_US) {
  1980. soc->rx_route_err_start_pkt_ts = cur_time_stamp;
  1981. if (soc->rx_route_err_in_window >
  1982. DP_MAX_REG_RX_ROUTING_ERRS_IN_TIMEOUT) {
  1983. qdf_trigger_self_recovery(NULL,
  1984. QDF_RX_REG_PKT_ROUTE_ERR);
  1985. dp_err("rate threshold breached! reo_err_msdu_buf_rcved %u first err pkt time_stamp %llu",
  1986. soc->stats.rx.err.reo_err_msdu_buf_rcved,
  1987. soc->rx_route_err_start_pkt_ts);
  1988. } else {
  1989. soc->rx_route_err_in_window = 1;
  1990. }
  1991. } else {
  1992. soc->rx_route_err_in_window++;
  1993. }
  1994. ret = dp_rx_err_handle_msdu_buf(soc, ring_desc);
  1995. return ret;
  1996. }
  1997. #else /* HANDLE_RX_REROUTE_ERR */
  1998. static int dp_rx_err_exception(struct dp_soc *soc, hal_ring_desc_t ring_desc)
  1999. {
  2000. qdf_assert_always(0);
  2001. return DP_INVALID_LMAC_ID;
  2002. }
  2003. #endif /* HANDLE_RX_REROUTE_ERR */
  2004. uint32_t
  2005. dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  2006. hal_ring_handle_t hal_ring_hdl, uint32_t quota)
  2007. {
  2008. hal_ring_desc_t ring_desc;
  2009. hal_soc_handle_t hal_soc;
  2010. uint32_t count = 0;
  2011. uint32_t rx_bufs_used = 0;
  2012. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  2013. uint8_t mac_id = 0;
  2014. uint8_t buf_type;
  2015. uint8_t err_status;
  2016. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  2017. struct hal_buf_info hbi;
  2018. struct dp_pdev *dp_pdev;
  2019. struct dp_srng *dp_rxdma_srng;
  2020. struct rx_desc_pool *rx_desc_pool;
  2021. void *link_desc_va;
  2022. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  2023. uint16_t num_msdus;
  2024. struct dp_rx_desc *rx_desc = NULL;
  2025. QDF_STATUS status;
  2026. bool ret;
  2027. uint32_t error_code = 0;
  2028. bool sw_pn_check_needed;
  2029. /* Debug -- Remove later */
  2030. qdf_assert(soc && hal_ring_hdl);
  2031. hal_soc = soc->hal_soc;
  2032. /* Debug -- Remove later */
  2033. qdf_assert(hal_soc);
  2034. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  2035. /* TODO */
  2036. /*
  2037. * Need API to convert from hal_ring pointer to
  2038. * Ring Type / Ring Id combo
  2039. */
  2040. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  2041. dp_rx_err_err("%pK: HAL RING Access Failed -- %pK", soc,
  2042. hal_ring_hdl);
  2043. goto done;
  2044. }
  2045. while (qdf_likely(quota-- && (ring_desc =
  2046. hal_srng_dst_peek(hal_soc,
  2047. hal_ring_hdl)))) {
  2048. DP_STATS_INC(soc, rx.err_ring_pkts, 1);
  2049. err_status = hal_rx_err_status_get(hal_soc, ring_desc);
  2050. buf_type = hal_rx_reo_buf_type_get(hal_soc, ring_desc);
  2051. if (err_status == HAL_REO_ERROR_DETECTED)
  2052. error_code = hal_rx_get_reo_error_code(hal_soc,
  2053. ring_desc);
  2054. qdf_mem_set(&mpdu_desc_info, sizeof(mpdu_desc_info), 0);
  2055. sw_pn_check_needed = dp_rx_err_is_pn_check_needed(soc,
  2056. err_status,
  2057. error_code);
  2058. if (!sw_pn_check_needed) {
  2059. /*
  2060. * MPDU desc info will be present in the REO desc
  2061. * only in the below scenarios
  2062. * 1) pn_in_dest_disabled: always
  2063. * 2) pn_in_dest enabled: All cases except 2k-jup
  2064. * and OOR errors
  2065. */
  2066. hal_rx_mpdu_desc_info_get(hal_soc, ring_desc,
  2067. &mpdu_desc_info);
  2068. }
  2069. if (HAL_RX_REO_DESC_MSDU_COUNT_GET(ring_desc) == 0)
  2070. goto next_entry;
  2071. /*
  2072. * For REO error ring, only MSDU LINK DESC is expected.
  2073. * Handle HAL_RX_REO_MSDU_BUF_ADDR_TYPE exception case.
  2074. */
  2075. if (qdf_unlikely(buf_type != HAL_RX_REO_MSDU_LINK_DESC_TYPE)) {
  2076. int lmac_id;
  2077. lmac_id = dp_rx_err_exception(soc, ring_desc);
  2078. if (lmac_id >= 0)
  2079. rx_bufs_reaped[lmac_id] += 1;
  2080. goto next_entry;
  2081. }
  2082. hal_rx_buf_cookie_rbm_get(hal_soc, (uint32_t *)ring_desc,
  2083. &hbi);
  2084. /*
  2085. * check for the magic number in the sw cookie
  2086. */
  2087. qdf_assert_always((hbi.sw_cookie >> LINK_DESC_ID_SHIFT) &
  2088. soc->link_desc_id_start);
  2089. status = dp_rx_link_cookie_check(ring_desc);
  2090. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  2091. DP_STATS_INC(soc, rx.err.invalid_link_cookie, 1);
  2092. break;
  2093. }
  2094. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  2095. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &hbi);
  2096. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  2097. &num_msdus);
  2098. dp_rx_err_ring_record_entry(soc, msdu_list.paddr[0],
  2099. msdu_list.sw_cookie[0],
  2100. msdu_list.rbm[0]);
  2101. // TODO - BE- Check if the RBM is to be checked for all chips
  2102. if (qdf_unlikely((msdu_list.rbm[0] !=
  2103. dp_rx_get_rx_bm_id(soc)) &&
  2104. (msdu_list.rbm[0] !=
  2105. soc->idle_link_bm_id) &&
  2106. (msdu_list.rbm[0] !=
  2107. dp_rx_get_defrag_bm_id(soc)))) {
  2108. /* TODO */
  2109. /* Call appropriate handler */
  2110. if (!wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  2111. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  2112. dp_rx_err_err("%pK: Invalid RBM %d",
  2113. soc, msdu_list.rbm[0]);
  2114. }
  2115. /* Return link descriptor through WBM ring (SW2WBM)*/
  2116. dp_rx_link_desc_return(soc, ring_desc,
  2117. HAL_BM_ACTION_RELEASE_MSDU_LIST);
  2118. goto next_entry;
  2119. }
  2120. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  2121. soc,
  2122. msdu_list.sw_cookie[0]);
  2123. qdf_assert_always(rx_desc);
  2124. mac_id = rx_desc->pool_id;
  2125. if (sw_pn_check_needed) {
  2126. goto process_reo_error_code;
  2127. }
  2128. if (mpdu_desc_info.bar_frame) {
  2129. qdf_assert_always(mpdu_desc_info.msdu_count == 1);
  2130. dp_rx_bar_frame_handle(soc, ring_desc, rx_desc,
  2131. &mpdu_desc_info, err_status,
  2132. error_code);
  2133. rx_bufs_reaped[mac_id] += 1;
  2134. goto next_entry;
  2135. }
  2136. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_FRAGMENT) {
  2137. /*
  2138. * We only handle one msdu per link desc for fragmented
  2139. * case. We drop the msdus and release the link desc
  2140. * back if there are more than one msdu in link desc.
  2141. */
  2142. if (qdf_unlikely(num_msdus > 1)) {
  2143. count = dp_rx_msdus_drop(soc, ring_desc,
  2144. &mpdu_desc_info,
  2145. &mac_id, quota);
  2146. rx_bufs_reaped[mac_id] += count;
  2147. goto next_entry;
  2148. }
  2149. /*
  2150. * this is a unlikely scenario where the host is reaping
  2151. * a descriptor which it already reaped just a while ago
  2152. * but is yet to replenish it back to HW.
  2153. * In this case host will dump the last 128 descriptors
  2154. * including the software descriptor rx_desc and assert.
  2155. */
  2156. if (qdf_unlikely(!rx_desc->in_use)) {
  2157. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  2158. dp_info_rl("Reaping rx_desc not in use!");
  2159. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  2160. ring_desc, rx_desc);
  2161. /* ignore duplicate RX desc and continue */
  2162. /* Pop out the descriptor */
  2163. goto next_entry;
  2164. }
  2165. ret = dp_rx_desc_paddr_sanity_check(rx_desc,
  2166. msdu_list.paddr[0]);
  2167. if (!ret) {
  2168. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  2169. rx_desc->in_err_state = 1;
  2170. goto next_entry;
  2171. }
  2172. count = dp_rx_frag_handle(soc,
  2173. ring_desc, &mpdu_desc_info,
  2174. rx_desc, &mac_id, quota);
  2175. rx_bufs_reaped[mac_id] += count;
  2176. DP_STATS_INC(soc, rx.rx_frags, 1);
  2177. goto next_entry;
  2178. }
  2179. process_reo_error_code:
  2180. /*
  2181. * Expect REO errors to be handled after this point
  2182. */
  2183. qdf_assert_always(err_status == HAL_REO_ERROR_DETECTED);
  2184. dp_info_rl("Got pkt with REO ERROR: %d", error_code);
  2185. switch (error_code) {
  2186. case HAL_REO_ERR_PN_CHECK_FAILED:
  2187. case HAL_REO_ERR_PN_ERROR_HANDLING_FLAG_SET:
  2188. DP_STATS_INC(soc, rx.err.reo_error[error_code], 1);
  2189. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2190. if (dp_pdev)
  2191. DP_STATS_INC(dp_pdev, err.reo_error, 1);
  2192. count = dp_rx_pn_error_handle(soc,
  2193. ring_desc,
  2194. &mpdu_desc_info, &mac_id,
  2195. quota);
  2196. rx_bufs_reaped[mac_id] += count;
  2197. break;
  2198. case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
  2199. case HAL_REO_ERR_2K_ERROR_HANDLING_FLAG_SET:
  2200. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  2201. case HAL_REO_ERR_REGULAR_FRAME_OOR:
  2202. case HAL_REO_ERR_BAR_FRAME_OOR:
  2203. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  2204. DP_STATS_INC(soc, rx.err.reo_error[error_code], 1);
  2205. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2206. if (dp_pdev)
  2207. DP_STATS_INC(dp_pdev, err.reo_error, 1);
  2208. count = dp_rx_reo_err_entry_process(
  2209. soc,
  2210. ring_desc,
  2211. &mpdu_desc_info,
  2212. link_desc_va,
  2213. error_code);
  2214. rx_bufs_reaped[mac_id] += count;
  2215. break;
  2216. case HAL_REO_ERR_QUEUE_DESC_INVALID:
  2217. case HAL_REO_ERR_AMPDU_IN_NON_BA:
  2218. case HAL_REO_ERR_NON_BA_DUPLICATE:
  2219. case HAL_REO_ERR_BA_DUPLICATE:
  2220. case HAL_REO_ERR_BAR_FRAME_NO_BA_SESSION:
  2221. case HAL_REO_ERR_BAR_FRAME_SN_EQUALS_SSN:
  2222. case HAL_REO_ERR_QUEUE_DESC_BLOCKED_SET:
  2223. DP_STATS_INC(soc, rx.err.reo_error[error_code], 1);
  2224. count = dp_rx_msdus_drop(soc, ring_desc,
  2225. &mpdu_desc_info,
  2226. &mac_id, quota);
  2227. rx_bufs_reaped[mac_id] += count;
  2228. break;
  2229. default:
  2230. /* Assert if unexpected error type */
  2231. qdf_assert_always(0);
  2232. }
  2233. next_entry:
  2234. dp_rx_link_cookie_invalidate(ring_desc);
  2235. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  2236. }
  2237. done:
  2238. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  2239. if (soc->rx.flags.defrag_timeout_check) {
  2240. uint32_t now_ms =
  2241. qdf_system_ticks_to_msecs(qdf_system_ticks());
  2242. if (now_ms >= soc->rx.defrag.next_flush_ms)
  2243. dp_rx_defrag_waitlist_flush(soc);
  2244. }
  2245. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  2246. if (rx_bufs_reaped[mac_id]) {
  2247. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2248. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  2249. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  2250. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  2251. rx_desc_pool,
  2252. rx_bufs_reaped[mac_id],
  2253. &dp_pdev->free_list_head,
  2254. &dp_pdev->free_list_tail);
  2255. rx_bufs_used += rx_bufs_reaped[mac_id];
  2256. }
  2257. }
  2258. return rx_bufs_used; /* Assume no scale factor for now */
  2259. }
  2260. #ifdef DROP_RXDMA_DECRYPT_ERR
  2261. /**
  2262. * dp_handle_rxdma_decrypt_err() - Check if decrypt err frames can be handled
  2263. *
  2264. * Return: true if rxdma decrypt err frames are handled and false otheriwse
  2265. */
  2266. static inline bool dp_handle_rxdma_decrypt_err(void)
  2267. {
  2268. return false;
  2269. }
  2270. #else
  2271. static inline bool dp_handle_rxdma_decrypt_err(void)
  2272. {
  2273. return true;
  2274. }
  2275. #endif
  2276. /*
  2277. * dp_rx_wbm_sg_list_last_msdu_war() - war for HW issue
  2278. *
  2279. * This is a war for HW issue where length is only valid in last msdu
  2280. *@soc: DP SOC handle
  2281. */
  2282. static inline void dp_rx_wbm_sg_list_last_msdu_war(struct dp_soc *soc)
  2283. {
  2284. if (soc->wbm_sg_last_msdu_war) {
  2285. uint32_t len;
  2286. qdf_nbuf_t temp = soc->wbm_sg_param.wbm_sg_nbuf_tail;
  2287. len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc,
  2288. qdf_nbuf_data(temp));
  2289. temp = soc->wbm_sg_param.wbm_sg_nbuf_head;
  2290. while (temp) {
  2291. QDF_NBUF_CB_RX_PKT_LEN(temp) = len;
  2292. temp = temp->next;
  2293. }
  2294. }
  2295. }
  2296. #ifdef RX_DESC_DEBUG_CHECK
  2297. /**
  2298. * dp_rx_wbm_desc_nbuf_sanity_check - Add sanity check to for WBM rx_desc paddr
  2299. * corruption
  2300. * @soc: core txrx main context
  2301. * @hal_ring_hdl: opaque pointer to the HAL Rx Error Ring
  2302. * @ring_desc: REO ring descriptor
  2303. * @rx_desc: Rx descriptor
  2304. *
  2305. * Return: NONE
  2306. */
  2307. static
  2308. QDF_STATUS dp_rx_wbm_desc_nbuf_sanity_check(struct dp_soc *soc,
  2309. hal_ring_handle_t hal_ring_hdl,
  2310. hal_ring_desc_t ring_desc,
  2311. struct dp_rx_desc *rx_desc)
  2312. {
  2313. struct hal_buf_info hbi;
  2314. hal_rx_wbm_rel_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  2315. /* Sanity check for possible buffer paddr corruption */
  2316. if (dp_rx_desc_paddr_sanity_check(rx_desc, (&hbi)->paddr))
  2317. return QDF_STATUS_SUCCESS;
  2318. hal_srng_dump_ring_desc(soc->hal_soc, hal_ring_hdl, ring_desc);
  2319. return QDF_STATUS_E_FAILURE;
  2320. }
  2321. #else
  2322. static
  2323. QDF_STATUS dp_rx_wbm_desc_nbuf_sanity_check(struct dp_soc *soc,
  2324. hal_ring_handle_t hal_ring_hdl,
  2325. hal_ring_desc_t ring_desc,
  2326. struct dp_rx_desc *rx_desc)
  2327. {
  2328. return QDF_STATUS_SUCCESS;
  2329. }
  2330. #endif
  2331. static inline bool
  2332. dp_rx_is_sg_formation_required(struct hal_wbm_err_desc_info *info)
  2333. {
  2334. /*
  2335. * Currently Null Queue and Unencrypted error handlers has support for
  2336. * SG. Other error handler do not deal with SG buffer.
  2337. */
  2338. if (((info->wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) &&
  2339. (info->reo_err_code == HAL_REO_ERR_QUEUE_DESC_ADDR_0)) ||
  2340. ((info->wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) &&
  2341. (info->rxdma_err_code == HAL_RXDMA_ERR_UNENCRYPTED)))
  2342. return true;
  2343. return false;
  2344. }
  2345. uint32_t
  2346. dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  2347. hal_ring_handle_t hal_ring_hdl, uint32_t quota)
  2348. {
  2349. hal_ring_desc_t ring_desc;
  2350. hal_soc_handle_t hal_soc;
  2351. struct dp_rx_desc *rx_desc;
  2352. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  2353. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  2354. uint32_t rx_bufs_used = 0;
  2355. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  2356. uint8_t buf_type;
  2357. uint8_t mac_id;
  2358. struct dp_pdev *dp_pdev;
  2359. struct dp_srng *dp_rxdma_srng;
  2360. struct rx_desc_pool *rx_desc_pool;
  2361. uint8_t *rx_tlv_hdr;
  2362. bool is_tkip_mic_err;
  2363. qdf_nbuf_t nbuf_head = NULL;
  2364. qdf_nbuf_t nbuf_tail = NULL;
  2365. qdf_nbuf_t nbuf, next;
  2366. struct hal_wbm_err_desc_info wbm_err_info = { 0 };
  2367. uint8_t pool_id;
  2368. uint8_t tid = 0;
  2369. uint8_t msdu_continuation = 0;
  2370. bool process_sg_buf = false;
  2371. uint32_t wbm_err_src;
  2372. QDF_STATUS status;
  2373. /* Debug -- Remove later */
  2374. qdf_assert(soc && hal_ring_hdl);
  2375. hal_soc = soc->hal_soc;
  2376. /* Debug -- Remove later */
  2377. qdf_assert(hal_soc);
  2378. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  2379. /* TODO */
  2380. /*
  2381. * Need API to convert from hal_ring pointer to
  2382. * Ring Type / Ring Id combo
  2383. */
  2384. dp_rx_err_err("%pK: HAL RING Access Failed -- %pK",
  2385. soc, hal_ring_hdl);
  2386. goto done;
  2387. }
  2388. while (qdf_likely(quota)) {
  2389. ring_desc = hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  2390. if (qdf_unlikely(!ring_desc))
  2391. break;
  2392. /* XXX */
  2393. buf_type = HAL_RX_WBM_BUF_TYPE_GET(ring_desc);
  2394. /*
  2395. * For WBM ring, expect only MSDU buffers
  2396. */
  2397. qdf_assert_always(buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF);
  2398. wbm_err_src = hal_rx_wbm_err_src_get(hal_soc, ring_desc);
  2399. qdf_assert((wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) ||
  2400. (wbm_err_src == HAL_RX_WBM_ERR_SRC_REO));
  2401. if (soc->arch_ops.dp_wbm_get_rx_desc_from_hal_desc(soc,
  2402. ring_desc,
  2403. &rx_desc)) {
  2404. dp_rx_err_err("get rx desc from hal_desc failed");
  2405. continue;
  2406. }
  2407. qdf_assert_always(rx_desc);
  2408. if (!dp_rx_desc_check_magic(rx_desc)) {
  2409. dp_rx_err_err("%pk: Invalid rx_desc %pk",
  2410. soc, rx_desc);
  2411. continue;
  2412. }
  2413. /*
  2414. * this is a unlikely scenario where the host is reaping
  2415. * a descriptor which it already reaped just a while ago
  2416. * but is yet to replenish it back to HW.
  2417. * In this case host will dump the last 128 descriptors
  2418. * including the software descriptor rx_desc and assert.
  2419. */
  2420. if (qdf_unlikely(!rx_desc->in_use)) {
  2421. DP_STATS_INC(soc, rx.err.hal_wbm_rel_dup, 1);
  2422. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  2423. ring_desc, rx_desc);
  2424. continue;
  2425. }
  2426. hal_rx_wbm_err_info_get(ring_desc, &wbm_err_info, hal_soc);
  2427. nbuf = rx_desc->nbuf;
  2428. status = dp_rx_wbm_desc_nbuf_sanity_check(soc, hal_ring_hdl,
  2429. ring_desc, rx_desc);
  2430. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  2431. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  2432. dp_info_rl("Rx error Nbuf %pk sanity check failure!",
  2433. nbuf);
  2434. rx_desc->in_err_state = 1;
  2435. rx_desc->unmapped = 1;
  2436. rx_bufs_reaped[rx_desc->pool_id]++;
  2437. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  2438. &tail[rx_desc->pool_id],
  2439. rx_desc);
  2440. continue;
  2441. }
  2442. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  2443. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  2444. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  2445. rx_desc->unmapped = 1;
  2446. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  2447. if (qdf_unlikely(soc->wbm_release_desc_rx_sg_support &&
  2448. dp_rx_is_sg_formation_required(&wbm_err_info))) {
  2449. /* SG is detected from continuation bit */
  2450. msdu_continuation =
  2451. hal_rx_wbm_err_msdu_continuation_get(hal_soc,
  2452. ring_desc);
  2453. if (msdu_continuation &&
  2454. !(soc->wbm_sg_param.wbm_is_first_msdu_in_sg)) {
  2455. /* Update length from first buffer in SG */
  2456. soc->wbm_sg_param.wbm_sg_desc_msdu_len =
  2457. hal_rx_msdu_start_msdu_len_get(
  2458. soc->hal_soc,
  2459. qdf_nbuf_data(nbuf));
  2460. soc->wbm_sg_param.wbm_is_first_msdu_in_sg = true;
  2461. }
  2462. if (msdu_continuation) {
  2463. /* MSDU continued packets */
  2464. qdf_nbuf_set_rx_chfrag_cont(nbuf, 1);
  2465. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  2466. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  2467. } else {
  2468. /* This is the terminal packet in SG */
  2469. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  2470. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  2471. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  2472. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  2473. process_sg_buf = true;
  2474. }
  2475. }
  2476. /*
  2477. * save the wbm desc info in nbuf TLV. We will need this
  2478. * info when we do the actual nbuf processing
  2479. */
  2480. wbm_err_info.pool_id = rx_desc->pool_id;
  2481. hal_rx_priv_info_set_in_tlv(soc->hal_soc,
  2482. qdf_nbuf_data(nbuf),
  2483. (uint8_t *)&wbm_err_info,
  2484. sizeof(wbm_err_info));
  2485. rx_bufs_reaped[rx_desc->pool_id]++;
  2486. if (qdf_nbuf_is_rx_chfrag_cont(nbuf) || process_sg_buf) {
  2487. DP_RX_LIST_APPEND(soc->wbm_sg_param.wbm_sg_nbuf_head,
  2488. soc->wbm_sg_param.wbm_sg_nbuf_tail,
  2489. nbuf);
  2490. if (process_sg_buf) {
  2491. if (!dp_rx_buffer_pool_refill(
  2492. soc,
  2493. soc->wbm_sg_param.wbm_sg_nbuf_head,
  2494. rx_desc->pool_id))
  2495. DP_RX_MERGE_TWO_LIST(
  2496. nbuf_head, nbuf_tail,
  2497. soc->wbm_sg_param.wbm_sg_nbuf_head,
  2498. soc->wbm_sg_param.wbm_sg_nbuf_tail);
  2499. dp_rx_wbm_sg_list_last_msdu_war(soc);
  2500. dp_rx_wbm_sg_list_reset(soc);
  2501. process_sg_buf = false;
  2502. }
  2503. } else if (!dp_rx_buffer_pool_refill(soc, nbuf,
  2504. rx_desc->pool_id)) {
  2505. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, nbuf);
  2506. }
  2507. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  2508. &tail[rx_desc->pool_id],
  2509. rx_desc);
  2510. /*
  2511. * if continuation bit is set then we have MSDU spread
  2512. * across multiple buffers, let us not decrement quota
  2513. * till we reap all buffers of that MSDU.
  2514. */
  2515. if (qdf_likely(!msdu_continuation))
  2516. quota -= 1;
  2517. }
  2518. done:
  2519. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  2520. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  2521. if (rx_bufs_reaped[mac_id]) {
  2522. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  2523. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  2524. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  2525. rx_desc_pool, rx_bufs_reaped[mac_id],
  2526. &head[mac_id], &tail[mac_id]);
  2527. rx_bufs_used += rx_bufs_reaped[mac_id];
  2528. }
  2529. }
  2530. nbuf = nbuf_head;
  2531. while (nbuf) {
  2532. struct dp_txrx_peer *txrx_peer;
  2533. struct dp_peer *peer;
  2534. uint16_t peer_id;
  2535. uint8_t err_code;
  2536. uint8_t *tlv_hdr;
  2537. uint32_t peer_meta_data;
  2538. dp_txrx_ref_handle txrx_ref_handle = NULL;
  2539. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  2540. /*
  2541. * retrieve the wbm desc info from nbuf TLV, so we can
  2542. * handle error cases appropriately
  2543. */
  2544. hal_rx_priv_info_get_from_tlv(soc->hal_soc, rx_tlv_hdr,
  2545. (uint8_t *)&wbm_err_info,
  2546. sizeof(wbm_err_info));
  2547. peer_meta_data = hal_rx_mpdu_peer_meta_data_get(soc->hal_soc,
  2548. rx_tlv_hdr);
  2549. peer_id = dp_rx_peer_metadata_peer_id_get(soc, peer_meta_data);
  2550. txrx_peer = dp_tgt_txrx_peer_get_ref_by_id(soc, peer_id,
  2551. &txrx_ref_handle,
  2552. DP_MOD_ID_RX_ERR);
  2553. if (!txrx_peer)
  2554. dp_info_rl("peer is null peer_id%u err_src%u err_rsn%u",
  2555. peer_id, wbm_err_info.wbm_err_src,
  2556. wbm_err_info.reo_psh_rsn);
  2557. /* Set queue_mapping in nbuf to 0 */
  2558. dp_set_rx_queue(nbuf, 0);
  2559. next = nbuf->next;
  2560. /*
  2561. * Form the SG for msdu continued buffers
  2562. * QCN9000 has this support
  2563. */
  2564. if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  2565. nbuf = dp_rx_sg_create(soc, nbuf);
  2566. next = nbuf->next;
  2567. /*
  2568. * SG error handling is not done correctly,
  2569. * drop SG frames for now.
  2570. */
  2571. dp_rx_nbuf_free(nbuf);
  2572. dp_info_rl("scattered msdu dropped");
  2573. nbuf = next;
  2574. if (txrx_peer)
  2575. dp_txrx_peer_unref_delete(txrx_ref_handle,
  2576. DP_MOD_ID_RX_ERR);
  2577. continue;
  2578. }
  2579. if (wbm_err_info.wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) {
  2580. if (wbm_err_info.reo_psh_rsn
  2581. == HAL_RX_WBM_REO_PSH_RSN_ERROR) {
  2582. DP_STATS_INC(soc,
  2583. rx.err.reo_error
  2584. [wbm_err_info.reo_err_code], 1);
  2585. /* increment @pdev level */
  2586. pool_id = wbm_err_info.pool_id;
  2587. dp_pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  2588. if (dp_pdev)
  2589. DP_STATS_INC(dp_pdev, err.reo_error,
  2590. 1);
  2591. switch (wbm_err_info.reo_err_code) {
  2592. /*
  2593. * Handling for packets which have NULL REO
  2594. * queue descriptor
  2595. */
  2596. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  2597. pool_id = wbm_err_info.pool_id;
  2598. dp_rx_null_q_desc_handle(soc, nbuf,
  2599. rx_tlv_hdr,
  2600. pool_id,
  2601. txrx_peer);
  2602. break;
  2603. /* TODO */
  2604. /* Add per error code accounting */
  2605. case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
  2606. if (txrx_peer)
  2607. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2608. rx.err.jump_2k_err,
  2609. 1);
  2610. pool_id = wbm_err_info.pool_id;
  2611. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  2612. rx_tlv_hdr)) {
  2613. tid =
  2614. hal_rx_mpdu_start_tid_get(hal_soc, rx_tlv_hdr);
  2615. }
  2616. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  2617. hal_rx_msdu_start_msdu_len_get(
  2618. soc->hal_soc, rx_tlv_hdr);
  2619. nbuf->next = NULL;
  2620. dp_2k_jump_handle(soc, nbuf,
  2621. rx_tlv_hdr,
  2622. peer_id, tid);
  2623. break;
  2624. case HAL_REO_ERR_REGULAR_FRAME_OOR:
  2625. if (txrx_peer)
  2626. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2627. rx.err.oor_err,
  2628. 1);
  2629. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  2630. rx_tlv_hdr)) {
  2631. tid =
  2632. hal_rx_mpdu_start_tid_get(hal_soc, rx_tlv_hdr);
  2633. }
  2634. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  2635. hal_rx_msdu_start_msdu_len_get(
  2636. soc->hal_soc, rx_tlv_hdr);
  2637. nbuf->next = NULL;
  2638. dp_rx_oor_handle(soc, nbuf,
  2639. peer_id,
  2640. rx_tlv_hdr);
  2641. break;
  2642. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  2643. case HAL_REO_ERR_BAR_FRAME_OOR:
  2644. peer = dp_peer_get_tgt_peer_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  2645. if (peer) {
  2646. dp_rx_err_handle_bar(soc, peer,
  2647. nbuf);
  2648. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  2649. }
  2650. dp_rx_nbuf_free(nbuf);
  2651. break;
  2652. case HAL_REO_ERR_PN_CHECK_FAILED:
  2653. case HAL_REO_ERR_PN_ERROR_HANDLING_FLAG_SET:
  2654. if (txrx_peer)
  2655. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2656. rx.err.pn_err,
  2657. 1);
  2658. dp_rx_nbuf_free(nbuf);
  2659. break;
  2660. default:
  2661. dp_info_rl("Got pkt with REO ERROR: %d",
  2662. wbm_err_info.reo_err_code);
  2663. dp_rx_nbuf_free(nbuf);
  2664. }
  2665. } else if (wbm_err_info.reo_psh_rsn
  2666. == HAL_RX_WBM_REO_PSH_RSN_ROUTE) {
  2667. dp_rx_err_route_hdl(soc, nbuf, txrx_peer,
  2668. rx_tlv_hdr,
  2669. HAL_RX_WBM_ERR_SRC_REO);
  2670. } else {
  2671. /* should not enter here */
  2672. dp_rx_err_alert("invalid reo push reason %u",
  2673. wbm_err_info.reo_psh_rsn);
  2674. dp_rx_nbuf_free(nbuf);
  2675. qdf_assert_always(0);
  2676. }
  2677. } else if (wbm_err_info.wbm_err_src ==
  2678. HAL_RX_WBM_ERR_SRC_RXDMA) {
  2679. if (wbm_err_info.rxdma_psh_rsn
  2680. == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  2681. DP_STATS_INC(soc,
  2682. rx.err.rxdma_error
  2683. [wbm_err_info.rxdma_err_code], 1);
  2684. /* increment @pdev level */
  2685. pool_id = wbm_err_info.pool_id;
  2686. dp_pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  2687. if (dp_pdev)
  2688. DP_STATS_INC(dp_pdev,
  2689. err.rxdma_error, 1);
  2690. switch (wbm_err_info.rxdma_err_code) {
  2691. case HAL_RXDMA_ERR_UNENCRYPTED:
  2692. case HAL_RXDMA_ERR_WIFI_PARSE:
  2693. if (txrx_peer)
  2694. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2695. rx.err.rxdma_wifi_parse_err,
  2696. 1);
  2697. pool_id = wbm_err_info.pool_id;
  2698. dp_rx_process_rxdma_err(soc, nbuf,
  2699. rx_tlv_hdr,
  2700. txrx_peer,
  2701. wbm_err_info.
  2702. rxdma_err_code,
  2703. pool_id);
  2704. break;
  2705. case HAL_RXDMA_ERR_TKIP_MIC:
  2706. dp_rx_process_mic_error(soc, nbuf,
  2707. rx_tlv_hdr,
  2708. txrx_peer);
  2709. if (txrx_peer)
  2710. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2711. rx.err.mic_err,
  2712. 1);
  2713. break;
  2714. case HAL_RXDMA_ERR_DECRYPT:
  2715. /* All the TKIP-MIC failures are treated as Decrypt Errors
  2716. * for QCN9224 Targets
  2717. */
  2718. is_tkip_mic_err = hal_rx_msdu_end_is_tkip_mic_err(hal_soc, rx_tlv_hdr);
  2719. if (is_tkip_mic_err && txrx_peer) {
  2720. dp_rx_process_mic_error(soc, nbuf,
  2721. rx_tlv_hdr,
  2722. txrx_peer);
  2723. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2724. rx.err.mic_err,
  2725. 1);
  2726. break;
  2727. }
  2728. if (txrx_peer) {
  2729. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2730. rx.err.decrypt_err,
  2731. 1);
  2732. dp_rx_nbuf_free(nbuf);
  2733. break;
  2734. }
  2735. if (!dp_handle_rxdma_decrypt_err()) {
  2736. dp_rx_nbuf_free(nbuf);
  2737. break;
  2738. }
  2739. pool_id = wbm_err_info.pool_id;
  2740. err_code = wbm_err_info.rxdma_err_code;
  2741. tlv_hdr = rx_tlv_hdr;
  2742. dp_rx_process_rxdma_err(soc, nbuf,
  2743. tlv_hdr, NULL,
  2744. err_code,
  2745. pool_id);
  2746. break;
  2747. case HAL_RXDMA_MULTICAST_ECHO:
  2748. if (txrx_peer)
  2749. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  2750. rx.mec_drop, 1,
  2751. qdf_nbuf_len(nbuf));
  2752. dp_rx_nbuf_free(nbuf);
  2753. break;
  2754. case HAL_RXDMA_UNAUTHORIZED_WDS:
  2755. pool_id = wbm_err_info.pool_id;
  2756. err_code = wbm_err_info.rxdma_err_code;
  2757. tlv_hdr = rx_tlv_hdr;
  2758. dp_rx_process_rxdma_err(soc, nbuf,
  2759. tlv_hdr, NULL,
  2760. err_code,
  2761. pool_id);
  2762. break;
  2763. default:
  2764. dp_rx_nbuf_free(nbuf);
  2765. dp_err_rl("RXDMA error %d",
  2766. wbm_err_info.rxdma_err_code);
  2767. }
  2768. } else if (wbm_err_info.rxdma_psh_rsn
  2769. == HAL_RX_WBM_RXDMA_PSH_RSN_ROUTE) {
  2770. dp_rx_err_route_hdl(soc, nbuf, txrx_peer,
  2771. rx_tlv_hdr,
  2772. HAL_RX_WBM_ERR_SRC_RXDMA);
  2773. } else if (wbm_err_info.rxdma_psh_rsn
  2774. == HAL_RX_WBM_RXDMA_PSH_RSN_FLUSH) {
  2775. dp_rx_err_err("rxdma push reason %u",
  2776. wbm_err_info.rxdma_psh_rsn);
  2777. DP_STATS_INC(soc, rx.err.rx_flush_count, 1);
  2778. dp_rx_nbuf_free(nbuf);
  2779. } else {
  2780. /* should not enter here */
  2781. dp_rx_err_alert("invalid rxdma push reason %u",
  2782. wbm_err_info.rxdma_psh_rsn);
  2783. dp_rx_nbuf_free(nbuf);
  2784. qdf_assert_always(0);
  2785. }
  2786. } else {
  2787. /* Should not come here */
  2788. qdf_assert(0);
  2789. }
  2790. if (txrx_peer)
  2791. dp_txrx_peer_unref_delete(txrx_ref_handle,
  2792. DP_MOD_ID_RX_ERR);
  2793. nbuf = next;
  2794. }
  2795. return rx_bufs_used; /* Assume no scale factor for now */
  2796. }
  2797. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2798. /**
  2799. * dup_desc_dbg() - dump and assert if duplicate rx desc found
  2800. *
  2801. * @soc: core DP main context
  2802. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  2803. * @rx_desc: void pointer to rx descriptor
  2804. *
  2805. * Return: void
  2806. */
  2807. static void dup_desc_dbg(struct dp_soc *soc,
  2808. hal_rxdma_desc_t rxdma_dst_ring_desc,
  2809. void *rx_desc)
  2810. {
  2811. DP_STATS_INC(soc, rx.err.hal_rxdma_err_dup, 1);
  2812. dp_rx_dump_info_and_assert(
  2813. soc,
  2814. soc->rx_rel_ring.hal_srng,
  2815. hal_rxdma_desc_to_hal_ring_desc(rxdma_dst_ring_desc),
  2816. rx_desc);
  2817. }
  2818. /**
  2819. * dp_rx_err_mpdu_pop() - extract the MSDU's from link descs
  2820. *
  2821. * @soc: core DP main context
  2822. * @mac_id: mac id which is one of 3 mac_ids
  2823. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  2824. * @head: head of descs list to be freed
  2825. * @tail: tail of decs list to be freed
  2826. * Return: number of msdu in MPDU to be popped
  2827. */
  2828. static inline uint32_t
  2829. dp_rx_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  2830. hal_rxdma_desc_t rxdma_dst_ring_desc,
  2831. union dp_rx_desc_list_elem_t **head,
  2832. union dp_rx_desc_list_elem_t **tail)
  2833. {
  2834. void *rx_msdu_link_desc;
  2835. qdf_nbuf_t msdu;
  2836. qdf_nbuf_t last;
  2837. struct hal_rx_msdu_list msdu_list;
  2838. uint16_t num_msdus;
  2839. struct hal_buf_info buf_info;
  2840. uint32_t rx_bufs_used = 0;
  2841. uint32_t msdu_cnt;
  2842. uint32_t i;
  2843. uint8_t push_reason;
  2844. uint8_t rxdma_error_code = 0;
  2845. uint8_t bm_action = HAL_BM_ACTION_PUT_IN_IDLE_LIST;
  2846. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2847. uint32_t rx_link_buf_info[HAL_RX_BUFFINFO_NUM_DWORDS];
  2848. hal_rxdma_desc_t ring_desc;
  2849. struct rx_desc_pool *rx_desc_pool;
  2850. if (!pdev) {
  2851. dp_rx_err_debug("%pK: pdev is null for mac_id = %d",
  2852. soc, mac_id);
  2853. return rx_bufs_used;
  2854. }
  2855. msdu = 0;
  2856. last = NULL;
  2857. hal_rx_reo_ent_buf_paddr_get(soc->hal_soc, rxdma_dst_ring_desc,
  2858. &buf_info, &msdu_cnt);
  2859. push_reason =
  2860. hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc);
  2861. if (push_reason == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  2862. rxdma_error_code =
  2863. hal_rx_reo_ent_rxdma_error_code_get(rxdma_dst_ring_desc);
  2864. }
  2865. do {
  2866. rx_msdu_link_desc =
  2867. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  2868. qdf_assert_always(rx_msdu_link_desc);
  2869. hal_rx_msdu_list_get(soc->hal_soc, rx_msdu_link_desc,
  2870. &msdu_list, &num_msdus);
  2871. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  2872. /* if the msdus belongs to NSS offloaded radio &&
  2873. * the rbm is not SW1_BM then return the msdu_link
  2874. * descriptor without freeing the msdus (nbufs). let
  2875. * these buffers be given to NSS completion ring for
  2876. * NSS to free them.
  2877. * else iterate through the msdu link desc list and
  2878. * free each msdu in the list.
  2879. */
  2880. if (msdu_list.rbm[0] !=
  2881. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id) &&
  2882. wlan_cfg_get_dp_pdev_nss_enabled(
  2883. pdev->wlan_cfg_ctx))
  2884. bm_action = HAL_BM_ACTION_RELEASE_MSDU_LIST;
  2885. else {
  2886. for (i = 0; i < num_msdus; i++) {
  2887. struct dp_rx_desc *rx_desc =
  2888. soc->arch_ops.
  2889. dp_rx_desc_cookie_2_va(
  2890. soc,
  2891. msdu_list.sw_cookie[i]);
  2892. qdf_assert_always(rx_desc);
  2893. msdu = rx_desc->nbuf;
  2894. /*
  2895. * this is a unlikely scenario
  2896. * where the host is reaping
  2897. * a descriptor which
  2898. * it already reaped just a while ago
  2899. * but is yet to replenish
  2900. * it back to HW.
  2901. * In this case host will dump
  2902. * the last 128 descriptors
  2903. * including the software descriptor
  2904. * rx_desc and assert.
  2905. */
  2906. ring_desc = rxdma_dst_ring_desc;
  2907. if (qdf_unlikely(!rx_desc->in_use)) {
  2908. dup_desc_dbg(soc,
  2909. ring_desc,
  2910. rx_desc);
  2911. continue;
  2912. }
  2913. if (rx_desc->unmapped == 0) {
  2914. rx_desc_pool =
  2915. &soc->rx_desc_buf[rx_desc->pool_id];
  2916. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  2917. dp_rx_nbuf_unmap_pool(soc,
  2918. rx_desc_pool,
  2919. msdu);
  2920. rx_desc->unmapped = 1;
  2921. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  2922. }
  2923. dp_rx_err_debug("%pK: msdu_nbuf=%pK ",
  2924. soc, msdu);
  2925. dp_rx_buffer_pool_nbuf_free(soc, msdu,
  2926. rx_desc->pool_id);
  2927. rx_bufs_used++;
  2928. dp_rx_add_to_free_desc_list(head,
  2929. tail, rx_desc);
  2930. }
  2931. }
  2932. } else {
  2933. rxdma_error_code = HAL_RXDMA_ERR_WAR;
  2934. }
  2935. /*
  2936. * Store the current link buffer into to the local structure
  2937. * to be used for release purpose.
  2938. */
  2939. hal_rxdma_buff_addr_info_set(soc->hal_soc, rx_link_buf_info,
  2940. buf_info.paddr, buf_info.sw_cookie,
  2941. buf_info.rbm);
  2942. hal_rx_mon_next_link_desc_get(soc->hal_soc, rx_msdu_link_desc,
  2943. &buf_info);
  2944. dp_rx_link_desc_return_by_addr(soc,
  2945. (hal_buff_addrinfo_t)
  2946. rx_link_buf_info,
  2947. bm_action);
  2948. } while (buf_info.paddr);
  2949. DP_STATS_INC(soc, rx.err.rxdma_error[rxdma_error_code], 1);
  2950. if (pdev)
  2951. DP_STATS_INC(pdev, err.rxdma_error, 1);
  2952. if (rxdma_error_code == HAL_RXDMA_ERR_DECRYPT) {
  2953. dp_rx_err_err("%pK: Packet received with Decrypt error", soc);
  2954. }
  2955. return rx_bufs_used;
  2956. }
  2957. uint32_t
  2958. dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  2959. uint32_t mac_id, uint32_t quota)
  2960. {
  2961. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2962. hal_rxdma_desc_t rxdma_dst_ring_desc;
  2963. hal_soc_handle_t hal_soc;
  2964. void *err_dst_srng;
  2965. union dp_rx_desc_list_elem_t *head = NULL;
  2966. union dp_rx_desc_list_elem_t *tail = NULL;
  2967. struct dp_srng *dp_rxdma_srng;
  2968. struct rx_desc_pool *rx_desc_pool;
  2969. uint32_t work_done = 0;
  2970. uint32_t rx_bufs_used = 0;
  2971. if (!pdev)
  2972. return 0;
  2973. err_dst_srng = soc->rxdma_err_dst_ring[mac_id].hal_srng;
  2974. if (!err_dst_srng) {
  2975. dp_rx_err_err("%pK: HAL Monitor Destination Ring Init Failed -- %pK",
  2976. soc, err_dst_srng);
  2977. return 0;
  2978. }
  2979. hal_soc = soc->hal_soc;
  2980. qdf_assert(hal_soc);
  2981. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, err_dst_srng))) {
  2982. dp_rx_err_err("%pK: HAL Monitor Destination Ring Init Failed -- %pK",
  2983. soc, err_dst_srng);
  2984. return 0;
  2985. }
  2986. while (qdf_likely(quota-- && (rxdma_dst_ring_desc =
  2987. hal_srng_dst_get_next(hal_soc, err_dst_srng)))) {
  2988. rx_bufs_used += dp_rx_err_mpdu_pop(soc, mac_id,
  2989. rxdma_dst_ring_desc,
  2990. &head, &tail);
  2991. }
  2992. dp_srng_access_end(int_ctx, soc, err_dst_srng);
  2993. if (rx_bufs_used) {
  2994. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2995. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  2996. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  2997. } else {
  2998. dp_rxdma_srng = &soc->rx_refill_buf_ring[pdev->lmac_id];
  2999. rx_desc_pool = &soc->rx_desc_buf[pdev->lmac_id];
  3000. }
  3001. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  3002. rx_desc_pool, rx_bufs_used, &head, &tail);
  3003. work_done += rx_bufs_used;
  3004. }
  3005. return work_done;
  3006. }
  3007. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  3008. static inline uint32_t
  3009. dp_wbm_int_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  3010. hal_rxdma_desc_t rxdma_dst_ring_desc,
  3011. union dp_rx_desc_list_elem_t **head,
  3012. union dp_rx_desc_list_elem_t **tail)
  3013. {
  3014. void *rx_msdu_link_desc;
  3015. qdf_nbuf_t msdu;
  3016. qdf_nbuf_t last;
  3017. struct hal_rx_msdu_list msdu_list;
  3018. uint16_t num_msdus;
  3019. struct hal_buf_info buf_info;
  3020. uint32_t rx_bufs_used = 0, msdu_cnt, i;
  3021. uint32_t rx_link_buf_info[HAL_RX_BUFFINFO_NUM_DWORDS];
  3022. struct rx_desc_pool *rx_desc_pool;
  3023. msdu = 0;
  3024. last = NULL;
  3025. hal_rx_reo_ent_buf_paddr_get(soc->hal_soc, rxdma_dst_ring_desc,
  3026. &buf_info, &msdu_cnt);
  3027. do {
  3028. rx_msdu_link_desc =
  3029. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  3030. if (!rx_msdu_link_desc) {
  3031. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_LINK_DESC], 1);
  3032. break;
  3033. }
  3034. hal_rx_msdu_list_get(soc->hal_soc, rx_msdu_link_desc,
  3035. &msdu_list, &num_msdus);
  3036. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  3037. for (i = 0; i < num_msdus; i++) {
  3038. struct dp_rx_desc *rx_desc =
  3039. soc->arch_ops.dp_rx_desc_cookie_2_va(
  3040. soc,
  3041. msdu_list.sw_cookie[i]);
  3042. qdf_assert_always(rx_desc);
  3043. rx_desc_pool =
  3044. &soc->rx_desc_buf[rx_desc->pool_id];
  3045. msdu = rx_desc->nbuf;
  3046. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  3047. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, msdu);
  3048. rx_desc->unmapped = 1;
  3049. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  3050. dp_rx_buffer_pool_nbuf_free(soc, msdu,
  3051. rx_desc->pool_id);
  3052. rx_bufs_used++;
  3053. dp_rx_add_to_free_desc_list(head,
  3054. tail, rx_desc);
  3055. }
  3056. }
  3057. /*
  3058. * Store the current link buffer into to the local structure
  3059. * to be used for release purpose.
  3060. */
  3061. hal_rxdma_buff_addr_info_set(soc->hal_soc, rx_link_buf_info,
  3062. buf_info.paddr, buf_info.sw_cookie,
  3063. buf_info.rbm);
  3064. hal_rx_mon_next_link_desc_get(soc->hal_soc, rx_msdu_link_desc,
  3065. &buf_info);
  3066. dp_rx_link_desc_return_by_addr(soc, (hal_buff_addrinfo_t)
  3067. rx_link_buf_info,
  3068. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  3069. } while (buf_info.paddr);
  3070. return rx_bufs_used;
  3071. }
  3072. /*
  3073. *
  3074. * dp_handle_wbm_internal_error() - handles wbm_internal_error case
  3075. *
  3076. * @soc: core DP main context
  3077. * @hal_desc: hal descriptor
  3078. * @buf_type: indicates if the buffer is of type link disc or msdu
  3079. * Return: None
  3080. *
  3081. * wbm_internal_error is seen in following scenarios :
  3082. *
  3083. * 1. Null pointers detected in WBM_RELEASE_RING descriptors
  3084. * 2. Null pointers detected during delinking process
  3085. *
  3086. * Some null pointer cases:
  3087. *
  3088. * a. MSDU buffer pointer is NULL
  3089. * b. Next_MSDU_Link_Desc pointer is NULL, with no last msdu flag
  3090. * c. MSDU buffer pointer is NULL or Next_Link_Desc pointer is NULL
  3091. */
  3092. void
  3093. dp_handle_wbm_internal_error(struct dp_soc *soc, void *hal_desc,
  3094. uint32_t buf_type)
  3095. {
  3096. struct hal_buf_info buf_info = {0};
  3097. struct dp_rx_desc *rx_desc = NULL;
  3098. struct rx_desc_pool *rx_desc_pool;
  3099. uint32_t rx_bufs_reaped = 0;
  3100. union dp_rx_desc_list_elem_t *head = NULL;
  3101. union dp_rx_desc_list_elem_t *tail = NULL;
  3102. uint8_t pool_id;
  3103. hal_rx_reo_buf_paddr_get(soc->hal_soc, hal_desc, &buf_info);
  3104. if (!buf_info.paddr) {
  3105. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_BUFFER], 1);
  3106. return;
  3107. }
  3108. /* buffer_addr_info is the first element of ring_desc */
  3109. hal_rx_buf_cookie_rbm_get(soc->hal_soc, (uint32_t *)hal_desc,
  3110. &buf_info);
  3111. pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(buf_info.sw_cookie);
  3112. if (buf_type == HAL_WBM_RELEASE_RING_2_BUFFER_TYPE) {
  3113. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_MSDU_BUFF], 1);
  3114. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  3115. soc,
  3116. buf_info.sw_cookie);
  3117. if (rx_desc && rx_desc->nbuf) {
  3118. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  3119. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  3120. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool,
  3121. rx_desc->nbuf);
  3122. rx_desc->unmapped = 1;
  3123. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  3124. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  3125. rx_desc->pool_id);
  3126. dp_rx_add_to_free_desc_list(&head,
  3127. &tail,
  3128. rx_desc);
  3129. rx_bufs_reaped++;
  3130. }
  3131. } else if (buf_type == HAL_WBM_RELEASE_RING_2_DESC_TYPE) {
  3132. rx_bufs_reaped = dp_wbm_int_err_mpdu_pop(soc, pool_id,
  3133. hal_desc,
  3134. &head, &tail);
  3135. }
  3136. if (rx_bufs_reaped) {
  3137. struct rx_desc_pool *rx_desc_pool;
  3138. struct dp_srng *dp_rxdma_srng;
  3139. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_BUFF_REAPED], 1);
  3140. dp_rxdma_srng = &soc->rx_refill_buf_ring[pool_id];
  3141. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  3142. dp_rx_buffers_replenish(soc, pool_id, dp_rxdma_srng,
  3143. rx_desc_pool,
  3144. rx_bufs_reaped,
  3145. &head, &tail);
  3146. }
  3147. }
  3148. #endif /* QCA_HOST_MODE_WIFI_DISABLED */