dp_rx.h 37 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287
  1. /*
  2. * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _DP_RX_H
  19. #define _DP_RX_H
  20. #include "hal_rx.h"
  21. #include "dp_tx.h"
  22. #include "dp_peer.h"
  23. #include "dp_internal.h"
  24. #ifdef RXDMA_OPTIMIZATION
  25. #ifndef RX_DATA_BUFFER_ALIGNMENT
  26. #define RX_DATA_BUFFER_ALIGNMENT 128
  27. #endif
  28. #ifndef RX_MONITOR_BUFFER_ALIGNMENT
  29. #define RX_MONITOR_BUFFER_ALIGNMENT 128
  30. #endif
  31. #else /* RXDMA_OPTIMIZATION */
  32. #define RX_DATA_BUFFER_ALIGNMENT 4
  33. #define RX_MONITOR_BUFFER_ALIGNMENT 4
  34. #endif /* RXDMA_OPTIMIZATION */
  35. #ifdef QCA_HOST2FW_RXBUF_RING
  36. #define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW1_BM
  37. /* RBM value used for re-injecting defragmented packets into REO */
  38. #define DP_DEFRAG_RBM HAL_RX_BUF_RBM_SW3_BM
  39. #else
  40. #define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW3_BM
  41. #define DP_DEFRAG_RBM DP_WBM2SW_RBM
  42. #endif /* QCA_HOST2FW_RXBUF_RING */
  43. #define RX_BUFFER_RESERVATION 0
  44. #define DP_PEER_METADATA_PEER_ID_MASK 0x0000ffff
  45. #define DP_PEER_METADATA_PEER_ID_SHIFT 0
  46. #define DP_PEER_METADATA_VDEV_ID_MASK 0x003f0000
  47. #define DP_PEER_METADATA_VDEV_ID_SHIFT 16
  48. #define DP_PEER_METADATA_PEER_ID_GET(_peer_metadata) \
  49. (((_peer_metadata) & DP_PEER_METADATA_PEER_ID_MASK) \
  50. >> DP_PEER_METADATA_PEER_ID_SHIFT)
  51. #define DP_PEER_METADATA_VDEV_ID_GET(_peer_metadata) \
  52. (((_peer_metadata) & DP_PEER_METADATA_VDEV_ID_MASK) \
  53. >> DP_PEER_METADATA_VDEV_ID_SHIFT)
  54. #define DP_RX_DESC_MAGIC 0xdec0de
  55. /**
  56. * struct dp_rx_desc
  57. *
  58. * @nbuf : VA of the "skb" posted
  59. * @rx_buf_start : VA of the original Rx buffer, before
  60. * movement of any skb->data pointer
  61. * @cookie : index into the sw array which holds
  62. * the sw Rx descriptors
  63. * Cookie space is 21 bits:
  64. * lower 18 bits -- index
  65. * upper 3 bits -- pool_id
  66. * @pool_id : pool Id for which this allocated.
  67. * Can only be used if there is no flow
  68. * steering
  69. * @in_use rx_desc is in use
  70. * @unmapped used to mark rx_desc an unmapped if the corresponding
  71. * nbuf is already unmapped
  72. */
  73. struct dp_rx_desc {
  74. qdf_nbuf_t nbuf;
  75. uint8_t *rx_buf_start;
  76. uint32_t cookie;
  77. uint8_t pool_id;
  78. #ifdef RX_DESC_DEBUG_CHECK
  79. uint32_t magic;
  80. #endif
  81. uint8_t in_use:1,
  82. unmapped:1;
  83. };
  84. /* RX Descriptor Multi Page memory alloc related */
  85. #define DP_RX_DESC_OFFSET_NUM_BITS 8
  86. #define DP_RX_DESC_PAGE_ID_NUM_BITS 8
  87. #define DP_RX_DESC_POOL_ID_NUM_BITS 4
  88. #define DP_RX_DESC_PAGE_ID_SHIFT DP_RX_DESC_OFFSET_NUM_BITS
  89. #define DP_RX_DESC_POOL_ID_SHIFT \
  90. (DP_RX_DESC_OFFSET_NUM_BITS + DP_RX_DESC_PAGE_ID_NUM_BITS)
  91. #define RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK \
  92. (((1 << DP_RX_DESC_POOL_ID_NUM_BITS) - 1) << DP_RX_DESC_POOL_ID_SHIFT)
  93. #define RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK \
  94. (((1 << DP_RX_DESC_PAGE_ID_NUM_BITS) - 1) << \
  95. DP_RX_DESC_PAGE_ID_SHIFT)
  96. #define RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK \
  97. ((1 << DP_RX_DESC_OFFSET_NUM_BITS) - 1)
  98. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(_cookie) \
  99. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK) >> \
  100. DP_RX_DESC_POOL_ID_SHIFT)
  101. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(_cookie) \
  102. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK) >> \
  103. DP_RX_DESC_PAGE_ID_SHIFT)
  104. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(_cookie) \
  105. ((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK)
  106. #define RX_DESC_COOKIE_INDEX_SHIFT 0
  107. #define RX_DESC_COOKIE_INDEX_MASK 0x3ffff /* 18 bits */
  108. #define RX_DESC_COOKIE_POOL_ID_SHIFT 18
  109. #define RX_DESC_COOKIE_POOL_ID_MASK 0x1c0000
  110. #define DP_RX_DESC_COOKIE_MAX \
  111. (RX_DESC_COOKIE_INDEX_MASK | RX_DESC_COOKIE_POOL_ID_MASK)
  112. #define DP_RX_DESC_COOKIE_POOL_ID_GET(_cookie) \
  113. (((_cookie) & RX_DESC_COOKIE_POOL_ID_MASK) >> \
  114. RX_DESC_COOKIE_POOL_ID_SHIFT)
  115. #define DP_RX_DESC_COOKIE_INDEX_GET(_cookie) \
  116. (((_cookie) & RX_DESC_COOKIE_INDEX_MASK) >> \
  117. RX_DESC_COOKIE_INDEX_SHIFT)
  118. #define FRAME_MASK_IPV4_ARP 1
  119. #define FRAME_MASK_IPV4_DHCP 2
  120. #define FRAME_MASK_IPV4_EAPOL 4
  121. #define FRAME_MASK_IPV6_DHCP 8
  122. #ifdef DP_RX_SPECIAL_FRAME_NEED
  123. /**
  124. * dp_rx_is_special_frame() - check is RX frame special needed
  125. *
  126. * @nbuf: RX skb pointer
  127. * @frame_mask: the mask for speical frame needed
  128. *
  129. * Check is RX frame wanted matched with mask
  130. *
  131. * Return: true - special frame needed, false - no
  132. */
  133. static inline
  134. bool dp_rx_is_special_frame(qdf_nbuf_t nbuf, uint32_t frame_mask)
  135. {
  136. if (((frame_mask & FRAME_MASK_IPV4_ARP) &&
  137. qdf_nbuf_is_ipv4_arp_pkt(nbuf)) ||
  138. ((frame_mask & FRAME_MASK_IPV4_DHCP) &&
  139. qdf_nbuf_is_ipv4_dhcp_pkt(nbuf)) ||
  140. ((frame_mask & FRAME_MASK_IPV4_EAPOL) &&
  141. qdf_nbuf_is_ipv4_eapol_pkt(nbuf)) ||
  142. ((frame_mask & FRAME_MASK_IPV6_DHCP) &&
  143. qdf_nbuf_is_ipv6_dhcp_pkt(nbuf)))
  144. return true;
  145. return false;
  146. }
  147. /**
  148. * dp_rx_deliver_special_frame() - Deliver the RX special frame to stack
  149. * if matches mask
  150. *
  151. * @soc: Datapath soc handler
  152. * @peer: pointer to DP peer
  153. * @nbuf: pointer to the skb of RX frame
  154. * @frame_mask: the mask for speical frame needed
  155. * @rx_tlv_hdr: start of rx tlv header
  156. *
  157. * note: Msdu_len must have been stored in QDF_NBUF_CB_RX_PKT_LEN(nbuf) and
  158. * single nbuf is expected.
  159. *
  160. * return: true - nbuf has been delivered to stack, false - not.
  161. */
  162. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_peer *peer,
  163. qdf_nbuf_t nbuf, uint32_t frame_mask,
  164. uint8_t *rx_tlv_hdr);
  165. #else
  166. static inline
  167. bool dp_rx_is_special_frame(qdf_nbuf_t nbuf, uint32_t frame_mask)
  168. {
  169. return false;
  170. }
  171. static inline
  172. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_peer *peer,
  173. qdf_nbuf_t nbuf, uint32_t frame_mask,
  174. uint8_t *rx_tlv_hdr)
  175. {
  176. return false;
  177. }
  178. #endif
  179. /* DOC: Offset to obtain LLC hdr
  180. *
  181. * In the case of Wifi parse error
  182. * to reach LLC header from beginning
  183. * of VLAN tag we need to skip 8 bytes.
  184. * Vlan_tag(4)+length(2)+length added
  185. * by HW(2) = 8 bytes.
  186. */
  187. #define DP_SKIP_VLAN 8
  188. /**
  189. * struct dp_rx_cached_buf - rx cached buffer
  190. * @list: linked list node
  191. * @buf: skb buffer
  192. */
  193. struct dp_rx_cached_buf {
  194. qdf_list_node_t node;
  195. qdf_nbuf_t buf;
  196. };
  197. /*
  198. *dp_rx_xor_block() - xor block of data
  199. *@b: destination data block
  200. *@a: source data block
  201. *@len: length of the data to process
  202. *
  203. *Returns: None
  204. */
  205. static inline void dp_rx_xor_block(uint8_t *b, const uint8_t *a, qdf_size_t len)
  206. {
  207. qdf_size_t i;
  208. for (i = 0; i < len; i++)
  209. b[i] ^= a[i];
  210. }
  211. /*
  212. *dp_rx_rotl() - rotate the bits left
  213. *@val: unsigned integer input value
  214. *@bits: number of bits
  215. *
  216. *Returns: Integer with left rotated by number of 'bits'
  217. */
  218. static inline uint32_t dp_rx_rotl(uint32_t val, int bits)
  219. {
  220. return (val << bits) | (val >> (32 - bits));
  221. }
  222. /*
  223. *dp_rx_rotr() - rotate the bits right
  224. *@val: unsigned integer input value
  225. *@bits: number of bits
  226. *
  227. *Returns: Integer with right rotated by number of 'bits'
  228. */
  229. static inline uint32_t dp_rx_rotr(uint32_t val, int bits)
  230. {
  231. return (val >> bits) | (val << (32 - bits));
  232. }
  233. /*
  234. * dp_set_rx_queue() - set queue_mapping in skb
  235. * @nbuf: skb
  236. * @queue_id: rx queue_id
  237. *
  238. * Return: void
  239. */
  240. #ifdef QCA_OL_RX_MULTIQ_SUPPORT
  241. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  242. {
  243. qdf_nbuf_record_rx_queue(nbuf, queue_id);
  244. return;
  245. }
  246. #else
  247. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  248. {
  249. }
  250. #endif
  251. /*
  252. *dp_rx_xswap() - swap the bits left
  253. *@val: unsigned integer input value
  254. *
  255. *Returns: Integer with bits swapped
  256. */
  257. static inline uint32_t dp_rx_xswap(uint32_t val)
  258. {
  259. return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
  260. }
  261. /*
  262. *dp_rx_get_le32_split() - get little endian 32 bits split
  263. *@b0: byte 0
  264. *@b1: byte 1
  265. *@b2: byte 2
  266. *@b3: byte 3
  267. *
  268. *Returns: Integer with split little endian 32 bits
  269. */
  270. static inline uint32_t dp_rx_get_le32_split(uint8_t b0, uint8_t b1, uint8_t b2,
  271. uint8_t b3)
  272. {
  273. return b0 | (b1 << 8) | (b2 << 16) | (b3 << 24);
  274. }
  275. /*
  276. *dp_rx_get_le32() - get little endian 32 bits
  277. *@b0: byte 0
  278. *@b1: byte 1
  279. *@b2: byte 2
  280. *@b3: byte 3
  281. *
  282. *Returns: Integer with little endian 32 bits
  283. */
  284. static inline uint32_t dp_rx_get_le32(const uint8_t *p)
  285. {
  286. return dp_rx_get_le32_split(p[0], p[1], p[2], p[3]);
  287. }
  288. /*
  289. * dp_rx_put_le32() - put little endian 32 bits
  290. * @p: destination char array
  291. * @v: source 32-bit integer
  292. *
  293. * Returns: None
  294. */
  295. static inline void dp_rx_put_le32(uint8_t *p, uint32_t v)
  296. {
  297. p[0] = (v) & 0xff;
  298. p[1] = (v >> 8) & 0xff;
  299. p[2] = (v >> 16) & 0xff;
  300. p[3] = (v >> 24) & 0xff;
  301. }
  302. /* Extract michal mic block of data */
  303. #define dp_rx_michael_block(l, r) \
  304. do { \
  305. r ^= dp_rx_rotl(l, 17); \
  306. l += r; \
  307. r ^= dp_rx_xswap(l); \
  308. l += r; \
  309. r ^= dp_rx_rotl(l, 3); \
  310. l += r; \
  311. r ^= dp_rx_rotr(l, 2); \
  312. l += r; \
  313. } while (0)
  314. /**
  315. * struct dp_rx_desc_list_elem_t
  316. *
  317. * @next : Next pointer to form free list
  318. * @rx_desc : DP Rx descriptor
  319. */
  320. union dp_rx_desc_list_elem_t {
  321. union dp_rx_desc_list_elem_t *next;
  322. struct dp_rx_desc rx_desc;
  323. };
  324. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  325. /**
  326. * dp_rx_desc_find() - find dp rx descriptor from page ID and offset
  327. * @page_id: Page ID
  328. * @offset: Offset of the descriptor element
  329. *
  330. * Return: RX descriptor element
  331. */
  332. union dp_rx_desc_list_elem_t *dp_rx_desc_find(uint16_t page_id, uint16_t offset,
  333. struct rx_desc_pool *rx_pool);
  334. static inline
  335. struct dp_rx_desc *dp_get_rx_desc_from_cookie(struct dp_soc *soc,
  336. struct rx_desc_pool *pool,
  337. uint32_t cookie)
  338. {
  339. uint8_t pool_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(cookie);
  340. uint16_t page_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(cookie);
  341. uint8_t offset = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(cookie);
  342. struct rx_desc_pool *rx_desc_pool;
  343. union dp_rx_desc_list_elem_t *rx_desc_elem;
  344. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  345. return NULL;
  346. rx_desc_pool = &pool[pool_id];
  347. rx_desc_elem = (union dp_rx_desc_list_elem_t *)
  348. (rx_desc_pool->desc_pages.cacheable_pages[page_id] +
  349. rx_desc_pool->elem_size * offset);
  350. return &rx_desc_elem->rx_desc;
  351. }
  352. /**
  353. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  354. * the Rx descriptor on Rx DMA source ring buffer
  355. * @soc: core txrx main context
  356. * @cookie: cookie used to lookup virtual address
  357. *
  358. * Return: Pointer to the Rx descriptor
  359. */
  360. static inline
  361. struct dp_rx_desc *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc,
  362. uint32_t cookie)
  363. {
  364. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_buf[0], cookie);
  365. }
  366. /**
  367. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  368. * the Rx descriptor on monitor ring buffer
  369. * @soc: core txrx main context
  370. * @cookie: cookie used to lookup virtual address
  371. *
  372. * Return: Pointer to the Rx descriptor
  373. */
  374. static inline
  375. struct dp_rx_desc *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc,
  376. uint32_t cookie)
  377. {
  378. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_mon[0], cookie);
  379. }
  380. /**
  381. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  382. * the Rx descriptor on monitor status ring buffer
  383. * @soc: core txrx main context
  384. * @cookie: cookie used to lookup virtual address
  385. *
  386. * Return: Pointer to the Rx descriptor
  387. */
  388. static inline
  389. struct dp_rx_desc *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc,
  390. uint32_t cookie)
  391. {
  392. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_status[0], cookie);
  393. }
  394. #else
  395. void dp_rx_desc_pool_init(struct dp_soc *soc, uint32_t pool_id,
  396. uint32_t pool_size,
  397. struct rx_desc_pool *rx_desc_pool);
  398. /**
  399. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  400. * the Rx descriptor on Rx DMA source ring buffer
  401. * @soc: core txrx main context
  402. * @cookie: cookie used to lookup virtual address
  403. *
  404. * Return: void *: Virtual Address of the Rx descriptor
  405. */
  406. static inline
  407. void *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc, uint32_t cookie)
  408. {
  409. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  410. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  411. struct rx_desc_pool *rx_desc_pool;
  412. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  413. return NULL;
  414. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  415. if (qdf_unlikely(index >= rx_desc_pool->pool_size))
  416. return NULL;
  417. return &(soc->rx_desc_buf[pool_id].array[index].rx_desc);
  418. }
  419. /**
  420. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  421. * the Rx descriptor on monitor ring buffer
  422. * @soc: core txrx main context
  423. * @cookie: cookie used to lookup virtual address
  424. *
  425. * Return: void *: Virtual Address of the Rx descriptor
  426. */
  427. static inline
  428. void *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc, uint32_t cookie)
  429. {
  430. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  431. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  432. /* TODO */
  433. /* Add sanity for pool_id & index */
  434. return &(soc->rx_desc_mon[pool_id].array[index].rx_desc);
  435. }
  436. /**
  437. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  438. * the Rx descriptor on monitor status ring buffer
  439. * @soc: core txrx main context
  440. * @cookie: cookie used to lookup virtual address
  441. *
  442. * Return: void *: Virtual Address of the Rx descriptor
  443. */
  444. static inline
  445. void *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc, uint32_t cookie)
  446. {
  447. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  448. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  449. /* TODO */
  450. /* Add sanity for pool_id & index */
  451. return &(soc->rx_desc_status[pool_id].array[index].rx_desc);
  452. }
  453. #endif /* RX_DESC_MULTI_PAGE_ALLOC */
  454. QDF_STATUS dp_rx_desc_pool_is_allocated(struct rx_desc_pool *rx_desc_pool);
  455. QDF_STATUS dp_rx_desc_pool_alloc(struct dp_soc *soc,
  456. uint32_t pool_size,
  457. struct rx_desc_pool *rx_desc_pool);
  458. void dp_rx_desc_pool_init(struct dp_soc *soc, uint32_t pool_id,
  459. uint32_t pool_size,
  460. struct rx_desc_pool *rx_desc_pool);
  461. void dp_rx_pdev_mon_buf_buffers_free(struct dp_pdev *pdev, uint32_t mac_id);
  462. void dp_rx_add_desc_list_to_free_list(struct dp_soc *soc,
  463. union dp_rx_desc_list_elem_t **local_desc_list,
  464. union dp_rx_desc_list_elem_t **tail,
  465. uint16_t pool_id,
  466. struct rx_desc_pool *rx_desc_pool);
  467. uint16_t dp_rx_get_free_desc_list(struct dp_soc *soc, uint32_t pool_id,
  468. struct rx_desc_pool *rx_desc_pool,
  469. uint16_t num_descs,
  470. union dp_rx_desc_list_elem_t **desc_list,
  471. union dp_rx_desc_list_elem_t **tail);
  472. QDF_STATUS dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev);
  473. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev);
  474. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev);
  475. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev);
  476. void dp_rx_desc_pool_deinit(struct dp_soc *soc,
  477. struct rx_desc_pool *rx_desc_pool);
  478. QDF_STATUS dp_rx_pdev_attach(struct dp_pdev *pdev);
  479. QDF_STATUS dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev);
  480. void dp_rx_pdev_buffers_free(struct dp_pdev *pdev);
  481. void dp_rx_pdev_detach(struct dp_pdev *pdev);
  482. void dp_print_napi_stats(struct dp_soc *soc);
  483. /**
  484. * dp_rx_vdev_detach() - detach vdev from dp rx
  485. * @vdev: virtual device instance
  486. *
  487. * Return: QDF_STATUS_SUCCESS: success
  488. * QDF_STATUS_E_RESOURCES: Error return
  489. */
  490. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev);
  491. uint32_t
  492. dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  493. uint8_t reo_ring_num,
  494. uint32_t quota);
  495. /**
  496. * dp_rx_err_process() - Processes error frames routed to REO error ring
  497. * @int_ctx: pointer to DP interrupt context
  498. * @soc: core txrx main context
  499. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  500. * @quota: No. of units (packets) that can be serviced in one shot.
  501. *
  502. * This function implements error processing and top level demultiplexer
  503. * for all the frames routed to REO error ring.
  504. *
  505. * Return: uint32_t: No. of elements processed
  506. */
  507. uint32_t dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  508. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  509. /**
  510. * dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
  511. * @int_ctx: pointer to DP interrupt context
  512. * @soc: core txrx main context
  513. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  514. * @quota: No. of units (packets) that can be serviced in one shot.
  515. *
  516. * This function implements error processing and top level demultiplexer
  517. * for all the frames routed to WBM2HOST sw release ring.
  518. *
  519. * Return: uint32_t: No. of elements processed
  520. */
  521. uint32_t
  522. dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  523. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  524. /**
  525. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  526. * multiple nbufs.
  527. * @nbuf: pointer to the first msdu of an amsdu.
  528. *
  529. * This function implements the creation of RX frag_list for cases
  530. * where an MSDU is spread across multiple nbufs.
  531. *
  532. * Return: returns the head nbuf which contains complete frag_list.
  533. */
  534. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf);
  535. /*
  536. * dp_rx_desc_nbuf_and_pool_free() - free the sw rx desc pool called during
  537. * de-initialization of wifi module.
  538. *
  539. * @soc: core txrx main context
  540. * @pool_id: pool_id which is one of 3 mac_ids
  541. * @rx_desc_pool: rx descriptor pool pointer
  542. *
  543. * Return: None
  544. */
  545. void dp_rx_desc_nbuf_and_pool_free(struct dp_soc *soc, uint32_t pool_id,
  546. struct rx_desc_pool *rx_desc_pool);
  547. /*
  548. * dp_rx_desc_nbuf_free() - free the sw rx desc nbufs called during
  549. * de-initialization of wifi module.
  550. *
  551. * @soc: core txrx main context
  552. * @pool_id: pool_id which is one of 3 mac_ids
  553. * @rx_desc_pool: rx descriptor pool pointer
  554. *
  555. * Return: None
  556. */
  557. void dp_rx_desc_nbuf_free(struct dp_soc *soc,
  558. struct rx_desc_pool *rx_desc_pool);
  559. /*
  560. * dp_rx_desc_pool_free() - free the sw rx desc array called during
  561. * de-initialization of wifi module.
  562. *
  563. * @soc: core txrx main context
  564. * @rx_desc_pool: rx descriptor pool pointer
  565. *
  566. * Return: None
  567. */
  568. void dp_rx_desc_pool_free(struct dp_soc *soc,
  569. struct rx_desc_pool *rx_desc_pool);
  570. void dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  571. struct dp_peer *peer);
  572. /**
  573. * dp_rx_add_to_free_desc_list() - Adds to a local free descriptor list
  574. *
  575. * @head: pointer to the head of local free list
  576. * @tail: pointer to the tail of local free list
  577. * @new: new descriptor that is added to the free list
  578. *
  579. * Return: void:
  580. */
  581. static inline
  582. void dp_rx_add_to_free_desc_list(union dp_rx_desc_list_elem_t **head,
  583. union dp_rx_desc_list_elem_t **tail,
  584. struct dp_rx_desc *new)
  585. {
  586. qdf_assert(head && new);
  587. new->nbuf = NULL;
  588. new->in_use = 0;
  589. ((union dp_rx_desc_list_elem_t *)new)->next = *head;
  590. *head = (union dp_rx_desc_list_elem_t *)new;
  591. /* reset tail if head->next is NULL */
  592. if (!*tail || !(*head)->next)
  593. *tail = *head;
  594. }
  595. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  596. uint8_t mac_id);
  597. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  598. qdf_nbuf_t mpdu, bool mpdu_done, uint8_t mac_id);
  599. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  600. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  601. void dp_2k_jump_handle(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  602. uint16_t peer_id, uint8_t tid);
  603. #define DP_RX_LIST_APPEND(head, tail, elem) \
  604. do { \
  605. if (!(head)) { \
  606. (head) = (elem); \
  607. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head) = 1;\
  608. } else { \
  609. qdf_nbuf_set_next((tail), (elem)); \
  610. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head)++; \
  611. } \
  612. (tail) = (elem); \
  613. qdf_nbuf_set_next((tail), NULL); \
  614. } while (0)
  615. #define DP_RX_MERGE_TWO_LIST(phead, ptail, chead, ctail) \
  616. do { \
  617. if (!(phead)) { \
  618. (phead) = (chead); \
  619. } else { \
  620. qdf_nbuf_set_next((ptail), (chead)); \
  621. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(phead) += \
  622. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(chead); \
  623. } \
  624. (ptail) = (ctail); \
  625. qdf_nbuf_set_next((ptail), NULL); \
  626. } while (0)
  627. /*for qcn9000 emulation the pcie is complete phy and no address restrictions*/
  628. #if !defined(BUILD_X86) || defined(QCA_WIFI_QCN9000)
  629. static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
  630. qdf_dma_addr_t *paddr, struct rx_desc_pool *rx_desc_pool)
  631. {
  632. return QDF_STATUS_SUCCESS;
  633. }
  634. #else
  635. #define MAX_RETRY 100
  636. static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
  637. qdf_dma_addr_t *paddr, struct rx_desc_pool *rx_desc_pool)
  638. {
  639. uint32_t nbuf_retry = 0;
  640. int32_t ret;
  641. const uint32_t x86_phy_addr = 0x50000000;
  642. /*
  643. * in M2M emulation platforms (x86) the memory below 0x50000000
  644. * is reserved for target use, so any memory allocated in this
  645. * region should not be used by host
  646. */
  647. do {
  648. if (qdf_likely(*paddr > x86_phy_addr))
  649. return QDF_STATUS_SUCCESS;
  650. else {
  651. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  652. "phy addr %pK exceeded 0x50000000 trying again",
  653. paddr);
  654. nbuf_retry++;
  655. if ((*rx_netbuf)) {
  656. qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
  657. QDF_DMA_FROM_DEVICE);
  658. /* Not freeing buffer intentionally.
  659. * Observed that same buffer is getting
  660. * re-allocated resulting in longer load time
  661. * WMI init timeout.
  662. * This buffer is anyway not useful so skip it.
  663. **/
  664. }
  665. *rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  666. rx_desc_pool->buf_size,
  667. RX_BUFFER_RESERVATION,
  668. rx_desc_pool->buf_alignment,
  669. FALSE);
  670. if (qdf_unlikely(!(*rx_netbuf)))
  671. return QDF_STATUS_E_FAILURE;
  672. ret = qdf_nbuf_map_single(dp_soc->osdev, *rx_netbuf,
  673. QDF_DMA_FROM_DEVICE);
  674. if (qdf_unlikely(ret == QDF_STATUS_E_FAILURE)) {
  675. qdf_nbuf_free(*rx_netbuf);
  676. *rx_netbuf = NULL;
  677. continue;
  678. }
  679. *paddr = qdf_nbuf_get_frag_paddr(*rx_netbuf, 0);
  680. }
  681. } while (nbuf_retry < MAX_RETRY);
  682. if ((*rx_netbuf)) {
  683. qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
  684. QDF_DMA_FROM_DEVICE);
  685. qdf_nbuf_free(*rx_netbuf);
  686. }
  687. return QDF_STATUS_E_FAILURE;
  688. }
  689. #endif
  690. /**
  691. * dp_rx_cookie_2_link_desc_va() - Converts cookie to a virtual address of
  692. * the MSDU Link Descriptor
  693. * @soc: core txrx main context
  694. * @buf_info: buf_info includes cookie that is used to lookup
  695. * virtual address of link descriptor after deriving the page id
  696. * and the offset or index of the desc on the associatde page.
  697. *
  698. * This is the VA of the link descriptor, that HAL layer later uses to
  699. * retrieve the list of MSDU's for a given MPDU.
  700. *
  701. * Return: void *: Virtual Address of the Rx descriptor
  702. */
  703. static inline
  704. void *dp_rx_cookie_2_link_desc_va(struct dp_soc *soc,
  705. struct hal_buf_info *buf_info)
  706. {
  707. void *link_desc_va;
  708. struct qdf_mem_multi_page_t *pages;
  709. uint16_t page_id = LINK_DESC_COOKIE_PAGE_ID(buf_info->sw_cookie);
  710. pages = &soc->link_desc_pages;
  711. if (!pages)
  712. return NULL;
  713. if (qdf_unlikely(page_id >= pages->num_pages))
  714. return NULL;
  715. link_desc_va = pages->dma_pages[page_id].page_v_addr_start +
  716. (buf_info->paddr - pages->dma_pages[page_id].page_p_addr);
  717. return link_desc_va;
  718. }
  719. /**
  720. * dp_rx_cookie_2_mon_link_desc_va() - Converts cookie to a virtual address of
  721. * the MSDU Link Descriptor
  722. * @pdev: core txrx pdev context
  723. * @buf_info: buf_info includes cookie that used to lookup virtual address of
  724. * link descriptor. Normally this is just an index into a per pdev array.
  725. *
  726. * This is the VA of the link descriptor in monitor mode destination ring,
  727. * that HAL layer later uses to retrieve the list of MSDU's for a given MPDU.
  728. *
  729. * Return: void *: Virtual Address of the Rx descriptor
  730. */
  731. static inline
  732. void *dp_rx_cookie_2_mon_link_desc_va(struct dp_pdev *pdev,
  733. struct hal_buf_info *buf_info,
  734. int mac_id)
  735. {
  736. void *link_desc_va;
  737. struct qdf_mem_multi_page_t *pages;
  738. uint16_t page_id = LINK_DESC_COOKIE_PAGE_ID(buf_info->sw_cookie);
  739. pages = &pdev->soc->mon_link_desc_pages[mac_id];
  740. if (!pages)
  741. return NULL;
  742. if (qdf_unlikely(page_id >= pages->num_pages))
  743. return NULL;
  744. link_desc_va = pages->dma_pages[page_id].page_v_addr_start +
  745. (buf_info->paddr - pages->dma_pages[page_id].page_p_addr);
  746. return link_desc_va;
  747. }
  748. /**
  749. * dp_rx_defrag_concat() - Concatenate the fragments
  750. *
  751. * @dst: destination pointer to the buffer
  752. * @src: source pointer from where the fragment payload is to be copied
  753. *
  754. * Return: QDF_STATUS
  755. */
  756. static inline QDF_STATUS dp_rx_defrag_concat(qdf_nbuf_t dst, qdf_nbuf_t src)
  757. {
  758. /*
  759. * Inside qdf_nbuf_cat, if it is necessary to reallocate dst
  760. * to provide space for src, the headroom portion is copied from
  761. * the original dst buffer to the larger new dst buffer.
  762. * (This is needed, because the headroom of the dst buffer
  763. * contains the rx desc.)
  764. */
  765. if (!qdf_nbuf_cat(dst, src)) {
  766. /*
  767. * qdf_nbuf_cat does not free the src memory.
  768. * Free src nbuf before returning
  769. * For failure case the caller takes of freeing the nbuf
  770. */
  771. qdf_nbuf_free(src);
  772. return QDF_STATUS_SUCCESS;
  773. }
  774. return QDF_STATUS_E_DEFRAG_ERROR;
  775. }
  776. #ifndef FEATURE_WDS
  777. static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
  778. {
  779. return QDF_STATUS_SUCCESS;
  780. }
  781. static inline void
  782. dp_rx_wds_srcport_learn(struct dp_soc *soc,
  783. uint8_t *rx_tlv_hdr,
  784. struct dp_peer *ta_peer,
  785. qdf_nbuf_t nbuf,
  786. struct hal_rx_msdu_metadata msdu_metadata)
  787. {
  788. }
  789. #endif
  790. /*
  791. * dp_rx_desc_dump() - dump the sw rx descriptor
  792. *
  793. * @rx_desc: sw rx descriptor
  794. */
  795. static inline void dp_rx_desc_dump(struct dp_rx_desc *rx_desc)
  796. {
  797. dp_info("rx_desc->nbuf: %pK, rx_desc->cookie: %d, rx_desc->pool_id: %d, rx_desc->in_use: %d, rx_desc->unmapped: %d",
  798. rx_desc->nbuf, rx_desc->cookie, rx_desc->pool_id,
  799. rx_desc->in_use, rx_desc->unmapped);
  800. }
  801. /*
  802. * check_qwrap_multicast_loopback() - Check if rx packet is a loopback packet.
  803. * In qwrap mode, packets originated from
  804. * any vdev should not loopback and
  805. * should be dropped.
  806. * @vdev: vdev on which rx packet is received
  807. * @nbuf: rx pkt
  808. *
  809. */
  810. #if ATH_SUPPORT_WRAP
  811. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  812. qdf_nbuf_t nbuf)
  813. {
  814. struct dp_vdev *psta_vdev;
  815. struct dp_pdev *pdev = vdev->pdev;
  816. uint8_t *data = qdf_nbuf_data(nbuf);
  817. if (qdf_unlikely(vdev->proxysta_vdev)) {
  818. /* In qwrap isolation mode, allow loopback packets as all
  819. * packets go to RootAP and Loopback on the mpsta.
  820. */
  821. if (vdev->isolation_vdev)
  822. return false;
  823. TAILQ_FOREACH(psta_vdev, &pdev->vdev_list, vdev_list_elem) {
  824. if (qdf_unlikely(psta_vdev->proxysta_vdev &&
  825. !qdf_mem_cmp(psta_vdev->mac_addr.raw,
  826. &data[QDF_MAC_ADDR_SIZE],
  827. QDF_MAC_ADDR_SIZE))) {
  828. /* Drop packet if source address is equal to
  829. * any of the vdev addresses.
  830. */
  831. return true;
  832. }
  833. }
  834. }
  835. return false;
  836. }
  837. #else
  838. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  839. qdf_nbuf_t nbuf)
  840. {
  841. return false;
  842. }
  843. #endif
  844. #if defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) ||\
  845. defined(WLAN_SUPPORT_RX_TAG_STATISTICS) ||\
  846. defined(WLAN_SUPPORT_RX_FLOW_TAG)
  847. #include "dp_rx_tag.h"
  848. #endif
  849. #ifndef WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG
  850. /**
  851. * dp_rx_update_protocol_tag() - Reads CCE metadata from the RX MSDU end TLV
  852. * and set the corresponding tag in QDF packet
  853. * @soc: core txrx main context
  854. * @vdev: vdev on which the packet is received
  855. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  856. * @rx_tlv_hdr: rBbase address where the RX TLVs starts
  857. * @ring_index: REO ring number, not used for error & monitor ring
  858. * @is_reo_exception: flag to indicate if rx from REO ring or exception ring
  859. * @is_update_stats: flag to indicate whether to update stats or not
  860. * Return: void
  861. */
  862. static inline void
  863. dp_rx_update_protocol_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  864. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  865. uint16_t ring_index,
  866. bool is_reo_exception, bool is_update_stats)
  867. {
  868. }
  869. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG */
  870. #ifndef WLAN_SUPPORT_RX_FLOW_TAG
  871. /**
  872. * dp_rx_update_flow_tag() - Reads FSE metadata from the RX MSDU end TLV
  873. * and set the corresponding tag in QDF packet
  874. * @soc: core txrx main context
  875. * @vdev: vdev on which the packet is received
  876. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  877. * @rx_tlv_hdr: base address where the RX TLVs starts
  878. * @is_update_stats: flag to indicate whether to update stats or not
  879. *
  880. * Return: void
  881. */
  882. static inline void
  883. dp_rx_update_flow_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  884. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr, bool update_stats)
  885. {
  886. }
  887. #endif /* WLAN_SUPPORT_RX_FLOW_TAG */
  888. #if !defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) &&\
  889. !defined(WLAN_SUPPORT_RX_FLOW_TAG)
  890. /**
  891. * dp_rx_mon_update_protocol_flow_tag() - Performs necessary checks for monitor
  892. * mode and then tags appropriate packets
  893. * @soc: core txrx main context
  894. * @vdev: pdev on which packet is received
  895. * @msdu: QDF packet buffer on which the protocol tag should be set
  896. * @rx_desc: base address where the RX TLVs start
  897. * Return: void
  898. */
  899. static inline
  900. void dp_rx_mon_update_protocol_flow_tag(struct dp_soc *soc,
  901. struct dp_pdev *dp_pdev,
  902. qdf_nbuf_t msdu, void *rx_desc)
  903. {
  904. }
  905. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG || WLAN_SUPPORT_RX_FLOW_TAG */
  906. /*
  907. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  908. * called during dp rx initialization
  909. * and at the end of dp_rx_process.
  910. *
  911. * @soc: core txrx main context
  912. * @mac_id: mac_id which is one of 3 mac_ids
  913. * @dp_rxdma_srng: dp rxdma circular ring
  914. * @rx_desc_pool: Pointer to free Rx descriptor pool
  915. * @num_req_buffers: number of buffer to be replenished
  916. * @desc_list: list of descs if called from dp_rx_process
  917. * or NULL during dp rx initialization or out of buffer
  918. * interrupt.
  919. * @tail: tail of descs list
  920. * Return: return success or failure
  921. */
  922. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  923. struct dp_srng *dp_rxdma_srng,
  924. struct rx_desc_pool *rx_desc_pool,
  925. uint32_t num_req_buffers,
  926. union dp_rx_desc_list_elem_t **desc_list,
  927. union dp_rx_desc_list_elem_t **tail);
  928. /*
  929. * dp_pdev_rx_buffers_attach() - replenish rxdma ring with rx nbufs
  930. * called during dp rx initialization
  931. *
  932. * @soc: core txrx main context
  933. * @mac_id: mac_id which is one of 3 mac_ids
  934. * @dp_rxdma_srng: dp rxdma circular ring
  935. * @rx_desc_pool: Pointer to free Rx descriptor pool
  936. * @num_req_buffers: number of buffer to be replenished
  937. *
  938. * Return: return success or failure
  939. */
  940. QDF_STATUS
  941. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  942. struct dp_srng *dp_rxdma_srng,
  943. struct rx_desc_pool *rx_desc_pool,
  944. uint32_t num_req_buffers);
  945. /**
  946. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  947. * (WBM), following error handling
  948. *
  949. * @soc: core DP main context
  950. * @buf_addr_info: opaque pointer to the REO error ring descriptor
  951. * @buf_addr_info: void pointer to the buffer_addr_info
  952. * @bm_action: put to idle_list or release to msdu_list
  953. *
  954. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  955. */
  956. QDF_STATUS
  957. dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  958. uint8_t bm_action);
  959. /**
  960. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  961. * (WBM) by address
  962. *
  963. * @soc: core DP main context
  964. * @link_desc_addr: link descriptor addr
  965. *
  966. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  967. */
  968. QDF_STATUS
  969. dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
  970. hal_buff_addrinfo_t link_desc_addr,
  971. uint8_t bm_action);
  972. /**
  973. * dp_rxdma_err_process() - RxDMA error processing functionality
  974. * @soc: core txrx main contex
  975. * @mac_id: mac id which is one of 3 mac_ids
  976. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  977. * @quota: No. of units (packets) that can be serviced in one shot.
  978. *
  979. * Return: num of buffers processed
  980. */
  981. uint32_t
  982. dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  983. uint32_t mac_id, uint32_t quota);
  984. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  985. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  986. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  987. uint8_t *rx_tlv_hdr);
  988. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr, struct dp_vdev *vdev,
  989. struct dp_peer *peer);
  990. qdf_nbuf_t
  991. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev);
  992. /*
  993. * dp_rx_dump_info_and_assert() - dump RX Ring info and Rx Desc info
  994. *
  995. * @soc: core txrx main context
  996. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  997. * @ring_desc: opaque pointer to the RX ring descriptor
  998. * @rx_desc: host rs descriptor
  999. *
  1000. * Return: void
  1001. */
  1002. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  1003. hal_ring_handle_t hal_ring_hdl,
  1004. hal_ring_desc_t ring_desc,
  1005. struct dp_rx_desc *rx_desc);
  1006. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  1007. #ifdef RX_DESC_DEBUG_CHECK
  1008. /**
  1009. * dp_rx_desc_check_magic() - check the magic value in dp_rx_desc
  1010. * @rx_desc: rx descriptor pointer
  1011. *
  1012. * Return: true, if magic is correct, else false.
  1013. */
  1014. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1015. {
  1016. if (qdf_unlikely(rx_desc->magic != DP_RX_DESC_MAGIC))
  1017. return false;
  1018. rx_desc->magic = 0;
  1019. return true;
  1020. }
  1021. /**
  1022. * dp_rx_desc_prep() - prepare rx desc
  1023. * @rx_desc: rx descriptor pointer to be prepared
  1024. * @nbuf: nbuf to be associated with rx_desc
  1025. *
  1026. * Note: assumption is that we are associating a nbuf which is mapped
  1027. *
  1028. * Return: none
  1029. */
  1030. static inline void dp_rx_desc_prep(struct dp_rx_desc *rx_desc, qdf_nbuf_t nbuf)
  1031. {
  1032. rx_desc->magic = DP_RX_DESC_MAGIC;
  1033. rx_desc->nbuf = nbuf;
  1034. rx_desc->unmapped = 0;
  1035. }
  1036. #else
  1037. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1038. {
  1039. return true;
  1040. }
  1041. static inline void dp_rx_desc_prep(struct dp_rx_desc *rx_desc, qdf_nbuf_t nbuf)
  1042. {
  1043. rx_desc->nbuf = nbuf;
  1044. rx_desc->unmapped = 0;
  1045. }
  1046. #endif /* RX_DESC_DEBUG_CHECK */
  1047. void dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1048. uint8_t *rx_tlv_hdr, struct dp_peer *peer,
  1049. uint8_t err_code, uint8_t mac_id);
  1050. #ifndef QCA_MULTIPASS_SUPPORT
  1051. static inline
  1052. bool dp_rx_multipass_process(struct dp_peer *peer, qdf_nbuf_t nbuf, uint8_t tid)
  1053. {
  1054. return false;
  1055. }
  1056. #else
  1057. bool dp_rx_multipass_process(struct dp_peer *peer, qdf_nbuf_t nbuf,
  1058. uint8_t tid);
  1059. #endif
  1060. #ifndef WLAN_RX_PKT_CAPTURE_ENH
  1061. static inline
  1062. QDF_STATUS dp_peer_set_rx_capture_enabled(struct dp_pdev *pdev,
  1063. struct dp_peer *peer_handle,
  1064. bool value, uint8_t *mac_addr)
  1065. {
  1066. return QDF_STATUS_SUCCESS;
  1067. }
  1068. #endif
  1069. /**
  1070. * dp_rx_deliver_to_stack() - deliver pkts to network stack
  1071. * Caller to hold peer refcount and check for valid peer
  1072. * @soc: soc
  1073. * @vdev: vdev
  1074. * @peer: peer
  1075. * @nbuf_head: skb list head
  1076. * @nbuf_tail: skb list tail
  1077. *
  1078. * Return: None
  1079. */
  1080. void dp_rx_deliver_to_stack(struct dp_soc *soc,
  1081. struct dp_vdev *vdev,
  1082. struct dp_peer *peer,
  1083. qdf_nbuf_t nbuf_head,
  1084. qdf_nbuf_t nbuf_tail);
  1085. #ifdef QCA_OL_RX_LOCK_LESS_ACCESS
  1086. /*
  1087. * dp_rx_ring_access_start()- Wrapper function to log access start of a hal ring
  1088. * @int_ctx: pointer to DP interrupt context
  1089. * @dp_soc - DP soc structure pointer
  1090. * @hal_ring_hdl - HAL ring handle
  1091. *
  1092. * Return: 0 on success; error on failure
  1093. */
  1094. static inline int
  1095. dp_rx_srng_access_start(struct dp_intr *int_ctx, struct dp_soc *soc,
  1096. hal_ring_handle_t hal_ring_hdl)
  1097. {
  1098. return hal_srng_access_start_unlocked(soc->hal_soc, hal_ring_hdl);
  1099. }
  1100. /*
  1101. * dp_rx_ring_access_end()- Wrapper function to log access end of a hal ring
  1102. * @int_ctx: pointer to DP interrupt context
  1103. * @dp_soc - DP soc structure pointer
  1104. * @hal_ring_hdl - HAL ring handle
  1105. *
  1106. * Return - None
  1107. */
  1108. static inline void
  1109. dp_rx_srng_access_end(struct dp_intr *int_ctx, struct dp_soc *soc,
  1110. hal_ring_handle_t hal_ring_hdl)
  1111. {
  1112. hal_srng_access_end_unlocked(soc->hal_soc, hal_ring_hdl);
  1113. }
  1114. #else
  1115. static inline int
  1116. dp_rx_srng_access_start(struct dp_intr *int_ctx, struct dp_soc *soc,
  1117. hal_ring_handle_t hal_ring_hdl)
  1118. {
  1119. return dp_srng_access_start(int_ctx, soc, hal_ring_hdl);
  1120. }
  1121. static inline void
  1122. dp_rx_srng_access_end(struct dp_intr *int_ctx, struct dp_soc *soc,
  1123. hal_ring_handle_t hal_ring_hdl)
  1124. {
  1125. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1126. }
  1127. #endif
  1128. /*
  1129. * dp_rx_wbm_sg_list_reset() - Initialize sg list
  1130. *
  1131. * This api should be called at soc init and afterevery sg processing.
  1132. *@soc: DP SOC handle
  1133. */
  1134. static inline void dp_rx_wbm_sg_list_reset(struct dp_soc *soc)
  1135. {
  1136. if (soc) {
  1137. soc->wbm_sg_param.wbm_is_first_msdu_in_sg = false;
  1138. soc->wbm_sg_param.wbm_sg_nbuf_head = NULL;
  1139. soc->wbm_sg_param.wbm_sg_nbuf_tail = NULL;
  1140. soc->wbm_sg_param.wbm_sg_desc_msdu_len = 0;
  1141. }
  1142. }
  1143. /*
  1144. * dp_rx_wbm_sg_list_deinit() - De-initialize sg list
  1145. *
  1146. * This api should be called in down path, to avoid any leak.
  1147. *@soc: DP SOC handle
  1148. */
  1149. static inline void dp_rx_wbm_sg_list_deinit(struct dp_soc *soc)
  1150. {
  1151. if (soc) {
  1152. if (soc->wbm_sg_param.wbm_sg_nbuf_head)
  1153. qdf_nbuf_list_free(soc->wbm_sg_param.wbm_sg_nbuf_head);
  1154. dp_rx_wbm_sg_list_reset(soc);
  1155. }
  1156. }
  1157. #endif /* _DP_RX_H */