dp_rx.c 71 KB

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  1. /*
  2. * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #include "dp_ipa.h"
  31. #ifdef FEATURE_WDS
  32. #include "dp_txrx_wds.h"
  33. #endif
  34. #ifdef ATH_RX_PRI_SAVE
  35. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  36. (qdf_nbuf_set_priority(_nbuf, _tid))
  37. #else
  38. #define DP_RX_TID_SAVE(_nbuf, _tid)
  39. #endif
  40. #ifdef DP_RX_DISABLE_NDI_MDNS_FORWARDING
  41. static inline
  42. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  43. {
  44. if (ta_peer->vdev->opmode == wlan_op_mode_ndi &&
  45. qdf_nbuf_is_ipv6_mdns_pkt(nbuf)) {
  46. DP_STATS_INC(ta_peer, rx.intra_bss.mdns_no_fwd, 1);
  47. return false;
  48. }
  49. return true;
  50. }
  51. #else
  52. static inline
  53. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  54. {
  55. return true;
  56. }
  57. #endif
  58. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  59. {
  60. return vdev->ap_bridge_enabled;
  61. }
  62. #ifdef DUP_RX_DESC_WAR
  63. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  64. hal_ring_handle_t hal_ring,
  65. hal_ring_desc_t ring_desc,
  66. struct dp_rx_desc *rx_desc)
  67. {
  68. void *hal_soc = soc->hal_soc;
  69. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  70. dp_rx_desc_dump(rx_desc);
  71. }
  72. #else
  73. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  74. hal_ring_handle_t hal_ring_hdl,
  75. hal_ring_desc_t ring_desc,
  76. struct dp_rx_desc *rx_desc)
  77. {
  78. hal_soc_handle_t hal_soc = soc->hal_soc;
  79. dp_rx_desc_dump(rx_desc);
  80. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  81. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  82. qdf_assert_always(0);
  83. }
  84. #endif
  85. /*
  86. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  87. * called during dp rx initialization
  88. * and at the end of dp_rx_process.
  89. *
  90. * @soc: core txrx main context
  91. * @mac_id: mac_id which is one of 3 mac_ids
  92. * @dp_rxdma_srng: dp rxdma circular ring
  93. * @rx_desc_pool: Pointer to free Rx descriptor pool
  94. * @num_req_buffers: number of buffer to be replenished
  95. * @desc_list: list of descs if called from dp_rx_process
  96. * or NULL during dp rx initialization or out of buffer
  97. * interrupt.
  98. * @tail: tail of descs list
  99. * Return: return success or failure
  100. */
  101. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  102. struct dp_srng *dp_rxdma_srng,
  103. struct rx_desc_pool *rx_desc_pool,
  104. uint32_t num_req_buffers,
  105. union dp_rx_desc_list_elem_t **desc_list,
  106. union dp_rx_desc_list_elem_t **tail)
  107. {
  108. uint32_t num_alloc_desc;
  109. uint16_t num_desc_to_free = 0;
  110. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  111. uint32_t num_entries_avail;
  112. uint32_t count;
  113. int sync_hw_ptr = 1;
  114. qdf_dma_addr_t paddr;
  115. qdf_nbuf_t rx_netbuf;
  116. void *rxdma_ring_entry;
  117. union dp_rx_desc_list_elem_t *next;
  118. QDF_STATUS ret;
  119. void *rxdma_srng;
  120. rxdma_srng = dp_rxdma_srng->hal_srng;
  121. if (!rxdma_srng) {
  122. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  123. "rxdma srng not initialized");
  124. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  125. return QDF_STATUS_E_FAILURE;
  126. }
  127. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  128. "requested %d buffers for replenish", num_req_buffers);
  129. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  130. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  131. rxdma_srng,
  132. sync_hw_ptr);
  133. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  134. "no of available entries in rxdma ring: %d",
  135. num_entries_avail);
  136. if (!(*desc_list) && (num_entries_avail >
  137. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  138. num_req_buffers = num_entries_avail;
  139. } else if (num_entries_avail < num_req_buffers) {
  140. num_desc_to_free = num_req_buffers - num_entries_avail;
  141. num_req_buffers = num_entries_avail;
  142. }
  143. if (qdf_unlikely(!num_req_buffers)) {
  144. num_desc_to_free = num_req_buffers;
  145. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  146. goto free_descs;
  147. }
  148. /*
  149. * if desc_list is NULL, allocate the descs from freelist
  150. */
  151. if (!(*desc_list)) {
  152. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  153. rx_desc_pool,
  154. num_req_buffers,
  155. desc_list,
  156. tail);
  157. if (!num_alloc_desc) {
  158. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  159. "no free rx_descs in freelist");
  160. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  161. num_req_buffers);
  162. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  163. return QDF_STATUS_E_NOMEM;
  164. }
  165. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  166. "%d rx desc allocated", num_alloc_desc);
  167. num_req_buffers = num_alloc_desc;
  168. }
  169. count = 0;
  170. while (count < num_req_buffers) {
  171. rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  172. RX_BUFFER_SIZE,
  173. RX_BUFFER_RESERVATION,
  174. RX_BUFFER_ALIGNMENT,
  175. FALSE);
  176. if (qdf_unlikely(!rx_netbuf)) {
  177. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  178. break;
  179. }
  180. ret = qdf_nbuf_map_single(dp_soc->osdev, rx_netbuf,
  181. QDF_DMA_FROM_DEVICE);
  182. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  183. qdf_nbuf_free(rx_netbuf);
  184. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  185. continue;
  186. }
  187. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  188. /*
  189. * check if the physical address of nbuf->data is
  190. * less then 0x50000000 then free the nbuf and try
  191. * allocating new nbuf. We can try for 100 times.
  192. * this is a temp WAR till we fix it properly.
  193. */
  194. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, dp_pdev);
  195. if (ret == QDF_STATUS_E_FAILURE) {
  196. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  197. break;
  198. }
  199. count++;
  200. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  201. rxdma_srng);
  202. qdf_assert_always(rxdma_ring_entry);
  203. next = (*desc_list)->next;
  204. dp_rx_desc_prep(&((*desc_list)->rx_desc), rx_netbuf);
  205. /* rx_desc.in_use should be zero at this time*/
  206. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  207. (*desc_list)->rx_desc.in_use = 1;
  208. dp_verbose_debug("rx_netbuf=%pK, buf=%pK, paddr=0x%llx, cookie=%d",
  209. rx_netbuf, qdf_nbuf_data(rx_netbuf),
  210. (unsigned long long)paddr,
  211. (*desc_list)->rx_desc.cookie);
  212. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  213. (*desc_list)->rx_desc.cookie,
  214. rx_desc_pool->owner);
  215. *desc_list = next;
  216. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, rx_netbuf, true);
  217. }
  218. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  219. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  220. count, num_desc_to_free);
  221. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count,
  222. (RX_BUFFER_SIZE * count));
  223. free_descs:
  224. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  225. /*
  226. * add any available free desc back to the free list
  227. */
  228. if (*desc_list)
  229. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  230. mac_id, rx_desc_pool);
  231. return QDF_STATUS_SUCCESS;
  232. }
  233. /*
  234. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  235. * pkts to RAW mode simulation to
  236. * decapsulate the pkt.
  237. *
  238. * @vdev: vdev on which RAW mode is enabled
  239. * @nbuf_list: list of RAW pkts to process
  240. * @peer: peer object from which the pkt is rx
  241. *
  242. * Return: void
  243. */
  244. void
  245. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  246. struct dp_peer *peer)
  247. {
  248. qdf_nbuf_t deliver_list_head = NULL;
  249. qdf_nbuf_t deliver_list_tail = NULL;
  250. qdf_nbuf_t nbuf;
  251. nbuf = nbuf_list;
  252. while (nbuf) {
  253. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  254. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  255. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  256. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  257. /*
  258. * reset the chfrag_start and chfrag_end bits in nbuf cb
  259. * as this is a non-amsdu pkt and RAW mode simulation expects
  260. * these bit s to be 0 for non-amsdu pkt.
  261. */
  262. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  263. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  264. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  265. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  266. }
  267. nbuf = next;
  268. }
  269. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  270. &deliver_list_tail, (struct cdp_peer*) peer);
  271. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  272. }
  273. #ifdef DP_LFR
  274. /*
  275. * In case of LFR, data of a new peer might be sent up
  276. * even before peer is added.
  277. */
  278. static inline struct dp_vdev *
  279. dp_get_vdev_from_peer(struct dp_soc *soc,
  280. uint16_t peer_id,
  281. struct dp_peer *peer,
  282. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  283. {
  284. struct dp_vdev *vdev;
  285. uint8_t vdev_id;
  286. if (unlikely(!peer)) {
  287. if (peer_id != HTT_INVALID_PEER) {
  288. vdev_id = DP_PEER_METADATA_ID_GET(
  289. mpdu_desc_info.peer_meta_data);
  290. QDF_TRACE(QDF_MODULE_ID_DP,
  291. QDF_TRACE_LEVEL_DEBUG,
  292. FL("PeerID %d not found use vdevID %d"),
  293. peer_id, vdev_id);
  294. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  295. vdev_id);
  296. } else {
  297. QDF_TRACE(QDF_MODULE_ID_DP,
  298. QDF_TRACE_LEVEL_DEBUG,
  299. FL("Invalid PeerID %d"),
  300. peer_id);
  301. return NULL;
  302. }
  303. } else {
  304. vdev = peer->vdev;
  305. }
  306. return vdev;
  307. }
  308. #else
  309. static inline struct dp_vdev *
  310. dp_get_vdev_from_peer(struct dp_soc *soc,
  311. uint16_t peer_id,
  312. struct dp_peer *peer,
  313. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  314. {
  315. if (unlikely(!peer)) {
  316. QDF_TRACE(QDF_MODULE_ID_DP,
  317. QDF_TRACE_LEVEL_DEBUG,
  318. FL("Peer not found for peerID %d"),
  319. peer_id);
  320. return NULL;
  321. } else {
  322. return peer->vdev;
  323. }
  324. }
  325. #endif
  326. #ifndef FEATURE_WDS
  327. static void
  328. dp_rx_da_learn(struct dp_soc *soc,
  329. uint8_t *rx_tlv_hdr,
  330. struct dp_peer *ta_peer,
  331. qdf_nbuf_t nbuf)
  332. {
  333. }
  334. #endif
  335. /*
  336. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  337. *
  338. * @soc: core txrx main context
  339. * @ta_peer : source peer entry
  340. * @rx_tlv_hdr : start address of rx tlvs
  341. * @nbuf : nbuf that has to be intrabss forwarded
  342. *
  343. * Return: bool: true if it is forwarded else false
  344. */
  345. static bool
  346. dp_rx_intrabss_fwd(struct dp_soc *soc,
  347. struct dp_peer *ta_peer,
  348. uint8_t *rx_tlv_hdr,
  349. qdf_nbuf_t nbuf)
  350. {
  351. uint16_t da_idx;
  352. uint16_t len;
  353. uint8_t is_frag;
  354. struct dp_peer *da_peer;
  355. struct dp_ast_entry *ast_entry;
  356. qdf_nbuf_t nbuf_copy;
  357. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  358. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  359. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  360. tid_stats.tid_rx_stats[ring_id][tid];
  361. /* check if the destination peer is available in peer table
  362. * and also check if the source peer and destination peer
  363. * belong to the same vap and destination peer is not bss peer.
  364. */
  365. if ((qdf_nbuf_is_da_valid(nbuf) && !qdf_nbuf_is_da_mcbc(nbuf))) {
  366. da_idx = hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr);
  367. ast_entry = soc->ast_table[da_idx];
  368. if (!ast_entry)
  369. return false;
  370. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  371. ast_entry->is_active = TRUE;
  372. return false;
  373. }
  374. da_peer = ast_entry->peer;
  375. if (!da_peer)
  376. return false;
  377. /* TA peer cannot be same as peer(DA) on which AST is present
  378. * this indicates a change in topology and that AST entries
  379. * are yet to be updated.
  380. */
  381. if (da_peer == ta_peer)
  382. return false;
  383. if (da_peer->vdev == ta_peer->vdev && !da_peer->bss_peer) {
  384. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  385. is_frag = qdf_nbuf_is_frag(nbuf);
  386. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  387. /* linearize the nbuf just before we send to
  388. * dp_tx_send()
  389. */
  390. if (qdf_unlikely(is_frag)) {
  391. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  392. return false;
  393. nbuf = qdf_nbuf_unshare(nbuf);
  394. if (!nbuf) {
  395. DP_STATS_INC_PKT(ta_peer,
  396. rx.intra_bss.fail,
  397. 1,
  398. len);
  399. /* return true even though the pkt is
  400. * not forwarded. Basically skb_unshare
  401. * failed and we want to continue with
  402. * next nbuf.
  403. */
  404. tid_stats->fail_cnt[INTRABSS_DROP]++;
  405. return true;
  406. }
  407. }
  408. if (!dp_tx_send(dp_vdev_to_cdp_vdev(ta_peer->vdev),
  409. nbuf)) {
  410. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  411. len);
  412. return true;
  413. } else {
  414. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  415. len);
  416. tid_stats->fail_cnt[INTRABSS_DROP]++;
  417. return false;
  418. }
  419. }
  420. }
  421. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  422. * source, then clone the pkt and send the cloned pkt for
  423. * intra BSS forwarding and original pkt up the network stack
  424. * Note: how do we handle multicast pkts. do we forward
  425. * all multicast pkts as is or let a higher layer module
  426. * like igmpsnoop decide whether to forward or not with
  427. * Mcast enhancement.
  428. */
  429. else if (qdf_unlikely((qdf_nbuf_is_da_mcbc(nbuf) &&
  430. !ta_peer->bss_peer))) {
  431. if (!dp_rx_check_ndi_mdns_fwding(ta_peer, nbuf))
  432. goto end;
  433. nbuf_copy = qdf_nbuf_copy(nbuf);
  434. if (!nbuf_copy)
  435. goto end;
  436. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  437. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  438. if (dp_tx_send(dp_vdev_to_cdp_vdev(ta_peer->vdev), nbuf_copy)) {
  439. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  440. tid_stats->fail_cnt[INTRABSS_DROP]++;
  441. qdf_nbuf_free(nbuf_copy);
  442. } else {
  443. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  444. tid_stats->intrabss_cnt++;
  445. }
  446. }
  447. end:
  448. /* return false as we have to still send the original pkt
  449. * up the stack
  450. */
  451. return false;
  452. }
  453. #ifdef MESH_MODE_SUPPORT
  454. /**
  455. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  456. *
  457. * @vdev: DP Virtual device handle
  458. * @nbuf: Buffer pointer
  459. * @rx_tlv_hdr: start of rx tlv header
  460. * @peer: pointer to peer
  461. *
  462. * This function allocated memory for mesh receive stats and fill the
  463. * required stats. Stores the memory address in skb cb.
  464. *
  465. * Return: void
  466. */
  467. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  468. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  469. {
  470. struct mesh_recv_hdr_s *rx_info = NULL;
  471. uint32_t pkt_type;
  472. uint32_t nss;
  473. uint32_t rate_mcs;
  474. uint32_t bw;
  475. /* fill recv mesh stats */
  476. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  477. /* upper layers are resposible to free this memory */
  478. if (!rx_info) {
  479. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  480. "Memory allocation failed for mesh rx stats");
  481. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  482. return;
  483. }
  484. rx_info->rs_flags = MESH_RXHDR_VER1;
  485. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  486. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  487. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  488. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  489. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  490. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  491. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  492. if (vdev->osif_get_key)
  493. vdev->osif_get_key(vdev->osif_vdev,
  494. &rx_info->rs_decryptkey[0],
  495. &peer->mac_addr.raw[0],
  496. rx_info->rs_keyix);
  497. }
  498. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  499. rx_info->rs_channel = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  500. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  501. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  502. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  503. nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
  504. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  505. (bw << 24);
  506. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  507. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  508. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  509. rx_info->rs_flags,
  510. rx_info->rs_rssi,
  511. rx_info->rs_channel,
  512. rx_info->rs_ratephy1,
  513. rx_info->rs_keyix);
  514. }
  515. /**
  516. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  517. *
  518. * @vdev: DP Virtual device handle
  519. * @nbuf: Buffer pointer
  520. * @rx_tlv_hdr: start of rx tlv header
  521. *
  522. * This checks if the received packet is matching any filter out
  523. * catogery and and drop the packet if it matches.
  524. *
  525. * Return: status(0 indicates drop, 1 indicate to no drop)
  526. */
  527. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  528. uint8_t *rx_tlv_hdr)
  529. {
  530. union dp_align_mac_addr mac_addr;
  531. struct dp_soc *soc = vdev->pdev->soc;
  532. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  533. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  534. if (hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  535. rx_tlv_hdr))
  536. return QDF_STATUS_SUCCESS;
  537. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  538. if (hal_rx_mpdu_get_to_ds(soc->hal_soc,
  539. rx_tlv_hdr))
  540. return QDF_STATUS_SUCCESS;
  541. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  542. if (!hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  543. rx_tlv_hdr) &&
  544. !hal_rx_mpdu_get_to_ds(soc->hal_soc,
  545. rx_tlv_hdr))
  546. return QDF_STATUS_SUCCESS;
  547. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  548. if (hal_rx_mpdu_get_addr1(soc->hal_soc,
  549. rx_tlv_hdr,
  550. &mac_addr.raw[0]))
  551. return QDF_STATUS_E_FAILURE;
  552. if (!qdf_mem_cmp(&mac_addr.raw[0],
  553. &vdev->mac_addr.raw[0],
  554. QDF_MAC_ADDR_SIZE))
  555. return QDF_STATUS_SUCCESS;
  556. }
  557. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  558. if (hal_rx_mpdu_get_addr2(soc->hal_soc,
  559. rx_tlv_hdr,
  560. &mac_addr.raw[0]))
  561. return QDF_STATUS_E_FAILURE;
  562. if (!qdf_mem_cmp(&mac_addr.raw[0],
  563. &vdev->mac_addr.raw[0],
  564. QDF_MAC_ADDR_SIZE))
  565. return QDF_STATUS_SUCCESS;
  566. }
  567. }
  568. return QDF_STATUS_E_FAILURE;
  569. }
  570. #else
  571. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  572. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  573. {
  574. }
  575. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  576. uint8_t *rx_tlv_hdr)
  577. {
  578. return QDF_STATUS_E_FAILURE;
  579. }
  580. #endif
  581. #ifdef FEATURE_NAC_RSSI
  582. /**
  583. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  584. * clients
  585. * @pdev: DP pdev handle
  586. * @rx_pkt_hdr: Rx packet Header
  587. *
  588. * return: dp_vdev*
  589. */
  590. static
  591. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  592. uint8_t *rx_pkt_hdr)
  593. {
  594. struct ieee80211_frame *wh;
  595. struct dp_neighbour_peer *peer = NULL;
  596. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  597. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  598. return NULL;
  599. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  600. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  601. neighbour_peer_list_elem) {
  602. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  603. wh->i_addr2, QDF_MAC_ADDR_SIZE) == 0) {
  604. QDF_TRACE(
  605. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  606. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  607. peer->neighbour_peers_macaddr.raw[0],
  608. peer->neighbour_peers_macaddr.raw[1],
  609. peer->neighbour_peers_macaddr.raw[2],
  610. peer->neighbour_peers_macaddr.raw[3],
  611. peer->neighbour_peers_macaddr.raw[4],
  612. peer->neighbour_peers_macaddr.raw[5]);
  613. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  614. return pdev->monitor_vdev;
  615. }
  616. }
  617. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  618. return NULL;
  619. }
  620. /**
  621. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  622. * @soc: DP SOC handle
  623. * @mpdu: mpdu for which peer is invalid
  624. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  625. * pool_id has same mapping)
  626. *
  627. * return: integer type
  628. */
  629. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  630. uint8_t mac_id)
  631. {
  632. struct dp_invalid_peer_msg msg;
  633. struct dp_vdev *vdev = NULL;
  634. struct dp_pdev *pdev = NULL;
  635. struct ieee80211_frame *wh;
  636. qdf_nbuf_t curr_nbuf, next_nbuf;
  637. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  638. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  639. rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  640. if (!HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, rx_tlv_hdr)) {
  641. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  642. "Drop decapped frames");
  643. goto free;
  644. }
  645. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  646. if (!DP_FRAME_IS_DATA(wh)) {
  647. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  648. "NAWDS valid only for data frames");
  649. goto free;
  650. }
  651. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  652. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  653. "Invalid nbuf length");
  654. goto free;
  655. }
  656. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  657. if (!pdev || qdf_unlikely(pdev->is_pdev_down)) {
  658. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  659. "PDEV %s", !pdev ? "not found" : "down");
  660. goto free;
  661. }
  662. if (pdev->filter_neighbour_peers) {
  663. /* Next Hop scenario not yet handle */
  664. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  665. if (vdev) {
  666. dp_rx_mon_deliver(soc, pdev->pdev_id,
  667. pdev->invalid_peer_head_msdu,
  668. pdev->invalid_peer_tail_msdu);
  669. pdev->invalid_peer_head_msdu = NULL;
  670. pdev->invalid_peer_tail_msdu = NULL;
  671. return 0;
  672. }
  673. }
  674. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  675. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  676. QDF_MAC_ADDR_SIZE) == 0) {
  677. goto out;
  678. }
  679. }
  680. if (!vdev) {
  681. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  682. "VDEV not found");
  683. goto free;
  684. }
  685. out:
  686. msg.wh = wh;
  687. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  688. msg.nbuf = mpdu;
  689. msg.vdev_id = vdev->vdev_id;
  690. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  691. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(pdev->ctrl_pdev,
  692. &msg);
  693. free:
  694. /* Drop and free packet */
  695. curr_nbuf = mpdu;
  696. while (curr_nbuf) {
  697. next_nbuf = qdf_nbuf_next(curr_nbuf);
  698. qdf_nbuf_free(curr_nbuf);
  699. curr_nbuf = next_nbuf;
  700. }
  701. return 0;
  702. }
  703. /**
  704. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  705. * @soc: DP SOC handle
  706. * @mpdu: mpdu for which peer is invalid
  707. * @mpdu_done: if an mpdu is completed
  708. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  709. * pool_id has same mapping)
  710. *
  711. * return: integer type
  712. */
  713. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  714. qdf_nbuf_t mpdu, bool mpdu_done,
  715. uint8_t mac_id)
  716. {
  717. /* Only trigger the process when mpdu is completed */
  718. if (mpdu_done)
  719. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  720. }
  721. #else
  722. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  723. uint8_t mac_id)
  724. {
  725. qdf_nbuf_t curr_nbuf, next_nbuf;
  726. struct dp_pdev *pdev;
  727. struct dp_vdev *vdev = NULL;
  728. struct ieee80211_frame *wh;
  729. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  730. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  731. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  732. if (!DP_FRAME_IS_DATA(wh)) {
  733. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  734. "only for data frames");
  735. goto free;
  736. }
  737. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  738. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  739. "Invalid nbuf length");
  740. goto free;
  741. }
  742. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  743. if (!pdev) {
  744. QDF_TRACE(QDF_MODULE_ID_DP,
  745. QDF_TRACE_LEVEL_ERROR,
  746. "PDEV not found");
  747. goto free;
  748. }
  749. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  750. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  751. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  752. QDF_MAC_ADDR_SIZE) == 0) {
  753. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  754. goto out;
  755. }
  756. }
  757. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  758. if (!vdev) {
  759. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  760. "VDEV not found");
  761. goto free;
  762. }
  763. out:
  764. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  765. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  766. free:
  767. /* reset the head and tail pointers */
  768. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  769. if (pdev) {
  770. pdev->invalid_peer_head_msdu = NULL;
  771. pdev->invalid_peer_tail_msdu = NULL;
  772. }
  773. /* Drop and free packet */
  774. curr_nbuf = mpdu;
  775. while (curr_nbuf) {
  776. next_nbuf = qdf_nbuf_next(curr_nbuf);
  777. qdf_nbuf_free(curr_nbuf);
  778. curr_nbuf = next_nbuf;
  779. }
  780. return 0;
  781. }
  782. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  783. qdf_nbuf_t mpdu, bool mpdu_done,
  784. uint8_t mac_id)
  785. {
  786. /* Process the nbuf */
  787. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  788. }
  789. #endif
  790. #ifdef RECEIVE_OFFLOAD
  791. /**
  792. * dp_rx_print_offload_info() - Print offload info from RX TLV
  793. * @soc: dp soc handle
  794. * @rx_tlv: RX TLV for which offload information is to be printed
  795. *
  796. * Return: None
  797. */
  798. static void dp_rx_print_offload_info(struct dp_soc *soc, uint8_t *rx_tlv)
  799. {
  800. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  801. dp_verbose_debug("lro_eligible 0x%x", HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  802. dp_verbose_debug("pure_ack 0x%x", HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  803. dp_verbose_debug("chksum 0x%x", hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  804. rx_tlv));
  805. dp_verbose_debug("TCP seq num 0x%x", HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  806. dp_verbose_debug("TCP ack num 0x%x", HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  807. dp_verbose_debug("TCP window 0x%x", HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  808. dp_verbose_debug("TCP protocol 0x%x", HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  809. dp_verbose_debug("TCP offset 0x%x", HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  810. dp_verbose_debug("toeplitz 0x%x", HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  811. dp_verbose_debug("---------------------------------------------------------");
  812. }
  813. /**
  814. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  815. * @soc: DP SOC handle
  816. * @rx_tlv: RX TLV received for the msdu
  817. * @msdu: msdu for which GRO info needs to be filled
  818. * @rx_ol_pkt_cnt: counter to be incremented for GRO eligible packets
  819. *
  820. * Return: None
  821. */
  822. static
  823. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  824. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  825. {
  826. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  827. return;
  828. /* Filling up RX offload info only for TCP packets */
  829. if (!HAL_RX_TLV_GET_TCP_PROTO(rx_tlv))
  830. return;
  831. *rx_ol_pkt_cnt = *rx_ol_pkt_cnt + 1;
  832. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  833. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  834. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  835. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  836. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  837. hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  838. rx_tlv);
  839. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  840. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  841. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  842. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  843. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  844. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  845. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  846. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  847. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  848. HAL_RX_TLV_GET_IPV6(rx_tlv);
  849. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  850. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  851. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  852. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  853. dp_rx_print_offload_info(soc, rx_tlv);
  854. }
  855. #else
  856. static void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  857. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  858. {
  859. }
  860. #endif /* RECEIVE_OFFLOAD */
  861. /**
  862. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  863. *
  864. * @nbuf: pointer to msdu.
  865. * @mpdu_len: mpdu length
  866. *
  867. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  868. */
  869. static inline bool dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  870. {
  871. bool last_nbuf;
  872. if (*mpdu_len > (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  873. qdf_nbuf_set_pktlen(nbuf, RX_BUFFER_SIZE);
  874. last_nbuf = false;
  875. } else {
  876. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  877. last_nbuf = true;
  878. }
  879. *mpdu_len -= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  880. return last_nbuf;
  881. }
  882. /**
  883. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  884. * multiple nbufs.
  885. * @nbuf: pointer to the first msdu of an amsdu.
  886. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  887. *
  888. *
  889. * This function implements the creation of RX frag_list for cases
  890. * where an MSDU is spread across multiple nbufs.
  891. *
  892. * Return: returns the head nbuf which contains complete frag_list.
  893. */
  894. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  895. {
  896. qdf_nbuf_t parent, next, frag_list;
  897. uint16_t frag_list_len = 0;
  898. uint16_t mpdu_len;
  899. bool last_nbuf;
  900. mpdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  901. /*
  902. * this is a case where the complete msdu fits in one single nbuf.
  903. * in this case HW sets both start and end bit and we only need to
  904. * reset these bits for RAW mode simulator to decap the pkt
  905. */
  906. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  907. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  908. qdf_nbuf_set_pktlen(nbuf, mpdu_len + RX_PKT_TLVS_LEN);
  909. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  910. return nbuf;
  911. }
  912. /*
  913. * This is a case where we have multiple msdus (A-MSDU) spread across
  914. * multiple nbufs. here we create a fraglist out of these nbufs.
  915. *
  916. * the moment we encounter a nbuf with continuation bit set we
  917. * know for sure we have an MSDU which is spread across multiple
  918. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  919. */
  920. parent = nbuf;
  921. frag_list = nbuf->next;
  922. nbuf = nbuf->next;
  923. /*
  924. * set the start bit in the first nbuf we encounter with continuation
  925. * bit set. This has the proper mpdu length set as it is the first
  926. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  927. * nbufs will form the frag_list of the parent nbuf.
  928. */
  929. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  930. last_nbuf = dp_rx_adjust_nbuf_len(parent, &mpdu_len);
  931. /*
  932. * this is where we set the length of the fragments which are
  933. * associated to the parent nbuf. We iterate through the frag_list
  934. * till we hit the last_nbuf of the list.
  935. */
  936. do {
  937. last_nbuf = dp_rx_adjust_nbuf_len(nbuf, &mpdu_len);
  938. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  939. frag_list_len += qdf_nbuf_len(nbuf);
  940. if (last_nbuf) {
  941. next = nbuf->next;
  942. nbuf->next = NULL;
  943. break;
  944. }
  945. nbuf = nbuf->next;
  946. } while (!last_nbuf);
  947. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  948. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  949. parent->next = next;
  950. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  951. return parent;
  952. }
  953. /**
  954. * dp_rx_compute_delay() - Compute and fill in all timestamps
  955. * to pass in correct fields
  956. *
  957. * @vdev: pdev handle
  958. * @tx_desc: tx descriptor
  959. * @tid: tid value
  960. * Return: none
  961. */
  962. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  963. {
  964. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  965. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  966. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  967. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  968. uint32_t interframe_delay =
  969. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  970. dp_update_delay_stats(vdev->pdev, to_stack, tid,
  971. CDP_DELAY_STATS_REAP_STACK, ring_id);
  972. /*
  973. * Update interframe delay stats calculated at deliver_data_ol point.
  974. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  975. * interframe delay will not be calculate correctly for 1st frame.
  976. * On the other side, this will help in avoiding extra per packet check
  977. * of vdev->prev_rx_deliver_tstamp.
  978. */
  979. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  980. CDP_DELAY_STATS_RX_INTERFRAME, ring_id);
  981. vdev->prev_rx_deliver_tstamp = current_ts;
  982. }
  983. /**
  984. * dp_rx_drop_nbuf_list() - drop an nbuf list
  985. * @pdev: dp pdev reference
  986. * @buf_list: buffer list to be dropepd
  987. *
  988. * Return: int (number of bufs dropped)
  989. */
  990. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  991. qdf_nbuf_t buf_list)
  992. {
  993. struct cdp_tid_rx_stats *stats = NULL;
  994. uint8_t tid = 0, ring_id = 0;
  995. int num_dropped = 0;
  996. qdf_nbuf_t buf, next_buf;
  997. buf = buf_list;
  998. while (buf) {
  999. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  1000. next_buf = qdf_nbuf_queue_next(buf);
  1001. tid = qdf_nbuf_get_tid_val(buf);
  1002. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1003. stats->fail_cnt[INVALID_PEER_VDEV]++;
  1004. stats->delivered_to_stack--;
  1005. qdf_nbuf_free(buf);
  1006. buf = next_buf;
  1007. num_dropped++;
  1008. }
  1009. return num_dropped;
  1010. }
  1011. #ifdef PEER_CACHE_RX_PKTS
  1012. /**
  1013. * dp_rx_flush_rx_cached() - flush cached rx frames
  1014. * @peer: peer
  1015. * @drop: flag to drop frames or forward to net stack
  1016. *
  1017. * Return: None
  1018. */
  1019. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1020. {
  1021. struct dp_peer_cached_bufq *bufqi;
  1022. struct dp_rx_cached_buf *cache_buf = NULL;
  1023. ol_txrx_rx_fp data_rx = NULL;
  1024. int num_buff_elem;
  1025. QDF_STATUS status;
  1026. if (qdf_atomic_inc_return(&peer->flush_in_progress) > 1) {
  1027. qdf_atomic_dec(&peer->flush_in_progress);
  1028. return;
  1029. }
  1030. qdf_spin_lock_bh(&peer->peer_info_lock);
  1031. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1032. data_rx = peer->vdev->osif_rx;
  1033. else
  1034. drop = true;
  1035. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1036. bufqi = &peer->bufq_info;
  1037. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1038. qdf_list_remove_front(&bufqi->cached_bufq,
  1039. (qdf_list_node_t **)&cache_buf);
  1040. while (cache_buf) {
  1041. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1042. cache_buf->buf);
  1043. bufqi->entries -= num_buff_elem;
  1044. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1045. if (drop) {
  1046. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1047. cache_buf->buf);
  1048. } else {
  1049. /* Flush the cached frames to OSIF DEV */
  1050. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1051. if (status != QDF_STATUS_SUCCESS)
  1052. bufqi->dropped = dp_rx_drop_nbuf_list(
  1053. peer->vdev->pdev,
  1054. cache_buf->buf);
  1055. }
  1056. qdf_mem_free(cache_buf);
  1057. cache_buf = NULL;
  1058. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1059. qdf_list_remove_front(&bufqi->cached_bufq,
  1060. (qdf_list_node_t **)&cache_buf);
  1061. }
  1062. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1063. qdf_atomic_dec(&peer->flush_in_progress);
  1064. }
  1065. /**
  1066. * dp_rx_enqueue_rx() - cache rx frames
  1067. * @peer: peer
  1068. * @rx_buf_list: cache buffer list
  1069. *
  1070. * Return: None
  1071. */
  1072. static QDF_STATUS
  1073. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1074. {
  1075. struct dp_rx_cached_buf *cache_buf;
  1076. struct dp_peer_cached_bufq *bufqi = &peer->bufq_info;
  1077. int num_buff_elem;
  1078. QDF_TRACE_DEBUG_RL(QDF_MODULE_ID_TXRX, "bufq->curr %d bufq->drops %d",
  1079. bufqi->entries, bufqi->dropped);
  1080. if (!peer->valid) {
  1081. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1082. rx_buf_list);
  1083. return QDF_STATUS_E_INVAL;
  1084. }
  1085. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1086. if (bufqi->entries >= bufqi->thresh) {
  1087. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1088. rx_buf_list);
  1089. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1090. return QDF_STATUS_E_RESOURCES;
  1091. }
  1092. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1093. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1094. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1095. if (!cache_buf) {
  1096. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1097. "Failed to allocate buf to cache rx frames");
  1098. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1099. rx_buf_list);
  1100. return QDF_STATUS_E_NOMEM;
  1101. }
  1102. cache_buf->buf = rx_buf_list;
  1103. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1104. qdf_list_insert_back(&bufqi->cached_bufq,
  1105. &cache_buf->node);
  1106. bufqi->entries += num_buff_elem;
  1107. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1108. return QDF_STATUS_SUCCESS;
  1109. }
  1110. static inline
  1111. bool dp_rx_is_peer_cache_bufq_supported(void)
  1112. {
  1113. return true;
  1114. }
  1115. #else
  1116. static inline
  1117. bool dp_rx_is_peer_cache_bufq_supported(void)
  1118. {
  1119. return false;
  1120. }
  1121. static inline QDF_STATUS
  1122. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1123. {
  1124. return QDF_STATUS_SUCCESS;
  1125. }
  1126. #endif
  1127. static inline void dp_rx_deliver_to_stack(struct dp_vdev *vdev,
  1128. struct dp_peer *peer,
  1129. qdf_nbuf_t nbuf_head,
  1130. qdf_nbuf_t nbuf_tail)
  1131. {
  1132. /*
  1133. * highly unlikely to have a vdev without a registered rx
  1134. * callback function. if so let us free the nbuf_list.
  1135. */
  1136. if (qdf_unlikely(!vdev->osif_rx)) {
  1137. if (dp_rx_is_peer_cache_bufq_supported())
  1138. dp_rx_enqueue_rx(peer, nbuf_head);
  1139. else
  1140. dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1141. return;
  1142. }
  1143. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1144. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1145. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1146. &nbuf_tail, (struct cdp_peer *) peer);
  1147. }
  1148. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1149. }
  1150. /**
  1151. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1152. * @nbuf: pointer to the first msdu of an amsdu.
  1153. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1154. *
  1155. * The ipsumed field of the skb is set based on whether HW validated the
  1156. * IP/TCP/UDP checksum.
  1157. *
  1158. * Return: void
  1159. */
  1160. static inline void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1161. qdf_nbuf_t nbuf,
  1162. uint8_t *rx_tlv_hdr)
  1163. {
  1164. qdf_nbuf_rx_cksum_t cksum = {0};
  1165. bool ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  1166. bool tcp_udp_csum_er = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  1167. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1168. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1169. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1170. } else {
  1171. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1172. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1173. }
  1174. }
  1175. /**
  1176. * dp_rx_msdu_stats_update() - update per msdu stats.
  1177. * @soc: core txrx main context
  1178. * @nbuf: pointer to the first msdu of an amsdu.
  1179. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1180. * @peer: pointer to the peer object.
  1181. * @ring_id: reo dest ring number on which pkt is reaped.
  1182. * @tid_stats: per tid rx stats.
  1183. *
  1184. * update all the per msdu stats for that nbuf.
  1185. * Return: void
  1186. */
  1187. static void dp_rx_msdu_stats_update(struct dp_soc *soc,
  1188. qdf_nbuf_t nbuf,
  1189. uint8_t *rx_tlv_hdr,
  1190. struct dp_peer *peer,
  1191. uint8_t ring_id,
  1192. struct cdp_tid_rx_stats *tid_stats)
  1193. {
  1194. bool is_ampdu, is_not_amsdu;
  1195. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1196. struct dp_vdev *vdev = peer->vdev;
  1197. qdf_ether_header_t *eh;
  1198. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1199. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1200. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1201. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1202. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1203. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1204. DP_STATS_INCC(peer, rx.rx_retries, 1, qdf_nbuf_is_rx_retry_flag(nbuf));
  1205. tid_stats->msdu_cnt++;
  1206. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  1207. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1208. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1209. DP_STATS_INC_PKT(peer, rx.multicast, 1, msdu_len);
  1210. tid_stats->mcast_msdu_cnt++;
  1211. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1212. DP_STATS_INC_PKT(peer, rx.bcast, 1, msdu_len);
  1213. tid_stats->bcast_msdu_cnt++;
  1214. }
  1215. }
  1216. /*
  1217. * currently we can return from here as we have similar stats
  1218. * updated at per ppdu level instead of msdu level
  1219. */
  1220. if (!soc->process_rx_status)
  1221. return;
  1222. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(rx_tlv_hdr);
  1223. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1224. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1225. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  1226. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  1227. tid = qdf_nbuf_get_tid_val(nbuf);
  1228. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1229. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1230. rx_tlv_hdr);
  1231. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1232. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1233. DP_STATS_INC(peer, rx.bw[bw], 1);
  1234. /*
  1235. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1236. * then increase index [nss - 1] in array counter.
  1237. */
  1238. if (nss > 0 && (pkt_type == DOT11_N ||
  1239. pkt_type == DOT11_AC ||
  1240. pkt_type == DOT11_AX))
  1241. DP_STATS_INC(peer, rx.nss[nss - 1], 1);
  1242. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1243. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1244. hal_rx_mpdu_end_mic_err_get(rx_tlv_hdr));
  1245. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1246. hal_rx_mpdu_end_decrypt_err_get(rx_tlv_hdr));
  1247. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1248. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1249. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1250. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1251. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1252. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1253. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1254. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1255. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1256. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1257. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1258. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1259. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1260. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1261. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1262. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1263. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1264. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1265. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1266. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1267. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1268. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1269. if ((soc->process_rx_status) &&
  1270. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1271. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  1272. if (!vdev->pdev)
  1273. return;
  1274. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  1275. &peer->stats, peer->peer_ids[0],
  1276. UPDATE_PEER_STATS,
  1277. vdev->pdev->pdev_id);
  1278. #endif
  1279. }
  1280. }
  1281. static inline bool is_sa_da_idx_valid(struct dp_soc *soc,
  1282. uint8_t *rx_tlv_hdr,
  1283. qdf_nbuf_t nbuf)
  1284. {
  1285. if ((qdf_nbuf_is_sa_valid(nbuf) &&
  1286. (hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr) >
  1287. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) ||
  1288. (!qdf_nbuf_is_da_mcbc(nbuf) &&
  1289. qdf_nbuf_is_da_valid(nbuf) &&
  1290. (hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr) >
  1291. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))))
  1292. return false;
  1293. return true;
  1294. }
  1295. #ifndef WDS_VENDOR_EXTENSION
  1296. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  1297. struct dp_vdev *vdev,
  1298. struct dp_peer *peer)
  1299. {
  1300. return 1;
  1301. }
  1302. #endif
  1303. #ifdef RX_DESC_DEBUG_CHECK
  1304. /**
  1305. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  1306. * corruption
  1307. *
  1308. * @ring_desc: REO ring descriptor
  1309. * @rx_desc: Rx descriptor
  1310. *
  1311. * Return: NONE
  1312. */
  1313. static inline
  1314. void dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1315. struct dp_rx_desc *rx_desc)
  1316. {
  1317. struct hal_buf_info hbi;
  1318. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1319. /* Sanity check for possible buffer paddr corruption */
  1320. qdf_assert_always((&hbi)->paddr ==
  1321. qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  1322. }
  1323. #else
  1324. static inline
  1325. void dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1326. struct dp_rx_desc *rx_desc)
  1327. {
  1328. }
  1329. #endif
  1330. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1331. static inline
  1332. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1333. {
  1334. bool limit_hit = false;
  1335. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1336. limit_hit =
  1337. (num_reaped >= cfg->rx_reap_loop_pkt_limit) ? true : false;
  1338. if (limit_hit)
  1339. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1340. return limit_hit;
  1341. }
  1342. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1343. {
  1344. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1345. }
  1346. #else
  1347. static inline
  1348. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1349. {
  1350. return false;
  1351. }
  1352. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1353. {
  1354. return false;
  1355. }
  1356. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1357. /**
  1358. * dp_is_special_data() - check is the pkt special like eapol, dhcp, etc
  1359. *
  1360. * @nbuf: pkt skb pointer
  1361. *
  1362. * Return: true if matched, false if not
  1363. */
  1364. static inline
  1365. bool dp_is_special_data(qdf_nbuf_t nbuf)
  1366. {
  1367. if (qdf_nbuf_is_ipv4_arp_pkt(nbuf) ||
  1368. qdf_nbuf_is_ipv4_dhcp_pkt(nbuf) ||
  1369. qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  1370. qdf_nbuf_is_ipv6_dhcp_pkt(nbuf))
  1371. return true;
  1372. else
  1373. return false;
  1374. }
  1375. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  1376. /**
  1377. * dp_rx_deliver_to_stack_no_peer() - try deliver rx data even if
  1378. * no corresbonding peer found
  1379. * @soc: core txrx main context
  1380. * @nbuf: pkt skb pointer
  1381. *
  1382. * This function will try to deliver some RX special frames to stack
  1383. * even there is no peer matched found. for instance, LFR case, some
  1384. * eapol data will be sent to host before peer_map done.
  1385. *
  1386. * Return: None
  1387. */
  1388. static inline
  1389. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1390. {
  1391. uint32_t peer_mdata;
  1392. uint16_t peer_id;
  1393. uint8_t vdev_id;
  1394. struct dp_vdev *vdev;
  1395. uint32_t l2_hdr_offset = 0;
  1396. uint16_t msdu_len = 0;
  1397. uint32_t pkt_len = 0;
  1398. uint8_t *rx_tlv_hdr;
  1399. peer_mdata = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1400. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1401. if (peer_id > soc->max_peers)
  1402. goto deliver_fail;
  1403. vdev_id = DP_PEER_METADATA_ID_GET(peer_mdata);
  1404. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc, vdev_id);
  1405. if (!vdev || !vdev->osif_rx)
  1406. goto deliver_fail;
  1407. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1408. l2_hdr_offset =
  1409. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  1410. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1411. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1412. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  1413. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1414. } else {
  1415. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1416. qdf_nbuf_pull_head(nbuf,
  1417. RX_PKT_TLVS_LEN +
  1418. l2_hdr_offset);
  1419. }
  1420. /* only allow special frames */
  1421. if (!dp_is_special_data(nbuf))
  1422. goto deliver_fail;
  1423. vdev->osif_rx(vdev->osif_vdev, nbuf);
  1424. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  1425. return;
  1426. deliver_fail:
  1427. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1428. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1429. qdf_nbuf_free(nbuf);
  1430. }
  1431. #else
  1432. static inline
  1433. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1434. {
  1435. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1436. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1437. qdf_nbuf_free(nbuf);
  1438. }
  1439. #endif
  1440. /**
  1441. * dp_rx_srng_get_num_pending() - get number of pending entries
  1442. * @hal_soc: hal soc opaque pointer
  1443. * @hal_ring: opaque pointer to the HAL Rx Ring
  1444. * @num_entries: number of entries in the hal_ring.
  1445. * @near_full: pointer to a boolean. This is set if ring is near full.
  1446. *
  1447. * The function returns the number of entries in a destination ring which are
  1448. * yet to be reaped. The function also checks if the ring is near full.
  1449. * If more than half of the ring needs to be reaped, the ring is considered
  1450. * approaching full.
  1451. * The function useses hal_srng_dst_num_valid_locked to get the number of valid
  1452. * entries. It should not be called within a SRNG lock. HW pointer value is
  1453. * synced into cached_hp.
  1454. *
  1455. * Return: Number of pending entries if any
  1456. */
  1457. static
  1458. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  1459. hal_ring_handle_t hal_ring_hdl,
  1460. uint32_t num_entries,
  1461. bool *near_full)
  1462. {
  1463. uint32_t num_pending = 0;
  1464. num_pending = hal_srng_dst_num_valid_locked(hal_soc,
  1465. hal_ring_hdl,
  1466. true);
  1467. if (num_entries && (num_pending >= num_entries >> 1))
  1468. *near_full = true;
  1469. else
  1470. *near_full = false;
  1471. return num_pending;
  1472. }
  1473. /**
  1474. * dp_rx_process() - Brain of the Rx processing functionality
  1475. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1476. * @int_ctx: per interrupt context
  1477. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1478. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  1479. * @quota: No. of units (packets) that can be serviced in one shot.
  1480. *
  1481. * This function implements the core of Rx functionality. This is
  1482. * expected to handle only non-error frames.
  1483. *
  1484. * Return: uint32_t: No. of elements processed
  1485. */
  1486. uint32_t dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  1487. uint8_t reo_ring_num, uint32_t quota)
  1488. {
  1489. hal_ring_desc_t ring_desc;
  1490. hal_soc_handle_t hal_soc;
  1491. struct dp_rx_desc *rx_desc = NULL;
  1492. qdf_nbuf_t nbuf, next;
  1493. bool near_full;
  1494. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  1495. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  1496. uint32_t num_pending;
  1497. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  1498. uint32_t l2_hdr_offset = 0;
  1499. uint16_t msdu_len = 0;
  1500. uint16_t peer_id;
  1501. struct dp_peer *peer;
  1502. struct dp_vdev *vdev;
  1503. uint32_t pkt_len = 0;
  1504. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1505. struct hal_rx_msdu_desc_info msdu_desc_info;
  1506. enum hal_reo_error_status error;
  1507. uint32_t peer_mdata;
  1508. uint8_t *rx_tlv_hdr;
  1509. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  1510. uint8_t mac_id = 0;
  1511. struct dp_pdev *pdev;
  1512. struct dp_pdev *rx_pdev;
  1513. struct dp_srng *dp_rxdma_srng;
  1514. struct rx_desc_pool *rx_desc_pool;
  1515. struct dp_soc *soc = int_ctx->soc;
  1516. uint8_t ring_id = 0;
  1517. uint8_t core_id = 0;
  1518. struct cdp_tid_rx_stats *tid_stats;
  1519. qdf_nbuf_t nbuf_head;
  1520. qdf_nbuf_t nbuf_tail;
  1521. qdf_nbuf_t deliver_list_head;
  1522. qdf_nbuf_t deliver_list_tail;
  1523. uint32_t num_rx_bufs_reaped = 0;
  1524. uint32_t intr_id;
  1525. struct hif_opaque_softc *scn;
  1526. int32_t tid = 0;
  1527. bool is_prev_msdu_last = true;
  1528. uint32_t num_entries_avail = 0;
  1529. uint32_t rx_ol_pkt_cnt = 0;
  1530. uint32_t num_entries = 0;
  1531. DP_HIST_INIT();
  1532. qdf_assert_always(soc && hal_ring_hdl);
  1533. hal_soc = soc->hal_soc;
  1534. qdf_assert_always(hal_soc);
  1535. scn = soc->hif_handle;
  1536. hif_pm_runtime_mark_dp_rx_busy(scn);
  1537. intr_id = int_ctx->dp_intr_id;
  1538. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  1539. more_data:
  1540. /* reset local variables here to be re-used in the function */
  1541. nbuf_head = NULL;
  1542. nbuf_tail = NULL;
  1543. deliver_list_head = NULL;
  1544. deliver_list_tail = NULL;
  1545. peer = NULL;
  1546. vdev = NULL;
  1547. num_rx_bufs_reaped = 0;
  1548. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  1549. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  1550. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  1551. qdf_mem_zero(head, sizeof(head));
  1552. qdf_mem_zero(tail, sizeof(tail));
  1553. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1554. /*
  1555. * Need API to convert from hal_ring pointer to
  1556. * Ring Type / Ring Id combo
  1557. */
  1558. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1559. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1560. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  1561. goto done;
  1562. }
  1563. /*
  1564. * start reaping the buffers from reo ring and queue
  1565. * them in per vdev queue.
  1566. * Process the received pkts in a different per vdev loop.
  1567. */
  1568. while (qdf_likely(quota &&
  1569. (ring_desc = hal_srng_dst_peek(hal_soc,
  1570. hal_ring_hdl)))) {
  1571. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  1572. ring_id = hal_srng_ring_id_get(hal_ring_hdl);
  1573. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  1574. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1575. FL("HAL RING 0x%pK:error %d"), hal_ring_hdl, error);
  1576. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  1577. /* Don't know how to deal with this -- assert */
  1578. qdf_assert(0);
  1579. }
  1580. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  1581. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  1582. qdf_assert(rx_desc);
  1583. /*
  1584. * this is a unlikely scenario where the host is reaping
  1585. * a descriptor which it already reaped just a while ago
  1586. * but is yet to replenish it back to HW.
  1587. * In this case host will dump the last 128 descriptors
  1588. * including the software descriptor rx_desc and assert.
  1589. */
  1590. if (qdf_unlikely(!rx_desc->in_use)) {
  1591. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1592. dp_info_rl("Reaping rx_desc not in use!");
  1593. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1594. ring_desc, rx_desc);
  1595. /* ignore duplicate RX desc and continue to process */
  1596. /* Pop out the descriptor */
  1597. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1598. continue;
  1599. }
  1600. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  1601. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  1602. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  1603. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1604. ring_desc, rx_desc);
  1605. }
  1606. dp_rx_desc_nbuf_sanity_check(ring_desc, rx_desc);
  1607. /* TODO */
  1608. /*
  1609. * Need a separate API for unmapping based on
  1610. * phyiscal address
  1611. */
  1612. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  1613. QDF_DMA_FROM_DEVICE);
  1614. rx_desc->unmapped = 1;
  1615. core_id = smp_processor_id();
  1616. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  1617. /* Get MPDU DESC info */
  1618. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  1619. /* Get MSDU DESC info */
  1620. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  1621. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_RETRY_BIT)
  1622. qdf_nbuf_set_rx_retry_flag(rx_desc->nbuf, 1);
  1623. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  1624. HAL_MPDU_F_RAW_AMPDU)) {
  1625. /* previous msdu has end bit set, so current one is
  1626. * the new MPDU
  1627. */
  1628. if (is_prev_msdu_last) {
  1629. is_prev_msdu_last = false;
  1630. /* Get number of entries available in HW ring */
  1631. num_entries_avail =
  1632. hal_srng_dst_num_valid(hal_soc,
  1633. hal_ring_hdl, 1);
  1634. /* For new MPDU check if we can read complete
  1635. * MPDU by comparing the number of buffers
  1636. * available and number of buffers needed to
  1637. * reap this MPDU
  1638. */
  1639. if (((msdu_desc_info.msdu_len /
  1640. (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN) + 1)) >
  1641. num_entries_avail)
  1642. break;
  1643. } else {
  1644. if (msdu_desc_info.msdu_flags &
  1645. HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1646. is_prev_msdu_last = true;
  1647. }
  1648. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  1649. }
  1650. /* Pop out the descriptor*/
  1651. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1652. rx_bufs_reaped[rx_desc->pool_id]++;
  1653. peer_mdata = mpdu_desc_info.peer_meta_data;
  1654. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  1655. DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1656. /*
  1657. * save msdu flags first, last and continuation msdu in
  1658. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  1659. * length to nbuf->cb. This ensures the info required for
  1660. * per pkt processing is always in the same cache line.
  1661. * This helps in improving throughput for smaller pkt
  1662. * sizes.
  1663. */
  1664. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  1665. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  1666. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  1667. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  1668. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1669. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  1670. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  1671. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  1672. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  1673. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  1674. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  1675. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  1676. qdf_nbuf_set_tid_val(rx_desc->nbuf,
  1677. HAL_RX_REO_QUEUE_NUMBER_GET(ring_desc));
  1678. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  1679. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  1680. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, rx_desc->nbuf);
  1681. /*
  1682. * if continuation bit is set then we have MSDU spread
  1683. * across multiple buffers, let us not decrement quota
  1684. * till we reap all buffers of that MSDU.
  1685. */
  1686. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  1687. quota -= 1;
  1688. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  1689. &tail[rx_desc->pool_id],
  1690. rx_desc);
  1691. num_rx_bufs_reaped++;
  1692. if (dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped))
  1693. break;
  1694. }
  1695. done:
  1696. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1697. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1698. /*
  1699. * continue with next mac_id if no pkts were reaped
  1700. * from that pool
  1701. */
  1702. if (!rx_bufs_reaped[mac_id])
  1703. continue;
  1704. pdev = soc->pdev_list[mac_id];
  1705. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1706. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1707. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1708. rx_desc_pool, rx_bufs_reaped[mac_id],
  1709. &head[mac_id], &tail[mac_id]);
  1710. }
  1711. dp_verbose_debug("replenished %u\n", rx_bufs_reaped[0]);
  1712. /* Peer can be NULL is case of LFR */
  1713. if (qdf_likely(peer))
  1714. vdev = NULL;
  1715. /*
  1716. * BIG loop where each nbuf is dequeued from global queue,
  1717. * processed and queued back on a per vdev basis. These nbufs
  1718. * are sent to stack as and when we run out of nbufs
  1719. * or a new nbuf dequeued from global queue has a different
  1720. * vdev when compared to previous nbuf.
  1721. */
  1722. nbuf = nbuf_head;
  1723. while (nbuf) {
  1724. next = nbuf->next;
  1725. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1726. /* Get TID from struct cb->tid_val, save to tid */
  1727. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  1728. tid = qdf_nbuf_get_tid_val(nbuf);
  1729. peer_mdata = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1730. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1731. peer = dp_peer_find_by_id(soc, peer_id);
  1732. if (peer) {
  1733. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  1734. qdf_dp_trace_set_track(nbuf, QDF_RX);
  1735. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  1736. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  1737. QDF_NBUF_RX_PKT_DATA_TRACK;
  1738. }
  1739. rx_bufs_used++;
  1740. if (deliver_list_head && peer && (vdev != peer->vdev)) {
  1741. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1742. deliver_list_tail);
  1743. deliver_list_head = NULL;
  1744. deliver_list_tail = NULL;
  1745. }
  1746. if (qdf_likely(peer)) {
  1747. vdev = peer->vdev;
  1748. } else {
  1749. nbuf->next = NULL;
  1750. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  1751. nbuf = next;
  1752. continue;
  1753. }
  1754. if (qdf_unlikely(!vdev)) {
  1755. qdf_nbuf_free(nbuf);
  1756. nbuf = next;
  1757. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1758. dp_peer_unref_del_find_by_id(peer);
  1759. continue;
  1760. }
  1761. rx_pdev = vdev->pdev;
  1762. DP_RX_TID_SAVE(nbuf, tid);
  1763. if (qdf_unlikely(rx_pdev->delay_stats_flag))
  1764. qdf_nbuf_set_timestamp(nbuf);
  1765. ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1766. tid_stats =
  1767. &rx_pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1768. /*
  1769. * Check if DMA completed -- msdu_done is the last bit
  1770. * to be written
  1771. */
  1772. if (qdf_unlikely(!qdf_nbuf_is_raw_frame(nbuf) &&
  1773. !hal_rx_attn_msdu_done_get(rx_tlv_hdr))) {
  1774. dp_err("MSDU DONE failure");
  1775. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  1776. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  1777. QDF_TRACE_LEVEL_INFO);
  1778. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  1779. qdf_nbuf_free(nbuf);
  1780. qdf_assert(0);
  1781. nbuf = next;
  1782. continue;
  1783. }
  1784. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  1785. /*
  1786. * First IF condition:
  1787. * 802.11 Fragmented pkts are reinjected to REO
  1788. * HW block as SG pkts and for these pkts we only
  1789. * need to pull the RX TLVS header length.
  1790. * Second IF condition:
  1791. * The below condition happens when an MSDU is spread
  1792. * across multiple buffers. This can happen in two cases
  1793. * 1. The nbuf size is smaller then the received msdu.
  1794. * ex: we have set the nbuf size to 2048 during
  1795. * nbuf_alloc. but we received an msdu which is
  1796. * 2304 bytes in size then this msdu is spread
  1797. * across 2 nbufs.
  1798. *
  1799. * 2. AMSDUs when RAW mode is enabled.
  1800. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  1801. * across 1st nbuf and 2nd nbuf and last MSDU is
  1802. * spread across 2nd nbuf and 3rd nbuf.
  1803. *
  1804. * for these scenarios let us create a skb frag_list and
  1805. * append these buffers till the last MSDU of the AMSDU
  1806. * Third condition:
  1807. * This is the most likely case, we receive 802.3 pkts
  1808. * decapsulated by HW, here we need to set the pkt length.
  1809. */
  1810. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  1811. bool is_mcbc, is_sa_vld, is_da_vld;
  1812. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1813. rx_tlv_hdr);
  1814. is_sa_vld =
  1815. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  1816. rx_tlv_hdr);
  1817. is_da_vld =
  1818. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  1819. rx_tlv_hdr);
  1820. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  1821. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  1822. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  1823. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1824. } else if (qdf_nbuf_is_raw_frame(nbuf)) {
  1825. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1826. nbuf = dp_rx_sg_create(nbuf, rx_tlv_hdr);
  1827. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  1828. DP_STATS_INC_PKT(peer, rx.raw, 1, msdu_len);
  1829. next = nbuf->next;
  1830. } else {
  1831. l2_hdr_offset =
  1832. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc,
  1833. rx_tlv_hdr);
  1834. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1835. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1836. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1837. qdf_nbuf_pull_head(nbuf,
  1838. RX_PKT_TLVS_LEN +
  1839. l2_hdr_offset);
  1840. }
  1841. /*
  1842. * process frame for mulitpass phrase processing
  1843. */
  1844. if (qdf_unlikely(vdev->multipass_en)) {
  1845. dp_rx_multipass_process(peer, nbuf, tid);
  1846. }
  1847. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  1848. QDF_TRACE(QDF_MODULE_ID_DP,
  1849. QDF_TRACE_LEVEL_ERROR,
  1850. FL("Policy Check Drop pkt"));
  1851. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  1852. /* Drop & free packet */
  1853. qdf_nbuf_free(nbuf);
  1854. /* Statistics */
  1855. nbuf = next;
  1856. dp_peer_unref_del_find_by_id(peer);
  1857. continue;
  1858. }
  1859. if (qdf_unlikely(peer && (peer->nawds_enabled) &&
  1860. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  1861. (hal_rx_get_mpdu_mac_ad4_valid(soc->hal_soc,
  1862. rx_tlv_hdr) ==
  1863. false))) {
  1864. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  1865. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  1866. qdf_nbuf_free(nbuf);
  1867. nbuf = next;
  1868. dp_peer_unref_del_find_by_id(peer);
  1869. continue;
  1870. }
  1871. if (soc->process_rx_status)
  1872. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  1873. /* Update the protocol tag in SKB based on CCE metadata */
  1874. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1875. reo_ring_num, false, true);
  1876. /* Update the flow tag in SKB based on FSE metadata */
  1877. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  1878. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer,
  1879. ring_id, tid_stats);
  1880. if (qdf_unlikely(vdev->mesh_vdev)) {
  1881. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  1882. == QDF_STATUS_SUCCESS) {
  1883. QDF_TRACE(QDF_MODULE_ID_DP,
  1884. QDF_TRACE_LEVEL_INFO_MED,
  1885. FL("mesh pkt filtered"));
  1886. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  1887. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  1888. 1);
  1889. qdf_nbuf_free(nbuf);
  1890. nbuf = next;
  1891. dp_peer_unref_del_find_by_id(peer);
  1892. continue;
  1893. }
  1894. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  1895. }
  1896. if (qdf_likely(vdev->rx_decap_type ==
  1897. htt_cmn_pkt_type_ethernet) &&
  1898. qdf_likely(!vdev->mesh_vdev)) {
  1899. /* WDS Destination Address Learning */
  1900. dp_rx_da_learn(soc, rx_tlv_hdr, peer, nbuf);
  1901. /* Due to HW issue, sometimes we see that the sa_idx
  1902. * and da_idx are invalid with sa_valid and da_valid
  1903. * bits set
  1904. *
  1905. * in this case we also see that value of
  1906. * sa_sw_peer_id is set as 0
  1907. *
  1908. * Drop the packet if sa_idx and da_idx OOB or
  1909. * sa_sw_peerid is 0
  1910. */
  1911. if (!is_sa_da_idx_valid(soc, rx_tlv_hdr, nbuf)) {
  1912. qdf_nbuf_free(nbuf);
  1913. nbuf = next;
  1914. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1915. dp_peer_unref_del_find_by_id(peer);
  1916. continue;
  1917. }
  1918. /* WDS Source Port Learning */
  1919. if (qdf_likely(vdev->wds_enabled))
  1920. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr,
  1921. peer, nbuf);
  1922. /* Intrabss-fwd */
  1923. if (dp_rx_check_ap_bridge(vdev))
  1924. if (dp_rx_intrabss_fwd(soc,
  1925. peer,
  1926. rx_tlv_hdr,
  1927. nbuf)) {
  1928. nbuf = next;
  1929. dp_peer_unref_del_find_by_id(peer);
  1930. tid_stats->intrabss_cnt++;
  1931. continue; /* Get next desc */
  1932. }
  1933. }
  1934. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  1935. DP_RX_LIST_APPEND(deliver_list_head,
  1936. deliver_list_tail,
  1937. nbuf);
  1938. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  1939. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1940. tid_stats->delivered_to_stack++;
  1941. nbuf = next;
  1942. dp_peer_unref_del_find_by_id(peer);
  1943. }
  1944. if (deliver_list_head && peer)
  1945. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1946. deliver_list_tail);
  1947. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  1948. if (quota) {
  1949. num_pending =
  1950. dp_rx_srng_get_num_pending(hal_soc,
  1951. hal_ring_hdl,
  1952. num_entries,
  1953. &near_full);
  1954. if (num_pending) {
  1955. DP_STATS_INC(soc, rx.hp_oos2, 1);
  1956. if (!hif_exec_should_yield(scn, intr_id))
  1957. goto more_data;
  1958. if (qdf_unlikely(near_full)) {
  1959. DP_STATS_INC(soc, rx.near_full, 1);
  1960. goto more_data;
  1961. }
  1962. }
  1963. }
  1964. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  1965. vdev->osif_gro_flush(vdev->osif_vdev,
  1966. reo_ring_num);
  1967. }
  1968. }
  1969. /* Update histogram statistics by looping through pdev's */
  1970. DP_RX_HIST_STATS_PER_PDEV();
  1971. return rx_bufs_used; /* Assume no scale factor for now */
  1972. }
  1973. /**
  1974. * dp_rx_detach() - detach dp rx
  1975. * @pdev: core txrx pdev context
  1976. *
  1977. * This function will detach DP RX into main device context
  1978. * will free DP Rx resources.
  1979. *
  1980. * Return: void
  1981. */
  1982. void
  1983. dp_rx_pdev_detach(struct dp_pdev *pdev)
  1984. {
  1985. uint8_t pdev_id = pdev->pdev_id;
  1986. struct dp_soc *soc = pdev->soc;
  1987. struct rx_desc_pool *rx_desc_pool;
  1988. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1989. if (rx_desc_pool->pool_size != 0) {
  1990. if (!dp_is_soc_reinit(soc))
  1991. dp_rx_desc_nbuf_and_pool_free(soc, pdev_id,
  1992. rx_desc_pool);
  1993. else
  1994. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  1995. }
  1996. return;
  1997. }
  1998. static QDF_STATUS
  1999. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc, qdf_nbuf_t *nbuf,
  2000. struct dp_pdev *dp_pdev)
  2001. {
  2002. qdf_dma_addr_t paddr;
  2003. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  2004. *nbuf = qdf_nbuf_alloc(dp_soc->osdev, RX_BUFFER_SIZE,
  2005. RX_BUFFER_RESERVATION, RX_BUFFER_ALIGNMENT,
  2006. FALSE);
  2007. if (!(*nbuf)) {
  2008. dp_err("nbuf alloc failed");
  2009. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  2010. return ret;
  2011. }
  2012. ret = qdf_nbuf_map_single(dp_soc->osdev, *nbuf,
  2013. QDF_DMA_FROM_DEVICE);
  2014. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2015. qdf_nbuf_free(*nbuf);
  2016. dp_err("nbuf map failed");
  2017. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  2018. return ret;
  2019. }
  2020. paddr = qdf_nbuf_get_frag_paddr(*nbuf, 0);
  2021. ret = check_x86_paddr(dp_soc, nbuf, &paddr, dp_pdev);
  2022. if (ret == QDF_STATUS_E_FAILURE) {
  2023. qdf_nbuf_unmap_single(dp_soc->osdev, *nbuf,
  2024. QDF_DMA_FROM_DEVICE);
  2025. qdf_nbuf_free(*nbuf);
  2026. dp_err("nbuf check x86 failed");
  2027. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  2028. return ret;
  2029. }
  2030. return QDF_STATUS_SUCCESS;
  2031. }
  2032. QDF_STATUS
  2033. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  2034. struct dp_srng *dp_rxdma_srng,
  2035. struct rx_desc_pool *rx_desc_pool,
  2036. uint32_t num_req_buffers)
  2037. {
  2038. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  2039. hal_ring_handle_t rxdma_srng = dp_rxdma_srng->hal_srng;
  2040. union dp_rx_desc_list_elem_t *next;
  2041. void *rxdma_ring_entry;
  2042. qdf_dma_addr_t paddr;
  2043. qdf_nbuf_t *rx_nbuf_arr;
  2044. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  2045. uint32_t buffer_index, nbuf_ptrs_per_page;
  2046. qdf_nbuf_t nbuf;
  2047. QDF_STATUS ret;
  2048. int page_idx, total_pages;
  2049. union dp_rx_desc_list_elem_t *desc_list = NULL;
  2050. union dp_rx_desc_list_elem_t *tail = NULL;
  2051. if (qdf_unlikely(!rxdma_srng)) {
  2052. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2053. return QDF_STATUS_E_FAILURE;
  2054. }
  2055. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  2056. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  2057. num_req_buffers, &desc_list, &tail);
  2058. if (!nr_descs) {
  2059. dp_err("no free rx_descs in freelist");
  2060. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  2061. return QDF_STATUS_E_NOMEM;
  2062. }
  2063. dp_debug("got %u RX descs for driver attach", nr_descs);
  2064. /*
  2065. * Try to allocate pointers to the nbuf one page at a time.
  2066. * Take pointers that can fit in one page of memory and
  2067. * iterate through the total descriptors that need to be
  2068. * allocated in order of pages. Reuse the pointers that
  2069. * have been allocated to fit in one page across each
  2070. * iteration to index into the nbuf.
  2071. */
  2072. total_pages = (nr_descs * sizeof(*rx_nbuf_arr)) / PAGE_SIZE;
  2073. /*
  2074. * Add an extra page to store the remainder if any
  2075. */
  2076. if ((nr_descs * sizeof(*rx_nbuf_arr)) % PAGE_SIZE)
  2077. total_pages++;
  2078. rx_nbuf_arr = qdf_mem_malloc(PAGE_SIZE);
  2079. if (!rx_nbuf_arr) {
  2080. dp_err("failed to allocate nbuf array");
  2081. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2082. QDF_BUG(0);
  2083. return QDF_STATUS_E_NOMEM;
  2084. }
  2085. nbuf_ptrs_per_page = PAGE_SIZE / sizeof(*rx_nbuf_arr);
  2086. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  2087. qdf_mem_zero(rx_nbuf_arr, PAGE_SIZE);
  2088. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  2089. /*
  2090. * The last page of buffer pointers may not be required
  2091. * completely based on the number of descriptors. Below
  2092. * check will ensure we are allocating only the
  2093. * required number of descriptors.
  2094. */
  2095. if (nr_nbuf_total >= nr_descs)
  2096. break;
  2097. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  2098. &rx_nbuf_arr[nr_nbuf],
  2099. dp_pdev);
  2100. if (QDF_IS_STATUS_ERROR(ret))
  2101. break;
  2102. nr_nbuf_total++;
  2103. }
  2104. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2105. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  2106. rxdma_ring_entry =
  2107. hal_srng_src_get_next(dp_soc->hal_soc,
  2108. rxdma_srng);
  2109. qdf_assert_always(rxdma_ring_entry);
  2110. next = desc_list->next;
  2111. nbuf = rx_nbuf_arr[buffer_index];
  2112. paddr = qdf_nbuf_get_frag_paddr(nbuf, 0);
  2113. dp_rx_desc_prep(&desc_list->rx_desc, nbuf);
  2114. desc_list->rx_desc.in_use = 1;
  2115. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  2116. desc_list->rx_desc.cookie,
  2117. rx_desc_pool->owner);
  2118. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, nbuf, true);
  2119. desc_list = next;
  2120. }
  2121. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2122. }
  2123. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2124. qdf_mem_free(rx_nbuf_arr);
  2125. if (!nr_nbuf_total) {
  2126. dp_err("No nbuf's allocated");
  2127. QDF_BUG(0);
  2128. return QDF_STATUS_E_RESOURCES;
  2129. }
  2130. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf,
  2131. RX_BUFFER_SIZE * nr_nbuf_total);
  2132. return QDF_STATUS_SUCCESS;
  2133. }
  2134. /**
  2135. * dp_rx_attach() - attach DP RX
  2136. * @pdev: core txrx pdev context
  2137. *
  2138. * This function will attach a DP RX instance into the main
  2139. * device (SOC) context. Will allocate dp rx resource and
  2140. * initialize resources.
  2141. *
  2142. * Return: QDF_STATUS_SUCCESS: success
  2143. * QDF_STATUS_E_RESOURCES: Error return
  2144. */
  2145. QDF_STATUS
  2146. dp_rx_pdev_attach(struct dp_pdev *pdev)
  2147. {
  2148. uint8_t pdev_id = pdev->pdev_id;
  2149. struct dp_soc *soc = pdev->soc;
  2150. uint32_t rxdma_entries;
  2151. uint32_t rx_sw_desc_weight;
  2152. struct dp_srng *dp_rxdma_srng;
  2153. struct rx_desc_pool *rx_desc_pool;
  2154. QDF_STATUS ret_val;
  2155. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2156. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2157. "nss-wifi<4> skip Rx refil %d", pdev_id);
  2158. return QDF_STATUS_SUCCESS;
  2159. }
  2160. pdev = soc->pdev_list[pdev_id];
  2161. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  2162. rxdma_entries = dp_rxdma_srng->num_entries;
  2163. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2164. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  2165. rx_sw_desc_weight = wlan_cfg_get_dp_soc_rx_sw_desc_weight(soc->wlan_cfg_ctx);
  2166. dp_rx_desc_pool_alloc(soc, pdev_id,
  2167. rx_sw_desc_weight * rxdma_entries,
  2168. rx_desc_pool);
  2169. rx_desc_pool->owner = DP_WBM2SW_RBM;
  2170. /* For Rx buffers, WBM release ring is SW RING 3,for all pdev's */
  2171. ret_val = dp_rx_fst_attach(soc, pdev);
  2172. if ((ret_val != QDF_STATUS_SUCCESS) &&
  2173. (ret_val != QDF_STATUS_E_NOSUPPORT)) {
  2174. QDF_TRACE(QDF_MODULE_ID_ANY, QDF_TRACE_LEVEL_ERROR,
  2175. "RX Flow Search Table attach failed: pdev %d err %d",
  2176. pdev_id, ret_val);
  2177. return ret_val;
  2178. }
  2179. return dp_pdev_rx_buffers_attach(soc, pdev_id, dp_rxdma_srng,
  2180. rx_desc_pool, rxdma_entries - 1);
  2181. }
  2182. /*
  2183. * dp_rx_nbuf_prepare() - prepare RX nbuf
  2184. * @soc: core txrx main context
  2185. * @pdev: core txrx pdev context
  2186. *
  2187. * This function alloc & map nbuf for RX dma usage, retry it if failed
  2188. * until retry times reaches max threshold or succeeded.
  2189. *
  2190. * Return: qdf_nbuf_t pointer if succeeded, NULL if failed.
  2191. */
  2192. qdf_nbuf_t
  2193. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev)
  2194. {
  2195. uint8_t *buf;
  2196. int32_t nbuf_retry_count;
  2197. QDF_STATUS ret;
  2198. qdf_nbuf_t nbuf = NULL;
  2199. for (nbuf_retry_count = 0; nbuf_retry_count <
  2200. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD;
  2201. nbuf_retry_count++) {
  2202. /* Allocate a new skb */
  2203. nbuf = qdf_nbuf_alloc(soc->osdev,
  2204. RX_BUFFER_SIZE,
  2205. RX_BUFFER_RESERVATION,
  2206. RX_BUFFER_ALIGNMENT,
  2207. FALSE);
  2208. if (!nbuf) {
  2209. DP_STATS_INC(pdev,
  2210. replenish.nbuf_alloc_fail, 1);
  2211. continue;
  2212. }
  2213. buf = qdf_nbuf_data(nbuf);
  2214. memset(buf, 0, RX_BUFFER_SIZE);
  2215. ret = qdf_nbuf_map_single(soc->osdev, nbuf,
  2216. QDF_DMA_FROM_DEVICE);
  2217. /* nbuf map failed */
  2218. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2219. qdf_nbuf_free(nbuf);
  2220. DP_STATS_INC(pdev, replenish.map_err, 1);
  2221. continue;
  2222. }
  2223. /* qdf_nbuf alloc and map succeeded */
  2224. break;
  2225. }
  2226. /* qdf_nbuf still alloc or map failed */
  2227. if (qdf_unlikely(nbuf_retry_count >=
  2228. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD))
  2229. return NULL;
  2230. return nbuf;
  2231. }