dp_be_rx.c 62 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "cdp_txrx_cmn_struct.h"
  20. #include "hal_hw_headers.h"
  21. #include "dp_types.h"
  22. #include "dp_rx.h"
  23. #include "dp_tx.h"
  24. #include "dp_be_rx.h"
  25. #include "dp_peer.h"
  26. #include "hal_rx.h"
  27. #include "hal_be_rx.h"
  28. #include "hal_api.h"
  29. #include "hal_be_api.h"
  30. #include "qdf_nbuf.h"
  31. #ifdef MESH_MODE_SUPPORT
  32. #include "if_meta_hdr.h"
  33. #endif
  34. #include "dp_internal.h"
  35. #include "dp_ipa.h"
  36. #ifdef FEATURE_WDS
  37. #include "dp_txrx_wds.h"
  38. #endif
  39. #include "dp_hist.h"
  40. #include "dp_rx_buffer_pool.h"
  41. #ifdef WLAN_SUPPORT_RX_FLOW_TAG
  42. static inline void
  43. dp_rx_update_flow_info(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  44. {
  45. /* Set the flow idx valid flag only when there is no timeout */
  46. if (hal_rx_msdu_flow_idx_timeout_be(rx_tlv_hdr))
  47. return;
  48. qdf_nbuf_set_rx_flow_idx_valid(nbuf,
  49. !hal_rx_msdu_flow_idx_invalid_be(rx_tlv_hdr));
  50. }
  51. #else
  52. static inline void
  53. dp_rx_update_flow_info(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  54. {
  55. }
  56. #endif
  57. #ifndef AST_OFFLOAD_ENABLE
  58. static void
  59. dp_rx_wds_learn(struct dp_soc *soc,
  60. struct dp_vdev *vdev,
  61. uint8_t *rx_tlv_hdr,
  62. struct dp_txrx_peer *txrx_peer,
  63. qdf_nbuf_t nbuf)
  64. {
  65. struct hal_rx_msdu_metadata msdu_metadata;
  66. hal_rx_msdu_packet_metadata_get_generic_be(rx_tlv_hdr, &msdu_metadata);
  67. /* WDS Source Port Learning */
  68. if (qdf_likely(vdev->wds_enabled))
  69. dp_rx_wds_srcport_learn(soc,
  70. rx_tlv_hdr,
  71. txrx_peer,
  72. nbuf,
  73. msdu_metadata);
  74. }
  75. #else
  76. #ifdef QCA_SUPPORT_WDS_EXTENDED
  77. /**
  78. * dp_wds_ext_peer_learn_be() - function to send event to control
  79. * path on receiving 1st 4-address frame from backhaul.
  80. * @soc: DP soc
  81. * @ta_txrx_peer: WDS repeater txrx peer
  82. * @rx_tlv_hdr: start address of rx tlvs
  83. * @nbuf: RX packet buffer
  84. *
  85. * Return: void
  86. */
  87. static inline void dp_wds_ext_peer_learn_be(struct dp_soc *soc,
  88. struct dp_txrx_peer *ta_txrx_peer,
  89. uint8_t *rx_tlv_hdr,
  90. qdf_nbuf_t nbuf)
  91. {
  92. uint8_t wds_ext_src_mac[QDF_MAC_ADDR_SIZE];
  93. struct dp_peer *ta_base_peer;
  94. /* instead of checking addr4 is valid or not in per packet path
  95. * check for init bit, which will be set on reception of
  96. * first addr4 valid packet.
  97. */
  98. if (!ta_txrx_peer->vdev->wds_ext_enabled ||
  99. qdf_atomic_test_bit(WDS_EXT_PEER_INIT_BIT,
  100. &ta_txrx_peer->wds_ext.init))
  101. return;
  102. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  103. (qdf_nbuf_is_fr_ds_set(nbuf) && qdf_nbuf_is_to_ds_set(nbuf))) {
  104. qdf_atomic_test_and_set_bit(WDS_EXT_PEER_INIT_BIT,
  105. &ta_txrx_peer->wds_ext.init);
  106. if (qdf_unlikely(ta_txrx_peer->nawds_enabled &&
  107. ta_txrx_peer->mld_peer)) {
  108. ta_base_peer = dp_get_primary_link_peer_by_id(
  109. soc,
  110. ta_txrx_peer->peer_id,
  111. DP_MOD_ID_RX);
  112. } else {
  113. ta_base_peer = dp_peer_get_ref_by_id(
  114. soc,
  115. ta_txrx_peer->peer_id,
  116. DP_MOD_ID_RX);
  117. }
  118. if (!ta_base_peer)
  119. return;
  120. qdf_mem_copy(wds_ext_src_mac, &ta_base_peer->mac_addr.raw[0],
  121. QDF_MAC_ADDR_SIZE);
  122. dp_peer_unref_delete(ta_base_peer, DP_MOD_ID_RX);
  123. soc->cdp_soc.ol_ops->rx_wds_ext_peer_learn(
  124. soc->ctrl_psoc,
  125. ta_txrx_peer->peer_id,
  126. ta_txrx_peer->vdev->vdev_id,
  127. wds_ext_src_mac);
  128. }
  129. }
  130. #else
  131. static inline void dp_wds_ext_peer_learn_be(struct dp_soc *soc,
  132. struct dp_txrx_peer *ta_txrx_peer,
  133. uint8_t *rx_tlv_hdr,
  134. qdf_nbuf_t nbuf)
  135. {
  136. }
  137. #endif
  138. static void
  139. dp_rx_wds_learn(struct dp_soc *soc,
  140. struct dp_vdev *vdev,
  141. uint8_t *rx_tlv_hdr,
  142. struct dp_txrx_peer *ta_txrx_peer,
  143. qdf_nbuf_t nbuf)
  144. {
  145. dp_wds_ext_peer_learn_be(soc, ta_txrx_peer, rx_tlv_hdr, nbuf);
  146. }
  147. #endif
  148. uint32_t dp_rx_process_be(struct dp_intr *int_ctx,
  149. hal_ring_handle_t hal_ring_hdl, uint8_t reo_ring_num,
  150. uint32_t quota)
  151. {
  152. hal_ring_desc_t ring_desc;
  153. hal_ring_desc_t last_prefetched_hw_desc;
  154. hal_soc_handle_t hal_soc;
  155. struct dp_rx_desc *rx_desc = NULL;
  156. struct dp_rx_desc *last_prefetched_sw_desc = NULL;
  157. qdf_nbuf_t nbuf, next;
  158. bool near_full;
  159. union dp_rx_desc_list_elem_t *head[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  160. union dp_rx_desc_list_elem_t *tail[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  161. uint32_t num_pending = 0;
  162. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  163. uint16_t msdu_len = 0;
  164. uint16_t peer_id;
  165. uint8_t vdev_id;
  166. struct dp_txrx_peer *txrx_peer;
  167. dp_txrx_ref_handle txrx_ref_handle = NULL;
  168. struct dp_vdev *vdev;
  169. uint32_t pkt_len = 0;
  170. enum hal_reo_error_status error;
  171. uint8_t *rx_tlv_hdr;
  172. uint32_t rx_bufs_reaped[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  173. uint8_t mac_id = 0;
  174. struct dp_pdev *rx_pdev;
  175. bool enh_flag;
  176. struct dp_srng *dp_rxdma_srng;
  177. struct rx_desc_pool *rx_desc_pool;
  178. struct dp_soc *soc = int_ctx->soc;
  179. struct cdp_tid_rx_stats *tid_stats;
  180. qdf_nbuf_t nbuf_head;
  181. qdf_nbuf_t nbuf_tail;
  182. qdf_nbuf_t deliver_list_head;
  183. qdf_nbuf_t deliver_list_tail;
  184. uint32_t num_rx_bufs_reaped = 0;
  185. uint32_t intr_id;
  186. struct hif_opaque_softc *scn;
  187. int32_t tid = 0;
  188. bool is_prev_msdu_last = true;
  189. uint32_t num_entries_avail = 0;
  190. uint32_t rx_ol_pkt_cnt = 0;
  191. uint32_t num_entries = 0;
  192. QDF_STATUS status;
  193. qdf_nbuf_t ebuf_head;
  194. qdf_nbuf_t ebuf_tail;
  195. uint8_t pkt_capture_offload = 0;
  196. struct dp_srng *rx_ring = &soc->reo_dest_ring[reo_ring_num];
  197. int max_reap_limit, ring_near_full;
  198. struct dp_soc *replenish_soc;
  199. uint8_t chip_id;
  200. uint64_t current_time = 0;
  201. uint32_t old_tid;
  202. uint32_t peer_ext_stats;
  203. uint32_t dsf;
  204. uint32_t l3_pad;
  205. uint8_t link_id = 0;
  206. DP_HIST_INIT();
  207. qdf_assert_always(soc && hal_ring_hdl);
  208. hal_soc = soc->hal_soc;
  209. qdf_assert_always(hal_soc);
  210. scn = soc->hif_handle;
  211. intr_id = int_ctx->dp_intr_id;
  212. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  213. dp_runtime_pm_mark_last_busy(soc);
  214. more_data:
  215. /* reset local variables here to be re-used in the function */
  216. nbuf_head = NULL;
  217. nbuf_tail = NULL;
  218. deliver_list_head = NULL;
  219. deliver_list_tail = NULL;
  220. txrx_peer = NULL;
  221. vdev = NULL;
  222. num_rx_bufs_reaped = 0;
  223. ebuf_head = NULL;
  224. ebuf_tail = NULL;
  225. ring_near_full = 0;
  226. max_reap_limit = dp_rx_get_loop_pkt_limit(soc);
  227. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  228. qdf_mem_zero(head, sizeof(head));
  229. qdf_mem_zero(tail, sizeof(tail));
  230. old_tid = 0xff;
  231. dsf = 0;
  232. peer_ext_stats = 0;
  233. rx_pdev = NULL;
  234. tid_stats = NULL;
  235. dp_pkt_get_timestamp(&current_time);
  236. ring_near_full = _dp_srng_test_and_update_nf_params(soc, rx_ring,
  237. &max_reap_limit);
  238. peer_ext_stats = wlan_cfg_is_peer_ext_stats_enabled(soc->wlan_cfg_ctx);
  239. if (qdf_unlikely(dp_rx_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  240. /*
  241. * Need API to convert from hal_ring pointer to
  242. * Ring Type / Ring Id combo
  243. */
  244. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  245. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  246. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  247. goto done;
  248. }
  249. hal_srng_update_ring_usage_wm_no_lock(soc->hal_soc, hal_ring_hdl);
  250. if (!num_pending)
  251. num_pending = hal_srng_dst_num_valid(hal_soc, hal_ring_hdl, 0);
  252. if (num_pending > quota)
  253. num_pending = quota;
  254. dp_srng_dst_inv_cached_descs(soc, hal_ring_hdl, num_pending);
  255. last_prefetched_hw_desc = dp_srng_dst_prefetch_32_byte_desc(hal_soc,
  256. hal_ring_hdl,
  257. num_pending);
  258. /*
  259. * start reaping the buffers from reo ring and queue
  260. * them in per vdev queue.
  261. * Process the received pkts in a different per vdev loop.
  262. */
  263. while (qdf_likely(num_pending)) {
  264. ring_desc = dp_srng_dst_get_next(soc, hal_ring_hdl);
  265. if (qdf_unlikely(!ring_desc))
  266. break;
  267. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  268. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  269. dp_rx_err("%pK: HAL RING 0x%pK:error %d",
  270. soc, hal_ring_hdl, error);
  271. DP_STATS_INC(soc, rx.err.hal_reo_error[reo_ring_num],
  272. 1);
  273. /* Don't know how to deal with this -- assert */
  274. qdf_assert(0);
  275. }
  276. dp_rx_ring_record_entry(soc, reo_ring_num, ring_desc);
  277. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  278. status = dp_rx_cookie_check_and_invalidate(ring_desc);
  279. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  280. DP_STATS_INC(soc, rx.err.stale_cookie, 1);
  281. break;
  282. }
  283. rx_desc = (struct dp_rx_desc *)
  284. hal_rx_get_reo_desc_va(ring_desc);
  285. dp_rx_desc_sw_cc_check(soc, rx_buf_cookie, &rx_desc);
  286. status = dp_rx_desc_sanity(soc, hal_soc, hal_ring_hdl,
  287. ring_desc, rx_desc);
  288. if (QDF_IS_STATUS_ERROR(status)) {
  289. if (qdf_unlikely(rx_desc && rx_desc->nbuf)) {
  290. qdf_assert_always(!rx_desc->unmapped);
  291. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  292. rx_desc->unmapped = 1;
  293. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  294. rx_desc->pool_id);
  295. dp_rx_add_to_free_desc_list(
  296. &head[rx_desc->chip_id][rx_desc->pool_id],
  297. &tail[rx_desc->chip_id][rx_desc->pool_id],
  298. rx_desc);
  299. }
  300. continue;
  301. }
  302. /*
  303. * this is a unlikely scenario where the host is reaping
  304. * a descriptor which it already reaped just a while ago
  305. * but is yet to replenish it back to HW.
  306. * In this case host will dump the last 128 descriptors
  307. * including the software descriptor rx_desc and assert.
  308. */
  309. if (qdf_unlikely(!rx_desc->in_use)) {
  310. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  311. dp_info_rl("Reaping rx_desc not in use!");
  312. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  313. ring_desc, rx_desc);
  314. continue;
  315. }
  316. status = dp_rx_desc_nbuf_sanity_check(soc, ring_desc, rx_desc);
  317. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  318. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  319. dp_info_rl("Nbuf sanity check failure!");
  320. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  321. ring_desc, rx_desc);
  322. rx_desc->in_err_state = 1;
  323. continue;
  324. }
  325. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  326. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  327. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  328. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  329. ring_desc, rx_desc);
  330. }
  331. pkt_capture_offload =
  332. dp_rx_copy_desc_info_in_nbuf_cb(soc, ring_desc,
  333. rx_desc->nbuf,
  334. reo_ring_num);
  335. if (qdf_unlikely(qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf))) {
  336. /* In dp_rx_sg_create() until the last buffer,
  337. * end bit should not be set. As continuation bit set,
  338. * this is not a last buffer.
  339. */
  340. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 0);
  341. /* previous msdu has end bit set, so current one is
  342. * the new MPDU
  343. */
  344. if (is_prev_msdu_last) {
  345. /* Get number of entries available in HW ring */
  346. num_entries_avail =
  347. hal_srng_dst_num_valid(hal_soc,
  348. hal_ring_hdl, 1);
  349. /* For new MPDU check if we can read complete
  350. * MPDU by comparing the number of buffers
  351. * available and number of buffers needed to
  352. * reap this MPDU
  353. */
  354. if ((QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) /
  355. (RX_DATA_BUFFER_SIZE -
  356. soc->rx_pkt_tlv_size) + 1) >
  357. num_pending) {
  358. DP_STATS_INC(soc,
  359. rx.msdu_scatter_wait_break,
  360. 1);
  361. dp_rx_cookie_reset_invalid_bit(
  362. ring_desc);
  363. /* As we are going to break out of the
  364. * loop because of unavailability of
  365. * descs to form complete SG, we need to
  366. * reset the TP in the REO destination
  367. * ring.
  368. */
  369. hal_srng_dst_dec_tp(hal_soc,
  370. hal_ring_hdl);
  371. break;
  372. }
  373. is_prev_msdu_last = false;
  374. }
  375. }
  376. if (!is_prev_msdu_last &&
  377. !(qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  378. is_prev_msdu_last = true;
  379. rx_bufs_reaped[rx_desc->chip_id][rx_desc->pool_id]++;
  380. /*
  381. * move unmap after scattered msdu waiting break logic
  382. * in case double skb unmap happened.
  383. */
  384. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  385. rx_desc->unmapped = 1;
  386. DP_RX_PROCESS_NBUF(soc, nbuf_head, nbuf_tail, ebuf_head,
  387. ebuf_tail, rx_desc);
  388. quota -= 1;
  389. num_pending -= 1;
  390. dp_rx_add_to_free_desc_list
  391. (&head[rx_desc->chip_id][rx_desc->pool_id],
  392. &tail[rx_desc->chip_id][rx_desc->pool_id], rx_desc);
  393. num_rx_bufs_reaped++;
  394. dp_rx_prefetch_hw_sw_nbuf_32_byte_desc(soc, hal_soc,
  395. num_pending,
  396. hal_ring_hdl,
  397. &last_prefetched_hw_desc,
  398. &last_prefetched_sw_desc);
  399. /*
  400. * only if complete msdu is received for scatter case,
  401. * then allow break.
  402. */
  403. if (is_prev_msdu_last &&
  404. dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped,
  405. max_reap_limit))
  406. break;
  407. }
  408. done:
  409. dp_rx_srng_access_end(int_ctx, soc, hal_ring_hdl);
  410. qdf_dsb();
  411. dp_rx_per_core_stats_update(soc, reo_ring_num, num_rx_bufs_reaped);
  412. for (chip_id = 0; chip_id < WLAN_MAX_MLO_CHIPS; chip_id++) {
  413. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  414. /*
  415. * continue with next mac_id if no pkts were reaped
  416. * from that pool
  417. */
  418. if (!rx_bufs_reaped[chip_id][mac_id])
  419. continue;
  420. replenish_soc = dp_rx_replensih_soc_get(soc, chip_id);
  421. dp_rxdma_srng =
  422. &replenish_soc->rx_refill_buf_ring[mac_id];
  423. rx_desc_pool = &replenish_soc->rx_desc_buf[mac_id];
  424. dp_rx_buffers_replenish_simple(replenish_soc, mac_id,
  425. dp_rxdma_srng,
  426. rx_desc_pool,
  427. rx_bufs_reaped[chip_id][mac_id],
  428. &head[chip_id][mac_id],
  429. &tail[chip_id][mac_id]);
  430. }
  431. }
  432. /* Peer can be NULL is case of LFR */
  433. if (qdf_likely(txrx_peer))
  434. vdev = NULL;
  435. /*
  436. * BIG loop where each nbuf is dequeued from global queue,
  437. * processed and queued back on a per vdev basis. These nbufs
  438. * are sent to stack as and when we run out of nbufs
  439. * or a new nbuf dequeued from global queue has a different
  440. * vdev when compared to previous nbuf.
  441. */
  442. nbuf = nbuf_head;
  443. while (nbuf) {
  444. next = nbuf->next;
  445. dp_rx_prefetch_nbuf_data_be(nbuf, next);
  446. if (qdf_unlikely(dp_rx_is_raw_frame_dropped(nbuf))) {
  447. nbuf = next;
  448. DP_STATS_INC(soc, rx.err.raw_frm_drop, 1);
  449. continue;
  450. }
  451. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  452. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  453. peer_id = dp_rx_get_peer_id_be(nbuf);
  454. if (dp_rx_is_list_ready(deliver_list_head, vdev, txrx_peer,
  455. peer_id, vdev_id)) {
  456. dp_rx_deliver_to_stack(soc, vdev, txrx_peer,
  457. deliver_list_head,
  458. deliver_list_tail);
  459. deliver_list_head = NULL;
  460. deliver_list_tail = NULL;
  461. }
  462. /* Get TID from struct cb->tid_val, save to tid */
  463. tid = qdf_nbuf_get_tid_val(nbuf);
  464. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS)) {
  465. DP_STATS_INC(soc, rx.err.rx_invalid_tid_err, 1);
  466. dp_rx_nbuf_free(nbuf);
  467. nbuf = next;
  468. continue;
  469. }
  470. if (qdf_unlikely(!txrx_peer)) {
  471. txrx_peer = dp_rx_get_txrx_peer_and_vdev(soc, nbuf,
  472. peer_id,
  473. &txrx_ref_handle,
  474. pkt_capture_offload,
  475. &vdev,
  476. &rx_pdev, &dsf,
  477. &old_tid);
  478. if (qdf_unlikely(!txrx_peer) || qdf_unlikely(!vdev)) {
  479. nbuf = next;
  480. continue;
  481. }
  482. enh_flag = rx_pdev->enhanced_stats_en;
  483. } else if (txrx_peer && txrx_peer->peer_id != peer_id) {
  484. dp_txrx_peer_unref_delete(txrx_ref_handle,
  485. DP_MOD_ID_RX);
  486. txrx_peer = dp_rx_get_txrx_peer_and_vdev(soc, nbuf,
  487. peer_id,
  488. &txrx_ref_handle,
  489. pkt_capture_offload,
  490. &vdev,
  491. &rx_pdev, &dsf,
  492. &old_tid);
  493. if (qdf_unlikely(!txrx_peer) || qdf_unlikely(!vdev)) {
  494. nbuf = next;
  495. continue;
  496. }
  497. enh_flag = rx_pdev->enhanced_stats_en;
  498. }
  499. if (txrx_peer) {
  500. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  501. qdf_dp_trace_set_track(nbuf, QDF_RX);
  502. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  503. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  504. QDF_NBUF_RX_PKT_DATA_TRACK;
  505. }
  506. rx_bufs_used++;
  507. /* when hlos tid override is enabled, save tid in
  508. * skb->priority
  509. */
  510. if (qdf_unlikely(vdev->skip_sw_tid_classification &
  511. DP_TXRX_HLOS_TID_OVERRIDE_ENABLED))
  512. qdf_nbuf_set_priority(nbuf, tid);
  513. DP_RX_TID_SAVE(nbuf, tid);
  514. if (qdf_unlikely(dsf) || qdf_unlikely(peer_ext_stats) ||
  515. dp_rx_pkt_tracepoints_enabled())
  516. qdf_nbuf_set_timestamp(nbuf);
  517. if (qdf_likely(old_tid != tid)) {
  518. tid_stats =
  519. &rx_pdev->stats.tid_stats.tid_rx_stats[reo_ring_num][tid];
  520. old_tid = tid;
  521. }
  522. /*
  523. * Check if DMA completed -- msdu_done is the last bit
  524. * to be written
  525. */
  526. if (qdf_unlikely(!qdf_nbuf_is_rx_chfrag_cont(nbuf) &&
  527. !hal_rx_tlv_msdu_done_get_be(rx_tlv_hdr))) {
  528. dp_err("MSDU DONE failure");
  529. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  530. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  531. QDF_TRACE_LEVEL_INFO);
  532. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  533. dp_rx_nbuf_free(nbuf);
  534. qdf_assert(0);
  535. nbuf = next;
  536. continue;
  537. }
  538. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  539. /*
  540. * First IF condition:
  541. * 802.11 Fragmented pkts are reinjected to REO
  542. * HW block as SG pkts and for these pkts we only
  543. * need to pull the RX TLVS header length.
  544. * Second IF condition:
  545. * The below condition happens when an MSDU is spread
  546. * across multiple buffers. This can happen in two cases
  547. * 1. The nbuf size is smaller then the received msdu.
  548. * ex: we have set the nbuf size to 2048 during
  549. * nbuf_alloc. but we received an msdu which is
  550. * 2304 bytes in size then this msdu is spread
  551. * across 2 nbufs.
  552. *
  553. * 2. AMSDUs when RAW mode is enabled.
  554. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  555. * across 1st nbuf and 2nd nbuf and last MSDU is
  556. * spread across 2nd nbuf and 3rd nbuf.
  557. *
  558. * for these scenarios let us create a skb frag_list and
  559. * append these buffers till the last MSDU of the AMSDU
  560. * Third condition:
  561. * This is the most likely case, we receive 802.3 pkts
  562. * decapsulated by HW, here we need to set the pkt length.
  563. */
  564. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  565. bool is_mcbc, is_sa_vld, is_da_vld;
  566. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  567. rx_tlv_hdr);
  568. is_sa_vld =
  569. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  570. rx_tlv_hdr);
  571. is_da_vld =
  572. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  573. rx_tlv_hdr);
  574. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  575. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  576. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  577. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  578. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  579. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  580. nbuf = dp_rx_sg_create(soc, nbuf);
  581. next = nbuf->next;
  582. if (qdf_nbuf_is_raw_frame(nbuf)) {
  583. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  584. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  585. rx.raw, 1,
  586. msdu_len,
  587. link_id);
  588. } else {
  589. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  590. if (!dp_rx_is_sg_supported()) {
  591. dp_rx_nbuf_free(nbuf);
  592. dp_info_rl("sg msdu len %d, dropped",
  593. msdu_len);
  594. nbuf = next;
  595. continue;
  596. }
  597. }
  598. } else {
  599. l3_pad = hal_rx_get_l3_pad_bytes_be(nbuf, rx_tlv_hdr);
  600. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  601. pkt_len = msdu_len + l3_pad + soc->rx_pkt_tlv_size;
  602. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  603. dp_rx_skip_tlvs(soc, nbuf, l3_pad);
  604. }
  605. dp_rx_send_pktlog(soc, rx_pdev, nbuf, QDF_TX_RX_STATUS_OK);
  606. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, txrx_peer)) {
  607. dp_rx_err("%pK: Policy Check Drop pkt", soc);
  608. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  609. rx.policy_check_drop,
  610. 1, link_id);
  611. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  612. /* Drop & free packet */
  613. dp_rx_nbuf_free(nbuf);
  614. /* Statistics */
  615. nbuf = next;
  616. continue;
  617. }
  618. /*
  619. * Drop non-EAPOL frames from unauthorized peer.
  620. */
  621. if (qdf_likely(txrx_peer) &&
  622. qdf_unlikely(!txrx_peer->authorize) &&
  623. !qdf_nbuf_is_raw_frame(nbuf)) {
  624. bool is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  625. qdf_nbuf_is_ipv4_wapi_pkt(nbuf);
  626. if (!is_eapol) {
  627. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  628. rx.peer_unauth_rx_pkt_drop,
  629. 1, link_id);
  630. dp_rx_nbuf_free(nbuf);
  631. nbuf = next;
  632. continue;
  633. }
  634. }
  635. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  636. dp_rx_update_flow_info(nbuf, rx_tlv_hdr);
  637. if (qdf_unlikely(!rx_pdev->rx_fast_flag)) {
  638. /*
  639. * process frame for mulitpass phrase processing
  640. */
  641. if (qdf_unlikely(vdev->multipass_en)) {
  642. if (dp_rx_multipass_process(txrx_peer, nbuf,
  643. tid) == false) {
  644. DP_PEER_PER_PKT_STATS_INC
  645. (txrx_peer,
  646. rx.multipass_rx_pkt_drop,
  647. 1, link_id);
  648. dp_rx_nbuf_free(nbuf);
  649. nbuf = next;
  650. continue;
  651. }
  652. }
  653. if (qdf_unlikely(txrx_peer &&
  654. (txrx_peer->nawds_enabled) &&
  655. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  656. (hal_rx_get_mpdu_mac_ad4_valid_be
  657. (rx_tlv_hdr) == false))) {
  658. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  659. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  660. rx.nawds_mcast_drop,
  661. 1, link_id);
  662. dp_rx_nbuf_free(nbuf);
  663. nbuf = next;
  664. continue;
  665. }
  666. /* Update the protocol tag in SKB based on CCE metadata
  667. */
  668. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  669. reo_ring_num, false, true);
  670. /* Update the flow tag in SKB based on FSE metadata */
  671. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr,
  672. true);
  673. if (qdf_likely(vdev->rx_decap_type ==
  674. htt_cmn_pkt_type_ethernet) &&
  675. qdf_likely(!vdev->mesh_vdev)) {
  676. dp_rx_wds_learn(soc, vdev,
  677. rx_tlv_hdr,
  678. txrx_peer,
  679. nbuf);
  680. }
  681. if (qdf_unlikely(vdev->mesh_vdev)) {
  682. if (dp_rx_filter_mesh_packets(vdev, nbuf,
  683. rx_tlv_hdr)
  684. == QDF_STATUS_SUCCESS) {
  685. dp_rx_info("%pK: mesh pkt filtered",
  686. soc);
  687. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  688. DP_STATS_INC(vdev->pdev,
  689. dropped.mesh_filter, 1);
  690. dp_rx_nbuf_free(nbuf);
  691. nbuf = next;
  692. continue;
  693. }
  694. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr,
  695. txrx_peer);
  696. }
  697. }
  698. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, txrx_peer,
  699. reo_ring_num, tid_stats, link_id);
  700. if (qdf_likely(vdev->rx_decap_type ==
  701. htt_cmn_pkt_type_ethernet) &&
  702. qdf_likely(!vdev->mesh_vdev)) {
  703. /* Intrabss-fwd */
  704. if (dp_rx_check_ap_bridge(vdev))
  705. if (dp_rx_intrabss_fwd_be(soc, txrx_peer,
  706. rx_tlv_hdr,
  707. nbuf,
  708. msdu_metadata,
  709. link_id)) {
  710. nbuf = next;
  711. tid_stats->intrabss_cnt++;
  712. continue; /* Get next desc */
  713. }
  714. }
  715. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  716. dp_rx_mark_first_packet_after_wow_wakeup(vdev->pdev, rx_tlv_hdr,
  717. nbuf);
  718. dp_rx_update_stats(soc, nbuf);
  719. dp_pkt_add_timestamp(txrx_peer->vdev, QDF_PKT_RX_DRIVER_ENTRY,
  720. current_time, nbuf);
  721. DP_RX_LIST_APPEND(deliver_list_head,
  722. deliver_list_tail,
  723. nbuf);
  724. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1,
  725. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  726. enh_flag);
  727. if (qdf_unlikely(txrx_peer->in_twt))
  728. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  729. rx.to_stack_twt, 1,
  730. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  731. link_id);
  732. tid_stats->delivered_to_stack++;
  733. nbuf = next;
  734. }
  735. DP_RX_DELIVER_TO_STACK(soc, vdev, txrx_peer, peer_id,
  736. pkt_capture_offload,
  737. deliver_list_head,
  738. deliver_list_tail);
  739. if (qdf_likely(txrx_peer))
  740. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  741. /*
  742. * If we are processing in near-full condition, there are 3 scenario
  743. * 1) Ring entries has reached critical state
  744. * 2) Ring entries are still near high threshold
  745. * 3) Ring entries are below the safe level
  746. *
  747. * One more loop will move the state to normal processing and yield
  748. */
  749. if (ring_near_full && quota)
  750. goto more_data;
  751. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  752. if (quota) {
  753. num_pending =
  754. dp_rx_srng_get_num_pending(hal_soc,
  755. hal_ring_hdl,
  756. num_entries,
  757. &near_full);
  758. if (num_pending) {
  759. DP_STATS_INC(soc, rx.hp_oos2, 1);
  760. if (!hif_exec_should_yield(scn, intr_id))
  761. goto more_data;
  762. if (qdf_unlikely(near_full)) {
  763. DP_STATS_INC(soc, rx.near_full, 1);
  764. goto more_data;
  765. }
  766. }
  767. }
  768. if (vdev && vdev->osif_fisa_flush)
  769. vdev->osif_fisa_flush(soc, reo_ring_num);
  770. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  771. vdev->osif_gro_flush(vdev->osif_vdev,
  772. reo_ring_num);
  773. }
  774. }
  775. /* Update histogram statistics by looping through pdev's */
  776. DP_RX_HIST_STATS_PER_PDEV();
  777. return rx_bufs_used; /* Assume no scale factor for now */
  778. }
  779. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  780. /**
  781. * dp_rx_desc_pool_init_be_cc() - initial RX desc pool for cookie conversion
  782. * @soc: Handle to DP Soc structure
  783. * @rx_desc_pool: Rx descriptor pool handler
  784. * @pool_id: Rx descriptor pool ID
  785. *
  786. * Return: QDF_STATUS_SUCCESS - succeeded, others - failed
  787. */
  788. static QDF_STATUS
  789. dp_rx_desc_pool_init_be_cc(struct dp_soc *soc,
  790. struct rx_desc_pool *rx_desc_pool,
  791. uint32_t pool_id)
  792. {
  793. struct dp_hw_cookie_conversion_t *cc_ctx;
  794. struct dp_soc_be *be_soc;
  795. union dp_rx_desc_list_elem_t *rx_desc_elem;
  796. struct dp_spt_page_desc *page_desc;
  797. uint32_t ppt_idx = 0;
  798. uint32_t avail_entry_index = 0;
  799. if (!rx_desc_pool->pool_size) {
  800. dp_err("desc_num 0 !!");
  801. return QDF_STATUS_E_FAILURE;
  802. }
  803. be_soc = dp_get_be_soc_from_dp_soc(soc);
  804. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  805. page_desc = &cc_ctx->page_desc_base[0];
  806. rx_desc_elem = rx_desc_pool->freelist;
  807. while (rx_desc_elem) {
  808. if (avail_entry_index == 0) {
  809. if (ppt_idx >= cc_ctx->total_page_num) {
  810. dp_alert("insufficient secondary page tables");
  811. qdf_assert_always(0);
  812. }
  813. page_desc = &cc_ctx->page_desc_base[ppt_idx++];
  814. }
  815. /* put each RX Desc VA to SPT pages and
  816. * get corresponding ID
  817. */
  818. DP_CC_SPT_PAGE_UPDATE_VA(page_desc->page_v_addr,
  819. avail_entry_index,
  820. &rx_desc_elem->rx_desc);
  821. rx_desc_elem->rx_desc.cookie =
  822. dp_cc_desc_id_generate(page_desc->ppt_index,
  823. avail_entry_index);
  824. rx_desc_elem->rx_desc.chip_id = dp_mlo_get_chip_id(soc);
  825. rx_desc_elem->rx_desc.pool_id = pool_id;
  826. rx_desc_elem->rx_desc.in_use = 0;
  827. rx_desc_elem = rx_desc_elem->next;
  828. avail_entry_index = (avail_entry_index + 1) &
  829. DP_CC_SPT_PAGE_MAX_ENTRIES_MASK;
  830. }
  831. return QDF_STATUS_SUCCESS;
  832. }
  833. #else
  834. static QDF_STATUS
  835. dp_rx_desc_pool_init_be_cc(struct dp_soc *soc,
  836. struct rx_desc_pool *rx_desc_pool,
  837. uint32_t pool_id)
  838. {
  839. struct dp_hw_cookie_conversion_t *cc_ctx;
  840. struct dp_soc_be *be_soc;
  841. struct dp_spt_page_desc *page_desc;
  842. uint32_t ppt_idx = 0;
  843. uint32_t avail_entry_index = 0;
  844. int i = 0;
  845. if (!rx_desc_pool->pool_size) {
  846. dp_err("desc_num 0 !!");
  847. return QDF_STATUS_E_FAILURE;
  848. }
  849. be_soc = dp_get_be_soc_from_dp_soc(soc);
  850. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  851. page_desc = &cc_ctx->page_desc_base[0];
  852. for (i = 0; i <= rx_desc_pool->pool_size - 1; i++) {
  853. if (i == rx_desc_pool->pool_size - 1)
  854. rx_desc_pool->array[i].next = NULL;
  855. else
  856. rx_desc_pool->array[i].next =
  857. &rx_desc_pool->array[i + 1];
  858. if (avail_entry_index == 0) {
  859. if (ppt_idx >= cc_ctx->total_page_num) {
  860. dp_alert("insufficient secondary page tables");
  861. qdf_assert_always(0);
  862. }
  863. page_desc = &cc_ctx->page_desc_base[ppt_idx++];
  864. }
  865. /* put each RX Desc VA to SPT pages and
  866. * get corresponding ID
  867. */
  868. DP_CC_SPT_PAGE_UPDATE_VA(page_desc->page_v_addr,
  869. avail_entry_index,
  870. &rx_desc_pool->array[i].rx_desc);
  871. rx_desc_pool->array[i].rx_desc.cookie =
  872. dp_cc_desc_id_generate(page_desc->ppt_index,
  873. avail_entry_index);
  874. rx_desc_pool->array[i].rx_desc.pool_id = pool_id;
  875. rx_desc_pool->array[i].rx_desc.in_use = 0;
  876. rx_desc_pool->array[i].rx_desc.chip_id =
  877. dp_mlo_get_chip_id(soc);
  878. avail_entry_index = (avail_entry_index + 1) &
  879. DP_CC_SPT_PAGE_MAX_ENTRIES_MASK;
  880. }
  881. return QDF_STATUS_SUCCESS;
  882. }
  883. #endif
  884. static void
  885. dp_rx_desc_pool_deinit_be_cc(struct dp_soc *soc,
  886. struct rx_desc_pool *rx_desc_pool,
  887. uint32_t pool_id)
  888. {
  889. struct dp_spt_page_desc *page_desc;
  890. struct dp_soc_be *be_soc;
  891. int i = 0;
  892. struct dp_hw_cookie_conversion_t *cc_ctx;
  893. be_soc = dp_get_be_soc_from_dp_soc(soc);
  894. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  895. for (i = 0; i < cc_ctx->total_page_num; i++) {
  896. page_desc = &cc_ctx->page_desc_base[i];
  897. qdf_mem_zero(page_desc->page_v_addr, qdf_page_size);
  898. }
  899. }
  900. QDF_STATUS dp_rx_desc_pool_init_be(struct dp_soc *soc,
  901. struct rx_desc_pool *rx_desc_pool,
  902. uint32_t pool_id)
  903. {
  904. QDF_STATUS status = QDF_STATUS_SUCCESS;
  905. /* Only regular RX buffer desc pool use HW cookie conversion */
  906. if (rx_desc_pool->desc_type == DP_RX_DESC_BUF_TYPE) {
  907. dp_info("rx_desc_buf pool init");
  908. status = dp_rx_desc_pool_init_be_cc(soc,
  909. rx_desc_pool,
  910. pool_id);
  911. } else {
  912. dp_info("non_rx_desc_buf_pool init");
  913. status = dp_rx_desc_pool_init_generic(soc, rx_desc_pool,
  914. pool_id);
  915. }
  916. return status;
  917. }
  918. void dp_rx_desc_pool_deinit_be(struct dp_soc *soc,
  919. struct rx_desc_pool *rx_desc_pool,
  920. uint32_t pool_id)
  921. {
  922. if (rx_desc_pool->desc_type == DP_RX_DESC_BUF_TYPE)
  923. dp_rx_desc_pool_deinit_be_cc(soc, rx_desc_pool, pool_id);
  924. }
  925. #ifdef DP_FEATURE_HW_COOKIE_CONVERSION
  926. #ifdef DP_HW_COOKIE_CONVERT_EXCEPTION
  927. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  928. void *ring_desc,
  929. struct dp_rx_desc **r_rx_desc)
  930. {
  931. if (hal_rx_wbm_get_cookie_convert_done(ring_desc)) {
  932. /* HW cookie conversion done */
  933. *r_rx_desc = (struct dp_rx_desc *)
  934. hal_rx_wbm_get_desc_va(ring_desc);
  935. } else {
  936. /* SW do cookie conversion */
  937. uint32_t cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  938. *r_rx_desc = (struct dp_rx_desc *)
  939. dp_cc_desc_find(soc, cookie);
  940. }
  941. return QDF_STATUS_SUCCESS;
  942. }
  943. #else
  944. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  945. void *ring_desc,
  946. struct dp_rx_desc **r_rx_desc)
  947. {
  948. *r_rx_desc = (struct dp_rx_desc *)
  949. hal_rx_wbm_get_desc_va(ring_desc);
  950. return QDF_STATUS_SUCCESS;
  951. }
  952. #endif /* DP_HW_COOKIE_CONVERT_EXCEPTION */
  953. #else
  954. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  955. void *ring_desc,
  956. struct dp_rx_desc **r_rx_desc)
  957. {
  958. /* SW do cookie conversion */
  959. uint32_t cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  960. *r_rx_desc = (struct dp_rx_desc *)
  961. dp_cc_desc_find(soc, cookie);
  962. return QDF_STATUS_SUCCESS;
  963. }
  964. #endif /* DP_FEATURE_HW_COOKIE_CONVERSION */
  965. struct dp_rx_desc *dp_rx_desc_cookie_2_va_be(struct dp_soc *soc,
  966. uint32_t cookie)
  967. {
  968. return (struct dp_rx_desc *)dp_cc_desc_find(soc, cookie);
  969. }
  970. #if defined(WLAN_FEATURE_11BE_MLO)
  971. #if defined(WLAN_MLO_MULTI_CHIP) && defined(WLAN_MCAST_MLO)
  972. #define DP_RANDOM_MAC_ID_BIT_MASK 0xC0
  973. #define DP_RANDOM_MAC_OFFSET 1
  974. #define DP_MAC_LOCAL_ADMBIT_MASK 0x2
  975. #define DP_MAC_LOCAL_ADMBIT_OFFSET 0
  976. static inline void dp_rx_dummy_src_mac(struct dp_vdev *vdev,
  977. qdf_nbuf_t nbuf)
  978. {
  979. qdf_ether_header_t *eh =
  980. (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  981. eh->ether_shost[DP_MAC_LOCAL_ADMBIT_OFFSET] =
  982. eh->ether_shost[DP_MAC_LOCAL_ADMBIT_OFFSET] |
  983. DP_MAC_LOCAL_ADMBIT_MASK;
  984. }
  985. #ifdef QCA_SUPPORT_WDS_EXTENDED
  986. static inline bool dp_rx_mlo_igmp_wds_ext_handler(struct dp_txrx_peer *peer)
  987. {
  988. return qdf_atomic_test_bit(WDS_EXT_PEER_INIT_BIT, &peer->wds_ext.init);
  989. }
  990. #else
  991. static inline bool dp_rx_mlo_igmp_wds_ext_handler(struct dp_txrx_peer *peer)
  992. {
  993. return false;
  994. }
  995. #endif
  996. bool dp_rx_mlo_igmp_handler(struct dp_soc *soc,
  997. struct dp_vdev *vdev,
  998. struct dp_txrx_peer *peer,
  999. qdf_nbuf_t nbuf,
  1000. uint8_t link_id)
  1001. {
  1002. struct dp_vdev *mcast_primary_vdev = NULL;
  1003. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1004. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1005. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1006. struct cdp_tid_rx_stats *tid_stats = &peer->vdev->pdev->stats.
  1007. tid_stats.tid_rx_wbm_stats[0][tid];
  1008. if (!(qdf_nbuf_is_ipv4_igmp_pkt(nbuf) ||
  1009. qdf_nbuf_is_ipv6_igmp_pkt(nbuf)))
  1010. return false;
  1011. if (qdf_unlikely(vdev->multipass_en)) {
  1012. if (dp_rx_multipass_process(peer, nbuf, tid) == false) {
  1013. DP_PEER_PER_PKT_STATS_INC(peer,
  1014. rx.multipass_rx_pkt_drop,
  1015. 1, link_id);
  1016. return false;
  1017. }
  1018. }
  1019. if (!peer->bss_peer) {
  1020. if (dp_rx_intrabss_mcbc_fwd(soc, peer, NULL, nbuf,
  1021. tid_stats, link_id))
  1022. dp_rx_err("forwarding failed");
  1023. }
  1024. /*
  1025. * In the case of ME6, Backhaul WDS, NAWDS
  1026. * send the igmp pkt on the same link where it received,
  1027. * as these features will use peer based tcl metadata
  1028. */
  1029. qdf_nbuf_set_next(nbuf, NULL);
  1030. if (vdev->mcast_enhancement_en || be_vdev->mcast_primary ||
  1031. peer->nawds_enabled)
  1032. goto send_pkt;
  1033. if (qdf_unlikely(dp_rx_mlo_igmp_wds_ext_handler(peer)))
  1034. goto send_pkt;
  1035. mcast_primary_vdev = dp_mlo_get_mcast_primary_vdev(be_soc, be_vdev,
  1036. DP_MOD_ID_RX);
  1037. if (!mcast_primary_vdev) {
  1038. dp_rx_debug("Non mlo vdev");
  1039. goto send_pkt;
  1040. }
  1041. if (qdf_unlikely(vdev->wrap_vdev)) {
  1042. /* In the case of qwrap repeater send the original
  1043. * packet on the interface where it received,
  1044. * packet with dummy src on the mcast primary interface.
  1045. */
  1046. qdf_nbuf_t nbuf_copy;
  1047. nbuf_copy = qdf_nbuf_copy(nbuf);
  1048. if (qdf_likely(nbuf_copy))
  1049. dp_rx_deliver_to_stack(soc, vdev, peer, nbuf_copy,
  1050. NULL);
  1051. }
  1052. dp_rx_dummy_src_mac(vdev, nbuf);
  1053. dp_rx_deliver_to_stack(mcast_primary_vdev->pdev->soc,
  1054. mcast_primary_vdev,
  1055. peer,
  1056. nbuf,
  1057. NULL);
  1058. dp_vdev_unref_delete(mcast_primary_vdev->pdev->soc,
  1059. mcast_primary_vdev,
  1060. DP_MOD_ID_RX);
  1061. return true;
  1062. send_pkt:
  1063. dp_rx_deliver_to_stack(be_vdev->vdev.pdev->soc,
  1064. &be_vdev->vdev,
  1065. peer,
  1066. nbuf,
  1067. NULL);
  1068. return true;
  1069. }
  1070. #else
  1071. bool dp_rx_mlo_igmp_handler(struct dp_soc *soc,
  1072. struct dp_vdev *vdev,
  1073. struct dp_txrx_peer *peer,
  1074. qdf_nbuf_t nbuf,
  1075. uint8_t link_id)
  1076. {
  1077. return false;
  1078. }
  1079. #endif
  1080. #endif
  1081. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  1082. uint32_t dp_rx_nf_process(struct dp_intr *int_ctx,
  1083. hal_ring_handle_t hal_ring_hdl,
  1084. uint8_t reo_ring_num,
  1085. uint32_t quota)
  1086. {
  1087. struct dp_soc *soc = int_ctx->soc;
  1088. struct dp_srng *rx_ring = &soc->reo_dest_ring[reo_ring_num];
  1089. uint32_t work_done = 0;
  1090. if (dp_srng_get_near_full_level(soc, rx_ring) <
  1091. DP_SRNG_THRESH_NEAR_FULL)
  1092. return 0;
  1093. qdf_atomic_set(&rx_ring->near_full, 1);
  1094. work_done++;
  1095. return work_done;
  1096. }
  1097. #endif
  1098. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1099. #ifdef WLAN_FEATURE_11BE_MLO
  1100. /**
  1101. * dp_rx_intrabss_fwd_mlo_allow() - check if MLO forwarding is allowed
  1102. * @ta_peer: transmitter peer handle
  1103. * @da_peer: destination peer handle
  1104. *
  1105. * Return: true - MLO forwarding case, false: not
  1106. */
  1107. static inline bool
  1108. dp_rx_intrabss_fwd_mlo_allow(struct dp_txrx_peer *ta_peer,
  1109. struct dp_txrx_peer *da_peer)
  1110. {
  1111. /* TA peer and DA peer's vdev should be partner MLO vdevs */
  1112. if (dp_peer_find_mac_addr_cmp(&ta_peer->vdev->mld_mac_addr,
  1113. &da_peer->vdev->mld_mac_addr))
  1114. return false;
  1115. return true;
  1116. }
  1117. #else
  1118. static inline bool
  1119. dp_rx_intrabss_fwd_mlo_allow(struct dp_txrx_peer *ta_peer,
  1120. struct dp_txrx_peer *da_peer)
  1121. {
  1122. return false;
  1123. }
  1124. #endif
  1125. #ifdef INTRA_BSS_FWD_OFFLOAD
  1126. /**
  1127. * dp_rx_intrabss_ucast_check_be() - Check if intrabss is allowed
  1128. * for unicast frame
  1129. * @nbuf: RX packet buffer
  1130. * @ta_peer: transmitter DP peer handle
  1131. * @rx_tlv_hdr: Rx TLV header
  1132. * @msdu_metadata: MSDU meta data info
  1133. * @params: params to be filled in
  1134. *
  1135. * Return: true - intrabss allowed
  1136. * false - not allow
  1137. */
  1138. static bool
  1139. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1140. struct dp_txrx_peer *ta_peer,
  1141. uint8_t *rx_tlv_hdr,
  1142. struct hal_rx_msdu_metadata *msdu_metadata,
  1143. struct dp_be_intrabss_params *params)
  1144. {
  1145. uint8_t dest_chip_id, dest_chip_pmac_id;
  1146. struct dp_vdev_be *be_vdev =
  1147. dp_get_be_vdev_from_dp_vdev(ta_peer->vdev);
  1148. struct dp_soc_be *be_soc =
  1149. dp_get_be_soc_from_dp_soc(params->dest_soc);
  1150. uint16_t da_peer_id;
  1151. struct dp_peer *da_peer = NULL;
  1152. if (!qdf_nbuf_is_intra_bss(nbuf))
  1153. return false;
  1154. da_peer_id = HAL_RX_PEER_ID_GET(msdu_metadata);
  1155. da_peer = dp_peer_get_tgt_peer_by_id(&be_soc->soc, da_peer_id,
  1156. DP_MOD_ID_RX);
  1157. if (da_peer) {
  1158. if (da_peer->bss_peer || (da_peer->txrx_peer == ta_peer)) {
  1159. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  1160. return false;
  1161. }
  1162. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  1163. }
  1164. hal_rx_tlv_get_dest_chip_pmac_id(rx_tlv_hdr,
  1165. &dest_chip_id,
  1166. &dest_chip_pmac_id);
  1167. qdf_assert_always(dest_chip_id <= (DP_MLO_MAX_DEST_CHIP_ID - 1));
  1168. if (dest_chip_id == be_soc->mlo_chip_id) {
  1169. if (dest_chip_pmac_id == ta_peer->vdev->pdev->pdev_id)
  1170. params->tx_vdev_id = ta_peer->vdev->vdev_id;
  1171. else
  1172. params->tx_vdev_id =
  1173. be_vdev->partner_vdev_list[dest_chip_id]
  1174. [dest_chip_pmac_id];
  1175. return true;
  1176. }
  1177. params->tx_vdev_id =
  1178. be_vdev->partner_vdev_list[dest_chip_id][dest_chip_pmac_id];
  1179. params->dest_soc =
  1180. dp_mlo_get_soc_ref_by_chip_id(be_soc->ml_ctxt,
  1181. dest_chip_id);
  1182. if (!params->dest_soc)
  1183. return false;
  1184. return true;
  1185. }
  1186. #else
  1187. #ifdef WLAN_MLO_MULTI_CHIP
  1188. static bool
  1189. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1190. struct dp_txrx_peer *ta_peer,
  1191. uint8_t *rx_tlv_hdr,
  1192. struct hal_rx_msdu_metadata *msdu_metadata,
  1193. struct dp_be_intrabss_params *params)
  1194. {
  1195. uint16_t da_peer_id;
  1196. struct dp_txrx_peer *da_peer;
  1197. bool ret = false;
  1198. uint8_t dest_chip_id;
  1199. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1200. struct dp_vdev_be *be_vdev =
  1201. dp_get_be_vdev_from_dp_vdev(ta_peer->vdev);
  1202. struct dp_soc_be *be_soc =
  1203. dp_get_be_soc_from_dp_soc(params->dest_soc);
  1204. if (!(qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf)))
  1205. return false;
  1206. dest_chip_id = HAL_RX_DEST_CHIP_ID_GET(msdu_metadata);
  1207. qdf_assert_always(dest_chip_id <= (DP_MLO_MAX_DEST_CHIP_ID - 1));
  1208. da_peer_id = HAL_RX_PEER_ID_GET(msdu_metadata);
  1209. /* use dest chip id when TA is MLD peer and DA is legacy */
  1210. if (be_soc->mlo_enabled &&
  1211. ta_peer->mld_peer &&
  1212. !(da_peer_id & HAL_RX_DA_IDX_ML_PEER_MASK)) {
  1213. /* validate chip_id, get a ref, and re-assign soc */
  1214. params->dest_soc =
  1215. dp_mlo_get_soc_ref_by_chip_id(be_soc->ml_ctxt,
  1216. dest_chip_id);
  1217. if (!params->dest_soc)
  1218. return false;
  1219. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc,
  1220. da_peer_id,
  1221. &txrx_ref_handle,
  1222. DP_MOD_ID_RX);
  1223. if (!da_peer)
  1224. return false;
  1225. } else {
  1226. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc,
  1227. da_peer_id,
  1228. &txrx_ref_handle,
  1229. DP_MOD_ID_RX);
  1230. if (!da_peer)
  1231. return false;
  1232. params->dest_soc = da_peer->vdev->pdev->soc;
  1233. if (!params->dest_soc)
  1234. goto rel_da_peer;
  1235. }
  1236. params->tx_vdev_id = da_peer->vdev->vdev_id;
  1237. /* If the source or destination peer in the isolation
  1238. * list then dont forward instead push to bridge stack.
  1239. */
  1240. if (dp_get_peer_isolation(ta_peer) ||
  1241. dp_get_peer_isolation(da_peer)) {
  1242. ret = false;
  1243. goto rel_da_peer;
  1244. }
  1245. if (da_peer->bss_peer || (da_peer == ta_peer)) {
  1246. ret = false;
  1247. goto rel_da_peer;
  1248. }
  1249. /* Same vdev, support Inra-BSS */
  1250. if (da_peer->vdev == ta_peer->vdev) {
  1251. ret = true;
  1252. goto rel_da_peer;
  1253. }
  1254. /* MLO specific Intra-BSS check */
  1255. if (dp_rx_intrabss_fwd_mlo_allow(ta_peer, da_peer)) {
  1256. /* use dest chip id for legacy dest peer */
  1257. if (!(da_peer_id & HAL_RX_DA_IDX_ML_PEER_MASK)) {
  1258. if (!(be_vdev->partner_vdev_list[dest_chip_id][0] ==
  1259. params->tx_vdev_id) &&
  1260. !(be_vdev->partner_vdev_list[dest_chip_id][1] ==
  1261. params->tx_vdev_id)) {
  1262. /*dp_soc_unref_delete(soc);*/
  1263. goto rel_da_peer;
  1264. }
  1265. }
  1266. ret = true;
  1267. }
  1268. rel_da_peer:
  1269. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  1270. return ret;
  1271. }
  1272. #else
  1273. static bool
  1274. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1275. struct dp_txrx_peer *ta_peer,
  1276. uint8_t *rx_tlv_hdr,
  1277. struct hal_rx_msdu_metadata *msdu_metadata,
  1278. struct dp_be_intrabss_params *params)
  1279. {
  1280. uint16_t da_peer_id;
  1281. struct dp_txrx_peer *da_peer;
  1282. bool ret = false;
  1283. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1284. if (!qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf))
  1285. return false;
  1286. da_peer_id = dp_rx_peer_metadata_peer_id_get_be(
  1287. params->dest_soc,
  1288. msdu_metadata->da_idx);
  1289. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc, da_peer_id,
  1290. &txrx_ref_handle, DP_MOD_ID_RX);
  1291. if (!da_peer)
  1292. return false;
  1293. params->tx_vdev_id = da_peer->vdev->vdev_id;
  1294. /* If the source or destination peer in the isolation
  1295. * list then dont forward instead push to bridge stack.
  1296. */
  1297. if (dp_get_peer_isolation(ta_peer) ||
  1298. dp_get_peer_isolation(da_peer))
  1299. goto rel_da_peer;
  1300. if (da_peer->bss_peer || da_peer == ta_peer)
  1301. goto rel_da_peer;
  1302. /* Same vdev, support Inra-BSS */
  1303. if (da_peer->vdev == ta_peer->vdev) {
  1304. ret = true;
  1305. goto rel_da_peer;
  1306. }
  1307. /* MLO specific Intra-BSS check */
  1308. if (dp_rx_intrabss_fwd_mlo_allow(ta_peer, da_peer)) {
  1309. ret = true;
  1310. goto rel_da_peer;
  1311. }
  1312. rel_da_peer:
  1313. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  1314. return ret;
  1315. }
  1316. #endif /* WLAN_MLO_MULTI_CHIP */
  1317. #endif /* INTRA_BSS_FWD_OFFLOAD */
  1318. #if defined(QCA_MONITOR_2_0_SUPPORT) || defined(CONFIG_WORD_BASED_TLV)
  1319. void dp_rx_word_mask_subscribe_be(struct dp_soc *soc,
  1320. uint32_t *msg_word,
  1321. void *rx_filter)
  1322. {
  1323. struct htt_rx_ring_tlv_filter *tlv_filter =
  1324. (struct htt_rx_ring_tlv_filter *)rx_filter;
  1325. if (!msg_word || !tlv_filter)
  1326. return;
  1327. /* tlv_filter->enable is set to 1 for monitor rings */
  1328. if (tlv_filter->enable)
  1329. return;
  1330. /* if word mask is zero, FW will set the default values */
  1331. if (!(tlv_filter->rx_mpdu_start_wmask > 0 &&
  1332. tlv_filter->rx_msdu_end_wmask > 0)) {
  1333. return;
  1334. }
  1335. HTT_RX_RING_SELECTION_CFG_WORD_MASK_COMPACTION_ENABLE_SET(*msg_word, 1);
  1336. /* word 14 */
  1337. msg_word += 3;
  1338. *msg_word = 0;
  1339. HTT_RX_RING_SELECTION_CFG_RX_MPDU_START_WORD_MASK_SET(
  1340. *msg_word,
  1341. tlv_filter->rx_mpdu_start_wmask);
  1342. /* word 15 */
  1343. msg_word++;
  1344. *msg_word = 0;
  1345. HTT_RX_RING_SELECTION_CFG_RX_MSDU_END_WORD_MASK_SET(
  1346. *msg_word,
  1347. tlv_filter->rx_msdu_end_wmask);
  1348. }
  1349. #else
  1350. void dp_rx_word_mask_subscribe_be(struct dp_soc *soc,
  1351. uint32_t *msg_word,
  1352. void *rx_filter)
  1353. {
  1354. }
  1355. #endif
  1356. #if defined(WLAN_MCAST_MLO) && defined(CONFIG_MLO_SINGLE_DEV)
  1357. static inline
  1358. bool dp_rx_intrabss_mlo_mcbc_fwd(struct dp_soc *soc, struct dp_vdev *vdev,
  1359. qdf_nbuf_t nbuf_copy)
  1360. {
  1361. struct dp_vdev *mcast_primary_vdev = NULL;
  1362. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1363. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1364. struct cdp_tx_exception_metadata tx_exc_metadata = {0};
  1365. if (!vdev->mlo_vdev)
  1366. return false;
  1367. tx_exc_metadata.is_mlo_mcast = 1;
  1368. mcast_primary_vdev = dp_mlo_get_mcast_primary_vdev(be_soc,
  1369. be_vdev,
  1370. DP_MOD_ID_RX);
  1371. if (!mcast_primary_vdev)
  1372. return false;
  1373. nbuf_copy = dp_tx_send_exception((struct cdp_soc_t *)
  1374. mcast_primary_vdev->pdev->soc,
  1375. mcast_primary_vdev->vdev_id,
  1376. nbuf_copy, &tx_exc_metadata);
  1377. if (nbuf_copy)
  1378. qdf_nbuf_free(nbuf_copy);
  1379. dp_vdev_unref_delete(mcast_primary_vdev->pdev->soc,
  1380. mcast_primary_vdev, DP_MOD_ID_RX);
  1381. return true;
  1382. }
  1383. #else
  1384. static inline
  1385. bool dp_rx_intrabss_mlo_mcbc_fwd(struct dp_soc *soc, struct dp_vdev *vdev,
  1386. qdf_nbuf_t nbuf_copy)
  1387. {
  1388. return false;
  1389. }
  1390. #endif
  1391. bool
  1392. dp_rx_intrabss_mcast_handler_be(struct dp_soc *soc,
  1393. struct dp_txrx_peer *ta_txrx_peer,
  1394. qdf_nbuf_t nbuf_copy,
  1395. struct cdp_tid_rx_stats *tid_stats,
  1396. uint8_t link_id)
  1397. {
  1398. if (qdf_unlikely(ta_txrx_peer->vdev->nawds_enabled)) {
  1399. struct cdp_tx_exception_metadata tx_exc_metadata = {0};
  1400. uint16_t len = QDF_NBUF_CB_RX_PKT_LEN(nbuf_copy);
  1401. tx_exc_metadata.peer_id = ta_txrx_peer->peer_id;
  1402. tx_exc_metadata.is_intrabss_fwd = 1;
  1403. tx_exc_metadata.tid = HTT_TX_EXT_TID_INVALID;
  1404. if (dp_tx_send_exception((struct cdp_soc_t *)soc,
  1405. ta_txrx_peer->vdev->vdev_id,
  1406. nbuf_copy,
  1407. &tx_exc_metadata)) {
  1408. DP_PEER_PER_PKT_STATS_INC_PKT(ta_txrx_peer,
  1409. rx.intra_bss.fail, 1,
  1410. len, link_id);
  1411. tid_stats->fail_cnt[INTRABSS_DROP]++;
  1412. qdf_nbuf_free(nbuf_copy);
  1413. } else {
  1414. DP_PEER_PER_PKT_STATS_INC_PKT(ta_txrx_peer,
  1415. rx.intra_bss.pkts, 1,
  1416. len, link_id);
  1417. tid_stats->intrabss_cnt++;
  1418. }
  1419. return true;
  1420. }
  1421. if (dp_rx_intrabss_mlo_mcbc_fwd(soc, ta_txrx_peer->vdev,
  1422. nbuf_copy))
  1423. return true;
  1424. return false;
  1425. }
  1426. bool dp_rx_intrabss_fwd_be(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  1427. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1428. struct hal_rx_msdu_metadata msdu_metadata,
  1429. uint8_t link_id)
  1430. {
  1431. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1432. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1433. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  1434. tid_stats.tid_rx_stats[ring_id][tid];
  1435. bool ret = false;
  1436. struct dp_be_intrabss_params params;
  1437. struct hal_rx_msdu_metadata msdu_metadata;
  1438. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  1439. * source, then clone the pkt and send the cloned pkt for
  1440. * intra BSS forwarding and original pkt up the network stack
  1441. * Note: how do we handle multicast pkts. do we forward
  1442. * all multicast pkts as is or let a higher layer module
  1443. * like igmpsnoop decide whether to forward or not with
  1444. * Mcast enhancement.
  1445. */
  1446. if (qdf_nbuf_is_da_mcbc(nbuf) && !ta_peer->bss_peer) {
  1447. return dp_rx_intrabss_mcbc_fwd(soc, ta_peer, rx_tlv_hdr,
  1448. nbuf, tid_stats, link_id);
  1449. }
  1450. if (dp_rx_intrabss_eapol_drop_check(soc, ta_peer, rx_tlv_hdr,
  1451. nbuf))
  1452. return true;
  1453. hal_rx_msdu_packet_metadata_get_generic_be(rx_tlv_hdr, &msdu_metadata);
  1454. params.dest_soc = soc;
  1455. if (dp_rx_intrabss_ucast_check_be(nbuf, ta_peer, rx_tlv_hdr,
  1456. &msdu_metadata, &params)) {
  1457. ret = dp_rx_intrabss_ucast_fwd(params.dest_soc, ta_peer,
  1458. params.tx_vdev_id,
  1459. rx_tlv_hdr, nbuf, tid_stats,
  1460. link_id);
  1461. }
  1462. return ret;
  1463. }
  1464. #endif
  1465. bool dp_rx_chain_msdus_be(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1466. uint8_t *rx_tlv_hdr, uint8_t mac_id)
  1467. {
  1468. bool mpdu_done = false;
  1469. qdf_nbuf_t curr_nbuf = NULL;
  1470. qdf_nbuf_t tmp_nbuf = NULL;
  1471. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1472. if (!dp_pdev) {
  1473. dp_rx_debug("%pK: pdev is null for mac_id = %d", soc, mac_id);
  1474. return mpdu_done;
  1475. }
  1476. /* if invalid peer SG list has max values free the buffers in list
  1477. * and treat current buffer as start of list
  1478. *
  1479. * current logic to detect the last buffer from attn_tlv is not reliable
  1480. * in OFDMA UL scenario hence add max buffers check to avoid list pile
  1481. * up
  1482. */
  1483. if (!dp_pdev->first_nbuf ||
  1484. (dp_pdev->invalid_peer_head_msdu &&
  1485. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST
  1486. (dp_pdev->invalid_peer_head_msdu) >= DP_MAX_INVALID_BUFFERS)) {
  1487. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  1488. dp_pdev->first_nbuf = true;
  1489. /* If the new nbuf received is the first msdu of the
  1490. * amsdu and there are msdus in the invalid peer msdu
  1491. * list, then let us free all the msdus of the invalid
  1492. * peer msdu list.
  1493. * This scenario can happen when we start receiving
  1494. * new a-msdu even before the previous a-msdu is completely
  1495. * received.
  1496. */
  1497. curr_nbuf = dp_pdev->invalid_peer_head_msdu;
  1498. while (curr_nbuf) {
  1499. tmp_nbuf = curr_nbuf->next;
  1500. dp_rx_nbuf_free(curr_nbuf);
  1501. curr_nbuf = tmp_nbuf;
  1502. }
  1503. dp_pdev->invalid_peer_head_msdu = NULL;
  1504. dp_pdev->invalid_peer_tail_msdu = NULL;
  1505. dp_monitor_get_mpdu_status(dp_pdev, soc, rx_tlv_hdr);
  1506. }
  1507. if (qdf_nbuf_is_rx_chfrag_end(nbuf) &&
  1508. hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1509. qdf_assert_always(dp_pdev->first_nbuf);
  1510. dp_pdev->first_nbuf = false;
  1511. mpdu_done = true;
  1512. }
  1513. /*
  1514. * For MCL, invalid_peer_head_msdu and invalid_peer_tail_msdu
  1515. * should be NULL here, add the checking for debugging purpose
  1516. * in case some corner case.
  1517. */
  1518. DP_PDEV_INVALID_PEER_MSDU_CHECK(dp_pdev->invalid_peer_head_msdu,
  1519. dp_pdev->invalid_peer_tail_msdu);
  1520. DP_RX_LIST_APPEND(dp_pdev->invalid_peer_head_msdu,
  1521. dp_pdev->invalid_peer_tail_msdu,
  1522. nbuf);
  1523. return mpdu_done;
  1524. }
  1525. qdf_nbuf_t
  1526. dp_rx_wbm_err_reap_desc_be(struct dp_intr *int_ctx, struct dp_soc *soc,
  1527. hal_ring_handle_t hal_ring_hdl, uint32_t quota,
  1528. uint32_t *rx_bufs_used)
  1529. {
  1530. hal_ring_desc_t ring_desc;
  1531. hal_soc_handle_t hal_soc;
  1532. struct dp_rx_desc *rx_desc;
  1533. union dp_rx_desc_list_elem_t
  1534. *head[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT] = { { NULL } };
  1535. union dp_rx_desc_list_elem_t
  1536. *tail[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT] = { { NULL } };
  1537. uint32_t rx_bufs_reaped[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT] = { { 0 } };
  1538. uint8_t buf_type;
  1539. uint8_t mac_id;
  1540. struct dp_srng *dp_rxdma_srng;
  1541. struct rx_desc_pool *rx_desc_pool;
  1542. qdf_nbuf_t nbuf_head = NULL;
  1543. qdf_nbuf_t nbuf_tail = NULL;
  1544. qdf_nbuf_t nbuf;
  1545. struct hal_wbm_err_desc_info wbm_err_info = { 0 };
  1546. uint8_t msdu_continuation = 0;
  1547. bool process_sg_buf = false;
  1548. uint32_t wbm_err_src;
  1549. QDF_STATUS status;
  1550. struct dp_soc *replenish_soc;
  1551. uint8_t chip_id;
  1552. struct hal_rx_mpdu_desc_info mpdu_desc_info = { 0 };
  1553. qdf_assert(soc && hal_ring_hdl);
  1554. hal_soc = soc->hal_soc;
  1555. qdf_assert(hal_soc);
  1556. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1557. /* TODO */
  1558. /*
  1559. * Need API to convert from hal_ring pointer to
  1560. * Ring Type / Ring Id combo
  1561. */
  1562. dp_rx_err_err("%pK: HAL RING Access Failed -- %pK",
  1563. soc, hal_ring_hdl);
  1564. goto done;
  1565. }
  1566. while (qdf_likely(quota)) {
  1567. ring_desc = hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1568. if (qdf_unlikely(!ring_desc))
  1569. break;
  1570. /* XXX */
  1571. buf_type = HAL_RX_WBM_BUF_TYPE_GET(ring_desc);
  1572. /*
  1573. * For WBM ring, expect only MSDU buffers
  1574. */
  1575. qdf_assert_always(buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF);
  1576. wbm_err_src = hal_rx_wbm_err_src_get(hal_soc, ring_desc);
  1577. qdf_assert((wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) ||
  1578. (wbm_err_src == HAL_RX_WBM_ERR_SRC_REO));
  1579. if (soc->arch_ops.dp_wbm_get_rx_desc_from_hal_desc(soc,
  1580. ring_desc,
  1581. &rx_desc)) {
  1582. dp_rx_err_err("get rx desc from hal_desc failed");
  1583. continue;
  1584. }
  1585. qdf_assert_always(rx_desc);
  1586. if (!dp_rx_desc_check_magic(rx_desc)) {
  1587. dp_rx_err_err("%pk: Invalid rx_desc %pk",
  1588. soc, rx_desc);
  1589. continue;
  1590. }
  1591. /*
  1592. * this is a unlikely scenario where the host is reaping
  1593. * a descriptor which it already reaped just a while ago
  1594. * but is yet to replenish it back to HW.
  1595. * In this case host will dump the last 128 descriptors
  1596. * including the software descriptor rx_desc and assert.
  1597. */
  1598. if (qdf_unlikely(!rx_desc->in_use)) {
  1599. DP_STATS_INC(soc, rx.err.hal_wbm_rel_dup, 1);
  1600. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1601. ring_desc, rx_desc);
  1602. continue;
  1603. }
  1604. hal_rx_wbm_err_info_get(ring_desc, &wbm_err_info, hal_soc);
  1605. nbuf = rx_desc->nbuf;
  1606. status = dp_rx_wbm_desc_nbuf_sanity_check(soc, hal_ring_hdl,
  1607. ring_desc, rx_desc);
  1608. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  1609. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1610. dp_info_rl("Rx error Nbuf %pk sanity check failure!",
  1611. nbuf);
  1612. rx_desc->in_err_state = 1;
  1613. rx_desc->unmapped = 1;
  1614. rx_bufs_reaped[rx_desc->chip_id][rx_desc->pool_id]++;
  1615. dp_rx_add_to_free_desc_list(
  1616. &head[rx_desc->chip_id][rx_desc->pool_id],
  1617. &tail[rx_desc->chip_id][rx_desc->pool_id],
  1618. rx_desc);
  1619. continue;
  1620. }
  1621. /* Get MPDU DESC info */
  1622. hal_rx_mpdu_desc_info_get(hal_soc, ring_desc, &mpdu_desc_info);
  1623. if (qdf_likely(mpdu_desc_info.mpdu_flags &
  1624. HAL_MPDU_F_QOS_CONTROL_VALID))
  1625. qdf_nbuf_set_tid_val(rx_desc->nbuf, mpdu_desc_info.tid);
  1626. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  1627. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  1628. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  1629. rx_desc->unmapped = 1;
  1630. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  1631. if (qdf_unlikely(
  1632. soc->wbm_release_desc_rx_sg_support &&
  1633. dp_rx_is_sg_formation_required(&wbm_err_info))) {
  1634. /* SG is detected from continuation bit */
  1635. msdu_continuation =
  1636. hal_rx_wbm_err_msdu_continuation_get(hal_soc,
  1637. ring_desc);
  1638. if (msdu_continuation &&
  1639. !(soc->wbm_sg_param.wbm_is_first_msdu_in_sg)) {
  1640. /* Update length from first buffer in SG */
  1641. soc->wbm_sg_param.wbm_sg_desc_msdu_len =
  1642. hal_rx_msdu_start_msdu_len_get(
  1643. soc->hal_soc,
  1644. qdf_nbuf_data(nbuf));
  1645. soc->wbm_sg_param.wbm_is_first_msdu_in_sg =
  1646. true;
  1647. }
  1648. if (msdu_continuation) {
  1649. /* MSDU continued packets */
  1650. qdf_nbuf_set_rx_chfrag_cont(nbuf, 1);
  1651. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  1652. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  1653. } else {
  1654. /* This is the terminal packet in SG */
  1655. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  1656. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  1657. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  1658. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  1659. process_sg_buf = true;
  1660. }
  1661. }
  1662. /*
  1663. * save the wbm desc info in nbuf TLV. We will need this
  1664. * info when we do the actual nbuf processing
  1665. */
  1666. wbm_err_info.pool_id = rx_desc->pool_id;
  1667. hal_rx_priv_info_set_in_tlv(soc->hal_soc,
  1668. qdf_nbuf_data(nbuf),
  1669. (uint8_t *)&wbm_err_info,
  1670. sizeof(wbm_err_info));
  1671. dp_rx_err_tlv_invalidate(soc, nbuf);
  1672. rx_bufs_reaped[rx_desc->chip_id][rx_desc->pool_id]++;
  1673. if (qdf_nbuf_is_rx_chfrag_cont(nbuf) || process_sg_buf) {
  1674. DP_RX_LIST_APPEND(soc->wbm_sg_param.wbm_sg_nbuf_head,
  1675. soc->wbm_sg_param.wbm_sg_nbuf_tail,
  1676. nbuf);
  1677. if (process_sg_buf) {
  1678. if (!dp_rx_buffer_pool_refill(
  1679. soc,
  1680. soc->wbm_sg_param.wbm_sg_nbuf_head,
  1681. rx_desc->pool_id))
  1682. DP_RX_MERGE_TWO_LIST(
  1683. nbuf_head, nbuf_tail,
  1684. soc->wbm_sg_param.wbm_sg_nbuf_head,
  1685. soc->wbm_sg_param.wbm_sg_nbuf_tail);
  1686. dp_rx_wbm_sg_list_last_msdu_war(soc);
  1687. dp_rx_wbm_sg_list_reset(soc);
  1688. process_sg_buf = false;
  1689. }
  1690. } else if (!dp_rx_buffer_pool_refill(soc, nbuf,
  1691. rx_desc->pool_id)) {
  1692. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, nbuf);
  1693. }
  1694. dp_rx_add_to_free_desc_list
  1695. (&head[rx_desc->chip_id][rx_desc->pool_id],
  1696. &tail[rx_desc->chip_id][rx_desc->pool_id], rx_desc);
  1697. /*
  1698. * if continuation bit is set then we have MSDU spread
  1699. * across multiple buffers, let us not decrement quota
  1700. * till we reap all buffers of that MSDU.
  1701. */
  1702. if (qdf_likely(!msdu_continuation))
  1703. quota -= 1;
  1704. }
  1705. done:
  1706. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1707. for (chip_id = 0; chip_id < WLAN_MAX_MLO_CHIPS; chip_id++) {
  1708. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1709. /*
  1710. * continue with next mac_id if no pkts were reaped
  1711. * from that pool
  1712. */
  1713. if (!rx_bufs_reaped[chip_id][mac_id])
  1714. continue;
  1715. replenish_soc =
  1716. soc->arch_ops.dp_rx_replenish_soc_get(soc, chip_id);
  1717. dp_rxdma_srng =
  1718. &replenish_soc->rx_refill_buf_ring[mac_id];
  1719. rx_desc_pool = &replenish_soc->rx_desc_buf[mac_id];
  1720. dp_rx_buffers_replenish(replenish_soc, mac_id,
  1721. dp_rxdma_srng,
  1722. rx_desc_pool,
  1723. rx_bufs_reaped[chip_id][mac_id],
  1724. &head[chip_id][mac_id],
  1725. &tail[chip_id][mac_id], false);
  1726. *rx_bufs_used += rx_bufs_reaped[chip_id][mac_id];
  1727. }
  1728. }
  1729. return nbuf_head;
  1730. }
  1731. QDF_STATUS
  1732. dp_rx_null_q_desc_handle_be(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1733. uint8_t *rx_tlv_hdr, uint8_t pool_id,
  1734. struct dp_txrx_peer *txrx_peer,
  1735. bool is_reo_exception,
  1736. uint8_t link_id)
  1737. {
  1738. uint32_t pkt_len;
  1739. uint16_t msdu_len;
  1740. struct dp_vdev *vdev;
  1741. uint8_t tid;
  1742. qdf_ether_header_t *eh;
  1743. struct hal_rx_msdu_metadata msdu_metadata;
  1744. uint16_t sa_idx = 0;
  1745. bool is_eapol = 0;
  1746. bool enh_flag;
  1747. qdf_nbuf_set_rx_chfrag_start(
  1748. nbuf,
  1749. hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1750. rx_tlv_hdr));
  1751. qdf_nbuf_set_rx_chfrag_end(nbuf,
  1752. hal_rx_msdu_end_last_msdu_get(soc->hal_soc,
  1753. rx_tlv_hdr));
  1754. qdf_nbuf_set_da_mcbc(nbuf, hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1755. rx_tlv_hdr));
  1756. qdf_nbuf_set_da_valid(nbuf,
  1757. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  1758. rx_tlv_hdr));
  1759. qdf_nbuf_set_sa_valid(nbuf,
  1760. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  1761. rx_tlv_hdr));
  1762. hal_rx_msdu_metadata_get(soc->hal_soc, rx_tlv_hdr, &msdu_metadata);
  1763. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1764. pkt_len = msdu_len + msdu_metadata.l3_hdr_pad + soc->rx_pkt_tlv_size;
  1765. if (qdf_likely(!qdf_nbuf_is_frag(nbuf))) {
  1766. if (dp_rx_check_pkt_len(soc, pkt_len))
  1767. goto drop_nbuf;
  1768. /* Set length in nbuf */
  1769. qdf_nbuf_set_pktlen(
  1770. nbuf, qdf_min(pkt_len, (uint32_t)RX_DATA_BUFFER_SIZE));
  1771. qdf_assert_always(nbuf->data == rx_tlv_hdr);
  1772. }
  1773. /*
  1774. * Check if DMA completed -- msdu_done is the last bit
  1775. * to be written
  1776. */
  1777. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1778. dp_err_rl("MSDU DONE failure");
  1779. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1780. QDF_TRACE_LEVEL_INFO);
  1781. qdf_assert(0);
  1782. }
  1783. if (!txrx_peer &&
  1784. dp_rx_null_q_handle_invalid_peer_id_exception(soc, pool_id,
  1785. rx_tlv_hdr, nbuf))
  1786. return QDF_STATUS_E_FAILURE;
  1787. if (!txrx_peer) {
  1788. bool mpdu_done = false;
  1789. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  1790. if (!pdev) {
  1791. dp_err_rl("pdev is null for pool_id = %d", pool_id);
  1792. return QDF_STATUS_E_FAILURE;
  1793. }
  1794. dp_err_rl("txrx_peer is NULL");
  1795. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1796. qdf_nbuf_len(nbuf));
  1797. /* QCN9000 has the support enabled */
  1798. if (qdf_unlikely(soc->wbm_release_desc_rx_sg_support)) {
  1799. mpdu_done = true;
  1800. nbuf->next = NULL;
  1801. /* Trigger invalid peer handler wrapper */
  1802. dp_rx_process_invalid_peer_wrapper(soc,
  1803. nbuf,
  1804. mpdu_done,
  1805. pool_id);
  1806. } else {
  1807. mpdu_done = soc->arch_ops.dp_rx_chain_msdus(soc, nbuf,
  1808. rx_tlv_hdr,
  1809. pool_id);
  1810. /* Trigger invalid peer handler wrapper */
  1811. dp_rx_process_invalid_peer_wrapper(
  1812. soc,
  1813. pdev->invalid_peer_head_msdu,
  1814. mpdu_done, pool_id);
  1815. }
  1816. if (mpdu_done) {
  1817. pdev->invalid_peer_head_msdu = NULL;
  1818. pdev->invalid_peer_tail_msdu = NULL;
  1819. }
  1820. return QDF_STATUS_E_FAILURE;
  1821. }
  1822. vdev = txrx_peer->vdev;
  1823. if (!vdev) {
  1824. dp_err_rl("Null vdev!");
  1825. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1826. goto drop_nbuf;
  1827. }
  1828. /*
  1829. * Advance the packet start pointer by total size of
  1830. * pre-header TLV's
  1831. */
  1832. if (qdf_nbuf_is_frag(nbuf))
  1833. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1834. else
  1835. qdf_nbuf_pull_head(nbuf, (msdu_metadata.l3_hdr_pad +
  1836. soc->rx_pkt_tlv_size));
  1837. DP_STATS_INC_PKT(vdev, rx_i.null_q_desc_pkt, 1, qdf_nbuf_len(nbuf));
  1838. dp_vdev_peer_stats_update_protocol_cnt(vdev, nbuf, NULL, 0, 1);
  1839. if (dp_rx_err_drop_3addr_mcast(vdev, rx_tlv_hdr)) {
  1840. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.mcast_3addr_drop, 1,
  1841. link_id);
  1842. goto drop_nbuf;
  1843. }
  1844. if (hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc, rx_tlv_hdr)) {
  1845. sa_idx = hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr);
  1846. if ((sa_idx < 0) ||
  1847. (sa_idx >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) {
  1848. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1849. goto drop_nbuf;
  1850. }
  1851. }
  1852. if ((!soc->mec_fw_offload) &&
  1853. dp_rx_mcast_echo_check(soc, txrx_peer, rx_tlv_hdr, nbuf)) {
  1854. /* this is a looped back MCBC pkt, drop it */
  1855. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1856. qdf_nbuf_len(nbuf), link_id);
  1857. goto drop_nbuf;
  1858. }
  1859. /*
  1860. * In qwrap mode if the received packet matches with any of the vdev
  1861. * mac addresses, drop it. Donot receive multicast packets originated
  1862. * from any proxysta.
  1863. */
  1864. if (check_qwrap_multicast_loopback(vdev, nbuf)) {
  1865. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1866. qdf_nbuf_len(nbuf), link_id);
  1867. goto drop_nbuf;
  1868. }
  1869. if (qdf_unlikely(txrx_peer->nawds_enabled &&
  1870. hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1871. rx_tlv_hdr))) {
  1872. dp_err_rl("free buffer for multicast packet");
  1873. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.nawds_mcast_drop, 1,
  1874. link_id);
  1875. goto drop_nbuf;
  1876. }
  1877. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, txrx_peer)) {
  1878. dp_err_rl("mcast Policy Check Drop pkt");
  1879. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.policy_check_drop, 1,
  1880. link_id);
  1881. goto drop_nbuf;
  1882. }
  1883. /* WDS Source Port Learning */
  1884. if (!soc->ast_offload_support &&
  1885. qdf_likely(vdev->rx_decap_type == htt_cmn_pkt_type_ethernet &&
  1886. vdev->wds_enabled))
  1887. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, txrx_peer, nbuf,
  1888. msdu_metadata);
  1889. if (hal_rx_is_unicast(soc->hal_soc, rx_tlv_hdr)) {
  1890. struct dp_peer *peer;
  1891. struct dp_rx_tid *rx_tid;
  1892. tid = hal_rx_tid_get(soc->hal_soc, rx_tlv_hdr);
  1893. peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id,
  1894. DP_MOD_ID_RX_ERR);
  1895. if (peer) {
  1896. rx_tid = &peer->rx_tid[tid];
  1897. qdf_spin_lock_bh(&rx_tid->tid_lock);
  1898. if (!peer->rx_tid[tid].hw_qdesc_vaddr_unaligned)
  1899. dp_rx_tid_setup_wifi3(peer, tid, 1,
  1900. IEEE80211_SEQ_MAX);
  1901. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  1902. /* IEEE80211_SEQ_MAX indicates invalid start_seq */
  1903. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  1904. }
  1905. }
  1906. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1907. if (!txrx_peer->authorize) {
  1908. is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  1909. qdf_nbuf_is_ipv4_wapi_pkt(nbuf);
  1910. if (is_eapol) {
  1911. if (!dp_rx_err_match_dhost(eh, vdev))
  1912. goto drop_nbuf;
  1913. } else {
  1914. goto drop_nbuf;
  1915. }
  1916. }
  1917. /*
  1918. * Drop packets in this path if cce_match is found. Packets will come
  1919. * in following path depending on whether tidQ is setup.
  1920. * 1. If tidQ is setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE and
  1921. * cce_match = 1
  1922. * Packets with WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE are already
  1923. * dropped.
  1924. * 2. If tidQ is not setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ERROR and
  1925. * cce_match = 1
  1926. * These packets need to be dropped and should not get delivered
  1927. * to stack.
  1928. */
  1929. if (qdf_unlikely(dp_rx_err_cce_drop(soc, vdev, nbuf, rx_tlv_hdr)))
  1930. goto drop_nbuf;
  1931. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  1932. qdf_nbuf_set_next(nbuf, NULL);
  1933. dp_rx_deliver_raw(vdev, nbuf, txrx_peer, link_id);
  1934. } else {
  1935. enh_flag = vdev->pdev->enhanced_stats_en;
  1936. qdf_nbuf_set_next(nbuf, NULL);
  1937. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1, qdf_nbuf_len(nbuf),
  1938. enh_flag);
  1939. /*
  1940. * Update the protocol tag in SKB based on
  1941. * CCE metadata
  1942. */
  1943. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1944. EXCEPTION_DEST_RING_ID,
  1945. true, true);
  1946. /* Update the flow tag in SKB based on FSE metadata */
  1947. dp_rx_update_flow_tag(soc, vdev, nbuf,
  1948. rx_tlv_hdr, true);
  1949. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(
  1950. soc->hal_soc, rx_tlv_hdr) &&
  1951. (vdev->rx_decap_type ==
  1952. htt_cmn_pkt_type_ethernet))) {
  1953. DP_PEER_MC_INCC_PKT(txrx_peer, 1, qdf_nbuf_len(nbuf),
  1954. enh_flag, link_id);
  1955. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost))
  1956. DP_PEER_BC_INCC_PKT(txrx_peer, 1,
  1957. qdf_nbuf_len(nbuf),
  1958. enh_flag,
  1959. link_id);
  1960. } else {
  1961. DP_PEER_UC_INCC_PKT(txrx_peer, 1,
  1962. qdf_nbuf_len(nbuf),
  1963. enh_flag,
  1964. link_id);
  1965. }
  1966. qdf_nbuf_set_exc_frame(nbuf, 1);
  1967. dp_rx_deliver_to_osif_stack(soc, vdev, txrx_peer, nbuf, NULL,
  1968. is_eapol);
  1969. }
  1970. return QDF_STATUS_SUCCESS;
  1971. drop_nbuf:
  1972. dp_rx_nbuf_free(nbuf);
  1973. return QDF_STATUS_E_FAILURE;
  1974. }