dp_main.c 101 KB

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  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <hal_api.h>
  23. #include <hif.h>
  24. #include <htt.h>
  25. #include <wdi_event.h>
  26. #include <queue.h>
  27. #include "dp_htt.h"
  28. #include "dp_types.h"
  29. #include "dp_internal.h"
  30. #include "dp_tx.h"
  31. #include "dp_rx.h"
  32. #include <cdp_txrx_handle.h>
  33. #include <wlan_cfg.h>
  34. #include "cdp_txrx_cmn_struct.h"
  35. #include <qdf_util.h>
  36. #include "dp_peer.h"
  37. #include "dp_rx_mon.h"
  38. #define DP_INTR_POLL_TIMER_MS 10
  39. #define DP_MCS_LENGTH (6*MAX_MCS)
  40. #define DP_NSS_LENGTH (6*SS_COUNT)
  41. #define DP_RXDMA_ERR_LENGTH (6*MAX_RXDMA_ERRORS)
  42. #define DP_REO_ERR_LENGTH (6*REO_ERROR_TYPE_MAX)
  43. /**
  44. * default_dscp_tid_map - Default DSCP-TID mapping
  45. *
  46. * DSCP TID AC
  47. * 000000 0 WME_AC_BE
  48. * 001000 1 WME_AC_BK
  49. * 010000 1 WME_AC_BK
  50. * 011000 0 WME_AC_BE
  51. * 100000 5 WME_AC_VI
  52. * 101000 5 WME_AC_VI
  53. * 110000 6 WME_AC_VO
  54. * 111000 6 WME_AC_VO
  55. */
  56. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  57. 0, 0, 0, 0, 0, 0, 0, 0,
  58. 1, 1, 1, 1, 1, 1, 1, 1,
  59. 1, 1, 1, 1, 1, 1, 1, 1,
  60. 0, 0, 0, 0, 0, 0, 0, 0,
  61. 5, 5, 5, 5, 5, 5, 5, 5,
  62. 5, 5, 5, 5, 5, 5, 5, 5,
  63. 6, 6, 6, 6, 6, 6, 6, 6,
  64. 6, 6, 6, 6, 6, 6, 6, 6,
  65. };
  66. /**
  67. * @brief Select the type of statistics
  68. */
  69. enum dp_stats_type {
  70. STATS_FW = 0,
  71. STATS_HOST = 1,
  72. STATS_TYPE_MAX = 2,
  73. };
  74. /**
  75. * @brief General Firmware statistics options
  76. *
  77. */
  78. enum dp_fw_stats {
  79. TXRX_FW_STATS_INVALID = -1,
  80. };
  81. /**
  82. * @brief Firmware and Host statistics
  83. * currently supported
  84. */
  85. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  86. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  87. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  88. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  89. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  90. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  91. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  92. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  93. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  94. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  95. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  96. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  97. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  98. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  99. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  100. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  101. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  102. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  103. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  104. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  105. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  106. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  107. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  108. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  109. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  110. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  111. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  112. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  113. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  114. };
  115. /**
  116. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  117. */
  118. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  119. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  120. {
  121. void *hal_soc = soc->hal_soc;
  122. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  123. /* TODO: See if we should get align size from hal */
  124. uint32_t ring_base_align = 8;
  125. struct hal_srng_params ring_params;
  126. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  127. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  128. srng->hal_srng = NULL;
  129. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  130. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  131. soc->osdev, soc->osdev->dev, srng->alloc_size,
  132. &(srng->base_paddr_unaligned));
  133. if (!srng->base_vaddr_unaligned) {
  134. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  135. FL("alloc failed - ring_type: %d, ring_num %d"),
  136. ring_type, ring_num);
  137. return QDF_STATUS_E_NOMEM;
  138. }
  139. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  140. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  141. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  142. ((unsigned long)(ring_params.ring_base_vaddr) -
  143. (unsigned long)srng->base_vaddr_unaligned);
  144. ring_params.num_entries = num_entries;
  145. /* TODO: Check MSI support and get MSI settings from HIF layer */
  146. ring_params.msi_data = 0;
  147. ring_params.msi_addr = 0;
  148. /* TODO: Setup interrupt timer and batch counter thresholds for
  149. * interrupt mitigation based on ring type
  150. */
  151. ring_params.intr_timer_thres_us = 8;
  152. ring_params.intr_batch_cntr_thres_entries = 1;
  153. /* TODO: Currently hal layer takes care of endianness related settings.
  154. * See if these settings need to passed from DP layer
  155. */
  156. ring_params.flags = 0;
  157. /* Enable low threshold interrupts for rx buffer rings (regular and
  158. * monitor buffer rings.
  159. * TODO: See if this is required for any other ring
  160. */
  161. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF)) {
  162. /* TODO: Setting low threshold to 1/8th of ring size
  163. * see if this needs to be configurable
  164. */
  165. ring_params.low_threshold = num_entries >> 3;
  166. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  167. }
  168. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  169. mac_id, &ring_params);
  170. return 0;
  171. }
  172. /**
  173. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  174. * Any buffers allocated and attached to ring entries are expected to be freed
  175. * before calling this function.
  176. */
  177. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  178. int ring_type, int ring_num)
  179. {
  180. if (!srng->hal_srng) {
  181. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  182. FL("Ring type: %d, num:%d not setup"),
  183. ring_type, ring_num);
  184. return;
  185. }
  186. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  187. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  188. srng->alloc_size,
  189. srng->base_vaddr_unaligned,
  190. srng->base_paddr_unaligned, 0);
  191. }
  192. /* TODO: Need this interface from HIF */
  193. void *hif_get_hal_handle(void *hif_handle);
  194. /*
  195. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  196. * @dp_ctx: DP SOC handle
  197. * @budget: Number of frames/descriptors that can be processed in one shot
  198. *
  199. * Return: remaining budget/quota for the soc device
  200. */
  201. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  202. {
  203. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  204. struct dp_soc *soc = int_ctx->soc;
  205. int ring = 0;
  206. uint32_t work_done = 0;
  207. uint32_t budget = dp_budget;
  208. uint8_t tx_mask = int_ctx->tx_ring_mask;
  209. uint8_t rx_mask = int_ctx->rx_ring_mask;
  210. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  211. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  212. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  213. /* Process Tx completion interrupts first to return back buffers */
  214. if (tx_mask) {
  215. for (ring = 0; ring < soc->num_tcl_data_rings; ring++) {
  216. if (tx_mask & (1 << ring)) {
  217. work_done =
  218. dp_tx_comp_handler(soc, ring, budget);
  219. budget -= work_done;
  220. if (work_done)
  221. QDF_TRACE(QDF_MODULE_ID_DP,
  222. QDF_TRACE_LEVEL_INFO,
  223. "tx mask 0x%x ring %d,"
  224. "budget %d",
  225. tx_mask, ring, budget);
  226. if (budget <= 0)
  227. goto budget_done;
  228. }
  229. }
  230. }
  231. /* Process REO Exception ring interrupt */
  232. if (rx_err_mask) {
  233. work_done = dp_rx_err_process(soc,
  234. soc->reo_exception_ring.hal_srng, budget);
  235. budget -= work_done;
  236. if (work_done)
  237. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  238. "REO Exception Ring: work_done %d budget %d",
  239. work_done, budget);
  240. if (budget <= 0) {
  241. goto budget_done;
  242. }
  243. }
  244. /* Process Rx WBM release ring interrupt */
  245. if (rx_wbm_rel_mask) {
  246. work_done = dp_rx_wbm_err_process(soc,
  247. soc->rx_rel_ring.hal_srng, budget);
  248. budget -= work_done;
  249. if (work_done)
  250. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  251. "WBM Release Ring: work_done %d budget %d",
  252. work_done, budget);
  253. if (budget <= 0) {
  254. goto budget_done;
  255. }
  256. }
  257. /* Process Rx interrupts */
  258. if (rx_mask) {
  259. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  260. if (rx_mask & (1 << ring)) {
  261. work_done =
  262. dp_rx_process(int_ctx,
  263. soc->reo_dest_ring[ring].hal_srng,
  264. budget);
  265. budget -= work_done;
  266. if (work_done)
  267. QDF_TRACE(QDF_MODULE_ID_DP,
  268. QDF_TRACE_LEVEL_INFO,
  269. "rx mask 0x%x ring %d,"
  270. "budget %d",
  271. tx_mask, ring, budget);
  272. if (budget <= 0)
  273. goto budget_done;
  274. }
  275. }
  276. }
  277. if (reo_status_mask)
  278. dp_reo_status_ring_handler(soc);
  279. /* Process Rx monitor interrupts */
  280. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  281. if (int_ctx->rx_mon_ring_mask & (1 << ring)) {
  282. work_done =
  283. dp_mon_process(soc, ring, budget);
  284. budget -= work_done;
  285. }
  286. }
  287. qdf_lro_flush(int_ctx->lro_ctx);
  288. budget_done:
  289. return dp_budget - budget;
  290. }
  291. /* dp_interrupt_timer()- timer poll for interrupts
  292. *
  293. * @arg: SoC Handle
  294. *
  295. * Return:
  296. *
  297. */
  298. #ifdef DP_INTR_POLL_BASED
  299. static void dp_interrupt_timer(void *arg)
  300. {
  301. struct dp_soc *soc = (struct dp_soc *) arg;
  302. int i;
  303. if (qdf_atomic_read(&soc->cmn_init_done)) {
  304. for (i = 0;
  305. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  306. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  307. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  308. }
  309. }
  310. /*
  311. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  312. * @txrx_soc: DP SOC handle
  313. *
  314. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  315. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  316. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  317. *
  318. * Return: 0 for success. nonzero for failure.
  319. */
  320. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  321. {
  322. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  323. int i;
  324. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  325. soc->intr_ctx[i].tx_ring_mask = 0xF;
  326. soc->intr_ctx[i].rx_ring_mask = 0xF;
  327. soc->intr_ctx[i].rx_mon_ring_mask = 0x1;
  328. soc->intr_ctx[i].rx_err_ring_mask = 0x1;
  329. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0x1;
  330. soc->intr_ctx[i].reo_status_ring_mask = 0x1;
  331. soc->intr_ctx[i].soc = soc;
  332. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  333. }
  334. qdf_timer_init(soc->osdev, &soc->int_timer,
  335. dp_interrupt_timer, (void *)soc,
  336. QDF_TIMER_TYPE_WAKE_APPS);
  337. return QDF_STATUS_SUCCESS;
  338. }
  339. /*
  340. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  341. * @txrx_soc: DP SOC handle
  342. *
  343. * Return: void
  344. */
  345. static void dp_soc_interrupt_detach(void *txrx_soc)
  346. {
  347. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  348. qdf_timer_stop(&soc->int_timer);
  349. qdf_timer_free(&soc->int_timer);
  350. }
  351. #else
  352. /*
  353. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  354. * @txrx_soc: DP SOC handle
  355. *
  356. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  357. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  358. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  359. *
  360. * Return: 0 for success. nonzero for failure.
  361. */
  362. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  363. {
  364. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  365. int i = 0;
  366. int num_irq = 0;
  367. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  368. int j = 0;
  369. int ret = 0;
  370. /* Map of IRQ ids registered with one interrupt context */
  371. int irq_id_map[HIF_MAX_GRP_IRQ];
  372. int tx_mask =
  373. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  374. int rx_mask =
  375. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  376. int rx_mon_mask =
  377. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  378. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  379. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  380. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  381. soc->intr_ctx[i].soc = soc;
  382. num_irq = 0;
  383. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  384. if (tx_mask & (1 << j)) {
  385. irq_id_map[num_irq++] =
  386. (wbm2host_tx_completions_ring1 - j);
  387. }
  388. if (rx_mask & (1 << j)) {
  389. irq_id_map[num_irq++] =
  390. (reo2host_destination_ring1 - j);
  391. }
  392. if (rx_mon_mask & (1 << j)) {
  393. irq_id_map[num_irq++] =
  394. (rxdma2host_monitor_destination_mac1
  395. - j);
  396. }
  397. }
  398. ret = hif_register_ext_group_int_handler(soc->hif_handle,
  399. num_irq, irq_id_map,
  400. dp_service_srngs,
  401. &soc->intr_ctx[i]);
  402. if (ret) {
  403. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  404. FL("failed, ret = %d"), ret);
  405. return QDF_STATUS_E_FAILURE;
  406. }
  407. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  408. }
  409. hif_configure_ext_group_interrupts(soc->hif_handle);
  410. return QDF_STATUS_SUCCESS;
  411. }
  412. /*
  413. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  414. * @txrx_soc: DP SOC handle
  415. *
  416. * Return: void
  417. */
  418. static void dp_soc_interrupt_detach(void *txrx_soc)
  419. {
  420. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  421. int i;
  422. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  423. soc->intr_ctx[i].tx_ring_mask = 0;
  424. soc->intr_ctx[i].rx_ring_mask = 0;
  425. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  426. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  427. }
  428. }
  429. #endif
  430. #define AVG_MAX_MPDUS_PER_TID 128
  431. #define AVG_TIDS_PER_CLIENT 2
  432. #define AVG_FLOWS_PER_TID 2
  433. #define AVG_MSDUS_PER_FLOW 128
  434. #define AVG_MSDUS_PER_MPDU 4
  435. /*
  436. * Allocate and setup link descriptor pool that will be used by HW for
  437. * various link and queue descriptors and managed by WBM
  438. */
  439. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  440. {
  441. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  442. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  443. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  444. uint32_t num_mpdus_per_link_desc =
  445. hal_num_mpdus_per_link_desc(soc->hal_soc);
  446. uint32_t num_msdus_per_link_desc =
  447. hal_num_msdus_per_link_desc(soc->hal_soc);
  448. uint32_t num_mpdu_links_per_queue_desc =
  449. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  450. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  451. uint32_t total_link_descs, total_mem_size;
  452. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  453. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  454. uint32_t num_link_desc_banks;
  455. uint32_t last_bank_size = 0;
  456. uint32_t entry_size, num_entries;
  457. int i;
  458. /* Only Tx queue descriptors are allocated from common link descriptor
  459. * pool Rx queue descriptors are not included in this because (REO queue
  460. * extension descriptors) they are expected to be allocated contiguously
  461. * with REO queue descriptors
  462. */
  463. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  464. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  465. num_mpdu_queue_descs = num_mpdu_link_descs /
  466. num_mpdu_links_per_queue_desc;
  467. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  468. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  469. num_msdus_per_link_desc;
  470. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  471. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  472. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  473. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  474. /* Round up to power of 2 */
  475. total_link_descs = 1;
  476. while (total_link_descs < num_entries)
  477. total_link_descs <<= 1;
  478. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  479. FL("total_link_descs: %u, link_desc_size: %d"),
  480. total_link_descs, link_desc_size);
  481. total_mem_size = total_link_descs * link_desc_size;
  482. total_mem_size += link_desc_align;
  483. if (total_mem_size <= max_alloc_size) {
  484. num_link_desc_banks = 0;
  485. last_bank_size = total_mem_size;
  486. } else {
  487. num_link_desc_banks = (total_mem_size) /
  488. (max_alloc_size - link_desc_align);
  489. last_bank_size = total_mem_size %
  490. (max_alloc_size - link_desc_align);
  491. }
  492. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  493. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  494. total_mem_size, num_link_desc_banks);
  495. for (i = 0; i < num_link_desc_banks; i++) {
  496. soc->link_desc_banks[i].base_vaddr_unaligned =
  497. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  498. max_alloc_size,
  499. &(soc->link_desc_banks[i].base_paddr_unaligned));
  500. soc->link_desc_banks[i].size = max_alloc_size;
  501. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  502. soc->link_desc_banks[i].base_vaddr_unaligned) +
  503. ((unsigned long)(
  504. soc->link_desc_banks[i].base_vaddr_unaligned) %
  505. link_desc_align));
  506. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  507. soc->link_desc_banks[i].base_paddr_unaligned) +
  508. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  509. (unsigned long)(
  510. soc->link_desc_banks[i].base_vaddr_unaligned));
  511. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  512. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  513. FL("Link descriptor memory alloc failed"));
  514. goto fail;
  515. }
  516. }
  517. if (last_bank_size) {
  518. /* Allocate last bank in case total memory required is not exact
  519. * multiple of max_alloc_size
  520. */
  521. soc->link_desc_banks[i].base_vaddr_unaligned =
  522. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  523. last_bank_size,
  524. &(soc->link_desc_banks[i].base_paddr_unaligned));
  525. soc->link_desc_banks[i].size = last_bank_size;
  526. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  527. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  528. ((unsigned long)(
  529. soc->link_desc_banks[i].base_vaddr_unaligned) %
  530. link_desc_align));
  531. soc->link_desc_banks[i].base_paddr =
  532. (unsigned long)(
  533. soc->link_desc_banks[i].base_paddr_unaligned) +
  534. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  535. (unsigned long)(
  536. soc->link_desc_banks[i].base_vaddr_unaligned));
  537. }
  538. /* Allocate and setup link descriptor idle list for HW internal use */
  539. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  540. total_mem_size = entry_size * total_link_descs;
  541. if (total_mem_size <= max_alloc_size) {
  542. void *desc;
  543. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  544. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  545. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  546. FL("Link desc idle ring setup failed"));
  547. goto fail;
  548. }
  549. hal_srng_access_start_unlocked(soc->hal_soc,
  550. soc->wbm_idle_link_ring.hal_srng);
  551. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  552. soc->link_desc_banks[i].base_paddr; i++) {
  553. uint32_t num_entries = (soc->link_desc_banks[i].size -
  554. (unsigned long)(
  555. soc->link_desc_banks[i].base_vaddr) -
  556. (unsigned long)(
  557. soc->link_desc_banks[i].base_vaddr_unaligned))
  558. / link_desc_size;
  559. unsigned long paddr = (unsigned long)(
  560. soc->link_desc_banks[i].base_paddr);
  561. while (num_entries && (desc = hal_srng_src_get_next(
  562. soc->hal_soc,
  563. soc->wbm_idle_link_ring.hal_srng))) {
  564. hal_set_link_desc_addr(desc, i, paddr);
  565. num_entries--;
  566. paddr += link_desc_size;
  567. }
  568. }
  569. hal_srng_access_end_unlocked(soc->hal_soc,
  570. soc->wbm_idle_link_ring.hal_srng);
  571. } else {
  572. uint32_t num_scatter_bufs;
  573. uint32_t num_entries_per_buf;
  574. uint32_t rem_entries;
  575. uint8_t *scatter_buf_ptr;
  576. uint16_t scatter_buf_num;
  577. soc->wbm_idle_scatter_buf_size =
  578. hal_idle_list_scatter_buf_size(soc->hal_soc);
  579. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  580. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  581. num_scatter_bufs = (total_mem_size /
  582. soc->wbm_idle_scatter_buf_size) + (total_mem_size %
  583. soc->wbm_idle_scatter_buf_size) ? 1 : 0;
  584. for (i = 0; i < num_scatter_bufs; i++) {
  585. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  586. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  587. soc->wbm_idle_scatter_buf_size,
  588. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  589. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  590. QDF_TRACE(QDF_MODULE_ID_DP,
  591. QDF_TRACE_LEVEL_ERROR,
  592. FL("Scatter list memory alloc failed"));
  593. goto fail;
  594. }
  595. }
  596. /* Populate idle list scatter buffers with link descriptor
  597. * pointers
  598. */
  599. scatter_buf_num = 0;
  600. scatter_buf_ptr = (uint8_t *)(
  601. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  602. rem_entries = num_entries_per_buf;
  603. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  604. soc->link_desc_banks[i].base_paddr; i++) {
  605. uint32_t num_link_descs =
  606. (soc->link_desc_banks[i].size -
  607. (unsigned long)(
  608. soc->link_desc_banks[i].base_vaddr) -
  609. (unsigned long)(
  610. soc->link_desc_banks[i].base_vaddr_unaligned)) /
  611. link_desc_size;
  612. unsigned long paddr = (unsigned long)(
  613. soc->link_desc_banks[i].base_paddr);
  614. void *desc = NULL;
  615. while (num_link_descs && (desc =
  616. hal_srng_src_get_next(soc->hal_soc,
  617. soc->wbm_idle_link_ring.hal_srng))) {
  618. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  619. i, paddr);
  620. num_link_descs--;
  621. paddr += link_desc_size;
  622. if (rem_entries) {
  623. rem_entries--;
  624. scatter_buf_ptr += link_desc_size;
  625. } else {
  626. rem_entries = num_entries_per_buf;
  627. scatter_buf_num++;
  628. scatter_buf_ptr = (uint8_t *)(
  629. soc->wbm_idle_scatter_buf_base_vaddr[
  630. scatter_buf_num]);
  631. }
  632. }
  633. }
  634. /* Setup link descriptor idle list in HW */
  635. hal_setup_link_idle_list(soc->hal_soc,
  636. soc->wbm_idle_scatter_buf_base_paddr,
  637. soc->wbm_idle_scatter_buf_base_vaddr,
  638. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  639. (uint32_t)(scatter_buf_ptr -
  640. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  641. scatter_buf_num])));
  642. }
  643. return 0;
  644. fail:
  645. if (soc->wbm_idle_link_ring.hal_srng) {
  646. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  647. WBM_IDLE_LINK, 0);
  648. }
  649. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  650. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  651. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  652. soc->wbm_idle_scatter_buf_size,
  653. soc->wbm_idle_scatter_buf_base_vaddr[i],
  654. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  655. }
  656. }
  657. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  658. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  659. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  660. soc->link_desc_banks[i].size,
  661. soc->link_desc_banks[i].base_vaddr_unaligned,
  662. soc->link_desc_banks[i].base_paddr_unaligned,
  663. 0);
  664. }
  665. }
  666. return QDF_STATUS_E_FAILURE;
  667. }
  668. #ifdef notused
  669. /*
  670. * Free link descriptor pool that was setup HW
  671. */
  672. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  673. {
  674. int i;
  675. if (soc->wbm_idle_link_ring.hal_srng) {
  676. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  677. WBM_IDLE_LINK, 0);
  678. }
  679. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  680. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  681. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  682. soc->wbm_idle_scatter_buf_size,
  683. soc->wbm_idle_scatter_buf_base_vaddr[i],
  684. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  685. }
  686. }
  687. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  688. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  689. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  690. soc->link_desc_banks[i].size,
  691. soc->link_desc_banks[i].base_vaddr_unaligned,
  692. soc->link_desc_banks[i].base_paddr_unaligned,
  693. 0);
  694. }
  695. }
  696. }
  697. #endif /* notused */
  698. /* TODO: Following should be configurable */
  699. #define WBM_RELEASE_RING_SIZE 64
  700. #define TCL_DATA_RING_SIZE 512
  701. #define TX_COMP_RING_SIZE 1024
  702. #define TCL_CMD_RING_SIZE 32
  703. #define TCL_STATUS_RING_SIZE 32
  704. #define REO_DST_RING_SIZE 2048
  705. #define REO_REINJECT_RING_SIZE 32
  706. #define RX_RELEASE_RING_SIZE 1024
  707. #define REO_EXCEPTION_RING_SIZE 128
  708. #define REO_CMD_RING_SIZE 32
  709. #define REO_STATUS_RING_SIZE 32
  710. #define RXDMA_BUF_RING_SIZE 1024
  711. #define RXDMA_REFILL_RING_SIZE 2048
  712. #define RXDMA_MONITOR_BUF_RING_SIZE 1024
  713. #define RXDMA_MONITOR_DST_RING_SIZE 1024
  714. #define RXDMA_MONITOR_STATUS_RING_SIZE 1024
  715. #define RXDMA_MONITOR_DESC_RING_SIZE 1024
  716. /*
  717. * dp_soc_cmn_setup() - Common SoC level initializion
  718. * @soc: Datapath SOC handle
  719. *
  720. * This is an internal function used to setup common SOC data structures,
  721. * to be called from PDEV attach after receiving HW mode capabilities from FW
  722. */
  723. static int dp_soc_cmn_setup(struct dp_soc *soc)
  724. {
  725. int i;
  726. struct hal_reo_params reo_params;
  727. if (qdf_atomic_read(&soc->cmn_init_done))
  728. return 0;
  729. if (dp_peer_find_attach(soc))
  730. goto fail0;
  731. if (dp_hw_link_desc_pool_setup(soc))
  732. goto fail1;
  733. /* Setup SRNG rings */
  734. /* Common rings */
  735. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  736. WBM_RELEASE_RING_SIZE)) {
  737. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  738. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  739. goto fail1;
  740. }
  741. soc->num_tcl_data_rings = 0;
  742. /* Tx data rings */
  743. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  744. soc->num_tcl_data_rings =
  745. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  746. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  747. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  748. TCL_DATA, i, 0, TCL_DATA_RING_SIZE)) {
  749. QDF_TRACE(QDF_MODULE_ID_DP,
  750. QDF_TRACE_LEVEL_ERROR,
  751. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  752. goto fail1;
  753. }
  754. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  755. WBM2SW_RELEASE, i, 0, TX_COMP_RING_SIZE)) {
  756. QDF_TRACE(QDF_MODULE_ID_DP,
  757. QDF_TRACE_LEVEL_ERROR,
  758. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  759. goto fail1;
  760. }
  761. }
  762. } else {
  763. /* This will be incremented during per pdev ring setup */
  764. soc->num_tcl_data_rings = 0;
  765. }
  766. if (dp_tx_soc_attach(soc)) {
  767. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  768. FL("dp_tx_soc_attach failed"));
  769. goto fail1;
  770. }
  771. /* TCL command and status rings */
  772. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  773. TCL_CMD_RING_SIZE)) {
  774. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  775. FL("dp_srng_setup failed for tcl_cmd_ring"));
  776. goto fail1;
  777. }
  778. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  779. TCL_STATUS_RING_SIZE)) {
  780. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  781. FL("dp_srng_setup failed for tcl_status_ring"));
  782. goto fail1;
  783. }
  784. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  785. * descriptors
  786. */
  787. /* Rx data rings */
  788. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  789. soc->num_reo_dest_rings =
  790. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  791. QDF_TRACE(QDF_MODULE_ID_DP,
  792. QDF_TRACE_LEVEL_ERROR,
  793. FL("num_reo_dest_rings %d\n"), soc->num_reo_dest_rings);
  794. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  795. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  796. i, 0, REO_DST_RING_SIZE)) {
  797. QDF_TRACE(QDF_MODULE_ID_DP,
  798. QDF_TRACE_LEVEL_ERROR,
  799. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  800. goto fail1;
  801. }
  802. }
  803. } else {
  804. /* This will be incremented during per pdev ring setup */
  805. soc->num_reo_dest_rings = 0;
  806. }
  807. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  808. /* REO reinjection ring */
  809. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  810. REO_REINJECT_RING_SIZE)) {
  811. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  812. FL("dp_srng_setup failed for reo_reinject_ring"));
  813. goto fail1;
  814. }
  815. /* Rx release ring */
  816. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  817. RX_RELEASE_RING_SIZE)) {
  818. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  819. FL("dp_srng_setup failed for rx_rel_ring"));
  820. goto fail1;
  821. }
  822. /* Rx exception ring */
  823. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  824. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  825. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  826. FL("dp_srng_setup failed for reo_exception_ring"));
  827. goto fail1;
  828. }
  829. /* REO command and status rings */
  830. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  831. REO_CMD_RING_SIZE)) {
  832. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  833. FL("dp_srng_setup failed for reo_cmd_ring"));
  834. goto fail1;
  835. }
  836. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  837. TAILQ_INIT(&soc->rx.reo_cmd_list);
  838. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  839. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  840. REO_STATUS_RING_SIZE)) {
  841. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  842. FL("dp_srng_setup failed for reo_status_ring"));
  843. goto fail1;
  844. }
  845. dp_soc_interrupt_attach(soc);
  846. /* Setup HW REO */
  847. qdf_mem_zero(&reo_params, sizeof(reo_params));
  848. if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx))
  849. reo_params.rx_hash_enabled = true;
  850. hal_reo_setup(soc->hal_soc, &reo_params);
  851. qdf_atomic_set(&soc->cmn_init_done, 1);
  852. return 0;
  853. fail1:
  854. /*
  855. * Cleanup will be done as part of soc_detach, which will
  856. * be called on pdev attach failure
  857. */
  858. fail0:
  859. return QDF_STATUS_E_FAILURE;
  860. }
  861. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  862. static void dp_lro_hash_setup(struct dp_soc *soc)
  863. {
  864. struct cdp_lro_hash_config lro_hash;
  865. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  866. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  867. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  868. FL("LRO disabled RX hash disabled"));
  869. return;
  870. }
  871. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  872. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  873. lro_hash.lro_enable = 1;
  874. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  875. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  876. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  877. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  878. }
  879. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR, FL("enabled"));
  880. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  881. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  882. LRO_IPV4_SEED_ARR_SZ));
  883. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  884. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  885. LRO_IPV6_SEED_ARR_SZ));
  886. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  887. "lro_hash: lro_enable: 0x%x"
  888. "lro_hash: tcp_flag 0x%x tcp_flag_mask 0x%x",
  889. lro_hash.lro_enable, lro_hash.tcp_flag,
  890. lro_hash.tcp_flag_mask);
  891. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  892. FL("lro_hash: toeplitz_hash_ipv4:"));
  893. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  894. QDF_TRACE_LEVEL_ERROR,
  895. (void *)lro_hash.toeplitz_hash_ipv4,
  896. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  897. LRO_IPV4_SEED_ARR_SZ));
  898. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  899. FL("lro_hash: toeplitz_hash_ipv6:"));
  900. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  901. QDF_TRACE_LEVEL_ERROR,
  902. (void *)lro_hash.toeplitz_hash_ipv6,
  903. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  904. LRO_IPV6_SEED_ARR_SZ));
  905. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  906. if (soc->cdp_soc.ol_ops->lro_hash_config)
  907. (void)soc->cdp_soc.ol_ops->lro_hash_config
  908. (soc->osif_soc, &lro_hash);
  909. }
  910. /*
  911. * dp_rxdma_ring_setup() - configure the RX DMA rings
  912. * @soc: data path SoC handle
  913. * @pdev: Physical device handle
  914. *
  915. * Return: 0 - success, > 0 - failure
  916. */
  917. #ifdef QCA_HOST2FW_RXBUF_RING
  918. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  919. struct dp_pdev *pdev)
  920. {
  921. int max_mac_rings =
  922. wlan_cfg_get_num_mac_rings
  923. (pdev->wlan_cfg_ctx);
  924. int i;
  925. for (i = 0; i < max_mac_rings; i++) {
  926. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  927. "%s: pdev_id %d mac_id %d\n",
  928. __func__, pdev->pdev_id, i);
  929. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  930. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  931. QDF_TRACE(QDF_MODULE_ID_DP,
  932. QDF_TRACE_LEVEL_ERROR,
  933. FL("failed rx mac ring setup"));
  934. return QDF_STATUS_E_FAILURE;
  935. }
  936. }
  937. return QDF_STATUS_SUCCESS;
  938. }
  939. #else
  940. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  941. struct dp_pdev *pdev)
  942. {
  943. return QDF_STATUS_SUCCESS;
  944. }
  945. #endif
  946. /**
  947. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  948. * @pdev - DP_PDEV handle
  949. *
  950. * Return: void
  951. */
  952. static inline void
  953. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  954. {
  955. uint8_t map_id;
  956. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  957. qdf_mem_copy(pdev->dscp_tid_map[map_id], default_dscp_tid_map,
  958. sizeof(default_dscp_tid_map));
  959. }
  960. for (map_id = 0; map_id < HAL_MAX_HW_DSCP_TID_MAPS; map_id++) {
  961. hal_tx_set_dscp_tid_map(pdev->soc->hal_soc,
  962. pdev->dscp_tid_map[map_id],
  963. map_id);
  964. }
  965. }
  966. /*
  967. * dp_pdev_attach_wifi3() - attach txrx pdev
  968. * @osif_pdev: Opaque PDEV handle from OSIF/HDD
  969. * @txrx_soc: Datapath SOC handle
  970. * @htc_handle: HTC handle for host-target interface
  971. * @qdf_osdev: QDF OS device
  972. * @pdev_id: PDEV ID
  973. *
  974. * Return: DP PDEV handle on success, NULL on failure
  975. */
  976. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  977. struct cdp_cfg *ctrl_pdev,
  978. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  979. {
  980. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  981. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  982. if (!pdev) {
  983. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  984. FL("DP PDEV memory allocation failed"));
  985. goto fail0;
  986. }
  987. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  988. if (!pdev->wlan_cfg_ctx) {
  989. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  990. FL("pdev cfg_attach failed"));
  991. qdf_mem_free(pdev);
  992. goto fail0;
  993. }
  994. pdev->soc = soc;
  995. pdev->osif_pdev = ctrl_pdev;
  996. pdev->pdev_id = pdev_id;
  997. soc->pdev_list[pdev_id] = pdev;
  998. soc->pdev_count++;
  999. TAILQ_INIT(&pdev->vdev_list);
  1000. pdev->vdev_count = 0;
  1001. if (dp_soc_cmn_setup(soc)) {
  1002. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1003. FL("dp_soc_cmn_setup failed"));
  1004. goto fail1;
  1005. }
  1006. /* Setup per PDEV TCL rings if configured */
  1007. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1008. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  1009. pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  1010. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1011. FL("dp_srng_setup failed for tcl_data_ring"));
  1012. goto fail1;
  1013. }
  1014. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  1015. WBM2SW_RELEASE, pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  1016. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1017. FL("dp_srng_setup failed for tx_comp_ring"));
  1018. goto fail1;
  1019. }
  1020. soc->num_tcl_data_rings++;
  1021. }
  1022. /* Tx specific init */
  1023. if (dp_tx_pdev_attach(pdev)) {
  1024. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1025. FL("dp_tx_pdev_attach failed"));
  1026. goto fail1;
  1027. }
  1028. /* Setup per PDEV REO rings if configured */
  1029. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1030. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  1031. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  1032. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1033. FL("dp_srng_setup failed for reo_dest_ringn"));
  1034. goto fail1;
  1035. }
  1036. soc->num_reo_dest_rings++;
  1037. }
  1038. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  1039. RXDMA_REFILL_RING_SIZE)) {
  1040. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1041. FL("dp_srng_setup failed rx refill ring"));
  1042. goto fail1;
  1043. }
  1044. if (dp_rxdma_ring_setup(soc, pdev)) {
  1045. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1046. FL("RXDMA ring config failed"));
  1047. goto fail1;
  1048. }
  1049. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0,
  1050. pdev_id, RXDMA_MONITOR_BUF_RING_SIZE)) {
  1051. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1052. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  1053. goto fail1;
  1054. }
  1055. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0,
  1056. pdev_id, RXDMA_MONITOR_DST_RING_SIZE)) {
  1057. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1058. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  1059. goto fail1;
  1060. }
  1061. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring,
  1062. RXDMA_MONITOR_STATUS, 0, pdev_id,
  1063. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  1064. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1065. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  1066. goto fail1;
  1067. }
  1068. if (dp_srng_setup(soc, &pdev->rxdma_mon_desc_ring,
  1069. RXDMA_MONITOR_DESC, 0, pdev_id, RXDMA_MONITOR_DESC_RING_SIZE)) {
  1070. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1071. "dp_srng_setup failed for rxdma_mon_desc_ring\n");
  1072. goto fail1;
  1073. }
  1074. /* Rx specific init */
  1075. if (dp_rx_pdev_attach(pdev)) {
  1076. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1077. FL("dp_rx_pdev_attach failed "));
  1078. goto fail0;
  1079. }
  1080. DP_STATS_INIT(pdev);
  1081. #ifndef CONFIG_WIN
  1082. /* MCL */
  1083. dp_local_peer_id_pool_init(pdev);
  1084. #endif
  1085. dp_dscp_tid_map_setup(pdev);
  1086. /* Rx monitor mode specific init */
  1087. if (dp_rx_pdev_mon_attach(pdev)) {
  1088. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1089. "dp_rx_pdev_attach failed\n");
  1090. goto fail0;
  1091. }
  1092. /* set the reo destination to 1 during initialization */
  1093. pdev->reo_dest = 1;
  1094. return (struct cdp_pdev *)pdev;
  1095. fail1:
  1096. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  1097. fail0:
  1098. return NULL;
  1099. }
  1100. /*
  1101. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  1102. * @soc: data path SoC handle
  1103. * @pdev: Physical device handle
  1104. *
  1105. * Return: void
  1106. */
  1107. #ifdef QCA_HOST2FW_RXBUF_RING
  1108. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  1109. struct dp_pdev *pdev)
  1110. {
  1111. int max_mac_rings =
  1112. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  1113. int i;
  1114. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  1115. max_mac_rings : MAX_RX_MAC_RINGS;
  1116. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  1117. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  1118. RXDMA_BUF, 1);
  1119. }
  1120. #else
  1121. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  1122. struct dp_pdev *pdev)
  1123. {
  1124. }
  1125. #endif
  1126. /*
  1127. * dp_pdev_detach_wifi3() - detach txrx pdev
  1128. * @txrx_pdev: Datapath PDEV handle
  1129. * @force: Force detach
  1130. *
  1131. */
  1132. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  1133. {
  1134. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  1135. struct dp_soc *soc = pdev->soc;
  1136. dp_tx_pdev_detach(pdev);
  1137. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1138. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  1139. TCL_DATA, pdev->pdev_id);
  1140. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  1141. WBM2SW_RELEASE, pdev->pdev_id);
  1142. }
  1143. dp_rx_pdev_detach(pdev);
  1144. dp_rx_pdev_mon_detach(pdev);
  1145. /* Setup per PDEV REO rings if configured */
  1146. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1147. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  1148. REO_DST, pdev->pdev_id);
  1149. }
  1150. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  1151. dp_rxdma_ring_cleanup(soc, pdev);
  1152. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0);
  1153. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0);
  1154. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring,
  1155. RXDMA_MONITOR_STATUS, 0);
  1156. dp_srng_cleanup(soc, &pdev->rxdma_mon_desc_ring,
  1157. RXDMA_MONITOR_DESC, 0);
  1158. soc->pdev_list[pdev->pdev_id] = NULL;
  1159. soc->pdev_count--;
  1160. qdf_mem_free(pdev);
  1161. }
  1162. /*
  1163. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  1164. * @soc: DP SOC handle
  1165. */
  1166. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  1167. {
  1168. struct reo_desc_list_node *desc;
  1169. struct dp_rx_tid *rx_tid;
  1170. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  1171. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  1172. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  1173. rx_tid = &desc->rx_tid;
  1174. qdf_mem_unmap_nbytes_single(soc->osdev,
  1175. rx_tid->hw_qdesc_paddr,
  1176. QDF_DMA_BIDIRECTIONAL,
  1177. rx_tid->hw_qdesc_alloc_size);
  1178. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  1179. qdf_mem_free(desc);
  1180. }
  1181. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  1182. qdf_list_destroy(&soc->reo_desc_freelist);
  1183. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  1184. }
  1185. /*
  1186. * dp_soc_detach_wifi3() - Detach txrx SOC
  1187. * @txrx_soc: DP SOC handle
  1188. *
  1189. */
  1190. static void dp_soc_detach_wifi3(void *txrx_soc)
  1191. {
  1192. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1193. int i;
  1194. qdf_atomic_set(&soc->cmn_init_done, 0);
  1195. dp_soc_interrupt_detach(soc);
  1196. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1197. if (soc->pdev_list[i])
  1198. dp_pdev_detach_wifi3(
  1199. (struct cdp_pdev *)soc->pdev_list[i], 1);
  1200. }
  1201. dp_peer_find_detach(soc);
  1202. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  1203. * SW descriptors
  1204. */
  1205. /* Free the ring memories */
  1206. /* Common rings */
  1207. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  1208. /* Tx data rings */
  1209. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1210. dp_tx_soc_detach(soc);
  1211. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1212. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  1213. TCL_DATA, i);
  1214. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  1215. WBM2SW_RELEASE, i);
  1216. }
  1217. }
  1218. /* TCL command and status rings */
  1219. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  1220. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  1221. /* Rx data rings */
  1222. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1223. soc->num_reo_dest_rings =
  1224. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1225. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1226. /* TODO: Get number of rings and ring sizes
  1227. * from wlan_cfg
  1228. */
  1229. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  1230. REO_DST, i);
  1231. }
  1232. }
  1233. /* REO reinjection ring */
  1234. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  1235. /* Rx release ring */
  1236. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  1237. /* Rx exception ring */
  1238. /* TODO: Better to store ring_type and ring_num in
  1239. * dp_srng during setup
  1240. */
  1241. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  1242. /* REO command and status rings */
  1243. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  1244. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  1245. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  1246. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  1247. htt_soc_detach(soc->htt_handle);
  1248. dp_reo_desc_freelist_destroy(soc);
  1249. qdf_mem_free(soc);
  1250. }
  1251. /*
  1252. * dp_rxdma_ring_config() - configure the RX DMA rings
  1253. *
  1254. * This function is used to configure the MAC rings.
  1255. * On MCL host provides buffers in Host2FW ring
  1256. * FW refills (copies) buffers to the ring and updates
  1257. * ring_idx in register
  1258. *
  1259. * @soc: data path SoC handle
  1260. * @pdev: Physical device handle
  1261. *
  1262. * Return: void
  1263. */
  1264. #ifdef QCA_HOST2FW_RXBUF_RING
  1265. static void dp_rxdma_ring_config(struct dp_soc *soc)
  1266. {
  1267. int i;
  1268. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1269. struct dp_pdev *pdev = soc->pdev_list[i];
  1270. if (pdev) {
  1271. int mac_id = 0;
  1272. int j;
  1273. bool dbs_enable = 0;
  1274. int max_mac_rings =
  1275. wlan_cfg_get_num_mac_rings
  1276. (pdev->wlan_cfg_ctx);
  1277. htt_srng_setup(soc->htt_handle, 0,
  1278. pdev->rx_refill_buf_ring.hal_srng,
  1279. RXDMA_BUF);
  1280. if (soc->cdp_soc.ol_ops->
  1281. is_hw_dbs_2x2_capable) {
  1282. dbs_enable = soc->cdp_soc.ol_ops->
  1283. is_hw_dbs_2x2_capable(soc->psoc);
  1284. }
  1285. if (dbs_enable) {
  1286. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1287. QDF_TRACE_LEVEL_ERROR,
  1288. FL("DBS enabled max_mac_rings %d\n"),
  1289. max_mac_rings);
  1290. } else {
  1291. max_mac_rings = 1;
  1292. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1293. QDF_TRACE_LEVEL_ERROR,
  1294. FL("DBS disabled, max_mac_rings %d\n"),
  1295. max_mac_rings);
  1296. }
  1297. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1298. FL("pdev_id %d max_mac_rings %d\n"),
  1299. pdev->pdev_id, max_mac_rings);
  1300. for (j = 0; j < max_mac_rings; j++) {
  1301. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1302. QDF_TRACE_LEVEL_ERROR,
  1303. FL("mac_id %d\n"), mac_id);
  1304. htt_srng_setup(soc->htt_handle, mac_id,
  1305. pdev->rx_mac_buf_ring[j]
  1306. .hal_srng,
  1307. RXDMA_BUF);
  1308. mac_id++;
  1309. }
  1310. }
  1311. }
  1312. }
  1313. #else
  1314. static void dp_rxdma_ring_config(struct dp_soc *soc)
  1315. {
  1316. int i;
  1317. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1318. struct dp_pdev *pdev = soc->pdev_list[i];
  1319. if (pdev) {
  1320. htt_srng_setup(soc->htt_handle, i,
  1321. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  1322. htt_srng_setup(soc->htt_handle, i,
  1323. pdev->rxdma_mon_buf_ring.hal_srng,
  1324. RXDMA_MONITOR_BUF);
  1325. htt_srng_setup(soc->htt_handle, i,
  1326. pdev->rxdma_mon_dst_ring.hal_srng,
  1327. RXDMA_MONITOR_DST);
  1328. htt_srng_setup(soc->htt_handle, i,
  1329. pdev->rxdma_mon_status_ring.hal_srng,
  1330. RXDMA_MONITOR_STATUS);
  1331. htt_srng_setup(soc->htt_handle, i,
  1332. pdev->rxdma_mon_desc_ring.hal_srng,
  1333. RXDMA_MONITOR_DESC);
  1334. }
  1335. }
  1336. }
  1337. #endif
  1338. /*
  1339. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  1340. * @txrx_soc: Datapath SOC handle
  1341. */
  1342. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  1343. {
  1344. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  1345. htt_soc_attach_target(soc->htt_handle);
  1346. dp_rxdma_ring_config(soc);
  1347. DP_STATS_INIT(soc);
  1348. return 0;
  1349. }
  1350. /*
  1351. * dp_vdev_attach_wifi3() - attach txrx vdev
  1352. * @txrx_pdev: Datapath PDEV handle
  1353. * @vdev_mac_addr: MAC address of the virtual interface
  1354. * @vdev_id: VDEV Id
  1355. * @wlan_op_mode: VDEV operating mode
  1356. *
  1357. * Return: DP VDEV handle on success, NULL on failure
  1358. */
  1359. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  1360. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  1361. {
  1362. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  1363. struct dp_soc *soc = pdev->soc;
  1364. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  1365. if (!vdev) {
  1366. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1367. FL("DP VDEV memory allocation failed"));
  1368. goto fail0;
  1369. }
  1370. vdev->pdev = pdev;
  1371. vdev->vdev_id = vdev_id;
  1372. vdev->opmode = op_mode;
  1373. vdev->osdev = soc->osdev;
  1374. vdev->osif_rx = NULL;
  1375. vdev->osif_rsim_rx_decap = NULL;
  1376. vdev->osif_rx_mon = NULL;
  1377. vdev->osif_tx_free_ext = NULL;
  1378. vdev->osif_vdev = NULL;
  1379. vdev->delete.pending = 0;
  1380. vdev->safemode = 0;
  1381. vdev->drop_unenc = 1;
  1382. #ifdef notyet
  1383. vdev->filters_num = 0;
  1384. #endif
  1385. qdf_mem_copy(
  1386. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1387. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1388. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1389. vdev->dscp_tid_map_id = 0;
  1390. vdev->mcast_enhancement_en = 0;
  1391. /* TODO: Initialize default HTT meta data that will be used in
  1392. * TCL descriptors for packets transmitted from this VDEV
  1393. */
  1394. TAILQ_INIT(&vdev->peer_list);
  1395. /* add this vdev into the pdev's list */
  1396. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  1397. pdev->vdev_count++;
  1398. dp_tx_vdev_attach(vdev);
  1399. #ifdef DP_INTR_POLL_BASED
  1400. if (pdev->vdev_count == 1)
  1401. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  1402. #endif
  1403. dp_lro_hash_setup(soc);
  1404. /* LRO */
  1405. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  1406. wlan_op_mode_sta == vdev->opmode)
  1407. vdev->lro_enable = true;
  1408. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1409. "LRO: vdev_id %d lro_enable %d", vdev_id, vdev->lro_enable);
  1410. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1411. "Created vdev %p (%pM)", vdev, vdev->mac_addr.raw);
  1412. DP_STATS_INIT(vdev);
  1413. return (struct cdp_vdev *)vdev;
  1414. fail0:
  1415. return NULL;
  1416. }
  1417. /**
  1418. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  1419. * @vdev: Datapath VDEV handle
  1420. * @osif_vdev: OSIF vdev handle
  1421. * @txrx_ops: Tx and Rx operations
  1422. *
  1423. * Return: DP VDEV handle on success, NULL on failure
  1424. */
  1425. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  1426. void *osif_vdev,
  1427. struct ol_txrx_ops *txrx_ops)
  1428. {
  1429. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1430. vdev->osif_vdev = osif_vdev;
  1431. vdev->osif_rx = txrx_ops->rx.rx;
  1432. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  1433. vdev->osif_rx_mon = txrx_ops->rx.mon;
  1434. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  1435. #ifdef notyet
  1436. #if ATH_SUPPORT_WAPI
  1437. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  1438. #endif
  1439. #if UMAC_SUPPORT_PROXY_ARP
  1440. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  1441. #endif
  1442. #endif
  1443. vdev->me_convert = txrx_ops->me_convert;
  1444. /* TODO: Enable the following once Tx code is integrated */
  1445. txrx_ops->tx.tx = dp_tx_send;
  1446. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1447. "DP Vdev Register success");
  1448. }
  1449. /*
  1450. * dp_vdev_detach_wifi3() - Detach txrx vdev
  1451. * @txrx_vdev: Datapath VDEV handle
  1452. * @callback: Callback OL_IF on completion of detach
  1453. * @cb_context: Callback context
  1454. *
  1455. */
  1456. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  1457. ol_txrx_vdev_delete_cb callback, void *cb_context)
  1458. {
  1459. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1460. struct dp_pdev *pdev = vdev->pdev;
  1461. struct dp_soc *soc = pdev->soc;
  1462. /* preconditions */
  1463. qdf_assert(vdev);
  1464. /* remove the vdev from its parent pdev's list */
  1465. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  1466. /*
  1467. * Use peer_ref_mutex while accessing peer_list, in case
  1468. * a peer is in the process of being removed from the list.
  1469. */
  1470. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1471. /* check that the vdev has no peers allocated */
  1472. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  1473. /* debug print - will be removed later */
  1474. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1475. FL("not deleting vdev object %p (%pM)"
  1476. "until deletion finishes for all its peers"),
  1477. vdev, vdev->mac_addr.raw);
  1478. /* indicate that the vdev needs to be deleted */
  1479. vdev->delete.pending = 1;
  1480. vdev->delete.callback = callback;
  1481. vdev->delete.context = cb_context;
  1482. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1483. return;
  1484. }
  1485. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1486. dp_tx_vdev_detach(vdev);
  1487. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1488. FL("deleting vdev object %p (%pM)"), vdev, vdev->mac_addr.raw);
  1489. qdf_mem_free(vdev);
  1490. if (callback)
  1491. callback(cb_context);
  1492. }
  1493. /*
  1494. * dp_peer_create_wifi3() - attach txrx peer
  1495. * @txrx_vdev: Datapath VDEV handle
  1496. * @peer_mac_addr: Peer MAC address
  1497. *
  1498. * Return: DP peeer handle on success, NULL on failure
  1499. */
  1500. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  1501. uint8_t *peer_mac_addr)
  1502. {
  1503. struct dp_peer *peer;
  1504. int i;
  1505. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1506. struct dp_pdev *pdev;
  1507. struct dp_soc *soc;
  1508. /* preconditions */
  1509. qdf_assert(vdev);
  1510. qdf_assert(peer_mac_addr);
  1511. pdev = vdev->pdev;
  1512. soc = pdev->soc;
  1513. #ifdef notyet
  1514. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  1515. soc->mempool_ol_ath_peer);
  1516. #else
  1517. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  1518. #endif
  1519. if (!peer)
  1520. return NULL; /* failure */
  1521. qdf_mem_zero(peer, sizeof(struct dp_peer));
  1522. TAILQ_INIT(&peer->ast_entry_list);
  1523. qdf_mem_copy(&peer->self_ast_entry.mac_addr, peer_mac_addr,
  1524. DP_MAC_ADDR_LEN);
  1525. peer->self_ast_entry.peer = peer;
  1526. TAILQ_INSERT_TAIL(&peer->ast_entry_list, &peer->self_ast_entry,
  1527. ast_entry_elem);
  1528. qdf_spinlock_create(&peer->peer_info_lock);
  1529. /* store provided params */
  1530. peer->vdev = vdev;
  1531. qdf_mem_copy(
  1532. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1533. /* TODO: See of rx_opt_proc is really required */
  1534. peer->rx_opt_proc = soc->rx_opt_proc;
  1535. /* initialize the peer_id */
  1536. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  1537. peer->peer_ids[i] = HTT_INVALID_PEER;
  1538. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1539. qdf_atomic_init(&peer->ref_cnt);
  1540. /* keep one reference for attach */
  1541. qdf_atomic_inc(&peer->ref_cnt);
  1542. /* add this peer into the vdev's list */
  1543. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  1544. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1545. /* TODO: See if hash based search is required */
  1546. dp_peer_find_hash_add(soc, peer);
  1547. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1548. "vdev %p created peer %p (%pM) ref_cnt: %d",
  1549. vdev, peer, peer->mac_addr.raw,
  1550. qdf_atomic_read(&peer->ref_cnt));
  1551. /*
  1552. * For every peer MAp message search and set if bss_peer
  1553. */
  1554. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  1555. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1556. "vdev bss_peer!!!!");
  1557. peer->bss_peer = 1;
  1558. vdev->vap_bss_peer = peer;
  1559. }
  1560. #ifndef CONFIG_WIN
  1561. dp_local_peer_id_alloc(pdev, peer);
  1562. #endif
  1563. DP_STATS_INIT(peer);
  1564. return (void *)peer;
  1565. }
  1566. /*
  1567. * dp_peer_setup_wifi3() - initialize the peer
  1568. * @vdev_hdl: virtual device object
  1569. * @peer: Peer object
  1570. *
  1571. * Return: void
  1572. */
  1573. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  1574. {
  1575. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  1576. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  1577. struct dp_pdev *pdev;
  1578. struct dp_soc *soc;
  1579. bool hash_based = 0;
  1580. enum cdp_host_reo_dest_ring reo_dest;
  1581. /* preconditions */
  1582. qdf_assert(vdev);
  1583. qdf_assert(peer);
  1584. pdev = vdev->pdev;
  1585. soc = pdev->soc;
  1586. dp_peer_rx_init(pdev, peer);
  1587. peer->last_assoc_rcvd = 0;
  1588. peer->last_disassoc_rcvd = 0;
  1589. peer->last_deauth_rcvd = 0;
  1590. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  1591. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1592. FL("hash based steering %d\n"), hash_based);
  1593. if (!hash_based)
  1594. reo_dest = pdev->reo_dest;
  1595. else
  1596. reo_dest = 1;
  1597. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  1598. /* TODO: Check the destination ring number to be passed to FW */
  1599. soc->cdp_soc.ol_ops->peer_set_default_routing(
  1600. pdev->osif_pdev, peer->mac_addr.raw,
  1601. peer->vdev->vdev_id, hash_based, reo_dest);
  1602. }
  1603. return;
  1604. }
  1605. /*
  1606. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  1607. * @vdev_handle: virtual device object
  1608. * @htt_pkt_type: type of pkt
  1609. *
  1610. * Return: void
  1611. */
  1612. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  1613. enum htt_cmn_pkt_type val)
  1614. {
  1615. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1616. vdev->tx_encap_type = val;
  1617. }
  1618. /*
  1619. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  1620. * @vdev_handle: virtual device object
  1621. * @htt_pkt_type: type of pkt
  1622. *
  1623. * Return: void
  1624. */
  1625. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  1626. enum htt_cmn_pkt_type val)
  1627. {
  1628. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1629. vdev->rx_decap_type = val;
  1630. }
  1631. /*
  1632. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  1633. * @pdev_handle: physical device object
  1634. * @val: reo destination ring index (1 - 4)
  1635. *
  1636. * Return: void
  1637. */
  1638. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  1639. enum cdp_host_reo_dest_ring val)
  1640. {
  1641. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  1642. if (pdev)
  1643. pdev->reo_dest = val;
  1644. }
  1645. /*
  1646. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  1647. * @pdev_handle: physical device object
  1648. *
  1649. * Return: reo destination ring index
  1650. */
  1651. static enum cdp_host_reo_dest_ring
  1652. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  1653. {
  1654. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  1655. if (pdev)
  1656. return pdev->reo_dest;
  1657. else
  1658. return cdp_host_reo_dest_ring_unknown;
  1659. }
  1660. /*
  1661. * dp_peer_authorize() - authorize txrx peer
  1662. * @peer_handle: Datapath peer handle
  1663. * @authorize
  1664. *
  1665. */
  1666. static void dp_peer_authorize(void *peer_handle, uint32_t authorize)
  1667. {
  1668. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1669. struct dp_soc *soc;
  1670. if (peer != NULL) {
  1671. soc = peer->vdev->pdev->soc;
  1672. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1673. peer->authorize = authorize ? 1 : 0;
  1674. #ifdef notyet /* ATH_BAND_STEERING */
  1675. peer->peer_bs_inact_flag = 0;
  1676. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1677. #endif
  1678. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1679. }
  1680. }
  1681. /*
  1682. * dp_peer_unref_delete() - unref and delete peer
  1683. * @peer_handle: Datapath peer handle
  1684. *
  1685. */
  1686. void dp_peer_unref_delete(void *peer_handle)
  1687. {
  1688. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1689. struct dp_vdev *vdev = peer->vdev;
  1690. struct dp_pdev *pdev = vdev->pdev;
  1691. struct dp_soc *soc = pdev->soc;
  1692. struct dp_peer *tmppeer;
  1693. int found = 0;
  1694. uint16_t peer_id;
  1695. uint16_t hw_peer_id;
  1696. struct dp_ast_entry *ast_entry;
  1697. /*
  1698. * Hold the lock all the way from checking if the peer ref count
  1699. * is zero until the peer references are removed from the hash
  1700. * table and vdev list (if the peer ref count is zero).
  1701. * This protects against a new HL tx operation starting to use the
  1702. * peer object just after this function concludes it's done being used.
  1703. * Furthermore, the lock needs to be held while checking whether the
  1704. * vdev's list of peers is empty, to make sure that list is not modified
  1705. * concurrently with the empty check.
  1706. */
  1707. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1708. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1709. "%s: peer %p ref_cnt(before decrement): %d\n", __func__,
  1710. peer, qdf_atomic_read(&peer->ref_cnt));
  1711. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  1712. peer_id = peer->peer_ids[0];
  1713. /*
  1714. * Make sure that the reference to the peer in
  1715. * peer object map is removed
  1716. */
  1717. if (peer_id != HTT_INVALID_PEER)
  1718. soc->peer_id_to_obj_map[peer_id] = NULL;
  1719. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1720. "Deleting peer %p (%pM)", peer, peer->mac_addr.raw);
  1721. /* remove the reference to the peer from the hash table */
  1722. dp_peer_find_hash_remove(soc, peer);
  1723. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  1724. if (tmppeer == peer) {
  1725. found = 1;
  1726. break;
  1727. }
  1728. }
  1729. if (found) {
  1730. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  1731. peer_list_elem);
  1732. } else {
  1733. /*Ignoring the remove operation as peer not found*/
  1734. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1735. "peer %p not found in vdev (%p)->peer_list:%p",
  1736. peer, vdev, &peer->vdev->peer_list);
  1737. }
  1738. /* cleanup the peer data */
  1739. dp_peer_cleanup(vdev, peer);
  1740. /* check whether the parent vdev has no peers left */
  1741. if (TAILQ_EMPTY(&vdev->peer_list)) {
  1742. /*
  1743. * Now that there are no references to the peer, we can
  1744. * release the peer reference lock.
  1745. */
  1746. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1747. /*
  1748. * Check if the parent vdev was waiting for its peers
  1749. * to be deleted, in order for it to be deleted too.
  1750. */
  1751. if (vdev->delete.pending) {
  1752. ol_txrx_vdev_delete_cb vdev_delete_cb =
  1753. vdev->delete.callback;
  1754. void *vdev_delete_context =
  1755. vdev->delete.context;
  1756. QDF_TRACE(QDF_MODULE_ID_DP,
  1757. QDF_TRACE_LEVEL_INFO_HIGH,
  1758. FL("deleting vdev object %p (%pM)"
  1759. " - its last peer is done"),
  1760. vdev, vdev->mac_addr.raw);
  1761. /* all peers are gone, go ahead and delete it */
  1762. qdf_mem_free(vdev);
  1763. if (vdev_delete_cb)
  1764. vdev_delete_cb(vdev_delete_context);
  1765. }
  1766. } else {
  1767. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1768. }
  1769. #ifdef notyet
  1770. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  1771. #else
  1772. TAILQ_FOREACH(ast_entry, &peer->ast_entry_list,
  1773. ast_entry_elem) {
  1774. hw_peer_id = ast_entry->ast_idx;
  1775. if (peer->self_ast_entry.ast_idx != hw_peer_id)
  1776. qdf_mem_free(ast_entry);
  1777. else
  1778. peer->self_ast_entry.ast_idx =
  1779. HTT_INVALID_PEER;
  1780. soc->ast_table[hw_peer_id] = NULL;
  1781. }
  1782. qdf_mem_free(peer);
  1783. #endif
  1784. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  1785. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->osif_pdev,
  1786. vdev->vdev_id, peer->mac_addr.raw);
  1787. }
  1788. } else {
  1789. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1790. }
  1791. }
  1792. /*
  1793. * dp_peer_detach_wifi3() – Detach txrx peer
  1794. * @peer_handle: Datapath peer handle
  1795. *
  1796. */
  1797. static void dp_peer_delete_wifi3(void *peer_handle)
  1798. {
  1799. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1800. /* redirect the peer's rx delivery function to point to a
  1801. * discard func
  1802. */
  1803. peer->rx_opt_proc = dp_rx_discard;
  1804. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1805. FL("peer %p (%pM)"), peer, peer->mac_addr.raw);
  1806. #ifndef CONFIG_WIN
  1807. dp_local_peer_id_free(peer->vdev->pdev, peer);
  1808. #endif
  1809. qdf_spinlock_destroy(&peer->peer_info_lock);
  1810. /*
  1811. * Remove the reference added during peer_attach.
  1812. * The peer will still be left allocated until the
  1813. * PEER_UNMAP message arrives to remove the other
  1814. * reference, added by the PEER_MAP message.
  1815. */
  1816. dp_peer_unref_delete(peer_handle);
  1817. }
  1818. /*
  1819. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  1820. * @peer_handle: Datapath peer handle
  1821. *
  1822. */
  1823. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  1824. {
  1825. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  1826. return vdev->mac_addr.raw;
  1827. }
  1828. /*
  1829. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  1830. * @peer_handle: Datapath peer handle
  1831. *
  1832. */
  1833. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  1834. uint8_t vdev_id)
  1835. {
  1836. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  1837. struct dp_vdev *vdev = NULL;
  1838. if (qdf_unlikely(!pdev))
  1839. return NULL;
  1840. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1841. if (vdev->vdev_id == vdev_id)
  1842. break;
  1843. }
  1844. return (struct cdp_vdev *)vdev;
  1845. }
  1846. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  1847. {
  1848. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1849. return vdev->opmode;
  1850. }
  1851. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  1852. {
  1853. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  1854. struct dp_pdev *pdev = vdev->pdev;
  1855. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  1856. }
  1857. /**
  1858. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  1859. * @vdev_handle: Datapath VDEV handle
  1860. *
  1861. * Return: 0 on success, not 0 on failure
  1862. */
  1863. static int dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle)
  1864. {
  1865. /* Many monitor VAPs can exists in a system but only one can be up at
  1866. * anytime
  1867. */
  1868. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1869. struct dp_pdev *pdev;
  1870. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  1871. struct dp_soc *soc;
  1872. uint8_t pdev_id;
  1873. qdf_assert(vdev);
  1874. pdev = vdev->pdev;
  1875. pdev_id = pdev->pdev_id;
  1876. soc = pdev->soc;
  1877. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  1878. "pdev=%p, pdev_id=%d, soc=%p vdev=%p\n",
  1879. pdev, pdev_id, soc, vdev);
  1880. /*Check if current pdev's monitor_vdev exists */
  1881. if (pdev->monitor_vdev) {
  1882. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1883. "vdev=%p\n", vdev);
  1884. qdf_assert(vdev);
  1885. }
  1886. pdev->monitor_vdev = vdev;
  1887. htt_tlv_filter.mpdu_start = 1;
  1888. htt_tlv_filter.msdu_start = 1;
  1889. htt_tlv_filter.packet = 1;
  1890. htt_tlv_filter.msdu_end = 1;
  1891. htt_tlv_filter.mpdu_end = 1;
  1892. htt_tlv_filter.packet_header = 1;
  1893. htt_tlv_filter.attention = 1;
  1894. htt_tlv_filter.ppdu_start = 0;
  1895. htt_tlv_filter.ppdu_end = 0;
  1896. htt_tlv_filter.ppdu_end_user_stats = 0;
  1897. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  1898. htt_tlv_filter.ppdu_end_status_done = 0;
  1899. htt_tlv_filter.enable_fp = 1;
  1900. htt_tlv_filter.enable_md = 0;
  1901. htt_tlv_filter.enable_mo = 1;
  1902. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  1903. pdev->rxdma_mon_dst_ring.hal_srng,
  1904. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  1905. htt_tlv_filter.mpdu_start = 1;
  1906. htt_tlv_filter.msdu_start = 1;
  1907. htt_tlv_filter.packet = 0;
  1908. htt_tlv_filter.msdu_end = 1;
  1909. htt_tlv_filter.mpdu_end = 1;
  1910. htt_tlv_filter.packet_header = 1;
  1911. htt_tlv_filter.attention = 1;
  1912. htt_tlv_filter.ppdu_start = 1;
  1913. htt_tlv_filter.ppdu_end = 1;
  1914. htt_tlv_filter.ppdu_end_user_stats = 1;
  1915. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  1916. htt_tlv_filter.ppdu_end_status_done = 1;
  1917. htt_tlv_filter.enable_fp = 1;
  1918. htt_tlv_filter.enable_md = 1;
  1919. htt_tlv_filter.enable_mo = 1;
  1920. /*
  1921. * htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  1922. * pdev->rxdma_mon_status_ring.hal_srng,
  1923. * RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  1924. */
  1925. return QDF_STATUS_SUCCESS;
  1926. }
  1927. #ifdef MESH_MODE_SUPPORT
  1928. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  1929. {
  1930. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  1931. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1932. FL("val %d"), val);
  1933. vdev->mesh_vdev = val;
  1934. }
  1935. /*
  1936. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  1937. * @vdev_hdl: virtual device object
  1938. * @val: value to be set
  1939. *
  1940. * Return: void
  1941. */
  1942. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  1943. {
  1944. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  1945. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1946. FL("val %d"), val);
  1947. vdev->mesh_rx_filter = val;
  1948. }
  1949. #endif
  1950. /**
  1951. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  1952. * @vdev: DP VDEV handle
  1953. *
  1954. * return: void
  1955. */
  1956. void dp_aggregate_vdev_stats(struct dp_vdev *vdev)
  1957. {
  1958. struct dp_peer *peer = NULL;
  1959. int i;
  1960. qdf_mem_set(&(vdev->stats.tx), sizeof(vdev->stats.tx), 0x0);
  1961. qdf_mem_set(&(vdev->stats.rx), sizeof(vdev->stats.rx), 0x0);
  1962. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  1963. if (!peer)
  1964. return;
  1965. for (i = 0; i <= MAX_MCS; i++) {
  1966. DP_STATS_AGGR(vdev, peer, tx.pkt_type[0].mcs_count[i]);
  1967. DP_STATS_AGGR(vdev, peer, tx.pkt_type[1].mcs_count[i]);
  1968. DP_STATS_AGGR(vdev, peer, tx.pkt_type[2].mcs_count[i]);
  1969. DP_STATS_AGGR(vdev, peer, tx.pkt_type[3].mcs_count[i]);
  1970. DP_STATS_AGGR(vdev, peer, tx.pkt_type[4].mcs_count[i]);
  1971. DP_STATS_AGGR(vdev, peer, rx.mcs_count[i]);
  1972. }
  1973. for (i = 0; i < SUPPORTED_BW; i++) {
  1974. DP_STATS_AGGR(vdev, peer, tx.bw[i]);
  1975. DP_STATS_AGGR(vdev, peer, rx.bw[i]);
  1976. }
  1977. for (i = 0; i < SS_COUNT; i++)
  1978. DP_STATS_AGGR(vdev, peer, rx.nss[i]);
  1979. for (i = 0; i < WME_AC_MAX; i++) {
  1980. DP_STATS_AGGR(vdev, peer, tx.wme_ac_type[i]);
  1981. DP_STATS_AGGR(vdev, peer, rx.wme_ac_type[i]);
  1982. DP_STATS_AGGR(vdev, peer, tx.excess_retries_ac[i]);
  1983. }
  1984. for (i = 0; i < MAX_MCS + 1; i++) {
  1985. DP_STATS_AGGR(vdev, peer, tx.sgi_count[i]);
  1986. DP_STATS_AGGR(vdev, peer, rx.sgi_count[i]);
  1987. }
  1988. DP_STATS_AGGR_PKT(vdev, peer, tx.comp_pkt);
  1989. DP_STATS_AGGR_PKT(vdev, peer, tx.ucast);
  1990. DP_STATS_AGGR_PKT(vdev, peer, tx.mcast);
  1991. DP_STATS_AGGR_PKT(vdev, peer, tx.tx_success);
  1992. DP_STATS_AGGR(vdev, peer, tx.tx_failed);
  1993. DP_STATS_AGGR(vdev, peer, tx.ofdma);
  1994. DP_STATS_AGGR(vdev, peer, tx.stbc);
  1995. DP_STATS_AGGR(vdev, peer, tx.ldpc);
  1996. DP_STATS_AGGR(vdev, peer, tx.retries);
  1997. DP_STATS_AGGR(vdev, peer, tx.non_amsdu_cnt);
  1998. DP_STATS_AGGR(vdev, peer, tx.amsdu_cnt);
  1999. DP_STATS_AGGR(vdev, peer, tx.dropped.dma_map_error);
  2000. DP_STATS_AGGR(vdev, peer, tx.dropped.ring_full);
  2001. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard);
  2002. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_retired);
  2003. DP_STATS_AGGR(vdev, peer, tx.dropped.mpdu_age_out);
  2004. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_reason1);
  2005. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_reason2);
  2006. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_reason3);
  2007. DP_STATS_AGGR(vdev, peer, rx.err.mic_err);
  2008. DP_STATS_AGGR(vdev, peer, rx.err.decrypt_err);
  2009. DP_STATS_AGGR(vdev, peer, rx.non_ampdu_cnt);
  2010. DP_STATS_AGGR(vdev, peer, rx.ampdu_cnt);
  2011. DP_STATS_AGGR(vdev, peer, rx.non_amsdu_cnt);
  2012. DP_STATS_AGGR(vdev, peer, rx.amsdu_cnt);
  2013. DP_STATS_AGGR_PKT(vdev, peer, rx.to_stack);
  2014. DP_STATS_AGGR_PKT(vdev, peer, rx.rcvd_reo);
  2015. DP_STATS_AGGR_PKT(vdev, peer, rx.unicast);
  2016. DP_STATS_AGGR_PKT(vdev, peer, rx.multicast);
  2017. DP_STATS_AGGR_PKT(vdev, peer, rx.wds);
  2018. DP_STATS_AGGR_PKT(vdev, peer, rx.raw);
  2019. DP_STATS_AGGR_PKT(vdev, peer, rx.intra_bss);
  2020. vdev->stats.tx.last_ack_rssi =
  2021. peer->stats.tx.last_ack_rssi;
  2022. }
  2023. }
  2024. /**
  2025. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  2026. * @pdev: DP PDEV handle
  2027. *
  2028. * return: void
  2029. */
  2030. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  2031. {
  2032. struct dp_vdev *vdev = NULL;
  2033. uint8_t i;
  2034. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  2035. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  2036. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  2037. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2038. if (!vdev)
  2039. return;
  2040. dp_aggregate_vdev_stats(vdev);
  2041. for (i = 0; i <= MAX_MCS; i++) {
  2042. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[0].mcs_count[i]);
  2043. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[1].mcs_count[i]);
  2044. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[2].mcs_count[i]);
  2045. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[3].mcs_count[i]);
  2046. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[4].mcs_count[i]);
  2047. DP_STATS_AGGR(pdev, vdev, rx.mcs_count[i]);
  2048. }
  2049. for (i = 0; i < SUPPORTED_BW; i++) {
  2050. DP_STATS_AGGR(pdev, vdev, tx.bw[i]);
  2051. DP_STATS_AGGR(pdev, vdev, rx.bw[i]);
  2052. }
  2053. for (i = 0; i < SS_COUNT; i++)
  2054. DP_STATS_AGGR(pdev, vdev, rx.nss[i]);
  2055. for (i = 0; i < WME_AC_MAX; i++) {
  2056. DP_STATS_AGGR(pdev, vdev, tx.wme_ac_type[i]);
  2057. DP_STATS_AGGR(pdev, vdev, rx.wme_ac_type[i]);
  2058. DP_STATS_AGGR(pdev, vdev,
  2059. tx.excess_retries_ac[i]);
  2060. }
  2061. for (i = 0; i < MAX_MCS + 1; i++) {
  2062. DP_STATS_AGGR(pdev, vdev, tx.sgi_count[i]);
  2063. DP_STATS_AGGR(pdev, vdev, rx.sgi_count[i]);
  2064. }
  2065. DP_STATS_AGGR_PKT(pdev, vdev, tx.comp_pkt);
  2066. DP_STATS_AGGR_PKT(pdev, vdev, tx.ucast);
  2067. DP_STATS_AGGR_PKT(pdev, vdev, tx.mcast);
  2068. DP_STATS_AGGR_PKT(pdev, vdev, tx.tx_success);
  2069. DP_STATS_AGGR(pdev, vdev, tx.tx_failed);
  2070. DP_STATS_AGGR(pdev, vdev, tx.ofdma);
  2071. DP_STATS_AGGR(pdev, vdev, tx.stbc);
  2072. DP_STATS_AGGR(pdev, vdev, tx.ldpc);
  2073. DP_STATS_AGGR(pdev, vdev, tx.retries);
  2074. DP_STATS_AGGR(pdev, vdev, tx.non_amsdu_cnt);
  2075. DP_STATS_AGGR(pdev, vdev, tx.amsdu_cnt);
  2076. DP_STATS_AGGR(pdev, vdev, tx.dropped.dma_map_error);
  2077. DP_STATS_AGGR(pdev, vdev, tx.dropped.ring_full);
  2078. DP_STATS_AGGR(pdev, vdev, tx.dropped.fw_discard);
  2079. DP_STATS_AGGR(pdev, vdev,
  2080. tx.dropped.fw_discard_retired);
  2081. DP_STATS_AGGR(pdev, vdev, tx.dropped.mpdu_age_out);
  2082. DP_STATS_AGGR(pdev, vdev,
  2083. tx.dropped.fw_discard_reason1);
  2084. DP_STATS_AGGR(pdev, vdev,
  2085. tx.dropped.fw_discard_reason2);
  2086. DP_STATS_AGGR(pdev, vdev,
  2087. tx.dropped.fw_discard_reason3);
  2088. DP_STATS_AGGR(pdev, vdev, rx.err.mic_err);
  2089. DP_STATS_AGGR(pdev, vdev, rx.err.decrypt_err);
  2090. DP_STATS_AGGR(pdev, vdev, rx.non_ampdu_cnt);
  2091. DP_STATS_AGGR(pdev, vdev, rx.ampdu_cnt);
  2092. DP_STATS_AGGR(pdev, vdev, rx.non_amsdu_cnt);
  2093. DP_STATS_AGGR(pdev, vdev, rx.amsdu_cnt);
  2094. DP_STATS_AGGR_PKT(pdev, vdev, rx.to_stack);
  2095. DP_STATS_AGGR_PKT(pdev, vdev, rx.rcvd_reo);
  2096. DP_STATS_AGGR_PKT(pdev, vdev, rx.unicast);
  2097. DP_STATS_AGGR_PKT(pdev, vdev, rx.multicast);
  2098. DP_STATS_AGGR_PKT(pdev, vdev, rx.wds);
  2099. DP_STATS_AGGR_PKT(pdev, vdev, rx.intra_bss);
  2100. DP_STATS_AGGR_PKT(pdev, vdev, rx.raw);
  2101. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  2102. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.freed);
  2103. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  2104. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  2105. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  2106. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw_pkt);
  2107. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  2108. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host);
  2109. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  2110. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host);
  2111. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  2112. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  2113. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  2114. DP_STATS_AGGR(pdev, vdev,
  2115. tx_i.mcast_en.dropped_map_error);
  2116. DP_STATS_AGGR(pdev, vdev,
  2117. tx_i.mcast_en.dropped_self_mac);
  2118. DP_STATS_AGGR(pdev, vdev,
  2119. tx_i.mcast_en.dropped_send_fail);
  2120. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  2121. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.dropped.dropped_pkt);
  2122. pdev->stats.tx.last_ack_rssi =
  2123. vdev->stats.tx.last_ack_rssi;
  2124. pdev->stats.tx_i.tso.num_seg =
  2125. vdev->stats.tx_i.tso.num_seg;
  2126. }
  2127. }
  2128. /**
  2129. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  2130. * @pdev: DP_PDEV Handle
  2131. *
  2132. * Return:void
  2133. */
  2134. static inline void
  2135. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  2136. {
  2137. DP_TRACE(NONE, "WLAN Tx Stats:\n");
  2138. DP_TRACE(NONE, "Received From Stack:\n");
  2139. DP_TRACE(NONE, "Total Packets Received = %d",
  2140. pdev->stats.tx_i.rcvd.num);
  2141. DP_TRACE(NONE, "Bytes Sent = %d",
  2142. pdev->stats.tx_i.rcvd.bytes);
  2143. DP_TRACE(NONE, "Processed:\n");
  2144. DP_TRACE(NONE, "Msdu Processed = %d",
  2145. pdev->stats.tx_i.processed.num);
  2146. DP_TRACE(NONE, "Bytes Processed = %d",
  2147. pdev->stats.tx_i.processed.bytes);
  2148. DP_TRACE(NONE, "Completions:\n");
  2149. DP_TRACE(NONE, "Msdu Sent = %d",
  2150. pdev->stats.tx.comp_pkt.num);
  2151. DP_TRACE(NONE, "Bytes Sent = %d",
  2152. pdev->stats.tx.comp_pkt.bytes);
  2153. DP_TRACE(NONE, "Freed:\n");
  2154. DP_TRACE(NONE, "Msdus Freed = %d",
  2155. pdev->stats.tx_i.freed.num);
  2156. DP_TRACE(NONE, "Bytes Freed = %d",
  2157. pdev->stats.tx_i.freed.bytes);
  2158. DP_TRACE(NONE, "Dropped:\n");
  2159. DP_TRACE(NONE, "Total Packets Dropped = %d",
  2160. pdev->stats.tx_i.dropped.dropped_pkt.num);
  2161. DP_TRACE(NONE, "Bytes Dropped = %d",
  2162. pdev->stats.tx_i.dropped.dropped_pkt.bytes);
  2163. DP_TRACE(NONE, "Dma_map_error = %d",
  2164. pdev->stats.tx.dropped.dma_map_error);
  2165. DP_TRACE(NONE, "Ring Full = %d", pdev->stats.tx.dropped.ring_full);
  2166. DP_TRACE(NONE, "Fw Discard = %d",
  2167. pdev->stats.tx.dropped.fw_discard);
  2168. DP_TRACE(NONE, "Fw Discard Retired = %d",
  2169. pdev->stats.tx.dropped.fw_discard_retired);
  2170. DP_TRACE(NONE, "Firmware Discard Untransmitted = %d",
  2171. pdev->stats.tx.dropped.fw_discard_untransmitted);
  2172. DP_TRACE(NONE, "Mpdu Age Out = %d",
  2173. pdev->stats.tx.dropped.mpdu_age_out);
  2174. DP_TRACE(NONE, "Firmware Discard Reason1 = %d",
  2175. pdev->stats.tx.dropped.fw_discard_reason1);
  2176. DP_TRACE(NONE, "Firmware Discard Reason2 = %d",
  2177. pdev->stats.tx.dropped.fw_discard_reason2);
  2178. DP_TRACE(NONE, "Firmware Discard Reason3 = %d",
  2179. pdev->stats.tx.dropped.fw_discard_reason3);
  2180. DP_TRACE(NONE, "Scatter Gather:\n");
  2181. DP_TRACE(NONE, "Total Packets = %d",
  2182. pdev->stats.tx_i.sg.sg_pkt.num);
  2183. DP_TRACE(NONE, "Total Bytes = %d",
  2184. pdev->stats.tx_i.sg.sg_pkt.bytes);
  2185. DP_TRACE(NONE, "Dropped By Host = %d",
  2186. pdev->stats.tx_i.sg.dropped_host);
  2187. DP_TRACE(NONE, "Dropped By Target = %d",
  2188. pdev->stats.tx_i.sg.dropped_target);
  2189. DP_TRACE(NONE, "Tso:\n");
  2190. DP_TRACE(NONE, "Number of Segments = %d",
  2191. pdev->stats.tx_i.tso.num_seg);
  2192. DP_TRACE(NONE, "Number Packets = %d",
  2193. pdev->stats.tx_i.tso.tso_pkt.num);
  2194. DP_TRACE(NONE, "Total Bytes = %d",
  2195. pdev->stats.tx_i.tso.tso_pkt.bytes);
  2196. DP_TRACE(NONE, "Dropped By Host = %d",
  2197. pdev->stats.tx_i.tso.dropped_host);
  2198. DP_TRACE(NONE, "Mcast Enhancement:\n");
  2199. DP_TRACE(NONE, "Dropped: Map Errors = %d",
  2200. pdev->stats.tx_i.mcast_en.dropped_map_error);
  2201. DP_TRACE(NONE, "Dropped: Self Mac = %d",
  2202. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  2203. DP_TRACE(NONE, "Dropped: Send Fail = %d",
  2204. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  2205. DP_TRACE(NONE, "Total Unicast sent = %d",
  2206. pdev->stats.tx_i.mcast_en.ucast);
  2207. }
  2208. /**
  2209. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  2210. * @pdev: DP_PDEV Handle
  2211. *
  2212. * Return: void
  2213. */
  2214. static inline void
  2215. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  2216. {
  2217. DP_TRACE(NONE, "WLAN Rx Stats:\n");
  2218. DP_TRACE(NONE, "Received From HW (Reo Dest Ring):\n");
  2219. DP_TRACE(NONE, "Total Packets Received = %d",
  2220. pdev->stats.rx.rcvd_reo.num);
  2221. DP_TRACE(NONE, "Bytes Sent = %d",
  2222. pdev->stats.rx.rcvd_reo.bytes);
  2223. DP_TRACE(NONE, "Replenished:\n");
  2224. DP_TRACE(NONE, "Total Packets Replenished = %d",
  2225. pdev->stats.replenished.num);
  2226. DP_TRACE(NONE, "Bytes Sent = %d",
  2227. pdev->stats.replenished.bytes);
  2228. DP_TRACE(NONE, "Buffers Added To Freelist = %d",
  2229. pdev->stats.buf_freelist);
  2230. DP_TRACE(NONE, "Dropped:\n");
  2231. DP_TRACE(NONE, "Total Packets With Msdu Not Done = %d",
  2232. pdev->stats.dropped.msdu_not_done.num);
  2233. DP_TRACE(NONE, "Bytes Sent With Msdu Not Done = %d",
  2234. pdev->stats.dropped.msdu_not_done.bytes);
  2235. DP_TRACE(NONE, "Sent To Stack:\n");
  2236. DP_TRACE(NONE, "Packets Sent To Stack = %d",
  2237. pdev->stats.rx.to_stack.num);
  2238. DP_TRACE(NONE, "Bytes Sent To Stack = %d",
  2239. pdev->stats.rx.to_stack.bytes);
  2240. DP_TRACE(NONE, "Errors:\n");
  2241. DP_TRACE(NONE, "Rxdma Ring Unititalized: %d",
  2242. pdev->stats.err.rxdma_unitialized);
  2243. DP_TRACE(NONE, "Desc Alloc Failed: %d",
  2244. pdev->stats.err.desc_alloc_fail);
  2245. }
  2246. /**
  2247. * dp_print_soc_tx_stats(): Print SOC level stats
  2248. * @soc DP_SOC Handle
  2249. *
  2250. * Return: void
  2251. */
  2252. static inline void
  2253. dp_print_soc_tx_stats(struct dp_soc *soc)
  2254. {
  2255. DP_TRACE(NONE, "SOC Tx Stats:\n");
  2256. DP_TRACE(NONE, "Tx Descriptors In Use = %d",
  2257. soc->stats.tx.desc_in_use);
  2258. DP_TRACE(NONE, "Total Packets With No Peer = %d",
  2259. soc->stats.tx.tx_invalid_peer.num);
  2260. DP_TRACE(NONE, "Bytes Sent With No Peer = %d",
  2261. soc->stats.tx.tx_invalid_peer.bytes);
  2262. }
  2263. /**
  2264. * dp_print_soc_rx_stats: Print SOC level Rx stats
  2265. * @soc: DP_SOC Handle
  2266. *
  2267. * Return:void
  2268. */
  2269. static inline void
  2270. dp_print_soc_rx_stats(struct dp_soc *soc)
  2271. {
  2272. uint32_t i;
  2273. char reo_error[DP_REO_ERR_LENGTH];
  2274. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  2275. uint8_t index = 0;
  2276. DP_TRACE(NONE, "SOC Rx Stats:\n");
  2277. DP_TRACE(NONE, "Errors:\n");
  2278. DP_TRACE(NONE, "Invalid RBM = %d",
  2279. soc->stats.rx.err.invalid_rbm);
  2280. DP_TRACE(NONE, "Invalid Vdev = %d",
  2281. soc->stats.rx.err.invalid_vdev);
  2282. DP_TRACE(NONE, "Invalid Pdev = %d",
  2283. soc->stats.rx.err.invalid_pdev);
  2284. DP_TRACE(NONE, "Invalid Peer = %d",
  2285. soc->stats.rx.err.rx_invalid_peer.num);
  2286. DP_TRACE(NONE, "HAL Ring Access Fail = %d",
  2287. soc->stats.rx.err.hal_ring_access_fail);
  2288. for (i = 0; i < MAX_RXDMA_ERRORS; i++) {
  2289. index += qdf_snprint(&rxdma_error[index],
  2290. DP_RXDMA_ERR_LENGTH - index,
  2291. " %d,", soc->stats.rx.err.rxdma_error[i]);
  2292. }
  2293. DP_TRACE(NONE, "RXDMA Error (0-31):%s",
  2294. rxdma_error);
  2295. index = 0;
  2296. for (i = 0; i < REO_ERROR_TYPE_MAX; i++) {
  2297. index += qdf_snprint(&reo_error[index],
  2298. DP_REO_ERR_LENGTH - index,
  2299. " %d,", soc->stats.rx.err.reo_error[i]);
  2300. }
  2301. DP_TRACE(NONE, "REO Error(0-14):%s",
  2302. reo_error);
  2303. }
  2304. /**
  2305. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  2306. * @vdev: DP_VDEV handle
  2307. *
  2308. * Return:void
  2309. */
  2310. static inline void
  2311. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  2312. {
  2313. struct dp_peer *peer = NULL;
  2314. DP_STATS_CLR(vdev->pdev);
  2315. DP_STATS_CLR(vdev->pdev->soc);
  2316. DP_STATS_CLR(vdev);
  2317. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2318. if (!peer)
  2319. return;
  2320. DP_STATS_CLR(peer);
  2321. }
  2322. }
  2323. /**
  2324. * dp_print_rx_rates(): Print Rx rate stats
  2325. * @vdev: DP_VDEV handle
  2326. *
  2327. * Return:void
  2328. */
  2329. static inline void
  2330. dp_print_rx_rates(struct dp_vdev *vdev)
  2331. {
  2332. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2333. uint8_t i;
  2334. uint8_t index = 0;
  2335. char mcs[DP_MCS_LENGTH];
  2336. char nss[DP_NSS_LENGTH];
  2337. DP_TRACE(NONE, "Rx Rate Info:\n");
  2338. for (i = 0; i < MAX_MCS; i++) {
  2339. index += qdf_snprint(&mcs[index], DP_MCS_LENGTH - index,
  2340. " %d,", pdev->stats.rx.mcs_count[i]);
  2341. }
  2342. DP_TRACE(NONE, "MCS(0-11):%s",
  2343. mcs);
  2344. index = 0;
  2345. for (i = 0; i < SS_COUNT; i++) {
  2346. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  2347. " %d,", pdev->stats.rx.nss[i]);
  2348. }
  2349. DP_TRACE(NONE, "NSS(0-7):%s",
  2350. nss);
  2351. DP_TRACE(NONE, "SGI:"
  2352. " 0.8us %d,"
  2353. " 0.4us %d,"
  2354. " 1.6us %d,"
  2355. " 3.2us %d,",
  2356. pdev->stats.rx.sgi_count[0],
  2357. pdev->stats.rx.sgi_count[1],
  2358. pdev->stats.rx.sgi_count[2],
  2359. pdev->stats.rx.sgi_count[3]);
  2360. DP_TRACE(NONE, "BW Counts: 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  2361. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  2362. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  2363. DP_TRACE(NONE, "Reception Type:"
  2364. " SU: %d,"
  2365. " MU_MIMO:%d,"
  2366. " MU_OFDMA:%d,"
  2367. " MU_OFDMA_MIMO:%d",
  2368. pdev->stats.rx.reception_type[0],
  2369. pdev->stats.rx.reception_type[1],
  2370. pdev->stats.rx.reception_type[2],
  2371. pdev->stats.rx.reception_type[3]);
  2372. DP_TRACE(NONE, "Aggregation:\n");
  2373. DP_TRACE(NONE, "Number of Msdu's Part of Ampdus = %d",
  2374. pdev->stats.rx.ampdu_cnt);
  2375. DP_TRACE(NONE, "Number of Msdu's With No Mpdu Level Aggregation : %d",
  2376. pdev->stats.rx.non_ampdu_cnt);
  2377. DP_TRACE(NONE, "Number of Msdu's Part of Amsdu: %d",
  2378. pdev->stats.rx.amsdu_cnt);
  2379. DP_TRACE(NONE, "Number of Msdu's With No Msdu Level Aggregation: %d",
  2380. pdev->stats.rx.non_amsdu_cnt);
  2381. }
  2382. /**
  2383. * dp_print_tx_rates(): Print tx rates
  2384. * @vdev: DP_VDEV handle
  2385. *
  2386. * Return:void
  2387. */
  2388. static inline void
  2389. dp_print_tx_rates(struct dp_vdev *vdev)
  2390. {
  2391. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2392. uint8_t i, pkt_type;
  2393. char mcs[DOT11_MAX][DP_MCS_LENGTH];
  2394. uint32_t index;
  2395. DP_TRACE(NONE, "Tx Rate Info:\n");
  2396. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  2397. index = 0;
  2398. for (i = 0; i < MAX_MCS; i++) {
  2399. index += qdf_snprint(&mcs[pkt_type][index],
  2400. DP_MCS_LENGTH - index,
  2401. " %d ",
  2402. pdev->stats.tx.pkt_type[pkt_type].
  2403. mcs_count[i]);
  2404. }
  2405. }
  2406. DP_TRACE(NONE, "Packet Type 11A MCS(0-7):%s",
  2407. mcs[0]);
  2408. DP_TRACE(NONE, "Packet Type 11A MCS Invalid = %d",
  2409. pdev->stats.tx.pkt_type[DOT11_A].mcs_count[MAX_MCS]);
  2410. DP_TRACE(NONE, "Packet Type 11B MCS(0-6):%s",
  2411. mcs[1]);
  2412. DP_TRACE(NONE, "Packet Type 11B MCS Invalid = %d",
  2413. pdev->stats.tx.pkt_type[DOT11_B].mcs_count[MAX_MCS]);
  2414. DP_TRACE(NONE, "Packet Type 11N MCS(0-7):%s",
  2415. mcs[2]);
  2416. DP_TRACE(NONE, "Packet Type 11N MCS Invalid = %d",
  2417. pdev->stats.tx.pkt_type[DOT11_N].mcs_count[MAX_MCS]);
  2418. DP_TRACE(NONE, "Packet Type 11AC MCS(0-9):%s",
  2419. mcs[3]);
  2420. DP_TRACE(NONE, "Packet Type 11AC MCS Invalid = %d",
  2421. pdev->stats.tx.pkt_type[DOT11_AC].mcs_count[MAX_MCS]);
  2422. DP_TRACE(NONE, "Packet Type 11AX MCS(0-11):%s",
  2423. mcs[4]);
  2424. DP_TRACE(NONE, "Packet Type 11AX MCS Invalid = %d",
  2425. pdev->stats.tx.pkt_type[DOT11_AX].mcs_count[MAX_MCS]);
  2426. DP_TRACE(NONE, "SGI:"
  2427. " 0.8us %d,"
  2428. " 0.4us %d,"
  2429. " 1.6us %d,"
  2430. " 3.2us %d,",
  2431. pdev->stats.tx.sgi_count[0],
  2432. pdev->stats.tx.sgi_count[1],
  2433. pdev->stats.tx.sgi_count[2],
  2434. pdev->stats.tx.sgi_count[3]);
  2435. DP_TRACE(NONE, "BW Counts: 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  2436. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  2437. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  2438. DP_TRACE(NONE, "Aggregation:\n");
  2439. DP_TRACE(NONE, "Number of Msdu's Part of Amsdu: %d",
  2440. pdev->stats.tx.amsdu_cnt);
  2441. DP_TRACE(NONE, "Number of Msdu's With No Msdu Level Aggregation: %d",
  2442. pdev->stats.tx.non_amsdu_cnt);
  2443. }
  2444. /**
  2445. * dp_print_peer_stats():print peer stats
  2446. * @peer: DP_PEER handle
  2447. *
  2448. * return void
  2449. */
  2450. static inline void dp_print_peer_stats(struct dp_peer *peer)
  2451. {
  2452. uint8_t i, pkt_type;
  2453. char mcs[DOT11_MAX][DP_MCS_LENGTH];
  2454. uint32_t index;
  2455. char nss[DP_NSS_LENGTH];
  2456. char mcs_rx[DP_MCS_LENGTH];
  2457. DP_TRACE(NONE, "Node Tx Stats:\n");
  2458. DP_TRACE(NONE, "Total Packet Completions %d",
  2459. peer->stats.tx.comp_pkt.num);
  2460. DP_TRACE(NONE, "Total Bytes Completions %d",
  2461. peer->stats.tx.comp_pkt.bytes);
  2462. DP_TRACE(NONE, "Success Packets %d",
  2463. peer->stats.tx.tx_success.num);
  2464. DP_TRACE(NONE, "Success Bytes %d",
  2465. peer->stats.tx.tx_success.bytes);
  2466. DP_TRACE(NONE, "Packets Failed %d",
  2467. peer->stats.tx.tx_failed);
  2468. DP_TRACE(NONE, "Packets In OFDMA %d",
  2469. peer->stats.tx.ofdma);
  2470. DP_TRACE(NONE, "Packets In STBC %d",
  2471. peer->stats.tx.stbc);
  2472. DP_TRACE(NONE, "Packets In LDPC %d",
  2473. peer->stats.tx.ldpc);
  2474. DP_TRACE(NONE, "Packet Retries %d",
  2475. peer->stats.tx.retries);
  2476. DP_TRACE(NONE, "Msdu's Not Part of Ampdu %d",
  2477. peer->stats.tx.non_amsdu_cnt);
  2478. DP_TRACE(NONE, "Mpdu's Part of Ampdu %d",
  2479. peer->stats.tx.amsdu_cnt);
  2480. DP_TRACE(NONE, "Last Packet RSSI %d",
  2481. peer->stats.tx.last_ack_rssi);
  2482. DP_TRACE(NONE, "Dropped At Host: Due To DMA Map Error %d",
  2483. peer->stats.tx.dropped.dma_map_error);
  2484. DP_TRACE(NONE, "Dropped At Host: Due To Ring Full %d",
  2485. peer->stats.tx.dropped.ring_full);
  2486. DP_TRACE(NONE, "Dropped At FW: FW Discard %d",
  2487. peer->stats.tx.dropped.fw_discard);
  2488. DP_TRACE(NONE, "Dropped At FW: FW Discard Retired %d",
  2489. peer->stats.tx.dropped.fw_discard_retired);
  2490. DP_TRACE(NONE, "Dropped At FW: FW Discard Untransmitted %d",
  2491. peer->stats.tx.dropped.fw_discard_untransmitted);
  2492. DP_TRACE(NONE, "Dropped : Mpdu Age Out %d",
  2493. peer->stats.tx.dropped.mpdu_age_out);
  2494. DP_TRACE(NONE, "Dropped : FW Discard Reason1 %d",
  2495. peer->stats.tx.dropped.fw_discard_reason1);
  2496. DP_TRACE(NONE, "Dropped : FW Discard Reason2 %d",
  2497. peer->stats.tx.dropped.fw_discard_reason2);
  2498. DP_TRACE(NONE, "Dropped : FW Discard Reason3 %d",
  2499. peer->stats.tx.dropped.fw_discard_reason3);
  2500. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  2501. index = 0;
  2502. for (i = 0; i < MAX_MCS; i++) {
  2503. index += qdf_snprint(&mcs[pkt_type][index],
  2504. DP_MCS_LENGTH - index,
  2505. " %d ",
  2506. peer->stats.tx.pkt_type[pkt_type].
  2507. mcs_count[i]);
  2508. }
  2509. }
  2510. DP_TRACE(NONE, "Packet Type 11A MCS(0-7):%s",
  2511. mcs[0]);
  2512. DP_TRACE(NONE, "Packet Type 11A MCS Invalid = %d",
  2513. peer->stats.tx.pkt_type[DOT11_A].mcs_count[MAX_MCS]);
  2514. DP_TRACE(NONE, "Packet Type 11B MCS(0-6):%s",
  2515. mcs[1]);
  2516. DP_TRACE(NONE, "Packet Type 11B MCS Invalid = %d",
  2517. peer->stats.tx.pkt_type[DOT11_B].mcs_count[MAX_MCS]);
  2518. DP_TRACE(NONE, "Packet Type 11N MCS(0-7):%s",
  2519. mcs[2]);
  2520. DP_TRACE(NONE, "Packet Type 11N MCS Invalid = %d",
  2521. peer->stats.tx.pkt_type[DOT11_N].mcs_count[MAX_MCS]);
  2522. DP_TRACE(NONE, "Packet Type 11AC MCS(0-9):%s",
  2523. mcs[3]);
  2524. DP_TRACE(NONE, "Packet Type 11AC MCS Invalid = %d",
  2525. peer->stats.tx.pkt_type[DOT11_AC].mcs_count[MAX_MCS]);
  2526. DP_TRACE(NONE, "Packet Type 11AX MCS(0-11):%s",
  2527. mcs[4]);
  2528. DP_TRACE(NONE, "Packet Type 11AX MCS Invalid = %d",
  2529. peer->stats.tx.pkt_type[DOT11_AX].mcs_count[MAX_MCS]);
  2530. DP_TRACE(NONE, "SGI:"
  2531. " 0.8us %d,"
  2532. " 0.4us %d,"
  2533. " 1.6us %d,"
  2534. " 3.2us %d,",
  2535. peer->stats.tx.sgi_count[0],
  2536. peer->stats.tx.sgi_count[1],
  2537. peer->stats.tx.sgi_count[2],
  2538. peer->stats.tx.sgi_count[3]);
  2539. DP_TRACE(NONE, "BW Counts: 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  2540. peer->stats.tx.bw[0], peer->stats.tx.bw[1],
  2541. peer->stats.tx.bw[2], peer->stats.tx.bw[3]);
  2542. DP_TRACE(NONE, "Aggregation:\n");
  2543. DP_TRACE(NONE, "Number of Msdu's Part of Amsdu: %d",
  2544. peer->stats.tx.amsdu_cnt);
  2545. DP_TRACE(NONE, "Number of Msdu's With No Msdu Level Aggregation: %d",
  2546. peer->stats.tx.non_amsdu_cnt);
  2547. DP_TRACE(NONE, "Node Rx Stats:\n");
  2548. DP_TRACE(NONE, "Packets Sent To Stack %d",
  2549. peer->stats.rx.to_stack.num);
  2550. DP_TRACE(NONE, "Bytes Sent To Stack %d",
  2551. peer->stats.rx.to_stack.bytes);
  2552. DP_TRACE(NONE, "Packets Received %d", peer->stats.rx.rcvd_reo.num);
  2553. DP_TRACE(NONE, "Bytes Received %d", peer->stats.rx.rcvd_reo.bytes);
  2554. DP_TRACE(NONE, "Unicast Packets Received %d",
  2555. peer->stats.rx.unicast.num);
  2556. DP_TRACE(NONE, "Unicast Bytes Received %d",
  2557. peer->stats.rx.unicast.bytes);
  2558. DP_TRACE(NONE, "Multicast Packets Received %d",
  2559. peer->stats.rx.multicast.num);
  2560. DP_TRACE(NONE, "Multicast Bytes Received %d",
  2561. peer->stats.rx.multicast.bytes);
  2562. DP_TRACE(NONE, "WDS Packets Received %d",
  2563. peer->stats.rx.wds.num);
  2564. DP_TRACE(NONE, "WDS Bytes Received %d",
  2565. peer->stats.rx.wds.bytes);
  2566. DP_TRACE(NONE, "Intra BSS Packets Received %d",
  2567. peer->stats.rx.intra_bss.num);
  2568. DP_TRACE(NONE, "Intra BSS Bytes Received %d",
  2569. peer->stats.rx.intra_bss.bytes);
  2570. DP_TRACE(NONE, "Raw Packets Received %d",
  2571. peer->stats.rx.raw.num);
  2572. DP_TRACE(NONE, "Raw Bytes Received %d",
  2573. peer->stats.rx.raw.bytes);
  2574. DP_TRACE(NONE, "Errors: MIC Errors %d",
  2575. peer->stats.rx.err.mic_err);
  2576. DP_TRACE(NONE, "Erros: Decryption Errors %d",
  2577. peer->stats.rx.err.decrypt_err);
  2578. DP_TRACE(NONE, "Msdu's Received As Part of Ampdu %d",
  2579. peer->stats.rx.non_ampdu_cnt);
  2580. DP_TRACE(NONE, "Msdu's Recived As Ampdu %d", peer->stats.rx.ampdu_cnt);
  2581. DP_TRACE(NONE, "Msdu's Received Not Part of Amsdu's %d",
  2582. peer->stats.rx.non_amsdu_cnt);
  2583. DP_TRACE(NONE, "MSDUs Received As Part of Amsdu %d",
  2584. peer->stats.rx.amsdu_cnt);
  2585. DP_TRACE(NONE, "SGI:"
  2586. " 0.8us %d,"
  2587. " 0.4us %d,"
  2588. " 1.6us %d,"
  2589. " 3.2us %d,",
  2590. peer->stats.rx.sgi_count[0],
  2591. peer->stats.rx.sgi_count[1],
  2592. peer->stats.rx.sgi_count[2],
  2593. peer->stats.rx.sgi_count[3]);
  2594. DP_TRACE(NONE, "BW Counts: 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  2595. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  2596. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  2597. DP_TRACE(NONE, "Reception Type:"
  2598. " SU %d,"
  2599. " MU_MIMO %d,"
  2600. " MU_OFDMA %d,"
  2601. " MU_OFDMA_MIMO %d",
  2602. peer->stats.rx.reception_type[0],
  2603. peer->stats.rx.reception_type[1],
  2604. peer->stats.rx.reception_type[2],
  2605. peer->stats.rx.reception_type[3]);
  2606. index = 0;
  2607. for (i = 0; i < MAX_MCS; i++) {
  2608. index += qdf_snprint(&mcs_rx[index], DP_MCS_LENGTH - index,
  2609. " %d,", peer->stats.rx.mcs_count[i]);
  2610. }
  2611. DP_TRACE(NONE, "MCS(0-11):%s",
  2612. mcs_rx);
  2613. index = 0;
  2614. for (i = 0; i < SS_COUNT; i++) {
  2615. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  2616. " %d,", peer->stats.rx.nss[i]);
  2617. }
  2618. DP_TRACE(NONE, "NSS(0-7):%s",
  2619. nss);
  2620. DP_TRACE(NONE, "Aggregation:\n");
  2621. DP_TRACE(NONE, "Number of Msdu's Part of Ampdu = %d",
  2622. peer->stats.rx.ampdu_cnt);
  2623. DP_TRACE(NONE, "Number of Msdu's With No Mpdu Level Aggregation : %d",
  2624. peer->stats.rx.non_ampdu_cnt);
  2625. DP_TRACE(NONE, "Number of Msdu's Part of Amsdu: %d",
  2626. peer->stats.rx.amsdu_cnt);
  2627. DP_TRACE(NONE, "Number of Msdu's With No Msdu Level Aggregation: %d",
  2628. peer->stats.rx.non_amsdu_cnt);
  2629. }
  2630. /**
  2631. * dp_print_host_stats()- Function to print the stats aggregated at host
  2632. * @vdev_handle: DP_VDEV handle
  2633. * @req: ol_txrx_stats_req
  2634. * @type: host stats type
  2635. *
  2636. * Available Stat types
  2637. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  2638. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  2639. * TXRX_TX_HOST_STATS: Print Tx Stats
  2640. * TXRX_RX_HOST_STATS: Print Rx Stats
  2641. * TXRX_CLEAR_STATS : Clear the stats
  2642. *
  2643. * Return: 0 on success, print error message in case of failure
  2644. */
  2645. static int
  2646. dp_print_host_stats(struct cdp_vdev *vdev_handle, struct ol_txrx_stats_req *req,
  2647. enum cdp_host_txrx_stats type)
  2648. {
  2649. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2650. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2651. dp_aggregate_pdev_stats(pdev);
  2652. switch (type) {
  2653. case TXRX_RX_RATE_STATS:
  2654. dp_print_rx_rates(vdev);
  2655. break;
  2656. case TXRX_TX_RATE_STATS:
  2657. dp_print_tx_rates(vdev);
  2658. break;
  2659. case TXRX_TX_HOST_STATS:
  2660. dp_print_pdev_tx_stats(pdev);
  2661. dp_print_soc_tx_stats(pdev->soc);
  2662. break;
  2663. case TXRX_RX_HOST_STATS:
  2664. dp_print_pdev_rx_stats(pdev);
  2665. dp_print_soc_rx_stats(pdev->soc);
  2666. break;
  2667. case TXRX_CLEAR_STATS:
  2668. dp_txrx_host_stats_clr(vdev);
  2669. break;
  2670. default:
  2671. DP_TRACE(NONE, "Wrong Input For TxRx Host Stats");
  2672. break;
  2673. }
  2674. return 0;
  2675. }
  2676. /*
  2677. * dp_get_peer_stats()- function to print peer stats
  2678. * @pdev_handle: DP_PDEV handle
  2679. * @mac_addr: mac address of the peer
  2680. *
  2681. * Return: void
  2682. */
  2683. static void
  2684. dp_get_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  2685. {
  2686. struct dp_peer *peer;
  2687. uint8_t local_id;
  2688. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  2689. &local_id);
  2690. dp_print_peer_stats(peer);
  2691. return;
  2692. }
  2693. /*
  2694. * dp_set_vdev_param: function to set parameters in vdev
  2695. * @param: parameter type to be set
  2696. * @val: value of parameter to be set
  2697. *
  2698. * return: void
  2699. */
  2700. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  2701. enum cdp_vdev_param_type param, uint32_t val)
  2702. {
  2703. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2704. switch (param) {
  2705. case CDP_ENABLE_NAWDS:
  2706. vdev->nawds_enabled = val;
  2707. case CDP_ENABLE_MCAST_EN:
  2708. vdev->mcast_enhancement_en = val;
  2709. default:
  2710. break;
  2711. }
  2712. }
  2713. /**
  2714. * dp_peer_set_nawds: set nawds bit in peer
  2715. * @peer_handle: pointer to peer
  2716. * @value: enable/disable nawds
  2717. *
  2718. * return: void
  2719. */
  2720. static void dp_peer_set_nawds(void *peer_handle, uint8_t value)
  2721. {
  2722. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  2723. peer->nawds_enabled = value;
  2724. }
  2725. /*
  2726. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  2727. * @vdev_handle: DP_VDEV handle
  2728. * @map_id:ID of map that needs to be updated
  2729. *
  2730. * Return: void
  2731. */
  2732. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  2733. uint8_t map_id)
  2734. {
  2735. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2736. vdev->dscp_tid_map_id = map_id;
  2737. return;
  2738. }
  2739. /**
  2740. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  2741. * @pdev: DP_PDEV handle
  2742. * @map_id: ID of map that needs to be updated
  2743. * @tos: index value in map
  2744. * @tid: tid value passed by the user
  2745. *
  2746. * Return: void
  2747. */
  2748. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  2749. uint8_t map_id, uint8_t tos, uint8_t tid)
  2750. {
  2751. uint8_t dscp;
  2752. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  2753. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  2754. pdev->dscp_tid_map[map_id][dscp] = tid;
  2755. hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
  2756. map_id, dscp);
  2757. return;
  2758. }
  2759. /*
  2760. * dp_txrx_stats() - function to map to firmware and host stats
  2761. * @vdev: virtual handle
  2762. * @req: statistics request handle
  2763. * @stats: type of statistics requested
  2764. *
  2765. * Return: integer
  2766. */
  2767. static int dp_txrx_stats(struct cdp_vdev *vdev,
  2768. struct ol_txrx_stats_req *req, enum cdp_stats stats)
  2769. {
  2770. int host_stats;
  2771. int fw_stats;
  2772. if (stats >= CDP_TXRX_MAX_STATS)
  2773. return 0;
  2774. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  2775. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  2776. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2777. "stats: %u fw_stats_type: %d host_stats_type: %d",
  2778. stats, fw_stats, host_stats);
  2779. /* TODO: Firmware Mapping not implemented */
  2780. if (host_stats != TXRX_HOST_STATS_INVALID)
  2781. return dp_print_host_stats(vdev, req, host_stats);
  2782. return 0;
  2783. }
  2784. /*
  2785. * dp_txrx_path_stats() - Function to display dump stats
  2786. * @soc - soc handle
  2787. *
  2788. * return: none
  2789. */
  2790. static void dp_txrx_path_stats(struct dp_soc *soc)
  2791. {
  2792. uint8_t error_code;
  2793. uint8_t loop_pdev;
  2794. struct dp_pdev *pdev;
  2795. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  2796. pdev = soc->pdev_list[loop_pdev];
  2797. dp_aggregate_pdev_stats(pdev);
  2798. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2799. "Tx path Statistics:");
  2800. DP_TRACE(NONE, "from stack: %u msdus (%u bytes)",
  2801. pdev->stats.tx_i.rcvd.num,
  2802. pdev->stats.tx_i.rcvd.bytes);
  2803. DP_TRACE(NONE, "processed from host: %u msdus (%u bytes)",
  2804. pdev->stats.tx_i.processed.num,
  2805. pdev->stats.tx_i.processed.bytes);
  2806. DP_TRACE(NONE, "successfully transmitted: %u msdus (%u bytes)",
  2807. pdev->stats.tx.tx_success.num,
  2808. pdev->stats.tx.tx_success.bytes);
  2809. DP_TRACE(NONE, "Dropped in host:");
  2810. DP_TRACE(NONE, "Total packets dropped: %u,",
  2811. pdev->stats.tx_i.dropped.dropped_pkt.num);
  2812. DP_TRACE(NONE, "Descriptor not available: %u",
  2813. pdev->stats.tx_i.dropped.desc_na);
  2814. DP_TRACE(NONE, "Ring full: %u",
  2815. pdev->stats.tx_i.dropped.ring_full);
  2816. DP_TRACE(NONE, "Enqueue fail: %u",
  2817. pdev->stats.tx_i.dropped.enqueue_fail);
  2818. DP_TRACE(NONE, "DMA Error: %u",
  2819. pdev->stats.tx_i.dropped.dma_error);
  2820. DP_TRACE(NONE, "Dropped in hardware:");
  2821. DP_TRACE(NONE, "total packets dropped: %u",
  2822. pdev->stats.tx.tx_failed);
  2823. DP_TRACE(NONE, "mpdu age out: %u",
  2824. pdev->stats.tx.dropped.mpdu_age_out);
  2825. DP_TRACE(NONE, "firmware discard reason1: %u",
  2826. pdev->stats.tx.dropped.fw_discard_reason1);
  2827. DP_TRACE(NONE, "firmware discard reason2: %u",
  2828. pdev->stats.tx.dropped.fw_discard_reason2);
  2829. DP_TRACE(NONE, "firmware discard reason3: %u",
  2830. pdev->stats.tx.dropped.fw_discard_reason3);
  2831. DP_TRACE(NONE, "peer_invalid: %u",
  2832. pdev->soc->stats.tx.tx_invalid_peer.num);
  2833. DP_TRACE(NONE, "Tx packets sent per interrupt:");
  2834. DP_TRACE(NONE, "Single Packet: %u",
  2835. pdev->stats.tx_comp_histogram.pkts_1);
  2836. DP_TRACE(NONE, "2-20 Packets: %u",
  2837. pdev->stats.tx_comp_histogram.pkts_2_20);
  2838. DP_TRACE(NONE, "21-40 Packets: %u",
  2839. pdev->stats.tx_comp_histogram.pkts_21_40);
  2840. DP_TRACE(NONE, "41-60 Packets: %u",
  2841. pdev->stats.tx_comp_histogram.pkts_41_60);
  2842. DP_TRACE(NONE, "61-80 Packets: %u",
  2843. pdev->stats.tx_comp_histogram.pkts_61_80);
  2844. DP_TRACE(NONE, "81-100 Packets: %u",
  2845. pdev->stats.tx_comp_histogram.pkts_81_100);
  2846. DP_TRACE(NONE, "101-200 Packets: %u",
  2847. pdev->stats.tx_comp_histogram.pkts_101_200);
  2848. DP_TRACE(NONE, " 201+ Packets: %u",
  2849. pdev->stats.tx_comp_histogram.pkts_201_plus);
  2850. DP_TRACE(NONE, "Rx path statistics");
  2851. DP_TRACE(NONE, "delivered %u msdus ( %u bytes),",
  2852. pdev->stats.rx.to_stack.num,
  2853. pdev->stats.rx.to_stack.bytes);
  2854. DP_TRACE(NONE, "received on reo %u msdus ( %u bytes),",
  2855. pdev->stats.rx.rcvd_reo.num,
  2856. pdev->stats.rx.rcvd_reo.bytes);
  2857. DP_TRACE(NONE, "intra-bss packets %u msdus ( %u bytes),",
  2858. pdev->stats.rx.intra_bss.num,
  2859. pdev->stats.rx.intra_bss.bytes);
  2860. DP_TRACE(NONE, "raw packets %u msdus ( %u bytes),",
  2861. pdev->stats.rx.raw.num,
  2862. pdev->stats.rx.raw.bytes);
  2863. DP_TRACE(NONE, "dropped: error %u msdus",
  2864. pdev->stats.rx.err.mic_err);
  2865. DP_TRACE(NONE, "peer invalid %u",
  2866. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  2867. DP_TRACE(NONE, "Reo Statistics");
  2868. DP_TRACE(NONE, "rbm error: %u msdus",
  2869. pdev->soc->stats.rx.err.invalid_rbm);
  2870. DP_TRACE(NONE, "hal ring access fail: %u msdus",
  2871. pdev->soc->stats.rx.err.hal_ring_access_fail);
  2872. DP_TRACE(NONE, "Reo errors");
  2873. for (error_code = 0; error_code < REO_ERROR_TYPE_MAX;
  2874. error_code++) {
  2875. DP_TRACE(NONE, "Reo error number (%u): %u msdus",
  2876. error_code,
  2877. pdev->soc->stats.rx.err.reo_error[error_code]);
  2878. }
  2879. for (error_code = 0; error_code < MAX_RXDMA_ERRORS;
  2880. error_code++) {
  2881. DP_TRACE(NONE, "Rxdma error number (%u): %u msdus",
  2882. error_code,
  2883. pdev->soc->stats.rx.err
  2884. .rxdma_error[error_code]);
  2885. }
  2886. DP_TRACE(NONE, "Rx packets reaped per interrupt:");
  2887. DP_TRACE(NONE, "Single Packet: %u",
  2888. pdev->stats.rx_ind_histogram.pkts_1);
  2889. DP_TRACE(NONE, "2-20 Packets: %u",
  2890. pdev->stats.rx_ind_histogram.pkts_2_20);
  2891. DP_TRACE(NONE, "21-40 Packets: %u",
  2892. pdev->stats.rx_ind_histogram.pkts_21_40);
  2893. DP_TRACE(NONE, "41-60 Packets: %u",
  2894. pdev->stats.rx_ind_histogram.pkts_41_60);
  2895. DP_TRACE(NONE, "61-80 Packets: %u",
  2896. pdev->stats.rx_ind_histogram.pkts_61_80);
  2897. DP_TRACE(NONE, "81-100 Packets: %u",
  2898. pdev->stats.rx_ind_histogram.pkts_81_100);
  2899. DP_TRACE(NONE, "101-200 Packets: %u",
  2900. pdev->stats.rx_ind_histogram.pkts_101_200);
  2901. DP_TRACE(NONE, " 201+ Packets: %u",
  2902. pdev->stats.rx_ind_histogram.pkts_201_plus);
  2903. }
  2904. }
  2905. /*
  2906. * dp_txrx_dump_stats() - Dump statistics
  2907. * @value - Statistics option
  2908. */
  2909. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value)
  2910. {
  2911. struct dp_soc *soc =
  2912. (struct dp_soc *)psoc;
  2913. QDF_STATUS status = QDF_STATUS_SUCCESS;
  2914. if (!soc) {
  2915. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2916. "%s: soc is NULL", __func__);
  2917. return QDF_STATUS_E_INVAL;
  2918. }
  2919. switch (value) {
  2920. case CDP_TXRX_PATH_STATS:
  2921. dp_txrx_path_stats(soc);
  2922. break;
  2923. case CDP_TXRX_TSO_STATS:
  2924. /* TODO: NOT IMPLEMENTED */
  2925. break;
  2926. case CDP_DUMP_TX_FLOW_POOL_INFO:
  2927. /* TODO: NOT IMPLEMENTED */
  2928. break;
  2929. case CDP_TXRX_DESC_STATS:
  2930. /* TODO: NOT IMPLEMENTED */
  2931. break;
  2932. default:
  2933. status = QDF_STATUS_E_INVAL;
  2934. break;
  2935. }
  2936. return status;
  2937. }
  2938. static struct cdp_cmn_ops dp_ops_cmn = {
  2939. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  2940. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  2941. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  2942. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  2943. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  2944. .txrx_peer_create = dp_peer_create_wifi3,
  2945. .txrx_peer_setup = dp_peer_setup_wifi3,
  2946. .txrx_peer_teardown = NULL,
  2947. .txrx_peer_delete = dp_peer_delete_wifi3,
  2948. .txrx_vdev_register = dp_vdev_register_wifi3,
  2949. .txrx_soc_detach = dp_soc_detach_wifi3,
  2950. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  2951. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  2952. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  2953. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  2954. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  2955. .delba_process = dp_delba_process_wifi3,
  2956. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  2957. .flush_cache_rx_queue = NULL,
  2958. /* TODO: get API's for dscp-tid need to be added*/
  2959. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  2960. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  2961. .txrx_stats = dp_txrx_stats,
  2962. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  2963. .display_stats = dp_txrx_dump_stats,
  2964. /* TODO: Add other functions */
  2965. };
  2966. static struct cdp_ctrl_ops dp_ops_ctrl = {
  2967. .txrx_peer_authorize = dp_peer_authorize,
  2968. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  2969. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  2970. #ifdef MESH_MODE_SUPPORT
  2971. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  2972. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  2973. #endif
  2974. .txrx_set_vdev_param = dp_set_vdev_param,
  2975. .txrx_peer_set_nawds = dp_peer_set_nawds,
  2976. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  2977. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  2978. /* TODO: Add other functions */
  2979. };
  2980. static struct cdp_me_ops dp_ops_me = {
  2981. #ifdef ATH_SUPPORT_IQUE
  2982. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  2983. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  2984. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  2985. #endif
  2986. };
  2987. static struct cdp_mon_ops dp_ops_mon = {
  2988. .txrx_monitor_set_filter_ucast_data = NULL,
  2989. .txrx_monitor_set_filter_mcast_data = NULL,
  2990. .txrx_monitor_set_filter_non_data = NULL,
  2991. .txrx_monitor_get_filter_ucast_data = NULL,
  2992. .txrx_monitor_get_filter_mcast_data = NULL,
  2993. .txrx_monitor_get_filter_non_data = NULL,
  2994. .txrx_reset_monitor_mode = NULL,
  2995. };
  2996. static struct cdp_host_stats_ops dp_ops_host_stats = {
  2997. .txrx_host_stats_get = dp_print_host_stats,
  2998. .txrx_per_peer_stats = dp_get_peer_stats,
  2999. /* TODO */
  3000. };
  3001. static struct cdp_wds_ops dp_ops_wds = {
  3002. /* TODO */
  3003. };
  3004. static struct cdp_raw_ops dp_ops_raw = {
  3005. /* TODO */
  3006. };
  3007. #ifdef CONFIG_WIN
  3008. static struct cdp_pflow_ops dp_ops_pflow = {
  3009. /* TODO */
  3010. };
  3011. #endif /* CONFIG_WIN */
  3012. #ifndef CONFIG_WIN
  3013. static struct cdp_misc_ops dp_ops_misc = {
  3014. .get_opmode = dp_get_opmode,
  3015. };
  3016. static struct cdp_flowctl_ops dp_ops_flowctl = {
  3017. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3018. };
  3019. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  3020. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3021. };
  3022. static struct cdp_ipa_ops dp_ops_ipa = {
  3023. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3024. };
  3025. static struct cdp_lro_ops dp_ops_lro = {
  3026. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3027. };
  3028. /**
  3029. * dp_dummy_bus_suspend() - dummy bus suspend op
  3030. *
  3031. * FIXME - This is a placeholder for the actual logic!
  3032. *
  3033. * Return: QDF_STATUS_SUCCESS
  3034. */
  3035. inline QDF_STATUS dp_dummy_bus_suspend(void)
  3036. {
  3037. return QDF_STATUS_SUCCESS;
  3038. }
  3039. /**
  3040. * dp_dummy_bus_resume() - dummy bus resume
  3041. *
  3042. * FIXME - This is a placeholder for the actual logic!
  3043. *
  3044. * Return: QDF_STATUS_SUCCESS
  3045. */
  3046. inline QDF_STATUS dp_dummy_bus_resume(void)
  3047. {
  3048. return QDF_STATUS_SUCCESS;
  3049. }
  3050. static struct cdp_bus_ops dp_ops_bus = {
  3051. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3052. .bus_suspend = dp_dummy_bus_suspend,
  3053. .bus_resume = dp_dummy_bus_resume
  3054. };
  3055. static struct cdp_ocb_ops dp_ops_ocb = {
  3056. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3057. };
  3058. static struct cdp_throttle_ops dp_ops_throttle = {
  3059. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3060. };
  3061. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  3062. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3063. };
  3064. static struct cdp_cfg_ops dp_ops_cfg = {
  3065. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3066. };
  3067. static struct cdp_peer_ops dp_ops_peer = {
  3068. .register_peer = dp_register_peer,
  3069. .clear_peer = dp_clear_peer,
  3070. .find_peer_by_addr = dp_find_peer_by_addr,
  3071. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  3072. .local_peer_id = dp_local_peer_id,
  3073. .peer_find_by_local_id = dp_peer_find_by_local_id,
  3074. .peer_state_update = dp_peer_state_update,
  3075. .get_vdevid = dp_get_vdevid,
  3076. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  3077. .get_vdev_for_peer = dp_get_vdev_for_peer,
  3078. .get_peer_state = dp_get_peer_state,
  3079. .last_assoc_received = dp_get_last_assoc_received,
  3080. .last_disassoc_received = dp_get_last_disassoc_received,
  3081. .last_deauth_received = dp_get_last_deauth_received,
  3082. };
  3083. #endif
  3084. static struct cdp_ops dp_txrx_ops = {
  3085. .cmn_drv_ops = &dp_ops_cmn,
  3086. .ctrl_ops = &dp_ops_ctrl,
  3087. .me_ops = &dp_ops_me,
  3088. .mon_ops = &dp_ops_mon,
  3089. .host_stats_ops = &dp_ops_host_stats,
  3090. .wds_ops = &dp_ops_wds,
  3091. .raw_ops = &dp_ops_raw,
  3092. #ifdef CONFIG_WIN
  3093. .pflow_ops = &dp_ops_pflow,
  3094. #endif /* CONFIG_WIN */
  3095. #ifndef CONFIG_WIN
  3096. .misc_ops = &dp_ops_misc,
  3097. .cfg_ops = &dp_ops_cfg,
  3098. .flowctl_ops = &dp_ops_flowctl,
  3099. .l_flowctl_ops = &dp_ops_l_flowctl,
  3100. .ipa_ops = &dp_ops_ipa,
  3101. .lro_ops = &dp_ops_lro,
  3102. .bus_ops = &dp_ops_bus,
  3103. .ocb_ops = &dp_ops_ocb,
  3104. .peer_ops = &dp_ops_peer,
  3105. .throttle_ops = &dp_ops_throttle,
  3106. .mob_stats_ops = &dp_ops_mob_stats,
  3107. #endif
  3108. };
  3109. /*
  3110. * dp_soc_attach_wifi3() - Attach txrx SOC
  3111. * @osif_soc: Opaque SOC handle from OSIF/HDD
  3112. * @htc_handle: Opaque HTC handle
  3113. * @hif_handle: Opaque HIF handle
  3114. * @qdf_osdev: QDF device
  3115. *
  3116. * Return: DP SOC handle on success, NULL on failure
  3117. */
  3118. /*
  3119. * Local prototype added to temporarily address warning caused by
  3120. * -Wmissing-prototypes. A more correct solution, namely to expose
  3121. * a prototype in an appropriate header file, will come later.
  3122. */
  3123. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  3124. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  3125. struct ol_if_ops *ol_ops, struct wlan_objmgr_psoc *psoc);
  3126. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  3127. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  3128. struct ol_if_ops *ol_ops, struct wlan_objmgr_psoc *psoc)
  3129. {
  3130. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  3131. if (!soc) {
  3132. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3133. FL("DP SOC memory allocation failed"));
  3134. goto fail0;
  3135. }
  3136. soc->cdp_soc.ops = &dp_txrx_ops;
  3137. soc->cdp_soc.ol_ops = ol_ops;
  3138. soc->osif_soc = osif_soc;
  3139. soc->osdev = qdf_osdev;
  3140. soc->hif_handle = hif_handle;
  3141. soc->psoc = psoc;
  3142. soc->hal_soc = hif_get_hal_handle(hif_handle);
  3143. soc->htt_handle = htt_soc_attach(soc, osif_soc, htc_handle,
  3144. soc->hal_soc, qdf_osdev);
  3145. if (!soc->htt_handle) {
  3146. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3147. FL("HTT attach failed"));
  3148. goto fail1;
  3149. }
  3150. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  3151. if (!soc->wlan_cfg_ctx) {
  3152. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3153. FL("wlan_cfg_soc_attach failed"));
  3154. goto fail2;
  3155. }
  3156. qdf_spinlock_create(&soc->peer_ref_mutex);
  3157. if (dp_soc_interrupt_attach(soc) != QDF_STATUS_SUCCESS) {
  3158. goto fail2;
  3159. }
  3160. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  3161. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  3162. return (void *)soc;
  3163. fail2:
  3164. htt_soc_detach(soc->htt_handle);
  3165. fail1:
  3166. qdf_mem_free(soc);
  3167. fail0:
  3168. return NULL;
  3169. }