dp_main.c 274 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522452345244525452645274528452945304531453245334534453545364537453845394540454145424543454445454546454745484549455045514552455345544555455645574558455945604561456245634564456545664567456845694570457145724573457445754576457745784579458045814582458345844585458645874588458945904591459245934594459545964597459845994600460146024603460446054606460746084609461046114612461346144615461646174618461946204621462246234624462546264627462846294630463146324633463446354636463746384639464046414642464346444645464646474648464946504651465246534654465546564657465846594660466146624663466446654666466746684669467046714672467346744675467646774678467946804681468246834684468546864687468846894690469146924693469446954696469746984699470047014702470347044705470647074708470947104711471247134714471547164717471847194720472147224723472447254726472747284729473047314732473347344735473647374738473947404741474247434744474547464747474847494750475147524753475447554756475747584759476047614762476347644765476647674768476947704771477247734774477547764777477847794780478147824783478447854786478747884789479047914792479347944795479647974798479948004801480248034804480548064807480848094810481148124813481448154816481748184819482048214822482348244825482648274828482948304831483248334834483548364837483848394840484148424843484448454846484748484849485048514852485348544855485648574858485948604861486248634864486548664867486848694870487148724873487448754876487748784879488048814882488348844885488648874888488948904891489248934894489548964897489848994900490149024903490449054906490749084909491049114912491349144915491649174918491949204921492249234924492549264927492849294930493149324933493449354936493749384939494049414942494349444945494649474948494949504951495249534954495549564957495849594960496149624963496449654966496749684969497049714972497349744975497649774978497949804981498249834984498549864987498849894990499149924993499449954996499749984999500050015002500350045005500650075008500950105011501250135014501550165017501850195020502150225023502450255026502750285029503050315032503350345035503650375038503950405041504250435044504550465047504850495050505150525053505450555056505750585059506050615062506350645065506650675068506950705071507250735074507550765077507850795080508150825083508450855086508750885089509050915092509350945095509650975098509951005101510251035104510551065107510851095110511151125113511451155116511751185119512051215122512351245125512651275128512951305131513251335134513551365137513851395140514151425143514451455146514751485149515051515152515351545155515651575158515951605161516251635164516551665167516851695170517151725173517451755176517751785179518051815182518351845185518651875188518951905191519251935194519551965197519851995200520152025203520452055206520752085209521052115212521352145215521652175218521952205221522252235224522552265227522852295230523152325233523452355236523752385239524052415242524352445245524652475248524952505251525252535254525552565257525852595260526152625263526452655266526752685269527052715272527352745275527652775278527952805281528252835284528552865287528852895290529152925293529452955296529752985299530053015302530353045305530653075308530953105311531253135314531553165317531853195320532153225323532453255326532753285329533053315332533353345335533653375338533953405341534253435344534553465347534853495350535153525353535453555356535753585359536053615362536353645365536653675368536953705371537253735374537553765377537853795380538153825383538453855386538753885389539053915392539353945395539653975398539954005401540254035404540554065407540854095410541154125413541454155416541754185419542054215422542354245425542654275428542954305431543254335434543554365437543854395440544154425443544454455446544754485449545054515452545354545455545654575458545954605461546254635464546554665467546854695470547154725473547454755476547754785479548054815482548354845485548654875488548954905491549254935494549554965497549854995500550155025503550455055506550755085509551055115512551355145515551655175518551955205521552255235524552555265527552855295530553155325533553455355536553755385539554055415542554355445545554655475548554955505551555255535554555555565557555855595560556155625563556455655566556755685569557055715572557355745575557655775578557955805581558255835584558555865587558855895590559155925593559455955596559755985599560056015602560356045605560656075608560956105611561256135614561556165617561856195620562156225623562456255626562756285629563056315632563356345635563656375638563956405641564256435644564556465647564856495650565156525653565456555656565756585659566056615662566356645665566656675668566956705671567256735674567556765677567856795680568156825683568456855686568756885689569056915692569356945695569656975698569957005701570257035704570557065707570857095710571157125713571457155716571757185719572057215722572357245725572657275728572957305731573257335734573557365737573857395740574157425743574457455746574757485749575057515752575357545755575657575758575957605761576257635764576557665767576857695770577157725773577457755776577757785779578057815782578357845785578657875788578957905791579257935794579557965797579857995800580158025803580458055806580758085809581058115812581358145815581658175818581958205821582258235824582558265827582858295830583158325833583458355836583758385839584058415842584358445845584658475848584958505851585258535854585558565857585858595860586158625863586458655866586758685869587058715872587358745875587658775878587958805881588258835884588558865887588858895890589158925893589458955896589758985899590059015902590359045905590659075908590959105911591259135914591559165917591859195920592159225923592459255926592759285929593059315932593359345935593659375938593959405941594259435944594559465947594859495950595159525953595459555956595759585959596059615962596359645965596659675968596959705971597259735974597559765977597859795980598159825983598459855986598759885989599059915992599359945995599659975998599960006001600260036004600560066007600860096010601160126013601460156016601760186019602060216022602360246025602660276028602960306031603260336034603560366037603860396040604160426043604460456046604760486049605060516052605360546055605660576058605960606061606260636064606560666067606860696070607160726073607460756076607760786079608060816082608360846085608660876088608960906091609260936094609560966097609860996100610161026103610461056106610761086109611061116112611361146115611661176118611961206121612261236124612561266127612861296130613161326133613461356136613761386139614061416142614361446145614661476148614961506151615261536154615561566157615861596160616161626163616461656166616761686169617061716172617361746175617661776178617961806181618261836184618561866187618861896190619161926193619461956196619761986199620062016202620362046205620662076208620962106211621262136214621562166217621862196220622162226223622462256226622762286229623062316232623362346235623662376238623962406241624262436244624562466247624862496250625162526253625462556256625762586259626062616262626362646265626662676268626962706271627262736274627562766277627862796280628162826283628462856286628762886289629062916292629362946295629662976298629963006301630263036304630563066307630863096310631163126313631463156316631763186319632063216322632363246325632663276328632963306331633263336334633563366337633863396340634163426343634463456346634763486349635063516352635363546355635663576358635963606361636263636364636563666367636863696370637163726373637463756376637763786379638063816382638363846385638663876388638963906391639263936394639563966397639863996400640164026403640464056406640764086409641064116412641364146415641664176418641964206421642264236424642564266427642864296430643164326433643464356436643764386439644064416442644364446445644664476448644964506451645264536454645564566457645864596460646164626463646464656466646764686469647064716472647364746475647664776478647964806481648264836484648564866487648864896490649164926493649464956496649764986499650065016502650365046505650665076508650965106511651265136514651565166517651865196520652165226523652465256526652765286529653065316532653365346535653665376538653965406541654265436544654565466547654865496550655165526553655465556556655765586559656065616562656365646565656665676568656965706571657265736574657565766577657865796580658165826583658465856586658765886589659065916592659365946595659665976598659966006601660266036604660566066607660866096610661166126613661466156616661766186619662066216622662366246625662666276628662966306631663266336634663566366637663866396640664166426643664466456646664766486649665066516652665366546655665666576658665966606661666266636664666566666667666866696670667166726673667466756676667766786679668066816682668366846685668666876688668966906691669266936694669566966697669866996700670167026703670467056706670767086709671067116712671367146715671667176718671967206721672267236724672567266727672867296730673167326733673467356736673767386739674067416742674367446745674667476748674967506751675267536754675567566757675867596760676167626763676467656766676767686769677067716772677367746775677667776778677967806781678267836784678567866787678867896790679167926793679467956796679767986799680068016802680368046805680668076808680968106811681268136814681568166817681868196820682168226823682468256826682768286829683068316832683368346835683668376838683968406841684268436844684568466847684868496850685168526853685468556856685768586859686068616862686368646865686668676868686968706871687268736874687568766877687868796880688168826883688468856886688768886889689068916892689368946895689668976898689969006901690269036904690569066907690869096910691169126913691469156916691769186919692069216922692369246925692669276928692969306931693269336934693569366937693869396940694169426943694469456946694769486949695069516952695369546955695669576958695969606961696269636964696569666967696869696970697169726973697469756976697769786979698069816982698369846985698669876988698969906991699269936994699569966997699869997000700170027003700470057006700770087009701070117012701370147015701670177018701970207021702270237024702570267027702870297030703170327033703470357036703770387039704070417042704370447045704670477048704970507051705270537054705570567057705870597060706170627063706470657066706770687069707070717072707370747075707670777078707970807081708270837084708570867087708870897090709170927093709470957096709770987099710071017102710371047105710671077108710971107111711271137114711571167117711871197120712171227123712471257126712771287129713071317132713371347135713671377138713971407141714271437144714571467147714871497150715171527153715471557156715771587159716071617162716371647165716671677168716971707171717271737174717571767177717871797180718171827183718471857186718771887189719071917192719371947195719671977198719972007201720272037204720572067207720872097210721172127213721472157216721772187219722072217222722372247225722672277228722972307231723272337234723572367237723872397240724172427243724472457246724772487249725072517252725372547255725672577258725972607261726272637264726572667267726872697270727172727273727472757276727772787279728072817282728372847285728672877288728972907291729272937294729572967297729872997300730173027303730473057306730773087309731073117312731373147315731673177318731973207321732273237324732573267327732873297330733173327333733473357336733773387339734073417342734373447345734673477348734973507351735273537354735573567357735873597360736173627363736473657366736773687369737073717372737373747375737673777378737973807381738273837384738573867387738873897390739173927393739473957396739773987399740074017402740374047405740674077408740974107411741274137414741574167417741874197420742174227423742474257426742774287429743074317432743374347435743674377438743974407441744274437444744574467447744874497450745174527453745474557456745774587459746074617462746374647465746674677468746974707471747274737474747574767477747874797480748174827483748474857486748774887489749074917492749374947495749674977498749975007501750275037504750575067507750875097510751175127513751475157516751775187519752075217522752375247525752675277528752975307531753275337534753575367537753875397540754175427543754475457546754775487549755075517552755375547555755675577558755975607561756275637564756575667567756875697570757175727573757475757576757775787579758075817582758375847585758675877588758975907591759275937594759575967597759875997600760176027603760476057606760776087609761076117612761376147615761676177618761976207621762276237624762576267627762876297630763176327633763476357636763776387639764076417642764376447645764676477648764976507651765276537654765576567657765876597660766176627663766476657666766776687669767076717672767376747675767676777678767976807681768276837684768576867687768876897690769176927693769476957696769776987699770077017702770377047705770677077708770977107711771277137714771577167717771877197720772177227723772477257726772777287729773077317732773377347735773677377738773977407741774277437744774577467747774877497750775177527753775477557756775777587759776077617762776377647765776677677768776977707771777277737774777577767777777877797780778177827783778477857786778777887789779077917792779377947795779677977798779978007801780278037804780578067807780878097810781178127813781478157816781778187819782078217822782378247825782678277828782978307831783278337834783578367837783878397840784178427843784478457846784778487849785078517852785378547855785678577858785978607861786278637864786578667867786878697870787178727873787478757876787778787879788078817882788378847885788678877888788978907891789278937894789578967897789878997900790179027903790479057906790779087909791079117912791379147915791679177918791979207921792279237924792579267927792879297930793179327933793479357936793779387939794079417942794379447945794679477948794979507951795279537954795579567957795879597960796179627963796479657966796779687969797079717972797379747975797679777978797979807981798279837984798579867987798879897990799179927993799479957996799779987999800080018002800380048005800680078008800980108011801280138014801580168017801880198020802180228023802480258026802780288029803080318032803380348035803680378038803980408041804280438044804580468047804880498050805180528053805480558056805780588059806080618062806380648065806680678068806980708071807280738074807580768077807880798080808180828083808480858086808780888089809080918092809380948095809680978098809981008101810281038104810581068107810881098110811181128113811481158116811781188119812081218122812381248125812681278128812981308131813281338134813581368137813881398140814181428143814481458146814781488149815081518152815381548155815681578158815981608161816281638164816581668167816881698170817181728173817481758176817781788179818081818182818381848185818681878188818981908191819281938194819581968197819881998200820182028203820482058206820782088209821082118212821382148215821682178218821982208221822282238224822582268227822882298230823182328233823482358236823782388239824082418242824382448245824682478248824982508251825282538254825582568257825882598260826182628263826482658266826782688269827082718272827382748275827682778278827982808281828282838284828582868287828882898290829182928293829482958296829782988299830083018302830383048305830683078308830983108311831283138314831583168317831883198320832183228323832483258326832783288329833083318332833383348335833683378338833983408341834283438344834583468347834883498350835183528353835483558356835783588359836083618362836383648365836683678368836983708371837283738374837583768377837883798380838183828383838483858386838783888389839083918392839383948395839683978398839984008401840284038404840584068407840884098410841184128413841484158416841784188419842084218422842384248425842684278428842984308431843284338434843584368437843884398440844184428443844484458446844784488449845084518452845384548455845684578458845984608461846284638464846584668467846884698470847184728473847484758476847784788479848084818482848384848485848684878488848984908491849284938494849584968497849884998500850185028503850485058506850785088509851085118512851385148515851685178518851985208521852285238524852585268527852885298530853185328533853485358536853785388539854085418542854385448545854685478548854985508551855285538554855585568557855885598560856185628563856485658566856785688569857085718572857385748575857685778578857985808581858285838584858585868587858885898590859185928593859485958596859785988599860086018602860386048605860686078608860986108611861286138614861586168617861886198620862186228623862486258626862786288629863086318632863386348635863686378638863986408641864286438644864586468647864886498650865186528653865486558656865786588659866086618662866386648665866686678668866986708671867286738674867586768677867886798680868186828683868486858686868786888689869086918692869386948695869686978698869987008701870287038704870587068707870887098710871187128713871487158716871787188719872087218722872387248725872687278728872987308731873287338734873587368737873887398740874187428743874487458746874787488749875087518752875387548755875687578758875987608761876287638764876587668767876887698770877187728773877487758776877787788779878087818782878387848785878687878788878987908791879287938794879587968797879887998800880188028803880488058806880788088809881088118812881388148815881688178818881988208821882288238824882588268827882888298830883188328833883488358836883788388839884088418842884388448845884688478848884988508851885288538854885588568857885888598860886188628863886488658866886788688869887088718872887388748875887688778878887988808881888288838884888588868887888888898890889188928893889488958896889788988899890089018902890389048905890689078908890989108911891289138914891589168917891889198920892189228923892489258926892789288929893089318932893389348935893689378938893989408941894289438944894589468947894889498950895189528953895489558956895789588959896089618962896389648965896689678968896989708971897289738974897589768977897889798980898189828983898489858986898789888989899089918992899389948995899689978998899990009001900290039004900590069007900890099010901190129013901490159016901790189019902090219022902390249025902690279028902990309031903290339034903590369037903890399040904190429043904490459046904790489049905090519052905390549055905690579058905990609061906290639064906590669067906890699070907190729073907490759076907790789079908090819082908390849085908690879088908990909091909290939094909590969097909890999100910191029103910491059106910791089109911091119112911391149115911691179118911991209121912291239124912591269127912891299130913191329133913491359136913791389139914091419142914391449145914691479148914991509151915291539154915591569157915891599160916191629163916491659166916791689169917091719172917391749175917691779178917991809181918291839184918591869187918891899190919191929193919491959196919791989199920092019202920392049205920692079208920992109211921292139214921592169217921892199220922192229223922492259226922792289229923092319232923392349235923692379238923992409241924292439244924592469247924892499250925192529253925492559256925792589259926092619262926392649265926692679268926992709271927292739274927592769277927892799280928192829283928492859286928792889289929092919292929392949295929692979298929993009301930293039304930593069307930893099310931193129313931493159316931793189319932093219322932393249325932693279328932993309331933293339334933593369337933893399340934193429343934493459346934793489349935093519352935393549355935693579358935993609361936293639364936593669367936893699370937193729373937493759376937793789379938093819382938393849385938693879388938993909391939293939394939593969397939893999400940194029403940494059406940794089409941094119412941394149415941694179418941994209421942294239424942594269427942894299430943194329433943494359436943794389439944094419442944394449445944694479448944994509451945294539454945594569457945894599460946194629463946494659466946794689469947094719472947394749475947694779478947994809481948294839484948594869487948894899490949194929493949494959496949794989499950095019502950395049505950695079508950995109511951295139514951595169517951895199520952195229523952495259526952795289529953095319532953395349535953695379538953995409541954295439544954595469547954895499550955195529553955495559556955795589559956095619562956395649565956695679568956995709571957295739574957595769577957895799580958195829583958495859586958795889589959095919592959395949595959695979598959996009601960296039604960596069607960896099610961196129613961496159616961796189619962096219622962396249625962696279628962996309631963296339634963596369637963896399640964196429643964496459646964796489649965096519652965396549655965696579658965996609661966296639664966596669667966896699670967196729673967496759676967796789679968096819682968396849685968696879688968996909691969296939694969596969697969896999700970197029703970497059706970797089709971097119712971397149715971697179718971997209721972297239724972597269727972897299730973197329733973497359736973797389739974097419742974397449745974697479748974997509751975297539754975597569757975897599760976197629763976497659766976797689769977097719772977397749775977697779778977997809781978297839784978597869787978897899790979197929793979497959796979797989799980098019802980398049805980698079808980998109811981298139814981598169817981898199820982198229823982498259826982798289829983098319832983398349835983698379838983998409841984298439844984598469847984898499850985198529853985498559856985798589859986098619862986398649865986698679868986998709871987298739874987598769877987898799880988198829883988498859886988798889889989098919892989398949895989698979898989999009901990299039904990599069907990899099910991199129913991499159916991799189919992099219922992399249925992699279928992999309931993299339934993599369937993899399940994199429943994499459946994799489949995099519952995399549955995699579958995999609961996299639964996599669967996899699970997199729973997499759976997799789979998099819982998399849985998699879988998999909991999299939994999599969997999899991000010001100021000310004100051000610007100081000910010
  1. /*
  2. * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <qdf_module.h>
  23. #include <hal_hw_headers.h>
  24. #include <hal_api.h>
  25. #include <hif.h>
  26. #include <htt.h>
  27. #include <wdi_event.h>
  28. #include <queue.h>
  29. #include "dp_htt.h"
  30. #include "dp_types.h"
  31. #include "dp_internal.h"
  32. #include "dp_tx.h"
  33. #include "dp_tx_desc.h"
  34. #include "dp_rx.h"
  35. #include <cdp_txrx_handle.h>
  36. #include <wlan_cfg.h>
  37. #include "cdp_txrx_cmn_struct.h"
  38. #include "cdp_txrx_stats_struct.h"
  39. #include "cdp_txrx_cmn_reg.h"
  40. #include <qdf_util.h>
  41. #include "dp_peer.h"
  42. #include "dp_rx_mon.h"
  43. #include "htt_stats.h"
  44. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  45. #include "cfg_ucfg_api.h"
  46. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  47. #include "cdp_txrx_flow_ctrl_v2.h"
  48. #else
  49. static inline void
  50. cdp_dump_flow_pool_info(struct cdp_soc_t *soc)
  51. {
  52. return;
  53. }
  54. #endif
  55. #include "dp_ipa.h"
  56. #include "dp_cal_client_api.h"
  57. #ifdef CONFIG_MCL
  58. extern int con_mode_monitor;
  59. #ifndef REMOVE_PKT_LOG
  60. #include <pktlog_ac_api.h>
  61. #include <pktlog_ac.h>
  62. #endif
  63. #endif
  64. void *dp_soc_init(void *dpsoc, HTC_HANDLE htc_handle, void *hif_handle);
  65. static void dp_pdev_detach(struct cdp_pdev *txrx_pdev, int force);
  66. static struct dp_soc *
  67. dp_soc_attach(void *ctrl_psoc, HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  68. struct ol_if_ops *ol_ops, uint16_t device_id);
  69. static void dp_pktlogmod_exit(struct dp_pdev *handle);
  70. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  71. uint8_t *peer_mac_addr,
  72. struct cdp_ctrl_objmgr_peer *ctrl_peer);
  73. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap);
  74. static void dp_ppdu_ring_reset(struct dp_pdev *pdev);
  75. static void dp_ppdu_ring_cfg(struct dp_pdev *pdev);
  76. #define DP_INTR_POLL_TIMER_MS 10
  77. /* Generic AST entry aging timer value */
  78. #define DP_AST_AGING_TIMER_DEFAULT_MS 1000
  79. /* WDS AST entry aging timer value */
  80. #define DP_WDS_AST_AGING_TIMER_DEFAULT_MS 120000
  81. #define DP_WDS_AST_AGING_TIMER_CNT \
  82. ((DP_WDS_AST_AGING_TIMER_DEFAULT_MS / DP_AST_AGING_TIMER_DEFAULT_MS) - 1)
  83. #define DP_MCS_LENGTH (6*MAX_MCS)
  84. #define DP_NSS_LENGTH (6*SS_COUNT)
  85. #define DP_MU_GROUP_SHOW 16
  86. #define DP_MU_GROUP_LENGTH (6 * DP_MU_GROUP_SHOW)
  87. #define DP_RXDMA_ERR_LENGTH (6*HAL_RXDMA_ERR_MAX)
  88. #define DP_MAX_INT_CONTEXTS_STRING_LENGTH (6 * WLAN_CFG_INT_NUM_CONTEXTS)
  89. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_MAX)
  90. #define DP_MAX_MCS_STRING_LEN 30
  91. #define DP_CURR_FW_STATS_AVAIL 19
  92. #define DP_HTT_DBG_EXT_STATS_MAX 256
  93. #define DP_MAX_SLEEP_TIME 100
  94. #ifndef QCA_WIFI_3_0_EMU
  95. #define SUSPEND_DRAIN_WAIT 500
  96. #else
  97. #define SUSPEND_DRAIN_WAIT 3000
  98. #endif
  99. #ifdef IPA_OFFLOAD
  100. /* Exclude IPA rings from the interrupt context */
  101. #define TX_RING_MASK_VAL 0xb
  102. #define RX_RING_MASK_VAL 0x7
  103. #else
  104. #define TX_RING_MASK_VAL 0xF
  105. #define RX_RING_MASK_VAL 0xF
  106. #endif
  107. #define STR_MAXLEN 64
  108. #define DP_PPDU_STATS_CFG_ALL 0xFFFF
  109. /* PPDU stats mask sent to FW to enable enhanced stats */
  110. #define DP_PPDU_STATS_CFG_ENH_STATS 0xE67
  111. /* PPDU stats mask sent to FW to support debug sniffer feature */
  112. #define DP_PPDU_STATS_CFG_SNIFFER 0x2FFF
  113. /* PPDU stats mask sent to FW to support BPR feature*/
  114. #define DP_PPDU_STATS_CFG_BPR 0x2000
  115. /* PPDU stats mask sent to FW to support BPR and enhanced stats feature */
  116. #define DP_PPDU_STATS_CFG_BPR_ENH (DP_PPDU_STATS_CFG_BPR | \
  117. DP_PPDU_STATS_CFG_ENH_STATS)
  118. /* PPDU stats mask sent to FW to support BPR and pcktlog stats feature */
  119. #define DP_PPDU_STATS_CFG_BPR_PKTLOG (DP_PPDU_STATS_CFG_BPR | \
  120. DP_PPDU_TXLITE_STATS_BITMASK_CFG)
  121. #define RNG_ERR "SRNG setup failed for"
  122. /**
  123. * default_dscp_tid_map - Default DSCP-TID mapping
  124. *
  125. * DSCP TID
  126. * 000000 0
  127. * 001000 1
  128. * 010000 2
  129. * 011000 3
  130. * 100000 4
  131. * 101000 5
  132. * 110000 6
  133. * 111000 7
  134. */
  135. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  136. 0, 0, 0, 0, 0, 0, 0, 0,
  137. 1, 1, 1, 1, 1, 1, 1, 1,
  138. 2, 2, 2, 2, 2, 2, 2, 2,
  139. 3, 3, 3, 3, 3, 3, 3, 3,
  140. 4, 4, 4, 4, 4, 4, 4, 4,
  141. 5, 5, 5, 5, 5, 5, 5, 5,
  142. 6, 6, 6, 6, 6, 6, 6, 6,
  143. 7, 7, 7, 7, 7, 7, 7, 7,
  144. };
  145. /*
  146. * struct dp_rate_debug
  147. *
  148. * @mcs_type: print string for a given mcs
  149. * @valid: valid mcs rate?
  150. */
  151. struct dp_rate_debug {
  152. char mcs_type[DP_MAX_MCS_STRING_LEN];
  153. uint8_t valid;
  154. };
  155. #define MCS_VALID 1
  156. #define MCS_INVALID 0
  157. static const struct dp_rate_debug dp_rate_string[DOT11_MAX][MAX_MCS] = {
  158. {
  159. {"OFDM 48 Mbps", MCS_VALID},
  160. {"OFDM 24 Mbps", MCS_VALID},
  161. {"OFDM 12 Mbps", MCS_VALID},
  162. {"OFDM 6 Mbps ", MCS_VALID},
  163. {"OFDM 54 Mbps", MCS_VALID},
  164. {"OFDM 36 Mbps", MCS_VALID},
  165. {"OFDM 18 Mbps", MCS_VALID},
  166. {"OFDM 9 Mbps ", MCS_VALID},
  167. {"INVALID ", MCS_INVALID},
  168. {"INVALID ", MCS_INVALID},
  169. {"INVALID ", MCS_INVALID},
  170. {"INVALID ", MCS_INVALID},
  171. {"INVALID ", MCS_VALID},
  172. },
  173. {
  174. {"CCK 11 Mbps Long ", MCS_VALID},
  175. {"CCK 5.5 Mbps Long ", MCS_VALID},
  176. {"CCK 2 Mbps Long ", MCS_VALID},
  177. {"CCK 1 Mbps Long ", MCS_VALID},
  178. {"CCK 11 Mbps Short ", MCS_VALID},
  179. {"CCK 5.5 Mbps Short", MCS_VALID},
  180. {"CCK 2 Mbps Short ", MCS_VALID},
  181. {"INVALID ", MCS_INVALID},
  182. {"INVALID ", MCS_INVALID},
  183. {"INVALID ", MCS_INVALID},
  184. {"INVALID ", MCS_INVALID},
  185. {"INVALID ", MCS_INVALID},
  186. {"INVALID ", MCS_VALID},
  187. },
  188. {
  189. {"HT MCS 0 (BPSK 1/2) ", MCS_VALID},
  190. {"HT MCS 1 (QPSK 1/2) ", MCS_VALID},
  191. {"HT MCS 2 (QPSK 3/4) ", MCS_VALID},
  192. {"HT MCS 3 (16-QAM 1/2)", MCS_VALID},
  193. {"HT MCS 4 (16-QAM 3/4)", MCS_VALID},
  194. {"HT MCS 5 (64-QAM 2/3)", MCS_VALID},
  195. {"HT MCS 6 (64-QAM 3/4)", MCS_VALID},
  196. {"HT MCS 7 (64-QAM 5/6)", MCS_VALID},
  197. {"INVALID ", MCS_INVALID},
  198. {"INVALID ", MCS_INVALID},
  199. {"INVALID ", MCS_INVALID},
  200. {"INVALID ", MCS_INVALID},
  201. {"INVALID ", MCS_VALID},
  202. },
  203. {
  204. {"VHT MCS 0 (BPSK 1/2) ", MCS_VALID},
  205. {"VHT MCS 1 (QPSK 1/2) ", MCS_VALID},
  206. {"VHT MCS 2 (QPSK 3/4) ", MCS_VALID},
  207. {"VHT MCS 3 (16-QAM 1/2) ", MCS_VALID},
  208. {"VHT MCS 4 (16-QAM 3/4) ", MCS_VALID},
  209. {"VHT MCS 5 (64-QAM 2/3) ", MCS_VALID},
  210. {"VHT MCS 6 (64-QAM 3/4) ", MCS_VALID},
  211. {"VHT MCS 7 (64-QAM 5/6) ", MCS_VALID},
  212. {"VHT MCS 8 (256-QAM 3/4) ", MCS_VALID},
  213. {"VHT MCS 9 (256-QAM 5/6) ", MCS_VALID},
  214. {"VHT MCS 10 (1024-QAM 3/4)", MCS_VALID},
  215. {"VHT MCS 11 (1024-QAM 5/6)", MCS_VALID},
  216. {"INVALID ", MCS_VALID},
  217. },
  218. {
  219. {"HE MCS 0 (BPSK 1/2) ", MCS_VALID},
  220. {"HE MCS 1 (QPSK 1/2) ", MCS_VALID},
  221. {"HE MCS 2 (QPSK 3/4) ", MCS_VALID},
  222. {"HE MCS 3 (16-QAM 1/2) ", MCS_VALID},
  223. {"HE MCS 4 (16-QAM 3/4) ", MCS_VALID},
  224. {"HE MCS 5 (64-QAM 2/3) ", MCS_VALID},
  225. {"HE MCS 6 (64-QAM 3/4) ", MCS_VALID},
  226. {"HE MCS 7 (64-QAM 5/6) ", MCS_VALID},
  227. {"HE MCS 8 (256-QAM 3/4) ", MCS_VALID},
  228. {"HE MCS 9 (256-QAM 5/6) ", MCS_VALID},
  229. {"HE MCS 10 (1024-QAM 3/4)", MCS_VALID},
  230. {"HE MCS 11 (1024-QAM 5/6)", MCS_VALID},
  231. {"INVALID ", MCS_VALID},
  232. }
  233. };
  234. /**
  235. * dp_cpu_ring_map_type - dp tx cpu ring map
  236. * @DP_NSS_DEFAULT_MAP: Default mode with no NSS offloaded
  237. * @DP_NSS_FIRST_RADIO_OFFLOADED_MAP: Only First Radio is offloaded
  238. * @DP_NSS_SECOND_RADIO_OFFLOADED_MAP: Only second radio is offloaded
  239. * @DP_NSS_DBDC_OFFLOADED_MAP: Both radios are offloaded
  240. * @DP_NSS_DBTC_OFFLOADED_MAP: All three radios are offloaded
  241. * @DP_NSS_CPU_RING_MAP_MAX: Max cpu ring map val
  242. */
  243. enum dp_cpu_ring_map_types {
  244. DP_NSS_DEFAULT_MAP,
  245. DP_NSS_FIRST_RADIO_OFFLOADED_MAP,
  246. DP_NSS_SECOND_RADIO_OFFLOADED_MAP,
  247. DP_NSS_DBDC_OFFLOADED_MAP,
  248. DP_NSS_DBTC_OFFLOADED_MAP,
  249. DP_NSS_CPU_RING_MAP_MAX
  250. };
  251. /**
  252. * @brief Cpu to tx ring map
  253. */
  254. #ifdef CONFIG_WIN
  255. static uint8_t
  256. dp_cpu_ring_map[DP_NSS_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  257. {0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2},
  258. {0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1},
  259. {0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0},
  260. {0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2},
  261. {0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3}
  262. };
  263. #else
  264. static uint8_t
  265. dp_cpu_ring_map[DP_NSS_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  266. {0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2},
  267. {0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1},
  268. {0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0},
  269. {0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2},
  270. {0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3}
  271. };
  272. #endif
  273. /**
  274. * @brief Select the type of statistics
  275. */
  276. enum dp_stats_type {
  277. STATS_FW = 0,
  278. STATS_HOST = 1,
  279. STATS_TYPE_MAX = 2,
  280. };
  281. /**
  282. * @brief General Firmware statistics options
  283. *
  284. */
  285. enum dp_fw_stats {
  286. TXRX_FW_STATS_INVALID = -1,
  287. };
  288. /**
  289. * dp_stats_mapping_table - Firmware and Host statistics
  290. * currently supported
  291. */
  292. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  293. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  294. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  295. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  296. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  297. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  298. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  299. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  300. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  301. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  302. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  303. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  304. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  305. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  306. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  307. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  308. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  309. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  310. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  311. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  312. /* Last ENUM for HTT FW STATS */
  313. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  314. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  315. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  316. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  317. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  318. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  319. {TXRX_FW_STATS_INVALID, TXRX_AST_STATS},
  320. {TXRX_FW_STATS_INVALID, TXRX_SRNG_PTR_STATS},
  321. {TXRX_FW_STATS_INVALID, TXRX_RX_MON_STATS},
  322. {TXRX_FW_STATS_INVALID, TXRX_REO_QUEUE_STATS},
  323. {TXRX_FW_STATS_INVALID, TXRX_SOC_CFG_PARAMS},
  324. {TXRX_FW_STATS_INVALID, TXRX_PDEV_CFG_PARAMS},
  325. };
  326. /* MCL specific functions */
  327. #ifdef CONFIG_MCL
  328. /**
  329. * dp_soc_get_mon_mask_for_interrupt_mode() - get mon mode mask for intr mode
  330. * @soc: pointer to dp_soc handle
  331. * @intr_ctx_num: interrupt context number for which mon mask is needed
  332. *
  333. * For MCL, monitor mode rings are being processed in timer contexts (polled).
  334. * This function is returning 0, since in interrupt mode(softirq based RX),
  335. * we donot want to process monitor mode rings in a softirq.
  336. *
  337. * So, in case packet log is enabled for SAP/STA/P2P modes,
  338. * regular interrupt processing will not process monitor mode rings. It would be
  339. * done in a separate timer context.
  340. *
  341. * Return: 0
  342. */
  343. static inline
  344. uint32_t dp_soc_get_mon_mask_for_interrupt_mode(struct dp_soc *soc, int intr_ctx_num)
  345. {
  346. return 0;
  347. }
  348. /*
  349. * dp_service_mon_rings()- timer to reap monitor rings
  350. * reqd as we are not getting ppdu end interrupts
  351. * @arg: SoC Handle
  352. *
  353. * Return:
  354. *
  355. */
  356. static void dp_service_mon_rings(void *arg)
  357. {
  358. struct dp_soc *soc = (struct dp_soc *)arg;
  359. int ring = 0, work_done, mac_id;
  360. struct dp_pdev *pdev = NULL;
  361. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  362. pdev = soc->pdev_list[ring];
  363. if (!pdev)
  364. continue;
  365. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  366. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  367. pdev->pdev_id);
  368. work_done = dp_mon_process(soc, mac_for_pdev,
  369. QCA_NAPI_BUDGET);
  370. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  371. FL("Reaped %d descs from Monitor rings"),
  372. work_done);
  373. }
  374. }
  375. qdf_timer_mod(&soc->mon_reap_timer, DP_INTR_POLL_TIMER_MS);
  376. }
  377. #ifndef REMOVE_PKT_LOG
  378. /**
  379. * dp_pkt_log_init() - API to initialize packet log
  380. * @ppdev: physical device handle
  381. * @scn: HIF context
  382. *
  383. * Return: none
  384. */
  385. void dp_pkt_log_init(struct cdp_pdev *ppdev, void *scn)
  386. {
  387. struct dp_pdev *handle = (struct dp_pdev *)ppdev;
  388. if (handle->pkt_log_init) {
  389. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  390. "%s: Packet log not initialized", __func__);
  391. return;
  392. }
  393. pktlog_sethandle(&handle->pl_dev, scn);
  394. pktlog_set_callback_regtype(PKTLOG_DEFAULT_CALLBACK_REGISTRATION);
  395. if (pktlogmod_init(scn)) {
  396. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  397. "%s: pktlogmod_init failed", __func__);
  398. handle->pkt_log_init = false;
  399. } else {
  400. handle->pkt_log_init = true;
  401. }
  402. }
  403. /**
  404. * dp_pkt_log_con_service() - connect packet log service
  405. * @ppdev: physical device handle
  406. * @scn: device context
  407. *
  408. * Return: none
  409. */
  410. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn)
  411. {
  412. struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
  413. dp_pkt_log_init((struct cdp_pdev *)pdev, scn);
  414. pktlog_htc_attach();
  415. }
  416. /**
  417. * dp_get_num_rx_contexts() - get number of RX contexts
  418. * @soc_hdl: cdp opaque soc handle
  419. *
  420. * Return: number of RX contexts
  421. */
  422. static int dp_get_num_rx_contexts(struct cdp_soc_t *soc_hdl)
  423. {
  424. int i;
  425. int num_rx_contexts = 0;
  426. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  427. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  428. if (wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i))
  429. num_rx_contexts++;
  430. return num_rx_contexts;
  431. }
  432. /**
  433. * dp_pktlogmod_exit() - API to cleanup pktlog info
  434. * @handle: Pdev handle
  435. *
  436. * Return: none
  437. */
  438. static void dp_pktlogmod_exit(struct dp_pdev *handle)
  439. {
  440. void *scn = (void *)handle->soc->hif_handle;
  441. if (!scn) {
  442. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  443. "%s: Invalid hif(scn) handle", __func__);
  444. return;
  445. }
  446. pktlogmod_exit(scn);
  447. handle->pkt_log_init = false;
  448. }
  449. #endif
  450. #else
  451. static void dp_pktlogmod_exit(struct dp_pdev *handle) { }
  452. /**
  453. * dp_soc_get_mon_mask_for_interrupt_mode() - get mon mode mask for intr mode
  454. * @soc: pointer to dp_soc handle
  455. * @intr_ctx_num: interrupt context number for which mon mask is needed
  456. *
  457. * Return: mon mask value
  458. */
  459. static inline
  460. uint32_t dp_soc_get_mon_mask_for_interrupt_mode(struct dp_soc *soc, int intr_ctx_num)
  461. {
  462. return wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  463. }
  464. #endif
  465. /**
  466. * dp_get_dp_vdev_from_cdp_vdev() - get dp_vdev from cdp_vdev by type-casting
  467. * @cdp_opaque_vdev: pointer to cdp_vdev
  468. *
  469. * Return: pointer to dp_vdev
  470. */
  471. static
  472. struct dp_vdev *dp_get_dp_vdev_from_cdp_vdev(struct cdp_vdev *cdp_opaque_vdev)
  473. {
  474. return (struct dp_vdev *)cdp_opaque_vdev;
  475. }
  476. static int dp_peer_add_ast_wifi3(struct cdp_soc_t *soc_hdl,
  477. struct cdp_peer *peer_hdl,
  478. uint8_t *mac_addr,
  479. enum cdp_txrx_ast_entry_type type,
  480. uint32_t flags)
  481. {
  482. return dp_peer_add_ast((struct dp_soc *)soc_hdl,
  483. (struct dp_peer *)peer_hdl,
  484. mac_addr,
  485. type,
  486. flags);
  487. }
  488. static int dp_peer_update_ast_wifi3(struct cdp_soc_t *soc_hdl,
  489. struct cdp_peer *peer_hdl,
  490. uint8_t *wds_macaddr,
  491. uint32_t flags)
  492. {
  493. int status = -1;
  494. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  495. struct dp_ast_entry *ast_entry = NULL;
  496. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  497. qdf_spin_lock_bh(&soc->ast_lock);
  498. ast_entry = dp_peer_ast_hash_find_by_pdevid(soc, wds_macaddr,
  499. peer->vdev->pdev->pdev_id);
  500. if (ast_entry) {
  501. status = dp_peer_update_ast(soc,
  502. peer,
  503. ast_entry, flags);
  504. }
  505. qdf_spin_unlock_bh(&soc->ast_lock);
  506. return status;
  507. }
  508. /*
  509. * dp_wds_reset_ast_wifi3() - Reset the is_active param for ast entry
  510. * @soc_handle: Datapath SOC handle
  511. * @wds_macaddr: WDS entry MAC Address
  512. * Return: None
  513. */
  514. static void dp_wds_reset_ast_wifi3(struct cdp_soc_t *soc_hdl,
  515. uint8_t *wds_macaddr, void *vdev_handle)
  516. {
  517. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  518. struct dp_ast_entry *ast_entry = NULL;
  519. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  520. qdf_spin_lock_bh(&soc->ast_lock);
  521. ast_entry = dp_peer_ast_hash_find_by_pdevid(soc, wds_macaddr,
  522. vdev->pdev->pdev_id);
  523. if (ast_entry) {
  524. if ((ast_entry->type != CDP_TXRX_AST_TYPE_STATIC) &&
  525. (ast_entry->type != CDP_TXRX_AST_TYPE_SELF) &&
  526. (ast_entry->type != CDP_TXRX_AST_TYPE_STA_BSS)) {
  527. ast_entry->is_active = TRUE;
  528. }
  529. }
  530. qdf_spin_unlock_bh(&soc->ast_lock);
  531. }
  532. /*
  533. * dp_wds_reset_ast_table_wifi3() - Reset the is_active param for all ast entry
  534. * @soc: Datapath SOC handle
  535. *
  536. * Return: None
  537. */
  538. static void dp_wds_reset_ast_table_wifi3(struct cdp_soc_t *soc_hdl,
  539. void *vdev_hdl)
  540. {
  541. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  542. struct dp_pdev *pdev;
  543. struct dp_vdev *vdev;
  544. struct dp_peer *peer;
  545. struct dp_ast_entry *ase, *temp_ase;
  546. int i;
  547. qdf_spin_lock_bh(&soc->ast_lock);
  548. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  549. pdev = soc->pdev_list[i];
  550. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  551. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  552. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  553. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  554. if ((ase->type ==
  555. CDP_TXRX_AST_TYPE_STATIC) ||
  556. (ase->type ==
  557. CDP_TXRX_AST_TYPE_SELF) ||
  558. (ase->type ==
  559. CDP_TXRX_AST_TYPE_STA_BSS))
  560. continue;
  561. ase->is_active = TRUE;
  562. }
  563. }
  564. }
  565. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  566. }
  567. qdf_spin_unlock_bh(&soc->ast_lock);
  568. }
  569. /*
  570. * dp_wds_flush_ast_table_wifi3() - Delete all wds and hmwds ast entry
  571. * @soc: Datapath SOC handle
  572. *
  573. * Return: None
  574. */
  575. static void dp_wds_flush_ast_table_wifi3(struct cdp_soc_t *soc_hdl)
  576. {
  577. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  578. struct dp_pdev *pdev;
  579. struct dp_vdev *vdev;
  580. struct dp_peer *peer;
  581. struct dp_ast_entry *ase, *temp_ase;
  582. int i;
  583. qdf_spin_lock_bh(&soc->ast_lock);
  584. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  585. pdev = soc->pdev_list[i];
  586. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  587. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  588. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  589. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  590. if ((ase->type ==
  591. CDP_TXRX_AST_TYPE_STATIC) ||
  592. (ase->type ==
  593. CDP_TXRX_AST_TYPE_SELF) ||
  594. (ase->type ==
  595. CDP_TXRX_AST_TYPE_STA_BSS))
  596. continue;
  597. dp_peer_del_ast(soc, ase);
  598. }
  599. }
  600. }
  601. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  602. }
  603. qdf_spin_unlock_bh(&soc->ast_lock);
  604. }
  605. /**
  606. * dp_peer_get_ast_info_by_soc_wifi3() - search the soc AST hash table
  607. * and return ast entry information
  608. * of first ast entry found in the
  609. * table with given mac address
  610. *
  611. * @soc : data path soc handle
  612. * @ast_mac_addr : AST entry mac address
  613. * @ast_entry_info : ast entry information
  614. *
  615. * return : true if ast entry found with ast_mac_addr
  616. * false if ast entry not found
  617. */
  618. static bool dp_peer_get_ast_info_by_soc_wifi3
  619. (struct cdp_soc_t *soc_hdl,
  620. uint8_t *ast_mac_addr,
  621. struct cdp_ast_entry_info *ast_entry_info)
  622. {
  623. struct dp_ast_entry *ast_entry;
  624. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  625. qdf_spin_lock_bh(&soc->ast_lock);
  626. ast_entry = dp_peer_ast_hash_find_soc(soc, ast_mac_addr);
  627. if (ast_entry && !ast_entry->delete_in_progress) {
  628. ast_entry_info->type = ast_entry->type;
  629. ast_entry_info->pdev_id = ast_entry->pdev_id;
  630. ast_entry_info->vdev_id = ast_entry->vdev_id;
  631. ast_entry_info->peer_id = ast_entry->peer->peer_ids[0];
  632. qdf_mem_copy(&ast_entry_info->peer_mac_addr[0],
  633. &ast_entry->peer->mac_addr.raw[0],
  634. DP_MAC_ADDR_LEN);
  635. qdf_spin_unlock_bh(&soc->ast_lock);
  636. return true;
  637. }
  638. qdf_spin_unlock_bh(&soc->ast_lock);
  639. return false;
  640. }
  641. /**
  642. * dp_peer_get_ast_info_by_pdevid_wifi3() - search the soc AST hash table
  643. * and return ast entry information
  644. * if mac address and pdev_id matches
  645. *
  646. * @soc : data path soc handle
  647. * @ast_mac_addr : AST entry mac address
  648. * @pdev_id : pdev_id
  649. * @ast_entry_info : ast entry information
  650. *
  651. * return : true if ast entry found with ast_mac_addr
  652. * false if ast entry not found
  653. */
  654. static bool dp_peer_get_ast_info_by_pdevid_wifi3
  655. (struct cdp_soc_t *soc_hdl,
  656. uint8_t *ast_mac_addr,
  657. uint8_t pdev_id,
  658. struct cdp_ast_entry_info *ast_entry_info)
  659. {
  660. struct dp_ast_entry *ast_entry;
  661. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  662. qdf_spin_lock_bh(&soc->ast_lock);
  663. ast_entry = dp_peer_ast_hash_find_by_pdevid(soc, ast_mac_addr, pdev_id);
  664. if (ast_entry && !ast_entry->delete_in_progress) {
  665. ast_entry_info->type = ast_entry->type;
  666. ast_entry_info->pdev_id = ast_entry->pdev_id;
  667. ast_entry_info->vdev_id = ast_entry->vdev_id;
  668. ast_entry_info->peer_id = ast_entry->peer->peer_ids[0];
  669. qdf_mem_copy(&ast_entry_info->peer_mac_addr[0],
  670. &ast_entry->peer->mac_addr.raw[0],
  671. DP_MAC_ADDR_LEN);
  672. qdf_spin_unlock_bh(&soc->ast_lock);
  673. return true;
  674. }
  675. qdf_spin_unlock_bh(&soc->ast_lock);
  676. return false;
  677. }
  678. /**
  679. * dp_peer_ast_entry_del_by_soc() - delete the ast entry from soc AST hash table
  680. * with given mac address
  681. *
  682. * @soc : data path soc handle
  683. * @ast_mac_addr : AST entry mac address
  684. * @callback : callback function to called on ast delete response from FW
  685. * @cookie : argument to be passed to callback
  686. *
  687. * return : QDF_STATUS_SUCCESS if ast entry found with ast_mac_addr and delete
  688. * is sent
  689. * QDF_STATUS_E_INVAL false if ast entry not found
  690. */
  691. static QDF_STATUS dp_peer_ast_entry_del_by_soc(struct cdp_soc_t *soc_handle,
  692. uint8_t *mac_addr,
  693. txrx_ast_free_cb callback,
  694. void *cookie)
  695. {
  696. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  697. struct dp_ast_entry *ast_entry;
  698. txrx_ast_free_cb cb = NULL;
  699. void *arg = NULL;
  700. qdf_spin_lock_bh(&soc->ast_lock);
  701. ast_entry = dp_peer_ast_hash_find_soc(soc, mac_addr);
  702. if (!ast_entry) {
  703. qdf_spin_unlock_bh(&soc->ast_lock);
  704. return -QDF_STATUS_E_INVAL;
  705. }
  706. if (ast_entry->callback) {
  707. cb = ast_entry->callback;
  708. arg = ast_entry->cookie;
  709. }
  710. ast_entry->callback = callback;
  711. ast_entry->cookie = cookie;
  712. /*
  713. * if delete_in_progress is set AST delete is sent to target
  714. * and host is waiting for response should not send delete
  715. * again
  716. */
  717. if (!ast_entry->delete_in_progress)
  718. dp_peer_del_ast(soc, ast_entry);
  719. qdf_spin_unlock_bh(&soc->ast_lock);
  720. if (cb) {
  721. cb(soc->ctrl_psoc,
  722. soc,
  723. arg,
  724. CDP_TXRX_AST_DELETE_IN_PROGRESS);
  725. }
  726. return QDF_STATUS_SUCCESS;
  727. }
  728. /**
  729. * dp_peer_ast_entry_del_by_pdev() - delete the ast entry from soc AST hash
  730. * table if mac address and pdev_id matches
  731. *
  732. * @soc : data path soc handle
  733. * @ast_mac_addr : AST entry mac address
  734. * @pdev_id : pdev id
  735. * @callback : callback function to called on ast delete response from FW
  736. * @cookie : argument to be passed to callback
  737. *
  738. * return : QDF_STATUS_SUCCESS if ast entry found with ast_mac_addr and delete
  739. * is sent
  740. * QDF_STATUS_E_INVAL false if ast entry not found
  741. */
  742. static QDF_STATUS dp_peer_ast_entry_del_by_pdev(struct cdp_soc_t *soc_handle,
  743. uint8_t *mac_addr,
  744. uint8_t pdev_id,
  745. txrx_ast_free_cb callback,
  746. void *cookie)
  747. {
  748. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  749. struct dp_ast_entry *ast_entry;
  750. txrx_ast_free_cb cb = NULL;
  751. void *arg = NULL;
  752. qdf_spin_lock_bh(&soc->ast_lock);
  753. ast_entry = dp_peer_ast_hash_find_by_pdevid(soc, mac_addr, pdev_id);
  754. if (!ast_entry) {
  755. qdf_spin_unlock_bh(&soc->ast_lock);
  756. return -QDF_STATUS_E_INVAL;
  757. }
  758. if (ast_entry->callback) {
  759. cb = ast_entry->callback;
  760. arg = ast_entry->cookie;
  761. }
  762. ast_entry->callback = callback;
  763. ast_entry->cookie = cookie;
  764. /*
  765. * if delete_in_progress is set AST delete is sent to target
  766. * and host is waiting for response should not sent delete
  767. * again
  768. */
  769. if (!ast_entry->delete_in_progress)
  770. dp_peer_del_ast(soc, ast_entry);
  771. qdf_spin_unlock_bh(&soc->ast_lock);
  772. if (cb) {
  773. cb(soc->ctrl_psoc,
  774. soc,
  775. arg,
  776. CDP_TXRX_AST_DELETE_IN_PROGRESS);
  777. }
  778. return QDF_STATUS_SUCCESS;
  779. }
  780. /**
  781. * dp_srng_find_ring_in_mask() - find which ext_group a ring belongs
  782. * @ring_num: ring num of the ring being queried
  783. * @grp_mask: the grp_mask array for the ring type in question.
  784. *
  785. * The grp_mask array is indexed by group number and the bit fields correspond
  786. * to ring numbers. We are finding which interrupt group a ring belongs to.
  787. *
  788. * Return: the index in the grp_mask array with the ring number.
  789. * -QDF_STATUS_E_NOENT if no entry is found
  790. */
  791. static int dp_srng_find_ring_in_mask(int ring_num, int *grp_mask)
  792. {
  793. int ext_group_num;
  794. int mask = 1 << ring_num;
  795. for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
  796. ext_group_num++) {
  797. if (mask & grp_mask[ext_group_num])
  798. return ext_group_num;
  799. }
  800. return -QDF_STATUS_E_NOENT;
  801. }
  802. static int dp_srng_calculate_msi_group(struct dp_soc *soc,
  803. enum hal_ring_type ring_type,
  804. int ring_num)
  805. {
  806. int *grp_mask;
  807. switch (ring_type) {
  808. case WBM2SW_RELEASE:
  809. /* dp_tx_comp_handler - soc->tx_comp_ring */
  810. if (ring_num < 3)
  811. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  812. /* dp_rx_wbm_err_process - soc->rx_rel_ring */
  813. else if (ring_num == 3) {
  814. /* sw treats this as a separate ring type */
  815. grp_mask = &soc->wlan_cfg_ctx->
  816. int_rx_wbm_rel_ring_mask[0];
  817. ring_num = 0;
  818. } else {
  819. qdf_assert(0);
  820. return -QDF_STATUS_E_NOENT;
  821. }
  822. break;
  823. case REO_EXCEPTION:
  824. /* dp_rx_err_process - &soc->reo_exception_ring */
  825. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  826. break;
  827. case REO_DST:
  828. /* dp_rx_process - soc->reo_dest_ring */
  829. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  830. break;
  831. case REO_STATUS:
  832. /* dp_reo_status_ring_handler - soc->reo_status_ring */
  833. grp_mask = &soc->wlan_cfg_ctx->int_reo_status_ring_mask[0];
  834. break;
  835. /* dp_rx_mon_status_srng_process - pdev->rxdma_mon_status_ring*/
  836. case RXDMA_MONITOR_STATUS:
  837. /* dp_rx_mon_dest_process - pdev->rxdma_mon_dst_ring */
  838. case RXDMA_MONITOR_DST:
  839. /* dp_mon_process */
  840. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  841. break;
  842. case RXDMA_DST:
  843. /* dp_rxdma_err_process */
  844. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  845. break;
  846. case RXDMA_BUF:
  847. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  848. break;
  849. case RXDMA_MONITOR_BUF:
  850. /* TODO: support low_thresh interrupt */
  851. return -QDF_STATUS_E_NOENT;
  852. break;
  853. case TCL_DATA:
  854. case TCL_CMD:
  855. case REO_CMD:
  856. case SW2WBM_RELEASE:
  857. case WBM_IDLE_LINK:
  858. /* normally empty SW_TO_HW rings */
  859. return -QDF_STATUS_E_NOENT;
  860. break;
  861. case TCL_STATUS:
  862. case REO_REINJECT:
  863. /* misc unused rings */
  864. return -QDF_STATUS_E_NOENT;
  865. break;
  866. case CE_SRC:
  867. case CE_DST:
  868. case CE_DST_STATUS:
  869. /* CE_rings - currently handled by hif */
  870. default:
  871. return -QDF_STATUS_E_NOENT;
  872. break;
  873. }
  874. return dp_srng_find_ring_in_mask(ring_num, grp_mask);
  875. }
  876. static void dp_srng_msi_setup(struct dp_soc *soc, struct hal_srng_params
  877. *ring_params, int ring_type, int ring_num)
  878. {
  879. int msi_group_number;
  880. int msi_data_count;
  881. int ret;
  882. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  883. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  884. &msi_data_count, &msi_data_start,
  885. &msi_irq_start);
  886. if (ret)
  887. return;
  888. msi_group_number = dp_srng_calculate_msi_group(soc, ring_type,
  889. ring_num);
  890. if (msi_group_number < 0) {
  891. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  892. FL("ring not part of an ext_group; ring_type: %d,ring_num %d"),
  893. ring_type, ring_num);
  894. ring_params->msi_addr = 0;
  895. ring_params->msi_data = 0;
  896. return;
  897. }
  898. if (msi_group_number > msi_data_count) {
  899. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  900. FL("2 msi_groups will share an msi; msi_group_num %d"),
  901. msi_group_number);
  902. QDF_ASSERT(0);
  903. }
  904. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  905. ring_params->msi_addr = addr_low;
  906. ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  907. ring_params->msi_data = (msi_group_number % msi_data_count)
  908. + msi_data_start;
  909. ring_params->flags |= HAL_SRNG_MSI_INTR;
  910. }
  911. /**
  912. * dp_print_ast_stats() - Dump AST table contents
  913. * @soc: Datapath soc handle
  914. *
  915. * return void
  916. */
  917. #ifdef FEATURE_AST
  918. void dp_print_ast_stats(struct dp_soc *soc)
  919. {
  920. uint8_t i;
  921. uint8_t num_entries = 0;
  922. struct dp_vdev *vdev;
  923. struct dp_pdev *pdev;
  924. struct dp_peer *peer;
  925. struct dp_ast_entry *ase, *tmp_ase;
  926. char type[CDP_TXRX_AST_TYPE_MAX][10] = {
  927. "NONE", "STATIC", "SELF", "WDS", "MEC", "HMWDS", "BSS",
  928. "DA", "HMWDS_SEC"};
  929. DP_PRINT_STATS("AST Stats:");
  930. DP_PRINT_STATS(" Entries Added = %d", soc->stats.ast.added);
  931. DP_PRINT_STATS(" Entries Deleted = %d", soc->stats.ast.deleted);
  932. DP_PRINT_STATS(" Entries Agedout = %d", soc->stats.ast.aged_out);
  933. DP_PRINT_STATS("AST Table:");
  934. qdf_spin_lock_bh(&soc->ast_lock);
  935. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  936. pdev = soc->pdev_list[i];
  937. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  938. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  939. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  940. DP_PEER_ITERATE_ASE_LIST(peer, ase, tmp_ase) {
  941. DP_PRINT_STATS("%6d mac_addr = %pM"
  942. " peer_mac_addr = %pM"
  943. " peer_id = %u"
  944. " type = %s"
  945. " next_hop = %d"
  946. " is_active = %d"
  947. " is_bss = %d"
  948. " ast_idx = %d"
  949. " ast_hash = %d"
  950. " delete_in_progress = %d"
  951. " pdev_id = %d"
  952. " vdev_id = %d",
  953. ++num_entries,
  954. ase->mac_addr.raw,
  955. ase->peer->mac_addr.raw,
  956. ase->peer->peer_ids[0],
  957. type[ase->type],
  958. ase->next_hop,
  959. ase->is_active,
  960. ase->is_bss,
  961. ase->ast_idx,
  962. ase->ast_hash_value,
  963. ase->delete_in_progress,
  964. ase->pdev_id,
  965. ase->vdev_id);
  966. }
  967. }
  968. }
  969. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  970. }
  971. qdf_spin_unlock_bh(&soc->ast_lock);
  972. }
  973. #else
  974. void dp_print_ast_stats(struct dp_soc *soc)
  975. {
  976. DP_PRINT_STATS("AST Stats not available.Enable FEATURE_AST");
  977. return;
  978. }
  979. #endif
  980. /**
  981. * dp_print_peer_table() - Dump all Peer stats
  982. * @vdev: Datapath Vdev handle
  983. *
  984. * return void
  985. */
  986. static void dp_print_peer_table(struct dp_vdev *vdev)
  987. {
  988. struct dp_peer *peer = NULL;
  989. DP_PRINT_STATS("Dumping Peer Table Stats:");
  990. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  991. if (!peer) {
  992. DP_PRINT_STATS("Invalid Peer");
  993. return;
  994. }
  995. DP_PRINT_STATS(" peer_mac_addr = %pM"
  996. " nawds_enabled = %d"
  997. " bss_peer = %d"
  998. " wapi = %d"
  999. " wds_enabled = %d"
  1000. " delete in progress = %d"
  1001. " peer id = %d",
  1002. peer->mac_addr.raw,
  1003. peer->nawds_enabled,
  1004. peer->bss_peer,
  1005. peer->wapi,
  1006. peer->wds_enabled,
  1007. peer->delete_in_progress,
  1008. peer->peer_ids[0]);
  1009. }
  1010. }
  1011. /*
  1012. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  1013. */
  1014. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  1015. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  1016. {
  1017. void *hal_soc = soc->hal_soc;
  1018. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  1019. /* TODO: See if we should get align size from hal */
  1020. uint32_t ring_base_align = 8;
  1021. struct hal_srng_params ring_params;
  1022. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  1023. /* TODO: Currently hal layer takes care of endianness related settings.
  1024. * See if these settings need to passed from DP layer
  1025. */
  1026. ring_params.flags = 0;
  1027. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  1028. srng->hal_srng = NULL;
  1029. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  1030. srng->num_entries = num_entries;
  1031. if (!soc->dp_soc_reinit) {
  1032. srng->base_vaddr_unaligned =
  1033. qdf_mem_alloc_consistent(soc->osdev,
  1034. soc->osdev->dev,
  1035. srng->alloc_size,
  1036. &srng->base_paddr_unaligned);
  1037. }
  1038. if (!srng->base_vaddr_unaligned) {
  1039. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1040. FL("alloc failed - ring_type: %d, ring_num %d"),
  1041. ring_type, ring_num);
  1042. return QDF_STATUS_E_NOMEM;
  1043. }
  1044. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  1045. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  1046. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  1047. ((unsigned long)(ring_params.ring_base_vaddr) -
  1048. (unsigned long)srng->base_vaddr_unaligned);
  1049. ring_params.num_entries = num_entries;
  1050. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  1051. FL("Ring type: %d, num:%d vaddr %pK paddr %pK entries %u"),
  1052. ring_type, ring_num, (void *)ring_params.ring_base_vaddr,
  1053. (void *)ring_params.ring_base_paddr, ring_params.num_entries);
  1054. if (soc->intr_mode == DP_INTR_MSI) {
  1055. dp_srng_msi_setup(soc, &ring_params, ring_type, ring_num);
  1056. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1057. FL("Using MSI for ring_type: %d, ring_num %d"),
  1058. ring_type, ring_num);
  1059. } else {
  1060. ring_params.msi_data = 0;
  1061. ring_params.msi_addr = 0;
  1062. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1063. FL("Skipping MSI for ring_type: %d, ring_num %d"),
  1064. ring_type, ring_num);
  1065. }
  1066. /*
  1067. * Setup interrupt timer and batch counter thresholds for
  1068. * interrupt mitigation based on ring type
  1069. */
  1070. if (ring_type == REO_DST) {
  1071. ring_params.intr_timer_thres_us =
  1072. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  1073. ring_params.intr_batch_cntr_thres_entries =
  1074. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  1075. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  1076. ring_params.intr_timer_thres_us =
  1077. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  1078. ring_params.intr_batch_cntr_thres_entries =
  1079. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  1080. } else {
  1081. ring_params.intr_timer_thres_us =
  1082. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  1083. ring_params.intr_batch_cntr_thres_entries =
  1084. wlan_cfg_get_int_batch_threshold_other(soc->wlan_cfg_ctx);
  1085. }
  1086. /* Enable low threshold interrupts for rx buffer rings (regular and
  1087. * monitor buffer rings.
  1088. * TODO: See if this is required for any other ring
  1089. */
  1090. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF) ||
  1091. (ring_type == RXDMA_MONITOR_STATUS)) {
  1092. /* TODO: Setting low threshold to 1/8th of ring size
  1093. * see if this needs to be configurable
  1094. */
  1095. ring_params.low_threshold = num_entries >> 3;
  1096. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  1097. ring_params.intr_timer_thres_us =
  1098. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  1099. ring_params.intr_batch_cntr_thres_entries = 0;
  1100. }
  1101. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  1102. mac_id, &ring_params);
  1103. if (!srng->hal_srng) {
  1104. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1105. srng->alloc_size,
  1106. srng->base_vaddr_unaligned,
  1107. srng->base_paddr_unaligned, 0);
  1108. }
  1109. return 0;
  1110. }
  1111. /*
  1112. * dp_srng_deinit() - Internal function to deinit SRNG rings used by data path
  1113. * @soc: DP SOC handle
  1114. * @srng: source ring structure
  1115. * @ring_type: type of ring
  1116. * @ring_num: ring number
  1117. *
  1118. * Return: None
  1119. */
  1120. static void dp_srng_deinit(struct dp_soc *soc, struct dp_srng *srng,
  1121. int ring_type, int ring_num)
  1122. {
  1123. if (!srng->hal_srng) {
  1124. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1125. FL("Ring type: %d, num:%d not setup"),
  1126. ring_type, ring_num);
  1127. return;
  1128. }
  1129. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  1130. srng->hal_srng = NULL;
  1131. }
  1132. /**
  1133. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  1134. * Any buffers allocated and attached to ring entries are expected to be freed
  1135. * before calling this function.
  1136. */
  1137. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  1138. int ring_type, int ring_num)
  1139. {
  1140. if (!soc->dp_soc_reinit) {
  1141. if (!srng->hal_srng && (srng->alloc_size == 0)) {
  1142. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1143. FL("Ring type: %d, num:%d not setup"),
  1144. ring_type, ring_num);
  1145. return;
  1146. }
  1147. if (srng->hal_srng) {
  1148. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  1149. srng->hal_srng = NULL;
  1150. }
  1151. }
  1152. if (srng->alloc_size) {
  1153. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1154. srng->alloc_size,
  1155. srng->base_vaddr_unaligned,
  1156. srng->base_paddr_unaligned, 0);
  1157. srng->alloc_size = 0;
  1158. }
  1159. }
  1160. /* TODO: Need this interface from HIF */
  1161. void *hif_get_hal_handle(void *hif_handle);
  1162. /*
  1163. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  1164. * @dp_ctx: DP SOC handle
  1165. * @budget: Number of frames/descriptors that can be processed in one shot
  1166. *
  1167. * Return: remaining budget/quota for the soc device
  1168. */
  1169. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  1170. {
  1171. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  1172. struct dp_soc *soc = int_ctx->soc;
  1173. int ring = 0;
  1174. uint32_t work_done = 0;
  1175. int budget = dp_budget;
  1176. uint8_t tx_mask = int_ctx->tx_ring_mask;
  1177. uint8_t rx_mask = int_ctx->rx_ring_mask;
  1178. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  1179. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  1180. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  1181. uint32_t remaining_quota = dp_budget;
  1182. struct dp_pdev *pdev = NULL;
  1183. int mac_id;
  1184. /* Process Tx completion interrupts first to return back buffers */
  1185. while (tx_mask) {
  1186. if (tx_mask & 0x1) {
  1187. work_done = dp_tx_comp_handler(soc,
  1188. soc->tx_comp_ring[ring].hal_srng,
  1189. remaining_quota);
  1190. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1191. "tx mask 0x%x ring %d, budget %d, work_done %d",
  1192. tx_mask, ring, budget, work_done);
  1193. budget -= work_done;
  1194. if (budget <= 0)
  1195. goto budget_done;
  1196. remaining_quota = budget;
  1197. }
  1198. tx_mask = tx_mask >> 1;
  1199. ring++;
  1200. }
  1201. /* Process REO Exception ring interrupt */
  1202. if (rx_err_mask) {
  1203. work_done = dp_rx_err_process(soc,
  1204. soc->reo_exception_ring.hal_srng,
  1205. remaining_quota);
  1206. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1207. "REO Exception Ring: work_done %d budget %d",
  1208. work_done, budget);
  1209. budget -= work_done;
  1210. if (budget <= 0) {
  1211. goto budget_done;
  1212. }
  1213. remaining_quota = budget;
  1214. }
  1215. /* Process Rx WBM release ring interrupt */
  1216. if (rx_wbm_rel_mask) {
  1217. work_done = dp_rx_wbm_err_process(soc,
  1218. soc->rx_rel_ring.hal_srng, remaining_quota);
  1219. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1220. "WBM Release Ring: work_done %d budget %d",
  1221. work_done, budget);
  1222. budget -= work_done;
  1223. if (budget <= 0) {
  1224. goto budget_done;
  1225. }
  1226. remaining_quota = budget;
  1227. }
  1228. /* Process Rx interrupts */
  1229. if (rx_mask) {
  1230. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  1231. if (rx_mask & (1 << ring)) {
  1232. work_done = dp_rx_process(int_ctx,
  1233. soc->reo_dest_ring[ring].hal_srng,
  1234. ring,
  1235. remaining_quota);
  1236. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1237. "rx mask 0x%x ring %d, work_done %d budget %d",
  1238. rx_mask, ring, work_done, budget);
  1239. budget -= work_done;
  1240. if (budget <= 0)
  1241. goto budget_done;
  1242. remaining_quota = budget;
  1243. }
  1244. }
  1245. }
  1246. if (reo_status_mask)
  1247. dp_reo_status_ring_handler(soc);
  1248. /* Process LMAC interrupts */
  1249. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  1250. pdev = soc->pdev_list[ring];
  1251. if (pdev == NULL)
  1252. continue;
  1253. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1254. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  1255. pdev->pdev_id);
  1256. if (int_ctx->rx_mon_ring_mask & (1 << mac_for_pdev)) {
  1257. work_done = dp_mon_process(soc, mac_for_pdev,
  1258. remaining_quota);
  1259. budget -= work_done;
  1260. if (budget <= 0)
  1261. goto budget_done;
  1262. remaining_quota = budget;
  1263. }
  1264. if (int_ctx->rxdma2host_ring_mask &
  1265. (1 << mac_for_pdev)) {
  1266. work_done = dp_rxdma_err_process(soc,
  1267. mac_for_pdev,
  1268. remaining_quota);
  1269. budget -= work_done;
  1270. if (budget <= 0)
  1271. goto budget_done;
  1272. remaining_quota = budget;
  1273. }
  1274. if (int_ctx->host2rxdma_ring_mask &
  1275. (1 << mac_for_pdev)) {
  1276. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1277. union dp_rx_desc_list_elem_t *tail = NULL;
  1278. struct dp_srng *rx_refill_buf_ring =
  1279. &pdev->rx_refill_buf_ring;
  1280. DP_STATS_INC(pdev, replenish.low_thresh_intrs,
  1281. 1);
  1282. dp_rx_buffers_replenish(soc, mac_for_pdev,
  1283. rx_refill_buf_ring,
  1284. &soc->rx_desc_buf[mac_for_pdev], 0,
  1285. &desc_list, &tail);
  1286. }
  1287. }
  1288. }
  1289. qdf_lro_flush(int_ctx->lro_ctx);
  1290. budget_done:
  1291. return dp_budget - budget;
  1292. }
  1293. /* dp_interrupt_timer()- timer poll for interrupts
  1294. *
  1295. * @arg: SoC Handle
  1296. *
  1297. * Return:
  1298. *
  1299. */
  1300. static void dp_interrupt_timer(void *arg)
  1301. {
  1302. struct dp_soc *soc = (struct dp_soc *) arg;
  1303. int i;
  1304. if (qdf_atomic_read(&soc->cmn_init_done)) {
  1305. for (i = 0;
  1306. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  1307. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  1308. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  1309. }
  1310. }
  1311. /*
  1312. * dp_soc_attach_poll() - Register handlers for DP interrupts
  1313. * @txrx_soc: DP SOC handle
  1314. *
  1315. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  1316. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  1317. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  1318. *
  1319. * Return: 0 for success, nonzero for failure.
  1320. */
  1321. static QDF_STATUS dp_soc_attach_poll(void *txrx_soc)
  1322. {
  1323. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1324. int i;
  1325. soc->intr_mode = DP_INTR_POLL;
  1326. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1327. soc->intr_ctx[i].dp_intr_id = i;
  1328. soc->intr_ctx[i].tx_ring_mask =
  1329. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1330. soc->intr_ctx[i].rx_ring_mask =
  1331. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1332. soc->intr_ctx[i].rx_mon_ring_mask =
  1333. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  1334. soc->intr_ctx[i].rx_err_ring_mask =
  1335. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1336. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  1337. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1338. soc->intr_ctx[i].reo_status_ring_mask =
  1339. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1340. soc->intr_ctx[i].rxdma2host_ring_mask =
  1341. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1342. soc->intr_ctx[i].soc = soc;
  1343. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1344. }
  1345. qdf_timer_init(soc->osdev, &soc->int_timer,
  1346. dp_interrupt_timer, (void *)soc,
  1347. QDF_TIMER_TYPE_WAKE_APPS);
  1348. return QDF_STATUS_SUCCESS;
  1349. }
  1350. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc);
  1351. #if defined(CONFIG_MCL)
  1352. /*
  1353. * dp_soc_interrupt_attach_wrapper() - Register handlers for DP interrupts
  1354. * @txrx_soc: DP SOC handle
  1355. *
  1356. * Call the appropriate attach function based on the mode of operation.
  1357. * This is a WAR for enabling monitor mode.
  1358. *
  1359. * Return: 0 for success. nonzero for failure.
  1360. */
  1361. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1362. {
  1363. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1364. if (!(soc->wlan_cfg_ctx->napi_enabled) ||
  1365. con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  1366. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1367. "%s: Poll mode", __func__);
  1368. return dp_soc_attach_poll(txrx_soc);
  1369. } else {
  1370. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1371. "%s: Interrupt mode", __func__);
  1372. return dp_soc_interrupt_attach(txrx_soc);
  1373. }
  1374. }
  1375. #else
  1376. #if defined(DP_INTR_POLL_BASED) && DP_INTR_POLL_BASED
  1377. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1378. {
  1379. return dp_soc_attach_poll(txrx_soc);
  1380. }
  1381. #else
  1382. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1383. {
  1384. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1385. if (hif_is_polled_mode_enabled(soc->hif_handle))
  1386. return dp_soc_attach_poll(txrx_soc);
  1387. else
  1388. return dp_soc_interrupt_attach(txrx_soc);
  1389. }
  1390. #endif
  1391. #endif
  1392. static void dp_soc_interrupt_map_calculate_integrated(struct dp_soc *soc,
  1393. int intr_ctx_num, int *irq_id_map, int *num_irq_r)
  1394. {
  1395. int j;
  1396. int num_irq = 0;
  1397. int tx_mask =
  1398. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1399. int rx_mask =
  1400. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1401. int rx_mon_mask =
  1402. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1403. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1404. soc->wlan_cfg_ctx, intr_ctx_num);
  1405. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1406. soc->wlan_cfg_ctx, intr_ctx_num);
  1407. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1408. soc->wlan_cfg_ctx, intr_ctx_num);
  1409. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1410. soc->wlan_cfg_ctx, intr_ctx_num);
  1411. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  1412. soc->wlan_cfg_ctx, intr_ctx_num);
  1413. int host2rxdma_mon_ring_mask = wlan_cfg_get_host2rxdma_mon_ring_mask(
  1414. soc->wlan_cfg_ctx, intr_ctx_num);
  1415. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  1416. if (tx_mask & (1 << j)) {
  1417. irq_id_map[num_irq++] =
  1418. (wbm2host_tx_completions_ring1 - j);
  1419. }
  1420. if (rx_mask & (1 << j)) {
  1421. irq_id_map[num_irq++] =
  1422. (reo2host_destination_ring1 - j);
  1423. }
  1424. if (rxdma2host_ring_mask & (1 << j)) {
  1425. irq_id_map[num_irq++] =
  1426. rxdma2host_destination_ring_mac1 -
  1427. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1428. }
  1429. if (host2rxdma_ring_mask & (1 << j)) {
  1430. irq_id_map[num_irq++] =
  1431. host2rxdma_host_buf_ring_mac1 -
  1432. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1433. }
  1434. if (host2rxdma_mon_ring_mask & (1 << j)) {
  1435. irq_id_map[num_irq++] =
  1436. host2rxdma_monitor_ring1 -
  1437. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1438. }
  1439. if (rx_mon_mask & (1 << j)) {
  1440. irq_id_map[num_irq++] =
  1441. ppdu_end_interrupts_mac1 -
  1442. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1443. irq_id_map[num_irq++] =
  1444. rxdma2host_monitor_status_ring_mac1 -
  1445. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1446. }
  1447. if (rx_wbm_rel_ring_mask & (1 << j))
  1448. irq_id_map[num_irq++] = wbm2host_rx_release;
  1449. if (rx_err_ring_mask & (1 << j))
  1450. irq_id_map[num_irq++] = reo2host_exception;
  1451. if (reo_status_ring_mask & (1 << j))
  1452. irq_id_map[num_irq++] = reo2host_status;
  1453. }
  1454. *num_irq_r = num_irq;
  1455. }
  1456. static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
  1457. int intr_ctx_num, int *irq_id_map, int *num_irq_r,
  1458. int msi_vector_count, int msi_vector_start)
  1459. {
  1460. int tx_mask = wlan_cfg_get_tx_ring_mask(
  1461. soc->wlan_cfg_ctx, intr_ctx_num);
  1462. int rx_mask = wlan_cfg_get_rx_ring_mask(
  1463. soc->wlan_cfg_ctx, intr_ctx_num);
  1464. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  1465. soc->wlan_cfg_ctx, intr_ctx_num);
  1466. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1467. soc->wlan_cfg_ctx, intr_ctx_num);
  1468. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1469. soc->wlan_cfg_ctx, intr_ctx_num);
  1470. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1471. soc->wlan_cfg_ctx, intr_ctx_num);
  1472. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1473. soc->wlan_cfg_ctx, intr_ctx_num);
  1474. unsigned int vector =
  1475. (intr_ctx_num % msi_vector_count) + msi_vector_start;
  1476. int num_irq = 0;
  1477. soc->intr_mode = DP_INTR_MSI;
  1478. if (tx_mask | rx_mask | rx_mon_mask | rx_err_ring_mask |
  1479. rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask)
  1480. irq_id_map[num_irq++] =
  1481. pld_get_msi_irq(soc->osdev->dev, vector);
  1482. *num_irq_r = num_irq;
  1483. }
  1484. static void dp_soc_interrupt_map_calculate(struct dp_soc *soc, int intr_ctx_num,
  1485. int *irq_id_map, int *num_irq)
  1486. {
  1487. int msi_vector_count, ret;
  1488. uint32_t msi_base_data, msi_vector_start;
  1489. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  1490. &msi_vector_count,
  1491. &msi_base_data,
  1492. &msi_vector_start);
  1493. if (ret)
  1494. return dp_soc_interrupt_map_calculate_integrated(soc,
  1495. intr_ctx_num, irq_id_map, num_irq);
  1496. else
  1497. dp_soc_interrupt_map_calculate_msi(soc,
  1498. intr_ctx_num, irq_id_map, num_irq,
  1499. msi_vector_count, msi_vector_start);
  1500. }
  1501. /*
  1502. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  1503. * @txrx_soc: DP SOC handle
  1504. *
  1505. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  1506. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  1507. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  1508. *
  1509. * Return: 0 for success. nonzero for failure.
  1510. */
  1511. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  1512. {
  1513. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1514. int i = 0;
  1515. int num_irq = 0;
  1516. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1517. int ret = 0;
  1518. /* Map of IRQ ids registered with one interrupt context */
  1519. int irq_id_map[HIF_MAX_GRP_IRQ];
  1520. int tx_mask =
  1521. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1522. int rx_mask =
  1523. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1524. int rx_mon_mask =
  1525. dp_soc_get_mon_mask_for_interrupt_mode(soc, i);
  1526. int rx_err_ring_mask =
  1527. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1528. int rx_wbm_rel_ring_mask =
  1529. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1530. int reo_status_ring_mask =
  1531. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1532. int rxdma2host_ring_mask =
  1533. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1534. int host2rxdma_ring_mask =
  1535. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  1536. int host2rxdma_mon_ring_mask =
  1537. wlan_cfg_get_host2rxdma_mon_ring_mask(
  1538. soc->wlan_cfg_ctx, i);
  1539. soc->intr_ctx[i].dp_intr_id = i;
  1540. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  1541. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  1542. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  1543. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  1544. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  1545. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  1546. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  1547. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  1548. soc->intr_ctx[i].host2rxdma_mon_ring_mask =
  1549. host2rxdma_mon_ring_mask;
  1550. soc->intr_ctx[i].soc = soc;
  1551. num_irq = 0;
  1552. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  1553. &num_irq);
  1554. ret = hif_register_ext_group(soc->hif_handle,
  1555. num_irq, irq_id_map, dp_service_srngs,
  1556. &soc->intr_ctx[i], "dp_intr",
  1557. HIF_EXEC_NAPI_TYPE, QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  1558. if (ret) {
  1559. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1560. FL("failed, ret = %d"), ret);
  1561. return QDF_STATUS_E_FAILURE;
  1562. }
  1563. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1564. }
  1565. hif_configure_ext_group_interrupts(soc->hif_handle);
  1566. return QDF_STATUS_SUCCESS;
  1567. }
  1568. /*
  1569. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  1570. * @txrx_soc: DP SOC handle
  1571. *
  1572. * Return: void
  1573. */
  1574. static void dp_soc_interrupt_detach(void *txrx_soc)
  1575. {
  1576. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1577. int i;
  1578. if (soc->intr_mode == DP_INTR_POLL) {
  1579. qdf_timer_stop(&soc->int_timer);
  1580. qdf_timer_free(&soc->int_timer);
  1581. } else {
  1582. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  1583. }
  1584. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1585. soc->intr_ctx[i].tx_ring_mask = 0;
  1586. soc->intr_ctx[i].rx_ring_mask = 0;
  1587. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  1588. soc->intr_ctx[i].rx_err_ring_mask = 0;
  1589. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  1590. soc->intr_ctx[i].reo_status_ring_mask = 0;
  1591. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  1592. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  1593. soc->intr_ctx[i].host2rxdma_mon_ring_mask = 0;
  1594. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  1595. }
  1596. }
  1597. #define AVG_MAX_MPDUS_PER_TID 128
  1598. #define AVG_TIDS_PER_CLIENT 2
  1599. #define AVG_FLOWS_PER_TID 2
  1600. #define AVG_MSDUS_PER_FLOW 128
  1601. #define AVG_MSDUS_PER_MPDU 4
  1602. /*
  1603. * Allocate and setup link descriptor pool that will be used by HW for
  1604. * various link and queue descriptors and managed by WBM
  1605. */
  1606. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  1607. {
  1608. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  1609. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  1610. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  1611. uint32_t num_mpdus_per_link_desc =
  1612. hal_num_mpdus_per_link_desc(soc->hal_soc);
  1613. uint32_t num_msdus_per_link_desc =
  1614. hal_num_msdus_per_link_desc(soc->hal_soc);
  1615. uint32_t num_mpdu_links_per_queue_desc =
  1616. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  1617. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1618. uint32_t total_link_descs, total_mem_size;
  1619. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  1620. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  1621. uint32_t num_link_desc_banks;
  1622. uint32_t last_bank_size = 0;
  1623. uint32_t entry_size, num_entries;
  1624. int i;
  1625. uint32_t desc_id = 0;
  1626. qdf_dma_addr_t *baseaddr = NULL;
  1627. /* Only Tx queue descriptors are allocated from common link descriptor
  1628. * pool Rx queue descriptors are not included in this because (REO queue
  1629. * extension descriptors) they are expected to be allocated contiguously
  1630. * with REO queue descriptors
  1631. */
  1632. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1633. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  1634. num_mpdu_queue_descs = num_mpdu_link_descs /
  1635. num_mpdu_links_per_queue_desc;
  1636. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1637. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  1638. num_msdus_per_link_desc;
  1639. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1640. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  1641. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  1642. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  1643. /* Round up to power of 2 */
  1644. total_link_descs = 1;
  1645. while (total_link_descs < num_entries)
  1646. total_link_descs <<= 1;
  1647. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1648. FL("total_link_descs: %u, link_desc_size: %d"),
  1649. total_link_descs, link_desc_size);
  1650. total_mem_size = total_link_descs * link_desc_size;
  1651. total_mem_size += link_desc_align;
  1652. if (total_mem_size <= max_alloc_size) {
  1653. num_link_desc_banks = 0;
  1654. last_bank_size = total_mem_size;
  1655. } else {
  1656. num_link_desc_banks = (total_mem_size) /
  1657. (max_alloc_size - link_desc_align);
  1658. last_bank_size = total_mem_size %
  1659. (max_alloc_size - link_desc_align);
  1660. }
  1661. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1662. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  1663. total_mem_size, num_link_desc_banks);
  1664. for (i = 0; i < num_link_desc_banks; i++) {
  1665. if (!soc->dp_soc_reinit) {
  1666. baseaddr = &soc->link_desc_banks[i].
  1667. base_paddr_unaligned;
  1668. soc->link_desc_banks[i].base_vaddr_unaligned =
  1669. qdf_mem_alloc_consistent(soc->osdev,
  1670. soc->osdev->dev,
  1671. max_alloc_size,
  1672. baseaddr);
  1673. }
  1674. soc->link_desc_banks[i].size = max_alloc_size;
  1675. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  1676. soc->link_desc_banks[i].base_vaddr_unaligned) +
  1677. ((unsigned long)(
  1678. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1679. link_desc_align));
  1680. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  1681. soc->link_desc_banks[i].base_paddr_unaligned) +
  1682. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1683. (unsigned long)(
  1684. soc->link_desc_banks[i].base_vaddr_unaligned));
  1685. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  1686. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1687. FL("Link descriptor memory alloc failed"));
  1688. goto fail;
  1689. }
  1690. }
  1691. if (last_bank_size) {
  1692. /* Allocate last bank in case total memory required is not exact
  1693. * multiple of max_alloc_size
  1694. */
  1695. if (!soc->dp_soc_reinit) {
  1696. baseaddr = &soc->link_desc_banks[i].
  1697. base_paddr_unaligned;
  1698. soc->link_desc_banks[i].base_vaddr_unaligned =
  1699. qdf_mem_alloc_consistent(soc->osdev,
  1700. soc->osdev->dev,
  1701. last_bank_size,
  1702. baseaddr);
  1703. }
  1704. soc->link_desc_banks[i].size = last_bank_size;
  1705. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  1706. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  1707. ((unsigned long)(
  1708. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1709. link_desc_align));
  1710. soc->link_desc_banks[i].base_paddr =
  1711. (unsigned long)(
  1712. soc->link_desc_banks[i].base_paddr_unaligned) +
  1713. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1714. (unsigned long)(
  1715. soc->link_desc_banks[i].base_vaddr_unaligned));
  1716. }
  1717. /* Allocate and setup link descriptor idle list for HW internal use */
  1718. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  1719. total_mem_size = entry_size * total_link_descs;
  1720. if (total_mem_size <= max_alloc_size) {
  1721. void *desc;
  1722. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  1723. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  1724. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1725. FL("Link desc idle ring setup failed"));
  1726. goto fail;
  1727. }
  1728. hal_srng_access_start_unlocked(soc->hal_soc,
  1729. soc->wbm_idle_link_ring.hal_srng);
  1730. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1731. soc->link_desc_banks[i].base_paddr; i++) {
  1732. uint32_t num_entries = (soc->link_desc_banks[i].size -
  1733. ((unsigned long)(
  1734. soc->link_desc_banks[i].base_vaddr) -
  1735. (unsigned long)(
  1736. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1737. / link_desc_size;
  1738. unsigned long paddr = (unsigned long)(
  1739. soc->link_desc_banks[i].base_paddr);
  1740. while (num_entries && (desc = hal_srng_src_get_next(
  1741. soc->hal_soc,
  1742. soc->wbm_idle_link_ring.hal_srng))) {
  1743. hal_set_link_desc_addr(desc,
  1744. LINK_DESC_COOKIE(desc_id, i), paddr);
  1745. num_entries--;
  1746. desc_id++;
  1747. paddr += link_desc_size;
  1748. }
  1749. }
  1750. hal_srng_access_end_unlocked(soc->hal_soc,
  1751. soc->wbm_idle_link_ring.hal_srng);
  1752. } else {
  1753. uint32_t num_scatter_bufs;
  1754. uint32_t num_entries_per_buf;
  1755. uint32_t rem_entries;
  1756. uint8_t *scatter_buf_ptr;
  1757. uint16_t scatter_buf_num;
  1758. uint32_t buf_size = 0;
  1759. soc->wbm_idle_scatter_buf_size =
  1760. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1761. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  1762. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  1763. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1764. soc->hal_soc, total_mem_size,
  1765. soc->wbm_idle_scatter_buf_size);
  1766. if (num_scatter_bufs > MAX_IDLE_SCATTER_BUFS) {
  1767. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1768. FL("scatter bufs size out of bounds"));
  1769. goto fail;
  1770. }
  1771. for (i = 0; i < num_scatter_bufs; i++) {
  1772. baseaddr = &soc->wbm_idle_scatter_buf_base_paddr[i];
  1773. if (!soc->dp_soc_reinit) {
  1774. buf_size = soc->wbm_idle_scatter_buf_size;
  1775. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1776. qdf_mem_alloc_consistent(soc->osdev,
  1777. soc->osdev->
  1778. dev,
  1779. buf_size,
  1780. baseaddr);
  1781. }
  1782. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  1783. QDF_TRACE(QDF_MODULE_ID_DP,
  1784. QDF_TRACE_LEVEL_ERROR,
  1785. FL("Scatter lst memory alloc fail"));
  1786. goto fail;
  1787. }
  1788. }
  1789. /* Populate idle list scatter buffers with link descriptor
  1790. * pointers
  1791. */
  1792. scatter_buf_num = 0;
  1793. scatter_buf_ptr = (uint8_t *)(
  1794. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  1795. rem_entries = num_entries_per_buf;
  1796. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1797. soc->link_desc_banks[i].base_paddr; i++) {
  1798. uint32_t num_link_descs =
  1799. (soc->link_desc_banks[i].size -
  1800. ((unsigned long)(
  1801. soc->link_desc_banks[i].base_vaddr) -
  1802. (unsigned long)(
  1803. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1804. / link_desc_size;
  1805. unsigned long paddr = (unsigned long)(
  1806. soc->link_desc_banks[i].base_paddr);
  1807. while (num_link_descs) {
  1808. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  1809. LINK_DESC_COOKIE(desc_id, i), paddr);
  1810. num_link_descs--;
  1811. desc_id++;
  1812. paddr += link_desc_size;
  1813. rem_entries--;
  1814. if (rem_entries) {
  1815. scatter_buf_ptr += entry_size;
  1816. } else {
  1817. rem_entries = num_entries_per_buf;
  1818. scatter_buf_num++;
  1819. if (scatter_buf_num >= num_scatter_bufs)
  1820. break;
  1821. scatter_buf_ptr = (uint8_t *)(
  1822. soc->wbm_idle_scatter_buf_base_vaddr[
  1823. scatter_buf_num]);
  1824. }
  1825. }
  1826. }
  1827. /* Setup link descriptor idle list in HW */
  1828. hal_setup_link_idle_list(soc->hal_soc,
  1829. soc->wbm_idle_scatter_buf_base_paddr,
  1830. soc->wbm_idle_scatter_buf_base_vaddr,
  1831. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  1832. (uint32_t)(scatter_buf_ptr -
  1833. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  1834. scatter_buf_num-1])), total_link_descs);
  1835. }
  1836. return 0;
  1837. fail:
  1838. if (soc->wbm_idle_link_ring.hal_srng) {
  1839. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1840. WBM_IDLE_LINK, 0);
  1841. }
  1842. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1843. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1844. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1845. soc->wbm_idle_scatter_buf_size,
  1846. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1847. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1848. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1849. }
  1850. }
  1851. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1852. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1853. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1854. soc->link_desc_banks[i].size,
  1855. soc->link_desc_banks[i].base_vaddr_unaligned,
  1856. soc->link_desc_banks[i].base_paddr_unaligned,
  1857. 0);
  1858. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1859. }
  1860. }
  1861. return QDF_STATUS_E_FAILURE;
  1862. }
  1863. /*
  1864. * Free link descriptor pool that was setup HW
  1865. */
  1866. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  1867. {
  1868. int i;
  1869. if (soc->wbm_idle_link_ring.hal_srng) {
  1870. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1871. WBM_IDLE_LINK, 0);
  1872. }
  1873. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1874. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1875. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1876. soc->wbm_idle_scatter_buf_size,
  1877. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1878. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1879. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1880. }
  1881. }
  1882. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1883. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1884. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1885. soc->link_desc_banks[i].size,
  1886. soc->link_desc_banks[i].base_vaddr_unaligned,
  1887. soc->link_desc_banks[i].base_paddr_unaligned,
  1888. 0);
  1889. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1890. }
  1891. }
  1892. }
  1893. #ifdef IPA_OFFLOAD
  1894. #define REO_DST_RING_SIZE_QCA6290 1023
  1895. #ifndef QCA_WIFI_QCA8074_VP
  1896. #define REO_DST_RING_SIZE_QCA8074 1023
  1897. #else
  1898. #define REO_DST_RING_SIZE_QCA8074 8
  1899. #endif /* QCA_WIFI_QCA8074_VP */
  1900. #else
  1901. #define REO_DST_RING_SIZE_QCA6290 1024
  1902. #ifndef QCA_WIFI_QCA8074_VP
  1903. #define REO_DST_RING_SIZE_QCA8074 2048
  1904. #else
  1905. #define REO_DST_RING_SIZE_QCA8074 8
  1906. #endif /* QCA_WIFI_QCA8074_VP */
  1907. #endif /* IPA_OFFLOAD */
  1908. /*
  1909. * dp_ast_aging_timer_fn() - Timer callback function for WDS aging
  1910. * @soc: Datapath SOC handle
  1911. *
  1912. * This is a timer function used to age out stale AST nodes from
  1913. * AST table
  1914. */
  1915. #ifdef FEATURE_WDS
  1916. static void dp_ast_aging_timer_fn(void *soc_hdl)
  1917. {
  1918. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  1919. struct dp_pdev *pdev;
  1920. struct dp_vdev *vdev;
  1921. struct dp_peer *peer;
  1922. struct dp_ast_entry *ase, *temp_ase;
  1923. int i;
  1924. bool check_wds_ase = false;
  1925. if (soc->wds_ast_aging_timer_cnt++ >= DP_WDS_AST_AGING_TIMER_CNT) {
  1926. soc->wds_ast_aging_timer_cnt = 0;
  1927. check_wds_ase = true;
  1928. }
  1929. /* Peer list access lock */
  1930. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1931. /* AST list access lock */
  1932. qdf_spin_lock_bh(&soc->ast_lock);
  1933. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1934. pdev = soc->pdev_list[i];
  1935. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1936. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1937. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1938. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  1939. /*
  1940. * Do not expire static ast entries
  1941. * and HM WDS entries
  1942. */
  1943. if (ase->type !=
  1944. CDP_TXRX_AST_TYPE_WDS &&
  1945. ase->type !=
  1946. CDP_TXRX_AST_TYPE_MEC &&
  1947. ase->type !=
  1948. CDP_TXRX_AST_TYPE_DA)
  1949. continue;
  1950. /* Expire MEC entry every n sec.
  1951. * This needs to be expired in
  1952. * case if STA backbone is made as
  1953. * AP backbone, In this case it needs
  1954. * to be re-added as a WDS entry.
  1955. */
  1956. if (ase->is_active && ase->type ==
  1957. CDP_TXRX_AST_TYPE_MEC) {
  1958. ase->is_active = FALSE;
  1959. continue;
  1960. } else if (ase->is_active &&
  1961. check_wds_ase) {
  1962. ase->is_active = FALSE;
  1963. continue;
  1964. }
  1965. if (ase->type ==
  1966. CDP_TXRX_AST_TYPE_MEC) {
  1967. DP_STATS_INC(soc,
  1968. ast.aged_out, 1);
  1969. dp_peer_del_ast(soc, ase);
  1970. } else if (check_wds_ase) {
  1971. DP_STATS_INC(soc,
  1972. ast.aged_out, 1);
  1973. dp_peer_del_ast(soc, ase);
  1974. }
  1975. }
  1976. }
  1977. }
  1978. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1979. }
  1980. qdf_spin_unlock_bh(&soc->ast_lock);
  1981. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1982. if (qdf_atomic_read(&soc->cmn_init_done))
  1983. qdf_timer_mod(&soc->ast_aging_timer,
  1984. DP_AST_AGING_TIMER_DEFAULT_MS);
  1985. }
  1986. /*
  1987. * dp_soc_wds_attach() - Setup WDS timer and AST table
  1988. * @soc: Datapath SOC handle
  1989. *
  1990. * Return: None
  1991. */
  1992. static void dp_soc_wds_attach(struct dp_soc *soc)
  1993. {
  1994. soc->wds_ast_aging_timer_cnt = 0;
  1995. qdf_timer_init(soc->osdev, &soc->ast_aging_timer,
  1996. dp_ast_aging_timer_fn, (void *)soc,
  1997. QDF_TIMER_TYPE_WAKE_APPS);
  1998. qdf_timer_mod(&soc->ast_aging_timer, DP_AST_AGING_TIMER_DEFAULT_MS);
  1999. }
  2000. /*
  2001. * dp_soc_wds_detach() - Detach WDS data structures and timers
  2002. * @txrx_soc: DP SOC handle
  2003. *
  2004. * Return: None
  2005. */
  2006. static void dp_soc_wds_detach(struct dp_soc *soc)
  2007. {
  2008. qdf_timer_stop(&soc->ast_aging_timer);
  2009. qdf_timer_free(&soc->ast_aging_timer);
  2010. }
  2011. #else
  2012. static void dp_soc_wds_attach(struct dp_soc *soc)
  2013. {
  2014. }
  2015. static void dp_soc_wds_detach(struct dp_soc *soc)
  2016. {
  2017. }
  2018. #endif
  2019. /*
  2020. * dp_soc_reset_ring_map() - Reset cpu ring map
  2021. * @soc: Datapath soc handler
  2022. *
  2023. * This api resets the default cpu ring map
  2024. */
  2025. static void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  2026. {
  2027. uint8_t i;
  2028. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  2029. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  2030. switch (nss_config) {
  2031. case dp_nss_cfg_first_radio:
  2032. /*
  2033. * Setting Tx ring map for one nss offloaded radio
  2034. */
  2035. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  2036. break;
  2037. case dp_nss_cfg_second_radio:
  2038. /*
  2039. * Setting Tx ring for two nss offloaded radios
  2040. */
  2041. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  2042. break;
  2043. case dp_nss_cfg_dbdc:
  2044. /*
  2045. * Setting Tx ring map for 2 nss offloaded radios
  2046. */
  2047. soc->tx_ring_map[i] =
  2048. dp_cpu_ring_map[DP_NSS_DBDC_OFFLOADED_MAP][i];
  2049. break;
  2050. case dp_nss_cfg_dbtc:
  2051. /*
  2052. * Setting Tx ring map for 3 nss offloaded radios
  2053. */
  2054. soc->tx_ring_map[i] =
  2055. dp_cpu_ring_map[DP_NSS_DBTC_OFFLOADED_MAP][i];
  2056. break;
  2057. default:
  2058. dp_err("tx_ring_map failed due to invalid nss cfg");
  2059. break;
  2060. }
  2061. }
  2062. }
  2063. /*
  2064. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  2065. * @dp_soc - DP soc handle
  2066. * @ring_type - ring type
  2067. * @ring_num - ring_num
  2068. *
  2069. * return 0 or 1
  2070. */
  2071. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc, enum hal_ring_type ring_type, int ring_num)
  2072. {
  2073. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  2074. uint8_t status = 0;
  2075. switch (ring_type) {
  2076. case WBM2SW_RELEASE:
  2077. case REO_DST:
  2078. case RXDMA_BUF:
  2079. status = ((nss_config) & (1 << ring_num));
  2080. break;
  2081. default:
  2082. break;
  2083. }
  2084. return status;
  2085. }
  2086. /*
  2087. * dp_soc_reset_intr_mask() - reset interrupt mask
  2088. * @dp_soc - DP Soc handle
  2089. *
  2090. * Return: Return void
  2091. */
  2092. static void dp_soc_reset_intr_mask(struct dp_soc *soc)
  2093. {
  2094. uint8_t j;
  2095. int *grp_mask = NULL;
  2096. int group_number, mask, num_ring;
  2097. /* number of tx ring */
  2098. num_ring = wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  2099. /*
  2100. * group mask for tx completion ring.
  2101. */
  2102. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  2103. /* loop and reset the mask for only offloaded ring */
  2104. for (j = 0; j < num_ring; j++) {
  2105. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j)) {
  2106. continue;
  2107. }
  2108. /*
  2109. * Group number corresponding to tx offloaded ring.
  2110. */
  2111. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  2112. if (group_number < 0) {
  2113. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2114. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  2115. WBM2SW_RELEASE, j);
  2116. return;
  2117. }
  2118. /* reset the tx mask for offloaded ring */
  2119. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  2120. mask &= (~(1 << j));
  2121. /*
  2122. * reset the interrupt mask for offloaded ring.
  2123. */
  2124. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  2125. }
  2126. /* number of rx rings */
  2127. num_ring = wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  2128. /*
  2129. * group mask for reo destination ring.
  2130. */
  2131. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  2132. /* loop and reset the mask for only offloaded ring */
  2133. for (j = 0; j < num_ring; j++) {
  2134. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j)) {
  2135. continue;
  2136. }
  2137. /*
  2138. * Group number corresponding to rx offloaded ring.
  2139. */
  2140. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  2141. if (group_number < 0) {
  2142. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2143. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  2144. REO_DST, j);
  2145. return;
  2146. }
  2147. /* set the interrupt mask for offloaded ring */
  2148. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  2149. mask &= (~(1 << j));
  2150. /*
  2151. * set the interrupt mask to zero for rx offloaded radio.
  2152. */
  2153. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  2154. }
  2155. /*
  2156. * group mask for Rx buffer refill ring
  2157. */
  2158. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  2159. /* loop and reset the mask for only offloaded ring */
  2160. for (j = 0; j < MAX_PDEV_CNT; j++) {
  2161. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  2162. continue;
  2163. }
  2164. /*
  2165. * Group number corresponding to rx offloaded ring.
  2166. */
  2167. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  2168. if (group_number < 0) {
  2169. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2170. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  2171. REO_DST, j);
  2172. return;
  2173. }
  2174. /* set the interrupt mask for offloaded ring */
  2175. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  2176. group_number);
  2177. mask &= (~(1 << j));
  2178. /*
  2179. * set the interrupt mask to zero for rx offloaded radio.
  2180. */
  2181. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  2182. group_number, mask);
  2183. }
  2184. }
  2185. #ifdef IPA_OFFLOAD
  2186. /**
  2187. * dp_reo_remap_config() - configure reo remap register value based
  2188. * nss configuration.
  2189. * based on offload_radio value below remap configuration
  2190. * get applied.
  2191. * 0 - both Radios handled by host (remap rings 1, 2, 3 & 4)
  2192. * 1 - 1st Radio handled by NSS (remap rings 2, 3 & 4)
  2193. * 2 - 2nd Radio handled by NSS (remap rings 1, 2 & 4)
  2194. * 3 - both Radios handled by NSS (remap not required)
  2195. * 4 - IPA OFFLOAD enabled (remap rings 1,2 & 3)
  2196. *
  2197. * @remap1: output parameter indicates reo remap 1 register value
  2198. * @remap2: output parameter indicates reo remap 2 register value
  2199. * Return: bool type, true if remap is configured else false.
  2200. */
  2201. static bool dp_reo_remap_config(struct dp_soc *soc,
  2202. uint32_t *remap1,
  2203. uint32_t *remap2)
  2204. {
  2205. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
  2206. (0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
  2207. *remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
  2208. (0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
  2209. dp_debug("remap1 %x remap2 %x", *remap1, *remap2);
  2210. return true;
  2211. }
  2212. #else
  2213. static bool dp_reo_remap_config(struct dp_soc *soc,
  2214. uint32_t *remap1,
  2215. uint32_t *remap2)
  2216. {
  2217. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  2218. switch (offload_radio) {
  2219. case dp_nss_cfg_default:
  2220. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  2221. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  2222. (0x3 << 18) | (0x4 << 21)) << 8;
  2223. *remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  2224. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  2225. (0x3 << 18) | (0x4 << 21)) << 8;
  2226. break;
  2227. case dp_nss_cfg_first_radio:
  2228. *remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
  2229. (0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
  2230. (0x2 << 18) | (0x3 << 21)) << 8;
  2231. *remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
  2232. (0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
  2233. (0x4 << 18) | (0x2 << 21)) << 8;
  2234. break;
  2235. case dp_nss_cfg_second_radio:
  2236. *remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
  2237. (0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
  2238. (0x1 << 18) | (0x3 << 21)) << 8;
  2239. *remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
  2240. (0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
  2241. (0x4 << 18) | (0x1 << 21)) << 8;
  2242. break;
  2243. case dp_nss_cfg_dbdc:
  2244. case dp_nss_cfg_dbtc:
  2245. /* return false if both or all are offloaded to NSS */
  2246. return false;
  2247. }
  2248. dp_debug("remap1 %x remap2 %x offload_radio %u",
  2249. *remap1, *remap2, offload_radio);
  2250. return true;
  2251. }
  2252. #endif
  2253. /*
  2254. * dp_reo_frag_dst_set() - configure reo register to set the
  2255. * fragment destination ring
  2256. * @soc : Datapath soc
  2257. * @frag_dst_ring : output parameter to set fragment destination ring
  2258. *
  2259. * Based on offload_radio below fragment destination rings is selected
  2260. * 0 - TCL
  2261. * 1 - SW1
  2262. * 2 - SW2
  2263. * 3 - SW3
  2264. * 4 - SW4
  2265. * 5 - Release
  2266. * 6 - FW
  2267. * 7 - alternate select
  2268. *
  2269. * return: void
  2270. */
  2271. static void dp_reo_frag_dst_set(struct dp_soc *soc, uint8_t *frag_dst_ring)
  2272. {
  2273. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  2274. switch (offload_radio) {
  2275. case dp_nss_cfg_default:
  2276. *frag_dst_ring = HAL_SRNG_REO_EXCEPTION;
  2277. break;
  2278. case dp_nss_cfg_dbdc:
  2279. case dp_nss_cfg_dbtc:
  2280. *frag_dst_ring = HAL_SRNG_REO_ALTERNATE_SELECT;
  2281. break;
  2282. default:
  2283. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2284. FL("dp_reo_frag_dst_set invalid offload radio config"));
  2285. break;
  2286. }
  2287. }
  2288. /*
  2289. * dp_soc_cmn_setup() - Common SoC level initializion
  2290. * @soc: Datapath SOC handle
  2291. *
  2292. * This is an internal function used to setup common SOC data structures,
  2293. * to be called from PDEV attach after receiving HW mode capabilities from FW
  2294. */
  2295. static int dp_soc_cmn_setup(struct dp_soc *soc)
  2296. {
  2297. int i;
  2298. struct hal_reo_params reo_params;
  2299. int tx_ring_size;
  2300. int tx_comp_ring_size;
  2301. int reo_dst_ring_size;
  2302. uint32_t entries;
  2303. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2304. if (qdf_atomic_read(&soc->cmn_init_done))
  2305. return 0;
  2306. if (dp_hw_link_desc_pool_setup(soc))
  2307. goto fail1;
  2308. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2309. /* Setup SRNG rings */
  2310. /* Common rings */
  2311. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  2312. wlan_cfg_get_dp_soc_wbm_release_ring_size(soc_cfg_ctx))) {
  2313. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2314. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  2315. goto fail1;
  2316. }
  2317. soc->num_tcl_data_rings = 0;
  2318. /* Tx data rings */
  2319. if (!wlan_cfg_per_pdev_tx_ring(soc_cfg_ctx)) {
  2320. soc->num_tcl_data_rings =
  2321. wlan_cfg_num_tcl_data_rings(soc_cfg_ctx);
  2322. tx_comp_ring_size =
  2323. wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
  2324. tx_ring_size =
  2325. wlan_cfg_tx_ring_size(soc_cfg_ctx);
  2326. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2327. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  2328. TCL_DATA, i, 0, tx_ring_size)) {
  2329. QDF_TRACE(QDF_MODULE_ID_DP,
  2330. QDF_TRACE_LEVEL_ERROR,
  2331. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  2332. goto fail1;
  2333. }
  2334. /*
  2335. * TBD: Set IPA WBM ring size with ini IPA UC tx buffer
  2336. * count
  2337. */
  2338. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  2339. WBM2SW_RELEASE, i, 0, tx_comp_ring_size)) {
  2340. QDF_TRACE(QDF_MODULE_ID_DP,
  2341. QDF_TRACE_LEVEL_ERROR,
  2342. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  2343. goto fail1;
  2344. }
  2345. }
  2346. } else {
  2347. /* This will be incremented during per pdev ring setup */
  2348. soc->num_tcl_data_rings = 0;
  2349. }
  2350. if (dp_tx_soc_attach(soc)) {
  2351. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2352. FL("dp_tx_soc_attach failed"));
  2353. goto fail1;
  2354. }
  2355. entries = wlan_cfg_get_dp_soc_tcl_cmd_ring_size(soc_cfg_ctx);
  2356. /* TCL command and status rings */
  2357. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  2358. entries)) {
  2359. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2360. FL("dp_srng_setup failed for tcl_cmd_ring"));
  2361. goto fail1;
  2362. }
  2363. entries = wlan_cfg_get_dp_soc_tcl_status_ring_size(soc_cfg_ctx);
  2364. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  2365. entries)) {
  2366. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2367. FL("dp_srng_setup failed for tcl_status_ring"));
  2368. goto fail1;
  2369. }
  2370. reo_dst_ring_size = wlan_cfg_get_reo_dst_ring_size(soc->wlan_cfg_ctx);
  2371. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  2372. * descriptors
  2373. */
  2374. /* Rx data rings */
  2375. if (!wlan_cfg_per_pdev_rx_ring(soc_cfg_ctx)) {
  2376. soc->num_reo_dest_rings =
  2377. wlan_cfg_num_reo_dest_rings(soc_cfg_ctx);
  2378. QDF_TRACE(QDF_MODULE_ID_DP,
  2379. QDF_TRACE_LEVEL_INFO,
  2380. FL("num_reo_dest_rings %d"), soc->num_reo_dest_rings);
  2381. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2382. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  2383. i, 0, reo_dst_ring_size)) {
  2384. QDF_TRACE(QDF_MODULE_ID_DP,
  2385. QDF_TRACE_LEVEL_ERROR,
  2386. FL(RNG_ERR "reo_dest_ring [%d]"), i);
  2387. goto fail1;
  2388. }
  2389. }
  2390. } else {
  2391. /* This will be incremented during per pdev ring setup */
  2392. soc->num_reo_dest_rings = 0;
  2393. }
  2394. entries = wlan_cfg_get_dp_soc_rxdma_err_dst_ring_size(soc_cfg_ctx);
  2395. /* LMAC RxDMA to SW Rings configuration */
  2396. if (!wlan_cfg_per_pdev_lmac_ring(soc_cfg_ctx)) {
  2397. /* Only valid for MCL */
  2398. struct dp_pdev *pdev = soc->pdev_list[0];
  2399. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  2400. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[i],
  2401. RXDMA_DST, 0, i,
  2402. entries)) {
  2403. QDF_TRACE(QDF_MODULE_ID_DP,
  2404. QDF_TRACE_LEVEL_ERROR,
  2405. FL(RNG_ERR "rxdma_err_dst_ring"));
  2406. goto fail1;
  2407. }
  2408. }
  2409. }
  2410. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  2411. /* REO reinjection ring */
  2412. entries = wlan_cfg_get_dp_soc_reo_reinject_ring_size(soc_cfg_ctx);
  2413. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  2414. entries)) {
  2415. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2416. FL("dp_srng_setup failed for reo_reinject_ring"));
  2417. goto fail1;
  2418. }
  2419. /* Rx release ring */
  2420. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  2421. wlan_cfg_get_dp_soc_rx_release_ring_size(soc_cfg_ctx))) {
  2422. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2423. FL("dp_srng_setup failed for rx_rel_ring"));
  2424. goto fail1;
  2425. }
  2426. /* Rx exception ring */
  2427. entries = wlan_cfg_get_dp_soc_reo_exception_ring_size(soc_cfg_ctx);
  2428. if (dp_srng_setup(soc, &soc->reo_exception_ring,
  2429. REO_EXCEPTION, 0, MAX_REO_DEST_RINGS, entries)) {
  2430. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2431. FL("dp_srng_setup failed for reo_exception_ring"));
  2432. goto fail1;
  2433. }
  2434. /* REO command and status rings */
  2435. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  2436. wlan_cfg_get_dp_soc_reo_cmd_ring_size(soc_cfg_ctx))) {
  2437. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2438. FL("dp_srng_setup failed for reo_cmd_ring"));
  2439. goto fail1;
  2440. }
  2441. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  2442. TAILQ_INIT(&soc->rx.reo_cmd_list);
  2443. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  2444. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  2445. wlan_cfg_get_dp_soc_reo_status_ring_size(soc_cfg_ctx))) {
  2446. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2447. FL("dp_srng_setup failed for reo_status_ring"));
  2448. goto fail1;
  2449. }
  2450. /* Reset the cpu ring map if radio is NSS offloaded */
  2451. if (wlan_cfg_get_dp_soc_nss_cfg(soc_cfg_ctx)) {
  2452. dp_soc_reset_cpu_ring_map(soc);
  2453. dp_soc_reset_intr_mask(soc);
  2454. }
  2455. /* Setup HW REO */
  2456. qdf_mem_zero(&reo_params, sizeof(reo_params));
  2457. if (wlan_cfg_is_rx_hash_enabled(soc_cfg_ctx)) {
  2458. /*
  2459. * Reo ring remap is not required if both radios
  2460. * are offloaded to NSS
  2461. */
  2462. if (!dp_reo_remap_config(soc,
  2463. &reo_params.remap1,
  2464. &reo_params.remap2))
  2465. goto out;
  2466. reo_params.rx_hash_enabled = true;
  2467. }
  2468. /* setup the global rx defrag waitlist */
  2469. TAILQ_INIT(&soc->rx.defrag.waitlist);
  2470. soc->rx.defrag.timeout_ms =
  2471. wlan_cfg_get_rx_defrag_min_timeout(soc_cfg_ctx);
  2472. soc->rx.defrag.next_flush_ms = 0;
  2473. soc->rx.flags.defrag_timeout_check =
  2474. wlan_cfg_get_defrag_timeout_check(soc_cfg_ctx);
  2475. qdf_spinlock_create(&soc->rx.defrag.defrag_lock);
  2476. out:
  2477. /*
  2478. * set the fragment destination ring
  2479. */
  2480. dp_reo_frag_dst_set(soc, &reo_params.frag_dst_ring);
  2481. hal_reo_setup(soc->hal_soc, &reo_params);
  2482. qdf_atomic_set(&soc->cmn_init_done, 1);
  2483. dp_soc_wds_attach(soc);
  2484. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  2485. return 0;
  2486. fail1:
  2487. /*
  2488. * Cleanup will be done as part of soc_detach, which will
  2489. * be called on pdev attach failure
  2490. */
  2491. return QDF_STATUS_E_FAILURE;
  2492. }
  2493. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  2494. static QDF_STATUS dp_lro_hash_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2495. {
  2496. struct cdp_lro_hash_config lro_hash;
  2497. QDF_STATUS status;
  2498. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2499. !wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx) &&
  2500. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  2501. dp_err("LRO, GRO and RX hash disabled");
  2502. return QDF_STATUS_E_FAILURE;
  2503. }
  2504. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  2505. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) ||
  2506. wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx)) {
  2507. lro_hash.lro_enable = 1;
  2508. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  2509. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  2510. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  2511. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  2512. }
  2513. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  2514. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2515. LRO_IPV4_SEED_ARR_SZ));
  2516. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  2517. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2518. LRO_IPV6_SEED_ARR_SZ));
  2519. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  2520. if (!soc->cdp_soc.ol_ops->lro_hash_config) {
  2521. QDF_BUG(0);
  2522. dp_err("lro_hash_config not configured");
  2523. return QDF_STATUS_E_FAILURE;
  2524. }
  2525. status = soc->cdp_soc.ol_ops->lro_hash_config(pdev->ctrl_pdev,
  2526. &lro_hash);
  2527. if (!QDF_IS_STATUS_SUCCESS(status)) {
  2528. dp_err("failed to send lro_hash_config to FW %u", status);
  2529. return status;
  2530. }
  2531. dp_info("LRO CMD config: lro_enable: 0x%x tcp_flag 0x%x tcp_flag_mask 0x%x",
  2532. lro_hash.lro_enable, lro_hash.tcp_flag,
  2533. lro_hash.tcp_flag_mask);
  2534. dp_info("toeplitz_hash_ipv4:");
  2535. qdf_trace_hex_dump(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2536. (void *)lro_hash.toeplitz_hash_ipv4,
  2537. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2538. LRO_IPV4_SEED_ARR_SZ));
  2539. dp_info("toeplitz_hash_ipv6:");
  2540. qdf_trace_hex_dump(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2541. (void *)lro_hash.toeplitz_hash_ipv6,
  2542. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2543. LRO_IPV6_SEED_ARR_SZ));
  2544. return status;
  2545. }
  2546. /*
  2547. * dp_rxdma_ring_setup() - configure the RX DMA rings
  2548. * @soc: data path SoC handle
  2549. * @pdev: Physical device handle
  2550. *
  2551. * Return: 0 - success, > 0 - failure
  2552. */
  2553. #ifdef QCA_HOST2FW_RXBUF_RING
  2554. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2555. struct dp_pdev *pdev)
  2556. {
  2557. struct wlan_cfg_dp_pdev_ctxt *pdev_cfg_ctx;
  2558. int max_mac_rings;
  2559. int i;
  2560. pdev_cfg_ctx = pdev->wlan_cfg_ctx;
  2561. max_mac_rings = wlan_cfg_get_num_mac_rings(pdev_cfg_ctx);
  2562. for (i = 0; i < max_mac_rings; i++) {
  2563. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2564. "%s: pdev_id %d mac_id %d",
  2565. __func__, pdev->pdev_id, i);
  2566. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  2567. RXDMA_BUF, 1, i,
  2568. wlan_cfg_get_rx_dma_buf_ring_size(pdev_cfg_ctx))) {
  2569. QDF_TRACE(QDF_MODULE_ID_DP,
  2570. QDF_TRACE_LEVEL_ERROR,
  2571. FL("failed rx mac ring setup"));
  2572. return QDF_STATUS_E_FAILURE;
  2573. }
  2574. }
  2575. return QDF_STATUS_SUCCESS;
  2576. }
  2577. #else
  2578. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2579. struct dp_pdev *pdev)
  2580. {
  2581. return QDF_STATUS_SUCCESS;
  2582. }
  2583. #endif
  2584. /**
  2585. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  2586. * @pdev - DP_PDEV handle
  2587. *
  2588. * Return: void
  2589. */
  2590. static inline void
  2591. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  2592. {
  2593. uint8_t map_id;
  2594. struct dp_soc *soc = pdev->soc;
  2595. if (!soc)
  2596. return;
  2597. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  2598. qdf_mem_copy(pdev->dscp_tid_map[map_id],
  2599. default_dscp_tid_map,
  2600. sizeof(default_dscp_tid_map));
  2601. }
  2602. for (map_id = 0; map_id < soc->num_hw_dscp_tid_map; map_id++) {
  2603. hal_tx_set_dscp_tid_map(soc->hal_soc,
  2604. default_dscp_tid_map,
  2605. map_id);
  2606. }
  2607. }
  2608. #ifdef IPA_OFFLOAD
  2609. /**
  2610. * dp_setup_ipa_rx_refill_buf_ring - Setup second Rx refill buffer ring
  2611. * @soc: data path instance
  2612. * @pdev: core txrx pdev context
  2613. *
  2614. * Return: QDF_STATUS_SUCCESS: success
  2615. * QDF_STATUS_E_RESOURCES: Error return
  2616. */
  2617. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2618. struct dp_pdev *pdev)
  2619. {
  2620. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2621. int entries;
  2622. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2623. entries = wlan_cfg_get_dp_soc_rxdma_refill_ring_size(soc_cfg_ctx);
  2624. /* Setup second Rx refill buffer ring */
  2625. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2626. IPA_RX_REFILL_BUF_RING_IDX,
  2627. pdev->pdev_id,
  2628. entries)) {
  2629. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2630. FL("dp_srng_setup failed second rx refill ring"));
  2631. return QDF_STATUS_E_FAILURE;
  2632. }
  2633. return QDF_STATUS_SUCCESS;
  2634. }
  2635. /**
  2636. * dp_cleanup_ipa_rx_refill_buf_ring - Cleanup second Rx refill buffer ring
  2637. * @soc: data path instance
  2638. * @pdev: core txrx pdev context
  2639. *
  2640. * Return: void
  2641. */
  2642. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2643. struct dp_pdev *pdev)
  2644. {
  2645. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2646. IPA_RX_REFILL_BUF_RING_IDX);
  2647. }
  2648. #else
  2649. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2650. struct dp_pdev *pdev)
  2651. {
  2652. return QDF_STATUS_SUCCESS;
  2653. }
  2654. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2655. struct dp_pdev *pdev)
  2656. {
  2657. }
  2658. #endif
  2659. #if !defined(DISABLE_MON_CONFIG)
  2660. /**
  2661. * dp_mon_rings_setup() - Initialize Monitor rings based on target
  2662. * @soc: soc handle
  2663. * @pdev: physical device handle
  2664. *
  2665. * Return: nonzero on failure and zero on success
  2666. */
  2667. static
  2668. QDF_STATUS dp_mon_rings_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2669. {
  2670. int mac_id = 0;
  2671. int pdev_id = pdev->pdev_id;
  2672. int entries;
  2673. struct wlan_cfg_dp_pdev_ctxt *pdev_cfg_ctx;
  2674. pdev_cfg_ctx = pdev->wlan_cfg_ctx;
  2675. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2676. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  2677. if (soc->wlan_cfg_ctx->rxdma1_enable) {
  2678. entries =
  2679. wlan_cfg_get_dma_mon_buf_ring_size(pdev_cfg_ctx);
  2680. if (dp_srng_setup(soc,
  2681. &pdev->rxdma_mon_buf_ring[mac_id],
  2682. RXDMA_MONITOR_BUF, 0, mac_for_pdev,
  2683. entries)) {
  2684. QDF_TRACE(QDF_MODULE_ID_DP,
  2685. QDF_TRACE_LEVEL_ERROR,
  2686. FL(RNG_ERR "rxdma_mon_buf_ring "));
  2687. return QDF_STATUS_E_NOMEM;
  2688. }
  2689. entries =
  2690. wlan_cfg_get_dma_mon_dest_ring_size(pdev_cfg_ctx);
  2691. if (dp_srng_setup(soc,
  2692. &pdev->rxdma_mon_dst_ring[mac_id],
  2693. RXDMA_MONITOR_DST, 0, mac_for_pdev,
  2694. entries)) {
  2695. QDF_TRACE(QDF_MODULE_ID_DP,
  2696. QDF_TRACE_LEVEL_ERROR,
  2697. FL(RNG_ERR "rxdma_mon_dst_ring"));
  2698. return QDF_STATUS_E_NOMEM;
  2699. }
  2700. entries =
  2701. wlan_cfg_get_dma_mon_stat_ring_size(pdev_cfg_ctx);
  2702. if (dp_srng_setup(soc,
  2703. &pdev->rxdma_mon_status_ring[mac_id],
  2704. RXDMA_MONITOR_STATUS, 0, mac_for_pdev,
  2705. entries)) {
  2706. QDF_TRACE(QDF_MODULE_ID_DP,
  2707. QDF_TRACE_LEVEL_ERROR,
  2708. FL(RNG_ERR "rxdma_mon_status_ring"));
  2709. return QDF_STATUS_E_NOMEM;
  2710. }
  2711. entries =
  2712. wlan_cfg_get_dma_mon_desc_ring_size(pdev_cfg_ctx);
  2713. if (dp_srng_setup(soc,
  2714. &pdev->rxdma_mon_desc_ring[mac_id],
  2715. RXDMA_MONITOR_DESC, 0, mac_for_pdev,
  2716. entries)) {
  2717. QDF_TRACE(QDF_MODULE_ID_DP,
  2718. QDF_TRACE_LEVEL_ERROR,
  2719. FL(RNG_ERR "rxdma_mon_desc_ring"));
  2720. return QDF_STATUS_E_NOMEM;
  2721. }
  2722. } else {
  2723. entries =
  2724. wlan_cfg_get_dma_mon_stat_ring_size(pdev_cfg_ctx);
  2725. if (dp_srng_setup(soc,
  2726. &pdev->rxdma_mon_status_ring[mac_id],
  2727. RXDMA_MONITOR_STATUS, 0, mac_for_pdev,
  2728. entries)) {
  2729. QDF_TRACE(QDF_MODULE_ID_DP,
  2730. QDF_TRACE_LEVEL_ERROR,
  2731. FL(RNG_ERR "rxdma_mon_status_ring"));
  2732. return QDF_STATUS_E_NOMEM;
  2733. }
  2734. }
  2735. }
  2736. return QDF_STATUS_SUCCESS;
  2737. }
  2738. #else
  2739. static
  2740. QDF_STATUS dp_mon_rings_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2741. {
  2742. return QDF_STATUS_SUCCESS;
  2743. }
  2744. #endif
  2745. /*dp_iterate_update_peer_list - update peer stats on cal client timer
  2746. * @pdev_hdl: pdev handle
  2747. */
  2748. #ifdef ATH_SUPPORT_EXT_STAT
  2749. void dp_iterate_update_peer_list(void *pdev_hdl)
  2750. {
  2751. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  2752. struct dp_soc *soc = pdev->soc;
  2753. struct dp_vdev *vdev = NULL;
  2754. struct dp_peer *peer = NULL;
  2755. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2756. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  2757. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  2758. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  2759. dp_cal_client_update_peer_stats(&peer->stats);
  2760. }
  2761. }
  2762. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  2763. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2764. }
  2765. #else
  2766. void dp_iterate_update_peer_list(void *pdev_hdl)
  2767. {
  2768. }
  2769. #endif
  2770. /*
  2771. * dp_pdev_attach_wifi3() - attach txrx pdev
  2772. * @ctrl_pdev: Opaque PDEV object
  2773. * @txrx_soc: Datapath SOC handle
  2774. * @htc_handle: HTC handle for host-target interface
  2775. * @qdf_osdev: QDF OS device
  2776. * @pdev_id: PDEV ID
  2777. *
  2778. * Return: DP PDEV handle on success, NULL on failure
  2779. */
  2780. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  2781. struct cdp_ctrl_objmgr_pdev *ctrl_pdev,
  2782. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  2783. {
  2784. int tx_ring_size;
  2785. int tx_comp_ring_size;
  2786. int reo_dst_ring_size;
  2787. int entries;
  2788. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2789. int nss_cfg;
  2790. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2791. struct dp_pdev *pdev = NULL;
  2792. if (soc->dp_soc_reinit)
  2793. pdev = soc->pdev_list[pdev_id];
  2794. else
  2795. pdev = qdf_mem_malloc(sizeof(*pdev));
  2796. if (!pdev) {
  2797. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2798. FL("DP PDEV memory allocation failed"));
  2799. goto fail0;
  2800. }
  2801. /*
  2802. * Variable to prevent double pdev deinitialization during
  2803. * radio detach execution .i.e. in the absence of any vdev.
  2804. */
  2805. pdev->pdev_deinit = 0;
  2806. pdev->invalid_peer = qdf_mem_malloc(sizeof(struct dp_peer));
  2807. if (!pdev->invalid_peer) {
  2808. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2809. FL("Invalid peer memory allocation failed"));
  2810. qdf_mem_free(pdev);
  2811. goto fail0;
  2812. }
  2813. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2814. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach(soc->ctrl_psoc);
  2815. if (!pdev->wlan_cfg_ctx) {
  2816. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2817. FL("pdev cfg_attach failed"));
  2818. qdf_mem_free(pdev->invalid_peer);
  2819. qdf_mem_free(pdev);
  2820. goto fail0;
  2821. }
  2822. /*
  2823. * set nss pdev config based on soc config
  2824. */
  2825. nss_cfg = wlan_cfg_get_dp_soc_nss_cfg(soc_cfg_ctx);
  2826. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  2827. (nss_cfg & (1 << pdev_id)));
  2828. pdev->soc = soc;
  2829. pdev->ctrl_pdev = ctrl_pdev;
  2830. pdev->pdev_id = pdev_id;
  2831. soc->pdev_list[pdev_id] = pdev;
  2832. pdev->lmac_id = wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, pdev_id);
  2833. soc->pdev_count++;
  2834. TAILQ_INIT(&pdev->vdev_list);
  2835. qdf_spinlock_create(&pdev->vdev_list_lock);
  2836. pdev->vdev_count = 0;
  2837. qdf_spinlock_create(&pdev->tx_mutex);
  2838. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  2839. TAILQ_INIT(&pdev->neighbour_peers_list);
  2840. pdev->neighbour_peers_added = false;
  2841. pdev->monitor_configured = false;
  2842. if (dp_soc_cmn_setup(soc)) {
  2843. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2844. FL("dp_soc_cmn_setup failed"));
  2845. goto fail1;
  2846. }
  2847. /* Setup per PDEV TCL rings if configured */
  2848. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2849. tx_ring_size =
  2850. wlan_cfg_tx_ring_size(soc_cfg_ctx);
  2851. tx_comp_ring_size =
  2852. wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
  2853. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  2854. pdev_id, pdev_id, tx_ring_size)) {
  2855. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2856. FL("dp_srng_setup failed for tcl_data_ring"));
  2857. goto fail1;
  2858. }
  2859. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  2860. WBM2SW_RELEASE, pdev_id, pdev_id, tx_comp_ring_size)) {
  2861. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2862. FL("dp_srng_setup failed for tx_comp_ring"));
  2863. goto fail1;
  2864. }
  2865. soc->num_tcl_data_rings++;
  2866. }
  2867. /* Tx specific init */
  2868. if (dp_tx_pdev_attach(pdev)) {
  2869. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2870. FL("dp_tx_pdev_attach failed"));
  2871. goto fail1;
  2872. }
  2873. reo_dst_ring_size = wlan_cfg_get_reo_dst_ring_size(soc->wlan_cfg_ctx);
  2874. /* Setup per PDEV REO rings if configured */
  2875. if (wlan_cfg_per_pdev_rx_ring(soc_cfg_ctx)) {
  2876. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  2877. pdev_id, pdev_id, reo_dst_ring_size)) {
  2878. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2879. FL("dp_srng_setup failed for reo_dest_ringn"));
  2880. goto fail1;
  2881. }
  2882. soc->num_reo_dest_rings++;
  2883. }
  2884. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  2885. wlan_cfg_get_dp_soc_rxdma_refill_ring_size(soc_cfg_ctx))) {
  2886. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2887. FL("dp_srng_setup failed rx refill ring"));
  2888. goto fail1;
  2889. }
  2890. if (dp_rxdma_ring_setup(soc, pdev)) {
  2891. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2892. FL("RXDMA ring config failed"));
  2893. goto fail1;
  2894. }
  2895. if (dp_mon_rings_setup(soc, pdev)) {
  2896. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2897. FL("MONITOR rings setup failed"));
  2898. goto fail1;
  2899. }
  2900. entries = wlan_cfg_get_dp_soc_rxdma_err_dst_ring_size(soc_cfg_ctx);
  2901. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2902. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST,
  2903. 0, pdev_id,
  2904. entries)) {
  2905. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2906. FL(RNG_ERR "rxdma_err_dst_ring"));
  2907. goto fail1;
  2908. }
  2909. }
  2910. if (dp_setup_ipa_rx_refill_buf_ring(soc, pdev))
  2911. goto fail1;
  2912. if (dp_ipa_ring_resource_setup(soc, pdev))
  2913. goto fail1;
  2914. if (dp_ipa_uc_attach(soc, pdev) != QDF_STATUS_SUCCESS) {
  2915. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2916. FL("dp_ipa_uc_attach failed"));
  2917. goto fail1;
  2918. }
  2919. /* Rx specific init */
  2920. if (dp_rx_pdev_attach(pdev)) {
  2921. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2922. FL("dp_rx_pdev_attach failed"));
  2923. goto fail1;
  2924. }
  2925. DP_STATS_INIT(pdev);
  2926. /* Monitor filter init */
  2927. pdev->mon_filter_mode = MON_FILTER_ALL;
  2928. pdev->fp_mgmt_filter = FILTER_MGMT_ALL;
  2929. pdev->fp_ctrl_filter = FILTER_CTRL_ALL;
  2930. pdev->fp_data_filter = FILTER_DATA_ALL;
  2931. pdev->mo_mgmt_filter = FILTER_MGMT_ALL;
  2932. pdev->mo_ctrl_filter = FILTER_CTRL_ALL;
  2933. pdev->mo_data_filter = FILTER_DATA_ALL;
  2934. dp_local_peer_id_pool_init(pdev);
  2935. dp_dscp_tid_map_setup(pdev);
  2936. /* Rx monitor mode specific init */
  2937. if (dp_rx_pdev_mon_attach(pdev)) {
  2938. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2939. "dp_rx_pdev_mon_attach failed");
  2940. goto fail1;
  2941. }
  2942. if (dp_wdi_event_attach(pdev)) {
  2943. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2944. "dp_wdi_evet_attach failed");
  2945. goto fail1;
  2946. }
  2947. /* set the reo destination during initialization */
  2948. pdev->reo_dest = pdev->pdev_id + 1;
  2949. /*
  2950. * initialize ppdu tlv list
  2951. */
  2952. TAILQ_INIT(&pdev->ppdu_info_list);
  2953. pdev->tlv_count = 0;
  2954. pdev->list_depth = 0;
  2955. qdf_mem_zero(&pdev->sojourn_stats, sizeof(struct cdp_tx_sojourn_stats));
  2956. pdev->sojourn_buf = qdf_nbuf_alloc(pdev->soc->osdev,
  2957. sizeof(struct cdp_tx_sojourn_stats), 0, 4,
  2958. TRUE);
  2959. /* initlialize cal client timer */
  2960. dp_cal_client_attach(&pdev->cal_client_ctx, pdev, pdev->soc->osdev,
  2961. &dp_iterate_update_peer_list);
  2962. qdf_event_create(&pdev->fw_peer_stats_event);
  2963. return (struct cdp_pdev *)pdev;
  2964. fail1:
  2965. dp_pdev_detach((struct cdp_pdev *)pdev, 0);
  2966. fail0:
  2967. return NULL;
  2968. }
  2969. /*
  2970. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  2971. * @soc: data path SoC handle
  2972. * @pdev: Physical device handle
  2973. *
  2974. * Return: void
  2975. */
  2976. #ifdef QCA_HOST2FW_RXBUF_RING
  2977. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2978. struct dp_pdev *pdev)
  2979. {
  2980. int max_mac_rings =
  2981. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  2982. int i;
  2983. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  2984. max_mac_rings : MAX_RX_MAC_RINGS;
  2985. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2986. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  2987. RXDMA_BUF, 1);
  2988. qdf_timer_free(&soc->mon_reap_timer);
  2989. }
  2990. #else
  2991. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2992. struct dp_pdev *pdev)
  2993. {
  2994. }
  2995. #endif
  2996. /*
  2997. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  2998. * @pdev: device object
  2999. *
  3000. * Return: void
  3001. */
  3002. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  3003. {
  3004. struct dp_neighbour_peer *peer = NULL;
  3005. struct dp_neighbour_peer *temp_peer = NULL;
  3006. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  3007. neighbour_peer_list_elem, temp_peer) {
  3008. /* delete this peer from the list */
  3009. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  3010. peer, neighbour_peer_list_elem);
  3011. qdf_mem_free(peer);
  3012. }
  3013. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  3014. }
  3015. /**
  3016. * dp_htt_ppdu_stats_detach() - detach stats resources
  3017. * @pdev: Datapath PDEV handle
  3018. *
  3019. * Return: void
  3020. */
  3021. static void dp_htt_ppdu_stats_detach(struct dp_pdev *pdev)
  3022. {
  3023. struct ppdu_info *ppdu_info, *ppdu_info_next;
  3024. TAILQ_FOREACH_SAFE(ppdu_info, &pdev->ppdu_info_list,
  3025. ppdu_info_list_elem, ppdu_info_next) {
  3026. if (!ppdu_info)
  3027. break;
  3028. qdf_assert_always(ppdu_info->nbuf);
  3029. qdf_nbuf_free(ppdu_info->nbuf);
  3030. qdf_mem_free(ppdu_info);
  3031. }
  3032. }
  3033. #if !defined(DISABLE_MON_CONFIG)
  3034. static
  3035. void dp_mon_ring_cleanup(struct dp_soc *soc, struct dp_pdev *pdev,
  3036. int mac_id)
  3037. {
  3038. if (soc->wlan_cfg_ctx->rxdma1_enable) {
  3039. dp_srng_cleanup(soc,
  3040. &pdev->rxdma_mon_buf_ring[mac_id],
  3041. RXDMA_MONITOR_BUF, 0);
  3042. dp_srng_cleanup(soc,
  3043. &pdev->rxdma_mon_dst_ring[mac_id],
  3044. RXDMA_MONITOR_DST, 0);
  3045. dp_srng_cleanup(soc,
  3046. &pdev->rxdma_mon_status_ring[mac_id],
  3047. RXDMA_MONITOR_STATUS, 0);
  3048. dp_srng_cleanup(soc,
  3049. &pdev->rxdma_mon_desc_ring[mac_id],
  3050. RXDMA_MONITOR_DESC, 0);
  3051. dp_srng_cleanup(soc,
  3052. &pdev->rxdma_err_dst_ring[mac_id],
  3053. RXDMA_DST, 0);
  3054. } else {
  3055. dp_srng_cleanup(soc,
  3056. &pdev->rxdma_mon_status_ring[mac_id],
  3057. RXDMA_MONITOR_STATUS, 0);
  3058. dp_srng_cleanup(soc,
  3059. &pdev->rxdma_err_dst_ring[mac_id],
  3060. RXDMA_DST, 0);
  3061. }
  3062. }
  3063. #else
  3064. static void dp_mon_ring_cleanup(struct dp_soc *soc, struct dp_pdev *pdev,
  3065. int mac_id)
  3066. {
  3067. }
  3068. #endif
  3069. /**
  3070. * dp_mon_ring_deinit() - Placeholder to deinitialize Monitor rings
  3071. *
  3072. * @soc: soc handle
  3073. * @pdev: datapath physical dev handle
  3074. * @mac_id: mac number
  3075. *
  3076. * Return: None
  3077. */
  3078. static void dp_mon_ring_deinit(struct dp_soc *soc, struct dp_pdev *pdev,
  3079. int mac_id)
  3080. {
  3081. }
  3082. /**
  3083. * dp_pdev_mem_reset() - Reset txrx pdev memory
  3084. * @pdev: dp pdev handle
  3085. *
  3086. * Return: None
  3087. */
  3088. static void dp_pdev_mem_reset(struct dp_pdev *pdev)
  3089. {
  3090. uint16_t len = 0;
  3091. uint8_t *dp_pdev_offset = (uint8_t *)pdev;
  3092. len = sizeof(struct dp_pdev) -
  3093. offsetof(struct dp_pdev, pdev_deinit) -
  3094. sizeof(pdev->pdev_deinit);
  3095. dp_pdev_offset = dp_pdev_offset +
  3096. offsetof(struct dp_pdev, pdev_deinit) +
  3097. sizeof(pdev->pdev_deinit);
  3098. qdf_mem_zero(dp_pdev_offset, len);
  3099. }
  3100. /**
  3101. * dp_pdev_deinit() - Deinit txrx pdev
  3102. * @txrx_pdev: Datapath PDEV handle
  3103. * @force: Force deinit
  3104. *
  3105. * Return: None
  3106. */
  3107. static void dp_pdev_deinit(struct cdp_pdev *txrx_pdev, int force)
  3108. {
  3109. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3110. struct dp_soc *soc = pdev->soc;
  3111. qdf_nbuf_t curr_nbuf, next_nbuf;
  3112. int mac_id;
  3113. /*
  3114. * Prevent double pdev deinitialization during radio detach
  3115. * execution .i.e. in the absence of any vdev
  3116. */
  3117. if (pdev->pdev_deinit)
  3118. return;
  3119. pdev->pdev_deinit = 1;
  3120. dp_wdi_event_detach(pdev);
  3121. dp_tx_pdev_detach(pdev);
  3122. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  3123. dp_srng_deinit(soc, &soc->tcl_data_ring[pdev->pdev_id],
  3124. TCL_DATA, pdev->pdev_id);
  3125. dp_srng_deinit(soc, &soc->tx_comp_ring[pdev->pdev_id],
  3126. WBM2SW_RELEASE, pdev->pdev_id);
  3127. }
  3128. dp_pktlogmod_exit(pdev);
  3129. dp_rx_pdev_detach(pdev);
  3130. dp_rx_pdev_mon_detach(pdev);
  3131. dp_neighbour_peers_detach(pdev);
  3132. qdf_spinlock_destroy(&pdev->tx_mutex);
  3133. qdf_spinlock_destroy(&pdev->vdev_list_lock);
  3134. dp_ipa_uc_detach(soc, pdev);
  3135. dp_cleanup_ipa_rx_refill_buf_ring(soc, pdev);
  3136. /* Cleanup per PDEV REO rings if configured */
  3137. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  3138. dp_srng_deinit(soc, &soc->reo_dest_ring[pdev->pdev_id],
  3139. REO_DST, pdev->pdev_id);
  3140. }
  3141. dp_srng_deinit(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  3142. dp_rxdma_ring_cleanup(soc, pdev);
  3143. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3144. dp_mon_ring_deinit(soc, pdev, mac_id);
  3145. dp_srng_deinit(soc, &pdev->rxdma_err_dst_ring[mac_id],
  3146. RXDMA_DST, 0);
  3147. }
  3148. curr_nbuf = pdev->invalid_peer_head_msdu;
  3149. while (curr_nbuf) {
  3150. next_nbuf = qdf_nbuf_next(curr_nbuf);
  3151. qdf_nbuf_free(curr_nbuf);
  3152. curr_nbuf = next_nbuf;
  3153. }
  3154. pdev->invalid_peer_head_msdu = NULL;
  3155. pdev->invalid_peer_tail_msdu = NULL;
  3156. dp_htt_ppdu_stats_detach(pdev);
  3157. qdf_nbuf_free(pdev->sojourn_buf);
  3158. dp_cal_client_detach(&pdev->cal_client_ctx);
  3159. soc->pdev_count--;
  3160. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  3161. qdf_mem_free(pdev->invalid_peer);
  3162. qdf_mem_free(pdev->dp_txrx_handle);
  3163. dp_pdev_mem_reset(pdev);
  3164. }
  3165. /**
  3166. * dp_pdev_deinit_wifi3() - Deinit txrx pdev
  3167. * @txrx_pdev: Datapath PDEV handle
  3168. * @force: Force deinit
  3169. *
  3170. * Return: None
  3171. */
  3172. static void dp_pdev_deinit_wifi3(struct cdp_pdev *txrx_pdev, int force)
  3173. {
  3174. dp_pdev_deinit(txrx_pdev, force);
  3175. }
  3176. /*
  3177. * dp_pdev_detach() - Complete rest of pdev detach
  3178. * @txrx_pdev: Datapath PDEV handle
  3179. * @force: Force deinit
  3180. *
  3181. * Return: None
  3182. */
  3183. static void dp_pdev_detach(struct cdp_pdev *txrx_pdev, int force)
  3184. {
  3185. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3186. struct dp_soc *soc = pdev->soc;
  3187. int mac_id;
  3188. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  3189. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  3190. TCL_DATA, pdev->pdev_id);
  3191. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  3192. WBM2SW_RELEASE, pdev->pdev_id);
  3193. }
  3194. dp_mon_link_free(pdev);
  3195. /* Cleanup per PDEV REO rings if configured */
  3196. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  3197. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  3198. REO_DST, pdev->pdev_id);
  3199. }
  3200. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  3201. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3202. dp_mon_ring_cleanup(soc, pdev, mac_id);
  3203. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[mac_id],
  3204. RXDMA_DST, 0);
  3205. }
  3206. soc->pdev_list[pdev->pdev_id] = NULL;
  3207. qdf_mem_free(pdev);
  3208. }
  3209. /*
  3210. * dp_pdev_detach_wifi3() - detach txrx pdev
  3211. * @txrx_pdev: Datapath PDEV handle
  3212. * @force: Force detach
  3213. *
  3214. * Return: None
  3215. */
  3216. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  3217. {
  3218. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3219. struct dp_soc *soc = pdev->soc;
  3220. if (soc->dp_soc_reinit) {
  3221. dp_pdev_detach(txrx_pdev, force);
  3222. } else {
  3223. dp_pdev_deinit(txrx_pdev, force);
  3224. dp_pdev_detach(txrx_pdev, force);
  3225. }
  3226. }
  3227. /*
  3228. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  3229. * @soc: DP SOC handle
  3230. */
  3231. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  3232. {
  3233. struct reo_desc_list_node *desc;
  3234. struct dp_rx_tid *rx_tid;
  3235. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  3236. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  3237. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  3238. rx_tid = &desc->rx_tid;
  3239. qdf_mem_unmap_nbytes_single(soc->osdev,
  3240. rx_tid->hw_qdesc_paddr,
  3241. QDF_DMA_BIDIRECTIONAL,
  3242. rx_tid->hw_qdesc_alloc_size);
  3243. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  3244. qdf_mem_free(desc);
  3245. }
  3246. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  3247. qdf_list_destroy(&soc->reo_desc_freelist);
  3248. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  3249. }
  3250. /**
  3251. * dp_soc_mem_reset() - Reset Dp Soc memory
  3252. * @soc: DP handle
  3253. *
  3254. * Return: None
  3255. */
  3256. static void dp_soc_mem_reset(struct dp_soc *soc)
  3257. {
  3258. uint16_t len = 0;
  3259. uint8_t *dp_soc_offset = (uint8_t *)soc;
  3260. len = sizeof(struct dp_soc) -
  3261. offsetof(struct dp_soc, dp_soc_reinit) -
  3262. sizeof(soc->dp_soc_reinit);
  3263. dp_soc_offset = dp_soc_offset +
  3264. offsetof(struct dp_soc, dp_soc_reinit) +
  3265. sizeof(soc->dp_soc_reinit);
  3266. qdf_mem_zero(dp_soc_offset, len);
  3267. }
  3268. /**
  3269. * dp_soc_deinit() - Deinitialize txrx SOC
  3270. * @txrx_soc: Opaque DP SOC handle
  3271. *
  3272. * Return: None
  3273. */
  3274. static void dp_soc_deinit(void *txrx_soc)
  3275. {
  3276. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3277. int i;
  3278. qdf_atomic_set(&soc->cmn_init_done, 0);
  3279. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3280. if (soc->pdev_list[i])
  3281. dp_pdev_deinit((struct cdp_pdev *)
  3282. soc->pdev_list[i], 1);
  3283. }
  3284. qdf_flush_work(&soc->htt_stats.work);
  3285. qdf_disable_work(&soc->htt_stats.work);
  3286. /* Free pending htt stats messages */
  3287. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  3288. dp_reo_cmdlist_destroy(soc);
  3289. dp_peer_find_detach(soc);
  3290. /* Free the ring memories */
  3291. /* Common rings */
  3292. dp_srng_deinit(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  3293. /* Tx data rings */
  3294. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  3295. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  3296. dp_srng_deinit(soc, &soc->tcl_data_ring[i],
  3297. TCL_DATA, i);
  3298. dp_srng_deinit(soc, &soc->tx_comp_ring[i],
  3299. WBM2SW_RELEASE, i);
  3300. }
  3301. }
  3302. /* TCL command and status rings */
  3303. dp_srng_deinit(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  3304. dp_srng_deinit(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  3305. /* Rx data rings */
  3306. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  3307. soc->num_reo_dest_rings =
  3308. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  3309. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  3310. /* TODO: Get number of rings and ring sizes
  3311. * from wlan_cfg
  3312. */
  3313. dp_srng_deinit(soc, &soc->reo_dest_ring[i],
  3314. REO_DST, i);
  3315. }
  3316. }
  3317. /* REO reinjection ring */
  3318. dp_srng_deinit(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  3319. /* Rx release ring */
  3320. dp_srng_deinit(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  3321. /* Rx exception ring */
  3322. /* TODO: Better to store ring_type and ring_num in
  3323. * dp_srng during setup
  3324. */
  3325. dp_srng_deinit(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  3326. /* REO command and status rings */
  3327. dp_srng_deinit(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  3328. dp_srng_deinit(soc, &soc->reo_status_ring, REO_STATUS, 0);
  3329. dp_soc_wds_detach(soc);
  3330. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  3331. qdf_spinlock_destroy(&soc->htt_stats.lock);
  3332. htt_soc_htc_dealloc(soc->htt_handle);
  3333. qdf_spinlock_destroy(&soc->rx.defrag.defrag_lock);
  3334. dp_reo_cmdlist_destroy(soc);
  3335. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  3336. dp_reo_desc_freelist_destroy(soc);
  3337. qdf_spinlock_destroy(&soc->ast_lock);
  3338. dp_soc_mem_reset(soc);
  3339. }
  3340. /**
  3341. * dp_soc_deinit_wifi3() - Deinitialize txrx SOC
  3342. * @txrx_soc: Opaque DP SOC handle
  3343. *
  3344. * Return: None
  3345. */
  3346. static void dp_soc_deinit_wifi3(void *txrx_soc)
  3347. {
  3348. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3349. soc->dp_soc_reinit = 1;
  3350. dp_soc_deinit(txrx_soc);
  3351. }
  3352. /*
  3353. * dp_soc_detach() - Detach rest of txrx SOC
  3354. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  3355. *
  3356. * Return: None
  3357. */
  3358. static void dp_soc_detach(void *txrx_soc)
  3359. {
  3360. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3361. int i;
  3362. qdf_atomic_set(&soc->cmn_init_done, 0);
  3363. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  3364. * SW descriptors
  3365. */
  3366. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3367. if (soc->pdev_list[i])
  3368. dp_pdev_detach((struct cdp_pdev *)
  3369. soc->pdev_list[i], 1);
  3370. }
  3371. /* Free the ring memories */
  3372. /* Common rings */
  3373. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  3374. dp_tx_soc_detach(soc);
  3375. /* Tx data rings */
  3376. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  3377. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  3378. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  3379. TCL_DATA, i);
  3380. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  3381. WBM2SW_RELEASE, i);
  3382. }
  3383. }
  3384. /* TCL command and status rings */
  3385. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  3386. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  3387. /* Rx data rings */
  3388. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  3389. soc->num_reo_dest_rings =
  3390. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  3391. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  3392. /* TODO: Get number of rings and ring sizes
  3393. * from wlan_cfg
  3394. */
  3395. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  3396. REO_DST, i);
  3397. }
  3398. }
  3399. /* REO reinjection ring */
  3400. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  3401. /* Rx release ring */
  3402. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  3403. /* Rx exception ring */
  3404. /* TODO: Better to store ring_type and ring_num in
  3405. * dp_srng during setup
  3406. */
  3407. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  3408. /* REO command and status rings */
  3409. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  3410. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  3411. dp_hw_link_desc_pool_cleanup(soc);
  3412. htt_soc_detach(soc->htt_handle);
  3413. soc->dp_soc_reinit = 0;
  3414. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  3415. qdf_mem_free(soc);
  3416. }
  3417. /*
  3418. * dp_soc_detach_wifi3() - Detach txrx SOC
  3419. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  3420. *
  3421. * Return: None
  3422. */
  3423. static void dp_soc_detach_wifi3(void *txrx_soc)
  3424. {
  3425. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3426. if (soc->dp_soc_reinit) {
  3427. dp_soc_detach(txrx_soc);
  3428. } else {
  3429. dp_soc_deinit(txrx_soc);
  3430. dp_soc_detach(txrx_soc);
  3431. }
  3432. }
  3433. #if !defined(DISABLE_MON_CONFIG)
  3434. /**
  3435. * dp_mon_htt_srng_setup() - Prepare HTT messages for Monitor rings
  3436. * @soc: soc handle
  3437. * @pdev: physical device handle
  3438. * @mac_id: ring number
  3439. * @mac_for_pdev: mac_id
  3440. *
  3441. * Return: non-zero for failure, zero for success
  3442. */
  3443. static QDF_STATUS dp_mon_htt_srng_setup(struct dp_soc *soc,
  3444. struct dp_pdev *pdev,
  3445. int mac_id,
  3446. int mac_for_pdev)
  3447. {
  3448. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3449. if (soc->wlan_cfg_ctx->rxdma1_enable) {
  3450. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3451. pdev->rxdma_mon_buf_ring[mac_id]
  3452. .hal_srng,
  3453. RXDMA_MONITOR_BUF);
  3454. if (status != QDF_STATUS_SUCCESS) {
  3455. dp_err("Failed to send htt srng setup message for Rxdma mon buf ring");
  3456. return status;
  3457. }
  3458. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3459. pdev->rxdma_mon_dst_ring[mac_id]
  3460. .hal_srng,
  3461. RXDMA_MONITOR_DST);
  3462. if (status != QDF_STATUS_SUCCESS) {
  3463. dp_err("Failed to send htt srng setup message for Rxdma mon dst ring");
  3464. return status;
  3465. }
  3466. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3467. pdev->rxdma_mon_status_ring[mac_id]
  3468. .hal_srng,
  3469. RXDMA_MONITOR_STATUS);
  3470. if (status != QDF_STATUS_SUCCESS) {
  3471. dp_err("Failed to send htt srng setup message for Rxdma mon status ring");
  3472. return status;
  3473. }
  3474. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3475. pdev->rxdma_mon_desc_ring[mac_id]
  3476. .hal_srng,
  3477. RXDMA_MONITOR_DESC);
  3478. if (status != QDF_STATUS_SUCCESS) {
  3479. dp_err("Failed to send htt srng message for Rxdma mon desc ring");
  3480. return status;
  3481. }
  3482. } else {
  3483. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3484. pdev->rxdma_mon_status_ring[mac_id]
  3485. .hal_srng,
  3486. RXDMA_MONITOR_STATUS);
  3487. if (status != QDF_STATUS_SUCCESS) {
  3488. dp_err("Failed to send htt srng setup message for Rxdma mon status ring");
  3489. return status;
  3490. }
  3491. }
  3492. return status;
  3493. }
  3494. #else
  3495. static QDF_STATUS dp_mon_htt_srng_setup(struct dp_soc *soc,
  3496. struct dp_pdev *pdev,
  3497. int mac_id,
  3498. int mac_for_pdev)
  3499. {
  3500. return QDF_STATUS_SUCCESS;
  3501. }
  3502. #endif
  3503. /*
  3504. * dp_rxdma_ring_config() - configure the RX DMA rings
  3505. *
  3506. * This function is used to configure the MAC rings.
  3507. * On MCL host provides buffers in Host2FW ring
  3508. * FW refills (copies) buffers to the ring and updates
  3509. * ring_idx in register
  3510. *
  3511. * @soc: data path SoC handle
  3512. *
  3513. * Return: zero on success, non-zero on failure
  3514. */
  3515. #ifdef QCA_HOST2FW_RXBUF_RING
  3516. static QDF_STATUS dp_rxdma_ring_config(struct dp_soc *soc)
  3517. {
  3518. int i;
  3519. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3520. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3521. struct dp_pdev *pdev = soc->pdev_list[i];
  3522. if (pdev) {
  3523. int mac_id;
  3524. bool dbs_enable = 0;
  3525. int max_mac_rings =
  3526. wlan_cfg_get_num_mac_rings
  3527. (pdev->wlan_cfg_ctx);
  3528. htt_srng_setup(soc->htt_handle, 0,
  3529. pdev->rx_refill_buf_ring.hal_srng,
  3530. RXDMA_BUF);
  3531. if (pdev->rx_refill_buf_ring2.hal_srng)
  3532. htt_srng_setup(soc->htt_handle, 0,
  3533. pdev->rx_refill_buf_ring2.hal_srng,
  3534. RXDMA_BUF);
  3535. if (soc->cdp_soc.ol_ops->
  3536. is_hw_dbs_2x2_capable) {
  3537. dbs_enable = soc->cdp_soc.ol_ops->
  3538. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  3539. }
  3540. if (dbs_enable) {
  3541. QDF_TRACE(QDF_MODULE_ID_TXRX,
  3542. QDF_TRACE_LEVEL_ERROR,
  3543. FL("DBS enabled max_mac_rings %d"),
  3544. max_mac_rings);
  3545. } else {
  3546. max_mac_rings = 1;
  3547. QDF_TRACE(QDF_MODULE_ID_TXRX,
  3548. QDF_TRACE_LEVEL_ERROR,
  3549. FL("DBS disabled, max_mac_rings %d"),
  3550. max_mac_rings);
  3551. }
  3552. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3553. FL("pdev_id %d max_mac_rings %d"),
  3554. pdev->pdev_id, max_mac_rings);
  3555. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  3556. int mac_for_pdev = dp_get_mac_id_for_pdev(
  3557. mac_id, pdev->pdev_id);
  3558. QDF_TRACE(QDF_MODULE_ID_TXRX,
  3559. QDF_TRACE_LEVEL_ERROR,
  3560. FL("mac_id %d"), mac_for_pdev);
  3561. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3562. pdev->rx_mac_buf_ring[mac_id]
  3563. .hal_srng,
  3564. RXDMA_BUF);
  3565. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3566. pdev->rxdma_err_dst_ring[mac_id]
  3567. .hal_srng,
  3568. RXDMA_DST);
  3569. /* Configure monitor mode rings */
  3570. status = dp_mon_htt_srng_setup(soc, pdev,
  3571. mac_id,
  3572. mac_for_pdev);
  3573. if (status != QDF_STATUS_SUCCESS) {
  3574. dp_err("Failed to send htt monitor messages to target");
  3575. return status;
  3576. }
  3577. }
  3578. }
  3579. }
  3580. /*
  3581. * Timer to reap rxdma status rings.
  3582. * Needed until we enable ppdu end interrupts
  3583. */
  3584. qdf_timer_init(soc->osdev, &soc->mon_reap_timer,
  3585. dp_service_mon_rings, (void *)soc,
  3586. QDF_TIMER_TYPE_WAKE_APPS);
  3587. soc->reap_timer_init = 1;
  3588. return status;
  3589. }
  3590. #else
  3591. /* This is only for WIN */
  3592. static QDF_STATUS dp_rxdma_ring_config(struct dp_soc *soc)
  3593. {
  3594. int i;
  3595. int mac_id;
  3596. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3597. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3598. struct dp_pdev *pdev = soc->pdev_list[i];
  3599. if (pdev == NULL)
  3600. continue;
  3601. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3602. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, i);
  3603. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3604. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  3605. #ifndef DISABLE_MON_CONFIG
  3606. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3607. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3608. RXDMA_MONITOR_BUF);
  3609. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3610. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  3611. RXDMA_MONITOR_DST);
  3612. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3613. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3614. RXDMA_MONITOR_STATUS);
  3615. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3616. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  3617. RXDMA_MONITOR_DESC);
  3618. #endif
  3619. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3620. pdev->rxdma_err_dst_ring[mac_id].hal_srng,
  3621. RXDMA_DST);
  3622. }
  3623. }
  3624. return status;
  3625. }
  3626. #endif
  3627. /*
  3628. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  3629. * @cdp_soc: Opaque Datapath SOC handle
  3630. *
  3631. * Return: zero on success, non-zero on failure
  3632. */
  3633. static QDF_STATUS
  3634. dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  3635. {
  3636. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  3637. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3638. htt_soc_attach_target(soc->htt_handle);
  3639. status = dp_rxdma_ring_config(soc);
  3640. if (status != QDF_STATUS_SUCCESS) {
  3641. dp_err("Failed to send htt srng setup messages to target");
  3642. return status;
  3643. }
  3644. DP_STATS_INIT(soc);
  3645. /* initialize work queue for stats processing */
  3646. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  3647. return QDF_STATUS_SUCCESS;
  3648. }
  3649. /*
  3650. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  3651. * @txrx_soc: Datapath SOC handle
  3652. */
  3653. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  3654. {
  3655. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  3656. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  3657. }
  3658. /*
  3659. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  3660. * @txrx_soc: Datapath SOC handle
  3661. * @nss_cfg: nss config
  3662. */
  3663. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  3664. {
  3665. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  3666. struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx = dsoc->wlan_cfg_ctx;
  3667. wlan_cfg_set_dp_soc_nss_cfg(wlan_cfg_ctx, config);
  3668. /*
  3669. * TODO: masked out based on the per offloaded radio
  3670. */
  3671. switch (config) {
  3672. case dp_nss_cfg_default:
  3673. break;
  3674. case dp_nss_cfg_dbdc:
  3675. case dp_nss_cfg_dbtc:
  3676. wlan_cfg_set_num_tx_desc_pool(wlan_cfg_ctx, 0);
  3677. wlan_cfg_set_num_tx_ext_desc_pool(wlan_cfg_ctx, 0);
  3678. wlan_cfg_set_num_tx_desc(wlan_cfg_ctx, 0);
  3679. wlan_cfg_set_num_tx_ext_desc(wlan_cfg_ctx, 0);
  3680. break;
  3681. default:
  3682. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3683. "Invalid offload config %d", config);
  3684. }
  3685. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3686. FL("nss-wifi<0> nss config is enabled"));
  3687. }
  3688. /*
  3689. * dp_vdev_attach_wifi3() - attach txrx vdev
  3690. * @txrx_pdev: Datapath PDEV handle
  3691. * @vdev_mac_addr: MAC address of the virtual interface
  3692. * @vdev_id: VDEV Id
  3693. * @wlan_op_mode: VDEV operating mode
  3694. *
  3695. * Return: DP VDEV handle on success, NULL on failure
  3696. */
  3697. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  3698. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  3699. {
  3700. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3701. struct dp_soc *soc = pdev->soc;
  3702. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  3703. if (!vdev) {
  3704. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3705. FL("DP VDEV memory allocation failed"));
  3706. goto fail0;
  3707. }
  3708. vdev->pdev = pdev;
  3709. vdev->vdev_id = vdev_id;
  3710. vdev->opmode = op_mode;
  3711. vdev->osdev = soc->osdev;
  3712. vdev->osif_rx = NULL;
  3713. vdev->osif_rsim_rx_decap = NULL;
  3714. vdev->osif_get_key = NULL;
  3715. vdev->osif_rx_mon = NULL;
  3716. vdev->osif_tx_free_ext = NULL;
  3717. vdev->osif_vdev = NULL;
  3718. vdev->delete.pending = 0;
  3719. vdev->safemode = 0;
  3720. vdev->drop_unenc = 1;
  3721. vdev->sec_type = cdp_sec_type_none;
  3722. #ifdef notyet
  3723. vdev->filters_num = 0;
  3724. #endif
  3725. qdf_mem_copy(
  3726. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  3727. /* TODO: Initialize default HTT meta data that will be used in
  3728. * TCL descriptors for packets transmitted from this VDEV
  3729. */
  3730. TAILQ_INIT(&vdev->peer_list);
  3731. if ((soc->intr_mode == DP_INTR_POLL) &&
  3732. wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  3733. if ((pdev->vdev_count == 0) ||
  3734. (wlan_op_mode_monitor == vdev->opmode))
  3735. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  3736. }
  3737. if (wlan_op_mode_monitor == vdev->opmode) {
  3738. pdev->monitor_vdev = vdev;
  3739. return (struct cdp_vdev *)vdev;
  3740. }
  3741. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  3742. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  3743. vdev->dscp_tid_map_id = 0;
  3744. vdev->mcast_enhancement_en = 0;
  3745. vdev->raw_mode_war = wlan_cfg_get_raw_mode_war(soc->wlan_cfg_ctx);
  3746. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3747. /* add this vdev into the pdev's list */
  3748. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  3749. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3750. pdev->vdev_count++;
  3751. dp_tx_vdev_attach(vdev);
  3752. if (pdev->vdev_count == 1)
  3753. dp_lro_hash_setup(soc, pdev);
  3754. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3755. "Created vdev %pK (%pM)", vdev, vdev->mac_addr.raw);
  3756. DP_STATS_INIT(vdev);
  3757. if (wlan_op_mode_sta == vdev->opmode)
  3758. dp_peer_create_wifi3((struct cdp_vdev *)vdev,
  3759. vdev->mac_addr.raw,
  3760. NULL);
  3761. return (struct cdp_vdev *)vdev;
  3762. fail0:
  3763. return NULL;
  3764. }
  3765. /**
  3766. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  3767. * @vdev: Datapath VDEV handle
  3768. * @osif_vdev: OSIF vdev handle
  3769. * @ctrl_vdev: UMAC vdev handle
  3770. * @txrx_ops: Tx and Rx operations
  3771. *
  3772. * Return: DP VDEV handle on success, NULL on failure
  3773. */
  3774. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  3775. void *osif_vdev, struct cdp_ctrl_objmgr_vdev *ctrl_vdev,
  3776. struct ol_txrx_ops *txrx_ops)
  3777. {
  3778. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3779. vdev->osif_vdev = osif_vdev;
  3780. vdev->ctrl_vdev = ctrl_vdev;
  3781. vdev->osif_rx = txrx_ops->rx.rx;
  3782. vdev->osif_rx_stack = txrx_ops->rx.rx_stack;
  3783. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  3784. vdev->osif_get_key = txrx_ops->get_key;
  3785. vdev->osif_rx_mon = txrx_ops->rx.mon;
  3786. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  3787. #ifdef notyet
  3788. #if ATH_SUPPORT_WAPI
  3789. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  3790. #endif
  3791. #endif
  3792. #ifdef UMAC_SUPPORT_PROXY_ARP
  3793. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  3794. #endif
  3795. vdev->me_convert = txrx_ops->me_convert;
  3796. /* TODO: Enable the following once Tx code is integrated */
  3797. if (vdev->mesh_vdev)
  3798. txrx_ops->tx.tx = dp_tx_send_mesh;
  3799. else
  3800. txrx_ops->tx.tx = dp_tx_send;
  3801. txrx_ops->tx.tx_exception = dp_tx_send_exception;
  3802. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  3803. "DP Vdev Register success");
  3804. }
  3805. /**
  3806. * dp_vdev_flush_peers() - Forcibily Flush peers of vdev
  3807. * @vdev: Datapath VDEV handle
  3808. * @unmap_only: Flag to indicate "only unmap"
  3809. *
  3810. * Return: void
  3811. */
  3812. static void dp_vdev_flush_peers(struct cdp_vdev *vdev_handle, bool unmap_only)
  3813. {
  3814. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3815. struct dp_pdev *pdev = vdev->pdev;
  3816. struct dp_soc *soc = pdev->soc;
  3817. struct dp_peer *peer;
  3818. uint16_t *peer_ids;
  3819. uint8_t i = 0, j = 0;
  3820. peer_ids = qdf_mem_malloc(soc->max_peers * sizeof(peer_ids[0]));
  3821. if (!peer_ids) {
  3822. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3823. "DP alloc failure - unable to flush peers");
  3824. return;
  3825. }
  3826. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3827. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3828. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  3829. if (peer->peer_ids[i] != HTT_INVALID_PEER)
  3830. if (j < soc->max_peers)
  3831. peer_ids[j++] = peer->peer_ids[i];
  3832. }
  3833. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3834. for (i = 0; i < j ; i++) {
  3835. if (unmap_only) {
  3836. peer = __dp_peer_find_by_id(soc, peer_ids[i]);
  3837. if (peer) {
  3838. dp_rx_peer_unmap_handler(soc, peer_ids[i],
  3839. vdev->vdev_id,
  3840. peer->mac_addr.raw,
  3841. 0);
  3842. }
  3843. } else {
  3844. peer = dp_peer_find_by_id(soc, peer_ids[i]);
  3845. if (peer) {
  3846. dp_info("peer: %pM is getting flush",
  3847. peer->mac_addr.raw);
  3848. dp_peer_delete_wifi3(peer, 0);
  3849. /*
  3850. * we need to call dp_peer_unref_del_find_by_id
  3851. * to remove additional ref count incremented
  3852. * by dp_peer_find_by_id() call.
  3853. *
  3854. * Hold the ref count while executing
  3855. * dp_peer_delete_wifi3() call.
  3856. *
  3857. */
  3858. dp_peer_unref_del_find_by_id(peer);
  3859. dp_rx_peer_unmap_handler(soc, peer_ids[i],
  3860. vdev->vdev_id,
  3861. peer->mac_addr.raw, 0);
  3862. }
  3863. }
  3864. }
  3865. qdf_mem_free(peer_ids);
  3866. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3867. FL("Flushed peers for vdev object %pK "), vdev);
  3868. }
  3869. /*
  3870. * dp_vdev_detach_wifi3() - Detach txrx vdev
  3871. * @txrx_vdev: Datapath VDEV handle
  3872. * @callback: Callback OL_IF on completion of detach
  3873. * @cb_context: Callback context
  3874. *
  3875. */
  3876. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  3877. ol_txrx_vdev_delete_cb callback, void *cb_context)
  3878. {
  3879. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3880. struct dp_pdev *pdev = vdev->pdev;
  3881. struct dp_soc *soc = pdev->soc;
  3882. struct dp_neighbour_peer *peer = NULL;
  3883. struct dp_neighbour_peer *temp_peer = NULL;
  3884. /* preconditions */
  3885. qdf_assert(vdev);
  3886. if (wlan_op_mode_monitor == vdev->opmode)
  3887. goto free_vdev;
  3888. if (wlan_op_mode_sta == vdev->opmode)
  3889. dp_peer_delete_wifi3(vdev->vap_bss_peer, 0);
  3890. /*
  3891. * If Target is hung, flush all peers before detaching vdev
  3892. * this will free all references held due to missing
  3893. * unmap commands from Target
  3894. */
  3895. if (!hif_is_target_ready(HIF_GET_SOFTC(soc->hif_handle)))
  3896. dp_vdev_flush_peers((struct cdp_vdev *)vdev, false);
  3897. /*
  3898. * Use peer_ref_mutex while accessing peer_list, in case
  3899. * a peer is in the process of being removed from the list.
  3900. */
  3901. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3902. /* check that the vdev has no peers allocated */
  3903. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  3904. /* debug print - will be removed later */
  3905. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3906. FL("not deleting vdev object %pK (%pM)"
  3907. "until deletion finishes for all its peers"),
  3908. vdev, vdev->mac_addr.raw);
  3909. /* indicate that the vdev needs to be deleted */
  3910. vdev->delete.pending = 1;
  3911. vdev->delete.callback = callback;
  3912. vdev->delete.context = cb_context;
  3913. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3914. return;
  3915. }
  3916. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3917. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3918. if (!soc->hw_nac_monitor_support) {
  3919. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  3920. neighbour_peer_list_elem) {
  3921. QDF_ASSERT(peer->vdev != vdev);
  3922. }
  3923. } else {
  3924. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  3925. neighbour_peer_list_elem, temp_peer) {
  3926. if (peer->vdev == vdev) {
  3927. TAILQ_REMOVE(&pdev->neighbour_peers_list, peer,
  3928. neighbour_peer_list_elem);
  3929. qdf_mem_free(peer);
  3930. }
  3931. }
  3932. }
  3933. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3934. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3935. dp_tx_vdev_detach(vdev);
  3936. /* remove the vdev from its parent pdev's list */
  3937. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  3938. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3939. FL("deleting vdev object %pK (%pM)"), vdev, vdev->mac_addr.raw);
  3940. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3941. free_vdev:
  3942. qdf_mem_free(vdev);
  3943. if (callback)
  3944. callback(cb_context);
  3945. }
  3946. /*
  3947. * dp_peer_delete_ast_entries(): Delete all AST entries for a peer
  3948. * @soc - datapath soc handle
  3949. * @peer - datapath peer handle
  3950. *
  3951. * Delete the AST entries belonging to a peer
  3952. */
  3953. #ifdef FEATURE_AST
  3954. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  3955. struct dp_peer *peer)
  3956. {
  3957. struct dp_ast_entry *ast_entry, *temp_ast_entry;
  3958. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, temp_ast_entry)
  3959. dp_peer_del_ast(soc, ast_entry);
  3960. peer->self_ast_entry = NULL;
  3961. }
  3962. #else
  3963. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  3964. struct dp_peer *peer)
  3965. {
  3966. }
  3967. #endif
  3968. #if ATH_SUPPORT_WRAP
  3969. static inline struct dp_peer *dp_peer_can_reuse(struct dp_vdev *vdev,
  3970. uint8_t *peer_mac_addr)
  3971. {
  3972. struct dp_peer *peer;
  3973. peer = dp_peer_find_hash_find(vdev->pdev->soc, peer_mac_addr,
  3974. 0, vdev->vdev_id);
  3975. if (!peer)
  3976. return NULL;
  3977. if (peer->bss_peer)
  3978. return peer;
  3979. dp_peer_unref_delete(peer);
  3980. return NULL;
  3981. }
  3982. #else
  3983. static inline struct dp_peer *dp_peer_can_reuse(struct dp_vdev *vdev,
  3984. uint8_t *peer_mac_addr)
  3985. {
  3986. struct dp_peer *peer;
  3987. peer = dp_peer_find_hash_find(vdev->pdev->soc, peer_mac_addr,
  3988. 0, vdev->vdev_id);
  3989. if (!peer)
  3990. return NULL;
  3991. if (peer->bss_peer && (peer->vdev->vdev_id == vdev->vdev_id))
  3992. return peer;
  3993. dp_peer_unref_delete(peer);
  3994. return NULL;
  3995. }
  3996. #endif
  3997. #ifdef FEATURE_AST
  3998. static inline void dp_peer_ast_handle_roam_del(struct dp_soc *soc,
  3999. uint8_t *peer_mac_addr)
  4000. {
  4001. struct dp_ast_entry *ast_entry;
  4002. qdf_spin_lock_bh(&soc->ast_lock);
  4003. ast_entry = dp_peer_ast_hash_find_soc(soc, peer_mac_addr);
  4004. if (ast_entry && ast_entry->next_hop &&
  4005. !ast_entry->delete_in_progress)
  4006. dp_peer_del_ast(soc, ast_entry);
  4007. qdf_spin_unlock_bh(&soc->ast_lock);
  4008. }
  4009. #endif
  4010. /*
  4011. * dp_peer_create_wifi3() - attach txrx peer
  4012. * @txrx_vdev: Datapath VDEV handle
  4013. * @peer_mac_addr: Peer MAC address
  4014. *
  4015. * Return: DP peeer handle on success, NULL on failure
  4016. */
  4017. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  4018. uint8_t *peer_mac_addr, struct cdp_ctrl_objmgr_peer *ctrl_peer)
  4019. {
  4020. struct dp_peer *peer;
  4021. int i;
  4022. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4023. struct dp_pdev *pdev;
  4024. struct dp_soc *soc;
  4025. enum cdp_txrx_ast_entry_type ast_type = CDP_TXRX_AST_TYPE_STATIC;
  4026. /* preconditions */
  4027. qdf_assert(vdev);
  4028. qdf_assert(peer_mac_addr);
  4029. pdev = vdev->pdev;
  4030. soc = pdev->soc;
  4031. /*
  4032. * If a peer entry with given MAC address already exists,
  4033. * reuse the peer and reset the state of peer.
  4034. */
  4035. peer = dp_peer_can_reuse(vdev, peer_mac_addr);
  4036. if (peer) {
  4037. qdf_atomic_init(&peer->is_default_route_set);
  4038. dp_peer_cleanup(vdev, peer);
  4039. qdf_spin_lock_bh(&soc->ast_lock);
  4040. dp_peer_delete_ast_entries(soc, peer);
  4041. peer->delete_in_progress = false;
  4042. qdf_spin_unlock_bh(&soc->ast_lock);
  4043. if ((vdev->opmode == wlan_op_mode_sta) &&
  4044. !qdf_mem_cmp(peer_mac_addr, &vdev->mac_addr.raw[0],
  4045. DP_MAC_ADDR_LEN)) {
  4046. ast_type = CDP_TXRX_AST_TYPE_SELF;
  4047. }
  4048. dp_peer_add_ast(soc, peer, peer_mac_addr, ast_type, 0);
  4049. /*
  4050. * Control path maintains a node count which is incremented
  4051. * for every new peer create command. Since new peer is not being
  4052. * created and earlier reference is reused here,
  4053. * peer_unref_delete event is sent to control path to
  4054. * increment the count back.
  4055. */
  4056. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  4057. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->ctrl_pdev,
  4058. peer->mac_addr.raw, vdev->mac_addr.raw,
  4059. vdev->opmode, peer->ctrl_peer, ctrl_peer);
  4060. }
  4061. peer->ctrl_peer = ctrl_peer;
  4062. dp_local_peer_id_alloc(pdev, peer);
  4063. DP_STATS_INIT(peer);
  4064. return (void *)peer;
  4065. } else {
  4066. /*
  4067. * When a STA roams from RPTR AP to ROOT AP and vice versa, we
  4068. * need to remove the AST entry which was earlier added as a WDS
  4069. * entry.
  4070. * If an AST entry exists, but no peer entry exists with a given
  4071. * MAC addresses, we could deduce it as a WDS entry
  4072. */
  4073. dp_peer_ast_handle_roam_del(soc, peer_mac_addr);
  4074. }
  4075. #ifdef notyet
  4076. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  4077. soc->mempool_ol_ath_peer);
  4078. #else
  4079. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  4080. #endif
  4081. if (!peer)
  4082. return NULL; /* failure */
  4083. qdf_mem_zero(peer, sizeof(struct dp_peer));
  4084. TAILQ_INIT(&peer->ast_entry_list);
  4085. /* store provided params */
  4086. peer->vdev = vdev;
  4087. peer->ctrl_peer = ctrl_peer;
  4088. if ((vdev->opmode == wlan_op_mode_sta) &&
  4089. !qdf_mem_cmp(peer_mac_addr, &vdev->mac_addr.raw[0],
  4090. DP_MAC_ADDR_LEN)) {
  4091. ast_type = CDP_TXRX_AST_TYPE_SELF;
  4092. }
  4093. dp_peer_add_ast(soc, peer, peer_mac_addr, ast_type, 0);
  4094. qdf_spinlock_create(&peer->peer_info_lock);
  4095. qdf_mem_copy(
  4096. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  4097. /* TODO: See of rx_opt_proc is really required */
  4098. peer->rx_opt_proc = soc->rx_opt_proc;
  4099. /* initialize the peer_id */
  4100. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  4101. peer->peer_ids[i] = HTT_INVALID_PEER;
  4102. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  4103. qdf_atomic_init(&peer->ref_cnt);
  4104. /* keep one reference for attach */
  4105. qdf_atomic_inc(&peer->ref_cnt);
  4106. /* add this peer into the vdev's list */
  4107. if (wlan_op_mode_sta == vdev->opmode)
  4108. TAILQ_INSERT_HEAD(&vdev->peer_list, peer, peer_list_elem);
  4109. else
  4110. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  4111. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4112. /* TODO: See if hash based search is required */
  4113. dp_peer_find_hash_add(soc, peer);
  4114. /* Initialize the peer state */
  4115. peer->state = OL_TXRX_PEER_STATE_DISC;
  4116. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4117. "vdev %pK created peer %pK (%pM) ref_cnt: %d",
  4118. vdev, peer, peer->mac_addr.raw,
  4119. qdf_atomic_read(&peer->ref_cnt));
  4120. /*
  4121. * For every peer MAp message search and set if bss_peer
  4122. */
  4123. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  4124. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4125. "vdev bss_peer!!!!");
  4126. peer->bss_peer = 1;
  4127. vdev->vap_bss_peer = peer;
  4128. }
  4129. for (i = 0; i < DP_MAX_TIDS; i++)
  4130. qdf_spinlock_create(&peer->rx_tid[i].tid_lock);
  4131. dp_local_peer_id_alloc(pdev, peer);
  4132. DP_STATS_INIT(peer);
  4133. return (void *)peer;
  4134. }
  4135. /*
  4136. * dp_vdev_get_default_reo_hash() - get reo dest ring and hash values for a vdev
  4137. * @vdev: Datapath VDEV handle
  4138. * @reo_dest: pointer to default reo_dest ring for vdev to be populated
  4139. * @hash_based: pointer to hash value (enabled/disabled) to be populated
  4140. *
  4141. * Return: None
  4142. */
  4143. static
  4144. void dp_vdev_get_default_reo_hash(struct dp_vdev *vdev,
  4145. enum cdp_host_reo_dest_ring *reo_dest,
  4146. bool *hash_based)
  4147. {
  4148. struct dp_soc *soc;
  4149. struct dp_pdev *pdev;
  4150. pdev = vdev->pdev;
  4151. soc = pdev->soc;
  4152. /*
  4153. * hash based steering is disabled for Radios which are offloaded
  4154. * to NSS
  4155. */
  4156. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  4157. *hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  4158. /*
  4159. * Below line of code will ensure the proper reo_dest ring is chosen
  4160. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  4161. */
  4162. *reo_dest = pdev->reo_dest;
  4163. }
  4164. #ifdef IPA_OFFLOAD
  4165. /*
  4166. * dp_peer_setup_get_reo_hash() - get reo dest ring and hash values for a peer
  4167. * @vdev: Datapath VDEV handle
  4168. * @reo_dest: pointer to default reo_dest ring for vdev to be populated
  4169. * @hash_based: pointer to hash value (enabled/disabled) to be populated
  4170. *
  4171. * If IPA is enabled in ini, for SAP mode, disable hash based
  4172. * steering, use default reo_dst ring for RX. Use config values for other modes.
  4173. * Return: None
  4174. */
  4175. static void dp_peer_setup_get_reo_hash(struct dp_vdev *vdev,
  4176. enum cdp_host_reo_dest_ring *reo_dest,
  4177. bool *hash_based)
  4178. {
  4179. struct dp_soc *soc;
  4180. struct dp_pdev *pdev;
  4181. pdev = vdev->pdev;
  4182. soc = pdev->soc;
  4183. dp_vdev_get_default_reo_hash(vdev, reo_dest, hash_based);
  4184. /*
  4185. * If IPA is enabled, disable hash-based flow steering and set
  4186. * reo_dest_ring_4 as the REO ring to receive packets on.
  4187. * IPA is configured to reap reo_dest_ring_4.
  4188. *
  4189. * Note - REO DST indexes are from 0 - 3, while cdp_host_reo_dest_ring
  4190. * value enum value is from 1 - 4.
  4191. * Hence, *reo_dest = IPA_REO_DEST_RING_IDX + 1
  4192. */
  4193. if (wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx)) {
  4194. if (vdev->opmode == wlan_op_mode_ap) {
  4195. *reo_dest = IPA_REO_DEST_RING_IDX + 1;
  4196. *hash_based = 0;
  4197. }
  4198. }
  4199. }
  4200. #else
  4201. /*
  4202. * dp_peer_setup_get_reo_hash() - get reo dest ring and hash values for a peer
  4203. * @vdev: Datapath VDEV handle
  4204. * @reo_dest: pointer to default reo_dest ring for vdev to be populated
  4205. * @hash_based: pointer to hash value (enabled/disabled) to be populated
  4206. *
  4207. * Use system config values for hash based steering.
  4208. * Return: None
  4209. */
  4210. static void dp_peer_setup_get_reo_hash(struct dp_vdev *vdev,
  4211. enum cdp_host_reo_dest_ring *reo_dest,
  4212. bool *hash_based)
  4213. {
  4214. dp_vdev_get_default_reo_hash(vdev, reo_dest, hash_based);
  4215. }
  4216. #endif /* IPA_OFFLOAD */
  4217. /*
  4218. * dp_peer_setup_wifi3() - initialize the peer
  4219. * @vdev_hdl: virtual device object
  4220. * @peer: Peer object
  4221. *
  4222. * Return: void
  4223. */
  4224. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  4225. {
  4226. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  4227. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4228. struct dp_pdev *pdev;
  4229. struct dp_soc *soc;
  4230. bool hash_based = 0;
  4231. enum cdp_host_reo_dest_ring reo_dest;
  4232. /* preconditions */
  4233. qdf_assert(vdev);
  4234. qdf_assert(peer);
  4235. pdev = vdev->pdev;
  4236. soc = pdev->soc;
  4237. peer->last_assoc_rcvd = 0;
  4238. peer->last_disassoc_rcvd = 0;
  4239. peer->last_deauth_rcvd = 0;
  4240. dp_peer_setup_get_reo_hash(vdev, &reo_dest, &hash_based);
  4241. dp_info("pdev: %d vdev :%d opmode:%u hash-based-steering:%d default-reo_dest:%u",
  4242. pdev->pdev_id, vdev->vdev_id,
  4243. vdev->opmode, hash_based, reo_dest);
  4244. /*
  4245. * There are corner cases where the AD1 = AD2 = "VAPs address"
  4246. * i.e both the devices have same MAC address. In these
  4247. * cases we want such pkts to be processed in NULL Q handler
  4248. * which is REO2TCL ring. for this reason we should
  4249. * not setup reo_queues and default route for bss_peer.
  4250. */
  4251. if (peer->bss_peer && vdev->opmode == wlan_op_mode_ap)
  4252. return;
  4253. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  4254. /* TODO: Check the destination ring number to be passed to FW */
  4255. soc->cdp_soc.ol_ops->peer_set_default_routing(
  4256. pdev->ctrl_pdev, peer->mac_addr.raw,
  4257. peer->vdev->vdev_id, hash_based, reo_dest);
  4258. }
  4259. qdf_atomic_set(&peer->is_default_route_set, 1);
  4260. dp_peer_rx_init(pdev, peer);
  4261. return;
  4262. }
  4263. /*
  4264. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  4265. * @vdev_handle: virtual device object
  4266. * @htt_pkt_type: type of pkt
  4267. *
  4268. * Return: void
  4269. */
  4270. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  4271. enum htt_cmn_pkt_type val)
  4272. {
  4273. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4274. vdev->tx_encap_type = val;
  4275. }
  4276. /*
  4277. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  4278. * @vdev_handle: virtual device object
  4279. * @htt_pkt_type: type of pkt
  4280. *
  4281. * Return: void
  4282. */
  4283. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  4284. enum htt_cmn_pkt_type val)
  4285. {
  4286. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4287. vdev->rx_decap_type = val;
  4288. }
  4289. /*
  4290. * dp_set_ba_aging_timeout() - set ba aging timeout per AC
  4291. * @txrx_soc: cdp soc handle
  4292. * @ac: Access category
  4293. * @value: timeout value in millisec
  4294. *
  4295. * Return: void
  4296. */
  4297. static void dp_set_ba_aging_timeout(struct cdp_soc_t *txrx_soc,
  4298. uint8_t ac, uint32_t value)
  4299. {
  4300. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  4301. hal_set_ba_aging_timeout(soc->hal_soc, ac, value);
  4302. }
  4303. /*
  4304. * dp_get_ba_aging_timeout() - get ba aging timeout per AC
  4305. * @txrx_soc: cdp soc handle
  4306. * @ac: access category
  4307. * @value: timeout value in millisec
  4308. *
  4309. * Return: void
  4310. */
  4311. static void dp_get_ba_aging_timeout(struct cdp_soc_t *txrx_soc,
  4312. uint8_t ac, uint32_t *value)
  4313. {
  4314. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  4315. hal_get_ba_aging_timeout(soc->hal_soc, ac, value);
  4316. }
  4317. /*
  4318. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  4319. * @pdev_handle: physical device object
  4320. * @val: reo destination ring index (1 - 4)
  4321. *
  4322. * Return: void
  4323. */
  4324. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  4325. enum cdp_host_reo_dest_ring val)
  4326. {
  4327. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4328. if (pdev)
  4329. pdev->reo_dest = val;
  4330. }
  4331. /*
  4332. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  4333. * @pdev_handle: physical device object
  4334. *
  4335. * Return: reo destination ring index
  4336. */
  4337. static enum cdp_host_reo_dest_ring
  4338. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  4339. {
  4340. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4341. if (pdev)
  4342. return pdev->reo_dest;
  4343. else
  4344. return cdp_host_reo_dest_ring_unknown;
  4345. }
  4346. /*
  4347. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  4348. * @pdev_handle: device object
  4349. * @val: value to be set
  4350. *
  4351. * Return: void
  4352. */
  4353. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  4354. uint32_t val)
  4355. {
  4356. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4357. /* Enable/Disable smart mesh filtering. This flag will be checked
  4358. * during rx processing to check if packets are from NAC clients.
  4359. */
  4360. pdev->filter_neighbour_peers = val;
  4361. return 0;
  4362. }
  4363. /*
  4364. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  4365. * address for smart mesh filtering
  4366. * @vdev_handle: virtual device object
  4367. * @cmd: Add/Del command
  4368. * @macaddr: nac client mac address
  4369. *
  4370. * Return: void
  4371. */
  4372. static int dp_update_filter_neighbour_peers(struct cdp_vdev *vdev_handle,
  4373. uint32_t cmd, uint8_t *macaddr)
  4374. {
  4375. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4376. struct dp_pdev *pdev = vdev->pdev;
  4377. struct dp_neighbour_peer *peer = NULL;
  4378. if (!macaddr)
  4379. goto fail0;
  4380. /* Store address of NAC (neighbour peer) which will be checked
  4381. * against TA of received packets.
  4382. */
  4383. if (cmd == DP_NAC_PARAM_ADD) {
  4384. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  4385. sizeof(*peer));
  4386. if (!peer) {
  4387. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4388. FL("DP neighbour peer node memory allocation failed"));
  4389. goto fail0;
  4390. }
  4391. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  4392. macaddr, DP_MAC_ADDR_LEN);
  4393. peer->vdev = vdev;
  4394. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  4395. /* add this neighbour peer into the list */
  4396. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  4397. neighbour_peer_list_elem);
  4398. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  4399. /* first neighbour */
  4400. if (!pdev->neighbour_peers_added) {
  4401. pdev->neighbour_peers_added = true;
  4402. dp_ppdu_ring_cfg(pdev);
  4403. }
  4404. return 1;
  4405. } else if (cmd == DP_NAC_PARAM_DEL) {
  4406. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  4407. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  4408. neighbour_peer_list_elem) {
  4409. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  4410. macaddr, DP_MAC_ADDR_LEN)) {
  4411. /* delete this peer from the list */
  4412. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  4413. peer, neighbour_peer_list_elem);
  4414. qdf_mem_free(peer);
  4415. break;
  4416. }
  4417. }
  4418. /* last neighbour deleted */
  4419. if (TAILQ_EMPTY(&pdev->neighbour_peers_list)) {
  4420. pdev->neighbour_peers_added = false;
  4421. dp_ppdu_ring_cfg(pdev);
  4422. }
  4423. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  4424. if (!pdev->mcopy_mode && !pdev->neighbour_peers_added &&
  4425. !pdev->enhanced_stats_en)
  4426. dp_ppdu_ring_reset(pdev);
  4427. return 1;
  4428. }
  4429. fail0:
  4430. return 0;
  4431. }
  4432. /*
  4433. * dp_get_sec_type() - Get the security type
  4434. * @peer: Datapath peer handle
  4435. * @sec_idx: Security id (mcast, ucast)
  4436. *
  4437. * return sec_type: Security type
  4438. */
  4439. static int dp_get_sec_type(struct cdp_peer *peer, uint8_t sec_idx)
  4440. {
  4441. struct dp_peer *dpeer = (struct dp_peer *)peer;
  4442. return dpeer->security[sec_idx].sec_type;
  4443. }
  4444. /*
  4445. * dp_peer_authorize() - authorize txrx peer
  4446. * @peer_handle: Datapath peer handle
  4447. * @authorize
  4448. *
  4449. */
  4450. static void dp_peer_authorize(struct cdp_peer *peer_handle, uint32_t authorize)
  4451. {
  4452. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4453. struct dp_soc *soc;
  4454. if (peer != NULL) {
  4455. soc = peer->vdev->pdev->soc;
  4456. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  4457. peer->authorize = authorize ? 1 : 0;
  4458. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4459. }
  4460. }
  4461. static void dp_reset_and_release_peer_mem(struct dp_soc *soc,
  4462. struct dp_pdev *pdev,
  4463. struct dp_peer *peer,
  4464. uint32_t vdev_id)
  4465. {
  4466. struct dp_vdev *vdev = NULL;
  4467. struct dp_peer *bss_peer = NULL;
  4468. uint8_t *m_addr = NULL;
  4469. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4470. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4471. if (vdev->vdev_id == vdev_id)
  4472. break;
  4473. }
  4474. if (!vdev) {
  4475. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4476. "vdev is NULL");
  4477. } else {
  4478. if (vdev->vap_bss_peer == peer)
  4479. vdev->vap_bss_peer = NULL;
  4480. m_addr = peer->mac_addr.raw;
  4481. if (soc->cdp_soc.ol_ops->peer_unref_delete)
  4482. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->ctrl_pdev,
  4483. m_addr, vdev->mac_addr.raw, vdev->opmode,
  4484. peer->ctrl_peer, NULL);
  4485. if (vdev && vdev->vap_bss_peer) {
  4486. bss_peer = vdev->vap_bss_peer;
  4487. DP_UPDATE_STATS(vdev, peer);
  4488. }
  4489. }
  4490. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4491. /*
  4492. * Peer AST list hast to be empty here
  4493. */
  4494. DP_AST_ASSERT(TAILQ_EMPTY(&peer->ast_entry_list));
  4495. qdf_mem_free(peer);
  4496. }
  4497. /**
  4498. * dp_delete_pending_vdev() - check and process vdev delete
  4499. * @pdev: DP specific pdev pointer
  4500. * @vdev: DP specific vdev pointer
  4501. * @vdev_id: vdev id corresponding to vdev
  4502. *
  4503. * This API does following:
  4504. * 1) It releases tx flow pools buffers as vdev is
  4505. * going down and no peers are associated.
  4506. * 2) It also detaches vdev before cleaning vdev (struct dp_vdev) memory
  4507. */
  4508. static void dp_delete_pending_vdev(struct dp_pdev *pdev, struct dp_vdev *vdev,
  4509. uint8_t vdev_id)
  4510. {
  4511. ol_txrx_vdev_delete_cb vdev_delete_cb = NULL;
  4512. void *vdev_delete_context = NULL;
  4513. vdev_delete_cb = vdev->delete.callback;
  4514. vdev_delete_context = vdev->delete.context;
  4515. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4516. FL("deleting vdev object %pK (%pM)- its last peer is done"),
  4517. vdev, vdev->mac_addr.raw);
  4518. /* all peers are gone, go ahead and delete it */
  4519. dp_tx_flow_pool_unmap_handler(pdev, vdev_id,
  4520. FLOW_TYPE_VDEV, vdev_id);
  4521. dp_tx_vdev_detach(vdev);
  4522. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4523. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  4524. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4525. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4526. FL("deleting vdev object %pK (%pM)"),
  4527. vdev, vdev->mac_addr.raw);
  4528. qdf_mem_free(vdev);
  4529. vdev = NULL;
  4530. if (vdev_delete_cb)
  4531. vdev_delete_cb(vdev_delete_context);
  4532. }
  4533. /*
  4534. * dp_peer_unref_delete() - unref and delete peer
  4535. * @peer_handle: Datapath peer handle
  4536. *
  4537. */
  4538. void dp_peer_unref_delete(void *peer_handle)
  4539. {
  4540. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4541. struct dp_vdev *vdev = peer->vdev;
  4542. struct dp_pdev *pdev = vdev->pdev;
  4543. struct dp_soc *soc = pdev->soc;
  4544. struct dp_peer *tmppeer;
  4545. int found = 0;
  4546. uint16_t peer_id;
  4547. uint16_t vdev_id;
  4548. bool delete_vdev;
  4549. /*
  4550. * Hold the lock all the way from checking if the peer ref count
  4551. * is zero until the peer references are removed from the hash
  4552. * table and vdev list (if the peer ref count is zero).
  4553. * This protects against a new HL tx operation starting to use the
  4554. * peer object just after this function concludes it's done being used.
  4555. * Furthermore, the lock needs to be held while checking whether the
  4556. * vdev's list of peers is empty, to make sure that list is not modified
  4557. * concurrently with the empty check.
  4558. */
  4559. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  4560. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  4561. peer_id = peer->peer_ids[0];
  4562. vdev_id = vdev->vdev_id;
  4563. /*
  4564. * Make sure that the reference to the peer in
  4565. * peer object map is removed
  4566. */
  4567. if (peer_id != HTT_INVALID_PEER)
  4568. soc->peer_id_to_obj_map[peer_id] = NULL;
  4569. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4570. "Deleting peer %pK (%pM)", peer, peer->mac_addr.raw);
  4571. /* remove the reference to the peer from the hash table */
  4572. dp_peer_find_hash_remove(soc, peer);
  4573. qdf_spin_lock_bh(&soc->ast_lock);
  4574. if (peer->self_ast_entry) {
  4575. dp_peer_del_ast(soc, peer->self_ast_entry);
  4576. peer->self_ast_entry = NULL;
  4577. }
  4578. qdf_spin_unlock_bh(&soc->ast_lock);
  4579. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  4580. if (tmppeer == peer) {
  4581. found = 1;
  4582. break;
  4583. }
  4584. }
  4585. if (found) {
  4586. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  4587. peer_list_elem);
  4588. } else {
  4589. /*Ignoring the remove operation as peer not found*/
  4590. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4591. "peer:%pK not found in vdev:%pK peerlist:%pK",
  4592. peer, vdev, &peer->vdev->peer_list);
  4593. }
  4594. /* cleanup the peer data */
  4595. dp_peer_cleanup(vdev, peer);
  4596. /* check whether the parent vdev has no peers left */
  4597. if (TAILQ_EMPTY(&vdev->peer_list)) {
  4598. /*
  4599. * capture vdev delete pending flag's status
  4600. * while holding peer_ref_mutex lock
  4601. */
  4602. delete_vdev = vdev->delete.pending;
  4603. /*
  4604. * Now that there are no references to the peer, we can
  4605. * release the peer reference lock.
  4606. */
  4607. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4608. /*
  4609. * Check if the parent vdev was waiting for its peers
  4610. * to be deleted, in order for it to be deleted too.
  4611. */
  4612. if (delete_vdev)
  4613. dp_delete_pending_vdev(pdev, vdev, vdev_id);
  4614. } else {
  4615. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4616. }
  4617. dp_reset_and_release_peer_mem(soc, pdev, peer, vdev_id);
  4618. } else {
  4619. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4620. }
  4621. }
  4622. /*
  4623. * dp_peer_detach_wifi3() – Detach txrx peer
  4624. * @peer_handle: Datapath peer handle
  4625. * @bitmap: bitmap indicating special handling of request.
  4626. *
  4627. */
  4628. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap)
  4629. {
  4630. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4631. /* redirect the peer's rx delivery function to point to a
  4632. * discard func
  4633. */
  4634. peer->rx_opt_proc = dp_rx_discard;
  4635. /* Do not make ctrl_peer to NULL for connected sta peers.
  4636. * We need ctrl_peer to release the reference during dp
  4637. * peer free. This reference was held for
  4638. * obj_mgr peer during the creation of dp peer.
  4639. */
  4640. if (!(peer->vdev && (peer->vdev->opmode != wlan_op_mode_sta) &&
  4641. !peer->bss_peer))
  4642. peer->ctrl_peer = NULL;
  4643. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4644. FL("peer %pK (%pM)"), peer, peer->mac_addr.raw);
  4645. dp_local_peer_id_free(peer->vdev->pdev, peer);
  4646. qdf_spinlock_destroy(&peer->peer_info_lock);
  4647. /*
  4648. * Remove the reference added during peer_attach.
  4649. * The peer will still be left allocated until the
  4650. * PEER_UNMAP message arrives to remove the other
  4651. * reference, added by the PEER_MAP message.
  4652. */
  4653. dp_peer_unref_delete(peer_handle);
  4654. }
  4655. /*
  4656. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  4657. * @peer_handle: Datapath peer handle
  4658. *
  4659. */
  4660. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  4661. {
  4662. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  4663. return vdev->mac_addr.raw;
  4664. }
  4665. /*
  4666. * dp_vdev_set_wds() - Enable per packet stats
  4667. * @vdev_handle: DP VDEV handle
  4668. * @val: value
  4669. *
  4670. * Return: none
  4671. */
  4672. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  4673. {
  4674. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4675. vdev->wds_enabled = val;
  4676. return 0;
  4677. }
  4678. /*
  4679. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  4680. * @peer_handle: Datapath peer handle
  4681. *
  4682. */
  4683. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  4684. uint8_t vdev_id)
  4685. {
  4686. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  4687. struct dp_vdev *vdev = NULL;
  4688. if (qdf_unlikely(!pdev))
  4689. return NULL;
  4690. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4691. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4692. if (vdev->vdev_id == vdev_id)
  4693. break;
  4694. }
  4695. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4696. return (struct cdp_vdev *)vdev;
  4697. }
  4698. /*
  4699. * dp_get_mon_vdev_from_pdev_wifi3() - Get vdev handle of monitor mode
  4700. * @dev: PDEV handle
  4701. *
  4702. * Return: VDEV handle of monitor mode
  4703. */
  4704. static struct cdp_vdev *dp_get_mon_vdev_from_pdev_wifi3(struct cdp_pdev *dev)
  4705. {
  4706. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  4707. if (qdf_unlikely(!pdev))
  4708. return NULL;
  4709. return (struct cdp_vdev *)pdev->monitor_vdev;
  4710. }
  4711. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  4712. {
  4713. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4714. return vdev->opmode;
  4715. }
  4716. static
  4717. void dp_get_os_rx_handles_from_vdev_wifi3(struct cdp_vdev *pvdev,
  4718. ol_txrx_rx_fp *stack_fn_p,
  4719. ol_osif_vdev_handle *osif_vdev_p)
  4720. {
  4721. struct dp_vdev *vdev = dp_get_dp_vdev_from_cdp_vdev(pvdev);
  4722. qdf_assert(vdev);
  4723. *stack_fn_p = vdev->osif_rx_stack;
  4724. *osif_vdev_p = vdev->osif_vdev;
  4725. }
  4726. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  4727. {
  4728. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  4729. struct dp_pdev *pdev = vdev->pdev;
  4730. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  4731. }
  4732. /**
  4733. * dp_monitor_mode_ring_config() - Send the tlv config to fw for monitor buffer
  4734. * ring based on target
  4735. * @soc: soc handle
  4736. * @mac_for_pdev: pdev_id
  4737. * @pdev: physical device handle
  4738. * @ring_num: mac id
  4739. * @htt_tlv_filter: tlv filter
  4740. *
  4741. * Return: zero on success, non-zero on failure
  4742. */
  4743. static inline
  4744. QDF_STATUS dp_monitor_mode_ring_config(struct dp_soc *soc, uint8_t mac_for_pdev,
  4745. struct dp_pdev *pdev, uint8_t ring_num,
  4746. struct htt_rx_ring_tlv_filter htt_tlv_filter)
  4747. {
  4748. QDF_STATUS status;
  4749. if (soc->wlan_cfg_ctx->rxdma1_enable)
  4750. status = htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4751. pdev->rxdma_mon_buf_ring[ring_num]
  4752. .hal_srng,
  4753. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE,
  4754. &htt_tlv_filter);
  4755. else
  4756. status = htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4757. pdev->rx_mac_buf_ring[ring_num]
  4758. .hal_srng,
  4759. RXDMA_BUF, RX_BUFFER_SIZE,
  4760. &htt_tlv_filter);
  4761. return status;
  4762. }
  4763. /**
  4764. * dp_reset_monitor_mode() - Disable monitor mode
  4765. * @pdev_handle: Datapath PDEV handle
  4766. *
  4767. * Return: 0 on success, not 0 on failure
  4768. */
  4769. static QDF_STATUS dp_reset_monitor_mode(struct cdp_pdev *pdev_handle)
  4770. {
  4771. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4772. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4773. struct dp_soc *soc = pdev->soc;
  4774. uint8_t pdev_id;
  4775. int mac_id;
  4776. QDF_STATUS status = QDF_STATUS_SUCCESS;
  4777. pdev_id = pdev->pdev_id;
  4778. soc = pdev->soc;
  4779. qdf_spin_lock_bh(&pdev->mon_lock);
  4780. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  4781. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4782. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  4783. status = dp_monitor_mode_ring_config(soc, mac_for_pdev,
  4784. pdev, mac_id,
  4785. htt_tlv_filter);
  4786. if (status != QDF_STATUS_SUCCESS) {
  4787. dp_err("Failed to send tlv filter for monitor mode rings");
  4788. return status;
  4789. }
  4790. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4791. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4792. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE,
  4793. &htt_tlv_filter);
  4794. }
  4795. pdev->monitor_vdev = NULL;
  4796. pdev->mcopy_mode = 0;
  4797. pdev->monitor_configured = false;
  4798. qdf_spin_unlock_bh(&pdev->mon_lock);
  4799. return QDF_STATUS_SUCCESS;
  4800. }
  4801. /**
  4802. * dp_set_nac() - set peer_nac
  4803. * @peer_handle: Datapath PEER handle
  4804. *
  4805. * Return: void
  4806. */
  4807. static void dp_set_nac(struct cdp_peer *peer_handle)
  4808. {
  4809. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4810. peer->nac = 1;
  4811. }
  4812. /**
  4813. * dp_get_tx_pending() - read pending tx
  4814. * @pdev_handle: Datapath PDEV handle
  4815. *
  4816. * Return: outstanding tx
  4817. */
  4818. static int dp_get_tx_pending(struct cdp_pdev *pdev_handle)
  4819. {
  4820. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4821. return qdf_atomic_read(&pdev->num_tx_outstanding);
  4822. }
  4823. /**
  4824. * dp_get_peer_mac_from_peer_id() - get peer mac
  4825. * @pdev_handle: Datapath PDEV handle
  4826. * @peer_id: Peer ID
  4827. * @peer_mac: MAC addr of PEER
  4828. *
  4829. * Return: void
  4830. */
  4831. static void dp_get_peer_mac_from_peer_id(struct cdp_pdev *pdev_handle,
  4832. uint32_t peer_id, uint8_t *peer_mac)
  4833. {
  4834. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4835. struct dp_peer *peer;
  4836. if (pdev && peer_mac) {
  4837. peer = dp_peer_find_by_id(pdev->soc, (uint16_t)peer_id);
  4838. if (peer) {
  4839. qdf_mem_copy(peer_mac, peer->mac_addr.raw,
  4840. DP_MAC_ADDR_LEN);
  4841. dp_peer_unref_del_find_by_id(peer);
  4842. }
  4843. }
  4844. }
  4845. /**
  4846. * dp_pdev_configure_monitor_rings() - configure monitor rings
  4847. * @vdev_handle: Datapath VDEV handle
  4848. *
  4849. * Return: void
  4850. */
  4851. static QDF_STATUS dp_pdev_configure_monitor_rings(struct dp_pdev *pdev)
  4852. {
  4853. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4854. struct dp_soc *soc;
  4855. uint8_t pdev_id;
  4856. int mac_id;
  4857. QDF_STATUS status = QDF_STATUS_SUCCESS;
  4858. pdev_id = pdev->pdev_id;
  4859. soc = pdev->soc;
  4860. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  4861. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]",
  4862. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  4863. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  4864. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  4865. pdev->mo_data_filter);
  4866. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  4867. htt_tlv_filter.mpdu_start = 1;
  4868. htt_tlv_filter.msdu_start = 1;
  4869. htt_tlv_filter.packet = 1;
  4870. htt_tlv_filter.msdu_end = 1;
  4871. htt_tlv_filter.mpdu_end = 1;
  4872. htt_tlv_filter.packet_header = 1;
  4873. htt_tlv_filter.attention = 1;
  4874. htt_tlv_filter.ppdu_start = 0;
  4875. htt_tlv_filter.ppdu_end = 0;
  4876. htt_tlv_filter.ppdu_end_user_stats = 0;
  4877. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  4878. htt_tlv_filter.ppdu_end_status_done = 0;
  4879. htt_tlv_filter.header_per_msdu = 1;
  4880. htt_tlv_filter.enable_fp =
  4881. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  4882. htt_tlv_filter.enable_md = 0;
  4883. htt_tlv_filter.enable_mo =
  4884. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  4885. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  4886. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  4887. if (pdev->mcopy_mode)
  4888. htt_tlv_filter.fp_data_filter = 0;
  4889. else
  4890. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  4891. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  4892. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  4893. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  4894. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4895. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  4896. status = dp_monitor_mode_ring_config(soc, mac_for_pdev,
  4897. pdev, mac_id,
  4898. htt_tlv_filter);
  4899. if (status != QDF_STATUS_SUCCESS) {
  4900. dp_err("Failed to send tlv filter for monitor mode rings");
  4901. return status;
  4902. }
  4903. }
  4904. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  4905. htt_tlv_filter.mpdu_start = 1;
  4906. htt_tlv_filter.msdu_start = 0;
  4907. htt_tlv_filter.packet = 0;
  4908. htt_tlv_filter.msdu_end = 0;
  4909. htt_tlv_filter.mpdu_end = 0;
  4910. htt_tlv_filter.attention = 0;
  4911. htt_tlv_filter.ppdu_start = 1;
  4912. htt_tlv_filter.ppdu_end = 1;
  4913. htt_tlv_filter.ppdu_end_user_stats = 1;
  4914. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  4915. htt_tlv_filter.ppdu_end_status_done = 1;
  4916. htt_tlv_filter.enable_fp = 1;
  4917. htt_tlv_filter.enable_md = 0;
  4918. htt_tlv_filter.enable_mo = 1;
  4919. if (pdev->mcopy_mode) {
  4920. htt_tlv_filter.packet_header = 1;
  4921. }
  4922. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  4923. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  4924. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  4925. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  4926. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  4927. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  4928. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4929. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  4930. pdev->pdev_id);
  4931. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4932. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4933. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4934. }
  4935. return status;
  4936. }
  4937. /**
  4938. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  4939. * @vdev_handle: Datapath VDEV handle
  4940. * @smart_monitor: Flag to denote if its smart monitor mode
  4941. *
  4942. * Return: 0 on success, not 0 on failure
  4943. */
  4944. static QDF_STATUS dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  4945. uint8_t smart_monitor)
  4946. {
  4947. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4948. struct dp_pdev *pdev;
  4949. qdf_assert(vdev);
  4950. pdev = vdev->pdev;
  4951. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  4952. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  4953. pdev, pdev->pdev_id, pdev->soc, vdev);
  4954. /*Check if current pdev's monitor_vdev exists */
  4955. if (pdev->monitor_configured) {
  4956. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4957. "monitor vap already created vdev=%pK\n", vdev);
  4958. qdf_assert(vdev);
  4959. return QDF_STATUS_E_RESOURCES;
  4960. }
  4961. pdev->monitor_vdev = vdev;
  4962. pdev->monitor_configured = true;
  4963. /* If smart monitor mode, do not configure monitor ring */
  4964. if (smart_monitor)
  4965. return QDF_STATUS_SUCCESS;
  4966. return dp_pdev_configure_monitor_rings(pdev);
  4967. }
  4968. /**
  4969. * dp_pdev_set_advance_monitor_filter() - Set DP PDEV monitor filter
  4970. * @pdev_handle: Datapath PDEV handle
  4971. * @filter_val: Flag to select Filter for monitor mode
  4972. * Return: 0 on success, not 0 on failure
  4973. */
  4974. static QDF_STATUS
  4975. dp_pdev_set_advance_monitor_filter(struct cdp_pdev *pdev_handle,
  4976. struct cdp_monitor_filter *filter_val)
  4977. {
  4978. /* Many monitor VAPs can exists in a system but only one can be up at
  4979. * anytime
  4980. */
  4981. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4982. struct dp_vdev *vdev = pdev->monitor_vdev;
  4983. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4984. struct dp_soc *soc;
  4985. uint8_t pdev_id;
  4986. int mac_id;
  4987. QDF_STATUS status = QDF_STATUS_SUCCESS;
  4988. pdev_id = pdev->pdev_id;
  4989. soc = pdev->soc;
  4990. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  4991. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK",
  4992. pdev, pdev_id, soc, vdev);
  4993. /*Check if current pdev's monitor_vdev exists */
  4994. if (!pdev->monitor_vdev) {
  4995. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4996. "vdev=%pK", vdev);
  4997. qdf_assert(vdev);
  4998. }
  4999. /* update filter mode, type in pdev structure */
  5000. pdev->mon_filter_mode = filter_val->mode;
  5001. pdev->fp_mgmt_filter = filter_val->fp_mgmt;
  5002. pdev->fp_ctrl_filter = filter_val->fp_ctrl;
  5003. pdev->fp_data_filter = filter_val->fp_data;
  5004. pdev->mo_mgmt_filter = filter_val->mo_mgmt;
  5005. pdev->mo_ctrl_filter = filter_val->mo_ctrl;
  5006. pdev->mo_data_filter = filter_val->mo_data;
  5007. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  5008. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]",
  5009. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  5010. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  5011. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  5012. pdev->mo_data_filter);
  5013. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  5014. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5015. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  5016. status = dp_monitor_mode_ring_config(soc, mac_for_pdev,
  5017. pdev, mac_id,
  5018. htt_tlv_filter);
  5019. if (status != QDF_STATUS_SUCCESS) {
  5020. dp_err("Failed to send tlv filter for monitor mode rings");
  5021. return status;
  5022. }
  5023. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  5024. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5025. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5026. }
  5027. htt_tlv_filter.mpdu_start = 1;
  5028. htt_tlv_filter.msdu_start = 1;
  5029. htt_tlv_filter.packet = 1;
  5030. htt_tlv_filter.msdu_end = 1;
  5031. htt_tlv_filter.mpdu_end = 1;
  5032. htt_tlv_filter.packet_header = 1;
  5033. htt_tlv_filter.attention = 1;
  5034. htt_tlv_filter.ppdu_start = 0;
  5035. htt_tlv_filter.ppdu_end = 0;
  5036. htt_tlv_filter.ppdu_end_user_stats = 0;
  5037. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  5038. htt_tlv_filter.ppdu_end_status_done = 0;
  5039. htt_tlv_filter.header_per_msdu = 1;
  5040. htt_tlv_filter.enable_fp =
  5041. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  5042. htt_tlv_filter.enable_md = 0;
  5043. htt_tlv_filter.enable_mo =
  5044. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  5045. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  5046. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  5047. if (pdev->mcopy_mode)
  5048. htt_tlv_filter.fp_data_filter = 0;
  5049. else
  5050. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  5051. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  5052. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  5053. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  5054. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5055. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  5056. status = dp_monitor_mode_ring_config(soc, mac_for_pdev,
  5057. pdev, mac_id,
  5058. htt_tlv_filter);
  5059. if (status != QDF_STATUS_SUCCESS) {
  5060. dp_err("Failed to send tlv filter for monitor mode rings");
  5061. return status;
  5062. }
  5063. }
  5064. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  5065. htt_tlv_filter.mpdu_start = 1;
  5066. htt_tlv_filter.msdu_start = 0;
  5067. htt_tlv_filter.packet = 0;
  5068. htt_tlv_filter.msdu_end = 0;
  5069. htt_tlv_filter.mpdu_end = 0;
  5070. htt_tlv_filter.attention = 0;
  5071. htt_tlv_filter.ppdu_start = 1;
  5072. htt_tlv_filter.ppdu_end = 1;
  5073. htt_tlv_filter.ppdu_end_user_stats = 1;
  5074. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5075. htt_tlv_filter.ppdu_end_status_done = 1;
  5076. htt_tlv_filter.enable_fp = 1;
  5077. htt_tlv_filter.enable_md = 0;
  5078. htt_tlv_filter.enable_mo = 1;
  5079. if (pdev->mcopy_mode) {
  5080. htt_tlv_filter.packet_header = 1;
  5081. }
  5082. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5083. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5084. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5085. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5086. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5087. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5088. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5089. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5090. pdev->pdev_id);
  5091. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  5092. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5093. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5094. }
  5095. return QDF_STATUS_SUCCESS;
  5096. }
  5097. /**
  5098. * dp_get_pdev_id_frm_pdev() - get pdev_id
  5099. * @pdev_handle: Datapath PDEV handle
  5100. *
  5101. * Return: pdev_id
  5102. */
  5103. static
  5104. uint8_t dp_get_pdev_id_frm_pdev(struct cdp_pdev *pdev_handle)
  5105. {
  5106. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5107. return pdev->pdev_id;
  5108. }
  5109. /**
  5110. * dp_pdev_set_chan_noise_floor() - set channel noise floor
  5111. * @pdev_handle: Datapath PDEV handle
  5112. * @chan_noise_floor: Channel Noise Floor
  5113. *
  5114. * Return: void
  5115. */
  5116. static
  5117. void dp_pdev_set_chan_noise_floor(struct cdp_pdev *pdev_handle,
  5118. int16_t chan_noise_floor)
  5119. {
  5120. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5121. pdev->chan_noise_floor = chan_noise_floor;
  5122. }
  5123. /**
  5124. * dp_vdev_get_filter_ucast_data() - get DP VDEV monitor ucast filter
  5125. * @vdev_handle: Datapath VDEV handle
  5126. * Return: true on ucast filter flag set
  5127. */
  5128. static bool dp_vdev_get_filter_ucast_data(struct cdp_vdev *vdev_handle)
  5129. {
  5130. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5131. struct dp_pdev *pdev;
  5132. pdev = vdev->pdev;
  5133. if ((pdev->fp_data_filter & FILTER_DATA_UCAST) ||
  5134. (pdev->mo_data_filter & FILTER_DATA_UCAST))
  5135. return true;
  5136. return false;
  5137. }
  5138. /**
  5139. * dp_vdev_get_filter_mcast_data() - get DP VDEV monitor mcast filter
  5140. * @vdev_handle: Datapath VDEV handle
  5141. * Return: true on mcast filter flag set
  5142. */
  5143. static bool dp_vdev_get_filter_mcast_data(struct cdp_vdev *vdev_handle)
  5144. {
  5145. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5146. struct dp_pdev *pdev;
  5147. pdev = vdev->pdev;
  5148. if ((pdev->fp_data_filter & FILTER_DATA_MCAST) ||
  5149. (pdev->mo_data_filter & FILTER_DATA_MCAST))
  5150. return true;
  5151. return false;
  5152. }
  5153. /**
  5154. * dp_vdev_get_filter_non_data() - get DP VDEV monitor non_data filter
  5155. * @vdev_handle: Datapath VDEV handle
  5156. * Return: true on non data filter flag set
  5157. */
  5158. static bool dp_vdev_get_filter_non_data(struct cdp_vdev *vdev_handle)
  5159. {
  5160. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5161. struct dp_pdev *pdev;
  5162. pdev = vdev->pdev;
  5163. if ((pdev->fp_mgmt_filter & FILTER_MGMT_ALL) ||
  5164. (pdev->mo_mgmt_filter & FILTER_MGMT_ALL)) {
  5165. if ((pdev->fp_ctrl_filter & FILTER_CTRL_ALL) ||
  5166. (pdev->mo_ctrl_filter & FILTER_CTRL_ALL)) {
  5167. return true;
  5168. }
  5169. }
  5170. return false;
  5171. }
  5172. #ifdef MESH_MODE_SUPPORT
  5173. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  5174. {
  5175. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  5176. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5177. FL("val %d"), val);
  5178. vdev->mesh_vdev = val;
  5179. }
  5180. /*
  5181. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  5182. * @vdev_hdl: virtual device object
  5183. * @val: value to be set
  5184. *
  5185. * Return: void
  5186. */
  5187. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  5188. {
  5189. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  5190. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5191. FL("val %d"), val);
  5192. vdev->mesh_rx_filter = val;
  5193. }
  5194. #endif
  5195. /*
  5196. * dp_aggregate_pdev_ctrl_frames_stats()- function to agreegate peer stats
  5197. * Current scope is bar received count
  5198. *
  5199. * @pdev_handle: DP_PDEV handle
  5200. *
  5201. * Return: void
  5202. */
  5203. #define STATS_PROC_TIMEOUT (HZ/1000)
  5204. static void
  5205. dp_aggregate_pdev_ctrl_frames_stats(struct dp_pdev *pdev)
  5206. {
  5207. struct dp_vdev *vdev;
  5208. struct dp_peer *peer;
  5209. uint32_t waitcnt;
  5210. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  5211. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  5212. if (!peer) {
  5213. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5214. FL("DP Invalid Peer refernce"));
  5215. return;
  5216. }
  5217. if (peer->delete_in_progress) {
  5218. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5219. FL("DP Peer deletion in progress"));
  5220. continue;
  5221. }
  5222. qdf_atomic_inc(&peer->ref_cnt);
  5223. waitcnt = 0;
  5224. dp_peer_rxtid_stats(peer, dp_rx_bar_stats_cb, pdev);
  5225. while (!(qdf_atomic_read(&(pdev->stats_cmd_complete)))
  5226. && waitcnt < 10) {
  5227. schedule_timeout_interruptible(
  5228. STATS_PROC_TIMEOUT);
  5229. waitcnt++;
  5230. }
  5231. qdf_atomic_set(&(pdev->stats_cmd_complete), 0);
  5232. dp_peer_unref_delete(peer);
  5233. }
  5234. }
  5235. }
  5236. /**
  5237. * dp_rx_bar_stats_cb(): BAR received stats callback
  5238. * @soc: SOC handle
  5239. * @cb_ctxt: Call back context
  5240. * @reo_status: Reo status
  5241. *
  5242. * return: void
  5243. */
  5244. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  5245. union hal_reo_status *reo_status)
  5246. {
  5247. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  5248. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  5249. if (!qdf_atomic_read(&soc->cmn_init_done))
  5250. return;
  5251. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  5252. DP_TRACE_STATS(FATAL, "REO stats failure %d \n",
  5253. queue_status->header.status);
  5254. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  5255. return;
  5256. }
  5257. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  5258. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  5259. }
  5260. /**
  5261. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  5262. * @vdev: DP VDEV handle
  5263. *
  5264. * return: void
  5265. */
  5266. void dp_aggregate_vdev_stats(struct dp_vdev *vdev,
  5267. struct cdp_vdev_stats *vdev_stats)
  5268. {
  5269. struct dp_peer *peer = NULL;
  5270. struct dp_soc *soc = NULL;
  5271. if (!vdev || !vdev->pdev)
  5272. return;
  5273. soc = vdev->pdev->soc;
  5274. qdf_mem_copy(vdev_stats, &vdev->stats, sizeof(vdev->stats));
  5275. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem)
  5276. dp_update_vdev_stats(vdev_stats, peer);
  5277. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  5278. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  5279. vdev_stats, vdev->vdev_id,
  5280. UPDATE_VDEV_STATS, vdev->pdev->pdev_id);
  5281. #endif
  5282. }
  5283. /**
  5284. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  5285. * @pdev: DP PDEV handle
  5286. *
  5287. * return: void
  5288. */
  5289. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  5290. {
  5291. struct dp_vdev *vdev = NULL;
  5292. struct dp_soc *soc;
  5293. struct cdp_vdev_stats *vdev_stats =
  5294. qdf_mem_malloc(sizeof(struct cdp_vdev_stats));
  5295. if (!vdev_stats) {
  5296. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5297. "DP alloc failure - unable to get alloc vdev stats");
  5298. return;
  5299. }
  5300. qdf_mem_zero(&pdev->stats.tx, sizeof(pdev->stats.tx));
  5301. qdf_mem_zero(&pdev->stats.rx, sizeof(pdev->stats.rx));
  5302. qdf_mem_zero(&pdev->stats.tx_i, sizeof(pdev->stats.tx_i));
  5303. if (pdev->mcopy_mode)
  5304. DP_UPDATE_STATS(pdev, pdev->invalid_peer);
  5305. soc = pdev->soc;
  5306. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  5307. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  5308. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  5309. dp_aggregate_vdev_stats(vdev, vdev_stats);
  5310. dp_update_pdev_stats(pdev, vdev_stats);
  5311. dp_update_pdev_ingress_stats(pdev, vdev);
  5312. }
  5313. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  5314. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  5315. qdf_mem_free(vdev_stats);
  5316. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  5317. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, pdev->soc, &pdev->stats,
  5318. pdev->pdev_id, UPDATE_PDEV_STATS, pdev->pdev_id);
  5319. #endif
  5320. }
  5321. /**
  5322. * dp_vdev_getstats() - get vdev packet level stats
  5323. * @vdev_handle: Datapath VDEV handle
  5324. * @stats: cdp network device stats structure
  5325. *
  5326. * Return: void
  5327. */
  5328. static void dp_vdev_getstats(void *vdev_handle,
  5329. struct cdp_dev_stats *stats)
  5330. {
  5331. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5332. struct dp_pdev *pdev;
  5333. struct dp_soc *soc;
  5334. struct cdp_vdev_stats *vdev_stats;
  5335. if (!vdev)
  5336. return;
  5337. pdev = vdev->pdev;
  5338. if (!pdev)
  5339. return;
  5340. soc = pdev->soc;
  5341. vdev_stats = qdf_mem_malloc(sizeof(struct cdp_vdev_stats));
  5342. if (!vdev_stats) {
  5343. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5344. "DP alloc failure - unable to get alloc vdev stats");
  5345. return;
  5346. }
  5347. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  5348. dp_aggregate_vdev_stats(vdev, vdev_stats);
  5349. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  5350. stats->tx_packets = vdev_stats->tx_i.rcvd.num;
  5351. stats->tx_bytes = vdev_stats->tx_i.rcvd.bytes;
  5352. stats->tx_errors = vdev_stats->tx.tx_failed +
  5353. vdev_stats->tx_i.dropped.dropped_pkt.num;
  5354. stats->tx_dropped = stats->tx_errors;
  5355. stats->rx_packets = vdev_stats->rx.unicast.num +
  5356. vdev_stats->rx.multicast.num +
  5357. vdev_stats->rx.bcast.num;
  5358. stats->rx_bytes = vdev_stats->rx.unicast.bytes +
  5359. vdev_stats->rx.multicast.bytes +
  5360. vdev_stats->rx.bcast.bytes;
  5361. }
  5362. /**
  5363. * dp_pdev_getstats() - get pdev packet level stats
  5364. * @pdev_handle: Datapath PDEV handle
  5365. * @stats: cdp network device stats structure
  5366. *
  5367. * Return: void
  5368. */
  5369. static void dp_pdev_getstats(void *pdev_handle,
  5370. struct cdp_dev_stats *stats)
  5371. {
  5372. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5373. dp_aggregate_pdev_stats(pdev);
  5374. stats->tx_packets = pdev->stats.tx_i.rcvd.num;
  5375. stats->tx_bytes = pdev->stats.tx_i.rcvd.bytes;
  5376. stats->tx_errors = pdev->stats.tx.tx_failed +
  5377. pdev->stats.tx_i.dropped.dropped_pkt.num;
  5378. stats->tx_dropped = stats->tx_errors;
  5379. stats->rx_packets = pdev->stats.rx.unicast.num +
  5380. pdev->stats.rx.multicast.num +
  5381. pdev->stats.rx.bcast.num;
  5382. stats->rx_bytes = pdev->stats.rx.unicast.bytes +
  5383. pdev->stats.rx.multicast.bytes +
  5384. pdev->stats.rx.bcast.bytes;
  5385. }
  5386. /**
  5387. * dp_get_device_stats() - get interface level packet stats
  5388. * @handle: device handle
  5389. * @stats: cdp network device stats structure
  5390. * @type: device type pdev/vdev
  5391. *
  5392. * Return: void
  5393. */
  5394. static void dp_get_device_stats(void *handle,
  5395. struct cdp_dev_stats *stats, uint8_t type)
  5396. {
  5397. switch (type) {
  5398. case UPDATE_VDEV_STATS:
  5399. dp_vdev_getstats(handle, stats);
  5400. break;
  5401. case UPDATE_PDEV_STATS:
  5402. dp_pdev_getstats(handle, stats);
  5403. break;
  5404. default:
  5405. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  5406. "apstats cannot be updated for this input "
  5407. "type %d", type);
  5408. break;
  5409. }
  5410. }
  5411. /**
  5412. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  5413. * @pdev: DP_PDEV Handle
  5414. *
  5415. * Return:void
  5416. */
  5417. static inline void
  5418. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  5419. {
  5420. uint8_t index = 0;
  5421. DP_PRINT_STATS("PDEV Tx Stats:\n");
  5422. DP_PRINT_STATS("Received From Stack:");
  5423. DP_PRINT_STATS(" Packets = %d",
  5424. pdev->stats.tx_i.rcvd.num);
  5425. DP_PRINT_STATS(" Bytes = %llu",
  5426. pdev->stats.tx_i.rcvd.bytes);
  5427. DP_PRINT_STATS("Processed:");
  5428. DP_PRINT_STATS(" Packets = %d",
  5429. pdev->stats.tx_i.processed.num);
  5430. DP_PRINT_STATS(" Bytes = %llu",
  5431. pdev->stats.tx_i.processed.bytes);
  5432. DP_PRINT_STATS("Total Completions:");
  5433. DP_PRINT_STATS(" Packets = %u",
  5434. pdev->stats.tx.comp_pkt.num);
  5435. DP_PRINT_STATS(" Bytes = %llu",
  5436. pdev->stats.tx.comp_pkt.bytes);
  5437. DP_PRINT_STATS("Successful Completions:");
  5438. DP_PRINT_STATS(" Packets = %u",
  5439. pdev->stats.tx.tx_success.num);
  5440. DP_PRINT_STATS(" Bytes = %llu",
  5441. pdev->stats.tx.tx_success.bytes);
  5442. DP_PRINT_STATS("Dropped:");
  5443. DP_PRINT_STATS(" Total = %d",
  5444. pdev->stats.tx_i.dropped.dropped_pkt.num);
  5445. DP_PRINT_STATS(" Dma_map_error = %d",
  5446. pdev->stats.tx_i.dropped.dma_error);
  5447. DP_PRINT_STATS(" Ring Full = %d",
  5448. pdev->stats.tx_i.dropped.ring_full);
  5449. DP_PRINT_STATS(" Descriptor Not available = %d",
  5450. pdev->stats.tx_i.dropped.desc_na.num);
  5451. DP_PRINT_STATS(" HW enqueue failed= %d",
  5452. pdev->stats.tx_i.dropped.enqueue_fail);
  5453. DP_PRINT_STATS(" Resources Full = %d",
  5454. pdev->stats.tx_i.dropped.res_full);
  5455. DP_PRINT_STATS(" FW removed Pkts = %u",
  5456. pdev->stats.tx.dropped.fw_rem.num);
  5457. DP_PRINT_STATS(" FW removed bytes= %llu",
  5458. pdev->stats.tx.dropped.fw_rem.bytes);
  5459. DP_PRINT_STATS(" FW removed transmitted = %d",
  5460. pdev->stats.tx.dropped.fw_rem_tx);
  5461. DP_PRINT_STATS(" FW removed untransmitted = %d",
  5462. pdev->stats.tx.dropped.fw_rem_notx);
  5463. DP_PRINT_STATS(" FW removed untransmitted fw_reason1 = %d",
  5464. pdev->stats.tx.dropped.fw_reason1);
  5465. DP_PRINT_STATS(" FW removed untransmitted fw_reason2 = %d",
  5466. pdev->stats.tx.dropped.fw_reason2);
  5467. DP_PRINT_STATS(" FW removed untransmitted fw_reason3 = %d",
  5468. pdev->stats.tx.dropped.fw_reason3);
  5469. DP_PRINT_STATS(" Aged Out from msdu/mpdu queues = %d",
  5470. pdev->stats.tx.dropped.age_out);
  5471. DP_PRINT_STATS(" headroom insufficient = %d",
  5472. pdev->stats.tx_i.dropped.headroom_insufficient);
  5473. DP_PRINT_STATS(" Multicast:");
  5474. DP_PRINT_STATS(" Packets: %u",
  5475. pdev->stats.tx.mcast.num);
  5476. DP_PRINT_STATS(" Bytes: %llu",
  5477. pdev->stats.tx.mcast.bytes);
  5478. DP_PRINT_STATS("Scatter Gather:");
  5479. DP_PRINT_STATS(" Packets = %d",
  5480. pdev->stats.tx_i.sg.sg_pkt.num);
  5481. DP_PRINT_STATS(" Bytes = %llu",
  5482. pdev->stats.tx_i.sg.sg_pkt.bytes);
  5483. DP_PRINT_STATS(" Dropped By Host = %d",
  5484. pdev->stats.tx_i.sg.dropped_host.num);
  5485. DP_PRINT_STATS(" Dropped By Target = %d",
  5486. pdev->stats.tx_i.sg.dropped_target);
  5487. DP_PRINT_STATS("TSO:");
  5488. DP_PRINT_STATS(" Number of Segments = %d",
  5489. pdev->stats.tx_i.tso.num_seg);
  5490. DP_PRINT_STATS(" Packets = %d",
  5491. pdev->stats.tx_i.tso.tso_pkt.num);
  5492. DP_PRINT_STATS(" Bytes = %llu",
  5493. pdev->stats.tx_i.tso.tso_pkt.bytes);
  5494. DP_PRINT_STATS(" Dropped By Host = %d",
  5495. pdev->stats.tx_i.tso.dropped_host.num);
  5496. DP_PRINT_STATS("Mcast Enhancement:");
  5497. DP_PRINT_STATS(" Packets = %d",
  5498. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  5499. DP_PRINT_STATS(" Bytes = %llu",
  5500. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  5501. DP_PRINT_STATS(" Dropped: Map Errors = %d",
  5502. pdev->stats.tx_i.mcast_en.dropped_map_error);
  5503. DP_PRINT_STATS(" Dropped: Self Mac = %d",
  5504. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  5505. DP_PRINT_STATS(" Dropped: Send Fail = %d",
  5506. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  5507. DP_PRINT_STATS(" Unicast sent = %d",
  5508. pdev->stats.tx_i.mcast_en.ucast);
  5509. DP_PRINT_STATS("Raw:");
  5510. DP_PRINT_STATS(" Packets = %d",
  5511. pdev->stats.tx_i.raw.raw_pkt.num);
  5512. DP_PRINT_STATS(" Bytes = %llu",
  5513. pdev->stats.tx_i.raw.raw_pkt.bytes);
  5514. DP_PRINT_STATS(" DMA map error = %d",
  5515. pdev->stats.tx_i.raw.dma_map_error);
  5516. DP_PRINT_STATS("Reinjected:");
  5517. DP_PRINT_STATS(" Packets = %d",
  5518. pdev->stats.tx_i.reinject_pkts.num);
  5519. DP_PRINT_STATS(" Bytes = %llu\n",
  5520. pdev->stats.tx_i.reinject_pkts.bytes);
  5521. DP_PRINT_STATS("Inspected:");
  5522. DP_PRINT_STATS(" Packets = %d",
  5523. pdev->stats.tx_i.inspect_pkts.num);
  5524. DP_PRINT_STATS(" Bytes = %llu",
  5525. pdev->stats.tx_i.inspect_pkts.bytes);
  5526. DP_PRINT_STATS("Nawds Multicast:");
  5527. DP_PRINT_STATS(" Packets = %d",
  5528. pdev->stats.tx_i.nawds_mcast.num);
  5529. DP_PRINT_STATS(" Bytes = %llu",
  5530. pdev->stats.tx_i.nawds_mcast.bytes);
  5531. DP_PRINT_STATS("CCE Classified:");
  5532. DP_PRINT_STATS(" CCE Classified Packets: %u",
  5533. pdev->stats.tx_i.cce_classified);
  5534. DP_PRINT_STATS(" RAW CCE Classified Packets: %u",
  5535. pdev->stats.tx_i.cce_classified_raw);
  5536. DP_PRINT_STATS("Mesh stats:");
  5537. DP_PRINT_STATS(" frames to firmware: %u",
  5538. pdev->stats.tx_i.mesh.exception_fw);
  5539. DP_PRINT_STATS(" completions from fw: %u",
  5540. pdev->stats.tx_i.mesh.completion_fw);
  5541. DP_PRINT_STATS("PPDU stats counter");
  5542. for (index = 0; index < CDP_PPDU_STATS_MAX_TAG; index++) {
  5543. DP_PRINT_STATS(" Tag[%d] = %llu", index,
  5544. pdev->stats.ppdu_stats_counter[index]);
  5545. }
  5546. }
  5547. /**
  5548. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  5549. * @pdev: DP_PDEV Handle
  5550. *
  5551. * Return: void
  5552. */
  5553. static inline void
  5554. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  5555. {
  5556. DP_PRINT_STATS("PDEV Rx Stats:\n");
  5557. DP_PRINT_STATS("Received From HW (Per Rx Ring):");
  5558. DP_PRINT_STATS(" Packets = %d %d %d %d",
  5559. pdev->stats.rx.rcvd_reo[0].num,
  5560. pdev->stats.rx.rcvd_reo[1].num,
  5561. pdev->stats.rx.rcvd_reo[2].num,
  5562. pdev->stats.rx.rcvd_reo[3].num);
  5563. DP_PRINT_STATS(" Bytes = %llu %llu %llu %llu",
  5564. pdev->stats.rx.rcvd_reo[0].bytes,
  5565. pdev->stats.rx.rcvd_reo[1].bytes,
  5566. pdev->stats.rx.rcvd_reo[2].bytes,
  5567. pdev->stats.rx.rcvd_reo[3].bytes);
  5568. DP_PRINT_STATS("Replenished:");
  5569. DP_PRINT_STATS(" Packets = %d",
  5570. pdev->stats.replenish.pkts.num);
  5571. DP_PRINT_STATS(" Bytes = %llu",
  5572. pdev->stats.replenish.pkts.bytes);
  5573. DP_PRINT_STATS(" Buffers Added To Freelist = %d",
  5574. pdev->stats.buf_freelist);
  5575. DP_PRINT_STATS(" Low threshold intr = %d",
  5576. pdev->stats.replenish.low_thresh_intrs);
  5577. DP_PRINT_STATS("Dropped:");
  5578. DP_PRINT_STATS(" msdu_not_done = %d",
  5579. pdev->stats.dropped.msdu_not_done);
  5580. DP_PRINT_STATS(" mon_rx_drop = %d",
  5581. pdev->stats.dropped.mon_rx_drop);
  5582. DP_PRINT_STATS(" mec_drop = %d",
  5583. pdev->stats.rx.mec_drop.num);
  5584. DP_PRINT_STATS(" Bytes = %llu",
  5585. pdev->stats.rx.mec_drop.bytes);
  5586. DP_PRINT_STATS("Sent To Stack:");
  5587. DP_PRINT_STATS(" Packets = %d",
  5588. pdev->stats.rx.to_stack.num);
  5589. DP_PRINT_STATS(" Bytes = %llu",
  5590. pdev->stats.rx.to_stack.bytes);
  5591. DP_PRINT_STATS("Multicast/Broadcast:");
  5592. DP_PRINT_STATS(" Packets = %d",
  5593. pdev->stats.rx.multicast.num);
  5594. DP_PRINT_STATS(" Bytes = %llu",
  5595. pdev->stats.rx.multicast.bytes);
  5596. DP_PRINT_STATS("Errors:");
  5597. DP_PRINT_STATS(" Rxdma Ring Un-inititalized = %d",
  5598. pdev->stats.replenish.rxdma_err);
  5599. DP_PRINT_STATS(" Desc Alloc Failed: = %d",
  5600. pdev->stats.err.desc_alloc_fail);
  5601. DP_PRINT_STATS(" IP checksum error = %d",
  5602. pdev->stats.err.ip_csum_err);
  5603. DP_PRINT_STATS(" TCP/UDP checksum error = %d",
  5604. pdev->stats.err.tcp_udp_csum_err);
  5605. /* Get bar_recv_cnt */
  5606. dp_aggregate_pdev_ctrl_frames_stats(pdev);
  5607. DP_PRINT_STATS("BAR Received Count: = %d",
  5608. pdev->stats.rx.bar_recv_cnt);
  5609. }
  5610. /**
  5611. * dp_print_pdev_rx_mon_stats(): Print Pdev level RX monitor stats
  5612. * @pdev: DP_PDEV Handle
  5613. *
  5614. * Return: void
  5615. */
  5616. static inline void
  5617. dp_print_pdev_rx_mon_stats(struct dp_pdev *pdev)
  5618. {
  5619. struct cdp_pdev_mon_stats *rx_mon_stats;
  5620. rx_mon_stats = &pdev->rx_mon_stats;
  5621. DP_PRINT_STATS("PDEV Rx Monitor Stats:\n");
  5622. dp_rx_mon_print_dbg_ppdu_stats(rx_mon_stats);
  5623. DP_PRINT_STATS("status_ppdu_done_cnt = %d",
  5624. rx_mon_stats->status_ppdu_done);
  5625. DP_PRINT_STATS("dest_ppdu_done_cnt = %d",
  5626. rx_mon_stats->dest_ppdu_done);
  5627. DP_PRINT_STATS("dest_mpdu_done_cnt = %d",
  5628. rx_mon_stats->dest_mpdu_done);
  5629. DP_PRINT_STATS("dest_mpdu_drop_cnt = %d",
  5630. rx_mon_stats->dest_mpdu_drop);
  5631. DP_PRINT_STATS("dup_mon_linkdesc_cnt = %d",
  5632. rx_mon_stats->dup_mon_linkdesc_cnt);
  5633. DP_PRINT_STATS("dup_mon_buf_cnt = %d",
  5634. rx_mon_stats->dup_mon_buf_cnt);
  5635. }
  5636. /**
  5637. * dp_print_soc_tx_stats(): Print SOC level stats
  5638. * @soc DP_SOC Handle
  5639. *
  5640. * Return: void
  5641. */
  5642. static inline void
  5643. dp_print_soc_tx_stats(struct dp_soc *soc)
  5644. {
  5645. uint8_t desc_pool_id;
  5646. soc->stats.tx.desc_in_use = 0;
  5647. DP_PRINT_STATS("SOC Tx Stats:\n");
  5648. for (desc_pool_id = 0;
  5649. desc_pool_id < wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5650. desc_pool_id++)
  5651. soc->stats.tx.desc_in_use +=
  5652. soc->tx_desc[desc_pool_id].num_allocated;
  5653. DP_PRINT_STATS("Tx Descriptors In Use = %d",
  5654. soc->stats.tx.desc_in_use);
  5655. DP_PRINT_STATS("Tx Invalid peer:");
  5656. DP_PRINT_STATS(" Packets = %d",
  5657. soc->stats.tx.tx_invalid_peer.num);
  5658. DP_PRINT_STATS(" Bytes = %llu",
  5659. soc->stats.tx.tx_invalid_peer.bytes);
  5660. DP_PRINT_STATS("Packets dropped due to TCL ring full = %d %d %d",
  5661. soc->stats.tx.tcl_ring_full[0],
  5662. soc->stats.tx.tcl_ring_full[1],
  5663. soc->stats.tx.tcl_ring_full[2]);
  5664. }
  5665. /**
  5666. * dp_print_soc_rx_stats: Print SOC level Rx stats
  5667. * @soc: DP_SOC Handle
  5668. *
  5669. * Return:void
  5670. */
  5671. static inline void
  5672. dp_print_soc_rx_stats(struct dp_soc *soc)
  5673. {
  5674. uint32_t i;
  5675. char reo_error[DP_REO_ERR_LENGTH];
  5676. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  5677. uint8_t index = 0;
  5678. DP_PRINT_STATS("No of AST Entries = %d", soc->num_ast_entries);
  5679. DP_PRINT_STATS("SOC Rx Stats:\n");
  5680. DP_PRINT_STATS("Fragmented packets: %u",
  5681. soc->stats.rx.rx_frags);
  5682. DP_PRINT_STATS("Reo reinjected packets: %u",
  5683. soc->stats.rx.reo_reinject);
  5684. DP_PRINT_STATS("Errors:\n");
  5685. DP_PRINT_STATS("Rx Decrypt Errors = %d",
  5686. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  5687. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  5688. DP_PRINT_STATS("Invalid RBM = %d",
  5689. soc->stats.rx.err.invalid_rbm);
  5690. DP_PRINT_STATS("Invalid Vdev = %d",
  5691. soc->stats.rx.err.invalid_vdev);
  5692. DP_PRINT_STATS("Invalid Pdev = %d",
  5693. soc->stats.rx.err.invalid_pdev);
  5694. DP_PRINT_STATS("Invalid Peer = %d",
  5695. soc->stats.rx.err.rx_invalid_peer.num);
  5696. DP_PRINT_STATS("HAL Ring Access Fail = %d",
  5697. soc->stats.rx.err.hal_ring_access_fail);
  5698. DP_PRINT_STATS("RX frags: %d", soc->stats.rx.rx_frags);
  5699. DP_PRINT_STATS("RX frag wait: %d", soc->stats.rx.rx_frag_wait);
  5700. DP_PRINT_STATS("RX frag err: %d", soc->stats.rx.rx_frag_err);
  5701. DP_PRINT_STATS("RX HP out_of_sync: %d", soc->stats.rx.hp_oos);
  5702. DP_PRINT_STATS("RX DUP DESC: %d",
  5703. soc->stats.rx.err.hal_reo_dest_dup);
  5704. DP_PRINT_STATS("RX REL DUP DESC: %d",
  5705. soc->stats.rx.err.hal_wbm_rel_dup);
  5706. for (i = 0; i < HAL_RXDMA_ERR_MAX; i++) {
  5707. index += qdf_snprint(&rxdma_error[index],
  5708. DP_RXDMA_ERR_LENGTH - index,
  5709. " %d", soc->stats.rx.err.rxdma_error[i]);
  5710. }
  5711. DP_PRINT_STATS("RXDMA Error (0-31):%s",
  5712. rxdma_error);
  5713. index = 0;
  5714. for (i = 0; i < HAL_REO_ERR_MAX; i++) {
  5715. index += qdf_snprint(&reo_error[index],
  5716. DP_REO_ERR_LENGTH - index,
  5717. " %d", soc->stats.rx.err.reo_error[i]);
  5718. }
  5719. DP_PRINT_STATS("REO Error(0-14):%s",
  5720. reo_error);
  5721. }
  5722. /**
  5723. * dp_srng_get_str_from_ring_type() - Return string name for a ring
  5724. * @ring_type: Ring
  5725. *
  5726. * Return: char const pointer
  5727. */
  5728. static inline const
  5729. char *dp_srng_get_str_from_hal_ring_type(enum hal_ring_type ring_type)
  5730. {
  5731. switch (ring_type) {
  5732. case REO_DST:
  5733. return "Reo_dst";
  5734. case REO_EXCEPTION:
  5735. return "Reo_exception";
  5736. case REO_CMD:
  5737. return "Reo_cmd";
  5738. case REO_REINJECT:
  5739. return "Reo_reinject";
  5740. case REO_STATUS:
  5741. return "Reo_status";
  5742. case WBM2SW_RELEASE:
  5743. return "wbm2sw_release";
  5744. case TCL_DATA:
  5745. return "tcl_data";
  5746. case TCL_CMD:
  5747. return "tcl_cmd";
  5748. case TCL_STATUS:
  5749. return "tcl_status";
  5750. case SW2WBM_RELEASE:
  5751. return "sw2wbm_release";
  5752. case RXDMA_BUF:
  5753. return "Rxdma_buf";
  5754. case RXDMA_DST:
  5755. return "Rxdma_dst";
  5756. case RXDMA_MONITOR_BUF:
  5757. return "Rxdma_monitor_buf";
  5758. case RXDMA_MONITOR_DESC:
  5759. return "Rxdma_monitor_desc";
  5760. case RXDMA_MONITOR_STATUS:
  5761. return "Rxdma_monitor_status";
  5762. default:
  5763. dp_err("Invalid ring type");
  5764. break;
  5765. }
  5766. return "Invalid";
  5767. }
  5768. /**
  5769. * dp_print_ring_stat_from_hal(): Print hal level ring stats
  5770. * @soc: DP_SOC handle
  5771. * @srng: DP_SRNG handle
  5772. * @ring_name: SRNG name
  5773. * @ring_type: srng src/dst ring
  5774. *
  5775. * Return: void
  5776. */
  5777. static void
  5778. dp_print_ring_stat_from_hal(struct dp_soc *soc, struct dp_srng *srng,
  5779. enum hal_ring_type ring_type)
  5780. {
  5781. uint32_t tailp;
  5782. uint32_t headp;
  5783. int32_t hw_headp = -1;
  5784. int32_t hw_tailp = -1;
  5785. const char *ring_name;
  5786. struct hal_soc *hal_soc;
  5787. if (soc && srng && srng->hal_srng) {
  5788. hal_soc = (struct hal_soc *)soc->hal_soc;
  5789. ring_name = dp_srng_get_str_from_hal_ring_type(ring_type);
  5790. hal_get_sw_hptp(soc->hal_soc, srng->hal_srng, &tailp, &headp);
  5791. DP_PRINT_STATS("%s:SW:Head pointer = %d Tail Pointer = %d\n",
  5792. ring_name, headp, tailp);
  5793. hal_get_hw_hptp(hal_soc, srng->hal_srng, &hw_headp,
  5794. &hw_tailp, ring_type);
  5795. DP_PRINT_STATS("%s:HW:Head pointer = %d Tail Pointer = %d\n",
  5796. ring_name, hw_headp, hw_tailp);
  5797. }
  5798. }
  5799. /**
  5800. * dp_print_mon_ring_stats_from_hal() - Print stat for monitor rings based
  5801. * on target
  5802. * @pdev: physical device handle
  5803. * @mac_id: mac id
  5804. *
  5805. * Return: void
  5806. */
  5807. static inline
  5808. void dp_print_mon_ring_stat_from_hal(struct dp_pdev *pdev, uint8_t mac_id)
  5809. {
  5810. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable) {
  5811. dp_print_ring_stat_from_hal(pdev->soc,
  5812. &pdev->rxdma_mon_buf_ring[mac_id],
  5813. RXDMA_MONITOR_BUF);
  5814. dp_print_ring_stat_from_hal(pdev->soc,
  5815. &pdev->rxdma_mon_dst_ring[mac_id],
  5816. RXDMA_MONITOR_DST);
  5817. dp_print_ring_stat_from_hal(pdev->soc,
  5818. &pdev->rxdma_mon_desc_ring[mac_id],
  5819. RXDMA_MONITOR_DESC);
  5820. }
  5821. dp_print_ring_stat_from_hal(pdev->soc,
  5822. &pdev->rxdma_mon_status_ring[mac_id],
  5823. RXDMA_MONITOR_STATUS);
  5824. }
  5825. /**
  5826. * dp_print_ring_stats(): Print tail and head pointer
  5827. * @pdev: DP_PDEV handle
  5828. *
  5829. * Return:void
  5830. */
  5831. static inline void
  5832. dp_print_ring_stats(struct dp_pdev *pdev)
  5833. {
  5834. uint32_t i;
  5835. int mac_id;
  5836. dp_print_ring_stat_from_hal(pdev->soc,
  5837. &pdev->soc->reo_exception_ring,
  5838. REO_EXCEPTION);
  5839. dp_print_ring_stat_from_hal(pdev->soc,
  5840. &pdev->soc->reo_reinject_ring,
  5841. REO_REINJECT);
  5842. dp_print_ring_stat_from_hal(pdev->soc,
  5843. &pdev->soc->reo_cmd_ring,
  5844. REO_CMD);
  5845. dp_print_ring_stat_from_hal(pdev->soc,
  5846. &pdev->soc->reo_status_ring,
  5847. REO_STATUS);
  5848. dp_print_ring_stat_from_hal(pdev->soc,
  5849. &pdev->soc->rx_rel_ring,
  5850. WBM2SW_RELEASE);
  5851. dp_print_ring_stat_from_hal(pdev->soc,
  5852. &pdev->soc->tcl_cmd_ring,
  5853. TCL_CMD);
  5854. dp_print_ring_stat_from_hal(pdev->soc,
  5855. &pdev->soc->tcl_status_ring,
  5856. TCL_STATUS);
  5857. dp_print_ring_stat_from_hal(pdev->soc,
  5858. &pdev->soc->wbm_desc_rel_ring,
  5859. SW2WBM_RELEASE);
  5860. for (i = 0; i < MAX_REO_DEST_RINGS; i++)
  5861. dp_print_ring_stat_from_hal(pdev->soc,
  5862. &pdev->soc->reo_dest_ring[i],
  5863. REO_DST);
  5864. for (i = 0; i < pdev->soc->num_tcl_data_rings; i++)
  5865. dp_print_ring_stat_from_hal(pdev->soc,
  5866. &pdev->soc->tcl_data_ring[i],
  5867. TCL_DATA);
  5868. for (i = 0; i < MAX_TCL_DATA_RINGS; i++)
  5869. dp_print_ring_stat_from_hal(pdev->soc,
  5870. &pdev->soc->tx_comp_ring[i],
  5871. WBM2SW_RELEASE);
  5872. dp_print_ring_stat_from_hal(pdev->soc,
  5873. &pdev->rx_refill_buf_ring,
  5874. RXDMA_BUF);
  5875. dp_print_ring_stat_from_hal(pdev->soc,
  5876. &pdev->rx_refill_buf_ring2,
  5877. RXDMA_BUF);
  5878. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  5879. dp_print_ring_stat_from_hal(pdev->soc,
  5880. &pdev->rx_mac_buf_ring[i],
  5881. RXDMA_BUF);
  5882. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++)
  5883. dp_print_mon_ring_stat_from_hal(pdev, mac_id);
  5884. for (i = 0; i < NUM_RXDMA_RINGS_PER_PDEV; i++)
  5885. dp_print_ring_stat_from_hal(pdev->soc,
  5886. &pdev->rxdma_err_dst_ring[i],
  5887. RXDMA_DST);
  5888. }
  5889. /**
  5890. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  5891. * @vdev: DP_VDEV handle
  5892. *
  5893. * Return:void
  5894. */
  5895. static inline void
  5896. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  5897. {
  5898. struct dp_peer *peer = NULL;
  5899. if (!vdev || !vdev->pdev)
  5900. return;
  5901. DP_STATS_CLR(vdev->pdev);
  5902. DP_STATS_CLR(vdev->pdev->soc);
  5903. DP_STATS_CLR(vdev);
  5904. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  5905. if (!peer)
  5906. return;
  5907. DP_STATS_CLR(peer);
  5908. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  5909. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  5910. &peer->stats, peer->peer_ids[0],
  5911. UPDATE_PEER_STATS, vdev->pdev->pdev_id);
  5912. #endif
  5913. }
  5914. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  5915. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  5916. &vdev->stats, vdev->vdev_id,
  5917. UPDATE_VDEV_STATS, vdev->pdev->pdev_id);
  5918. #endif
  5919. }
  5920. /**
  5921. * dp_print_common_rates_info(): Print common rate for tx or rx
  5922. * @pkt_type_array: rate type array contains rate info
  5923. *
  5924. * Return:void
  5925. */
  5926. static inline void
  5927. dp_print_common_rates_info(struct cdp_pkt_type *pkt_type_array)
  5928. {
  5929. uint8_t mcs, pkt_type;
  5930. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  5931. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  5932. if (!dp_rate_string[pkt_type][mcs].valid)
  5933. continue;
  5934. DP_PRINT_STATS(" %s = %d",
  5935. dp_rate_string[pkt_type][mcs].mcs_type,
  5936. pkt_type_array[pkt_type].mcs_count[mcs]);
  5937. }
  5938. DP_PRINT_STATS("\n");
  5939. }
  5940. }
  5941. /**
  5942. * dp_print_rx_rates(): Print Rx rate stats
  5943. * @vdev: DP_VDEV handle
  5944. *
  5945. * Return:void
  5946. */
  5947. static inline void
  5948. dp_print_rx_rates(struct dp_vdev *vdev)
  5949. {
  5950. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  5951. uint8_t i;
  5952. uint8_t index = 0;
  5953. char nss[DP_NSS_LENGTH];
  5954. DP_PRINT_STATS("Rx Rate Info:\n");
  5955. dp_print_common_rates_info(pdev->stats.rx.pkt_type);
  5956. index = 0;
  5957. for (i = 0; i < SS_COUNT; i++) {
  5958. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  5959. " %d", pdev->stats.rx.nss[i]);
  5960. }
  5961. DP_PRINT_STATS("NSS(1-8) = %s",
  5962. nss);
  5963. DP_PRINT_STATS("SGI ="
  5964. " 0.8us %d,"
  5965. " 0.4us %d,"
  5966. " 1.6us %d,"
  5967. " 3.2us %d,",
  5968. pdev->stats.rx.sgi_count[0],
  5969. pdev->stats.rx.sgi_count[1],
  5970. pdev->stats.rx.sgi_count[2],
  5971. pdev->stats.rx.sgi_count[3]);
  5972. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  5973. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  5974. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  5975. DP_PRINT_STATS("Reception Type ="
  5976. " SU: %d,"
  5977. " MU_MIMO:%d,"
  5978. " MU_OFDMA:%d,"
  5979. " MU_OFDMA_MIMO:%d\n",
  5980. pdev->stats.rx.reception_type[0],
  5981. pdev->stats.rx.reception_type[1],
  5982. pdev->stats.rx.reception_type[2],
  5983. pdev->stats.rx.reception_type[3]);
  5984. DP_PRINT_STATS("Aggregation:\n");
  5985. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  5986. pdev->stats.rx.ampdu_cnt);
  5987. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  5988. pdev->stats.rx.non_ampdu_cnt);
  5989. DP_PRINT_STATS("Number of Msdu's Part of Amsdu: %d",
  5990. pdev->stats.rx.amsdu_cnt);
  5991. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation: %d",
  5992. pdev->stats.rx.non_amsdu_cnt);
  5993. }
  5994. /**
  5995. * dp_print_tx_rates(): Print tx rates
  5996. * @vdev: DP_VDEV handle
  5997. *
  5998. * Return:void
  5999. */
  6000. static inline void
  6001. dp_print_tx_rates(struct dp_vdev *vdev)
  6002. {
  6003. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  6004. uint8_t index;
  6005. char nss[DP_NSS_LENGTH];
  6006. int nss_index;
  6007. DP_PRINT_STATS("Tx Rate Info:\n");
  6008. dp_print_common_rates_info(pdev->stats.tx.pkt_type);
  6009. DP_PRINT_STATS("SGI ="
  6010. " 0.8us %d"
  6011. " 0.4us %d"
  6012. " 1.6us %d"
  6013. " 3.2us %d",
  6014. pdev->stats.tx.sgi_count[0],
  6015. pdev->stats.tx.sgi_count[1],
  6016. pdev->stats.tx.sgi_count[2],
  6017. pdev->stats.tx.sgi_count[3]);
  6018. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  6019. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  6020. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  6021. index = 0;
  6022. for (nss_index = 0; nss_index < SS_COUNT; nss_index++) {
  6023. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  6024. " %d", pdev->stats.tx.nss[nss_index]);
  6025. }
  6026. DP_PRINT_STATS("NSS(1-8) = %s", nss);
  6027. DP_PRINT_STATS("OFDMA = %d", pdev->stats.tx.ofdma);
  6028. DP_PRINT_STATS("STBC = %d", pdev->stats.tx.stbc);
  6029. DP_PRINT_STATS("LDPC = %d", pdev->stats.tx.ldpc);
  6030. DP_PRINT_STATS("Retries = %d", pdev->stats.tx.retries);
  6031. DP_PRINT_STATS("Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  6032. DP_PRINT_STATS("Aggregation:\n");
  6033. DP_PRINT_STATS("Number of Msdu's Part of Amsdu = %d",
  6034. pdev->stats.tx.amsdu_cnt);
  6035. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation = %d",
  6036. pdev->stats.tx.non_amsdu_cnt);
  6037. }
  6038. /**
  6039. * dp_print_peer_stats():print peer stats
  6040. * @peer: DP_PEER handle
  6041. *
  6042. * return void
  6043. */
  6044. static inline void dp_print_peer_stats(struct dp_peer *peer)
  6045. {
  6046. uint8_t i;
  6047. uint32_t index;
  6048. uint32_t j;
  6049. char nss[DP_NSS_LENGTH];
  6050. char mu_group_id[DP_MU_GROUP_LENGTH];
  6051. DP_PRINT_STATS("Node Tx Stats:\n");
  6052. DP_PRINT_STATS("Total Packet Completions = %d",
  6053. peer->stats.tx.comp_pkt.num);
  6054. DP_PRINT_STATS("Total Bytes Completions = %llu",
  6055. peer->stats.tx.comp_pkt.bytes);
  6056. DP_PRINT_STATS("Success Packets = %d",
  6057. peer->stats.tx.tx_success.num);
  6058. DP_PRINT_STATS("Success Bytes = %llu",
  6059. peer->stats.tx.tx_success.bytes);
  6060. DP_PRINT_STATS("Unicast Success Packets = %d",
  6061. peer->stats.tx.ucast.num);
  6062. DP_PRINT_STATS("Unicast Success Bytes = %llu",
  6063. peer->stats.tx.ucast.bytes);
  6064. DP_PRINT_STATS("Multicast Success Packets = %d",
  6065. peer->stats.tx.mcast.num);
  6066. DP_PRINT_STATS("Multicast Success Bytes = %llu",
  6067. peer->stats.tx.mcast.bytes);
  6068. DP_PRINT_STATS("Broadcast Success Packets = %d",
  6069. peer->stats.tx.bcast.num);
  6070. DP_PRINT_STATS("Broadcast Success Bytes = %llu",
  6071. peer->stats.tx.bcast.bytes);
  6072. DP_PRINT_STATS("Packets Failed = %d",
  6073. peer->stats.tx.tx_failed);
  6074. DP_PRINT_STATS("Packets In OFDMA = %d",
  6075. peer->stats.tx.ofdma);
  6076. DP_PRINT_STATS("Packets In STBC = %d",
  6077. peer->stats.tx.stbc);
  6078. DP_PRINT_STATS("Packets In LDPC = %d",
  6079. peer->stats.tx.ldpc);
  6080. DP_PRINT_STATS("Packet Retries = %d",
  6081. peer->stats.tx.retries);
  6082. DP_PRINT_STATS("MSDU's Part of AMSDU = %d",
  6083. peer->stats.tx.amsdu_cnt);
  6084. DP_PRINT_STATS("Last Packet RSSI = %d",
  6085. peer->stats.tx.last_ack_rssi);
  6086. DP_PRINT_STATS("Dropped At FW: Removed Pkts = %u",
  6087. peer->stats.tx.dropped.fw_rem.num);
  6088. DP_PRINT_STATS("Dropped At FW: Removed bytes = %llu",
  6089. peer->stats.tx.dropped.fw_rem.bytes);
  6090. DP_PRINT_STATS("Dropped At FW: Removed transmitted = %d",
  6091. peer->stats.tx.dropped.fw_rem_tx);
  6092. DP_PRINT_STATS("Dropped At FW: Removed Untransmitted = %d",
  6093. peer->stats.tx.dropped.fw_rem_notx);
  6094. DP_PRINT_STATS("Dropped : Age Out = %d",
  6095. peer->stats.tx.dropped.age_out);
  6096. DP_PRINT_STATS("NAWDS : ");
  6097. DP_PRINT_STATS(" Nawds multicast Drop Tx Packet = %d",
  6098. peer->stats.tx.nawds_mcast_drop);
  6099. DP_PRINT_STATS(" Nawds multicast Tx Packet Count = %d",
  6100. peer->stats.tx.nawds_mcast.num);
  6101. DP_PRINT_STATS(" Nawds multicast Tx Packet Bytes = %llu",
  6102. peer->stats.tx.nawds_mcast.bytes);
  6103. DP_PRINT_STATS("Rate Info:");
  6104. dp_print_common_rates_info(peer->stats.tx.pkt_type);
  6105. DP_PRINT_STATS("SGI = "
  6106. " 0.8us %d"
  6107. " 0.4us %d"
  6108. " 1.6us %d"
  6109. " 3.2us %d",
  6110. peer->stats.tx.sgi_count[0],
  6111. peer->stats.tx.sgi_count[1],
  6112. peer->stats.tx.sgi_count[2],
  6113. peer->stats.tx.sgi_count[3]);
  6114. DP_PRINT_STATS("Excess Retries per AC ");
  6115. DP_PRINT_STATS(" Best effort = %d",
  6116. peer->stats.tx.excess_retries_per_ac[0]);
  6117. DP_PRINT_STATS(" Background= %d",
  6118. peer->stats.tx.excess_retries_per_ac[1]);
  6119. DP_PRINT_STATS(" Video = %d",
  6120. peer->stats.tx.excess_retries_per_ac[2]);
  6121. DP_PRINT_STATS(" Voice = %d",
  6122. peer->stats.tx.excess_retries_per_ac[3]);
  6123. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  6124. peer->stats.tx.bw[0], peer->stats.tx.bw[1],
  6125. peer->stats.tx.bw[2], peer->stats.tx.bw[3]);
  6126. index = 0;
  6127. for (i = 0; i < SS_COUNT; i++) {
  6128. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  6129. " %d", peer->stats.tx.nss[i]);
  6130. }
  6131. DP_PRINT_STATS("NSS(1-8) = %s", nss);
  6132. DP_PRINT_STATS("Transmit Type :");
  6133. DP_PRINT_STATS("SU %d, MU_MIMO %d, MU_OFDMA %d, MU_MIMO_OFDMA %d",
  6134. peer->stats.tx.transmit_type[0],
  6135. peer->stats.tx.transmit_type[1],
  6136. peer->stats.tx.transmit_type[2],
  6137. peer->stats.tx.transmit_type[3]);
  6138. for (i = 0; i < MAX_MU_GROUP_ID;) {
  6139. index = 0;
  6140. for (j = 0; j < DP_MU_GROUP_SHOW && i < MAX_MU_GROUP_ID;
  6141. j++) {
  6142. index += qdf_snprint(&mu_group_id[index],
  6143. DP_MU_GROUP_LENGTH - index,
  6144. " %d",
  6145. peer->stats.tx.mu_group_id[i]);
  6146. i++;
  6147. }
  6148. DP_PRINT_STATS("User position list for GID %02d->%d: [%s]",
  6149. i - DP_MU_GROUP_SHOW, i - 1, mu_group_id);
  6150. }
  6151. DP_PRINT_STATS("Last Packet RU index [%d], Size [%d]",
  6152. peer->stats.tx.ru_start, peer->stats.tx.ru_tones);
  6153. DP_PRINT_STATS("RU Locations RU[26 52 106 242 484 996]:");
  6154. DP_PRINT_STATS("RU_26: %d", peer->stats.tx.ru_loc[0]);
  6155. DP_PRINT_STATS("RU 52: %d", peer->stats.tx.ru_loc[1]);
  6156. DP_PRINT_STATS("RU 106: %d", peer->stats.tx.ru_loc[2]);
  6157. DP_PRINT_STATS("RU 242: %d", peer->stats.tx.ru_loc[3]);
  6158. DP_PRINT_STATS("RU 484: %d", peer->stats.tx.ru_loc[4]);
  6159. DP_PRINT_STATS("RU 996: %d", peer->stats.tx.ru_loc[5]);
  6160. DP_PRINT_STATS("Aggregation:");
  6161. DP_PRINT_STATS(" Number of Msdu's Part of Amsdu = %d",
  6162. peer->stats.tx.amsdu_cnt);
  6163. DP_PRINT_STATS(" Number of Msdu's With No Msdu Level Aggregation = %d\n",
  6164. peer->stats.tx.non_amsdu_cnt);
  6165. DP_PRINT_STATS("Bytes and Packets transmitted in last one sec:");
  6166. DP_PRINT_STATS(" Bytes transmitted in last sec: %d",
  6167. peer->stats.tx.tx_byte_rate);
  6168. DP_PRINT_STATS(" Data transmitted in last sec: %d",
  6169. peer->stats.tx.tx_data_rate);
  6170. DP_PRINT_STATS("Node Rx Stats:");
  6171. DP_PRINT_STATS("Packets Sent To Stack = %d",
  6172. peer->stats.rx.to_stack.num);
  6173. DP_PRINT_STATS("Bytes Sent To Stack = %llu",
  6174. peer->stats.rx.to_stack.bytes);
  6175. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  6176. DP_PRINT_STATS("Ring Id = %d", i);
  6177. DP_PRINT_STATS(" Packets Received = %d",
  6178. peer->stats.rx.rcvd_reo[i].num);
  6179. DP_PRINT_STATS(" Bytes Received = %llu",
  6180. peer->stats.rx.rcvd_reo[i].bytes);
  6181. }
  6182. DP_PRINT_STATS("Multicast Packets Received = %d",
  6183. peer->stats.rx.multicast.num);
  6184. DP_PRINT_STATS("Multicast Bytes Received = %llu",
  6185. peer->stats.rx.multicast.bytes);
  6186. DP_PRINT_STATS("Broadcast Packets Received = %d",
  6187. peer->stats.rx.bcast.num);
  6188. DP_PRINT_STATS("Broadcast Bytes Received = %llu",
  6189. peer->stats.rx.bcast.bytes);
  6190. DP_PRINT_STATS("Intra BSS Packets Received = %d",
  6191. peer->stats.rx.intra_bss.pkts.num);
  6192. DP_PRINT_STATS("Intra BSS Bytes Received = %llu",
  6193. peer->stats.rx.intra_bss.pkts.bytes);
  6194. DP_PRINT_STATS("Raw Packets Received = %d",
  6195. peer->stats.rx.raw.num);
  6196. DP_PRINT_STATS("Raw Bytes Received = %llu",
  6197. peer->stats.rx.raw.bytes);
  6198. DP_PRINT_STATS("Errors: MIC Errors = %d",
  6199. peer->stats.rx.err.mic_err);
  6200. DP_PRINT_STATS("Erros: Decryption Errors = %d",
  6201. peer->stats.rx.err.decrypt_err);
  6202. DP_PRINT_STATS("Msdu's Received As Part of Ampdu = %d",
  6203. peer->stats.rx.non_ampdu_cnt);
  6204. DP_PRINT_STATS("Msdu's Recived As Ampdu = %d",
  6205. peer->stats.rx.ampdu_cnt);
  6206. DP_PRINT_STATS("Msdu's Received Not Part of Amsdu's = %d",
  6207. peer->stats.rx.non_amsdu_cnt);
  6208. DP_PRINT_STATS("MSDUs Received As Part of Amsdu = %d",
  6209. peer->stats.rx.amsdu_cnt);
  6210. DP_PRINT_STATS("NAWDS : ");
  6211. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet = %d",
  6212. peer->stats.rx.nawds_mcast_drop);
  6213. DP_PRINT_STATS("SGI ="
  6214. " 0.8us %d"
  6215. " 0.4us %d"
  6216. " 1.6us %d"
  6217. " 3.2us %d",
  6218. peer->stats.rx.sgi_count[0],
  6219. peer->stats.rx.sgi_count[1],
  6220. peer->stats.rx.sgi_count[2],
  6221. peer->stats.rx.sgi_count[3]);
  6222. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  6223. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  6224. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  6225. DP_PRINT_STATS("Reception Type ="
  6226. " SU %d,"
  6227. " MU_MIMO %d,"
  6228. " MU_OFDMA %d,"
  6229. " MU_OFDMA_MIMO %d",
  6230. peer->stats.rx.reception_type[0],
  6231. peer->stats.rx.reception_type[1],
  6232. peer->stats.rx.reception_type[2],
  6233. peer->stats.rx.reception_type[3]);
  6234. dp_print_common_rates_info(peer->stats.rx.pkt_type);
  6235. index = 0;
  6236. for (i = 0; i < SS_COUNT; i++) {
  6237. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  6238. " %d", peer->stats.rx.nss[i]);
  6239. }
  6240. DP_PRINT_STATS("NSS(1-8) = %s",
  6241. nss);
  6242. DP_PRINT_STATS("Aggregation:");
  6243. DP_PRINT_STATS(" Msdu's Part of Ampdu = %d",
  6244. peer->stats.rx.ampdu_cnt);
  6245. DP_PRINT_STATS(" Msdu's With No Mpdu Level Aggregation = %d",
  6246. peer->stats.rx.non_ampdu_cnt);
  6247. DP_PRINT_STATS(" Msdu's Part of Amsdu = %d",
  6248. peer->stats.rx.amsdu_cnt);
  6249. DP_PRINT_STATS(" Msdu's With No Msdu Level Aggregation = %d",
  6250. peer->stats.rx.non_amsdu_cnt);
  6251. DP_PRINT_STATS("Bytes and Packets received in last one sec:");
  6252. DP_PRINT_STATS(" Bytes received in last sec: %d",
  6253. peer->stats.rx.rx_byte_rate);
  6254. DP_PRINT_STATS(" Data received in last sec: %d",
  6255. peer->stats.rx.rx_data_rate);
  6256. }
  6257. /*
  6258. * dp_get_host_peer_stats()- function to print peer stats
  6259. * @pdev_handle: DP_PDEV handle
  6260. * @mac_addr: mac address of the peer
  6261. *
  6262. * Return: void
  6263. */
  6264. static void
  6265. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  6266. {
  6267. struct dp_peer *peer;
  6268. uint8_t local_id;
  6269. if (!mac_addr) {
  6270. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  6271. "Invalid MAC address\n");
  6272. return;
  6273. }
  6274. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  6275. &local_id);
  6276. if (!peer) {
  6277. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  6278. "%s: Invalid peer\n", __func__);
  6279. return;
  6280. }
  6281. /* Making sure the peer is for the specific pdev */
  6282. if ((struct dp_pdev *)pdev_handle != peer->vdev->pdev) {
  6283. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  6284. "%s: Peer is not for this pdev\n", __func__);
  6285. return;
  6286. }
  6287. dp_print_peer_stats(peer);
  6288. dp_peer_rxtid_stats(peer, dp_rx_tid_stats_cb, NULL);
  6289. }
  6290. /**
  6291. * dp_print_soc_cfg_params()- Dump soc wlan config parameters
  6292. * @soc_handle: Soc handle
  6293. *
  6294. * Return: void
  6295. */
  6296. static void
  6297. dp_print_soc_cfg_params(struct dp_soc *soc)
  6298. {
  6299. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  6300. uint8_t index = 0, i = 0;
  6301. char ring_mask[DP_MAX_INT_CONTEXTS_STRING_LENGTH];
  6302. int num_of_int_contexts;
  6303. if (!soc) {
  6304. dp_err("Context is null");
  6305. return;
  6306. }
  6307. soc_cfg_ctx = soc->wlan_cfg_ctx;
  6308. if (!soc_cfg_ctx) {
  6309. dp_err("Context is null");
  6310. return;
  6311. }
  6312. num_of_int_contexts =
  6313. wlan_cfg_get_num_contexts(soc_cfg_ctx);
  6314. DP_TRACE_STATS(DEBUG, "No. of interrupt contexts: %u",
  6315. soc_cfg_ctx->num_int_ctxts);
  6316. DP_TRACE_STATS(DEBUG, "Max clients: %u",
  6317. soc_cfg_ctx->max_clients);
  6318. DP_TRACE_STATS(DEBUG, "Max alloc size: %u ",
  6319. soc_cfg_ctx->max_alloc_size);
  6320. DP_TRACE_STATS(DEBUG, "Per pdev tx ring: %u ",
  6321. soc_cfg_ctx->per_pdev_tx_ring);
  6322. DP_TRACE_STATS(DEBUG, "Num tcl data rings: %u ",
  6323. soc_cfg_ctx->num_tcl_data_rings);
  6324. DP_TRACE_STATS(DEBUG, "Per pdev rx ring: %u ",
  6325. soc_cfg_ctx->per_pdev_rx_ring);
  6326. DP_TRACE_STATS(DEBUG, "Per pdev lmac ring: %u ",
  6327. soc_cfg_ctx->per_pdev_lmac_ring);
  6328. DP_TRACE_STATS(DEBUG, "Num of reo dest rings: %u ",
  6329. soc_cfg_ctx->num_reo_dest_rings);
  6330. DP_TRACE_STATS(DEBUG, "Num tx desc pool: %u ",
  6331. soc_cfg_ctx->num_tx_desc_pool);
  6332. DP_TRACE_STATS(DEBUG, "Num tx ext desc pool: %u ",
  6333. soc_cfg_ctx->num_tx_ext_desc_pool);
  6334. DP_TRACE_STATS(DEBUG, "Num tx desc: %u ",
  6335. soc_cfg_ctx->num_tx_desc);
  6336. DP_TRACE_STATS(DEBUG, "Num tx ext desc: %u ",
  6337. soc_cfg_ctx->num_tx_ext_desc);
  6338. DP_TRACE_STATS(DEBUG, "Htt packet type: %u ",
  6339. soc_cfg_ctx->htt_packet_type);
  6340. DP_TRACE_STATS(DEBUG, "Max peer_ids: %u ",
  6341. soc_cfg_ctx->max_peer_id);
  6342. DP_TRACE_STATS(DEBUG, "Tx ring size: %u ",
  6343. soc_cfg_ctx->tx_ring_size);
  6344. DP_TRACE_STATS(DEBUG, "Tx comp ring size: %u ",
  6345. soc_cfg_ctx->tx_comp_ring_size);
  6346. DP_TRACE_STATS(DEBUG, "Tx comp ring size nss: %u ",
  6347. soc_cfg_ctx->tx_comp_ring_size_nss);
  6348. DP_TRACE_STATS(DEBUG, "Int batch threshold tx: %u ",
  6349. soc_cfg_ctx->int_batch_threshold_tx);
  6350. DP_TRACE_STATS(DEBUG, "Int timer threshold tx: %u ",
  6351. soc_cfg_ctx->int_timer_threshold_tx);
  6352. DP_TRACE_STATS(DEBUG, "Int batch threshold rx: %u ",
  6353. soc_cfg_ctx->int_batch_threshold_rx);
  6354. DP_TRACE_STATS(DEBUG, "Int timer threshold rx: %u ",
  6355. soc_cfg_ctx->int_timer_threshold_rx);
  6356. DP_TRACE_STATS(DEBUG, "Int batch threshold other: %u ",
  6357. soc_cfg_ctx->int_batch_threshold_other);
  6358. DP_TRACE_STATS(DEBUG, "Int timer threshold other: %u ",
  6359. soc_cfg_ctx->int_timer_threshold_other);
  6360. for (i = 0; i < num_of_int_contexts; i++) {
  6361. index += qdf_snprint(&ring_mask[index],
  6362. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6363. " %d",
  6364. soc_cfg_ctx->int_tx_ring_mask[i]);
  6365. }
  6366. DP_TRACE_STATS(DEBUG, "Tx ring mask (0-%d):%s",
  6367. num_of_int_contexts, ring_mask);
  6368. index = 0;
  6369. for (i = 0; i < num_of_int_contexts; i++) {
  6370. index += qdf_snprint(&ring_mask[index],
  6371. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6372. " %d",
  6373. soc_cfg_ctx->int_rx_ring_mask[i]);
  6374. }
  6375. DP_TRACE_STATS(DEBUG, "Rx ring mask (0-%d):%s",
  6376. num_of_int_contexts, ring_mask);
  6377. index = 0;
  6378. for (i = 0; i < num_of_int_contexts; i++) {
  6379. index += qdf_snprint(&ring_mask[index],
  6380. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6381. " %d",
  6382. soc_cfg_ctx->int_rx_mon_ring_mask[i]);
  6383. }
  6384. DP_TRACE_STATS(DEBUG, "Rx mon ring mask (0-%d):%s",
  6385. num_of_int_contexts, ring_mask);
  6386. index = 0;
  6387. for (i = 0; i < num_of_int_contexts; i++) {
  6388. index += qdf_snprint(&ring_mask[index],
  6389. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6390. " %d",
  6391. soc_cfg_ctx->int_rx_err_ring_mask[i]);
  6392. }
  6393. DP_TRACE_STATS(DEBUG, "Rx err ring mask (0-%d):%s",
  6394. num_of_int_contexts, ring_mask);
  6395. index = 0;
  6396. for (i = 0; i < num_of_int_contexts; i++) {
  6397. index += qdf_snprint(&ring_mask[index],
  6398. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6399. " %d",
  6400. soc_cfg_ctx->int_rx_wbm_rel_ring_mask[i]);
  6401. }
  6402. DP_TRACE_STATS(DEBUG, "Rx wbm rel ring mask (0-%d):%s",
  6403. num_of_int_contexts, ring_mask);
  6404. index = 0;
  6405. for (i = 0; i < num_of_int_contexts; i++) {
  6406. index += qdf_snprint(&ring_mask[index],
  6407. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6408. " %d",
  6409. soc_cfg_ctx->int_reo_status_ring_mask[i]);
  6410. }
  6411. DP_TRACE_STATS(DEBUG, "Reo ring mask (0-%d):%s",
  6412. num_of_int_contexts, ring_mask);
  6413. index = 0;
  6414. for (i = 0; i < num_of_int_contexts; i++) {
  6415. index += qdf_snprint(&ring_mask[index],
  6416. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6417. " %d",
  6418. soc_cfg_ctx->int_rxdma2host_ring_mask[i]);
  6419. }
  6420. DP_TRACE_STATS(DEBUG, "Rxdma2host ring mask (0-%d):%s",
  6421. num_of_int_contexts, ring_mask);
  6422. index = 0;
  6423. for (i = 0; i < num_of_int_contexts; i++) {
  6424. index += qdf_snprint(&ring_mask[index],
  6425. DP_MAX_INT_CONTEXTS_STRING_LENGTH - index,
  6426. " %d",
  6427. soc_cfg_ctx->int_host2rxdma_ring_mask[i]);
  6428. }
  6429. DP_TRACE_STATS(DEBUG, "Host2rxdma ring mask (0-%d):%s",
  6430. num_of_int_contexts, ring_mask);
  6431. DP_TRACE_STATS(DEBUG, "Rx hash: %u ",
  6432. soc_cfg_ctx->rx_hash);
  6433. DP_TRACE_STATS(DEBUG, "Tso enabled: %u ",
  6434. soc_cfg_ctx->tso_enabled);
  6435. DP_TRACE_STATS(DEBUG, "Lro enabled: %u ",
  6436. soc_cfg_ctx->lro_enabled);
  6437. DP_TRACE_STATS(DEBUG, "Sg enabled: %u ",
  6438. soc_cfg_ctx->sg_enabled);
  6439. DP_TRACE_STATS(DEBUG, "Gro enabled: %u ",
  6440. soc_cfg_ctx->gro_enabled);
  6441. DP_TRACE_STATS(DEBUG, "rawmode enabled: %u ",
  6442. soc_cfg_ctx->rawmode_enabled);
  6443. DP_TRACE_STATS(DEBUG, "peer flow ctrl enabled: %u ",
  6444. soc_cfg_ctx->peer_flow_ctrl_enabled);
  6445. DP_TRACE_STATS(DEBUG, "napi enabled: %u ",
  6446. soc_cfg_ctx->napi_enabled);
  6447. DP_TRACE_STATS(DEBUG, "Tcp Udp checksum offload: %u ",
  6448. soc_cfg_ctx->tcp_udp_checksumoffload);
  6449. DP_TRACE_STATS(DEBUG, "Defrag timeout check: %u ",
  6450. soc_cfg_ctx->defrag_timeout_check);
  6451. DP_TRACE_STATS(DEBUG, "Rx defrag min timeout: %u ",
  6452. soc_cfg_ctx->rx_defrag_min_timeout);
  6453. DP_TRACE_STATS(DEBUG, "WBM release ring: %u ",
  6454. soc_cfg_ctx->wbm_release_ring);
  6455. DP_TRACE_STATS(DEBUG, "TCL CMD ring: %u ",
  6456. soc_cfg_ctx->tcl_cmd_ring);
  6457. DP_TRACE_STATS(DEBUG, "TCL Status ring: %u ",
  6458. soc_cfg_ctx->tcl_status_ring);
  6459. DP_TRACE_STATS(DEBUG, "REO Reinject ring: %u ",
  6460. soc_cfg_ctx->reo_reinject_ring);
  6461. DP_TRACE_STATS(DEBUG, "RX release ring: %u ",
  6462. soc_cfg_ctx->rx_release_ring);
  6463. DP_TRACE_STATS(DEBUG, "REO Exception ring: %u ",
  6464. soc_cfg_ctx->reo_exception_ring);
  6465. DP_TRACE_STATS(DEBUG, "REO CMD ring: %u ",
  6466. soc_cfg_ctx->reo_cmd_ring);
  6467. DP_TRACE_STATS(DEBUG, "REO STATUS ring: %u ",
  6468. soc_cfg_ctx->reo_status_ring);
  6469. DP_TRACE_STATS(DEBUG, "RXDMA refill ring: %u ",
  6470. soc_cfg_ctx->rxdma_refill_ring);
  6471. DP_TRACE_STATS(DEBUG, "RXDMA err dst ring: %u ",
  6472. soc_cfg_ctx->rxdma_err_dst_ring);
  6473. }
  6474. /**
  6475. * dp_print_vdev_cfg_params() - Print the pdev cfg parameters
  6476. * @pdev_handle: DP pdev handle
  6477. *
  6478. * Return - void
  6479. */
  6480. static void
  6481. dp_print_pdev_cfg_params(struct dp_pdev *pdev)
  6482. {
  6483. struct wlan_cfg_dp_pdev_ctxt *pdev_cfg_ctx;
  6484. if (!pdev) {
  6485. dp_err("Context is null");
  6486. return;
  6487. }
  6488. pdev_cfg_ctx = pdev->wlan_cfg_ctx;
  6489. if (!pdev_cfg_ctx) {
  6490. dp_err("Context is null");
  6491. return;
  6492. }
  6493. DP_TRACE_STATS(DEBUG, "Rx dma buf ring size: %d ",
  6494. pdev_cfg_ctx->rx_dma_buf_ring_size);
  6495. DP_TRACE_STATS(DEBUG, "DMA Mon buf ring size: %d ",
  6496. pdev_cfg_ctx->dma_mon_buf_ring_size);
  6497. DP_TRACE_STATS(DEBUG, "DMA Mon dest ring size: %d ",
  6498. pdev_cfg_ctx->dma_mon_dest_ring_size);
  6499. DP_TRACE_STATS(DEBUG, "DMA Mon status ring size: %d ",
  6500. pdev_cfg_ctx->dma_mon_status_ring_size);
  6501. DP_TRACE_STATS(DEBUG, "Rxdma monitor desc ring: %d",
  6502. pdev_cfg_ctx->rxdma_monitor_desc_ring);
  6503. DP_TRACE_STATS(DEBUG, "Num mac rings: %d ",
  6504. pdev_cfg_ctx->num_mac_rings);
  6505. }
  6506. /**
  6507. * dp_txrx_stats_help() - Helper function for Txrx_Stats
  6508. *
  6509. * Return: None
  6510. */
  6511. static void dp_txrx_stats_help(void)
  6512. {
  6513. dp_info("Command: iwpriv wlan0 txrx_stats <stats_option> <mac_id>");
  6514. dp_info("stats_option:");
  6515. dp_info(" 1 -- HTT Tx Statistics");
  6516. dp_info(" 2 -- HTT Rx Statistics");
  6517. dp_info(" 3 -- HTT Tx HW Queue Statistics");
  6518. dp_info(" 4 -- HTT Tx HW Sched Statistics");
  6519. dp_info(" 5 -- HTT Error Statistics");
  6520. dp_info(" 6 -- HTT TQM Statistics");
  6521. dp_info(" 7 -- HTT TQM CMDQ Statistics");
  6522. dp_info(" 8 -- HTT TX_DE_CMN Statistics");
  6523. dp_info(" 9 -- HTT Tx Rate Statistics");
  6524. dp_info(" 10 -- HTT Rx Rate Statistics");
  6525. dp_info(" 11 -- HTT Peer Statistics");
  6526. dp_info(" 12 -- HTT Tx SelfGen Statistics");
  6527. dp_info(" 13 -- HTT Tx MU HWQ Statistics");
  6528. dp_info(" 14 -- HTT RING_IF_INFO Statistics");
  6529. dp_info(" 15 -- HTT SRNG Statistics");
  6530. dp_info(" 16 -- HTT SFM Info Statistics");
  6531. dp_info(" 17 -- HTT PDEV_TX_MU_MIMO_SCHED INFO Statistics");
  6532. dp_info(" 18 -- HTT Peer List Details");
  6533. dp_info(" 20 -- Clear Host Statistics");
  6534. dp_info(" 21 -- Host Rx Rate Statistics");
  6535. dp_info(" 22 -- Host Tx Rate Statistics");
  6536. dp_info(" 23 -- Host Tx Statistics");
  6537. dp_info(" 24 -- Host Rx Statistics");
  6538. dp_info(" 25 -- Host AST Statistics");
  6539. dp_info(" 26 -- Host SRNG PTR Statistics");
  6540. dp_info(" 27 -- Host Mon Statistics");
  6541. dp_info(" 28 -- Host REO Queue Statistics");
  6542. dp_info(" 29 -- Host Soc cfg param Statistics");
  6543. dp_info(" 30 -- Host pdev cfg param Statistics");
  6544. }
  6545. /**
  6546. * dp_print_host_stats()- Function to print the stats aggregated at host
  6547. * @vdev_handle: DP_VDEV handle
  6548. * @type: host stats type
  6549. *
  6550. * Return: 0 on success, print error message in case of failure
  6551. */
  6552. static int
  6553. dp_print_host_stats(struct cdp_vdev *vdev_handle,
  6554. struct cdp_txrx_stats_req *req)
  6555. {
  6556. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6557. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  6558. enum cdp_host_txrx_stats type =
  6559. dp_stats_mapping_table[req->stats][STATS_HOST];
  6560. dp_aggregate_pdev_stats(pdev);
  6561. switch (type) {
  6562. case TXRX_CLEAR_STATS:
  6563. dp_txrx_host_stats_clr(vdev);
  6564. break;
  6565. case TXRX_RX_RATE_STATS:
  6566. dp_print_rx_rates(vdev);
  6567. break;
  6568. case TXRX_TX_RATE_STATS:
  6569. dp_print_tx_rates(vdev);
  6570. break;
  6571. case TXRX_TX_HOST_STATS:
  6572. dp_print_pdev_tx_stats(pdev);
  6573. dp_print_soc_tx_stats(pdev->soc);
  6574. break;
  6575. case TXRX_RX_HOST_STATS:
  6576. dp_print_pdev_rx_stats(pdev);
  6577. dp_print_soc_rx_stats(pdev->soc);
  6578. break;
  6579. case TXRX_AST_STATS:
  6580. dp_print_ast_stats(pdev->soc);
  6581. dp_print_peer_table(vdev);
  6582. break;
  6583. case TXRX_SRNG_PTR_STATS:
  6584. dp_print_ring_stats(pdev);
  6585. break;
  6586. case TXRX_RX_MON_STATS:
  6587. dp_print_pdev_rx_mon_stats(pdev);
  6588. break;
  6589. case TXRX_REO_QUEUE_STATS:
  6590. dp_get_host_peer_stats((struct cdp_pdev *)pdev, req->peer_addr);
  6591. break;
  6592. case TXRX_SOC_CFG_PARAMS:
  6593. dp_print_soc_cfg_params(pdev->soc);
  6594. break;
  6595. case TXRX_PDEV_CFG_PARAMS:
  6596. dp_print_pdev_cfg_params(pdev);
  6597. break;
  6598. default:
  6599. dp_info("Wrong Input For TxRx Host Stats");
  6600. dp_txrx_stats_help();
  6601. break;
  6602. }
  6603. return 0;
  6604. }
  6605. /*
  6606. * dp_ppdu_ring_reset()- Reset PPDU Stats ring
  6607. * @pdev: DP_PDEV handle
  6608. *
  6609. * Return: void
  6610. */
  6611. static void
  6612. dp_ppdu_ring_reset(struct dp_pdev *pdev)
  6613. {
  6614. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  6615. int mac_id;
  6616. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  6617. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  6618. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  6619. pdev->pdev_id);
  6620. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  6621. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  6622. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  6623. }
  6624. }
  6625. /*
  6626. * dp_ppdu_ring_cfg()- Configure PPDU Stats ring
  6627. * @pdev: DP_PDEV handle
  6628. *
  6629. * Return: void
  6630. */
  6631. static void
  6632. dp_ppdu_ring_cfg(struct dp_pdev *pdev)
  6633. {
  6634. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  6635. int mac_id;
  6636. htt_tlv_filter.mpdu_start = 1;
  6637. htt_tlv_filter.msdu_start = 0;
  6638. htt_tlv_filter.packet = 0;
  6639. htt_tlv_filter.msdu_end = 0;
  6640. htt_tlv_filter.mpdu_end = 0;
  6641. htt_tlv_filter.attention = 0;
  6642. htt_tlv_filter.ppdu_start = 1;
  6643. htt_tlv_filter.ppdu_end = 1;
  6644. htt_tlv_filter.ppdu_end_user_stats = 1;
  6645. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6646. htt_tlv_filter.ppdu_end_status_done = 1;
  6647. htt_tlv_filter.enable_fp = 1;
  6648. htt_tlv_filter.enable_md = 0;
  6649. if (pdev->neighbour_peers_added &&
  6650. pdev->soc->hw_nac_monitor_support) {
  6651. htt_tlv_filter.enable_md = 1;
  6652. htt_tlv_filter.packet_header = 1;
  6653. }
  6654. if (pdev->mcopy_mode) {
  6655. htt_tlv_filter.packet_header = 1;
  6656. htt_tlv_filter.enable_mo = 1;
  6657. }
  6658. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6659. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6660. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6661. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6662. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6663. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6664. if (pdev->neighbour_peers_added &&
  6665. pdev->soc->hw_nac_monitor_support)
  6666. htt_tlv_filter.md_data_filter = FILTER_DATA_ALL;
  6667. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  6668. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  6669. pdev->pdev_id);
  6670. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  6671. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  6672. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  6673. }
  6674. }
  6675. /*
  6676. * is_ppdu_txrx_capture_enabled() - API to check both pktlog and debug_sniffer
  6677. * modes are enabled or not.
  6678. * @dp_pdev: dp pdev handle.
  6679. *
  6680. * Return: bool
  6681. */
  6682. static inline bool is_ppdu_txrx_capture_enabled(struct dp_pdev *pdev)
  6683. {
  6684. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable &&
  6685. !pdev->mcopy_mode)
  6686. return true;
  6687. else
  6688. return false;
  6689. }
  6690. /*
  6691. *dp_set_bpr_enable() - API to enable/disable bpr feature
  6692. *@pdev_handle: DP_PDEV handle.
  6693. *@val: Provided value.
  6694. *
  6695. *Return: 0 for success. nonzero for failure.
  6696. */
  6697. static QDF_STATUS
  6698. dp_set_bpr_enable(struct cdp_pdev *pdev_handle, int val)
  6699. {
  6700. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6701. switch (val) {
  6702. case CDP_BPR_DISABLE:
  6703. pdev->bpr_enable = CDP_BPR_DISABLE;
  6704. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en &&
  6705. !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  6706. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  6707. } else if (pdev->enhanced_stats_en &&
  6708. !pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  6709. !pdev->pktlog_ppdu_stats) {
  6710. dp_h2t_cfg_stats_msg_send(pdev,
  6711. DP_PPDU_STATS_CFG_ENH_STATS,
  6712. pdev->pdev_id);
  6713. }
  6714. break;
  6715. case CDP_BPR_ENABLE:
  6716. pdev->bpr_enable = CDP_BPR_ENABLE;
  6717. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable &&
  6718. !pdev->mcopy_mode && !pdev->pktlog_ppdu_stats) {
  6719. dp_h2t_cfg_stats_msg_send(pdev,
  6720. DP_PPDU_STATS_CFG_BPR,
  6721. pdev->pdev_id);
  6722. } else if (pdev->enhanced_stats_en &&
  6723. !pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  6724. !pdev->pktlog_ppdu_stats) {
  6725. dp_h2t_cfg_stats_msg_send(pdev,
  6726. DP_PPDU_STATS_CFG_BPR_ENH,
  6727. pdev->pdev_id);
  6728. } else if (pdev->pktlog_ppdu_stats) {
  6729. dp_h2t_cfg_stats_msg_send(pdev,
  6730. DP_PPDU_STATS_CFG_BPR_PKTLOG,
  6731. pdev->pdev_id);
  6732. }
  6733. break;
  6734. default:
  6735. break;
  6736. }
  6737. return QDF_STATUS_SUCCESS;
  6738. }
  6739. /*
  6740. * dp_config_debug_sniffer()- API to enable/disable debug sniffer
  6741. * @pdev_handle: DP_PDEV handle
  6742. * @val: user provided value
  6743. *
  6744. * Return: 0 for success. nonzero for failure.
  6745. */
  6746. static QDF_STATUS
  6747. dp_config_debug_sniffer(struct cdp_pdev *pdev_handle, int val)
  6748. {
  6749. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6750. QDF_STATUS status = QDF_STATUS_SUCCESS;
  6751. if (pdev->mcopy_mode)
  6752. dp_reset_monitor_mode(pdev_handle);
  6753. switch (val) {
  6754. case 0:
  6755. pdev->tx_sniffer_enable = 0;
  6756. pdev->mcopy_mode = 0;
  6757. pdev->monitor_configured = false;
  6758. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en &&
  6759. !pdev->bpr_enable) {
  6760. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  6761. dp_ppdu_ring_reset(pdev);
  6762. } else if (pdev->enhanced_stats_en && !pdev->bpr_enable) {
  6763. dp_h2t_cfg_stats_msg_send(pdev,
  6764. DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  6765. } else if (!pdev->enhanced_stats_en && pdev->bpr_enable) {
  6766. dp_h2t_cfg_stats_msg_send(pdev,
  6767. DP_PPDU_STATS_CFG_BPR_ENH,
  6768. pdev->pdev_id);
  6769. } else {
  6770. dp_h2t_cfg_stats_msg_send(pdev,
  6771. DP_PPDU_STATS_CFG_BPR,
  6772. pdev->pdev_id);
  6773. }
  6774. break;
  6775. case 1:
  6776. pdev->tx_sniffer_enable = 1;
  6777. pdev->mcopy_mode = 0;
  6778. pdev->monitor_configured = false;
  6779. if (!pdev->pktlog_ppdu_stats)
  6780. dp_h2t_cfg_stats_msg_send(pdev,
  6781. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  6782. break;
  6783. case 2:
  6784. if (pdev->monitor_vdev) {
  6785. status = QDF_STATUS_E_RESOURCES;
  6786. break;
  6787. }
  6788. pdev->mcopy_mode = 1;
  6789. dp_pdev_configure_monitor_rings(pdev);
  6790. pdev->monitor_configured = true;
  6791. pdev->tx_sniffer_enable = 0;
  6792. if (!pdev->pktlog_ppdu_stats)
  6793. dp_h2t_cfg_stats_msg_send(pdev,
  6794. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  6795. break;
  6796. default:
  6797. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6798. "Invalid value");
  6799. break;
  6800. }
  6801. return status;
  6802. }
  6803. /*
  6804. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  6805. * @pdev_handle: DP_PDEV handle
  6806. *
  6807. * Return: void
  6808. */
  6809. static void
  6810. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  6811. {
  6812. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6813. if (pdev->enhanced_stats_en == 0)
  6814. dp_cal_client_timer_start(pdev->cal_client_ctx);
  6815. pdev->enhanced_stats_en = 1;
  6816. if (!pdev->mcopy_mode && !pdev->neighbour_peers_added &&
  6817. !pdev->monitor_vdev)
  6818. dp_ppdu_ring_cfg(pdev);
  6819. if (is_ppdu_txrx_capture_enabled(pdev) && !pdev->bpr_enable) {
  6820. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  6821. } else if (is_ppdu_txrx_capture_enabled(pdev) && pdev->bpr_enable) {
  6822. dp_h2t_cfg_stats_msg_send(pdev,
  6823. DP_PPDU_STATS_CFG_BPR_ENH,
  6824. pdev->pdev_id);
  6825. }
  6826. }
  6827. /*
  6828. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  6829. * @pdev_handle: DP_PDEV handle
  6830. *
  6831. * Return: void
  6832. */
  6833. static void
  6834. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  6835. {
  6836. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6837. if (pdev->enhanced_stats_en == 1)
  6838. dp_cal_client_timer_stop(pdev->cal_client_ctx);
  6839. pdev->enhanced_stats_en = 0;
  6840. if (is_ppdu_txrx_capture_enabled(pdev) && !pdev->bpr_enable) {
  6841. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  6842. } else if (is_ppdu_txrx_capture_enabled(pdev) && pdev->bpr_enable) {
  6843. dp_h2t_cfg_stats_msg_send(pdev,
  6844. DP_PPDU_STATS_CFG_BPR,
  6845. pdev->pdev_id);
  6846. }
  6847. if (!pdev->mcopy_mode && !pdev->neighbour_peers_added &&
  6848. !pdev->monitor_vdev)
  6849. dp_ppdu_ring_reset(pdev);
  6850. }
  6851. /*
  6852. * dp_get_fw_peer_stats()- function to print peer stats
  6853. * @pdev_handle: DP_PDEV handle
  6854. * @mac_addr: mac address of the peer
  6855. * @cap: Type of htt stats requested
  6856. * @is_wait: if set, wait on completion from firmware response
  6857. *
  6858. * Currently Supporting only MAC ID based requests Only
  6859. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  6860. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  6861. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  6862. *
  6863. * Return: void
  6864. */
  6865. static void
  6866. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  6867. uint32_t cap, uint32_t is_wait)
  6868. {
  6869. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6870. int i;
  6871. uint32_t config_param0 = 0;
  6872. uint32_t config_param1 = 0;
  6873. uint32_t config_param2 = 0;
  6874. uint32_t config_param3 = 0;
  6875. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  6876. config_param0 |= (1 << (cap + 1));
  6877. for (i = 0; i < HTT_PEER_STATS_MAX_TLV; i++) {
  6878. config_param1 |= (1 << i);
  6879. }
  6880. config_param2 |= (mac_addr[0] & 0x000000ff);
  6881. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  6882. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  6883. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  6884. config_param3 |= (mac_addr[4] & 0x000000ff);
  6885. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  6886. if (is_wait) {
  6887. qdf_event_reset(&pdev->fw_peer_stats_event);
  6888. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  6889. config_param0, config_param1,
  6890. config_param2, config_param3,
  6891. 0, 1, 0);
  6892. qdf_wait_single_event(&pdev->fw_peer_stats_event,
  6893. DP_FW_PEER_STATS_CMP_TIMEOUT_MSEC);
  6894. } else {
  6895. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  6896. config_param0, config_param1,
  6897. config_param2, config_param3,
  6898. 0, 0, 0);
  6899. }
  6900. }
  6901. /* This struct definition will be removed from here
  6902. * once it get added in FW headers*/
  6903. struct httstats_cmd_req {
  6904. uint32_t config_param0;
  6905. uint32_t config_param1;
  6906. uint32_t config_param2;
  6907. uint32_t config_param3;
  6908. int cookie;
  6909. u_int8_t stats_id;
  6910. };
  6911. /*
  6912. * dp_get_htt_stats: function to process the httstas request
  6913. * @pdev_handle: DP pdev handle
  6914. * @data: pointer to request data
  6915. * @data_len: length for request data
  6916. *
  6917. * return: void
  6918. */
  6919. static void
  6920. dp_get_htt_stats(struct cdp_pdev *pdev_handle, void *data, uint32_t data_len)
  6921. {
  6922. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6923. struct httstats_cmd_req *req = (struct httstats_cmd_req *)data;
  6924. QDF_ASSERT(data_len == sizeof(struct httstats_cmd_req));
  6925. dp_h2t_ext_stats_msg_send(pdev, req->stats_id,
  6926. req->config_param0, req->config_param1,
  6927. req->config_param2, req->config_param3,
  6928. req->cookie, 0, 0);
  6929. }
  6930. /*
  6931. * dp_set_pdev_param: function to set parameters in pdev
  6932. * @pdev_handle: DP pdev handle
  6933. * @param: parameter type to be set
  6934. * @val: value of parameter to be set
  6935. *
  6936. * Return: 0 for success. nonzero for failure.
  6937. */
  6938. static QDF_STATUS dp_set_pdev_param(struct cdp_pdev *pdev_handle,
  6939. enum cdp_pdev_param_type param,
  6940. uint8_t val)
  6941. {
  6942. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6943. switch (param) {
  6944. case CDP_CONFIG_DEBUG_SNIFFER:
  6945. return dp_config_debug_sniffer(pdev_handle, val);
  6946. case CDP_CONFIG_BPR_ENABLE:
  6947. return dp_set_bpr_enable(pdev_handle, val);
  6948. case CDP_CONFIG_PRIMARY_RADIO:
  6949. pdev->is_primary = val;
  6950. break;
  6951. default:
  6952. return QDF_STATUS_E_INVAL;
  6953. }
  6954. return QDF_STATUS_SUCCESS;
  6955. }
  6956. /*
  6957. * dp_get_vdev_param: function to get parameters from vdev
  6958. * @param: parameter type to get value
  6959. *
  6960. * return: void
  6961. */
  6962. static uint32_t dp_get_vdev_param(struct cdp_vdev *vdev_handle,
  6963. enum cdp_vdev_param_type param)
  6964. {
  6965. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6966. uint32_t val;
  6967. switch (param) {
  6968. case CDP_ENABLE_WDS:
  6969. val = vdev->wds_enabled;
  6970. break;
  6971. case CDP_ENABLE_MEC:
  6972. val = vdev->mec_enabled;
  6973. break;
  6974. case CDP_ENABLE_DA_WAR:
  6975. val = vdev->pdev->soc->da_war_enabled;
  6976. break;
  6977. default:
  6978. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6979. "param value %d is wrong\n",
  6980. param);
  6981. val = -1;
  6982. break;
  6983. }
  6984. return val;
  6985. }
  6986. /*
  6987. * dp_set_vdev_param: function to set parameters in vdev
  6988. * @param: parameter type to be set
  6989. * @val: value of parameter to be set
  6990. *
  6991. * return: void
  6992. */
  6993. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  6994. enum cdp_vdev_param_type param, uint32_t val)
  6995. {
  6996. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6997. switch (param) {
  6998. case CDP_ENABLE_WDS:
  6999. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7000. "wds_enable %d for vdev(%p) id(%d)\n",
  7001. val, vdev, vdev->vdev_id);
  7002. vdev->wds_enabled = val;
  7003. break;
  7004. case CDP_ENABLE_MEC:
  7005. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7006. "mec_enable %d for vdev(%p) id(%d)\n",
  7007. val, vdev, vdev->vdev_id);
  7008. vdev->mec_enabled = val;
  7009. break;
  7010. case CDP_ENABLE_DA_WAR:
  7011. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7012. "da_war_enable %d for vdev(%p) id(%d)\n",
  7013. val, vdev, vdev->vdev_id);
  7014. vdev->pdev->soc->da_war_enabled = val;
  7015. dp_wds_flush_ast_table_wifi3(((struct cdp_soc_t *)
  7016. vdev->pdev->soc));
  7017. break;
  7018. case CDP_ENABLE_NAWDS:
  7019. vdev->nawds_enabled = val;
  7020. break;
  7021. case CDP_ENABLE_MCAST_EN:
  7022. vdev->mcast_enhancement_en = val;
  7023. break;
  7024. case CDP_ENABLE_PROXYSTA:
  7025. vdev->proxysta_vdev = val;
  7026. break;
  7027. case CDP_UPDATE_TDLS_FLAGS:
  7028. vdev->tdls_link_connected = val;
  7029. break;
  7030. case CDP_CFG_WDS_AGING_TIMER:
  7031. if (val == 0)
  7032. qdf_timer_stop(&vdev->pdev->soc->ast_aging_timer);
  7033. else if (val != vdev->wds_aging_timer_val)
  7034. qdf_timer_mod(&vdev->pdev->soc->ast_aging_timer, val);
  7035. vdev->wds_aging_timer_val = val;
  7036. break;
  7037. case CDP_ENABLE_AP_BRIDGE:
  7038. if (wlan_op_mode_sta != vdev->opmode)
  7039. vdev->ap_bridge_enabled = val;
  7040. else
  7041. vdev->ap_bridge_enabled = false;
  7042. break;
  7043. case CDP_ENABLE_CIPHER:
  7044. vdev->sec_type = val;
  7045. break;
  7046. case CDP_ENABLE_QWRAP_ISOLATION:
  7047. vdev->isolation_vdev = val;
  7048. break;
  7049. default:
  7050. break;
  7051. }
  7052. dp_tx_vdev_update_search_flags(vdev);
  7053. }
  7054. /**
  7055. * dp_peer_set_nawds: set nawds bit in peer
  7056. * @peer_handle: pointer to peer
  7057. * @value: enable/disable nawds
  7058. *
  7059. * return: void
  7060. */
  7061. static void dp_peer_set_nawds(struct cdp_peer *peer_handle, uint8_t value)
  7062. {
  7063. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  7064. peer->nawds_enabled = value;
  7065. }
  7066. /*
  7067. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  7068. * @vdev_handle: DP_VDEV handle
  7069. * @map_id:ID of map that needs to be updated
  7070. *
  7071. * Return: void
  7072. */
  7073. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  7074. uint8_t map_id)
  7075. {
  7076. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7077. vdev->dscp_tid_map_id = map_id;
  7078. return;
  7079. }
  7080. /* dp_txrx_get_pdev_stats - Returns cdp_pdev_stats
  7081. * @peer_handle: DP pdev handle
  7082. *
  7083. * return : cdp_pdev_stats pointer
  7084. */
  7085. static struct cdp_pdev_stats*
  7086. dp_txrx_get_pdev_stats(struct cdp_pdev *pdev_handle)
  7087. {
  7088. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7089. dp_aggregate_pdev_stats(pdev);
  7090. return &pdev->stats;
  7091. }
  7092. /* dp_txrx_get_peer_stats - will return cdp_peer_stats
  7093. * @peer_handle: DP_PEER handle
  7094. *
  7095. * return : cdp_peer_stats pointer
  7096. */
  7097. static struct cdp_peer_stats*
  7098. dp_txrx_get_peer_stats(struct cdp_peer *peer_handle)
  7099. {
  7100. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  7101. qdf_assert(peer);
  7102. return &peer->stats;
  7103. }
  7104. /* dp_txrx_reset_peer_stats - reset cdp_peer_stats for particular peer
  7105. * @peer_handle: DP_PEER handle
  7106. *
  7107. * return : void
  7108. */
  7109. static void dp_txrx_reset_peer_stats(struct cdp_peer *peer_handle)
  7110. {
  7111. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  7112. qdf_assert(peer);
  7113. qdf_mem_zero(&peer->stats, sizeof(peer->stats));
  7114. }
  7115. /* dp_txrx_get_vdev_stats - Update buffer with cdp_vdev_stats
  7116. * @vdev_handle: DP_VDEV handle
  7117. * @buf: buffer for vdev stats
  7118. *
  7119. * return : int
  7120. */
  7121. static int dp_txrx_get_vdev_stats(struct cdp_vdev *vdev_handle, void *buf,
  7122. bool is_aggregate)
  7123. {
  7124. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7125. struct cdp_vdev_stats *vdev_stats;
  7126. struct dp_pdev *pdev;
  7127. struct dp_soc *soc;
  7128. if (!vdev)
  7129. return 1;
  7130. pdev = vdev->pdev;
  7131. if (!pdev)
  7132. return 1;
  7133. soc = pdev->soc;
  7134. vdev_stats = (struct cdp_vdev_stats *)buf;
  7135. if (is_aggregate) {
  7136. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  7137. dp_aggregate_vdev_stats(vdev, buf);
  7138. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  7139. } else {
  7140. qdf_mem_copy(vdev_stats, &vdev->stats, sizeof(vdev->stats));
  7141. }
  7142. return 0;
  7143. }
  7144. /*
  7145. * dp_get_total_per(): get total per
  7146. * @pdev_handle: DP_PDEV handle
  7147. *
  7148. * Return: % error rate using retries per packet and success packets
  7149. */
  7150. static int dp_get_total_per(struct cdp_pdev *pdev_handle)
  7151. {
  7152. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7153. dp_aggregate_pdev_stats(pdev);
  7154. if ((pdev->stats.tx.tx_success.num + pdev->stats.tx.retries) == 0)
  7155. return 0;
  7156. return ((pdev->stats.tx.retries * 100) /
  7157. ((pdev->stats.tx.tx_success.num) + (pdev->stats.tx.retries)));
  7158. }
  7159. /*
  7160. * dp_txrx_stats_publish(): publish pdev stats into a buffer
  7161. * @pdev_handle: DP_PDEV handle
  7162. * @buf: to hold pdev_stats
  7163. *
  7164. * Return: int
  7165. */
  7166. static int
  7167. dp_txrx_stats_publish(struct cdp_pdev *pdev_handle, void *buf)
  7168. {
  7169. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7170. struct cdp_pdev_stats *buffer = (struct cdp_pdev_stats *) buf;
  7171. struct cdp_txrx_stats_req req = {0,};
  7172. dp_aggregate_pdev_stats(pdev);
  7173. req.stats = (enum cdp_stats)HTT_DBG_EXT_STATS_PDEV_TX;
  7174. req.cookie_val = 1;
  7175. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  7176. req.param1, req.param2, req.param3, 0,
  7177. req.cookie_val, 0);
  7178. msleep(DP_MAX_SLEEP_TIME);
  7179. req.stats = (enum cdp_stats)HTT_DBG_EXT_STATS_PDEV_RX;
  7180. req.cookie_val = 1;
  7181. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  7182. req.param1, req.param2, req.param3, 0,
  7183. req.cookie_val, 0);
  7184. msleep(DP_MAX_SLEEP_TIME);
  7185. qdf_mem_copy(buffer, &pdev->stats, sizeof(pdev->stats));
  7186. return TXRX_STATS_LEVEL;
  7187. }
  7188. /**
  7189. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  7190. * @pdev: DP_PDEV handle
  7191. * @map_id: ID of map that needs to be updated
  7192. * @tos: index value in map
  7193. * @tid: tid value passed by the user
  7194. *
  7195. * Return: void
  7196. */
  7197. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  7198. uint8_t map_id, uint8_t tos, uint8_t tid)
  7199. {
  7200. uint8_t dscp;
  7201. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  7202. struct dp_soc *soc = pdev->soc;
  7203. if (!soc)
  7204. return;
  7205. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  7206. pdev->dscp_tid_map[map_id][dscp] = tid;
  7207. if (map_id < soc->num_hw_dscp_tid_map)
  7208. hal_tx_update_dscp_tid(soc->hal_soc, tid,
  7209. map_id, dscp);
  7210. return;
  7211. }
  7212. /**
  7213. * dp_hmmc_tid_override_en_wifi3(): Function to enable hmmc tid override.
  7214. * @pdev_handle: pdev handle
  7215. * @val: hmmc-dscp flag value
  7216. *
  7217. * Return: void
  7218. */
  7219. static void dp_hmmc_tid_override_en_wifi3(struct cdp_pdev *pdev_handle,
  7220. bool val)
  7221. {
  7222. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7223. pdev->hmmc_tid_override_en = val;
  7224. }
  7225. /**
  7226. * dp_set_hmmc_tid_val_wifi3(): Function to set hmmc tid value.
  7227. * @pdev_handle: pdev handle
  7228. * @tid: tid value
  7229. *
  7230. * Return: void
  7231. */
  7232. static void dp_set_hmmc_tid_val_wifi3(struct cdp_pdev *pdev_handle,
  7233. uint8_t tid)
  7234. {
  7235. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7236. pdev->hmmc_tid = tid;
  7237. }
  7238. /**
  7239. * dp_fw_stats_process(): Process TxRX FW stats request
  7240. * @vdev_handle: DP VDEV handle
  7241. * @req: stats request
  7242. *
  7243. * return: int
  7244. */
  7245. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle,
  7246. struct cdp_txrx_stats_req *req)
  7247. {
  7248. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7249. struct dp_pdev *pdev = NULL;
  7250. uint32_t stats = req->stats;
  7251. uint8_t mac_id = req->mac_id;
  7252. if (!vdev) {
  7253. DP_TRACE(NONE, "VDEV not found");
  7254. return 1;
  7255. }
  7256. pdev = vdev->pdev;
  7257. /*
  7258. * For HTT_DBG_EXT_STATS_RESET command, FW need to config
  7259. * from param0 to param3 according to below rule:
  7260. *
  7261. * PARAM:
  7262. * - config_param0 : start_offset (stats type)
  7263. * - config_param1 : stats bmask from start offset
  7264. * - config_param2 : stats bmask from start offset + 32
  7265. * - config_param3 : stats bmask from start offset + 64
  7266. */
  7267. if (req->stats == CDP_TXRX_STATS_0) {
  7268. req->param0 = HTT_DBG_EXT_STATS_PDEV_TX;
  7269. req->param1 = 0xFFFFFFFF;
  7270. req->param2 = 0xFFFFFFFF;
  7271. req->param3 = 0xFFFFFFFF;
  7272. } else if (req->stats == (uint8_t)HTT_DBG_EXT_STATS_PDEV_TX_MU) {
  7273. req->param0 = HTT_DBG_EXT_STATS_SET_VDEV_MASK(vdev->vdev_id);
  7274. }
  7275. return dp_h2t_ext_stats_msg_send(pdev, stats, req->param0,
  7276. req->param1, req->param2, req->param3,
  7277. 0, 0, mac_id);
  7278. }
  7279. /**
  7280. * dp_txrx_stats_request - function to map to firmware and host stats
  7281. * @vdev: virtual handle
  7282. * @req: stats request
  7283. *
  7284. * Return: QDF_STATUS
  7285. */
  7286. static
  7287. QDF_STATUS dp_txrx_stats_request(struct cdp_vdev *vdev,
  7288. struct cdp_txrx_stats_req *req)
  7289. {
  7290. int host_stats;
  7291. int fw_stats;
  7292. enum cdp_stats stats;
  7293. int num_stats;
  7294. if (!vdev || !req) {
  7295. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7296. "Invalid vdev/req instance");
  7297. return QDF_STATUS_E_INVAL;
  7298. }
  7299. stats = req->stats;
  7300. if (stats >= CDP_TXRX_MAX_STATS)
  7301. return QDF_STATUS_E_INVAL;
  7302. /*
  7303. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  7304. * has to be updated if new FW HTT stats added
  7305. */
  7306. if (stats > CDP_TXRX_STATS_HTT_MAX)
  7307. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  7308. num_stats = QDF_ARRAY_SIZE(dp_stats_mapping_table);
  7309. if (stats >= num_stats) {
  7310. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7311. "%s: Invalid stats option: %d", __func__, stats);
  7312. return QDF_STATUS_E_INVAL;
  7313. }
  7314. req->stats = stats;
  7315. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  7316. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  7317. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  7318. "stats: %u fw_stats_type: %d host_stats: %d",
  7319. stats, fw_stats, host_stats);
  7320. if (fw_stats != TXRX_FW_STATS_INVALID) {
  7321. /* update request with FW stats type */
  7322. req->stats = fw_stats;
  7323. return dp_fw_stats_process(vdev, req);
  7324. }
  7325. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  7326. (host_stats <= TXRX_HOST_STATS_MAX))
  7327. return dp_print_host_stats(vdev, req);
  7328. else
  7329. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  7330. "Wrong Input for TxRx Stats");
  7331. return QDF_STATUS_SUCCESS;
  7332. }
  7333. /*
  7334. * dp_print_napi_stats(): NAPI stats
  7335. * @soc - soc handle
  7336. */
  7337. static void dp_print_napi_stats(struct dp_soc *soc)
  7338. {
  7339. hif_print_napi_stats(soc->hif_handle);
  7340. }
  7341. /*
  7342. * dp_print_per_ring_stats(): Packet count per ring
  7343. * @soc - soc handle
  7344. */
  7345. static void dp_print_per_ring_stats(struct dp_soc *soc)
  7346. {
  7347. uint8_t ring;
  7348. uint16_t core;
  7349. uint64_t total_packets;
  7350. DP_TRACE_STATS(INFO_HIGH, "Reo packets per ring:");
  7351. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  7352. total_packets = 0;
  7353. DP_TRACE_STATS(INFO_HIGH,
  7354. "Packets on ring %u:", ring);
  7355. for (core = 0; core < NR_CPUS; core++) {
  7356. DP_TRACE_STATS(INFO_HIGH,
  7357. "Packets arriving on core %u: %llu",
  7358. core,
  7359. soc->stats.rx.ring_packets[core][ring]);
  7360. total_packets += soc->stats.rx.ring_packets[core][ring];
  7361. }
  7362. DP_TRACE_STATS(INFO_HIGH,
  7363. "Total packets on ring %u: %llu",
  7364. ring, total_packets);
  7365. }
  7366. }
  7367. /*
  7368. * dp_txrx_path_stats() - Function to display dump stats
  7369. * @soc - soc handle
  7370. *
  7371. * return: none
  7372. */
  7373. static void dp_txrx_path_stats(struct dp_soc *soc)
  7374. {
  7375. uint8_t error_code;
  7376. uint8_t loop_pdev;
  7377. struct dp_pdev *pdev;
  7378. uint8_t i;
  7379. if (!soc) {
  7380. DP_TRACE(ERROR, "%s: Invalid access",
  7381. __func__);
  7382. return;
  7383. }
  7384. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  7385. pdev = soc->pdev_list[loop_pdev];
  7386. dp_aggregate_pdev_stats(pdev);
  7387. DP_TRACE_STATS(INFO_HIGH, "Tx path Statistics:");
  7388. DP_TRACE_STATS(INFO_HIGH, "from stack: %u msdus (%llu bytes)",
  7389. pdev->stats.tx_i.rcvd.num,
  7390. pdev->stats.tx_i.rcvd.bytes);
  7391. DP_TRACE_STATS(INFO_HIGH,
  7392. "processed from host: %u msdus (%llu bytes)",
  7393. pdev->stats.tx_i.processed.num,
  7394. pdev->stats.tx_i.processed.bytes);
  7395. DP_TRACE_STATS(INFO_HIGH,
  7396. "successfully transmitted: %u msdus (%llu bytes)",
  7397. pdev->stats.tx.tx_success.num,
  7398. pdev->stats.tx.tx_success.bytes);
  7399. DP_TRACE_STATS(INFO_HIGH, "Dropped in host:");
  7400. DP_TRACE_STATS(INFO_HIGH, "Total packets dropped: %u,",
  7401. pdev->stats.tx_i.dropped.dropped_pkt.num);
  7402. DP_TRACE_STATS(INFO_HIGH, "Descriptor not available: %u",
  7403. pdev->stats.tx_i.dropped.desc_na.num);
  7404. DP_TRACE_STATS(INFO_HIGH, "Ring full: %u",
  7405. pdev->stats.tx_i.dropped.ring_full);
  7406. DP_TRACE_STATS(INFO_HIGH, "Enqueue fail: %u",
  7407. pdev->stats.tx_i.dropped.enqueue_fail);
  7408. DP_TRACE_STATS(INFO_HIGH, "DMA Error: %u",
  7409. pdev->stats.tx_i.dropped.dma_error);
  7410. DP_TRACE_STATS(INFO_HIGH, "Dropped in hardware:");
  7411. DP_TRACE_STATS(INFO_HIGH, "total packets dropped: %u",
  7412. pdev->stats.tx.tx_failed);
  7413. DP_TRACE_STATS(INFO_HIGH, "mpdu age out: %u",
  7414. pdev->stats.tx.dropped.age_out);
  7415. DP_TRACE_STATS(INFO_HIGH, "firmware removed packets: %u",
  7416. pdev->stats.tx.dropped.fw_rem.num);
  7417. DP_TRACE_STATS(INFO_HIGH, "firmware removed bytes: %llu",
  7418. pdev->stats.tx.dropped.fw_rem.bytes);
  7419. DP_TRACE_STATS(INFO_HIGH, "firmware removed tx: %u",
  7420. pdev->stats.tx.dropped.fw_rem_tx);
  7421. DP_TRACE_STATS(INFO_HIGH, "firmware removed notx %u",
  7422. pdev->stats.tx.dropped.fw_rem_notx);
  7423. DP_TRACE_STATS(INFO_HIGH, "Invalid peer on tx path: %u",
  7424. pdev->soc->stats.tx.tx_invalid_peer.num);
  7425. DP_TRACE_STATS(INFO_HIGH, "Tx packets sent per interrupt:");
  7426. DP_TRACE_STATS(INFO_HIGH, "Single Packet: %u",
  7427. pdev->stats.tx_comp_histogram.pkts_1);
  7428. DP_TRACE_STATS(INFO_HIGH, "2-20 Packets: %u",
  7429. pdev->stats.tx_comp_histogram.pkts_2_20);
  7430. DP_TRACE_STATS(INFO_HIGH, "21-40 Packets: %u",
  7431. pdev->stats.tx_comp_histogram.pkts_21_40);
  7432. DP_TRACE_STATS(INFO_HIGH, "41-60 Packets: %u",
  7433. pdev->stats.tx_comp_histogram.pkts_41_60);
  7434. DP_TRACE_STATS(INFO_HIGH, "61-80 Packets: %u",
  7435. pdev->stats.tx_comp_histogram.pkts_61_80);
  7436. DP_TRACE_STATS(INFO_HIGH, "81-100 Packets: %u",
  7437. pdev->stats.tx_comp_histogram.pkts_81_100);
  7438. DP_TRACE_STATS(INFO_HIGH, "101-200 Packets: %u",
  7439. pdev->stats.tx_comp_histogram.pkts_101_200);
  7440. DP_TRACE_STATS(INFO_HIGH, " 201+ Packets: %u",
  7441. pdev->stats.tx_comp_histogram.pkts_201_plus);
  7442. DP_TRACE_STATS(INFO_HIGH, "Rx path statistics");
  7443. DP_TRACE_STATS(INFO_HIGH,
  7444. "delivered %u msdus ( %llu bytes),",
  7445. pdev->stats.rx.to_stack.num,
  7446. pdev->stats.rx.to_stack.bytes);
  7447. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  7448. DP_TRACE_STATS(INFO_HIGH,
  7449. "received on reo[%d] %u msdus( %llu bytes),",
  7450. i, pdev->stats.rx.rcvd_reo[i].num,
  7451. pdev->stats.rx.rcvd_reo[i].bytes);
  7452. DP_TRACE_STATS(INFO_HIGH,
  7453. "intra-bss packets %u msdus ( %llu bytes),",
  7454. pdev->stats.rx.intra_bss.pkts.num,
  7455. pdev->stats.rx.intra_bss.pkts.bytes);
  7456. DP_TRACE_STATS(INFO_HIGH,
  7457. "intra-bss fails %u msdus ( %llu bytes),",
  7458. pdev->stats.rx.intra_bss.fail.num,
  7459. pdev->stats.rx.intra_bss.fail.bytes);
  7460. DP_TRACE_STATS(INFO_HIGH,
  7461. "raw packets %u msdus ( %llu bytes),",
  7462. pdev->stats.rx.raw.num,
  7463. pdev->stats.rx.raw.bytes);
  7464. DP_TRACE_STATS(INFO_HIGH, "dropped: error %u msdus",
  7465. pdev->stats.rx.err.mic_err);
  7466. DP_TRACE_STATS(INFO_HIGH, "Invalid peer on rx path: %u",
  7467. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  7468. DP_TRACE_STATS(INFO_HIGH, "sw_peer_id invalid %u",
  7469. pdev->soc->stats.rx.err.rx_invalid_peer_id.num);
  7470. DP_TRACE_STATS(INFO_HIGH, "Reo Statistics");
  7471. DP_TRACE_STATS(INFO_HIGH, "rbm error: %u msdus",
  7472. pdev->soc->stats.rx.err.invalid_rbm);
  7473. DP_TRACE_STATS(INFO_HIGH, "hal ring access fail: %u msdus",
  7474. pdev->soc->stats.rx.err.hal_ring_access_fail);
  7475. for (error_code = 0; error_code < HAL_REO_ERR_MAX;
  7476. error_code++) {
  7477. if (!pdev->soc->stats.rx.err.reo_error[error_code])
  7478. continue;
  7479. DP_TRACE_STATS(INFO_HIGH,
  7480. "Reo error number (%u): %u msdus",
  7481. error_code,
  7482. pdev->soc->stats.rx.err
  7483. .reo_error[error_code]);
  7484. }
  7485. for (error_code = 0; error_code < HAL_RXDMA_ERR_MAX;
  7486. error_code++) {
  7487. if (!pdev->soc->stats.rx.err.rxdma_error[error_code])
  7488. continue;
  7489. DP_TRACE_STATS(INFO_HIGH,
  7490. "Rxdma error number (%u): %u msdus",
  7491. error_code,
  7492. pdev->soc->stats.rx.err
  7493. .rxdma_error[error_code]);
  7494. }
  7495. DP_TRACE_STATS(INFO_HIGH, "Rx packets reaped per interrupt:");
  7496. DP_TRACE_STATS(INFO_HIGH, "Single Packet: %u",
  7497. pdev->stats.rx_ind_histogram.pkts_1);
  7498. DP_TRACE_STATS(INFO_HIGH, "2-20 Packets: %u",
  7499. pdev->stats.rx_ind_histogram.pkts_2_20);
  7500. DP_TRACE_STATS(INFO_HIGH, "21-40 Packets: %u",
  7501. pdev->stats.rx_ind_histogram.pkts_21_40);
  7502. DP_TRACE_STATS(INFO_HIGH, "41-60 Packets: %u",
  7503. pdev->stats.rx_ind_histogram.pkts_41_60);
  7504. DP_TRACE_STATS(INFO_HIGH, "61-80 Packets: %u",
  7505. pdev->stats.rx_ind_histogram.pkts_61_80);
  7506. DP_TRACE_STATS(INFO_HIGH, "81-100 Packets: %u",
  7507. pdev->stats.rx_ind_histogram.pkts_81_100);
  7508. DP_TRACE_STATS(INFO_HIGH, "101-200 Packets: %u",
  7509. pdev->stats.rx_ind_histogram.pkts_101_200);
  7510. DP_TRACE_STATS(INFO_HIGH, " 201+ Packets: %u",
  7511. pdev->stats.rx_ind_histogram.pkts_201_plus);
  7512. DP_TRACE_STATS(INFO_HIGH, "%s: tso_enable: %u lro_enable: %u rx_hash: %u napi_enable: %u",
  7513. __func__,
  7514. pdev->soc->wlan_cfg_ctx
  7515. ->tso_enabled,
  7516. pdev->soc->wlan_cfg_ctx
  7517. ->lro_enabled,
  7518. pdev->soc->wlan_cfg_ctx
  7519. ->rx_hash,
  7520. pdev->soc->wlan_cfg_ctx
  7521. ->napi_enabled);
  7522. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  7523. DP_TRACE_STATS(INFO_HIGH, "%s: Tx flow stop queue: %u tx flow start queue offset: %u",
  7524. __func__,
  7525. pdev->soc->wlan_cfg_ctx
  7526. ->tx_flow_stop_queue_threshold,
  7527. pdev->soc->wlan_cfg_ctx
  7528. ->tx_flow_start_queue_offset);
  7529. #endif
  7530. }
  7531. }
  7532. /*
  7533. * dp_txrx_dump_stats() - Dump statistics
  7534. * @value - Statistics option
  7535. */
  7536. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value,
  7537. enum qdf_stats_verbosity_level level)
  7538. {
  7539. struct dp_soc *soc =
  7540. (struct dp_soc *)psoc;
  7541. QDF_STATUS status = QDF_STATUS_SUCCESS;
  7542. if (!soc) {
  7543. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7544. "%s: soc is NULL", __func__);
  7545. return QDF_STATUS_E_INVAL;
  7546. }
  7547. switch (value) {
  7548. case CDP_TXRX_PATH_STATS:
  7549. dp_txrx_path_stats(soc);
  7550. break;
  7551. case CDP_RX_RING_STATS:
  7552. dp_print_per_ring_stats(soc);
  7553. break;
  7554. case CDP_TXRX_TSO_STATS:
  7555. /* TODO: NOT IMPLEMENTED */
  7556. break;
  7557. case CDP_DUMP_TX_FLOW_POOL_INFO:
  7558. cdp_dump_flow_pool_info((struct cdp_soc_t *)soc);
  7559. break;
  7560. case CDP_DP_NAPI_STATS:
  7561. dp_print_napi_stats(soc);
  7562. break;
  7563. case CDP_TXRX_DESC_STATS:
  7564. /* TODO: NOT IMPLEMENTED */
  7565. break;
  7566. default:
  7567. status = QDF_STATUS_E_INVAL;
  7568. break;
  7569. }
  7570. return status;
  7571. }
  7572. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  7573. /**
  7574. * dp_update_flow_control_parameters() - API to store datapath
  7575. * config parameters
  7576. * @soc: soc handle
  7577. * @cfg: ini parameter handle
  7578. *
  7579. * Return: void
  7580. */
  7581. static inline
  7582. void dp_update_flow_control_parameters(struct dp_soc *soc,
  7583. struct cdp_config_params *params)
  7584. {
  7585. soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold =
  7586. params->tx_flow_stop_queue_threshold;
  7587. soc->wlan_cfg_ctx->tx_flow_start_queue_offset =
  7588. params->tx_flow_start_queue_offset;
  7589. }
  7590. #else
  7591. static inline
  7592. void dp_update_flow_control_parameters(struct dp_soc *soc,
  7593. struct cdp_config_params *params)
  7594. {
  7595. }
  7596. #endif
  7597. /**
  7598. * dp_update_config_parameters() - API to store datapath
  7599. * config parameters
  7600. * @soc: soc handle
  7601. * @cfg: ini parameter handle
  7602. *
  7603. * Return: status
  7604. */
  7605. static
  7606. QDF_STATUS dp_update_config_parameters(struct cdp_soc *psoc,
  7607. struct cdp_config_params *params)
  7608. {
  7609. struct dp_soc *soc = (struct dp_soc *)psoc;
  7610. if (!(soc)) {
  7611. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7612. "%s: Invalid handle", __func__);
  7613. return QDF_STATUS_E_INVAL;
  7614. }
  7615. soc->wlan_cfg_ctx->tso_enabled = params->tso_enable;
  7616. soc->wlan_cfg_ctx->lro_enabled = params->lro_enable;
  7617. soc->wlan_cfg_ctx->rx_hash = params->flow_steering_enable;
  7618. soc->wlan_cfg_ctx->tcp_udp_checksumoffload =
  7619. params->tcp_udp_checksumoffload;
  7620. soc->wlan_cfg_ctx->napi_enabled = params->napi_enable;
  7621. soc->wlan_cfg_ctx->ipa_enabled = params->ipa_enable;
  7622. soc->wlan_cfg_ctx->gro_enabled = params->gro_enable;
  7623. dp_update_flow_control_parameters(soc, params);
  7624. return QDF_STATUS_SUCCESS;
  7625. }
  7626. /**
  7627. * dp_txrx_set_wds_rx_policy() - API to store datapath
  7628. * config parameters
  7629. * @vdev_handle - datapath vdev handle
  7630. * @cfg: ini parameter handle
  7631. *
  7632. * Return: status
  7633. */
  7634. #ifdef WDS_VENDOR_EXTENSION
  7635. void
  7636. dp_txrx_set_wds_rx_policy(
  7637. struct cdp_vdev *vdev_handle,
  7638. u_int32_t val)
  7639. {
  7640. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7641. struct dp_peer *peer;
  7642. if (vdev->opmode == wlan_op_mode_ap) {
  7643. /* for ap, set it on bss_peer */
  7644. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  7645. if (peer->bss_peer) {
  7646. peer->wds_ecm.wds_rx_filter = 1;
  7647. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  7648. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  7649. break;
  7650. }
  7651. }
  7652. } else if (vdev->opmode == wlan_op_mode_sta) {
  7653. peer = TAILQ_FIRST(&vdev->peer_list);
  7654. peer->wds_ecm.wds_rx_filter = 1;
  7655. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  7656. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  7657. }
  7658. }
  7659. /**
  7660. * dp_txrx_peer_wds_tx_policy_update() - API to set tx wds policy
  7661. *
  7662. * @peer_handle - datapath peer handle
  7663. * @wds_tx_ucast: policy for unicast transmission
  7664. * @wds_tx_mcast: policy for multicast transmission
  7665. *
  7666. * Return: void
  7667. */
  7668. void
  7669. dp_txrx_peer_wds_tx_policy_update(struct cdp_peer *peer_handle,
  7670. int wds_tx_ucast, int wds_tx_mcast)
  7671. {
  7672. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  7673. if (wds_tx_ucast || wds_tx_mcast) {
  7674. peer->wds_enabled = 1;
  7675. peer->wds_ecm.wds_tx_ucast_4addr = wds_tx_ucast;
  7676. peer->wds_ecm.wds_tx_mcast_4addr = wds_tx_mcast;
  7677. } else {
  7678. peer->wds_enabled = 0;
  7679. peer->wds_ecm.wds_tx_ucast_4addr = 0;
  7680. peer->wds_ecm.wds_tx_mcast_4addr = 0;
  7681. }
  7682. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  7683. FL("Policy Update set to :\
  7684. peer->wds_enabled %d\
  7685. peer->wds_ecm.wds_tx_ucast_4addr %d\
  7686. peer->wds_ecm.wds_tx_mcast_4addr %d"),
  7687. peer->wds_enabled, peer->wds_ecm.wds_tx_ucast_4addr,
  7688. peer->wds_ecm.wds_tx_mcast_4addr);
  7689. return;
  7690. }
  7691. #endif
  7692. static struct cdp_wds_ops dp_ops_wds = {
  7693. .vdev_set_wds = dp_vdev_set_wds,
  7694. #ifdef WDS_VENDOR_EXTENSION
  7695. .txrx_set_wds_rx_policy = dp_txrx_set_wds_rx_policy,
  7696. .txrx_wds_peer_tx_policy_update = dp_txrx_peer_wds_tx_policy_update,
  7697. #endif
  7698. };
  7699. /*
  7700. * dp_txrx_data_tx_cb_set(): set the callback for non standard tx
  7701. * @vdev_handle - datapath vdev handle
  7702. * @callback - callback function
  7703. * @ctxt: callback context
  7704. *
  7705. */
  7706. static void
  7707. dp_txrx_data_tx_cb_set(struct cdp_vdev *vdev_handle,
  7708. ol_txrx_data_tx_cb callback, void *ctxt)
  7709. {
  7710. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7711. vdev->tx_non_std_data_callback.func = callback;
  7712. vdev->tx_non_std_data_callback.ctxt = ctxt;
  7713. }
  7714. /**
  7715. * dp_pdev_get_dp_txrx_handle() - get dp handle from pdev
  7716. * @pdev_hdl: datapath pdev handle
  7717. *
  7718. * Return: opaque pointer to dp txrx handle
  7719. */
  7720. static void *dp_pdev_get_dp_txrx_handle(struct cdp_pdev *pdev_hdl)
  7721. {
  7722. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  7723. return pdev->dp_txrx_handle;
  7724. }
  7725. /**
  7726. * dp_pdev_set_dp_txrx_handle() - set dp handle in pdev
  7727. * @pdev_hdl: datapath pdev handle
  7728. * @dp_txrx_hdl: opaque pointer for dp_txrx_handle
  7729. *
  7730. * Return: void
  7731. */
  7732. static void
  7733. dp_pdev_set_dp_txrx_handle(struct cdp_pdev *pdev_hdl, void *dp_txrx_hdl)
  7734. {
  7735. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  7736. pdev->dp_txrx_handle = dp_txrx_hdl;
  7737. }
  7738. /**
  7739. * dp_soc_get_dp_txrx_handle() - get context for external-dp from dp soc
  7740. * @soc_handle: datapath soc handle
  7741. *
  7742. * Return: opaque pointer to external dp (non-core DP)
  7743. */
  7744. static void *dp_soc_get_dp_txrx_handle(struct cdp_soc *soc_handle)
  7745. {
  7746. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  7747. return soc->external_txrx_handle;
  7748. }
  7749. /**
  7750. * dp_soc_set_dp_txrx_handle() - set external dp handle in soc
  7751. * @soc_handle: datapath soc handle
  7752. * @txrx_handle: opaque pointer to external dp (non-core DP)
  7753. *
  7754. * Return: void
  7755. */
  7756. static void
  7757. dp_soc_set_dp_txrx_handle(struct cdp_soc *soc_handle, void *txrx_handle)
  7758. {
  7759. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  7760. soc->external_txrx_handle = txrx_handle;
  7761. }
  7762. /**
  7763. * dp_get_cfg_capabilities() - get dp capabilities
  7764. * @soc_handle: datapath soc handle
  7765. * @dp_caps: enum for dp capabilities
  7766. *
  7767. * Return: bool to determine if dp caps is enabled
  7768. */
  7769. static bool
  7770. dp_get_cfg_capabilities(struct cdp_soc_t *soc_handle,
  7771. enum cdp_capabilities dp_caps)
  7772. {
  7773. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  7774. return wlan_cfg_get_dp_caps(soc->wlan_cfg_ctx, dp_caps);
  7775. }
  7776. #ifdef FEATURE_AST
  7777. static void dp_peer_teardown_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  7778. {
  7779. struct dp_vdev *vdev = (struct dp_vdev *) vdev_hdl;
  7780. struct dp_peer *peer = (struct dp_peer *) peer_hdl;
  7781. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  7782. /*
  7783. * For BSS peer, new peer is not created on alloc_node if the
  7784. * peer with same address already exists , instead refcnt is
  7785. * increased for existing peer. Correspondingly in delete path,
  7786. * only refcnt is decreased; and peer is only deleted , when all
  7787. * references are deleted. So delete_in_progress should not be set
  7788. * for bss_peer, unless only 2 reference remains (peer map reference
  7789. * and peer hash table reference).
  7790. */
  7791. if (peer->bss_peer && (qdf_atomic_read(&peer->ref_cnt) > 2)) {
  7792. return;
  7793. }
  7794. qdf_spin_lock_bh(&soc->ast_lock);
  7795. peer->delete_in_progress = true;
  7796. dp_peer_delete_ast_entries(soc, peer);
  7797. qdf_spin_unlock_bh(&soc->ast_lock);
  7798. }
  7799. #endif
  7800. #ifdef ATH_SUPPORT_NAC_RSSI
  7801. /**
  7802. * dp_vdev_get_neighbour_rssi(): Store RSSI for configured NAC
  7803. * @vdev_hdl: DP vdev handle
  7804. * @rssi: rssi value
  7805. *
  7806. * Return: 0 for success. nonzero for failure.
  7807. */
  7808. static QDF_STATUS dp_vdev_get_neighbour_rssi(struct cdp_vdev *vdev_hdl,
  7809. char *mac_addr,
  7810. uint8_t *rssi)
  7811. {
  7812. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  7813. struct dp_pdev *pdev = vdev->pdev;
  7814. struct dp_neighbour_peer *peer = NULL;
  7815. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  7816. *rssi = 0;
  7817. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  7818. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  7819. neighbour_peer_list_elem) {
  7820. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  7821. mac_addr, DP_MAC_ADDR_LEN) == 0) {
  7822. *rssi = peer->rssi;
  7823. status = QDF_STATUS_SUCCESS;
  7824. break;
  7825. }
  7826. }
  7827. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  7828. return status;
  7829. }
  7830. static QDF_STATUS dp_config_for_nac_rssi(struct cdp_vdev *vdev_handle,
  7831. enum cdp_nac_param_cmd cmd, char *bssid, char *client_macaddr,
  7832. uint8_t chan_num)
  7833. {
  7834. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7835. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  7836. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  7837. pdev->nac_rssi_filtering = 1;
  7838. /* Store address of NAC (neighbour peer) which will be checked
  7839. * against TA of received packets.
  7840. */
  7841. if (cmd == CDP_NAC_PARAM_ADD) {
  7842. dp_update_filter_neighbour_peers(vdev_handle, DP_NAC_PARAM_ADD,
  7843. client_macaddr);
  7844. } else if (cmd == CDP_NAC_PARAM_DEL) {
  7845. dp_update_filter_neighbour_peers(vdev_handle,
  7846. DP_NAC_PARAM_DEL,
  7847. client_macaddr);
  7848. }
  7849. if (soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi)
  7850. soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi
  7851. ((void *)vdev->pdev->ctrl_pdev,
  7852. vdev->vdev_id, cmd, bssid);
  7853. return QDF_STATUS_SUCCESS;
  7854. }
  7855. #endif
  7856. /**
  7857. * dp_enable_peer_based_pktlog() - Set Flag for peer based filtering
  7858. * for pktlog
  7859. * @txrx_pdev_handle: cdp_pdev handle
  7860. * @enb_dsb: Enable or disable peer based filtering
  7861. *
  7862. * Return: QDF_STATUS
  7863. */
  7864. static int
  7865. dp_enable_peer_based_pktlog(
  7866. struct cdp_pdev *txrx_pdev_handle,
  7867. char *mac_addr, uint8_t enb_dsb)
  7868. {
  7869. struct dp_peer *peer;
  7870. uint8_t local_id;
  7871. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev_handle;
  7872. peer = (struct dp_peer *)dp_find_peer_by_addr(txrx_pdev_handle,
  7873. mac_addr, &local_id);
  7874. if (!peer) {
  7875. dp_err("Invalid Peer");
  7876. return QDF_STATUS_E_FAILURE;
  7877. }
  7878. peer->peer_based_pktlog_filter = enb_dsb;
  7879. pdev->dp_peer_based_pktlog = enb_dsb;
  7880. return QDF_STATUS_SUCCESS;
  7881. }
  7882. static QDF_STATUS dp_peer_map_attach_wifi3(struct cdp_soc_t *soc_hdl,
  7883. uint32_t max_peers,
  7884. uint32_t max_ast_index,
  7885. bool peer_map_unmap_v2)
  7886. {
  7887. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  7888. soc->max_peers = max_peers;
  7889. qdf_print ("%s max_peers %u, max_ast_index: %u\n",
  7890. __func__, max_peers, max_ast_index);
  7891. wlan_cfg_set_max_ast_idx(soc->wlan_cfg_ctx, max_ast_index);
  7892. if (dp_peer_find_attach(soc))
  7893. return QDF_STATUS_E_FAILURE;
  7894. soc->is_peer_map_unmap_v2 = peer_map_unmap_v2;
  7895. return QDF_STATUS_SUCCESS;
  7896. }
  7897. /**
  7898. * dp_pdev_set_ctrl_pdev() - set ctrl pdev handle in dp pdev
  7899. * @dp_pdev: dp pdev handle
  7900. * @ctrl_pdev: UMAC ctrl pdev handle
  7901. *
  7902. * Return: void
  7903. */
  7904. static void dp_pdev_set_ctrl_pdev(struct cdp_pdev *dp_pdev,
  7905. struct cdp_ctrl_objmgr_pdev *ctrl_pdev)
  7906. {
  7907. struct dp_pdev *pdev = (struct dp_pdev *)dp_pdev;
  7908. pdev->ctrl_pdev = ctrl_pdev;
  7909. }
  7910. /*
  7911. * dp_get_cfg() - get dp cfg
  7912. * @soc: cdp soc handle
  7913. * @cfg: cfg enum
  7914. *
  7915. * Return: cfg value
  7916. */
  7917. static uint32_t dp_get_cfg(void *soc, enum cdp_dp_cfg cfg)
  7918. {
  7919. struct dp_soc *dpsoc = (struct dp_soc *)soc;
  7920. uint32_t value = 0;
  7921. switch (cfg) {
  7922. case cfg_dp_enable_data_stall:
  7923. value = dpsoc->wlan_cfg_ctx->enable_data_stall_detection;
  7924. break;
  7925. case cfg_dp_enable_ip_tcp_udp_checksum_offload:
  7926. value = dpsoc->wlan_cfg_ctx->tcp_udp_checksumoffload;
  7927. break;
  7928. case cfg_dp_tso_enable:
  7929. value = dpsoc->wlan_cfg_ctx->tso_enabled;
  7930. break;
  7931. case cfg_dp_lro_enable:
  7932. value = dpsoc->wlan_cfg_ctx->lro_enabled;
  7933. break;
  7934. case cfg_dp_gro_enable:
  7935. value = dpsoc->wlan_cfg_ctx->gro_enabled;
  7936. break;
  7937. case cfg_dp_tx_flow_start_queue_offset:
  7938. value = dpsoc->wlan_cfg_ctx->tx_flow_start_queue_offset;
  7939. break;
  7940. case cfg_dp_tx_flow_stop_queue_threshold:
  7941. value = dpsoc->wlan_cfg_ctx->tx_flow_stop_queue_threshold;
  7942. break;
  7943. case cfg_dp_disable_intra_bss_fwd:
  7944. value = dpsoc->wlan_cfg_ctx->disable_intra_bss_fwd;
  7945. break;
  7946. default:
  7947. value = 0;
  7948. }
  7949. return value;
  7950. }
  7951. static struct cdp_cmn_ops dp_ops_cmn = {
  7952. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  7953. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  7954. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  7955. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  7956. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  7957. .txrx_pdev_deinit = dp_pdev_deinit_wifi3,
  7958. .txrx_peer_create = dp_peer_create_wifi3,
  7959. .txrx_peer_setup = dp_peer_setup_wifi3,
  7960. #ifdef FEATURE_AST
  7961. .txrx_peer_teardown = dp_peer_teardown_wifi3,
  7962. #else
  7963. .txrx_peer_teardown = NULL,
  7964. #endif
  7965. .txrx_peer_add_ast = dp_peer_add_ast_wifi3,
  7966. .txrx_peer_update_ast = dp_peer_update_ast_wifi3,
  7967. .txrx_peer_get_ast_info_by_soc = dp_peer_get_ast_info_by_soc_wifi3,
  7968. .txrx_peer_get_ast_info_by_pdev =
  7969. dp_peer_get_ast_info_by_pdevid_wifi3,
  7970. .txrx_peer_ast_delete_by_soc =
  7971. dp_peer_ast_entry_del_by_soc,
  7972. .txrx_peer_ast_delete_by_pdev =
  7973. dp_peer_ast_entry_del_by_pdev,
  7974. .txrx_peer_delete = dp_peer_delete_wifi3,
  7975. .txrx_vdev_register = dp_vdev_register_wifi3,
  7976. .txrx_vdev_flush_peers = dp_vdev_flush_peers,
  7977. .txrx_soc_detach = dp_soc_detach_wifi3,
  7978. .txrx_soc_deinit = dp_soc_deinit_wifi3,
  7979. .txrx_soc_init = dp_soc_init_wifi3,
  7980. .txrx_tso_soc_attach = dp_tso_soc_attach,
  7981. .txrx_tso_soc_detach = dp_tso_soc_detach,
  7982. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  7983. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  7984. .txrx_get_mon_vdev_from_pdev = dp_get_mon_vdev_from_pdev_wifi3,
  7985. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  7986. .txrx_ath_getstats = dp_get_device_stats,
  7987. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  7988. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  7989. .addba_resp_tx_completion = dp_addba_resp_tx_completion_wifi3,
  7990. .delba_process = dp_delba_process_wifi3,
  7991. .set_addba_response = dp_set_addba_response,
  7992. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  7993. .flush_cache_rx_queue = NULL,
  7994. /* TODO: get API's for dscp-tid need to be added*/
  7995. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  7996. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  7997. .hmmc_tid_override_en = dp_hmmc_tid_override_en_wifi3,
  7998. .set_hmmc_tid_val = dp_set_hmmc_tid_val_wifi3,
  7999. .txrx_get_total_per = dp_get_total_per,
  8000. .txrx_stats_request = dp_txrx_stats_request,
  8001. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  8002. .txrx_get_pdev_id_frm_pdev = dp_get_pdev_id_frm_pdev,
  8003. .txrx_get_vow_config_frm_pdev = NULL,
  8004. .txrx_pdev_set_chan_noise_floor = dp_pdev_set_chan_noise_floor,
  8005. .txrx_set_nac = dp_set_nac,
  8006. .txrx_get_tx_pending = dp_get_tx_pending,
  8007. .txrx_set_pdev_tx_capture = dp_config_debug_sniffer,
  8008. .txrx_get_peer_mac_from_peer_id = dp_get_peer_mac_from_peer_id,
  8009. .display_stats = dp_txrx_dump_stats,
  8010. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  8011. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  8012. .txrx_intr_attach = dp_soc_interrupt_attach_wrapper,
  8013. .txrx_intr_detach = dp_soc_interrupt_detach,
  8014. .set_pn_check = dp_set_pn_check_wifi3,
  8015. .update_config_parameters = dp_update_config_parameters,
  8016. /* TODO: Add other functions */
  8017. .txrx_data_tx_cb_set = dp_txrx_data_tx_cb_set,
  8018. .get_dp_txrx_handle = dp_pdev_get_dp_txrx_handle,
  8019. .set_dp_txrx_handle = dp_pdev_set_dp_txrx_handle,
  8020. .get_soc_dp_txrx_handle = dp_soc_get_dp_txrx_handle,
  8021. .set_soc_dp_txrx_handle = dp_soc_set_dp_txrx_handle,
  8022. .txrx_set_ba_aging_timeout = dp_set_ba_aging_timeout,
  8023. .txrx_get_ba_aging_timeout = dp_get_ba_aging_timeout,
  8024. .tx_send = dp_tx_send,
  8025. .txrx_peer_reset_ast = dp_wds_reset_ast_wifi3,
  8026. .txrx_peer_reset_ast_table = dp_wds_reset_ast_table_wifi3,
  8027. .txrx_peer_flush_ast_table = dp_wds_flush_ast_table_wifi3,
  8028. .txrx_peer_map_attach = dp_peer_map_attach_wifi3,
  8029. .txrx_pdev_set_ctrl_pdev = dp_pdev_set_ctrl_pdev,
  8030. .txrx_get_os_rx_handles_from_vdev =
  8031. dp_get_os_rx_handles_from_vdev_wifi3,
  8032. .delba_tx_completion = dp_delba_tx_completion_wifi3,
  8033. .get_dp_capabilities = dp_get_cfg_capabilities,
  8034. .txrx_get_cfg = dp_get_cfg,
  8035. };
  8036. static struct cdp_ctrl_ops dp_ops_ctrl = {
  8037. .txrx_peer_authorize = dp_peer_authorize,
  8038. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  8039. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  8040. #ifdef MESH_MODE_SUPPORT
  8041. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  8042. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  8043. #endif
  8044. .txrx_set_vdev_param = dp_set_vdev_param,
  8045. .txrx_peer_set_nawds = dp_peer_set_nawds,
  8046. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  8047. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  8048. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  8049. .txrx_update_filter_neighbour_peers =
  8050. dp_update_filter_neighbour_peers,
  8051. .txrx_get_sec_type = dp_get_sec_type,
  8052. /* TODO: Add other functions */
  8053. .txrx_wdi_event_sub = dp_wdi_event_sub,
  8054. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  8055. #ifdef WDI_EVENT_ENABLE
  8056. .txrx_get_pldev = dp_get_pldev,
  8057. #endif
  8058. .txrx_set_pdev_param = dp_set_pdev_param,
  8059. #ifdef ATH_SUPPORT_NAC_RSSI
  8060. .txrx_vdev_config_for_nac_rssi = dp_config_for_nac_rssi,
  8061. .txrx_vdev_get_neighbour_rssi = dp_vdev_get_neighbour_rssi,
  8062. #endif
  8063. .set_key = dp_set_michael_key,
  8064. .txrx_get_vdev_param = dp_get_vdev_param,
  8065. .enable_peer_based_pktlog = dp_enable_peer_based_pktlog,
  8066. };
  8067. static struct cdp_me_ops dp_ops_me = {
  8068. #ifdef ATH_SUPPORT_IQUE
  8069. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  8070. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  8071. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  8072. #endif
  8073. };
  8074. static struct cdp_mon_ops dp_ops_mon = {
  8075. .txrx_monitor_set_filter_ucast_data = NULL,
  8076. .txrx_monitor_set_filter_mcast_data = NULL,
  8077. .txrx_monitor_set_filter_non_data = NULL,
  8078. .txrx_monitor_get_filter_ucast_data = dp_vdev_get_filter_ucast_data,
  8079. .txrx_monitor_get_filter_mcast_data = dp_vdev_get_filter_mcast_data,
  8080. .txrx_monitor_get_filter_non_data = dp_vdev_get_filter_non_data,
  8081. .txrx_reset_monitor_mode = dp_reset_monitor_mode,
  8082. /* Added support for HK advance filter */
  8083. .txrx_set_advance_monitor_filter = dp_pdev_set_advance_monitor_filter,
  8084. };
  8085. static struct cdp_host_stats_ops dp_ops_host_stats = {
  8086. .txrx_per_peer_stats = dp_get_host_peer_stats,
  8087. .get_fw_peer_stats = dp_get_fw_peer_stats,
  8088. .get_htt_stats = dp_get_htt_stats,
  8089. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  8090. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  8091. .txrx_stats_publish = dp_txrx_stats_publish,
  8092. .txrx_get_vdev_stats = dp_txrx_get_vdev_stats,
  8093. .txrx_get_peer_stats = dp_txrx_get_peer_stats,
  8094. .txrx_reset_peer_stats = dp_txrx_reset_peer_stats,
  8095. .txrx_get_pdev_stats = dp_txrx_get_pdev_stats,
  8096. /* TODO */
  8097. };
  8098. static struct cdp_raw_ops dp_ops_raw = {
  8099. /* TODO */
  8100. };
  8101. #ifdef CONFIG_WIN
  8102. static struct cdp_pflow_ops dp_ops_pflow = {
  8103. /* TODO */
  8104. };
  8105. #endif /* CONFIG_WIN */
  8106. #ifdef FEATURE_RUNTIME_PM
  8107. /**
  8108. * dp_runtime_suspend() - ensure DP is ready to runtime suspend
  8109. * @opaque_pdev: DP pdev context
  8110. *
  8111. * DP is ready to runtime suspend if there are no pending TX packets.
  8112. *
  8113. * Return: QDF_STATUS
  8114. */
  8115. static QDF_STATUS dp_runtime_suspend(struct cdp_pdev *opaque_pdev)
  8116. {
  8117. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  8118. struct dp_soc *soc = pdev->soc;
  8119. /* Abort if there are any pending TX packets */
  8120. if (dp_get_tx_pending(opaque_pdev) > 0) {
  8121. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  8122. FL("Abort suspend due to pending TX packets"));
  8123. return QDF_STATUS_E_AGAIN;
  8124. }
  8125. if (soc->intr_mode == DP_INTR_POLL)
  8126. qdf_timer_stop(&soc->int_timer);
  8127. return QDF_STATUS_SUCCESS;
  8128. }
  8129. /**
  8130. * dp_runtime_resume() - ensure DP is ready to runtime resume
  8131. * @opaque_pdev: DP pdev context
  8132. *
  8133. * Resume DP for runtime PM.
  8134. *
  8135. * Return: QDF_STATUS
  8136. */
  8137. static QDF_STATUS dp_runtime_resume(struct cdp_pdev *opaque_pdev)
  8138. {
  8139. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  8140. struct dp_soc *soc = pdev->soc;
  8141. void *hal_srng;
  8142. int i;
  8143. if (soc->intr_mode == DP_INTR_POLL)
  8144. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  8145. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  8146. hal_srng = soc->tcl_data_ring[i].hal_srng;
  8147. if (hal_srng) {
  8148. /* We actually only need to acquire the lock */
  8149. hal_srng_access_start(soc->hal_soc, hal_srng);
  8150. /* Update SRC ring head pointer for HW to send
  8151. all pending packets */
  8152. hal_srng_access_end(soc->hal_soc, hal_srng);
  8153. }
  8154. }
  8155. return QDF_STATUS_SUCCESS;
  8156. }
  8157. #endif /* FEATURE_RUNTIME_PM */
  8158. #ifndef CONFIG_WIN
  8159. static struct cdp_misc_ops dp_ops_misc = {
  8160. #ifdef FEATURE_WLAN_TDLS
  8161. .tx_non_std = dp_tx_non_std,
  8162. #endif /* FEATURE_WLAN_TDLS */
  8163. .get_opmode = dp_get_opmode,
  8164. #ifdef FEATURE_RUNTIME_PM
  8165. .runtime_suspend = dp_runtime_suspend,
  8166. .runtime_resume = dp_runtime_resume,
  8167. #endif /* FEATURE_RUNTIME_PM */
  8168. .pkt_log_init = dp_pkt_log_init,
  8169. .pkt_log_con_service = dp_pkt_log_con_service,
  8170. .get_num_rx_contexts = dp_get_num_rx_contexts,
  8171. };
  8172. static struct cdp_flowctl_ops dp_ops_flowctl = {
  8173. /* WIFI 3.0 DP implement as required. */
  8174. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  8175. .flow_pool_map_handler = dp_tx_flow_pool_map,
  8176. .flow_pool_unmap_handler = dp_tx_flow_pool_unmap,
  8177. .register_pause_cb = dp_txrx_register_pause_cb,
  8178. .dump_flow_pool_info = dp_tx_dump_flow_pool_info,
  8179. .tx_desc_thresh_reached = dp_tx_desc_thresh_reached,
  8180. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  8181. };
  8182. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  8183. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  8184. };
  8185. #ifdef IPA_OFFLOAD
  8186. static struct cdp_ipa_ops dp_ops_ipa = {
  8187. .ipa_get_resource = dp_ipa_get_resource,
  8188. .ipa_set_doorbell_paddr = dp_ipa_set_doorbell_paddr,
  8189. .ipa_op_response = dp_ipa_op_response,
  8190. .ipa_register_op_cb = dp_ipa_register_op_cb,
  8191. .ipa_get_stat = dp_ipa_get_stat,
  8192. .ipa_tx_data_frame = dp_tx_send_ipa_data_frame,
  8193. .ipa_enable_autonomy = dp_ipa_enable_autonomy,
  8194. .ipa_disable_autonomy = dp_ipa_disable_autonomy,
  8195. .ipa_setup = dp_ipa_setup,
  8196. .ipa_cleanup = dp_ipa_cleanup,
  8197. .ipa_setup_iface = dp_ipa_setup_iface,
  8198. .ipa_cleanup_iface = dp_ipa_cleanup_iface,
  8199. .ipa_enable_pipes = dp_ipa_enable_pipes,
  8200. .ipa_disable_pipes = dp_ipa_disable_pipes,
  8201. .ipa_set_perf_level = dp_ipa_set_perf_level
  8202. };
  8203. #endif
  8204. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  8205. {
  8206. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  8207. struct dp_soc *soc = pdev->soc;
  8208. int timeout = SUSPEND_DRAIN_WAIT;
  8209. int drain_wait_delay = 50; /* 50 ms */
  8210. /* Abort if there are any pending TX packets */
  8211. while (dp_get_tx_pending(opaque_pdev) > 0) {
  8212. qdf_sleep(drain_wait_delay);
  8213. if (timeout <= 0) {
  8214. dp_err("TX frames are pending, abort suspend");
  8215. return QDF_STATUS_E_TIMEOUT;
  8216. }
  8217. timeout = timeout - drain_wait_delay;
  8218. }
  8219. if (soc->intr_mode == DP_INTR_POLL)
  8220. qdf_timer_stop(&soc->int_timer);
  8221. return QDF_STATUS_SUCCESS;
  8222. }
  8223. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  8224. {
  8225. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  8226. struct dp_soc *soc = pdev->soc;
  8227. if (soc->intr_mode == DP_INTR_POLL)
  8228. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  8229. return QDF_STATUS_SUCCESS;
  8230. }
  8231. static struct cdp_bus_ops dp_ops_bus = {
  8232. .bus_suspend = dp_bus_suspend,
  8233. .bus_resume = dp_bus_resume
  8234. };
  8235. static struct cdp_ocb_ops dp_ops_ocb = {
  8236. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  8237. };
  8238. static struct cdp_throttle_ops dp_ops_throttle = {
  8239. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  8240. };
  8241. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  8242. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  8243. };
  8244. static struct cdp_cfg_ops dp_ops_cfg = {
  8245. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  8246. };
  8247. /*
  8248. * dp_peer_get_ref_find_by_addr - get peer with addr by ref count inc
  8249. * @dev: physical device instance
  8250. * @peer_mac_addr: peer mac address
  8251. * @local_id: local id for the peer
  8252. * @debug_id: to track enum peer access
  8253. *
  8254. * Return: peer instance pointer
  8255. */
  8256. static inline void *
  8257. dp_peer_get_ref_find_by_addr(struct cdp_pdev *dev, uint8_t *peer_mac_addr,
  8258. uint8_t *local_id,
  8259. enum peer_debug_id_type debug_id)
  8260. {
  8261. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  8262. struct dp_peer *peer;
  8263. peer = dp_peer_find_hash_find(pdev->soc, peer_mac_addr, 0, DP_VDEV_ALL);
  8264. if (!peer)
  8265. return NULL;
  8266. *local_id = peer->local_id;
  8267. DP_TRACE(INFO, "%s: peer %pK id %d", __func__, peer, *local_id);
  8268. return peer;
  8269. }
  8270. /*
  8271. * dp_peer_release_ref - release peer ref count
  8272. * @peer: peer handle
  8273. * @debug_id: to track enum peer access
  8274. *
  8275. * Return: None
  8276. */
  8277. static inline
  8278. void dp_peer_release_ref(void *peer, enum peer_debug_id_type debug_id)
  8279. {
  8280. dp_peer_unref_delete(peer);
  8281. }
  8282. static struct cdp_peer_ops dp_ops_peer = {
  8283. .register_peer = dp_register_peer,
  8284. .clear_peer = dp_clear_peer,
  8285. .find_peer_by_addr = dp_find_peer_by_addr,
  8286. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  8287. .peer_get_ref_by_addr = dp_peer_get_ref_find_by_addr,
  8288. .peer_release_ref = dp_peer_release_ref,
  8289. .local_peer_id = dp_local_peer_id,
  8290. .peer_find_by_local_id = dp_peer_find_by_local_id,
  8291. .peer_state_update = dp_peer_state_update,
  8292. .get_vdevid = dp_get_vdevid,
  8293. .get_vdev_by_sta_id = dp_get_vdev_by_sta_id,
  8294. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  8295. .get_vdev_for_peer = dp_get_vdev_for_peer,
  8296. .get_peer_state = dp_get_peer_state,
  8297. };
  8298. #endif
  8299. static struct cdp_ops dp_txrx_ops = {
  8300. .cmn_drv_ops = &dp_ops_cmn,
  8301. .ctrl_ops = &dp_ops_ctrl,
  8302. .me_ops = &dp_ops_me,
  8303. .mon_ops = &dp_ops_mon,
  8304. .host_stats_ops = &dp_ops_host_stats,
  8305. .wds_ops = &dp_ops_wds,
  8306. .raw_ops = &dp_ops_raw,
  8307. #ifdef CONFIG_WIN
  8308. .pflow_ops = &dp_ops_pflow,
  8309. #endif /* CONFIG_WIN */
  8310. #ifndef CONFIG_WIN
  8311. .misc_ops = &dp_ops_misc,
  8312. .cfg_ops = &dp_ops_cfg,
  8313. .flowctl_ops = &dp_ops_flowctl,
  8314. .l_flowctl_ops = &dp_ops_l_flowctl,
  8315. #ifdef IPA_OFFLOAD
  8316. .ipa_ops = &dp_ops_ipa,
  8317. #endif
  8318. .bus_ops = &dp_ops_bus,
  8319. .ocb_ops = &dp_ops_ocb,
  8320. .peer_ops = &dp_ops_peer,
  8321. .throttle_ops = &dp_ops_throttle,
  8322. .mob_stats_ops = &dp_ops_mob_stats,
  8323. #endif
  8324. };
  8325. /*
  8326. * dp_soc_set_txrx_ring_map()
  8327. * @dp_soc: DP handler for soc
  8328. *
  8329. * Return: Void
  8330. */
  8331. static void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  8332. {
  8333. uint32_t i;
  8334. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  8335. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_DEFAULT_MAP][i];
  8336. }
  8337. }
  8338. #ifdef QCA_WIFI_QCA8074
  8339. #ifndef QCA_MEM_ATTACH_ON_WIFI3
  8340. /**
  8341. * dp_soc_attach_wifi3() - Attach txrx SOC
  8342. * @ctrl_psoc: Opaque SOC handle from control plane
  8343. * @htc_handle: Opaque HTC handle
  8344. * @hif_handle: Opaque HIF handle
  8345. * @qdf_osdev: QDF device
  8346. * @ol_ops: Offload Operations
  8347. * @device_id: Device ID
  8348. *
  8349. * Return: DP SOC handle on success, NULL on failure
  8350. */
  8351. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  8352. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  8353. struct ol_if_ops *ol_ops, uint16_t device_id)
  8354. {
  8355. struct dp_soc *dp_soc = NULL;
  8356. dp_soc = dp_soc_attach(ctrl_psoc, htc_handle, qdf_osdev,
  8357. ol_ops, device_id);
  8358. if (!dp_soc)
  8359. return NULL;
  8360. if (!dp_soc_init(dp_soc, htc_handle, hif_handle))
  8361. return NULL;
  8362. return (void *)dp_soc;
  8363. }
  8364. #else
  8365. /**
  8366. * dp_soc_attach_wifi3() - Attach txrx SOC
  8367. * @ctrl_psoc: Opaque SOC handle from control plane
  8368. * @htc_handle: Opaque HTC handle
  8369. * @hif_handle: Opaque HIF handle
  8370. * @qdf_osdev: QDF device
  8371. * @ol_ops: Offload Operations
  8372. * @device_id: Device ID
  8373. *
  8374. * Return: DP SOC handle on success, NULL on failure
  8375. */
  8376. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  8377. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  8378. struct ol_if_ops *ol_ops, uint16_t device_id)
  8379. {
  8380. struct dp_soc *dp_soc = NULL;
  8381. dp_soc = dp_soc_attach(ctrl_psoc, htc_handle, qdf_osdev,
  8382. ol_ops, device_id);
  8383. return (void *)dp_soc;
  8384. }
  8385. #endif
  8386. /**
  8387. * dp_soc_attach() - Attach txrx SOC
  8388. * @ctrl_psoc: Opaque SOC handle from control plane
  8389. * @htc_handle: Opaque HTC handle
  8390. * @qdf_osdev: QDF device
  8391. * @ol_ops: Offload Operations
  8392. * @device_id: Device ID
  8393. *
  8394. * Return: DP SOC handle on success, NULL on failure
  8395. */
  8396. static struct dp_soc *
  8397. dp_soc_attach(void *ctrl_psoc, HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  8398. struct ol_if_ops *ol_ops, uint16_t device_id)
  8399. {
  8400. int int_ctx;
  8401. struct dp_soc *soc = NULL;
  8402. struct htt_soc *htt_soc = NULL;
  8403. soc = qdf_mem_malloc(sizeof(*soc));
  8404. if (!soc) {
  8405. dp_err("DP SOC memory allocation failed");
  8406. goto fail0;
  8407. }
  8408. int_ctx = 0;
  8409. soc->device_id = device_id;
  8410. soc->cdp_soc.ops = &dp_txrx_ops;
  8411. soc->cdp_soc.ol_ops = ol_ops;
  8412. soc->ctrl_psoc = ctrl_psoc;
  8413. soc->osdev = qdf_osdev;
  8414. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_MAPS;
  8415. soc->wlan_cfg_ctx = wlan_cfg_soc_attach(soc->ctrl_psoc);
  8416. if (!soc->wlan_cfg_ctx) {
  8417. dp_err("wlan_cfg_ctx failed\n");
  8418. goto fail1;
  8419. }
  8420. htt_soc = qdf_mem_malloc(sizeof(*htt_soc));
  8421. if (!htt_soc) {
  8422. dp_err("HTT attach failed");
  8423. goto fail1;
  8424. }
  8425. soc->htt_handle = htt_soc;
  8426. htt_soc->dp_soc = soc;
  8427. htt_soc->htc_soc = htc_handle;
  8428. if (htt_soc_htc_prealloc(htt_soc) != QDF_STATUS_SUCCESS)
  8429. goto fail2;
  8430. return (void *)soc;
  8431. fail2:
  8432. qdf_mem_free(htt_soc);
  8433. fail1:
  8434. qdf_mem_free(soc);
  8435. fail0:
  8436. return NULL;
  8437. }
  8438. /**
  8439. * dp_soc_init() - Initialize txrx SOC
  8440. * @dp_soc: Opaque DP SOC handle
  8441. * @htc_handle: Opaque HTC handle
  8442. * @hif_handle: Opaque HIF handle
  8443. *
  8444. * Return: DP SOC handle on success, NULL on failure
  8445. */
  8446. void *dp_soc_init(void *dpsoc, HTC_HANDLE htc_handle, void *hif_handle)
  8447. {
  8448. int target_type;
  8449. struct dp_soc *soc = (struct dp_soc *)dpsoc;
  8450. struct htt_soc *htt_soc = (struct htt_soc *)soc->htt_handle;
  8451. htt_soc->htc_soc = htc_handle;
  8452. soc->hif_handle = hif_handle;
  8453. soc->hal_soc = hif_get_hal_handle(soc->hif_handle);
  8454. if (!soc->hal_soc)
  8455. return NULL;
  8456. htt_soc_initialize(soc->htt_handle, soc->ctrl_psoc, htt_soc->htc_soc,
  8457. soc->hal_soc, soc->osdev);
  8458. target_type = hal_get_target_type(soc->hal_soc);
  8459. switch (target_type) {
  8460. case TARGET_TYPE_QCA6290:
  8461. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  8462. REO_DST_RING_SIZE_QCA6290);
  8463. soc->ast_override_support = 1;
  8464. break;
  8465. #ifdef QCA_WIFI_QCA6390
  8466. case TARGET_TYPE_QCA6390:
  8467. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  8468. REO_DST_RING_SIZE_QCA6290);
  8469. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, true);
  8470. soc->ast_override_support = 1;
  8471. if (con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  8472. int int_ctx;
  8473. for (int_ctx = 0; int_ctx < WLAN_CFG_INT_NUM_CONTEXTS; int_ctx++) {
  8474. soc->wlan_cfg_ctx->int_rx_ring_mask[int_ctx] = 0;
  8475. soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[int_ctx] = 0;
  8476. }
  8477. }
  8478. soc->wlan_cfg_ctx->rxdma1_enable = 0;
  8479. break;
  8480. #endif
  8481. case TARGET_TYPE_QCA8074:
  8482. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  8483. REO_DST_RING_SIZE_QCA8074);
  8484. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, true);
  8485. break;
  8486. case TARGET_TYPE_QCA8074V2:
  8487. case TARGET_TYPE_QCA6018:
  8488. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  8489. REO_DST_RING_SIZE_QCA8074);
  8490. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false);
  8491. soc->hw_nac_monitor_support = 1;
  8492. soc->ast_override_support = 1;
  8493. soc->per_tid_basize_max_tid = 8;
  8494. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_V2_MAPS;
  8495. break;
  8496. default:
  8497. qdf_print("%s: Unknown tgt type %d\n", __func__, target_type);
  8498. qdf_assert_always(0);
  8499. break;
  8500. }
  8501. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx,
  8502. cfg_get(soc->ctrl_psoc, CFG_DP_RX_HASH));
  8503. soc->cce_disable = false;
  8504. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  8505. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  8506. CDP_CFG_MAX_PEER_ID);
  8507. if (ret != -EINVAL) {
  8508. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  8509. }
  8510. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  8511. CDP_CFG_CCE_DISABLE);
  8512. if (ret == 1)
  8513. soc->cce_disable = true;
  8514. }
  8515. qdf_spinlock_create(&soc->peer_ref_mutex);
  8516. qdf_spinlock_create(&soc->ast_lock);
  8517. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  8518. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  8519. /* fill the tx/rx cpu ring map*/
  8520. dp_soc_set_txrx_ring_map(soc);
  8521. qdf_spinlock_create(&soc->htt_stats.lock);
  8522. /* initialize work queue for stats processing */
  8523. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  8524. return soc;
  8525. }
  8526. /**
  8527. * dp_soc_init_wifi3() - Initialize txrx SOC
  8528. * @dp_soc: Opaque DP SOC handle
  8529. * @ctrl_psoc: Opaque SOC handle from control plane(Unused)
  8530. * @hif_handle: Opaque HIF handle
  8531. * @htc_handle: Opaque HTC handle
  8532. * @qdf_osdev: QDF device (Unused)
  8533. * @ol_ops: Offload Operations (Unused)
  8534. * @device_id: Device ID (Unused)
  8535. *
  8536. * Return: DP SOC handle on success, NULL on failure
  8537. */
  8538. void *dp_soc_init_wifi3(void *dpsoc, void *ctrl_psoc, void *hif_handle,
  8539. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  8540. struct ol_if_ops *ol_ops, uint16_t device_id)
  8541. {
  8542. return dp_soc_init(dpsoc, htc_handle, hif_handle);
  8543. }
  8544. #endif
  8545. /*
  8546. * dp_get_pdev_for_mac_id() - Return pdev for mac_id
  8547. *
  8548. * @soc: handle to DP soc
  8549. * @mac_id: MAC id
  8550. *
  8551. * Return: Return pdev corresponding to MAC
  8552. */
  8553. void *dp_get_pdev_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  8554. {
  8555. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  8556. return soc->pdev_list[mac_id];
  8557. /* Typically for MCL as there only 1 PDEV*/
  8558. return soc->pdev_list[0];
  8559. }
  8560. /*
  8561. * dp_is_hw_dbs_enable() - Procedure to check if DBS is supported
  8562. * @soc: DP SoC context
  8563. * @max_mac_rings: No of MAC rings
  8564. *
  8565. * Return: None
  8566. */
  8567. static
  8568. void dp_is_hw_dbs_enable(struct dp_soc *soc,
  8569. int *max_mac_rings)
  8570. {
  8571. bool dbs_enable = false;
  8572. if (soc->cdp_soc.ol_ops->is_hw_dbs_2x2_capable)
  8573. dbs_enable = soc->cdp_soc.ol_ops->
  8574. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  8575. *max_mac_rings = (dbs_enable)?(*max_mac_rings):1;
  8576. }
  8577. /*
  8578. * dp_set_pktlog_wifi3() - attach txrx vdev
  8579. * @pdev: Datapath PDEV handle
  8580. * @event: which event's notifications are being subscribed to
  8581. * @enable: WDI event subscribe or not. (True or False)
  8582. *
  8583. * Return: Success, NULL on failure
  8584. */
  8585. #ifdef WDI_EVENT_ENABLE
  8586. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  8587. bool enable)
  8588. {
  8589. struct dp_soc *soc = NULL;
  8590. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  8591. int max_mac_rings = wlan_cfg_get_num_mac_rings
  8592. (pdev->wlan_cfg_ctx);
  8593. uint8_t mac_id = 0;
  8594. soc = pdev->soc;
  8595. dp_is_hw_dbs_enable(soc, &max_mac_rings);
  8596. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  8597. FL("Max_mac_rings %d "),
  8598. max_mac_rings);
  8599. if (enable) {
  8600. switch (event) {
  8601. case WDI_EVENT_RX_DESC:
  8602. if (pdev->monitor_vdev) {
  8603. /* Nothing needs to be done if monitor mode is
  8604. * enabled
  8605. */
  8606. return 0;
  8607. }
  8608. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  8609. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  8610. htt_tlv_filter.mpdu_start = 1;
  8611. htt_tlv_filter.msdu_start = 1;
  8612. htt_tlv_filter.msdu_end = 1;
  8613. htt_tlv_filter.mpdu_end = 1;
  8614. htt_tlv_filter.packet_header = 1;
  8615. htt_tlv_filter.attention = 1;
  8616. htt_tlv_filter.ppdu_start = 1;
  8617. htt_tlv_filter.ppdu_end = 1;
  8618. htt_tlv_filter.ppdu_end_user_stats = 1;
  8619. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  8620. htt_tlv_filter.ppdu_end_status_done = 1;
  8621. htt_tlv_filter.enable_fp = 1;
  8622. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  8623. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  8624. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  8625. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  8626. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  8627. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  8628. for (mac_id = 0; mac_id < max_mac_rings;
  8629. mac_id++) {
  8630. int mac_for_pdev =
  8631. dp_get_mac_id_for_pdev(mac_id,
  8632. pdev->pdev_id);
  8633. htt_h2t_rx_ring_cfg(soc->htt_handle,
  8634. mac_for_pdev,
  8635. pdev->rxdma_mon_status_ring[mac_id]
  8636. .hal_srng,
  8637. RXDMA_MONITOR_STATUS,
  8638. RX_BUFFER_SIZE,
  8639. &htt_tlv_filter);
  8640. }
  8641. if (soc->reap_timer_init)
  8642. qdf_timer_mod(&soc->mon_reap_timer,
  8643. DP_INTR_POLL_TIMER_MS);
  8644. }
  8645. break;
  8646. case WDI_EVENT_LITE_RX:
  8647. if (pdev->monitor_vdev) {
  8648. /* Nothing needs to be done if monitor mode is
  8649. * enabled
  8650. */
  8651. return 0;
  8652. }
  8653. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  8654. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  8655. htt_tlv_filter.ppdu_start = 1;
  8656. htt_tlv_filter.ppdu_end = 1;
  8657. htt_tlv_filter.ppdu_end_user_stats = 1;
  8658. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  8659. htt_tlv_filter.ppdu_end_status_done = 1;
  8660. htt_tlv_filter.mpdu_start = 1;
  8661. htt_tlv_filter.enable_fp = 1;
  8662. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  8663. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  8664. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  8665. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  8666. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  8667. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  8668. for (mac_id = 0; mac_id < max_mac_rings;
  8669. mac_id++) {
  8670. int mac_for_pdev =
  8671. dp_get_mac_id_for_pdev(mac_id,
  8672. pdev->pdev_id);
  8673. htt_h2t_rx_ring_cfg(soc->htt_handle,
  8674. mac_for_pdev,
  8675. pdev->rxdma_mon_status_ring[mac_id]
  8676. .hal_srng,
  8677. RXDMA_MONITOR_STATUS,
  8678. RX_BUFFER_SIZE_PKTLOG_LITE,
  8679. &htt_tlv_filter);
  8680. }
  8681. if (soc->reap_timer_init)
  8682. qdf_timer_mod(&soc->mon_reap_timer,
  8683. DP_INTR_POLL_TIMER_MS);
  8684. }
  8685. break;
  8686. case WDI_EVENT_LITE_T2H:
  8687. if (pdev->monitor_vdev) {
  8688. /* Nothing needs to be done if monitor mode is
  8689. * enabled
  8690. */
  8691. return 0;
  8692. }
  8693. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  8694. int mac_for_pdev = dp_get_mac_id_for_pdev(
  8695. mac_id, pdev->pdev_id);
  8696. pdev->pktlog_ppdu_stats = true;
  8697. dp_h2t_cfg_stats_msg_send(pdev,
  8698. DP_PPDU_TXLITE_STATS_BITMASK_CFG,
  8699. mac_for_pdev);
  8700. }
  8701. break;
  8702. default:
  8703. /* Nothing needs to be done for other pktlog types */
  8704. break;
  8705. }
  8706. } else {
  8707. switch (event) {
  8708. case WDI_EVENT_RX_DESC:
  8709. case WDI_EVENT_LITE_RX:
  8710. if (pdev->monitor_vdev) {
  8711. /* Nothing needs to be done if monitor mode is
  8712. * enabled
  8713. */
  8714. return 0;
  8715. }
  8716. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  8717. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  8718. for (mac_id = 0; mac_id < max_mac_rings;
  8719. mac_id++) {
  8720. int mac_for_pdev =
  8721. dp_get_mac_id_for_pdev(mac_id,
  8722. pdev->pdev_id);
  8723. htt_h2t_rx_ring_cfg(soc->htt_handle,
  8724. mac_for_pdev,
  8725. pdev->rxdma_mon_status_ring[mac_id]
  8726. .hal_srng,
  8727. RXDMA_MONITOR_STATUS,
  8728. RX_BUFFER_SIZE,
  8729. &htt_tlv_filter);
  8730. }
  8731. if (soc->reap_timer_init)
  8732. qdf_timer_stop(&soc->mon_reap_timer);
  8733. }
  8734. break;
  8735. case WDI_EVENT_LITE_T2H:
  8736. if (pdev->monitor_vdev) {
  8737. /* Nothing needs to be done if monitor mode is
  8738. * enabled
  8739. */
  8740. return 0;
  8741. }
  8742. /* To disable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  8743. * passing value 0. Once these macros will define in htt
  8744. * header file will use proper macros
  8745. */
  8746. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  8747. int mac_for_pdev =
  8748. dp_get_mac_id_for_pdev(mac_id,
  8749. pdev->pdev_id);
  8750. pdev->pktlog_ppdu_stats = false;
  8751. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  8752. dp_h2t_cfg_stats_msg_send(pdev, 0,
  8753. mac_for_pdev);
  8754. } else if (pdev->tx_sniffer_enable || pdev->mcopy_mode) {
  8755. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_SNIFFER,
  8756. mac_for_pdev);
  8757. } else if (pdev->enhanced_stats_en) {
  8758. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS,
  8759. mac_for_pdev);
  8760. }
  8761. }
  8762. break;
  8763. default:
  8764. /* Nothing needs to be done for other pktlog types */
  8765. break;
  8766. }
  8767. }
  8768. return 0;
  8769. }
  8770. #endif