kona.c 158 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/delay.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/slab.h>
  11. #include <linux/io.h>
  12. #include <linux/module.h>
  13. #include <linux/input.h>
  14. #include <linux/of_device.h>
  15. #include <sound/core.h>
  16. #include <sound/soc.h>
  17. #include <sound/soc-dapm.h>
  18. #include <sound/pcm.h>
  19. #include <sound/pcm_params.h>
  20. #include <sound/info.h>
  21. #include <soc/snd_event.h>
  22. #include <dsp/audio_notifier.h>
  23. #include <soc/swr-common.h>
  24. #include <dsp/q6afe-v2.h>
  25. #include <dsp/q6core.h>
  26. #include "device_event.h"
  27. #include "msm-pcm-routing-v2.h"
  28. #include "asoc/msm-cdc-pinctrl.h"
  29. #include "asoc/wcd-mbhc-v2.h"
  30. #include "codecs/wsa881x.h"
  31. #include "codecs/bolero/bolero-cdc.h"
  32. #include <dt-bindings/sound/audio-codec-port-types.h>
  33. #include "codecs/bolero/wsa-macro.h"
  34. #include "sm8250-port-config.h"
  35. #define DRV_NAME "kona-asoc-snd"
  36. #define __CHIPSET__ "KONA "
  37. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  38. #define SAMPLING_RATE_8KHZ 8000
  39. #define SAMPLING_RATE_11P025KHZ 11025
  40. #define SAMPLING_RATE_16KHZ 16000
  41. #define SAMPLING_RATE_22P05KHZ 22050
  42. #define SAMPLING_RATE_32KHZ 32000
  43. #define SAMPLING_RATE_44P1KHZ 44100
  44. #define SAMPLING_RATE_48KHZ 48000
  45. #define SAMPLING_RATE_88P2KHZ 88200
  46. #define SAMPLING_RATE_96KHZ 96000
  47. #define SAMPLING_RATE_176P4KHZ 176400
  48. #define SAMPLING_RATE_192KHZ 192000
  49. #define SAMPLING_RATE_352P8KHZ 352800
  50. #define SAMPLING_RATE_384KHZ 384000
  51. #define TDM_CHANNEL_MAX 8
  52. #define DEV_NAME_STR_LEN 32
  53. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  54. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  55. #define WSA8810_NAME_1 "wsa881x.20170211"
  56. #define WSA8810_NAME_2 "wsa881x.20170212"
  57. enum {
  58. TDM_0 = 0,
  59. TDM_1,
  60. TDM_2,
  61. TDM_3,
  62. TDM_4,
  63. TDM_5,
  64. TDM_6,
  65. TDM_7,
  66. TDM_PORT_MAX,
  67. };
  68. enum {
  69. TDM_PRI = 0,
  70. TDM_SEC,
  71. TDM_TERT,
  72. TDM_INTERFACE_MAX,
  73. };
  74. enum {
  75. PRIM_AUX_PCM = 0,
  76. SEC_AUX_PCM,
  77. TERT_AUX_PCM,
  78. AUX_PCM_MAX,
  79. };
  80. enum {
  81. PRIM_MI2S = 0,
  82. SEC_MI2S,
  83. TERT_MI2S,
  84. MI2S_MAX,
  85. };
  86. enum {
  87. WSA_CDC_DMA_RX_0 = 0,
  88. WSA_CDC_DMA_RX_1,
  89. RX_CDC_DMA_RX_0,
  90. RX_CDC_DMA_RX_1,
  91. RX_CDC_DMA_RX_2,
  92. RX_CDC_DMA_RX_3,
  93. RX_CDC_DMA_RX_5,
  94. CDC_DMA_RX_MAX,
  95. };
  96. enum {
  97. WSA_CDC_DMA_TX_0 = 0,
  98. WSA_CDC_DMA_TX_1,
  99. WSA_CDC_DMA_TX_2,
  100. TX_CDC_DMA_TX_0,
  101. TX_CDC_DMA_TX_3,
  102. TX_CDC_DMA_TX_4,
  103. VA_CDC_DMA_TX_0,
  104. VA_CDC_DMA_TX_1,
  105. VA_CDC_DMA_TX_2,
  106. CDC_DMA_TX_MAX,
  107. };
  108. struct msm_asoc_mach_data {
  109. struct snd_info_entry *codec_root;
  110. int usbc_en2_gpio; /* used by gpio driver API */
  111. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  112. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  113. struct device_node *dmic45_gpio_p; /* used by pinctrl API */
  114. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  115. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  116. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  117. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  118. bool is_afe_config_done;
  119. };
  120. struct tdm_port {
  121. u32 mode;
  122. u32 channel;
  123. };
  124. struct msm_wsa881x_dev_info {
  125. struct device_node *of_node;
  126. u32 index;
  127. };
  128. struct aux_codec_dev_info {
  129. struct device_node *of_node;
  130. u32 index;
  131. };
  132. struct dev_config {
  133. u32 sample_rate;
  134. u32 bit_format;
  135. u32 channels;
  136. };
  137. static struct dev_config usb_rx_cfg = {
  138. .sample_rate = SAMPLING_RATE_48KHZ,
  139. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  140. .channels = 2,
  141. };
  142. static struct dev_config usb_tx_cfg = {
  143. .sample_rate = SAMPLING_RATE_48KHZ,
  144. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  145. .channels = 1,
  146. };
  147. static struct dev_config proxy_rx_cfg = {
  148. .sample_rate = SAMPLING_RATE_48KHZ,
  149. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  150. .channels = 2,
  151. };
  152. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  153. {
  154. AFE_API_VERSION_I2S_CONFIG,
  155. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  156. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  157. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  158. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  159. 0,
  160. },
  161. {
  162. AFE_API_VERSION_I2S_CONFIG,
  163. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  164. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  165. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  166. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  167. 0,
  168. },
  169. {
  170. AFE_API_VERSION_I2S_CONFIG,
  171. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  172. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  173. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  174. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  175. 0,
  176. },
  177. };
  178. struct mi2s_conf {
  179. struct mutex lock;
  180. u32 ref_cnt;
  181. u32 msm_is_mi2s_master;
  182. };
  183. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  184. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  185. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  186. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  187. };
  188. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  189. /* Default configuration of TDM channels */
  190. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  191. { /* PRI TDM */
  192. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  193. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  194. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  195. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  196. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  197. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  198. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  199. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  200. },
  201. { /* SEC TDM */
  202. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  203. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  204. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  205. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  206. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  207. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  208. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  209. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  210. },
  211. { /* TERT TDM */
  212. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  213. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  214. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  215. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  216. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  217. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  218. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  219. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  220. },
  221. };
  222. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  223. { /* PRI TDM */
  224. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  225. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  226. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  227. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  230. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  231. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  232. },
  233. { /* SEC TDM */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  236. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  242. },
  243. { /* TERT TDM */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  252. },
  253. };
  254. /* Default configuration of AUX PCM channels */
  255. static struct dev_config aux_pcm_rx_cfg[] = {
  256. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  257. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  258. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  259. };
  260. static struct dev_config aux_pcm_tx_cfg[] = {
  261. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  262. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  263. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  264. };
  265. /* Default configuration of MI2S channels */
  266. static struct dev_config mi2s_rx_cfg[] = {
  267. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  268. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  269. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  270. };
  271. static struct dev_config mi2s_tx_cfg[] = {
  272. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  273. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  274. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  275. };
  276. /* Default configuration of Codec DMA Interface RX */
  277. static struct dev_config cdc_dma_rx_cfg[] = {
  278. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  279. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  280. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  281. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  282. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  283. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  284. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  285. };
  286. /* Default configuration of Codec DMA Interface TX */
  287. static struct dev_config cdc_dma_tx_cfg[] = {
  288. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  289. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  290. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  291. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  292. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  293. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  294. [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  295. [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  296. [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  297. };
  298. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  299. "S32_LE"};
  300. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  301. "Six", "Seven", "Eight"};
  302. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  303. "KHZ_16", "KHZ_22P05",
  304. "KHZ_32", "KHZ_44P1", "KHZ_48",
  305. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  306. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  307. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  308. "Five", "Six", "Seven",
  309. "Eight"};
  310. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  311. "KHZ_48", "KHZ_176P4",
  312. "KHZ_352P8"};
  313. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  314. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  315. "Five", "Six", "Seven", "Eight"};
  316. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  317. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  318. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  319. "KHZ_48", "KHZ_96", "KHZ_192"};
  320. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  321. "Five", "Six", "Seven",
  322. "Eight"};
  323. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  324. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  325. "Five", "Six", "Seven",
  326. "Eight"};
  327. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  328. "KHZ_16", "KHZ_22P05",
  329. "KHZ_32", "KHZ_44P1", "KHZ_48",
  330. "KHZ_88P2", "KHZ_96",
  331. "KHZ_176P4", "KHZ_192",
  332. "KHZ_352P8", "KHZ_384"};
  333. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  334. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  335. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  336. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  337. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  338. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  339. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  340. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  341. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  342. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  343. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  344. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  345. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  346. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  347. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  348. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  349. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  350. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  351. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  352. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  353. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  354. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  355. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  356. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  357. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  358. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  359. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  360. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  361. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  362. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  363. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  364. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  365. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  366. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  367. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  368. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  369. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  370. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  371. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  372. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  373. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  374. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  375. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  376. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  377. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  378. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  379. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  380. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  381. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  382. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  383. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  384. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  385. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  386. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  387. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  388. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  389. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  390. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  391. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  392. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  393. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  394. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  395. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  396. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
  397. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
  398. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
  399. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  400. cdc_dma_sample_rate_text);
  401. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  402. cdc_dma_sample_rate_text);
  403. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  404. cdc_dma_sample_rate_text);
  405. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  406. cdc_dma_sample_rate_text);
  407. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  408. cdc_dma_sample_rate_text);
  409. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  410. cdc_dma_sample_rate_text);
  411. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  412. cdc_dma_sample_rate_text);
  413. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  414. cdc_dma_sample_rate_text);
  415. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  416. cdc_dma_sample_rate_text);
  417. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  418. cdc_dma_sample_rate_text);
  419. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  420. cdc_dma_sample_rate_text);
  421. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  422. cdc_dma_sample_rate_text);
  423. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  424. cdc_dma_sample_rate_text);
  425. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
  426. cdc_dma_sample_rate_text);
  427. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
  428. cdc_dma_sample_rate_text);
  429. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
  430. cdc_dma_sample_rate_text);
  431. static bool is_initial_boot;
  432. static bool codec_reg_done;
  433. static struct snd_soc_aux_dev *msm_aux_dev;
  434. static struct snd_soc_codec_conf *msm_codec_conf;
  435. static struct snd_soc_card snd_soc_card_kona_msm;
  436. static int dmic_0_1_gpio_cnt;
  437. static int dmic_2_3_gpio_cnt;
  438. static int dmic_4_5_gpio_cnt;
  439. static int msm_vi_feed_tx_ch = 2;
  440. /*
  441. * Need to report LINEIN
  442. * if R/L channel impedance is larger than 5K ohm
  443. */
  444. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  445. .read_fw_bin = false,
  446. .calibration = NULL,
  447. .detect_extn_cable = true,
  448. .mono_stero_detection = false,
  449. .swap_gnd_mic = NULL,
  450. .hs_ext_micbias = true,
  451. .key_code[0] = KEY_MEDIA,
  452. .key_code[1] = KEY_VOICECOMMAND,
  453. .key_code[2] = KEY_VOLUMEUP,
  454. .key_code[3] = KEY_VOLUMEDOWN,
  455. .key_code[4] = 0,
  456. .key_code[5] = 0,
  457. .key_code[6] = 0,
  458. .key_code[7] = 0,
  459. .linein_th = 5000,
  460. .moisture_en = true,
  461. .mbhc_micbias = MIC_BIAS_2,
  462. .anc_micbias = MIC_BIAS_2,
  463. .enable_anc_mic_detect = false,
  464. };
  465. static inline int param_is_mask(int p)
  466. {
  467. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  468. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  469. }
  470. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  471. int n)
  472. {
  473. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  474. }
  475. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  476. unsigned int bit)
  477. {
  478. if (bit >= SNDRV_MASK_MAX)
  479. return;
  480. if (param_is_mask(n)) {
  481. struct snd_mask *m = param_to_mask(p, n);
  482. m->bits[0] = 0;
  483. m->bits[1] = 0;
  484. m->bits[bit >> 5] |= (1 << (bit & 31));
  485. }
  486. }
  487. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  488. struct snd_ctl_elem_value *ucontrol)
  489. {
  490. int sample_rate_val = 0;
  491. switch (usb_rx_cfg.sample_rate) {
  492. case SAMPLING_RATE_384KHZ:
  493. sample_rate_val = 12;
  494. break;
  495. case SAMPLING_RATE_352P8KHZ:
  496. sample_rate_val = 11;
  497. break;
  498. case SAMPLING_RATE_192KHZ:
  499. sample_rate_val = 10;
  500. break;
  501. case SAMPLING_RATE_176P4KHZ:
  502. sample_rate_val = 9;
  503. break;
  504. case SAMPLING_RATE_96KHZ:
  505. sample_rate_val = 8;
  506. break;
  507. case SAMPLING_RATE_88P2KHZ:
  508. sample_rate_val = 7;
  509. break;
  510. case SAMPLING_RATE_48KHZ:
  511. sample_rate_val = 6;
  512. break;
  513. case SAMPLING_RATE_44P1KHZ:
  514. sample_rate_val = 5;
  515. break;
  516. case SAMPLING_RATE_32KHZ:
  517. sample_rate_val = 4;
  518. break;
  519. case SAMPLING_RATE_22P05KHZ:
  520. sample_rate_val = 3;
  521. break;
  522. case SAMPLING_RATE_16KHZ:
  523. sample_rate_val = 2;
  524. break;
  525. case SAMPLING_RATE_11P025KHZ:
  526. sample_rate_val = 1;
  527. break;
  528. case SAMPLING_RATE_8KHZ:
  529. default:
  530. sample_rate_val = 0;
  531. break;
  532. }
  533. ucontrol->value.integer.value[0] = sample_rate_val;
  534. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  535. usb_rx_cfg.sample_rate);
  536. return 0;
  537. }
  538. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  539. struct snd_ctl_elem_value *ucontrol)
  540. {
  541. switch (ucontrol->value.integer.value[0]) {
  542. case 12:
  543. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  544. break;
  545. case 11:
  546. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  547. break;
  548. case 10:
  549. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  550. break;
  551. case 9:
  552. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  553. break;
  554. case 8:
  555. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  556. break;
  557. case 7:
  558. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  559. break;
  560. case 6:
  561. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  562. break;
  563. case 5:
  564. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  565. break;
  566. case 4:
  567. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  568. break;
  569. case 3:
  570. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  571. break;
  572. case 2:
  573. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  574. break;
  575. case 1:
  576. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  577. break;
  578. case 0:
  579. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  580. break;
  581. default:
  582. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  583. break;
  584. }
  585. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  586. __func__, ucontrol->value.integer.value[0],
  587. usb_rx_cfg.sample_rate);
  588. return 0;
  589. }
  590. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  591. struct snd_ctl_elem_value *ucontrol)
  592. {
  593. int sample_rate_val = 0;
  594. switch (usb_tx_cfg.sample_rate) {
  595. case SAMPLING_RATE_384KHZ:
  596. sample_rate_val = 12;
  597. break;
  598. case SAMPLING_RATE_352P8KHZ:
  599. sample_rate_val = 11;
  600. break;
  601. case SAMPLING_RATE_192KHZ:
  602. sample_rate_val = 10;
  603. break;
  604. case SAMPLING_RATE_176P4KHZ:
  605. sample_rate_val = 9;
  606. break;
  607. case SAMPLING_RATE_96KHZ:
  608. sample_rate_val = 8;
  609. break;
  610. case SAMPLING_RATE_88P2KHZ:
  611. sample_rate_val = 7;
  612. break;
  613. case SAMPLING_RATE_48KHZ:
  614. sample_rate_val = 6;
  615. break;
  616. case SAMPLING_RATE_44P1KHZ:
  617. sample_rate_val = 5;
  618. break;
  619. case SAMPLING_RATE_32KHZ:
  620. sample_rate_val = 4;
  621. break;
  622. case SAMPLING_RATE_22P05KHZ:
  623. sample_rate_val = 3;
  624. break;
  625. case SAMPLING_RATE_16KHZ:
  626. sample_rate_val = 2;
  627. break;
  628. case SAMPLING_RATE_11P025KHZ:
  629. sample_rate_val = 1;
  630. break;
  631. case SAMPLING_RATE_8KHZ:
  632. sample_rate_val = 0;
  633. break;
  634. default:
  635. sample_rate_val = 6;
  636. break;
  637. }
  638. ucontrol->value.integer.value[0] = sample_rate_val;
  639. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  640. usb_tx_cfg.sample_rate);
  641. return 0;
  642. }
  643. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  644. struct snd_ctl_elem_value *ucontrol)
  645. {
  646. switch (ucontrol->value.integer.value[0]) {
  647. case 12:
  648. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  649. break;
  650. case 11:
  651. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  652. break;
  653. case 10:
  654. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  655. break;
  656. case 9:
  657. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  658. break;
  659. case 8:
  660. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  661. break;
  662. case 7:
  663. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  664. break;
  665. case 6:
  666. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  667. break;
  668. case 5:
  669. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  670. break;
  671. case 4:
  672. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  673. break;
  674. case 3:
  675. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  676. break;
  677. case 2:
  678. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  679. break;
  680. case 1:
  681. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  682. break;
  683. case 0:
  684. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  685. break;
  686. default:
  687. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  688. break;
  689. }
  690. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  691. __func__, ucontrol->value.integer.value[0],
  692. usb_tx_cfg.sample_rate);
  693. return 0;
  694. }
  695. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  696. struct snd_ctl_elem_value *ucontrol)
  697. {
  698. switch (usb_rx_cfg.bit_format) {
  699. case SNDRV_PCM_FORMAT_S32_LE:
  700. ucontrol->value.integer.value[0] = 3;
  701. break;
  702. case SNDRV_PCM_FORMAT_S24_3LE:
  703. ucontrol->value.integer.value[0] = 2;
  704. break;
  705. case SNDRV_PCM_FORMAT_S24_LE:
  706. ucontrol->value.integer.value[0] = 1;
  707. break;
  708. case SNDRV_PCM_FORMAT_S16_LE:
  709. default:
  710. ucontrol->value.integer.value[0] = 0;
  711. break;
  712. }
  713. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  714. __func__, usb_rx_cfg.bit_format,
  715. ucontrol->value.integer.value[0]);
  716. return 0;
  717. }
  718. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  719. struct snd_ctl_elem_value *ucontrol)
  720. {
  721. int rc = 0;
  722. switch (ucontrol->value.integer.value[0]) {
  723. case 3:
  724. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  725. break;
  726. case 2:
  727. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  728. break;
  729. case 1:
  730. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  731. break;
  732. case 0:
  733. default:
  734. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  735. break;
  736. }
  737. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  738. __func__, usb_rx_cfg.bit_format,
  739. ucontrol->value.integer.value[0]);
  740. return rc;
  741. }
  742. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  743. struct snd_ctl_elem_value *ucontrol)
  744. {
  745. switch (usb_tx_cfg.bit_format) {
  746. case SNDRV_PCM_FORMAT_S32_LE:
  747. ucontrol->value.integer.value[0] = 3;
  748. break;
  749. case SNDRV_PCM_FORMAT_S24_3LE:
  750. ucontrol->value.integer.value[0] = 2;
  751. break;
  752. case SNDRV_PCM_FORMAT_S24_LE:
  753. ucontrol->value.integer.value[0] = 1;
  754. break;
  755. case SNDRV_PCM_FORMAT_S16_LE:
  756. default:
  757. ucontrol->value.integer.value[0] = 0;
  758. break;
  759. }
  760. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  761. __func__, usb_tx_cfg.bit_format,
  762. ucontrol->value.integer.value[0]);
  763. return 0;
  764. }
  765. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  766. struct snd_ctl_elem_value *ucontrol)
  767. {
  768. int rc = 0;
  769. switch (ucontrol->value.integer.value[0]) {
  770. case 3:
  771. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  772. break;
  773. case 2:
  774. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  775. break;
  776. case 1:
  777. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  778. break;
  779. case 0:
  780. default:
  781. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  782. break;
  783. }
  784. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  785. __func__, usb_tx_cfg.bit_format,
  786. ucontrol->value.integer.value[0]);
  787. return rc;
  788. }
  789. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  790. struct snd_ctl_elem_value *ucontrol)
  791. {
  792. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  793. usb_rx_cfg.channels);
  794. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  795. return 0;
  796. }
  797. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  798. struct snd_ctl_elem_value *ucontrol)
  799. {
  800. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  801. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  802. return 1;
  803. }
  804. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  805. struct snd_ctl_elem_value *ucontrol)
  806. {
  807. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  808. usb_tx_cfg.channels);
  809. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  810. return 0;
  811. }
  812. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  813. struct snd_ctl_elem_value *ucontrol)
  814. {
  815. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  816. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  817. return 1;
  818. }
  819. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  820. struct snd_ctl_elem_value *ucontrol)
  821. {
  822. pr_debug("%s: proxy_rx channels = %d\n",
  823. __func__, proxy_rx_cfg.channels);
  824. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  825. return 0;
  826. }
  827. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  828. struct snd_ctl_elem_value *ucontrol)
  829. {
  830. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  831. pr_debug("%s: proxy_rx channels = %d\n",
  832. __func__, proxy_rx_cfg.channels);
  833. return 1;
  834. }
  835. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  836. struct tdm_port *port)
  837. {
  838. if (port) {
  839. if (strnstr(kcontrol->id.name, "PRI",
  840. sizeof(kcontrol->id.name))) {
  841. port->mode = TDM_PRI;
  842. } else if (strnstr(kcontrol->id.name, "SEC",
  843. sizeof(kcontrol->id.name))) {
  844. port->mode = TDM_SEC;
  845. } else if (strnstr(kcontrol->id.name, "TERT",
  846. sizeof(kcontrol->id.name))) {
  847. port->mode = TDM_TERT;
  848. } else {
  849. pr_err("%s: unsupported mode in: %s\n",
  850. __func__, kcontrol->id.name);
  851. return -EINVAL;
  852. }
  853. if (strnstr(kcontrol->id.name, "RX_0",
  854. sizeof(kcontrol->id.name)) ||
  855. strnstr(kcontrol->id.name, "TX_0",
  856. sizeof(kcontrol->id.name))) {
  857. port->channel = TDM_0;
  858. } else if (strnstr(kcontrol->id.name, "RX_1",
  859. sizeof(kcontrol->id.name)) ||
  860. strnstr(kcontrol->id.name, "TX_1",
  861. sizeof(kcontrol->id.name))) {
  862. port->channel = TDM_1;
  863. } else if (strnstr(kcontrol->id.name, "RX_2",
  864. sizeof(kcontrol->id.name)) ||
  865. strnstr(kcontrol->id.name, "TX_2",
  866. sizeof(kcontrol->id.name))) {
  867. port->channel = TDM_2;
  868. } else if (strnstr(kcontrol->id.name, "RX_3",
  869. sizeof(kcontrol->id.name)) ||
  870. strnstr(kcontrol->id.name, "TX_3",
  871. sizeof(kcontrol->id.name))) {
  872. port->channel = TDM_3;
  873. } else if (strnstr(kcontrol->id.name, "RX_4",
  874. sizeof(kcontrol->id.name)) ||
  875. strnstr(kcontrol->id.name, "TX_4",
  876. sizeof(kcontrol->id.name))) {
  877. port->channel = TDM_4;
  878. } else if (strnstr(kcontrol->id.name, "RX_5",
  879. sizeof(kcontrol->id.name)) ||
  880. strnstr(kcontrol->id.name, "TX_5",
  881. sizeof(kcontrol->id.name))) {
  882. port->channel = TDM_5;
  883. } else if (strnstr(kcontrol->id.name, "RX_6",
  884. sizeof(kcontrol->id.name)) ||
  885. strnstr(kcontrol->id.name, "TX_6",
  886. sizeof(kcontrol->id.name))) {
  887. port->channel = TDM_6;
  888. } else if (strnstr(kcontrol->id.name, "RX_7",
  889. sizeof(kcontrol->id.name)) ||
  890. strnstr(kcontrol->id.name, "TX_7",
  891. sizeof(kcontrol->id.name))) {
  892. port->channel = TDM_7;
  893. } else {
  894. pr_err("%s: unsupported channel in: %s\n",
  895. __func__, kcontrol->id.name);
  896. return -EINVAL;
  897. }
  898. } else {
  899. return -EINVAL;
  900. }
  901. return 0;
  902. }
  903. static int tdm_get_sample_rate(int value)
  904. {
  905. int sample_rate = 0;
  906. switch (value) {
  907. case 0:
  908. sample_rate = SAMPLING_RATE_8KHZ;
  909. break;
  910. case 1:
  911. sample_rate = SAMPLING_RATE_16KHZ;
  912. break;
  913. case 2:
  914. sample_rate = SAMPLING_RATE_32KHZ;
  915. break;
  916. case 3:
  917. sample_rate = SAMPLING_RATE_48KHZ;
  918. break;
  919. case 4:
  920. sample_rate = SAMPLING_RATE_176P4KHZ;
  921. break;
  922. case 5:
  923. sample_rate = SAMPLING_RATE_352P8KHZ;
  924. break;
  925. default:
  926. sample_rate = SAMPLING_RATE_48KHZ;
  927. break;
  928. }
  929. return sample_rate;
  930. }
  931. static int tdm_get_sample_rate_val(int sample_rate)
  932. {
  933. int sample_rate_val = 0;
  934. switch (sample_rate) {
  935. case SAMPLING_RATE_8KHZ:
  936. sample_rate_val = 0;
  937. break;
  938. case SAMPLING_RATE_16KHZ:
  939. sample_rate_val = 1;
  940. break;
  941. case SAMPLING_RATE_32KHZ:
  942. sample_rate_val = 2;
  943. break;
  944. case SAMPLING_RATE_48KHZ:
  945. sample_rate_val = 3;
  946. break;
  947. case SAMPLING_RATE_176P4KHZ:
  948. sample_rate_val = 4;
  949. break;
  950. case SAMPLING_RATE_352P8KHZ:
  951. sample_rate_val = 5;
  952. break;
  953. default:
  954. sample_rate_val = 3;
  955. break;
  956. }
  957. return sample_rate_val;
  958. }
  959. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  960. struct snd_ctl_elem_value *ucontrol)
  961. {
  962. struct tdm_port port;
  963. int ret = tdm_get_port_idx(kcontrol, &port);
  964. if (ret) {
  965. pr_err("%s: unsupported control: %s\n",
  966. __func__, kcontrol->id.name);
  967. } else {
  968. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  969. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  970. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  971. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  972. ucontrol->value.enumerated.item[0]);
  973. }
  974. return ret;
  975. }
  976. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  977. struct snd_ctl_elem_value *ucontrol)
  978. {
  979. struct tdm_port port;
  980. int ret = tdm_get_port_idx(kcontrol, &port);
  981. if (ret) {
  982. pr_err("%s: unsupported control: %s\n",
  983. __func__, kcontrol->id.name);
  984. } else {
  985. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  986. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  987. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  988. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  989. ucontrol->value.enumerated.item[0]);
  990. }
  991. return ret;
  992. }
  993. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  994. struct snd_ctl_elem_value *ucontrol)
  995. {
  996. struct tdm_port port;
  997. int ret = tdm_get_port_idx(kcontrol, &port);
  998. if (ret) {
  999. pr_err("%s: unsupported control: %s\n",
  1000. __func__, kcontrol->id.name);
  1001. } else {
  1002. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  1003. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  1004. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1005. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1006. ucontrol->value.enumerated.item[0]);
  1007. }
  1008. return ret;
  1009. }
  1010. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1011. struct snd_ctl_elem_value *ucontrol)
  1012. {
  1013. struct tdm_port port;
  1014. int ret = tdm_get_port_idx(kcontrol, &port);
  1015. if (ret) {
  1016. pr_err("%s: unsupported control: %s\n",
  1017. __func__, kcontrol->id.name);
  1018. } else {
  1019. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  1020. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1021. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1022. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1023. ucontrol->value.enumerated.item[0]);
  1024. }
  1025. return ret;
  1026. }
  1027. static int tdm_get_format(int value)
  1028. {
  1029. int format = 0;
  1030. switch (value) {
  1031. case 0:
  1032. format = SNDRV_PCM_FORMAT_S16_LE;
  1033. break;
  1034. case 1:
  1035. format = SNDRV_PCM_FORMAT_S24_LE;
  1036. break;
  1037. case 2:
  1038. format = SNDRV_PCM_FORMAT_S32_LE;
  1039. break;
  1040. default:
  1041. format = SNDRV_PCM_FORMAT_S16_LE;
  1042. break;
  1043. }
  1044. return format;
  1045. }
  1046. static int tdm_get_format_val(int format)
  1047. {
  1048. int value = 0;
  1049. switch (format) {
  1050. case SNDRV_PCM_FORMAT_S16_LE:
  1051. value = 0;
  1052. break;
  1053. case SNDRV_PCM_FORMAT_S24_LE:
  1054. value = 1;
  1055. break;
  1056. case SNDRV_PCM_FORMAT_S32_LE:
  1057. value = 2;
  1058. break;
  1059. default:
  1060. value = 0;
  1061. break;
  1062. }
  1063. return value;
  1064. }
  1065. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  1066. struct snd_ctl_elem_value *ucontrol)
  1067. {
  1068. struct tdm_port port;
  1069. int ret = tdm_get_port_idx(kcontrol, &port);
  1070. if (ret) {
  1071. pr_err("%s: unsupported control: %s\n",
  1072. __func__, kcontrol->id.name);
  1073. } else {
  1074. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1075. tdm_rx_cfg[port.mode][port.channel].bit_format);
  1076. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1077. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1078. ucontrol->value.enumerated.item[0]);
  1079. }
  1080. return ret;
  1081. }
  1082. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  1083. struct snd_ctl_elem_value *ucontrol)
  1084. {
  1085. struct tdm_port port;
  1086. int ret = tdm_get_port_idx(kcontrol, &port);
  1087. if (ret) {
  1088. pr_err("%s: unsupported control: %s\n",
  1089. __func__, kcontrol->id.name);
  1090. } else {
  1091. tdm_rx_cfg[port.mode][port.channel].bit_format =
  1092. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1093. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1094. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1095. ucontrol->value.enumerated.item[0]);
  1096. }
  1097. return ret;
  1098. }
  1099. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  1100. struct snd_ctl_elem_value *ucontrol)
  1101. {
  1102. struct tdm_port port;
  1103. int ret = tdm_get_port_idx(kcontrol, &port);
  1104. if (ret) {
  1105. pr_err("%s: unsupported control: %s\n",
  1106. __func__, kcontrol->id.name);
  1107. } else {
  1108. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1109. tdm_tx_cfg[port.mode][port.channel].bit_format);
  1110. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1111. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1112. ucontrol->value.enumerated.item[0]);
  1113. }
  1114. return ret;
  1115. }
  1116. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  1117. struct snd_ctl_elem_value *ucontrol)
  1118. {
  1119. struct tdm_port port;
  1120. int ret = tdm_get_port_idx(kcontrol, &port);
  1121. if (ret) {
  1122. pr_err("%s: unsupported control: %s\n",
  1123. __func__, kcontrol->id.name);
  1124. } else {
  1125. tdm_tx_cfg[port.mode][port.channel].bit_format =
  1126. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1127. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1128. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1129. ucontrol->value.enumerated.item[0]);
  1130. }
  1131. return ret;
  1132. }
  1133. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  1134. struct snd_ctl_elem_value *ucontrol)
  1135. {
  1136. struct tdm_port port;
  1137. int ret = tdm_get_port_idx(kcontrol, &port);
  1138. if (ret) {
  1139. pr_err("%s: unsupported control: %s\n",
  1140. __func__, kcontrol->id.name);
  1141. } else {
  1142. ucontrol->value.enumerated.item[0] =
  1143. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  1144. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1145. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  1146. ucontrol->value.enumerated.item[0]);
  1147. }
  1148. return ret;
  1149. }
  1150. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  1151. struct snd_ctl_elem_value *ucontrol)
  1152. {
  1153. struct tdm_port port;
  1154. int ret = tdm_get_port_idx(kcontrol, &port);
  1155. if (ret) {
  1156. pr_err("%s: unsupported control: %s\n",
  1157. __func__, kcontrol->id.name);
  1158. } else {
  1159. tdm_rx_cfg[port.mode][port.channel].channels =
  1160. ucontrol->value.enumerated.item[0] + 1;
  1161. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1162. tdm_rx_cfg[port.mode][port.channel].channels,
  1163. ucontrol->value.enumerated.item[0] + 1);
  1164. }
  1165. return ret;
  1166. }
  1167. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  1168. struct snd_ctl_elem_value *ucontrol)
  1169. {
  1170. struct tdm_port port;
  1171. int ret = tdm_get_port_idx(kcontrol, &port);
  1172. if (ret) {
  1173. pr_err("%s: unsupported control: %s\n",
  1174. __func__, kcontrol->id.name);
  1175. } else {
  1176. ucontrol->value.enumerated.item[0] =
  1177. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  1178. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1179. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  1180. ucontrol->value.enumerated.item[0]);
  1181. }
  1182. return ret;
  1183. }
  1184. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  1185. struct snd_ctl_elem_value *ucontrol)
  1186. {
  1187. struct tdm_port port;
  1188. int ret = tdm_get_port_idx(kcontrol, &port);
  1189. if (ret) {
  1190. pr_err("%s: unsupported control: %s\n",
  1191. __func__, kcontrol->id.name);
  1192. } else {
  1193. tdm_tx_cfg[port.mode][port.channel].channels =
  1194. ucontrol->value.enumerated.item[0] + 1;
  1195. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1196. tdm_tx_cfg[port.mode][port.channel].channels,
  1197. ucontrol->value.enumerated.item[0] + 1);
  1198. }
  1199. return ret;
  1200. }
  1201. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  1202. {
  1203. int idx = 0;
  1204. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  1205. sizeof("PRIM_AUX_PCM"))) {
  1206. idx = PRIM_AUX_PCM;
  1207. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  1208. sizeof("SEC_AUX_PCM"))) {
  1209. idx = SEC_AUX_PCM;
  1210. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  1211. sizeof("TERT_AUX_PCM"))) {
  1212. idx = TERT_AUX_PCM;
  1213. } else {
  1214. pr_err("%s: unsupported port: %s\n",
  1215. __func__, kcontrol->id.name);
  1216. idx = -EINVAL;
  1217. }
  1218. return idx;
  1219. }
  1220. static int aux_pcm_get_sample_rate(int value)
  1221. {
  1222. int sample_rate = 0;
  1223. switch (value) {
  1224. case 1:
  1225. sample_rate = SAMPLING_RATE_16KHZ;
  1226. break;
  1227. case 0:
  1228. default:
  1229. sample_rate = SAMPLING_RATE_8KHZ;
  1230. break;
  1231. }
  1232. return sample_rate;
  1233. }
  1234. static int aux_pcm_get_sample_rate_val(int sample_rate)
  1235. {
  1236. int sample_rate_val = 0;
  1237. switch (sample_rate) {
  1238. case SAMPLING_RATE_16KHZ:
  1239. sample_rate_val = 1;
  1240. break;
  1241. case SAMPLING_RATE_8KHZ:
  1242. default:
  1243. sample_rate_val = 0;
  1244. break;
  1245. }
  1246. return sample_rate_val;
  1247. }
  1248. static int mi2s_auxpcm_get_format(int value)
  1249. {
  1250. int format = 0;
  1251. switch (value) {
  1252. case 0:
  1253. format = SNDRV_PCM_FORMAT_S16_LE;
  1254. break;
  1255. case 1:
  1256. format = SNDRV_PCM_FORMAT_S24_LE;
  1257. break;
  1258. case 2:
  1259. format = SNDRV_PCM_FORMAT_S24_3LE;
  1260. break;
  1261. case 3:
  1262. format = SNDRV_PCM_FORMAT_S32_LE;
  1263. break;
  1264. default:
  1265. format = SNDRV_PCM_FORMAT_S16_LE;
  1266. break;
  1267. }
  1268. return format;
  1269. }
  1270. static int mi2s_auxpcm_get_format_value(int format)
  1271. {
  1272. int value = 0;
  1273. switch (format) {
  1274. case SNDRV_PCM_FORMAT_S16_LE:
  1275. value = 0;
  1276. break;
  1277. case SNDRV_PCM_FORMAT_S24_LE:
  1278. value = 1;
  1279. break;
  1280. case SNDRV_PCM_FORMAT_S24_3LE:
  1281. value = 2;
  1282. break;
  1283. case SNDRV_PCM_FORMAT_S32_LE:
  1284. value = 3;
  1285. break;
  1286. default:
  1287. value = 0;
  1288. break;
  1289. }
  1290. return value;
  1291. }
  1292. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1293. struct snd_ctl_elem_value *ucontrol)
  1294. {
  1295. int idx = aux_pcm_get_port_idx(kcontrol);
  1296. if (idx < 0)
  1297. return idx;
  1298. ucontrol->value.enumerated.item[0] =
  1299. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  1300. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1301. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1302. ucontrol->value.enumerated.item[0]);
  1303. return 0;
  1304. }
  1305. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1306. struct snd_ctl_elem_value *ucontrol)
  1307. {
  1308. int idx = aux_pcm_get_port_idx(kcontrol);
  1309. if (idx < 0)
  1310. return idx;
  1311. aux_pcm_rx_cfg[idx].sample_rate =
  1312. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1313. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1314. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1315. ucontrol->value.enumerated.item[0]);
  1316. return 0;
  1317. }
  1318. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1319. struct snd_ctl_elem_value *ucontrol)
  1320. {
  1321. int idx = aux_pcm_get_port_idx(kcontrol);
  1322. if (idx < 0)
  1323. return idx;
  1324. ucontrol->value.enumerated.item[0] =
  1325. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  1326. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1327. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1328. ucontrol->value.enumerated.item[0]);
  1329. return 0;
  1330. }
  1331. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1332. struct snd_ctl_elem_value *ucontrol)
  1333. {
  1334. int idx = aux_pcm_get_port_idx(kcontrol);
  1335. if (idx < 0)
  1336. return idx;
  1337. aux_pcm_tx_cfg[idx].sample_rate =
  1338. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1339. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1340. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1341. ucontrol->value.enumerated.item[0]);
  1342. return 0;
  1343. }
  1344. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  1345. struct snd_ctl_elem_value *ucontrol)
  1346. {
  1347. int idx = aux_pcm_get_port_idx(kcontrol);
  1348. if (idx < 0)
  1349. return idx;
  1350. ucontrol->value.enumerated.item[0] =
  1351. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  1352. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1353. idx, aux_pcm_rx_cfg[idx].bit_format,
  1354. ucontrol->value.enumerated.item[0]);
  1355. return 0;
  1356. }
  1357. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  1358. struct snd_ctl_elem_value *ucontrol)
  1359. {
  1360. int idx = aux_pcm_get_port_idx(kcontrol);
  1361. if (idx < 0)
  1362. return idx;
  1363. aux_pcm_rx_cfg[idx].bit_format =
  1364. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1365. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1366. idx, aux_pcm_rx_cfg[idx].bit_format,
  1367. ucontrol->value.enumerated.item[0]);
  1368. return 0;
  1369. }
  1370. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  1371. struct snd_ctl_elem_value *ucontrol)
  1372. {
  1373. int idx = aux_pcm_get_port_idx(kcontrol);
  1374. if (idx < 0)
  1375. return idx;
  1376. ucontrol->value.enumerated.item[0] =
  1377. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  1378. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1379. idx, aux_pcm_tx_cfg[idx].bit_format,
  1380. ucontrol->value.enumerated.item[0]);
  1381. return 0;
  1382. }
  1383. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  1384. struct snd_ctl_elem_value *ucontrol)
  1385. {
  1386. int idx = aux_pcm_get_port_idx(kcontrol);
  1387. if (idx < 0)
  1388. return idx;
  1389. aux_pcm_tx_cfg[idx].bit_format =
  1390. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1391. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1392. idx, aux_pcm_tx_cfg[idx].bit_format,
  1393. ucontrol->value.enumerated.item[0]);
  1394. return 0;
  1395. }
  1396. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  1397. {
  1398. int idx = 0;
  1399. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  1400. sizeof("PRIM_MI2S_RX"))) {
  1401. idx = PRIM_MI2S;
  1402. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  1403. sizeof("SEC_MI2S_RX"))) {
  1404. idx = SEC_MI2S;
  1405. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  1406. sizeof("TERT_MI2S_RX"))) {
  1407. idx = TERT_MI2S;
  1408. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  1409. sizeof("PRIM_MI2S_TX"))) {
  1410. idx = PRIM_MI2S;
  1411. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  1412. sizeof("SEC_MI2S_TX"))) {
  1413. idx = SEC_MI2S;
  1414. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  1415. sizeof("TERT_MI2S_TX"))) {
  1416. idx = TERT_MI2S;
  1417. } else {
  1418. pr_err("%s: unsupported channel: %s\n",
  1419. __func__, kcontrol->id.name);
  1420. idx = -EINVAL;
  1421. }
  1422. return idx;
  1423. }
  1424. static int mi2s_get_sample_rate(int value)
  1425. {
  1426. int sample_rate = 0;
  1427. switch (value) {
  1428. case 0:
  1429. sample_rate = SAMPLING_RATE_8KHZ;
  1430. break;
  1431. case 1:
  1432. sample_rate = SAMPLING_RATE_11P025KHZ;
  1433. break;
  1434. case 2:
  1435. sample_rate = SAMPLING_RATE_16KHZ;
  1436. break;
  1437. case 3:
  1438. sample_rate = SAMPLING_RATE_22P05KHZ;
  1439. break;
  1440. case 4:
  1441. sample_rate = SAMPLING_RATE_32KHZ;
  1442. break;
  1443. case 5:
  1444. sample_rate = SAMPLING_RATE_44P1KHZ;
  1445. break;
  1446. case 6:
  1447. sample_rate = SAMPLING_RATE_48KHZ;
  1448. break;
  1449. case 7:
  1450. sample_rate = SAMPLING_RATE_96KHZ;
  1451. break;
  1452. case 8:
  1453. sample_rate = SAMPLING_RATE_192KHZ;
  1454. break;
  1455. default:
  1456. sample_rate = SAMPLING_RATE_48KHZ;
  1457. break;
  1458. }
  1459. return sample_rate;
  1460. }
  1461. static int mi2s_get_sample_rate_val(int sample_rate)
  1462. {
  1463. int sample_rate_val = 0;
  1464. switch (sample_rate) {
  1465. case SAMPLING_RATE_8KHZ:
  1466. sample_rate_val = 0;
  1467. break;
  1468. case SAMPLING_RATE_11P025KHZ:
  1469. sample_rate_val = 1;
  1470. break;
  1471. case SAMPLING_RATE_16KHZ:
  1472. sample_rate_val = 2;
  1473. break;
  1474. case SAMPLING_RATE_22P05KHZ:
  1475. sample_rate_val = 3;
  1476. break;
  1477. case SAMPLING_RATE_32KHZ:
  1478. sample_rate_val = 4;
  1479. break;
  1480. case SAMPLING_RATE_44P1KHZ:
  1481. sample_rate_val = 5;
  1482. break;
  1483. case SAMPLING_RATE_48KHZ:
  1484. sample_rate_val = 6;
  1485. break;
  1486. case SAMPLING_RATE_96KHZ:
  1487. sample_rate_val = 7;
  1488. break;
  1489. case SAMPLING_RATE_192KHZ:
  1490. sample_rate_val = 8;
  1491. break;
  1492. default:
  1493. sample_rate_val = 6;
  1494. break;
  1495. }
  1496. return sample_rate_val;
  1497. }
  1498. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1499. struct snd_ctl_elem_value *ucontrol)
  1500. {
  1501. int idx = mi2s_get_port_idx(kcontrol);
  1502. if (idx < 0)
  1503. return idx;
  1504. ucontrol->value.enumerated.item[0] =
  1505. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  1506. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1507. idx, mi2s_rx_cfg[idx].sample_rate,
  1508. ucontrol->value.enumerated.item[0]);
  1509. return 0;
  1510. }
  1511. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1512. struct snd_ctl_elem_value *ucontrol)
  1513. {
  1514. int idx = mi2s_get_port_idx(kcontrol);
  1515. if (idx < 0)
  1516. return idx;
  1517. mi2s_rx_cfg[idx].sample_rate =
  1518. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1519. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1520. idx, mi2s_rx_cfg[idx].sample_rate,
  1521. ucontrol->value.enumerated.item[0]);
  1522. return 0;
  1523. }
  1524. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1525. struct snd_ctl_elem_value *ucontrol)
  1526. {
  1527. int idx = mi2s_get_port_idx(kcontrol);
  1528. if (idx < 0)
  1529. return idx;
  1530. ucontrol->value.enumerated.item[0] =
  1531. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  1532. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1533. idx, mi2s_tx_cfg[idx].sample_rate,
  1534. ucontrol->value.enumerated.item[0]);
  1535. return 0;
  1536. }
  1537. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1538. struct snd_ctl_elem_value *ucontrol)
  1539. {
  1540. int idx = mi2s_get_port_idx(kcontrol);
  1541. if (idx < 0)
  1542. return idx;
  1543. mi2s_tx_cfg[idx].sample_rate =
  1544. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1545. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1546. idx, mi2s_tx_cfg[idx].sample_rate,
  1547. ucontrol->value.enumerated.item[0]);
  1548. return 0;
  1549. }
  1550. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  1551. struct snd_ctl_elem_value *ucontrol)
  1552. {
  1553. int idx = mi2s_get_port_idx(kcontrol);
  1554. if (idx < 0)
  1555. return idx;
  1556. ucontrol->value.enumerated.item[0] =
  1557. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  1558. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1559. idx, mi2s_rx_cfg[idx].bit_format,
  1560. ucontrol->value.enumerated.item[0]);
  1561. return 0;
  1562. }
  1563. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  1564. struct snd_ctl_elem_value *ucontrol)
  1565. {
  1566. int idx = mi2s_get_port_idx(kcontrol);
  1567. if (idx < 0)
  1568. return idx;
  1569. mi2s_rx_cfg[idx].bit_format =
  1570. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1571. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1572. idx, mi2s_rx_cfg[idx].bit_format,
  1573. ucontrol->value.enumerated.item[0]);
  1574. return 0;
  1575. }
  1576. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  1577. struct snd_ctl_elem_value *ucontrol)
  1578. {
  1579. int idx = mi2s_get_port_idx(kcontrol);
  1580. if (idx < 0)
  1581. return idx;
  1582. ucontrol->value.enumerated.item[0] =
  1583. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  1584. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1585. idx, mi2s_tx_cfg[idx].bit_format,
  1586. ucontrol->value.enumerated.item[0]);
  1587. return 0;
  1588. }
  1589. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  1590. struct snd_ctl_elem_value *ucontrol)
  1591. {
  1592. int idx = mi2s_get_port_idx(kcontrol);
  1593. if (idx < 0)
  1594. return idx;
  1595. mi2s_tx_cfg[idx].bit_format =
  1596. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1597. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1598. idx, mi2s_tx_cfg[idx].bit_format,
  1599. ucontrol->value.enumerated.item[0]);
  1600. return 0;
  1601. }
  1602. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  1603. struct snd_ctl_elem_value *ucontrol)
  1604. {
  1605. int idx = mi2s_get_port_idx(kcontrol);
  1606. if (idx < 0)
  1607. return idx;
  1608. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1609. idx, mi2s_rx_cfg[idx].channels);
  1610. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  1611. return 0;
  1612. }
  1613. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  1614. struct snd_ctl_elem_value *ucontrol)
  1615. {
  1616. int idx = mi2s_get_port_idx(kcontrol);
  1617. if (idx < 0)
  1618. return idx;
  1619. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1620. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1621. idx, mi2s_rx_cfg[idx].channels);
  1622. return 1;
  1623. }
  1624. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  1625. struct snd_ctl_elem_value *ucontrol)
  1626. {
  1627. int idx = mi2s_get_port_idx(kcontrol);
  1628. if (idx < 0)
  1629. return idx;
  1630. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1631. idx, mi2s_tx_cfg[idx].channels);
  1632. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  1633. return 0;
  1634. }
  1635. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  1636. struct snd_ctl_elem_value *ucontrol)
  1637. {
  1638. int idx = mi2s_get_port_idx(kcontrol);
  1639. if (idx < 0)
  1640. return idx;
  1641. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1642. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1643. idx, mi2s_tx_cfg[idx].channels);
  1644. return 1;
  1645. }
  1646. static int msm_get_port_id(int be_id)
  1647. {
  1648. int afe_port_id = 0;
  1649. switch (be_id) {
  1650. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  1651. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  1652. break;
  1653. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  1654. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  1655. break;
  1656. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  1657. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  1658. break;
  1659. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  1660. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  1661. break;
  1662. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  1663. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  1664. break;
  1665. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  1666. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  1667. break;
  1668. default:
  1669. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  1670. afe_port_id = -EINVAL;
  1671. }
  1672. return afe_port_id;
  1673. }
  1674. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  1675. {
  1676. u32 bit_per_sample = 0;
  1677. switch (bit_format) {
  1678. case SNDRV_PCM_FORMAT_S32_LE:
  1679. case SNDRV_PCM_FORMAT_S24_3LE:
  1680. case SNDRV_PCM_FORMAT_S24_LE:
  1681. bit_per_sample = 32;
  1682. break;
  1683. case SNDRV_PCM_FORMAT_S16_LE:
  1684. default:
  1685. bit_per_sample = 16;
  1686. break;
  1687. }
  1688. return bit_per_sample;
  1689. }
  1690. static void update_mi2s_clk_val(int dai_id, int stream)
  1691. {
  1692. u32 bit_per_sample = 0;
  1693. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  1694. bit_per_sample =
  1695. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  1696. mi2s_clk[dai_id].clk_freq_in_hz =
  1697. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  1698. } else {
  1699. bit_per_sample =
  1700. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  1701. mi2s_clk[dai_id].clk_freq_in_hz =
  1702. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  1703. }
  1704. }
  1705. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  1706. {
  1707. int ret = 0;
  1708. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1709. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  1710. int port_id = 0;
  1711. int index = cpu_dai->id;
  1712. port_id = msm_get_port_id(rtd->dai_link->id);
  1713. if (port_id < 0) {
  1714. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  1715. ret = port_id;
  1716. goto err;
  1717. }
  1718. if (enable) {
  1719. update_mi2s_clk_val(index, substream->stream);
  1720. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  1721. mi2s_clk[index].clk_freq_in_hz);
  1722. }
  1723. mi2s_clk[index].enable = enable;
  1724. ret = afe_set_lpass_clock_v2(port_id,
  1725. &mi2s_clk[index]);
  1726. if (ret < 0) {
  1727. dev_err(rtd->card->dev,
  1728. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  1729. __func__, port_id, ret);
  1730. goto err;
  1731. }
  1732. err:
  1733. return ret;
  1734. }
  1735. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1736. {
  1737. int idx = 0;
  1738. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1739. sizeof("WSA_CDC_DMA_RX_0")))
  1740. idx = WSA_CDC_DMA_RX_0;
  1741. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1742. sizeof("WSA_CDC_DMA_RX_0")))
  1743. idx = WSA_CDC_DMA_RX_1;
  1744. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1745. sizeof("RX_CDC_DMA_RX_0")))
  1746. idx = RX_CDC_DMA_RX_0;
  1747. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1748. sizeof("RX_CDC_DMA_RX_1")))
  1749. idx = RX_CDC_DMA_RX_1;
  1750. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1751. sizeof("RX_CDC_DMA_RX_2")))
  1752. idx = RX_CDC_DMA_RX_2;
  1753. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1754. sizeof("RX_CDC_DMA_RX_3")))
  1755. idx = RX_CDC_DMA_RX_3;
  1756. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1757. sizeof("RX_CDC_DMA_RX_5")))
  1758. idx = RX_CDC_DMA_RX_5;
  1759. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1760. sizeof("WSA_CDC_DMA_TX_0")))
  1761. idx = WSA_CDC_DMA_TX_0;
  1762. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1763. sizeof("WSA_CDC_DMA_TX_1")))
  1764. idx = WSA_CDC_DMA_TX_1;
  1765. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1766. sizeof("WSA_CDC_DMA_TX_2")))
  1767. idx = WSA_CDC_DMA_TX_2;
  1768. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1769. sizeof("TX_CDC_DMA_TX_0")))
  1770. idx = TX_CDC_DMA_TX_0;
  1771. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1772. sizeof("TX_CDC_DMA_TX_3")))
  1773. idx = TX_CDC_DMA_TX_3;
  1774. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1775. sizeof("TX_CDC_DMA_TX_4")))
  1776. idx = TX_CDC_DMA_TX_4;
  1777. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
  1778. sizeof("VA_CDC_DMA_TX_0")))
  1779. idx = VA_CDC_DMA_TX_0;
  1780. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
  1781. sizeof("VA_CDC_DMA_TX_1")))
  1782. idx = VA_CDC_DMA_TX_1;
  1783. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
  1784. sizeof("VA_CDC_DMA_TX_2")))
  1785. idx = VA_CDC_DMA_TX_2;
  1786. else {
  1787. pr_err("%s: unsupported channel: %s\n",
  1788. __func__, kcontrol->id.name);
  1789. return -EINVAL;
  1790. }
  1791. return idx;
  1792. }
  1793. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1794. struct snd_ctl_elem_value *ucontrol)
  1795. {
  1796. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1797. if (ch_num < 0) {
  1798. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1799. return ch_num;
  1800. }
  1801. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1802. cdc_dma_rx_cfg[ch_num].channels - 1);
  1803. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1804. return 0;
  1805. }
  1806. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1807. struct snd_ctl_elem_value *ucontrol)
  1808. {
  1809. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1810. if (ch_num < 0) {
  1811. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1812. return ch_num;
  1813. }
  1814. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1815. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1816. cdc_dma_rx_cfg[ch_num].channels);
  1817. return 1;
  1818. }
  1819. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1820. struct snd_ctl_elem_value *ucontrol)
  1821. {
  1822. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1823. if (ch_num < 0) {
  1824. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1825. return ch_num;
  1826. }
  1827. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1828. case SNDRV_PCM_FORMAT_S32_LE:
  1829. ucontrol->value.integer.value[0] = 3;
  1830. break;
  1831. case SNDRV_PCM_FORMAT_S24_3LE:
  1832. ucontrol->value.integer.value[0] = 2;
  1833. break;
  1834. case SNDRV_PCM_FORMAT_S24_LE:
  1835. ucontrol->value.integer.value[0] = 1;
  1836. break;
  1837. case SNDRV_PCM_FORMAT_S16_LE:
  1838. default:
  1839. ucontrol->value.integer.value[0] = 0;
  1840. break;
  1841. }
  1842. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1843. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1844. ucontrol->value.integer.value[0]);
  1845. return 0;
  1846. }
  1847. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1848. struct snd_ctl_elem_value *ucontrol)
  1849. {
  1850. int rc = 0;
  1851. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1852. if (ch_num < 0) {
  1853. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1854. return ch_num;
  1855. }
  1856. switch (ucontrol->value.integer.value[0]) {
  1857. case 3:
  1858. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1859. break;
  1860. case 2:
  1861. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1862. break;
  1863. case 1:
  1864. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1865. break;
  1866. case 0:
  1867. default:
  1868. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1869. break;
  1870. }
  1871. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1872. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1873. ucontrol->value.integer.value[0]);
  1874. return rc;
  1875. }
  1876. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1877. {
  1878. int sample_rate_val = 0;
  1879. switch (sample_rate) {
  1880. case SAMPLING_RATE_8KHZ:
  1881. sample_rate_val = 0;
  1882. break;
  1883. case SAMPLING_RATE_11P025KHZ:
  1884. sample_rate_val = 1;
  1885. break;
  1886. case SAMPLING_RATE_16KHZ:
  1887. sample_rate_val = 2;
  1888. break;
  1889. case SAMPLING_RATE_22P05KHZ:
  1890. sample_rate_val = 3;
  1891. break;
  1892. case SAMPLING_RATE_32KHZ:
  1893. sample_rate_val = 4;
  1894. break;
  1895. case SAMPLING_RATE_44P1KHZ:
  1896. sample_rate_val = 5;
  1897. break;
  1898. case SAMPLING_RATE_48KHZ:
  1899. sample_rate_val = 6;
  1900. break;
  1901. case SAMPLING_RATE_88P2KHZ:
  1902. sample_rate_val = 7;
  1903. break;
  1904. case SAMPLING_RATE_96KHZ:
  1905. sample_rate_val = 8;
  1906. break;
  1907. case SAMPLING_RATE_176P4KHZ:
  1908. sample_rate_val = 9;
  1909. break;
  1910. case SAMPLING_RATE_192KHZ:
  1911. sample_rate_val = 10;
  1912. break;
  1913. case SAMPLING_RATE_352P8KHZ:
  1914. sample_rate_val = 11;
  1915. break;
  1916. case SAMPLING_RATE_384KHZ:
  1917. sample_rate_val = 12;
  1918. break;
  1919. default:
  1920. sample_rate_val = 6;
  1921. break;
  1922. }
  1923. return sample_rate_val;
  1924. }
  1925. static int cdc_dma_get_sample_rate(int value)
  1926. {
  1927. int sample_rate = 0;
  1928. switch (value) {
  1929. case 0:
  1930. sample_rate = SAMPLING_RATE_8KHZ;
  1931. break;
  1932. case 1:
  1933. sample_rate = SAMPLING_RATE_11P025KHZ;
  1934. break;
  1935. case 2:
  1936. sample_rate = SAMPLING_RATE_16KHZ;
  1937. break;
  1938. case 3:
  1939. sample_rate = SAMPLING_RATE_22P05KHZ;
  1940. break;
  1941. case 4:
  1942. sample_rate = SAMPLING_RATE_32KHZ;
  1943. break;
  1944. case 5:
  1945. sample_rate = SAMPLING_RATE_44P1KHZ;
  1946. break;
  1947. case 6:
  1948. sample_rate = SAMPLING_RATE_48KHZ;
  1949. break;
  1950. case 7:
  1951. sample_rate = SAMPLING_RATE_88P2KHZ;
  1952. break;
  1953. case 8:
  1954. sample_rate = SAMPLING_RATE_96KHZ;
  1955. break;
  1956. case 9:
  1957. sample_rate = SAMPLING_RATE_176P4KHZ;
  1958. break;
  1959. case 10:
  1960. sample_rate = SAMPLING_RATE_192KHZ;
  1961. break;
  1962. case 11:
  1963. sample_rate = SAMPLING_RATE_352P8KHZ;
  1964. break;
  1965. case 12:
  1966. sample_rate = SAMPLING_RATE_384KHZ;
  1967. break;
  1968. default:
  1969. sample_rate = SAMPLING_RATE_48KHZ;
  1970. break;
  1971. }
  1972. return sample_rate;
  1973. }
  1974. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1975. struct snd_ctl_elem_value *ucontrol)
  1976. {
  1977. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1978. if (ch_num < 0) {
  1979. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1980. return ch_num;
  1981. }
  1982. ucontrol->value.enumerated.item[0] =
  1983. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1984. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1985. cdc_dma_rx_cfg[ch_num].sample_rate);
  1986. return 0;
  1987. }
  1988. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1989. struct snd_ctl_elem_value *ucontrol)
  1990. {
  1991. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1992. if (ch_num < 0) {
  1993. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1994. return ch_num;
  1995. }
  1996. cdc_dma_rx_cfg[ch_num].sample_rate =
  1997. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1998. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  1999. __func__, ucontrol->value.enumerated.item[0],
  2000. cdc_dma_rx_cfg[ch_num].sample_rate);
  2001. return 0;
  2002. }
  2003. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  2004. struct snd_ctl_elem_value *ucontrol)
  2005. {
  2006. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2007. if (ch_num < 0) {
  2008. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2009. return ch_num;
  2010. }
  2011. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  2012. cdc_dma_tx_cfg[ch_num].channels);
  2013. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  2014. return 0;
  2015. }
  2016. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  2017. struct snd_ctl_elem_value *ucontrol)
  2018. {
  2019. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2020. if (ch_num < 0) {
  2021. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2022. return ch_num;
  2023. }
  2024. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  2025. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  2026. cdc_dma_tx_cfg[ch_num].channels);
  2027. return 1;
  2028. }
  2029. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2030. struct snd_ctl_elem_value *ucontrol)
  2031. {
  2032. int sample_rate_val;
  2033. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2034. if (ch_num < 0) {
  2035. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2036. return ch_num;
  2037. }
  2038. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  2039. case SAMPLING_RATE_384KHZ:
  2040. sample_rate_val = 12;
  2041. break;
  2042. case SAMPLING_RATE_352P8KHZ:
  2043. sample_rate_val = 11;
  2044. break;
  2045. case SAMPLING_RATE_192KHZ:
  2046. sample_rate_val = 10;
  2047. break;
  2048. case SAMPLING_RATE_176P4KHZ:
  2049. sample_rate_val = 9;
  2050. break;
  2051. case SAMPLING_RATE_96KHZ:
  2052. sample_rate_val = 8;
  2053. break;
  2054. case SAMPLING_RATE_88P2KHZ:
  2055. sample_rate_val = 7;
  2056. break;
  2057. case SAMPLING_RATE_48KHZ:
  2058. sample_rate_val = 6;
  2059. break;
  2060. case SAMPLING_RATE_44P1KHZ:
  2061. sample_rate_val = 5;
  2062. break;
  2063. case SAMPLING_RATE_32KHZ:
  2064. sample_rate_val = 4;
  2065. break;
  2066. case SAMPLING_RATE_22P05KHZ:
  2067. sample_rate_val = 3;
  2068. break;
  2069. case SAMPLING_RATE_16KHZ:
  2070. sample_rate_val = 2;
  2071. break;
  2072. case SAMPLING_RATE_11P025KHZ:
  2073. sample_rate_val = 1;
  2074. break;
  2075. case SAMPLING_RATE_8KHZ:
  2076. sample_rate_val = 0;
  2077. break;
  2078. default:
  2079. sample_rate_val = 6;
  2080. break;
  2081. }
  2082. ucontrol->value.integer.value[0] = sample_rate_val;
  2083. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  2084. cdc_dma_tx_cfg[ch_num].sample_rate);
  2085. return 0;
  2086. }
  2087. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2088. struct snd_ctl_elem_value *ucontrol)
  2089. {
  2090. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2091. if (ch_num < 0) {
  2092. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2093. return ch_num;
  2094. }
  2095. switch (ucontrol->value.integer.value[0]) {
  2096. case 12:
  2097. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  2098. break;
  2099. case 11:
  2100. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  2101. break;
  2102. case 10:
  2103. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  2104. break;
  2105. case 9:
  2106. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  2107. break;
  2108. case 8:
  2109. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  2110. break;
  2111. case 7:
  2112. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  2113. break;
  2114. case 6:
  2115. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  2116. break;
  2117. case 5:
  2118. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  2119. break;
  2120. case 4:
  2121. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  2122. break;
  2123. case 3:
  2124. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  2125. break;
  2126. case 2:
  2127. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  2128. break;
  2129. case 1:
  2130. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  2131. break;
  2132. case 0:
  2133. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  2134. break;
  2135. default:
  2136. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  2137. break;
  2138. }
  2139. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  2140. __func__, ucontrol->value.integer.value[0],
  2141. cdc_dma_tx_cfg[ch_num].sample_rate);
  2142. return 0;
  2143. }
  2144. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  2145. struct snd_ctl_elem_value *ucontrol)
  2146. {
  2147. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2148. if (ch_num < 0) {
  2149. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2150. return ch_num;
  2151. }
  2152. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  2153. case SNDRV_PCM_FORMAT_S32_LE:
  2154. ucontrol->value.integer.value[0] = 3;
  2155. break;
  2156. case SNDRV_PCM_FORMAT_S24_3LE:
  2157. ucontrol->value.integer.value[0] = 2;
  2158. break;
  2159. case SNDRV_PCM_FORMAT_S24_LE:
  2160. ucontrol->value.integer.value[0] = 1;
  2161. break;
  2162. case SNDRV_PCM_FORMAT_S16_LE:
  2163. default:
  2164. ucontrol->value.integer.value[0] = 0;
  2165. break;
  2166. }
  2167. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  2168. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  2169. ucontrol->value.integer.value[0]);
  2170. return 0;
  2171. }
  2172. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  2173. struct snd_ctl_elem_value *ucontrol)
  2174. {
  2175. int rc = 0;
  2176. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2177. if (ch_num < 0) {
  2178. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2179. return ch_num;
  2180. }
  2181. switch (ucontrol->value.integer.value[0]) {
  2182. case 3:
  2183. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  2184. break;
  2185. case 2:
  2186. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2187. break;
  2188. case 1:
  2189. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2190. break;
  2191. case 0:
  2192. default:
  2193. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2194. break;
  2195. }
  2196. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  2197. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  2198. ucontrol->value.integer.value[0]);
  2199. return rc;
  2200. }
  2201. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  2202. {
  2203. int idx = 0;
  2204. switch (be_id) {
  2205. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  2206. idx = WSA_CDC_DMA_RX_0;
  2207. break;
  2208. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  2209. idx = WSA_CDC_DMA_TX_0;
  2210. break;
  2211. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  2212. idx = WSA_CDC_DMA_RX_1;
  2213. break;
  2214. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  2215. idx = WSA_CDC_DMA_TX_1;
  2216. break;
  2217. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  2218. idx = WSA_CDC_DMA_TX_2;
  2219. break;
  2220. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  2221. idx = RX_CDC_DMA_RX_0;
  2222. break;
  2223. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  2224. idx = RX_CDC_DMA_RX_1;
  2225. break;
  2226. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  2227. idx = RX_CDC_DMA_RX_2;
  2228. break;
  2229. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  2230. idx = RX_CDC_DMA_RX_3;
  2231. break;
  2232. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  2233. idx = RX_CDC_DMA_RX_5;
  2234. break;
  2235. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  2236. idx = TX_CDC_DMA_TX_0;
  2237. break;
  2238. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  2239. idx = TX_CDC_DMA_TX_3;
  2240. break;
  2241. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  2242. idx = TX_CDC_DMA_TX_4;
  2243. break;
  2244. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  2245. idx = VA_CDC_DMA_TX_0;
  2246. break;
  2247. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  2248. idx = VA_CDC_DMA_TX_1;
  2249. break;
  2250. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  2251. idx = VA_CDC_DMA_TX_2;
  2252. break;
  2253. default:
  2254. idx = RX_CDC_DMA_RX_0;
  2255. break;
  2256. }
  2257. return idx;
  2258. }
  2259. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  2260. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  2261. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2262. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  2263. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2264. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  2265. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2266. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  2267. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2268. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  2269. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2270. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  2271. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2272. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  2273. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2274. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  2275. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2276. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  2277. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2278. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  2279. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2280. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  2281. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2282. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  2283. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2284. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  2285. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2286. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
  2287. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2288. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
  2289. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2290. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
  2291. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2292. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  2293. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2294. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  2295. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2296. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  2297. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2298. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  2299. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2300. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  2301. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2302. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  2303. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2304. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  2305. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2306. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  2307. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2308. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  2309. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2310. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  2311. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2312. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  2313. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2314. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  2315. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2316. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
  2317. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2318. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
  2319. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2320. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
  2321. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2322. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  2323. wsa_cdc_dma_rx_0_sample_rate,
  2324. cdc_dma_rx_sample_rate_get,
  2325. cdc_dma_rx_sample_rate_put),
  2326. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  2327. wsa_cdc_dma_rx_1_sample_rate,
  2328. cdc_dma_rx_sample_rate_get,
  2329. cdc_dma_rx_sample_rate_put),
  2330. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  2331. rx_cdc_dma_rx_0_sample_rate,
  2332. cdc_dma_rx_sample_rate_get,
  2333. cdc_dma_rx_sample_rate_put),
  2334. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  2335. rx_cdc_dma_rx_1_sample_rate,
  2336. cdc_dma_rx_sample_rate_get,
  2337. cdc_dma_rx_sample_rate_put),
  2338. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  2339. rx_cdc_dma_rx_2_sample_rate,
  2340. cdc_dma_rx_sample_rate_get,
  2341. cdc_dma_rx_sample_rate_put),
  2342. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  2343. rx_cdc_dma_rx_3_sample_rate,
  2344. cdc_dma_rx_sample_rate_get,
  2345. cdc_dma_rx_sample_rate_put),
  2346. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  2347. rx_cdc_dma_rx_5_sample_rate,
  2348. cdc_dma_rx_sample_rate_get,
  2349. cdc_dma_rx_sample_rate_put),
  2350. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  2351. wsa_cdc_dma_tx_0_sample_rate,
  2352. cdc_dma_tx_sample_rate_get,
  2353. cdc_dma_tx_sample_rate_put),
  2354. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  2355. wsa_cdc_dma_tx_1_sample_rate,
  2356. cdc_dma_tx_sample_rate_get,
  2357. cdc_dma_tx_sample_rate_put),
  2358. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  2359. wsa_cdc_dma_tx_2_sample_rate,
  2360. cdc_dma_tx_sample_rate_get,
  2361. cdc_dma_tx_sample_rate_put),
  2362. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  2363. tx_cdc_dma_tx_0_sample_rate,
  2364. cdc_dma_tx_sample_rate_get,
  2365. cdc_dma_tx_sample_rate_put),
  2366. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  2367. tx_cdc_dma_tx_3_sample_rate,
  2368. cdc_dma_tx_sample_rate_get,
  2369. cdc_dma_tx_sample_rate_put),
  2370. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  2371. tx_cdc_dma_tx_4_sample_rate,
  2372. cdc_dma_tx_sample_rate_get,
  2373. cdc_dma_tx_sample_rate_put),
  2374. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
  2375. va_cdc_dma_tx_0_sample_rate,
  2376. cdc_dma_tx_sample_rate_get,
  2377. cdc_dma_tx_sample_rate_put),
  2378. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
  2379. va_cdc_dma_tx_1_sample_rate,
  2380. cdc_dma_tx_sample_rate_get,
  2381. cdc_dma_tx_sample_rate_put),
  2382. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
  2383. va_cdc_dma_tx_2_sample_rate,
  2384. cdc_dma_tx_sample_rate_get,
  2385. cdc_dma_tx_sample_rate_put),
  2386. };
  2387. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  2388. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  2389. usb_audio_rx_sample_rate_get,
  2390. usb_audio_rx_sample_rate_put),
  2391. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  2392. usb_audio_tx_sample_rate_get,
  2393. usb_audio_tx_sample_rate_put),
  2394. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2395. tdm_rx_sample_rate_get,
  2396. tdm_rx_sample_rate_put),
  2397. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2398. tdm_rx_sample_rate_get,
  2399. tdm_rx_sample_rate_put),
  2400. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2401. tdm_rx_sample_rate_get,
  2402. tdm_rx_sample_rate_put),
  2403. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2404. tdm_tx_sample_rate_get,
  2405. tdm_tx_sample_rate_put),
  2406. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2407. tdm_tx_sample_rate_get,
  2408. tdm_tx_sample_rate_put),
  2409. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2410. tdm_tx_sample_rate_get,
  2411. tdm_tx_sample_rate_put),
  2412. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2413. aux_pcm_rx_sample_rate_get,
  2414. aux_pcm_rx_sample_rate_put),
  2415. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  2416. aux_pcm_rx_sample_rate_get,
  2417. aux_pcm_rx_sample_rate_put),
  2418. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  2419. aux_pcm_rx_sample_rate_get,
  2420. aux_pcm_rx_sample_rate_put),
  2421. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2422. aux_pcm_tx_sample_rate_get,
  2423. aux_pcm_tx_sample_rate_put),
  2424. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  2425. aux_pcm_tx_sample_rate_get,
  2426. aux_pcm_tx_sample_rate_put),
  2427. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  2428. aux_pcm_tx_sample_rate_get,
  2429. aux_pcm_tx_sample_rate_put),
  2430. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  2431. mi2s_rx_sample_rate_get,
  2432. mi2s_rx_sample_rate_put),
  2433. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  2434. mi2s_rx_sample_rate_get,
  2435. mi2s_rx_sample_rate_put),
  2436. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  2437. mi2s_rx_sample_rate_get,
  2438. mi2s_rx_sample_rate_put),
  2439. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  2440. mi2s_tx_sample_rate_get,
  2441. mi2s_tx_sample_rate_put),
  2442. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  2443. mi2s_tx_sample_rate_get,
  2444. mi2s_tx_sample_rate_put),
  2445. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  2446. mi2s_tx_sample_rate_get,
  2447. mi2s_tx_sample_rate_put),
  2448. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  2449. usb_audio_rx_format_get, usb_audio_rx_format_put),
  2450. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  2451. usb_audio_tx_format_get, usb_audio_tx_format_put),
  2452. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  2453. tdm_rx_format_get,
  2454. tdm_rx_format_put),
  2455. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  2456. tdm_rx_format_get,
  2457. tdm_rx_format_put),
  2458. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  2459. tdm_rx_format_get,
  2460. tdm_rx_format_put),
  2461. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  2462. tdm_tx_format_get,
  2463. tdm_tx_format_put),
  2464. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  2465. tdm_tx_format_get,
  2466. tdm_tx_format_put),
  2467. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  2468. tdm_tx_format_get,
  2469. tdm_tx_format_put),
  2470. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2471. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2472. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  2473. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2474. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  2475. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2476. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2477. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2478. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  2479. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2480. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  2481. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2482. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  2483. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2484. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  2485. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2486. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  2487. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2488. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  2489. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2490. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  2491. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2492. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  2493. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2494. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  2495. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  2496. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  2497. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  2498. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  2499. proxy_rx_ch_get, proxy_rx_ch_put),
  2500. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  2501. tdm_rx_ch_get,
  2502. tdm_rx_ch_put),
  2503. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  2504. tdm_rx_ch_get,
  2505. tdm_rx_ch_put),
  2506. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  2507. tdm_rx_ch_get,
  2508. tdm_rx_ch_put),
  2509. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  2510. tdm_tx_ch_get,
  2511. tdm_tx_ch_put),
  2512. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  2513. tdm_tx_ch_get,
  2514. tdm_tx_ch_put),
  2515. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  2516. tdm_tx_ch_get,
  2517. tdm_tx_ch_put),
  2518. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  2519. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2520. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  2521. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2522. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  2523. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2524. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  2525. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2526. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  2527. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2528. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  2529. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2530. };
  2531. static const struct snd_kcontrol_new msm_snd_controls[] = {
  2532. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2533. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2534. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2535. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2536. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2537. aux_pcm_rx_sample_rate_get,
  2538. aux_pcm_rx_sample_rate_put),
  2539. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2540. aux_pcm_tx_sample_rate_get,
  2541. aux_pcm_tx_sample_rate_put),
  2542. };
  2543. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  2544. struct snd_pcm_hw_params *params)
  2545. {
  2546. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  2547. struct snd_interval *rate = hw_param_interval(params,
  2548. SNDRV_PCM_HW_PARAM_RATE);
  2549. struct snd_interval *channels = hw_param_interval(params,
  2550. SNDRV_PCM_HW_PARAM_CHANNELS);
  2551. int idx, rc = 0;
  2552. pr_debug("%s: format = %d, rate = %d\n",
  2553. __func__, params_format(params), params_rate(params));
  2554. switch (dai_link->id) {
  2555. case MSM_BACKEND_DAI_USB_RX:
  2556. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2557. usb_rx_cfg.bit_format);
  2558. rate->min = rate->max = usb_rx_cfg.sample_rate;
  2559. channels->min = channels->max = usb_rx_cfg.channels;
  2560. break;
  2561. case MSM_BACKEND_DAI_USB_TX:
  2562. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2563. usb_tx_cfg.bit_format);
  2564. rate->min = rate->max = usb_tx_cfg.sample_rate;
  2565. channels->min = channels->max = usb_tx_cfg.channels;
  2566. break;
  2567. case MSM_BACKEND_DAI_AFE_PCM_RX:
  2568. channels->min = channels->max = proxy_rx_cfg.channels;
  2569. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  2570. break;
  2571. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  2572. channels->min = channels->max =
  2573. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  2574. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2575. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  2576. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  2577. break;
  2578. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  2579. channels->min = channels->max =
  2580. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  2581. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2582. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  2583. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  2584. break;
  2585. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  2586. channels->min = channels->max =
  2587. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  2588. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2589. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  2590. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  2591. break;
  2592. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  2593. channels->min = channels->max =
  2594. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  2595. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2596. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  2597. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  2598. break;
  2599. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  2600. channels->min = channels->max =
  2601. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  2602. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2603. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  2604. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  2605. break;
  2606. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  2607. channels->min = channels->max =
  2608. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  2609. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2610. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  2611. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  2612. break;
  2613. case MSM_BACKEND_DAI_AUXPCM_RX:
  2614. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2615. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  2616. rate->min = rate->max =
  2617. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  2618. channels->min = channels->max =
  2619. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  2620. break;
  2621. case MSM_BACKEND_DAI_AUXPCM_TX:
  2622. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2623. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  2624. rate->min = rate->max =
  2625. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  2626. channels->min = channels->max =
  2627. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  2628. break;
  2629. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  2630. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2631. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  2632. rate->min = rate->max =
  2633. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  2634. channels->min = channels->max =
  2635. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  2636. break;
  2637. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  2638. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2639. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  2640. rate->min = rate->max =
  2641. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  2642. channels->min = channels->max =
  2643. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  2644. break;
  2645. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  2646. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2647. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  2648. rate->min = rate->max =
  2649. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  2650. channels->min = channels->max =
  2651. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  2652. break;
  2653. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  2654. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2655. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  2656. rate->min = rate->max =
  2657. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  2658. channels->min = channels->max =
  2659. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  2660. break;
  2661. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  2662. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2663. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  2664. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  2665. channels->min = channels->max =
  2666. mi2s_rx_cfg[PRIM_MI2S].channels;
  2667. break;
  2668. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  2669. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2670. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  2671. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  2672. channels->min = channels->max =
  2673. mi2s_tx_cfg[PRIM_MI2S].channels;
  2674. break;
  2675. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  2676. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2677. mi2s_rx_cfg[SEC_MI2S].bit_format);
  2678. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  2679. channels->min = channels->max =
  2680. mi2s_rx_cfg[SEC_MI2S].channels;
  2681. break;
  2682. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  2683. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2684. mi2s_tx_cfg[SEC_MI2S].bit_format);
  2685. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  2686. channels->min = channels->max =
  2687. mi2s_tx_cfg[SEC_MI2S].channels;
  2688. break;
  2689. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  2690. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2691. mi2s_rx_cfg[TERT_MI2S].bit_format);
  2692. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  2693. channels->min = channels->max =
  2694. mi2s_rx_cfg[TERT_MI2S].channels;
  2695. break;
  2696. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  2697. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2698. mi2s_tx_cfg[TERT_MI2S].bit_format);
  2699. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  2700. channels->min = channels->max =
  2701. mi2s_tx_cfg[TERT_MI2S].channels;
  2702. break;
  2703. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  2704. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  2705. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  2706. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  2707. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2708. cdc_dma_tx_cfg[idx].bit_format);
  2709. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  2710. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  2711. break;
  2712. default:
  2713. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  2714. break;
  2715. }
  2716. return rc;
  2717. }
  2718. static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  2719. struct snd_pcm_hw_params *params)
  2720. {
  2721. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  2722. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  2723. int ret = 0;
  2724. int slot_width = 32;
  2725. int channels, slots;
  2726. unsigned int slot_mask, rate, clk_freq;
  2727. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  2728. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  2729. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  2730. switch (cpu_dai->id) {
  2731. case AFE_PORT_ID_PRIMARY_TDM_RX:
  2732. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  2733. break;
  2734. case AFE_PORT_ID_SECONDARY_TDM_RX:
  2735. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  2736. break;
  2737. case AFE_PORT_ID_TERTIARY_TDM_RX:
  2738. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  2739. break;
  2740. case AFE_PORT_ID_PRIMARY_TDM_TX:
  2741. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  2742. break;
  2743. case AFE_PORT_ID_SECONDARY_TDM_TX:
  2744. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  2745. break;
  2746. case AFE_PORT_ID_TERTIARY_TDM_TX:
  2747. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  2748. break;
  2749. default:
  2750. pr_err("%s: dai id 0x%x not supported\n",
  2751. __func__, cpu_dai->id);
  2752. return -EINVAL;
  2753. }
  2754. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  2755. /*2 slot config - bits 0 and 1 set for the first two slots */
  2756. slot_mask = 0x0000FFFF >> (16 - slots);
  2757. channels = slots;
  2758. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  2759. __func__, slot_width, slots);
  2760. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  2761. slots, slot_width);
  2762. if (ret < 0) {
  2763. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  2764. __func__, ret);
  2765. goto end;
  2766. }
  2767. ret = snd_soc_dai_set_channel_map(cpu_dai,
  2768. 0, NULL, channels, slot_offset);
  2769. if (ret < 0) {
  2770. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  2771. __func__, ret);
  2772. goto end;
  2773. }
  2774. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  2775. /*2 slot config - bits 0 and 1 set for the first two slots */
  2776. slot_mask = 0x0000FFFF >> (16 - slots);
  2777. channels = slots;
  2778. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  2779. __func__, slot_width, slots);
  2780. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  2781. slots, slot_width);
  2782. if (ret < 0) {
  2783. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  2784. __func__, ret);
  2785. goto end;
  2786. }
  2787. ret = snd_soc_dai_set_channel_map(cpu_dai,
  2788. channels, slot_offset, 0, NULL);
  2789. if (ret < 0) {
  2790. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  2791. __func__, ret);
  2792. goto end;
  2793. }
  2794. } else {
  2795. ret = -EINVAL;
  2796. pr_err("%s: invalid use case, err:%d\n",
  2797. __func__, ret);
  2798. goto end;
  2799. }
  2800. rate = params_rate(params);
  2801. clk_freq = rate * slot_width * slots;
  2802. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  2803. if (ret < 0)
  2804. pr_err("%s: failed to set tdm clk, err:%d\n",
  2805. __func__, ret);
  2806. end:
  2807. return ret;
  2808. }
  2809. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  2810. struct snd_pcm_hw_params *params)
  2811. {
  2812. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  2813. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  2814. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  2815. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  2816. int ret = 0;
  2817. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  2818. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  2819. u32 user_set_tx_ch = 0;
  2820. u32 user_set_rx_ch = 0;
  2821. u32 ch_id;
  2822. ret = snd_soc_dai_get_channel_map(codec_dai,
  2823. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  2824. &rx_ch_cdc_dma);
  2825. if (ret < 0) {
  2826. pr_err("%s: failed to get codec chan map, err:%d\n",
  2827. __func__, ret);
  2828. goto err;
  2829. }
  2830. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  2831. switch (dai_link->id) {
  2832. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  2833. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  2834. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  2835. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  2836. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  2837. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  2838. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  2839. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  2840. {
  2841. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  2842. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  2843. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  2844. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  2845. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  2846. user_set_rx_ch, &rx_ch_cdc_dma);
  2847. if (ret < 0) {
  2848. pr_err("%s: failed to set cpu chan map, err:%d\n",
  2849. __func__, ret);
  2850. goto err;
  2851. }
  2852. }
  2853. break;
  2854. }
  2855. } else {
  2856. switch (dai_link->id) {
  2857. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  2858. {
  2859. user_set_tx_ch = msm_vi_feed_tx_ch;
  2860. }
  2861. break;
  2862. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  2863. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  2864. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  2865. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  2866. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  2867. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  2868. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  2869. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  2870. {
  2871. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  2872. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  2873. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  2874. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  2875. }
  2876. break;
  2877. }
  2878. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  2879. &tx_ch_cdc_dma, 0, 0);
  2880. if (ret < 0) {
  2881. pr_err("%s: failed to set cpu chan map, err:%d\n",
  2882. __func__, ret);
  2883. goto err;
  2884. }
  2885. }
  2886. err:
  2887. return ret;
  2888. }
  2889. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  2890. {
  2891. cpumask_t mask;
  2892. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  2893. pm_qos_remove_request(&substream->latency_pm_qos_req);
  2894. cpumask_clear(&mask);
  2895. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  2896. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  2897. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  2898. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  2899. pm_qos_add_request(&substream->latency_pm_qos_req,
  2900. PM_QOS_CPU_DMA_LATENCY,
  2901. MSM_LL_QOS_VALUE);
  2902. return 0;
  2903. }
  2904. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  2905. {
  2906. int ret = 0;
  2907. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  2908. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  2909. int index = cpu_dai->id;
  2910. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  2911. dev_dbg(rtd->card->dev,
  2912. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  2913. __func__, substream->name, substream->stream,
  2914. cpu_dai->name, cpu_dai->id);
  2915. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  2916. ret = -EINVAL;
  2917. dev_err(rtd->card->dev,
  2918. "%s: CPU DAI id (%d) out of range\n",
  2919. __func__, cpu_dai->id);
  2920. goto err;
  2921. }
  2922. /*
  2923. * Mutex protection in case the same MI2S
  2924. * interface using for both TX and RX so
  2925. * that the same clock won't be enable twice.
  2926. */
  2927. mutex_lock(&mi2s_intf_conf[index].lock);
  2928. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  2929. /* Check if msm needs to provide the clock to the interface */
  2930. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  2931. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  2932. fmt = SND_SOC_DAIFMT_CBM_CFM;
  2933. }
  2934. ret = msm_mi2s_set_sclk(substream, true);
  2935. if (ret < 0) {
  2936. dev_err(rtd->card->dev,
  2937. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  2938. __func__, ret);
  2939. goto clean_up;
  2940. }
  2941. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  2942. if (ret < 0) {
  2943. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  2944. __func__, index, ret);
  2945. goto clk_off;
  2946. }
  2947. }
  2948. clk_off:
  2949. if (ret < 0)
  2950. msm_mi2s_set_sclk(substream, false);
  2951. clean_up:
  2952. if (ret < 0)
  2953. mi2s_intf_conf[index].ref_cnt--;
  2954. mutex_unlock(&mi2s_intf_conf[index].lock);
  2955. err:
  2956. return ret;
  2957. }
  2958. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  2959. {
  2960. int ret = 0;
  2961. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  2962. int index = rtd->cpu_dai->id;
  2963. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  2964. substream->name, substream->stream);
  2965. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  2966. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  2967. return;
  2968. }
  2969. mutex_lock(&mi2s_intf_conf[index].lock);
  2970. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  2971. ret = msm_mi2s_set_sclk(substream, false);
  2972. if (ret < 0)
  2973. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  2974. __func__, index, ret);
  2975. }
  2976. mutex_unlock(&mi2s_intf_conf[index].lock);
  2977. }
  2978. static struct snd_soc_ops kona_tdm_be_ops = {
  2979. .hw_params = kona_tdm_snd_hw_params,
  2980. };
  2981. static struct snd_soc_ops msm_mi2s_be_ops = {
  2982. .startup = msm_mi2s_snd_startup,
  2983. .shutdown = msm_mi2s_snd_shutdown,
  2984. };
  2985. static struct snd_soc_ops msm_fe_qos_ops = {
  2986. .prepare = msm_fe_qos_prepare,
  2987. };
  2988. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  2989. .hw_params = msm_snd_cdc_dma_hw_params,
  2990. };
  2991. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  2992. struct snd_kcontrol *kcontrol, int event)
  2993. {
  2994. struct msm_asoc_mach_data *pdata = NULL;
  2995. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  2996. int ret = 0;
  2997. u32 dmic_idx;
  2998. int *dmic_gpio_cnt;
  2999. struct device_node *dmic_gpio;
  3000. char *wname;
  3001. wname = strpbrk(w->name, "012345");
  3002. if (!wname) {
  3003. dev_err(component->dev, "%s: widget not found\n", __func__);
  3004. return -EINVAL;
  3005. }
  3006. ret = kstrtouint(wname, 10, &dmic_idx);
  3007. if (ret < 0) {
  3008. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  3009. __func__);
  3010. return -EINVAL;
  3011. }
  3012. pdata = snd_soc_card_get_drvdata(component->card);
  3013. switch (dmic_idx) {
  3014. case 0:
  3015. case 1:
  3016. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3017. dmic_gpio = pdata->dmic01_gpio_p;
  3018. break;
  3019. case 2:
  3020. case 3:
  3021. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3022. dmic_gpio = pdata->dmic23_gpio_p;
  3023. break;
  3024. case 4:
  3025. case 5:
  3026. dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
  3027. dmic_gpio = pdata->dmic45_gpio_p;
  3028. break;
  3029. default:
  3030. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  3031. __func__);
  3032. return -EINVAL;
  3033. }
  3034. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3035. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3036. switch (event) {
  3037. case SND_SOC_DAPM_PRE_PMU:
  3038. (*dmic_gpio_cnt)++;
  3039. if (*dmic_gpio_cnt == 1) {
  3040. ret = msm_cdc_pinctrl_select_active_state(
  3041. dmic_gpio);
  3042. if (ret < 0) {
  3043. pr_err("%s: gpio set cannot be activated %sd",
  3044. __func__, "dmic_gpio");
  3045. return ret;
  3046. }
  3047. }
  3048. break;
  3049. case SND_SOC_DAPM_POST_PMD:
  3050. (*dmic_gpio_cnt)--;
  3051. if (*dmic_gpio_cnt == 0) {
  3052. ret = msm_cdc_pinctrl_select_sleep_state(
  3053. dmic_gpio);
  3054. if (ret < 0) {
  3055. pr_err("%s: gpio set cannot be de-activated %sd",
  3056. __func__, "dmic_gpio");
  3057. return ret;
  3058. }
  3059. }
  3060. break;
  3061. default:
  3062. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3063. return -EINVAL;
  3064. }
  3065. return 0;
  3066. }
  3067. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3068. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3069. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3070. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3071. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3072. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3073. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3074. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3075. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3076. SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
  3077. SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
  3078. };
  3079. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  3080. {
  3081. int ret = -EINVAL;
  3082. struct snd_soc_component *component;
  3083. struct snd_soc_dapm_context *dapm;
  3084. struct snd_card *card;
  3085. struct snd_info_entry *entry;
  3086. struct snd_soc_component *aux_comp;
  3087. struct msm_asoc_mach_data *pdata =
  3088. snd_soc_card_get_drvdata(rtd->card);
  3089. component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
  3090. if (!component) {
  3091. pr_err("%s: could not find component for bolero_codec\n",
  3092. __func__);
  3093. return ret;
  3094. }
  3095. dapm = snd_soc_component_get_dapm(component);
  3096. ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
  3097. ARRAY_SIZE(msm_int_snd_controls));
  3098. if (ret < 0) {
  3099. pr_err("%s: add_component_controls failed: %d\n",
  3100. __func__, ret);
  3101. return ret;
  3102. }
  3103. ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
  3104. ARRAY_SIZE(msm_common_snd_controls));
  3105. if (ret < 0) {
  3106. pr_err("%s: add common snd controls failed: %d\n",
  3107. __func__, ret);
  3108. return ret;
  3109. }
  3110. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  3111. ARRAY_SIZE(msm_int_dapm_widgets));
  3112. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  3113. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  3114. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  3115. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  3116. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  3117. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  3118. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  3119. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  3120. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  3121. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  3122. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  3123. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  3124. snd_soc_dapm_sync(dapm);
  3125. /*
  3126. * Send speaker configuration only for WSA8810.
  3127. * Default configuration is for WSA8815.
  3128. */
  3129. dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
  3130. __func__, rtd->card->num_aux_devs);
  3131. if (rtd->card->num_aux_devs &&
  3132. !list_empty(&rtd->card->component_dev_list)) {
  3133. aux_comp = list_first_entry(
  3134. &rtd->card->component_dev_list,
  3135. struct snd_soc_component,
  3136. card_aux_list);
  3137. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  3138. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  3139. wsa_macro_set_spkr_mode(component,
  3140. WSA_MACRO_SPKR_MODE_1);
  3141. wsa_macro_set_spkr_gain_offset(component,
  3142. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  3143. }
  3144. bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
  3145. sm_port_map);
  3146. }
  3147. card = rtd->card->snd_card;
  3148. if (!pdata->codec_root) {
  3149. entry = snd_info_create_subdir(card->module, "codecs",
  3150. card->proc_root);
  3151. if (!entry) {
  3152. pr_debug("%s: Cannot create codecs module entry\n",
  3153. __func__);
  3154. ret = 0;
  3155. goto err;
  3156. }
  3157. pdata->codec_root = entry;
  3158. }
  3159. bolero_info_create_codec_entry(pdata->codec_root, component);
  3160. codec_reg_done = true;
  3161. return 0;
  3162. err:
  3163. return ret;
  3164. }
  3165. /* Digital audio interface glue - connects codec <---> CPU */
  3166. static struct snd_soc_dai_link msm_common_dai_links[] = {
  3167. /* FrontEnd DAI Links */
  3168. {/* hw:x,0 */
  3169. .name = MSM_DAILINK_NAME(Media1),
  3170. .stream_name = "MultiMedia1",
  3171. .cpu_dai_name = "MultiMedia1",
  3172. .platform_name = "msm-pcm-dsp.0",
  3173. .dynamic = 1,
  3174. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3175. .dpcm_playback = 1,
  3176. .dpcm_capture = 1,
  3177. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3178. SND_SOC_DPCM_TRIGGER_POST},
  3179. .codec_dai_name = "snd-soc-dummy-dai",
  3180. .codec_name = "snd-soc-dummy",
  3181. .ignore_suspend = 1,
  3182. /* this dainlink has playback support */
  3183. .ignore_pmdown_time = 1,
  3184. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  3185. },
  3186. {/* hw:x,1 */
  3187. .name = MSM_DAILINK_NAME(Media2),
  3188. .stream_name = "MultiMedia2",
  3189. .cpu_dai_name = "MultiMedia2",
  3190. .platform_name = "msm-pcm-dsp.0",
  3191. .dynamic = 1,
  3192. .dpcm_playback = 1,
  3193. .dpcm_capture = 1,
  3194. .codec_dai_name = "snd-soc-dummy-dai",
  3195. .codec_name = "snd-soc-dummy",
  3196. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3197. SND_SOC_DPCM_TRIGGER_POST},
  3198. .ignore_suspend = 1,
  3199. /* this dainlink has playback support */
  3200. .ignore_pmdown_time = 1,
  3201. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  3202. },
  3203. {/* hw:x,2 */
  3204. .name = "VoiceMMode1",
  3205. .stream_name = "VoiceMMode1",
  3206. .cpu_dai_name = "VoiceMMode1",
  3207. .platform_name = "msm-pcm-voice",
  3208. .dynamic = 1,
  3209. .dpcm_playback = 1,
  3210. .dpcm_capture = 1,
  3211. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3212. SND_SOC_DPCM_TRIGGER_POST},
  3213. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3214. .ignore_suspend = 1,
  3215. .ignore_pmdown_time = 1,
  3216. .codec_dai_name = "snd-soc-dummy-dai",
  3217. .codec_name = "snd-soc-dummy",
  3218. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  3219. },
  3220. {/* hw:x,3 */
  3221. .name = "MSM VoIP",
  3222. .stream_name = "VoIP",
  3223. .cpu_dai_name = "VoIP",
  3224. .platform_name = "msm-voip-dsp",
  3225. .dynamic = 1,
  3226. .dpcm_playback = 1,
  3227. .dpcm_capture = 1,
  3228. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3229. SND_SOC_DPCM_TRIGGER_POST},
  3230. .codec_dai_name = "snd-soc-dummy-dai",
  3231. .codec_name = "snd-soc-dummy",
  3232. .ignore_suspend = 1,
  3233. /* this dainlink has playback support */
  3234. .ignore_pmdown_time = 1,
  3235. .id = MSM_FRONTEND_DAI_VOIP,
  3236. },
  3237. {/* hw:x,4 */
  3238. .name = MSM_DAILINK_NAME(ULL),
  3239. .stream_name = "MultiMedia3",
  3240. .cpu_dai_name = "MultiMedia3",
  3241. .platform_name = "msm-pcm-dsp.2",
  3242. .dynamic = 1,
  3243. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3244. .dpcm_playback = 1,
  3245. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3246. SND_SOC_DPCM_TRIGGER_POST},
  3247. .codec_dai_name = "snd-soc-dummy-dai",
  3248. .codec_name = "snd-soc-dummy",
  3249. .ignore_suspend = 1,
  3250. /* this dainlink has playback support */
  3251. .ignore_pmdown_time = 1,
  3252. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  3253. },
  3254. /* Hostless PCM purpose */
  3255. {/* hw:x,5 */
  3256. .name = "MSM AFE-PCM RX",
  3257. .stream_name = "AFE-PROXY RX",
  3258. .cpu_dai_name = "msm-dai-q6-dev.241",
  3259. .codec_name = "msm-stub-codec.1",
  3260. .codec_dai_name = "msm-stub-rx",
  3261. .platform_name = "msm-pcm-afe",
  3262. .dpcm_playback = 1,
  3263. .ignore_suspend = 1,
  3264. /* this dainlink has playback support */
  3265. .ignore_pmdown_time = 1,
  3266. },
  3267. {/* hw:x,6 */
  3268. .name = "MSM AFE-PCM TX",
  3269. .stream_name = "AFE-PROXY TX",
  3270. .cpu_dai_name = "msm-dai-q6-dev.240",
  3271. .codec_name = "msm-stub-codec.1",
  3272. .codec_dai_name = "msm-stub-tx",
  3273. .platform_name = "msm-pcm-afe",
  3274. .dpcm_capture = 1,
  3275. .ignore_suspend = 1,
  3276. },
  3277. {/* hw:x,7 */
  3278. .name = MSM_DAILINK_NAME(Compress1),
  3279. .stream_name = "Compress1",
  3280. .cpu_dai_name = "MultiMedia4",
  3281. .platform_name = "msm-compress-dsp",
  3282. .dynamic = 1,
  3283. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  3284. .dpcm_playback = 1,
  3285. .dpcm_capture = 1,
  3286. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3287. SND_SOC_DPCM_TRIGGER_POST},
  3288. .codec_dai_name = "snd-soc-dummy-dai",
  3289. .codec_name = "snd-soc-dummy",
  3290. .ignore_suspend = 1,
  3291. .ignore_pmdown_time = 1,
  3292. /* this dainlink has playback support */
  3293. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  3294. },
  3295. {/* hw:x,8 */
  3296. .name = "AUXPCM Hostless",
  3297. .stream_name = "AUXPCM Hostless",
  3298. .cpu_dai_name = "AUXPCM_HOSTLESS",
  3299. .platform_name = "msm-pcm-hostless",
  3300. .dynamic = 1,
  3301. .dpcm_playback = 1,
  3302. .dpcm_capture = 1,
  3303. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3304. SND_SOC_DPCM_TRIGGER_POST},
  3305. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3306. .ignore_suspend = 1,
  3307. /* this dainlink has playback support */
  3308. .ignore_pmdown_time = 1,
  3309. .codec_dai_name = "snd-soc-dummy-dai",
  3310. .codec_name = "snd-soc-dummy",
  3311. },
  3312. {/* hw:x,9 */
  3313. .name = MSM_DAILINK_NAME(LowLatency),
  3314. .stream_name = "MultiMedia5",
  3315. .cpu_dai_name = "MultiMedia5",
  3316. .platform_name = "msm-pcm-dsp.1",
  3317. .dynamic = 1,
  3318. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3319. .dpcm_playback = 1,
  3320. .dpcm_capture = 1,
  3321. .codec_dai_name = "snd-soc-dummy-dai",
  3322. .codec_name = "snd-soc-dummy",
  3323. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3324. SND_SOC_DPCM_TRIGGER_POST},
  3325. .ignore_suspend = 1,
  3326. /* this dainlink has playback support */
  3327. .ignore_pmdown_time = 1,
  3328. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  3329. .ops = &msm_fe_qos_ops,
  3330. },
  3331. {/* hw:x,10 */
  3332. .name = "Listen 1 Audio Service",
  3333. .stream_name = "Listen 1 Audio Service",
  3334. .cpu_dai_name = "LSM1",
  3335. .platform_name = "msm-lsm-client",
  3336. .dynamic = 1,
  3337. .dpcm_capture = 1,
  3338. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3339. SND_SOC_DPCM_TRIGGER_POST },
  3340. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3341. .ignore_suspend = 1,
  3342. .codec_dai_name = "snd-soc-dummy-dai",
  3343. .codec_name = "snd-soc-dummy",
  3344. .id = MSM_FRONTEND_DAI_LSM1,
  3345. },
  3346. /* Multiple Tunnel instances */
  3347. {/* hw:x,11 */
  3348. .name = MSM_DAILINK_NAME(Compress2),
  3349. .stream_name = "Compress2",
  3350. .cpu_dai_name = "MultiMedia7",
  3351. .platform_name = "msm-compress-dsp",
  3352. .dynamic = 1,
  3353. .dpcm_playback = 1,
  3354. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3355. SND_SOC_DPCM_TRIGGER_POST},
  3356. .codec_dai_name = "snd-soc-dummy-dai",
  3357. .codec_name = "snd-soc-dummy",
  3358. .ignore_suspend = 1,
  3359. .ignore_pmdown_time = 1,
  3360. /* this dainlink has playback support */
  3361. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  3362. },
  3363. {/* hw:x,12 */
  3364. .name = MSM_DAILINK_NAME(MultiMedia10),
  3365. .stream_name = "MultiMedia10",
  3366. .cpu_dai_name = "MultiMedia10",
  3367. .platform_name = "msm-pcm-dsp.1",
  3368. .dynamic = 1,
  3369. .dpcm_playback = 1,
  3370. .dpcm_capture = 1,
  3371. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3372. SND_SOC_DPCM_TRIGGER_POST},
  3373. .codec_dai_name = "snd-soc-dummy-dai",
  3374. .codec_name = "snd-soc-dummy",
  3375. .ignore_suspend = 1,
  3376. .ignore_pmdown_time = 1,
  3377. /* this dainlink has playback support */
  3378. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  3379. },
  3380. {/* hw:x,13 */
  3381. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  3382. .stream_name = "MM_NOIRQ",
  3383. .cpu_dai_name = "MultiMedia8",
  3384. .platform_name = "msm-pcm-dsp-noirq",
  3385. .dynamic = 1,
  3386. .dpcm_playback = 1,
  3387. .dpcm_capture = 1,
  3388. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3389. SND_SOC_DPCM_TRIGGER_POST},
  3390. .codec_dai_name = "snd-soc-dummy-dai",
  3391. .codec_name = "snd-soc-dummy",
  3392. .ignore_suspend = 1,
  3393. .ignore_pmdown_time = 1,
  3394. /* this dainlink has playback support */
  3395. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  3396. .ops = &msm_fe_qos_ops,
  3397. },
  3398. /* HDMI Hostless */
  3399. {/* hw:x,14 */
  3400. .name = "HDMI_RX_HOSTLESS",
  3401. .stream_name = "HDMI_RX_HOSTLESS",
  3402. .cpu_dai_name = "HDMI_HOSTLESS",
  3403. .platform_name = "msm-pcm-hostless",
  3404. .dynamic = 1,
  3405. .dpcm_playback = 1,
  3406. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3407. SND_SOC_DPCM_TRIGGER_POST},
  3408. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3409. .ignore_suspend = 1,
  3410. .ignore_pmdown_time = 1,
  3411. .codec_dai_name = "snd-soc-dummy-dai",
  3412. .codec_name = "snd-soc-dummy",
  3413. },
  3414. {/* hw:x,15 */
  3415. .name = "VoiceMMode2",
  3416. .stream_name = "VoiceMMode2",
  3417. .cpu_dai_name = "VoiceMMode2",
  3418. .platform_name = "msm-pcm-voice",
  3419. .dynamic = 1,
  3420. .dpcm_playback = 1,
  3421. .dpcm_capture = 1,
  3422. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3423. SND_SOC_DPCM_TRIGGER_POST},
  3424. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3425. .ignore_suspend = 1,
  3426. .ignore_pmdown_time = 1,
  3427. .codec_dai_name = "snd-soc-dummy-dai",
  3428. .codec_name = "snd-soc-dummy",
  3429. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  3430. },
  3431. /* LSM FE */
  3432. {/* hw:x,16 */
  3433. .name = "Listen 2 Audio Service",
  3434. .stream_name = "Listen 2 Audio Service",
  3435. .cpu_dai_name = "LSM2",
  3436. .platform_name = "msm-lsm-client",
  3437. .dynamic = 1,
  3438. .dpcm_capture = 1,
  3439. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3440. SND_SOC_DPCM_TRIGGER_POST },
  3441. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3442. .ignore_suspend = 1,
  3443. .codec_dai_name = "snd-soc-dummy-dai",
  3444. .codec_name = "snd-soc-dummy",
  3445. .id = MSM_FRONTEND_DAI_LSM2,
  3446. },
  3447. {/* hw:x,17 */
  3448. .name = "Listen 3 Audio Service",
  3449. .stream_name = "Listen 3 Audio Service",
  3450. .cpu_dai_name = "LSM3",
  3451. .platform_name = "msm-lsm-client",
  3452. .dynamic = 1,
  3453. .dpcm_capture = 1,
  3454. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3455. SND_SOC_DPCM_TRIGGER_POST },
  3456. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3457. .ignore_suspend = 1,
  3458. .codec_dai_name = "snd-soc-dummy-dai",
  3459. .codec_name = "snd-soc-dummy",
  3460. .id = MSM_FRONTEND_DAI_LSM3,
  3461. },
  3462. {/* hw:x,18 */
  3463. .name = "Listen 4 Audio Service",
  3464. .stream_name = "Listen 4 Audio Service",
  3465. .cpu_dai_name = "LSM4",
  3466. .platform_name = "msm-lsm-client",
  3467. .dynamic = 1,
  3468. .dpcm_capture = 1,
  3469. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3470. SND_SOC_DPCM_TRIGGER_POST },
  3471. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3472. .ignore_suspend = 1,
  3473. .codec_dai_name = "snd-soc-dummy-dai",
  3474. .codec_name = "snd-soc-dummy",
  3475. .id = MSM_FRONTEND_DAI_LSM4,
  3476. },
  3477. {/* hw:x,19 */
  3478. .name = "Listen 5 Audio Service",
  3479. .stream_name = "Listen 5 Audio Service",
  3480. .cpu_dai_name = "LSM5",
  3481. .platform_name = "msm-lsm-client",
  3482. .dynamic = 1,
  3483. .dpcm_capture = 1,
  3484. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3485. SND_SOC_DPCM_TRIGGER_POST },
  3486. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3487. .ignore_suspend = 1,
  3488. .codec_dai_name = "snd-soc-dummy-dai",
  3489. .codec_name = "snd-soc-dummy",
  3490. .id = MSM_FRONTEND_DAI_LSM5,
  3491. },
  3492. {/* hw:x,20 */
  3493. .name = "Listen 6 Audio Service",
  3494. .stream_name = "Listen 6 Audio Service",
  3495. .cpu_dai_name = "LSM6",
  3496. .platform_name = "msm-lsm-client",
  3497. .dynamic = 1,
  3498. .dpcm_capture = 1,
  3499. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3500. SND_SOC_DPCM_TRIGGER_POST },
  3501. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3502. .ignore_suspend = 1,
  3503. .codec_dai_name = "snd-soc-dummy-dai",
  3504. .codec_name = "snd-soc-dummy",
  3505. .id = MSM_FRONTEND_DAI_LSM6,
  3506. },
  3507. {/* hw:x,21 */
  3508. .name = "Listen 7 Audio Service",
  3509. .stream_name = "Listen 7 Audio Service",
  3510. .cpu_dai_name = "LSM7",
  3511. .platform_name = "msm-lsm-client",
  3512. .dynamic = 1,
  3513. .dpcm_capture = 1,
  3514. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3515. SND_SOC_DPCM_TRIGGER_POST },
  3516. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3517. .ignore_suspend = 1,
  3518. .codec_dai_name = "snd-soc-dummy-dai",
  3519. .codec_name = "snd-soc-dummy",
  3520. .id = MSM_FRONTEND_DAI_LSM7,
  3521. },
  3522. {/* hw:x,22 */
  3523. .name = "Listen 8 Audio Service",
  3524. .stream_name = "Listen 8 Audio Service",
  3525. .cpu_dai_name = "LSM8",
  3526. .platform_name = "msm-lsm-client",
  3527. .dynamic = 1,
  3528. .dpcm_capture = 1,
  3529. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3530. SND_SOC_DPCM_TRIGGER_POST },
  3531. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3532. .ignore_suspend = 1,
  3533. .codec_dai_name = "snd-soc-dummy-dai",
  3534. .codec_name = "snd-soc-dummy",
  3535. .id = MSM_FRONTEND_DAI_LSM8,
  3536. },
  3537. {/* hw:x,23 */
  3538. .name = MSM_DAILINK_NAME(Media9),
  3539. .stream_name = "MultiMedia9",
  3540. .cpu_dai_name = "MultiMedia9",
  3541. .platform_name = "msm-pcm-dsp.0",
  3542. .dynamic = 1,
  3543. .dpcm_playback = 1,
  3544. .dpcm_capture = 1,
  3545. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3546. SND_SOC_DPCM_TRIGGER_POST},
  3547. .codec_dai_name = "snd-soc-dummy-dai",
  3548. .codec_name = "snd-soc-dummy",
  3549. .ignore_suspend = 1,
  3550. /* this dainlink has playback support */
  3551. .ignore_pmdown_time = 1,
  3552. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  3553. },
  3554. {/* hw:x,24 */
  3555. .name = MSM_DAILINK_NAME(Compress4),
  3556. .stream_name = "Compress4",
  3557. .cpu_dai_name = "MultiMedia11",
  3558. .platform_name = "msm-compress-dsp",
  3559. .dynamic = 1,
  3560. .dpcm_playback = 1,
  3561. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3562. SND_SOC_DPCM_TRIGGER_POST},
  3563. .codec_dai_name = "snd-soc-dummy-dai",
  3564. .codec_name = "snd-soc-dummy",
  3565. .ignore_suspend = 1,
  3566. .ignore_pmdown_time = 1,
  3567. /* this dainlink has playback support */
  3568. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  3569. },
  3570. {/* hw:x,25 */
  3571. .name = MSM_DAILINK_NAME(Compress5),
  3572. .stream_name = "Compress5",
  3573. .cpu_dai_name = "MultiMedia12",
  3574. .platform_name = "msm-compress-dsp",
  3575. .dynamic = 1,
  3576. .dpcm_playback = 1,
  3577. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3578. SND_SOC_DPCM_TRIGGER_POST},
  3579. .codec_dai_name = "snd-soc-dummy-dai",
  3580. .codec_name = "snd-soc-dummy",
  3581. .ignore_suspend = 1,
  3582. .ignore_pmdown_time = 1,
  3583. /* this dainlink has playback support */
  3584. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  3585. },
  3586. {/* hw:x,26 */
  3587. .name = MSM_DAILINK_NAME(Compress6),
  3588. .stream_name = "Compress6",
  3589. .cpu_dai_name = "MultiMedia13",
  3590. .platform_name = "msm-compress-dsp",
  3591. .dynamic = 1,
  3592. .dpcm_playback = 1,
  3593. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3594. SND_SOC_DPCM_TRIGGER_POST},
  3595. .codec_dai_name = "snd-soc-dummy-dai",
  3596. .codec_name = "snd-soc-dummy",
  3597. .ignore_suspend = 1,
  3598. .ignore_pmdown_time = 1,
  3599. /* this dainlink has playback support */
  3600. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  3601. },
  3602. {/* hw:x,27 */
  3603. .name = MSM_DAILINK_NAME(Compress7),
  3604. .stream_name = "Compress7",
  3605. .cpu_dai_name = "MultiMedia14",
  3606. .platform_name = "msm-compress-dsp",
  3607. .dynamic = 1,
  3608. .dpcm_playback = 1,
  3609. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3610. SND_SOC_DPCM_TRIGGER_POST},
  3611. .codec_dai_name = "snd-soc-dummy-dai",
  3612. .codec_name = "snd-soc-dummy",
  3613. .ignore_suspend = 1,
  3614. .ignore_pmdown_time = 1,
  3615. /* this dainlink has playback support */
  3616. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  3617. },
  3618. {/* hw:x,28 */
  3619. .name = MSM_DAILINK_NAME(Compress8),
  3620. .stream_name = "Compress8",
  3621. .cpu_dai_name = "MultiMedia15",
  3622. .platform_name = "msm-compress-dsp",
  3623. .dynamic = 1,
  3624. .dpcm_playback = 1,
  3625. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3626. SND_SOC_DPCM_TRIGGER_POST},
  3627. .codec_dai_name = "snd-soc-dummy-dai",
  3628. .codec_name = "snd-soc-dummy",
  3629. .ignore_suspend = 1,
  3630. .ignore_pmdown_time = 1,
  3631. /* this dainlink has playback support */
  3632. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  3633. },
  3634. {/* hw:x,29 */
  3635. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  3636. .stream_name = "MM_NOIRQ_2",
  3637. .cpu_dai_name = "MultiMedia16",
  3638. .platform_name = "msm-pcm-dsp-noirq",
  3639. .dynamic = 1,
  3640. .dpcm_playback = 1,
  3641. .dpcm_capture = 1,
  3642. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3643. SND_SOC_DPCM_TRIGGER_POST},
  3644. .codec_dai_name = "snd-soc-dummy-dai",
  3645. .codec_name = "snd-soc-dummy",
  3646. .ignore_suspend = 1,
  3647. .ignore_pmdown_time = 1,
  3648. /* this dainlink has playback support */
  3649. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  3650. },
  3651. {/* hw:x,30 */
  3652. .name = "CDC_DMA Hostless",
  3653. .stream_name = "CDC_DMA Hostless",
  3654. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  3655. .platform_name = "msm-pcm-hostless",
  3656. .dynamic = 1,
  3657. .dpcm_playback = 1,
  3658. .dpcm_capture = 1,
  3659. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3660. SND_SOC_DPCM_TRIGGER_POST},
  3661. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3662. .ignore_suspend = 1,
  3663. /* this dailink has playback support */
  3664. .ignore_pmdown_time = 1,
  3665. .codec_dai_name = "snd-soc-dummy-dai",
  3666. .codec_name = "snd-soc-dummy",
  3667. },
  3668. {/* hw:x,31 */
  3669. .name = "TX3_CDC_DMA Hostless",
  3670. .stream_name = "TX3_CDC_DMA Hostless",
  3671. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  3672. .platform_name = "msm-pcm-hostless",
  3673. .dynamic = 1,
  3674. .dpcm_capture = 1,
  3675. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3676. SND_SOC_DPCM_TRIGGER_POST},
  3677. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3678. .ignore_suspend = 1,
  3679. .codec_dai_name = "snd-soc-dummy-dai",
  3680. .codec_name = "snd-soc-dummy",
  3681. },
  3682. };
  3683. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  3684. {/* hw:x,37 */
  3685. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  3686. .stream_name = "WSA CDC DMA0 Capture",
  3687. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  3688. .platform_name = "msm-pcm-hostless",
  3689. .codec_name = "bolero_codec",
  3690. .codec_dai_name = "wsa_macro_vifeedback",
  3691. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  3692. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3693. .ignore_suspend = 1,
  3694. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3695. .ops = &msm_cdc_dma_be_ops,
  3696. },
  3697. };
  3698. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  3699. {
  3700. .name = MSM_DAILINK_NAME(ASM Loopback),
  3701. .stream_name = "MultiMedia6",
  3702. .cpu_dai_name = "MultiMedia6",
  3703. .platform_name = "msm-pcm-loopback",
  3704. .dynamic = 1,
  3705. .dpcm_playback = 1,
  3706. .dpcm_capture = 1,
  3707. .codec_dai_name = "snd-soc-dummy-dai",
  3708. .codec_name = "snd-soc-dummy",
  3709. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3710. SND_SOC_DPCM_TRIGGER_POST},
  3711. .ignore_suspend = 1,
  3712. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3713. .ignore_pmdown_time = 1,
  3714. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  3715. },
  3716. {
  3717. .name = "USB Audio Hostless",
  3718. .stream_name = "USB Audio Hostless",
  3719. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  3720. .platform_name = "msm-pcm-hostless",
  3721. .dynamic = 1,
  3722. .dpcm_playback = 1,
  3723. .dpcm_capture = 1,
  3724. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3725. SND_SOC_DPCM_TRIGGER_POST},
  3726. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3727. .ignore_suspend = 1,
  3728. .ignore_pmdown_time = 1,
  3729. .codec_dai_name = "snd-soc-dummy-dai",
  3730. .codec_name = "snd-soc-dummy",
  3731. },
  3732. {
  3733. .name = "SLIMBUS_7 Hostless",
  3734. .stream_name = "SLIMBUS_7 Hostless",
  3735. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  3736. .platform_name = "msm-pcm-hostless",
  3737. .dynamic = 1,
  3738. .dpcm_capture = 1,
  3739. .dpcm_playback = 1,
  3740. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3741. SND_SOC_DPCM_TRIGGER_POST},
  3742. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3743. .ignore_suspend = 1,
  3744. .ignore_pmdown_time = 1,
  3745. .codec_dai_name = "snd-soc-dummy-dai",
  3746. .codec_name = "snd-soc-dummy",
  3747. },
  3748. };
  3749. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  3750. /* Backend AFE DAI Links */
  3751. {
  3752. .name = LPASS_BE_AFE_PCM_RX,
  3753. .stream_name = "AFE Playback",
  3754. .cpu_dai_name = "msm-dai-q6-dev.224",
  3755. .platform_name = "msm-pcm-routing",
  3756. .codec_name = "msm-stub-codec.1",
  3757. .codec_dai_name = "msm-stub-rx",
  3758. .no_pcm = 1,
  3759. .dpcm_playback = 1,
  3760. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  3761. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3762. /* this dainlink has playback support */
  3763. .ignore_pmdown_time = 1,
  3764. .ignore_suspend = 1,
  3765. },
  3766. {
  3767. .name = LPASS_BE_AFE_PCM_TX,
  3768. .stream_name = "AFE Capture",
  3769. .cpu_dai_name = "msm-dai-q6-dev.225",
  3770. .platform_name = "msm-pcm-routing",
  3771. .codec_name = "msm-stub-codec.1",
  3772. .codec_dai_name = "msm-stub-tx",
  3773. .no_pcm = 1,
  3774. .dpcm_capture = 1,
  3775. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  3776. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3777. .ignore_suspend = 1,
  3778. },
  3779. /* Incall Record Uplink BACK END DAI Link */
  3780. {
  3781. .name = LPASS_BE_INCALL_RECORD_TX,
  3782. .stream_name = "Voice Uplink Capture",
  3783. .cpu_dai_name = "msm-dai-q6-dev.32772",
  3784. .platform_name = "msm-pcm-routing",
  3785. .codec_name = "msm-stub-codec.1",
  3786. .codec_dai_name = "msm-stub-tx",
  3787. .no_pcm = 1,
  3788. .dpcm_capture = 1,
  3789. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  3790. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3791. .ignore_suspend = 1,
  3792. },
  3793. /* Incall Record Downlink BACK END DAI Link */
  3794. {
  3795. .name = LPASS_BE_INCALL_RECORD_RX,
  3796. .stream_name = "Voice Downlink Capture",
  3797. .cpu_dai_name = "msm-dai-q6-dev.32771",
  3798. .platform_name = "msm-pcm-routing",
  3799. .codec_name = "msm-stub-codec.1",
  3800. .codec_dai_name = "msm-stub-tx",
  3801. .no_pcm = 1,
  3802. .dpcm_capture = 1,
  3803. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  3804. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3805. .ignore_suspend = 1,
  3806. },
  3807. /* Incall Music BACK END DAI Link */
  3808. {
  3809. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  3810. .stream_name = "Voice Farend Playback",
  3811. .cpu_dai_name = "msm-dai-q6-dev.32773",
  3812. .platform_name = "msm-pcm-routing",
  3813. .codec_name = "msm-stub-codec.1",
  3814. .codec_dai_name = "msm-stub-rx",
  3815. .no_pcm = 1,
  3816. .dpcm_playback = 1,
  3817. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  3818. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3819. .ignore_suspend = 1,
  3820. .ignore_pmdown_time = 1,
  3821. },
  3822. /* Incall Music 2 BACK END DAI Link */
  3823. {
  3824. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  3825. .stream_name = "Voice2 Farend Playback",
  3826. .cpu_dai_name = "msm-dai-q6-dev.32770",
  3827. .platform_name = "msm-pcm-routing",
  3828. .codec_name = "msm-stub-codec.1",
  3829. .codec_dai_name = "msm-stub-rx",
  3830. .no_pcm = 1,
  3831. .dpcm_playback = 1,
  3832. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  3833. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3834. .ignore_suspend = 1,
  3835. .ignore_pmdown_time = 1,
  3836. },
  3837. {
  3838. .name = LPASS_BE_USB_AUDIO_RX,
  3839. .stream_name = "USB Audio Playback",
  3840. .cpu_dai_name = "msm-dai-q6-dev.28672",
  3841. .platform_name = "msm-pcm-routing",
  3842. .codec_name = "msm-stub-codec.1",
  3843. .codec_dai_name = "msm-stub-rx",
  3844. .no_pcm = 1,
  3845. .dpcm_playback = 1,
  3846. .id = MSM_BACKEND_DAI_USB_RX,
  3847. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3848. .ignore_pmdown_time = 1,
  3849. .ignore_suspend = 1,
  3850. },
  3851. {
  3852. .name = LPASS_BE_USB_AUDIO_TX,
  3853. .stream_name = "USB Audio Capture",
  3854. .cpu_dai_name = "msm-dai-q6-dev.28673",
  3855. .platform_name = "msm-pcm-routing",
  3856. .codec_name = "msm-stub-codec.1",
  3857. .codec_dai_name = "msm-stub-tx",
  3858. .no_pcm = 1,
  3859. .dpcm_capture = 1,
  3860. .id = MSM_BACKEND_DAI_USB_TX,
  3861. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3862. .ignore_suspend = 1,
  3863. },
  3864. {
  3865. .name = LPASS_BE_PRI_TDM_RX_0,
  3866. .stream_name = "Primary TDM0 Playback",
  3867. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  3868. .platform_name = "msm-pcm-routing",
  3869. .codec_name = "msm-stub-codec.1",
  3870. .codec_dai_name = "msm-stub-rx",
  3871. .no_pcm = 1,
  3872. .dpcm_playback = 1,
  3873. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  3874. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3875. .ops = &kona_tdm_be_ops,
  3876. .ignore_suspend = 1,
  3877. .ignore_pmdown_time = 1,
  3878. },
  3879. {
  3880. .name = LPASS_BE_PRI_TDM_TX_0,
  3881. .stream_name = "Primary TDM0 Capture",
  3882. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  3883. .platform_name = "msm-pcm-routing",
  3884. .codec_name = "msm-stub-codec.1",
  3885. .codec_dai_name = "msm-stub-tx",
  3886. .no_pcm = 1,
  3887. .dpcm_capture = 1,
  3888. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  3889. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3890. .ops = &kona_tdm_be_ops,
  3891. .ignore_suspend = 1,
  3892. },
  3893. {
  3894. .name = LPASS_BE_SEC_TDM_RX_0,
  3895. .stream_name = "Secondary TDM0 Playback",
  3896. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  3897. .platform_name = "msm-pcm-routing",
  3898. .codec_name = "msm-stub-codec.1",
  3899. .codec_dai_name = "msm-stub-rx",
  3900. .no_pcm = 1,
  3901. .dpcm_playback = 1,
  3902. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  3903. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3904. .ops = &kona_tdm_be_ops,
  3905. .ignore_suspend = 1,
  3906. .ignore_pmdown_time = 1,
  3907. },
  3908. {
  3909. .name = LPASS_BE_SEC_TDM_TX_0,
  3910. .stream_name = "Secondary TDM0 Capture",
  3911. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  3912. .platform_name = "msm-pcm-routing",
  3913. .codec_name = "msm-stub-codec.1",
  3914. .codec_dai_name = "msm-stub-tx",
  3915. .no_pcm = 1,
  3916. .dpcm_capture = 1,
  3917. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  3918. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3919. .ops = &kona_tdm_be_ops,
  3920. .ignore_suspend = 1,
  3921. },
  3922. {
  3923. .name = LPASS_BE_TERT_TDM_RX_0,
  3924. .stream_name = "Tertiary TDM0 Playback",
  3925. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  3926. .platform_name = "msm-pcm-routing",
  3927. .codec_name = "msm-stub-codec.1",
  3928. .codec_dai_name = "msm-stub-rx",
  3929. .no_pcm = 1,
  3930. .dpcm_playback = 1,
  3931. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  3932. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3933. .ops = &kona_tdm_be_ops,
  3934. .ignore_suspend = 1,
  3935. .ignore_pmdown_time = 1,
  3936. },
  3937. {
  3938. .name = LPASS_BE_TERT_TDM_TX_0,
  3939. .stream_name = "Tertiary TDM0 Capture",
  3940. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  3941. .platform_name = "msm-pcm-routing",
  3942. .codec_name = "msm-stub-codec.1",
  3943. .codec_dai_name = "msm-stub-tx",
  3944. .no_pcm = 1,
  3945. .dpcm_capture = 1,
  3946. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  3947. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3948. .ops = &kona_tdm_be_ops,
  3949. .ignore_suspend = 1,
  3950. },
  3951. };
  3952. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  3953. {
  3954. .name = LPASS_BE_PRI_MI2S_RX,
  3955. .stream_name = "Primary MI2S Playback",
  3956. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  3957. .platform_name = "msm-pcm-routing",
  3958. .codec_name = "msm-stub-codec.1",
  3959. .codec_dai_name = "msm-stub-rx",
  3960. .no_pcm = 1,
  3961. .dpcm_playback = 1,
  3962. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  3963. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3964. .ops = &msm_mi2s_be_ops,
  3965. .ignore_suspend = 1,
  3966. .ignore_pmdown_time = 1,
  3967. },
  3968. {
  3969. .name = LPASS_BE_PRI_MI2S_TX,
  3970. .stream_name = "Primary MI2S Capture",
  3971. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  3972. .platform_name = "msm-pcm-routing",
  3973. .codec_name = "msm-stub-codec.1",
  3974. .codec_dai_name = "msm-stub-tx",
  3975. .no_pcm = 1,
  3976. .dpcm_capture = 1,
  3977. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  3978. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3979. .ops = &msm_mi2s_be_ops,
  3980. .ignore_suspend = 1,
  3981. },
  3982. {
  3983. .name = LPASS_BE_SEC_MI2S_RX,
  3984. .stream_name = "Secondary MI2S Playback",
  3985. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  3986. .platform_name = "msm-pcm-routing",
  3987. .codec_name = "msm-stub-codec.1",
  3988. .codec_dai_name = "msm-stub-rx",
  3989. .no_pcm = 1,
  3990. .dpcm_playback = 1,
  3991. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  3992. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3993. .ops = &msm_mi2s_be_ops,
  3994. .ignore_suspend = 1,
  3995. .ignore_pmdown_time = 1,
  3996. },
  3997. {
  3998. .name = LPASS_BE_SEC_MI2S_TX,
  3999. .stream_name = "Secondary MI2S Capture",
  4000. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  4001. .platform_name = "msm-pcm-routing",
  4002. .codec_name = "msm-stub-codec.1",
  4003. .codec_dai_name = "msm-stub-tx",
  4004. .no_pcm = 1,
  4005. .dpcm_capture = 1,
  4006. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  4007. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4008. .ops = &msm_mi2s_be_ops,
  4009. .ignore_suspend = 1,
  4010. },
  4011. {
  4012. .name = LPASS_BE_TERT_MI2S_RX,
  4013. .stream_name = "Tertiary MI2S Playback",
  4014. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  4015. .platform_name = "msm-pcm-routing",
  4016. .codec_name = "msm-stub-codec.1",
  4017. .codec_dai_name = "msm-stub-rx",
  4018. .no_pcm = 1,
  4019. .dpcm_playback = 1,
  4020. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  4021. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4022. .ops = &msm_mi2s_be_ops,
  4023. .ignore_suspend = 1,
  4024. .ignore_pmdown_time = 1,
  4025. },
  4026. {
  4027. .name = LPASS_BE_TERT_MI2S_TX,
  4028. .stream_name = "Tertiary MI2S Capture",
  4029. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  4030. .platform_name = "msm-pcm-routing",
  4031. .codec_name = "msm-stub-codec.1",
  4032. .codec_dai_name = "msm-stub-tx",
  4033. .no_pcm = 1,
  4034. .dpcm_capture = 1,
  4035. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  4036. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4037. .ops = &msm_mi2s_be_ops,
  4038. .ignore_suspend = 1,
  4039. },
  4040. };
  4041. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  4042. /* Primary AUX PCM Backend DAI Links */
  4043. {
  4044. .name = LPASS_BE_AUXPCM_RX,
  4045. .stream_name = "AUX PCM Playback",
  4046. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4047. .platform_name = "msm-pcm-routing",
  4048. .codec_name = "msm-stub-codec.1",
  4049. .codec_dai_name = "msm-stub-rx",
  4050. .no_pcm = 1,
  4051. .dpcm_playback = 1,
  4052. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  4053. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4054. .ignore_pmdown_time = 1,
  4055. .ignore_suspend = 1,
  4056. },
  4057. {
  4058. .name = LPASS_BE_AUXPCM_TX,
  4059. .stream_name = "AUX PCM Capture",
  4060. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4061. .platform_name = "msm-pcm-routing",
  4062. .codec_name = "msm-stub-codec.1",
  4063. .codec_dai_name = "msm-stub-tx",
  4064. .no_pcm = 1,
  4065. .dpcm_capture = 1,
  4066. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  4067. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4068. .ignore_suspend = 1,
  4069. },
  4070. /* Secondary AUX PCM Backend DAI Links */
  4071. {
  4072. .name = LPASS_BE_SEC_AUXPCM_RX,
  4073. .stream_name = "Sec AUX PCM Playback",
  4074. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  4075. .platform_name = "msm-pcm-routing",
  4076. .codec_name = "msm-stub-codec.1",
  4077. .codec_dai_name = "msm-stub-rx",
  4078. .no_pcm = 1,
  4079. .dpcm_playback = 1,
  4080. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  4081. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4082. .ignore_pmdown_time = 1,
  4083. .ignore_suspend = 1,
  4084. },
  4085. {
  4086. .name = LPASS_BE_SEC_AUXPCM_TX,
  4087. .stream_name = "Sec AUX PCM Capture",
  4088. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  4089. .platform_name = "msm-pcm-routing",
  4090. .codec_name = "msm-stub-codec.1",
  4091. .codec_dai_name = "msm-stub-tx",
  4092. .no_pcm = 1,
  4093. .dpcm_capture = 1,
  4094. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  4095. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4096. .ignore_suspend = 1,
  4097. },
  4098. /* Tertiary AUX PCM Backend DAI Links */
  4099. {
  4100. .name = LPASS_BE_TERT_AUXPCM_RX,
  4101. .stream_name = "Tert AUX PCM Playback",
  4102. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  4103. .platform_name = "msm-pcm-routing",
  4104. .codec_name = "msm-stub-codec.1",
  4105. .codec_dai_name = "msm-stub-rx",
  4106. .no_pcm = 1,
  4107. .dpcm_playback = 1,
  4108. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  4109. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4110. .ignore_suspend = 1,
  4111. },
  4112. {
  4113. .name = LPASS_BE_TERT_AUXPCM_TX,
  4114. .stream_name = "Tert AUX PCM Capture",
  4115. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  4116. .platform_name = "msm-pcm-routing",
  4117. .codec_name = "msm-stub-codec.1",
  4118. .codec_dai_name = "msm-stub-tx",
  4119. .no_pcm = 1,
  4120. .dpcm_capture = 1,
  4121. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  4122. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4123. .ignore_suspend = 1,
  4124. },
  4125. };
  4126. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  4127. /* WSA CDC DMA Backend DAI Links */
  4128. {
  4129. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  4130. .stream_name = "WSA CDC DMA0 Playback",
  4131. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  4132. .platform_name = "msm-pcm-routing",
  4133. .codec_name = "bolero_codec",
  4134. .codec_dai_name = "wsa_macro_rx1",
  4135. .no_pcm = 1,
  4136. .dpcm_playback = 1,
  4137. .init = &msm_int_audrx_init,
  4138. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  4139. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4140. .ignore_pmdown_time = 1,
  4141. .ignore_suspend = 1,
  4142. .ops = &msm_cdc_dma_be_ops,
  4143. },
  4144. {
  4145. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  4146. .stream_name = "WSA CDC DMA1 Playback",
  4147. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  4148. .platform_name = "msm-pcm-routing",
  4149. .codec_name = "bolero_codec",
  4150. .codec_dai_name = "wsa_macro_rx_mix",
  4151. .no_pcm = 1,
  4152. .dpcm_playback = 1,
  4153. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  4154. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4155. .ignore_pmdown_time = 1,
  4156. .ignore_suspend = 1,
  4157. .ops = &msm_cdc_dma_be_ops,
  4158. },
  4159. {
  4160. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  4161. .stream_name = "WSA CDC DMA1 Capture",
  4162. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  4163. .platform_name = "msm-pcm-routing",
  4164. .codec_name = "bolero_codec",
  4165. .codec_dai_name = "wsa_macro_echo",
  4166. .no_pcm = 1,
  4167. .dpcm_capture = 1,
  4168. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  4169. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4170. .ignore_suspend = 1,
  4171. .ops = &msm_cdc_dma_be_ops,
  4172. },
  4173. };
  4174. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  4175. /* RX CDC DMA Backend DAI Links */
  4176. {
  4177. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  4178. .stream_name = "RX CDC DMA0 Playback",
  4179. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  4180. .platform_name = "msm-pcm-routing",
  4181. .codec_name = "bolero_codec",
  4182. .codec_dai_name = "rx_macro_rx1",
  4183. .no_pcm = 1,
  4184. .dpcm_playback = 1,
  4185. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  4186. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4187. .ignore_pmdown_time = 1,
  4188. .ignore_suspend = 1,
  4189. .ops = &msm_cdc_dma_be_ops,
  4190. },
  4191. {
  4192. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  4193. .stream_name = "RX CDC DMA1 Playback",
  4194. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  4195. .platform_name = "msm-pcm-routing",
  4196. .codec_name = "bolero_codec",
  4197. .codec_dai_name = "rx_macro_rx2",
  4198. .no_pcm = 1,
  4199. .dpcm_playback = 1,
  4200. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  4201. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4202. .ignore_pmdown_time = 1,
  4203. .ignore_suspend = 1,
  4204. .ops = &msm_cdc_dma_be_ops,
  4205. },
  4206. {
  4207. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  4208. .stream_name = "RX CDC DMA2 Playback",
  4209. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  4210. .platform_name = "msm-pcm-routing",
  4211. .codec_name = "bolero_codec",
  4212. .codec_dai_name = "rx_macro_rx3",
  4213. .no_pcm = 1,
  4214. .dpcm_playback = 1,
  4215. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  4216. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4217. .ignore_pmdown_time = 1,
  4218. .ignore_suspend = 1,
  4219. .ops = &msm_cdc_dma_be_ops,
  4220. },
  4221. {
  4222. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  4223. .stream_name = "RX CDC DMA3 Playback",
  4224. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  4225. .platform_name = "msm-pcm-routing",
  4226. .codec_name = "bolero_codec",
  4227. .codec_dai_name = "rx_macro_rx4",
  4228. .no_pcm = 1,
  4229. .dpcm_playback = 1,
  4230. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  4231. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4232. .ignore_pmdown_time = 1,
  4233. .ignore_suspend = 1,
  4234. .ops = &msm_cdc_dma_be_ops,
  4235. },
  4236. /* TX CDC DMA Backend DAI Links */
  4237. {
  4238. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  4239. .stream_name = "TX CDC DMA3 Capture",
  4240. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  4241. .platform_name = "msm-pcm-routing",
  4242. .codec_name = "bolero_codec",
  4243. .codec_dai_name = "tx_macro_tx1",
  4244. .no_pcm = 1,
  4245. .dpcm_capture = 1,
  4246. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  4247. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4248. .ignore_suspend = 1,
  4249. .ops = &msm_cdc_dma_be_ops,
  4250. },
  4251. {
  4252. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  4253. .stream_name = "TX CDC DMA4 Capture",
  4254. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  4255. .platform_name = "msm-pcm-routing",
  4256. .codec_name = "bolero_codec",
  4257. .codec_dai_name = "tx_macro_tx2",
  4258. .no_pcm = 1,
  4259. .dpcm_capture = 1,
  4260. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  4261. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4262. .ignore_suspend = 1,
  4263. .ops = &msm_cdc_dma_be_ops,
  4264. },
  4265. };
  4266. static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
  4267. {
  4268. .name = LPASS_BE_VA_CDC_DMA_TX_0,
  4269. .stream_name = "VA CDC DMA0 Capture",
  4270. .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
  4271. .platform_name = "msm-pcm-routing",
  4272. .codec_name = "bolero_codec",
  4273. .codec_dai_name = "va_macro_tx1",
  4274. .no_pcm = 1,
  4275. .dpcm_capture = 1,
  4276. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
  4277. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4278. .ignore_suspend = 1,
  4279. .ops = &msm_cdc_dma_be_ops,
  4280. },
  4281. {
  4282. .name = LPASS_BE_VA_CDC_DMA_TX_1,
  4283. .stream_name = "VA CDC DMA1 Capture",
  4284. .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
  4285. .platform_name = "msm-pcm-routing",
  4286. .codec_name = "bolero_codec",
  4287. .codec_dai_name = "va_macro_tx2",
  4288. .no_pcm = 1,
  4289. .dpcm_capture = 1,
  4290. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
  4291. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4292. .ignore_suspend = 1,
  4293. .ops = &msm_cdc_dma_be_ops,
  4294. },
  4295. {
  4296. .name = LPASS_BE_VA_CDC_DMA_TX_2,
  4297. .stream_name = "VA CDC DMA2 Capture",
  4298. .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
  4299. .platform_name = "msm-pcm-routing",
  4300. .codec_name = "bolero_codec",
  4301. .codec_dai_name = "va_macro_tx3",
  4302. .no_pcm = 1,
  4303. .dpcm_capture = 1,
  4304. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
  4305. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4306. .ignore_suspend = 1,
  4307. .ops = &msm_cdc_dma_be_ops,
  4308. },
  4309. };
  4310. static struct snd_soc_dai_link msm_kona_dai_links[
  4311. ARRAY_SIZE(msm_common_dai_links) +
  4312. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  4313. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  4314. ARRAY_SIZE(msm_common_be_dai_links) +
  4315. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  4316. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  4317. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  4318. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
  4319. ARRAY_SIZE(msm_va_cdc_dma_be_dai_links)];
  4320. static int msm_populate_dai_link_component_of_node(
  4321. struct snd_soc_card *card)
  4322. {
  4323. int i, index, ret = 0;
  4324. struct device *cdev = card->dev;
  4325. struct snd_soc_dai_link *dai_link = card->dai_link;
  4326. struct device_node *np;
  4327. if (!cdev) {
  4328. dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
  4329. return -ENODEV;
  4330. }
  4331. for (i = 0; i < card->num_links; i++) {
  4332. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  4333. continue;
  4334. /* populate platform_of_node for snd card dai links */
  4335. if (dai_link[i].platform_name &&
  4336. !dai_link[i].platform_of_node) {
  4337. index = of_property_match_string(cdev->of_node,
  4338. "asoc-platform-names",
  4339. dai_link[i].platform_name);
  4340. if (index < 0) {
  4341. dev_err(cdev, "%s: No match found for platform name: %s\n",
  4342. __func__, dai_link[i].platform_name);
  4343. ret = index;
  4344. goto err;
  4345. }
  4346. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  4347. index);
  4348. if (!np) {
  4349. dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
  4350. __func__, dai_link[i].platform_name,
  4351. index);
  4352. ret = -ENODEV;
  4353. goto err;
  4354. }
  4355. dai_link[i].platform_of_node = np;
  4356. dai_link[i].platform_name = NULL;
  4357. }
  4358. /* populate cpu_of_node for snd card dai links */
  4359. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  4360. index = of_property_match_string(cdev->of_node,
  4361. "asoc-cpu-names",
  4362. dai_link[i].cpu_dai_name);
  4363. if (index >= 0) {
  4364. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  4365. index);
  4366. if (!np) {
  4367. dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
  4368. __func__,
  4369. dai_link[i].cpu_dai_name);
  4370. ret = -ENODEV;
  4371. goto err;
  4372. }
  4373. dai_link[i].cpu_of_node = np;
  4374. dai_link[i].cpu_dai_name = NULL;
  4375. }
  4376. }
  4377. /* populate codec_of_node for snd card dai links */
  4378. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  4379. index = of_property_match_string(cdev->of_node,
  4380. "asoc-codec-names",
  4381. dai_link[i].codec_name);
  4382. if (index < 0)
  4383. continue;
  4384. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  4385. index);
  4386. if (!np) {
  4387. dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
  4388. __func__, dai_link[i].codec_name);
  4389. ret = -ENODEV;
  4390. goto err;
  4391. }
  4392. dai_link[i].codec_of_node = np;
  4393. dai_link[i].codec_name = NULL;
  4394. }
  4395. }
  4396. err:
  4397. return ret;
  4398. }
  4399. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  4400. {
  4401. int ret = -EINVAL;
  4402. struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
  4403. if (!component) {
  4404. pr_err("* %s: No match for msm-stub-codec component\n", __func__);
  4405. return ret;
  4406. }
  4407. ret = snd_soc_add_component_controls(component, msm_snd_controls,
  4408. ARRAY_SIZE(msm_snd_controls));
  4409. if (ret < 0) {
  4410. dev_err(component->dev,
  4411. "%s: add_codec_controls failed, err = %d\n",
  4412. __func__, ret);
  4413. return ret;
  4414. }
  4415. return ret;
  4416. }
  4417. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  4418. struct snd_pcm_hw_params *params)
  4419. {
  4420. return 0;
  4421. }
  4422. static struct snd_soc_ops msm_stub_be_ops = {
  4423. .hw_params = msm_snd_stub_hw_params,
  4424. };
  4425. struct snd_soc_card snd_soc_card_stub_msm = {
  4426. .name = "kona-stub-snd-card",
  4427. };
  4428. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  4429. /* FrontEnd DAI Links */
  4430. {
  4431. .name = "MSMSTUB Media1",
  4432. .stream_name = "MultiMedia1",
  4433. .cpu_dai_name = "MultiMedia1",
  4434. .platform_name = "msm-pcm-dsp.0",
  4435. .dynamic = 1,
  4436. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  4437. .dpcm_playback = 1,
  4438. .dpcm_capture = 1,
  4439. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4440. SND_SOC_DPCM_TRIGGER_POST},
  4441. .codec_dai_name = "snd-soc-dummy-dai",
  4442. .codec_name = "snd-soc-dummy",
  4443. .ignore_suspend = 1,
  4444. /* this dainlink has playback support */
  4445. .ignore_pmdown_time = 1,
  4446. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  4447. },
  4448. };
  4449. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  4450. /* Backend DAI Links */
  4451. {
  4452. .name = LPASS_BE_AUXPCM_RX,
  4453. .stream_name = "AUX PCM Playback",
  4454. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4455. .platform_name = "msm-pcm-routing",
  4456. .codec_name = "msm-stub-codec.1",
  4457. .codec_dai_name = "msm-stub-rx",
  4458. .no_pcm = 1,
  4459. .dpcm_playback = 1,
  4460. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  4461. .init = &msm_audrx_stub_init,
  4462. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4463. .ignore_pmdown_time = 1,
  4464. .ignore_suspend = 1,
  4465. .ops = &msm_stub_be_ops,
  4466. },
  4467. {
  4468. .name = LPASS_BE_AUXPCM_TX,
  4469. .stream_name = "AUX PCM Capture",
  4470. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4471. .platform_name = "msm-pcm-routing",
  4472. .codec_name = "msm-stub-codec.1",
  4473. .codec_dai_name = "msm-stub-tx",
  4474. .no_pcm = 1,
  4475. .dpcm_capture = 1,
  4476. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  4477. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4478. .ignore_suspend = 1,
  4479. .ops = &msm_stub_be_ops,
  4480. },
  4481. };
  4482. static struct snd_soc_dai_link msm_stub_dai_links[
  4483. ARRAY_SIZE(msm_stub_fe_dai_links) +
  4484. ARRAY_SIZE(msm_stub_be_dai_links)];
  4485. static const struct of_device_id kona_asoc_machine_of_match[] = {
  4486. { .compatible = "qcom,kona-asoc-snd",
  4487. .data = "codec"},
  4488. { .compatible = "qcom,kona-asoc-snd-stub",
  4489. .data = "stub_codec"},
  4490. {},
  4491. };
  4492. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  4493. {
  4494. struct snd_soc_card *card = NULL;
  4495. struct snd_soc_dai_link *dailink = NULL;
  4496. int len_1 = 0;
  4497. int len_2 = 0;
  4498. int total_links = 0;
  4499. int rc = 0;
  4500. u32 mi2s_audio_intf = 0;
  4501. u32 auxpcm_audio_intf = 0;
  4502. const struct of_device_id *match;
  4503. match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
  4504. if (!match) {
  4505. dev_err(dev, "%s: No DT match found for sound card\n",
  4506. __func__);
  4507. return NULL;
  4508. }
  4509. if (!strcmp(match->data, "codec")) {
  4510. card = &snd_soc_card_kona_msm;
  4511. memcpy(msm_kona_dai_links + total_links,
  4512. msm_common_dai_links,
  4513. sizeof(msm_common_dai_links));
  4514. total_links += ARRAY_SIZE(msm_common_dai_links);
  4515. memcpy(msm_kona_dai_links + total_links,
  4516. msm_bolero_fe_dai_links,
  4517. sizeof(msm_bolero_fe_dai_links));
  4518. total_links +=
  4519. ARRAY_SIZE(msm_bolero_fe_dai_links);
  4520. memcpy(msm_kona_dai_links + total_links,
  4521. msm_common_misc_fe_dai_links,
  4522. sizeof(msm_common_misc_fe_dai_links));
  4523. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  4524. memcpy(msm_kona_dai_links + total_links,
  4525. msm_common_be_dai_links,
  4526. sizeof(msm_common_be_dai_links));
  4527. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  4528. memcpy(msm_kona_dai_links + total_links,
  4529. msm_wsa_cdc_dma_be_dai_links,
  4530. sizeof(msm_wsa_cdc_dma_be_dai_links));
  4531. total_links +=
  4532. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  4533. memcpy(msm_kona_dai_links + total_links,
  4534. msm_rx_tx_cdc_dma_be_dai_links,
  4535. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  4536. total_links +=
  4537. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  4538. memcpy(msm_kona_dai_links + total_links,
  4539. msm_va_cdc_dma_be_dai_links,
  4540. sizeof(msm_va_cdc_dma_be_dai_links));
  4541. total_links +=
  4542. ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
  4543. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  4544. &mi2s_audio_intf);
  4545. if (rc) {
  4546. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  4547. __func__);
  4548. } else {
  4549. if (mi2s_audio_intf) {
  4550. memcpy(msm_kona_dai_links + total_links,
  4551. msm_mi2s_be_dai_links,
  4552. sizeof(msm_mi2s_be_dai_links));
  4553. total_links +=
  4554. ARRAY_SIZE(msm_mi2s_be_dai_links);
  4555. }
  4556. }
  4557. rc = of_property_read_u32(dev->of_node,
  4558. "qcom,auxpcm-audio-intf",
  4559. &auxpcm_audio_intf);
  4560. if (rc) {
  4561. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  4562. __func__);
  4563. } else {
  4564. if (auxpcm_audio_intf) {
  4565. memcpy(msm_kona_dai_links + total_links,
  4566. msm_auxpcm_be_dai_links,
  4567. sizeof(msm_auxpcm_be_dai_links));
  4568. total_links +=
  4569. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  4570. }
  4571. }
  4572. dailink = msm_kona_dai_links;
  4573. } else if(!strcmp(match->data, "stub_codec")) {
  4574. card = &snd_soc_card_stub_msm;
  4575. len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
  4576. len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
  4577. memcpy(msm_stub_dai_links,
  4578. msm_stub_fe_dai_links,
  4579. sizeof(msm_stub_fe_dai_links));
  4580. memcpy(msm_stub_dai_links + len_1,
  4581. msm_stub_be_dai_links,
  4582. sizeof(msm_stub_be_dai_links));
  4583. dailink = msm_stub_dai_links;
  4584. total_links = len_2;
  4585. }
  4586. if (card) {
  4587. card->dai_link = dailink;
  4588. card->num_links = total_links;
  4589. }
  4590. return card;
  4591. }
  4592. static int msm_wsa881x_init(struct snd_soc_component *component)
  4593. {
  4594. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  4595. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  4596. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  4597. SPKR_L_BOOST, SPKR_L_VI};
  4598. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  4599. SPKR_R_BOOST, SPKR_R_VI};
  4600. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  4601. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  4602. struct msm_asoc_mach_data *pdata;
  4603. struct snd_soc_dapm_context *dapm;
  4604. struct snd_card *card;
  4605. struct snd_info_entry *entry;
  4606. int ret = 0;
  4607. if (!component) {
  4608. pr_err("%s component is NULL\n", __func__);
  4609. return -EINVAL;
  4610. }
  4611. card = component->card->snd_card;
  4612. dapm = snd_soc_component_get_dapm(component);
  4613. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  4614. dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
  4615. __func__, component->name);
  4616. wsa881x_set_channel_map(component, &spkleft_ports[0],
  4617. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  4618. &ch_rate[0], &spkleft_port_types[0]);
  4619. if (dapm->component) {
  4620. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  4621. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  4622. }
  4623. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  4624. dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
  4625. __func__, component->name);
  4626. wsa881x_set_channel_map(component, &spkright_ports[0],
  4627. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  4628. &ch_rate[0], &spkright_port_types[0]);
  4629. if (dapm->component) {
  4630. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  4631. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  4632. }
  4633. } else {
  4634. dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
  4635. component->name);
  4636. ret = -EINVAL;
  4637. goto err;
  4638. }
  4639. pdata = snd_soc_card_get_drvdata(component->card);
  4640. if (!pdata->codec_root) {
  4641. entry = snd_info_create_subdir(card->module, "codecs",
  4642. card->proc_root);
  4643. if (!entry) {
  4644. pr_err("%s: Cannot create codecs module entry\n",
  4645. __func__);
  4646. ret = 0;
  4647. goto err;
  4648. }
  4649. pdata->codec_root = entry;
  4650. }
  4651. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  4652. component);
  4653. err:
  4654. return ret;
  4655. }
  4656. static int msm_aux_codec_init(struct snd_soc_component *component)
  4657. {
  4658. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  4659. int ret = 0;
  4660. struct snd_info_entry *entry;
  4661. struct snd_card *card = component->card->snd_card;
  4662. struct msm_asoc_mach_data *pdata;
  4663. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4664. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  4665. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4666. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4667. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  4668. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  4669. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  4670. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  4671. snd_soc_dapm_sync(dapm);
  4672. pdata = snd_soc_card_get_drvdata(component->card);
  4673. if (!pdata->codec_root) {
  4674. entry = snd_info_create_subdir(card->module, "codecs",
  4675. card->proc_root);
  4676. if (!entry) {
  4677. pr_err("%s: Cannot create codecs module entry\n",
  4678. __func__);
  4679. ret = 0;
  4680. goto codec_root_err;
  4681. }
  4682. pdata->codec_root = entry;
  4683. }
  4684. codec_root_err:
  4685. return ret;
  4686. }
  4687. static int msm_init_aux_dev(struct platform_device *pdev,
  4688. struct snd_soc_card *card)
  4689. {
  4690. struct device_node *wsa_of_node;
  4691. struct device_node *aux_codec_of_node;
  4692. u32 wsa_max_devs;
  4693. u32 wsa_dev_cnt;
  4694. u32 codec_aux_dev_cnt = 0;
  4695. u32 bolero_codec = 0;
  4696. int i;
  4697. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  4698. struct aux_codec_dev_info *aux_cdc_dev_info;
  4699. const char *auxdev_name_prefix[1];
  4700. char *dev_name_str = NULL;
  4701. int found = 0;
  4702. int codecs_found = 0;
  4703. int ret = 0;
  4704. /* Get maximum WSA device count for this platform */
  4705. ret = of_property_read_u32(pdev->dev.of_node,
  4706. "qcom,wsa-max-devs", &wsa_max_devs);
  4707. if (ret) {
  4708. dev_info(&pdev->dev,
  4709. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  4710. __func__, pdev->dev.of_node->full_name, ret);
  4711. wsa_max_devs = 0;
  4712. goto codec_aux_dev;
  4713. }
  4714. if (wsa_max_devs == 0) {
  4715. dev_warn(&pdev->dev,
  4716. "%s: Max WSA devices is 0 for this target?\n",
  4717. __func__);
  4718. goto codec_aux_dev;
  4719. }
  4720. /* Get count of WSA device phandles for this platform */
  4721. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  4722. "qcom,wsa-devs", NULL);
  4723. if (wsa_dev_cnt == -ENOENT) {
  4724. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  4725. __func__);
  4726. goto err;
  4727. } else if (wsa_dev_cnt <= 0) {
  4728. dev_err(&pdev->dev,
  4729. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  4730. __func__, wsa_dev_cnt);
  4731. ret = -EINVAL;
  4732. goto err;
  4733. }
  4734. /*
  4735. * Expect total phandles count to be NOT less than maximum possible
  4736. * WSA count. However, if it is less, then assign same value to
  4737. * max count as well.
  4738. */
  4739. if (wsa_dev_cnt < wsa_max_devs) {
  4740. dev_dbg(&pdev->dev,
  4741. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  4742. __func__, wsa_max_devs, wsa_dev_cnt);
  4743. wsa_max_devs = wsa_dev_cnt;
  4744. }
  4745. /* Make sure prefix string passed for each WSA device */
  4746. ret = of_property_count_strings(pdev->dev.of_node,
  4747. "qcom,wsa-aux-dev-prefix");
  4748. if (ret != wsa_dev_cnt) {
  4749. dev_err(&pdev->dev,
  4750. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  4751. __func__, wsa_dev_cnt, ret);
  4752. ret = -EINVAL;
  4753. goto err;
  4754. }
  4755. /*
  4756. * Alloc mem to store phandle and index info of WSA device, if already
  4757. * registered with ALSA core
  4758. */
  4759. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  4760. sizeof(struct msm_wsa881x_dev_info),
  4761. GFP_KERNEL);
  4762. if (!wsa881x_dev_info) {
  4763. ret = -ENOMEM;
  4764. goto err;
  4765. }
  4766. /*
  4767. * search and check whether all WSA devices are already
  4768. * registered with ALSA core or not. If found a node, store
  4769. * the node and the index in a local array of struct for later
  4770. * use.
  4771. */
  4772. for (i = 0; i < wsa_dev_cnt; i++) {
  4773. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  4774. "qcom,wsa-devs", i);
  4775. if (unlikely(!wsa_of_node)) {
  4776. /* we should not be here */
  4777. dev_err(&pdev->dev,
  4778. "%s: wsa dev node is not present\n",
  4779. __func__);
  4780. ret = -EINVAL;
  4781. goto err;
  4782. }
  4783. if (soc_find_component(wsa_of_node, NULL)) {
  4784. /* WSA device registered with ALSA core */
  4785. wsa881x_dev_info[found].of_node = wsa_of_node;
  4786. wsa881x_dev_info[found].index = i;
  4787. found++;
  4788. if (found == wsa_max_devs)
  4789. break;
  4790. }
  4791. }
  4792. if (found < wsa_max_devs) {
  4793. dev_dbg(&pdev->dev,
  4794. "%s: failed to find %d components. Found only %d\n",
  4795. __func__, wsa_max_devs, found);
  4796. return -EPROBE_DEFER;
  4797. }
  4798. dev_info(&pdev->dev,
  4799. "%s: found %d wsa881x devices registered with ALSA core\n",
  4800. __func__, found);
  4801. codec_aux_dev:
  4802. ret = of_property_read_u32(pdev->dev.of_node, "qcom,bolero-codec", &bolero_codec);
  4803. if (ret)
  4804. dev_dbg(&pdev->dev, "%s: No DT match for bolero codec\n", __func__);
  4805. if (bolero_codec) {
  4806. /* Get count of aux codec device phandles for this platform */
  4807. codec_aux_dev_cnt = of_count_phandle_with_args(
  4808. pdev->dev.of_node,
  4809. "qcom,codec-aux-devs", NULL);
  4810. if (codec_aux_dev_cnt == -ENOENT) {
  4811. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  4812. __func__);
  4813. goto err;
  4814. } else if (codec_aux_dev_cnt <= 0) {
  4815. dev_err(&pdev->dev,
  4816. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  4817. __func__, codec_aux_dev_cnt);
  4818. ret = -EINVAL;
  4819. goto err;
  4820. }
  4821. /*
  4822. * Alloc mem to store phandle and index info of aux codec
  4823. * if already registered with ALSA core
  4824. */
  4825. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  4826. sizeof(struct aux_codec_dev_info),
  4827. GFP_KERNEL);
  4828. if (!aux_cdc_dev_info) {
  4829. ret = -ENOMEM;
  4830. goto err;
  4831. }
  4832. /*
  4833. * search and check whether all aux codecs are already
  4834. * registered with ALSA core or not. If found a node, store
  4835. * the node and the index in a local array of struct for later
  4836. * use.
  4837. */
  4838. for (i = 0; i < codec_aux_dev_cnt; i++) {
  4839. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  4840. "qcom,codec-aux-devs", i);
  4841. if (unlikely(!aux_codec_of_node)) {
  4842. /* we should not be here */
  4843. dev_err(&pdev->dev,
  4844. "%s: aux codec dev node is not present\n",
  4845. __func__);
  4846. ret = -EINVAL;
  4847. goto err;
  4848. }
  4849. if (soc_find_component(aux_codec_of_node, NULL)) {
  4850. /* AUX codec registered with ALSA core */
  4851. aux_cdc_dev_info[codecs_found].of_node =
  4852. aux_codec_of_node;
  4853. aux_cdc_dev_info[codecs_found].index = i;
  4854. codecs_found++;
  4855. }
  4856. }
  4857. if (codecs_found < codec_aux_dev_cnt) {
  4858. dev_dbg(&pdev->dev,
  4859. "%s: failed to find %d components. Found only %d\n",
  4860. __func__, codec_aux_dev_cnt, codecs_found);
  4861. return -EPROBE_DEFER;
  4862. }
  4863. dev_info(&pdev->dev,
  4864. "%s: found %d AUX codecs registered with ALSA core\n",
  4865. __func__, codecs_found);
  4866. }
  4867. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  4868. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  4869. /* Alloc array of AUX devs struct */
  4870. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  4871. sizeof(struct snd_soc_aux_dev),
  4872. GFP_KERNEL);
  4873. if (!msm_aux_dev) {
  4874. ret = -ENOMEM;
  4875. goto err;
  4876. }
  4877. /* Alloc array of codec conf struct */
  4878. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  4879. sizeof(struct snd_soc_codec_conf),
  4880. GFP_KERNEL);
  4881. if (!msm_codec_conf) {
  4882. ret = -ENOMEM;
  4883. goto err;
  4884. }
  4885. for (i = 0; i < wsa_max_devs; i++) {
  4886. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  4887. GFP_KERNEL);
  4888. if (!dev_name_str) {
  4889. ret = -ENOMEM;
  4890. goto err;
  4891. }
  4892. ret = of_property_read_string_index(pdev->dev.of_node,
  4893. "qcom,wsa-aux-dev-prefix",
  4894. wsa881x_dev_info[i].index,
  4895. auxdev_name_prefix);
  4896. if (ret) {
  4897. dev_err(&pdev->dev,
  4898. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  4899. __func__, ret);
  4900. ret = -EINVAL;
  4901. goto err;
  4902. }
  4903. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  4904. msm_aux_dev[i].name = dev_name_str;
  4905. msm_aux_dev[i].codec_name = NULL;
  4906. msm_aux_dev[i].codec_of_node =
  4907. wsa881x_dev_info[i].of_node;
  4908. msm_aux_dev[i].init = msm_wsa881x_init;
  4909. msm_codec_conf[i].dev_name = NULL;
  4910. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  4911. msm_codec_conf[i].of_node =
  4912. wsa881x_dev_info[i].of_node;
  4913. }
  4914. for (i = 0; i < codec_aux_dev_cnt; i++) {
  4915. msm_aux_dev[wsa_max_devs + i].name = NULL;
  4916. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  4917. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  4918. aux_cdc_dev_info[i].of_node;
  4919. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  4920. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  4921. msm_codec_conf[wsa_max_devs + i].name_prefix =
  4922. NULL;
  4923. msm_codec_conf[wsa_max_devs + i].of_node =
  4924. aux_cdc_dev_info[i].of_node;
  4925. }
  4926. card->codec_conf = msm_codec_conf;
  4927. card->aux_dev = msm_aux_dev;
  4928. err:
  4929. return ret;
  4930. }
  4931. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  4932. {
  4933. int count = 0;
  4934. u32 mi2s_master_slave[MI2S_MAX];
  4935. int ret = 0;
  4936. for (count = 0; count < MI2S_MAX; count++) {
  4937. mutex_init(&mi2s_intf_conf[count].lock);
  4938. mi2s_intf_conf[count].ref_cnt = 0;
  4939. }
  4940. ret = of_property_read_u32_array(pdev->dev.of_node,
  4941. "qcom,msm-mi2s-master",
  4942. mi2s_master_slave, MI2S_MAX);
  4943. if (ret) {
  4944. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  4945. __func__);
  4946. } else {
  4947. for (count = 0; count < MI2S_MAX; count++) {
  4948. mi2s_intf_conf[count].msm_is_mi2s_master =
  4949. mi2s_master_slave[count];
  4950. }
  4951. }
  4952. }
  4953. static void msm_i2s_auxpcm_deinit(void)
  4954. {
  4955. int count = 0;
  4956. for (count = 0; count < MI2S_MAX; count++) {
  4957. mutex_destroy(&mi2s_intf_conf[count].lock);
  4958. mi2s_intf_conf[count].ref_cnt = 0;
  4959. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  4960. }
  4961. }
  4962. static int kona_ssr_enable(struct device *dev, void *data)
  4963. {
  4964. struct platform_device *pdev = to_platform_device(dev);
  4965. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4966. int ret = 0;
  4967. if (!card) {
  4968. dev_err(dev, "%s: card is NULL\n", __func__);
  4969. ret = -EINVAL;
  4970. goto err;
  4971. }
  4972. if (!strcmp(card->name, "kona-stub-snd-card")) {
  4973. /* TODO */
  4974. dev_dbg(dev, "%s: TODO \n", __func__);
  4975. }
  4976. snd_soc_card_change_online_state(card, 1);
  4977. dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
  4978. err:
  4979. return ret;
  4980. }
  4981. static void kona_ssr_disable(struct device *dev, void *data)
  4982. {
  4983. struct platform_device *pdev = to_platform_device(dev);
  4984. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4985. if (!card) {
  4986. dev_err(dev, "%s: card is NULL\n", __func__);
  4987. return;
  4988. }
  4989. dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
  4990. snd_soc_card_change_online_state(card, 0);
  4991. if (!strcmp(card->name, "kona-stub-snd-card")) {
  4992. /* TODO */
  4993. dev_dbg(dev, "%s: TODO \n", __func__);
  4994. }
  4995. }
  4996. static const struct snd_event_ops kona_ssr_ops = {
  4997. .enable = kona_ssr_enable,
  4998. .disable = kona_ssr_disable,
  4999. };
  5000. static int msm_audio_ssr_compare(struct device *dev, void *data)
  5001. {
  5002. struct device_node *node = data;
  5003. dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
  5004. __func__, dev->of_node, node);
  5005. return (dev->of_node && dev->of_node == node);
  5006. }
  5007. static int msm_audio_ssr_register(struct device *dev)
  5008. {
  5009. struct device_node *np = dev->of_node;
  5010. struct snd_event_clients *ssr_clients = NULL;
  5011. struct device_node *node = NULL;
  5012. int ret = 0;
  5013. int i = 0;
  5014. for (i = 0; ; i++) {
  5015. node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
  5016. if (!node)
  5017. break;
  5018. snd_event_mstr_add_client(&ssr_clients,
  5019. msm_audio_ssr_compare, node);
  5020. }
  5021. ret = snd_event_master_register(dev, &kona_ssr_ops,
  5022. ssr_clients, NULL);
  5023. if (!ret)
  5024. snd_event_notify(dev, SND_EVENT_UP);
  5025. return ret;
  5026. }
  5027. static int msm_asoc_machine_probe(struct platform_device *pdev)
  5028. {
  5029. struct snd_soc_card *card = NULL;
  5030. struct msm_asoc_mach_data *pdata = NULL;
  5031. const char *mbhc_audio_jack_type = NULL;
  5032. int ret = 0;
  5033. if (!pdev->dev.of_node) {
  5034. dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
  5035. return -EINVAL;
  5036. }
  5037. pdata = devm_kzalloc(&pdev->dev,
  5038. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  5039. if (!pdata)
  5040. return -ENOMEM;
  5041. card = populate_snd_card_dailinks(&pdev->dev);
  5042. if (!card) {
  5043. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  5044. ret = -EINVAL;
  5045. goto err;
  5046. }
  5047. card->dev = &pdev->dev;
  5048. platform_set_drvdata(pdev, card);
  5049. snd_soc_card_set_drvdata(card, pdata);
  5050. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  5051. if (ret) {
  5052. dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
  5053. __func__, ret);
  5054. goto err;
  5055. }
  5056. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  5057. if (ret) {
  5058. dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
  5059. __func__, ret);
  5060. goto err;
  5061. }
  5062. ret = msm_populate_dai_link_component_of_node(card);
  5063. if (ret) {
  5064. ret = -EPROBE_DEFER;
  5065. goto err;
  5066. }
  5067. ret = msm_init_aux_dev(pdev, card);
  5068. if (ret)
  5069. goto err;
  5070. ret = devm_snd_soc_register_card(&pdev->dev, card);
  5071. if (ret == -EPROBE_DEFER) {
  5072. if (codec_reg_done)
  5073. ret = -EINVAL;
  5074. goto err;
  5075. } else if (ret) {
  5076. dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
  5077. __func__, ret);
  5078. goto err;
  5079. }
  5080. dev_info(&pdev->dev, "%s: Sound card %s registered\n",
  5081. __func__, card->name);
  5082. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5083. "qcom,hph-en1-gpio", 0);
  5084. if (!pdata->hph_en1_gpio_p) {
  5085. dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
  5086. __func__, "qcom,hph-en1-gpio",
  5087. pdev->dev.of_node->full_name);
  5088. }
  5089. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5090. "qcom,hph-en0-gpio", 0);
  5091. if (!pdata->hph_en0_gpio_p) {
  5092. dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
  5093. __func__, "qcom,hph-en0-gpio",
  5094. pdev->dev.of_node->full_name);
  5095. }
  5096. ret = of_property_read_string(pdev->dev.of_node,
  5097. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  5098. if (ret) {
  5099. dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
  5100. __func__, "qcom,mbhc-audio-jack-type",
  5101. pdev->dev.of_node->full_name);
  5102. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  5103. } else {
  5104. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  5105. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  5106. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  5107. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  5108. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  5109. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  5110. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  5111. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  5112. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  5113. } else {
  5114. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  5115. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  5116. }
  5117. }
  5118. msm_i2s_auxpcm_init(pdev);
  5119. if (strcmp(card->name, "kona-mtp-snd-card")) {
  5120. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5121. "qcom,cdc-dmic01-gpios",
  5122. 0);
  5123. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5124. "qcom,cdc-dmic23-gpios",
  5125. 0);
  5126. pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5127. "qcom,cdc-dmic45-gpios",
  5128. 0);
  5129. }
  5130. ret = msm_audio_ssr_register(&pdev->dev);
  5131. if (ret)
  5132. pr_err("%s: Registration with SND event FWK failed ret = %d\n",
  5133. __func__, ret);
  5134. is_initial_boot = true;
  5135. return 0;
  5136. err:
  5137. devm_kfree(&pdev->dev, pdata);
  5138. return ret;
  5139. }
  5140. static int msm_asoc_machine_remove(struct platform_device *pdev)
  5141. {
  5142. struct snd_soc_card *card = platform_get_drvdata(pdev);
  5143. snd_event_master_deregister(&pdev->dev);
  5144. snd_soc_unregister_card(card);
  5145. msm_i2s_auxpcm_deinit();
  5146. return 0;
  5147. }
  5148. static struct platform_driver kona_asoc_machine_driver = {
  5149. .driver = {
  5150. .name = DRV_NAME,
  5151. .owner = THIS_MODULE,
  5152. .pm = &snd_soc_pm_ops,
  5153. .of_match_table = kona_asoc_machine_of_match,
  5154. },
  5155. .probe = msm_asoc_machine_probe,
  5156. .remove = msm_asoc_machine_remove,
  5157. };
  5158. module_platform_driver(kona_asoc_machine_driver);
  5159. MODULE_DESCRIPTION("ALSA SoC msm");
  5160. MODULE_LICENSE("GPL v2");
  5161. MODULE_ALIAS("platform:" DRV_NAME);
  5162. MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);