dp_rx_mon_status.c 71 KB

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  1. /*
  2. * Copyright (c) 2017-2021 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_trace.h"
  25. #include "qdf_nbuf.h"
  26. #include "hal_api_mon.h"
  27. #include "dp_rx_mon.h"
  28. #include "dp_internal.h"
  29. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  30. #include "htt.h"
  31. #ifdef FEATURE_PERPKT_INFO
  32. #include "dp_ratetable.h"
  33. #endif
  34. #define dp_rx_mon_status_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_RX_MON_STATUS, params)
  35. #define dp_rx_mon_status_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_RX_MON_STATUS, params)
  36. #define dp_rx_mon_status_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_RX_MON_STATUS, params)
  37. #define dp_rx_mon_status_info(params...) \
  38. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX_MON_STATUS, ## params)
  39. #define dp_rx_mon_status_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_RX_MON_STATUS, params)
  40. static inline
  41. QDF_STATUS dp_rx_mon_status_buffers_replenish(struct dp_soc *dp_soc,
  42. uint32_t mac_id,
  43. struct dp_srng *dp_rxdma_srng,
  44. struct rx_desc_pool *rx_desc_pool,
  45. uint32_t num_req_buffers,
  46. union dp_rx_desc_list_elem_t **desc_list,
  47. union dp_rx_desc_list_elem_t **tail,
  48. uint8_t owner);
  49. static inline void
  50. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  51. struct hal_rx_ppdu_info *ppdu_info,
  52. struct cdp_rx_indication_ppdu *cdp_rx_ppdu);
  53. /**
  54. * dp_rx_mon_handle_status_buf_done () - Handle status buf DMA not done
  55. *
  56. * @pdev: DP pdev handle
  57. * @mon_status_srng: Monitor status SRNG
  58. *
  59. * As per MAC team's suggestion, If HP + 2 entry's DMA done is set,
  60. * skip HP + 1 entry and start processing in next interrupt.
  61. * If HP + 2 entry's DMA done is not set, poll onto HP + 1 entry
  62. * for it's DMA done TLV to be set.
  63. *
  64. * Return: enum dp_mon_reap_status
  65. */
  66. enum dp_mon_reap_status
  67. dp_rx_mon_handle_status_buf_done(struct dp_pdev *pdev,
  68. void *mon_status_srng)
  69. {
  70. struct dp_soc *soc = pdev->soc;
  71. hal_soc_handle_t hal_soc;
  72. void *ring_entry;
  73. uint32_t rx_buf_cookie;
  74. qdf_nbuf_t status_nbuf;
  75. struct dp_rx_desc *rx_desc;
  76. void *rx_tlv;
  77. QDF_STATUS buf_status;
  78. hal_soc = soc->hal_soc;
  79. ring_entry = hal_srng_src_peek_n_get_next_next(hal_soc,
  80. mon_status_srng);
  81. if (!ring_entry) {
  82. dp_rx_mon_status_debug("%pK: Monitor status ring entry is NULL for SRNG: %pK",
  83. soc, mon_status_srng);
  84. return DP_MON_STATUS_NO_DMA;
  85. }
  86. rx_buf_cookie = HAL_RX_BUF_COOKIE_GET(ring_entry);
  87. rx_desc = dp_rx_cookie_2_va_mon_status(soc, rx_buf_cookie);
  88. qdf_assert(rx_desc);
  89. status_nbuf = rx_desc->nbuf;
  90. qdf_nbuf_sync_for_cpu(soc->osdev, status_nbuf,
  91. QDF_DMA_FROM_DEVICE);
  92. rx_tlv = qdf_nbuf_data(status_nbuf);
  93. buf_status = hal_get_rx_status_done(rx_tlv);
  94. /* If status buffer DMA is not done,
  95. * 1. As per MAC team's suggestion, If HP + 2 entry's DMA done is set,
  96. * replenish HP + 1 entry and start processing in next interrupt.
  97. * 2. If HP + 2 entry's DMA done is not set
  98. * hold on to mon destination ring.
  99. */
  100. if (buf_status != QDF_STATUS_SUCCESS) {
  101. dp_err_rl("Monitor status ring: DMA is not done "
  102. "for nbuf: %pK", status_nbuf);
  103. pdev->rx_mon_stats.tlv_tag_status_err++;
  104. return DP_MON_STATUS_NO_DMA;
  105. }
  106. pdev->rx_mon_stats.status_buf_done_war++;
  107. return DP_MON_STATUS_REPLENISH;
  108. }
  109. #ifndef QCA_SUPPORT_FULL_MON
  110. /**
  111. * dp_rx_mon_process () - Core brain processing for monitor mode
  112. *
  113. * This API processes monitor destination ring followed by monitor status ring
  114. * Called from bottom half (tasklet/NET_RX_SOFTIRQ)
  115. *
  116. * @soc: datapath soc context
  117. * @int_ctx: interrupt context
  118. * @mac_id: mac_id on which interrupt is received
  119. * @quota: Number of status ring entry that can be serviced in one shot.
  120. *
  121. * @Return: Number of reaped status ring entries
  122. */
  123. static inline uint32_t
  124. dp_rx_mon_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  125. uint32_t mac_id, uint32_t quota)
  126. {
  127. return quota;
  128. }
  129. #endif
  130. #ifdef WLAN_RX_PKT_CAPTURE_ENH
  131. #include "dp_rx_mon_feature.h"
  132. #else
  133. static QDF_STATUS
  134. dp_rx_handle_enh_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  135. struct hal_rx_ppdu_info *ppdu_info)
  136. {
  137. return QDF_STATUS_SUCCESS;
  138. }
  139. static void
  140. dp_rx_mon_enh_capture_process(struct dp_pdev *pdev, uint32_t tlv_status,
  141. qdf_nbuf_t status_nbuf,
  142. struct hal_rx_ppdu_info *ppdu_info,
  143. bool *nbuf_used)
  144. {
  145. }
  146. #endif
  147. #ifdef WLAN_TX_PKT_CAPTURE_ENH
  148. #include "dp_rx_mon_feature.h"
  149. #else
  150. static QDF_STATUS
  151. dp_send_ack_frame_to_stack(struct dp_soc *soc,
  152. struct dp_pdev *pdev,
  153. struct hal_rx_ppdu_info *ppdu_info)
  154. {
  155. return QDF_STATUS_SUCCESS;
  156. }
  157. #endif
  158. #ifdef FEATURE_PERPKT_INFO
  159. static inline void
  160. dp_rx_populate_rx_rssi_chain(struct hal_rx_ppdu_info *ppdu_info,
  161. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  162. {
  163. uint8_t chain, bw;
  164. int8_t rssi;
  165. for (chain = 0; chain < SS_COUNT; chain++) {
  166. for (bw = 0; bw < MAX_BW; bw++) {
  167. rssi = ppdu_info->rx_status.rssi_chain[chain][bw];
  168. if (rssi != DP_RSSI_INVAL)
  169. cdp_rx_ppdu->rssi_chain[chain][bw] = rssi;
  170. else
  171. cdp_rx_ppdu->rssi_chain[chain][bw] = 0;
  172. }
  173. }
  174. }
  175. /*
  176. * dp_rx_populate_su_evm_details() - Populate su evm info
  177. * @ppdu_info: ppdu info structure from ppdu ring
  178. * @cdp_rx_ppdu: rx ppdu indication structure
  179. */
  180. static inline void
  181. dp_rx_populate_su_evm_details(struct hal_rx_ppdu_info *ppdu_info,
  182. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  183. {
  184. uint8_t pilot_evm;
  185. uint8_t nss_count;
  186. uint8_t pilot_count;
  187. nss_count = ppdu_info->evm_info.nss_count;
  188. pilot_count = ppdu_info->evm_info.pilot_count;
  189. if ((nss_count * pilot_count) > DP_RX_MAX_SU_EVM_COUNT) {
  190. qdf_err("pilot evm count is more than expected");
  191. return;
  192. }
  193. cdp_rx_ppdu->evm_info.pilot_count = pilot_count;
  194. cdp_rx_ppdu->evm_info.nss_count = nss_count;
  195. /* Populate evm for pilot_evm = nss_count*pilot_count */
  196. for (pilot_evm = 0; pilot_evm < nss_count * pilot_count; pilot_evm++) {
  197. cdp_rx_ppdu->evm_info.pilot_evm[pilot_evm] =
  198. ppdu_info->evm_info.pilot_evm[pilot_evm];
  199. }
  200. }
  201. /**
  202. * dp_rx_inc_rusize_cnt() - increment pdev stats based on RU size
  203. * @pdev: pdev ctx
  204. * @rx_user_status: mon rx user status
  205. *
  206. * Return: bool
  207. */
  208. static inline bool
  209. dp_rx_inc_rusize_cnt(struct dp_pdev *pdev,
  210. struct mon_rx_user_status *rx_user_status)
  211. {
  212. uint32_t ru_size;
  213. bool is_data;
  214. ru_size = rx_user_status->ofdma_ru_size;
  215. if (dp_is_subtype_data(rx_user_status->frame_control)) {
  216. DP_STATS_INC(pdev,
  217. ul_ofdma.data_rx_ru_size[ru_size], 1);
  218. is_data = true;
  219. } else {
  220. DP_STATS_INC(pdev,
  221. ul_ofdma.nondata_rx_ru_size[ru_size], 1);
  222. is_data = false;
  223. }
  224. return is_data;
  225. }
  226. /**
  227. * dp_rx_populate_cdp_indication_ppdu_user() - Populate per user cdp indication
  228. * @pdev: pdev ctx
  229. * @ppdu_info: ppdu info structure from ppdu ring
  230. * @cdp_rx_ppdu: Rx PPDU indication structure
  231. *
  232. * Return: none
  233. */
  234. static inline void
  235. dp_rx_populate_cdp_indication_ppdu_user(struct dp_pdev *pdev,
  236. struct hal_rx_ppdu_info *ppdu_info,
  237. struct cdp_rx_indication_ppdu
  238. *cdp_rx_ppdu)
  239. {
  240. struct dp_peer *peer;
  241. struct dp_soc *soc = pdev->soc;
  242. struct dp_ast_entry *ast_entry;
  243. uint32_t ast_index;
  244. int i;
  245. struct mon_rx_user_status *rx_user_status;
  246. struct mon_rx_user_info *rx_user_info;
  247. struct cdp_rx_stats_ppdu_user *rx_stats_peruser;
  248. int ru_size;
  249. bool is_data = false;
  250. uint32_t num_users;
  251. num_users = ppdu_info->com_info.num_users;
  252. for (i = 0; i < num_users; i++) {
  253. if (i > OFDMA_NUM_USERS)
  254. return;
  255. rx_user_status = &ppdu_info->rx_user_status[i];
  256. rx_user_info = &ppdu_info->rx_user_info[i];
  257. rx_stats_peruser = &cdp_rx_ppdu->user[i];
  258. ast_index = rx_user_status->ast_index;
  259. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  260. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  261. continue;
  262. }
  263. ast_entry = soc->ast_table[ast_index];
  264. if (!ast_entry || ast_entry->peer_id == HTT_INVALID_PEER) {
  265. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  266. continue;
  267. }
  268. peer = dp_peer_get_ref_by_id(soc, ast_entry->peer_id,
  269. DP_MOD_ID_RX_PPDU_STATS);
  270. if (!peer) {
  271. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  272. continue;
  273. }
  274. rx_stats_peruser->is_bss_peer = peer->bss_peer;
  275. rx_stats_peruser->first_data_seq_ctrl =
  276. rx_user_status->first_data_seq_ctrl;
  277. rx_stats_peruser->frame_control_info_valid =
  278. rx_user_status->frame_control_info_valid;
  279. rx_stats_peruser->frame_control =
  280. rx_user_status->frame_control;
  281. rx_stats_peruser->qos_control_info_valid =
  282. rx_user_info->qos_control_info_valid;
  283. rx_stats_peruser->qos_control =
  284. rx_user_info->qos_control;
  285. rx_stats_peruser->tcp_msdu_count =
  286. rx_user_status->tcp_msdu_count;
  287. rx_stats_peruser->udp_msdu_count =
  288. rx_user_status->udp_msdu_count;
  289. rx_stats_peruser->other_msdu_count =
  290. rx_user_status->other_msdu_count;
  291. rx_stats_peruser->num_msdu =
  292. rx_stats_peruser->tcp_msdu_count +
  293. rx_stats_peruser->udp_msdu_count +
  294. rx_stats_peruser->other_msdu_count;
  295. rx_stats_peruser->preamble_type =
  296. rx_user_status->preamble_type;
  297. rx_stats_peruser->mpdu_cnt_fcs_ok =
  298. rx_user_status->mpdu_cnt_fcs_ok;
  299. rx_stats_peruser->mpdu_cnt_fcs_err =
  300. rx_user_status->mpdu_cnt_fcs_err;
  301. qdf_mem_copy(&rx_stats_peruser->mpdu_fcs_ok_bitmap,
  302. &rx_user_status->mpdu_fcs_ok_bitmap,
  303. HAL_RX_NUM_WORDS_PER_PPDU_BITMAP *
  304. sizeof(rx_user_status->mpdu_fcs_ok_bitmap[0]));
  305. rx_stats_peruser->mpdu_ok_byte_count =
  306. rx_user_status->mpdu_ok_byte_count;
  307. rx_stats_peruser->mpdu_err_byte_count =
  308. rx_user_status->mpdu_err_byte_count;
  309. cdp_rx_ppdu->num_mpdu += rx_user_status->mpdu_cnt_fcs_ok;
  310. cdp_rx_ppdu->num_msdu += rx_stats_peruser->num_msdu;
  311. rx_stats_peruser->retries =
  312. CDP_FC_IS_RETRY_SET(rx_stats_peruser->frame_control) ?
  313. rx_stats_peruser->mpdu_cnt_fcs_ok : 0;
  314. if (rx_stats_peruser->mpdu_cnt_fcs_ok > 1)
  315. rx_stats_peruser->is_ampdu = 1;
  316. else
  317. rx_stats_peruser->is_ampdu = 0;
  318. rx_stats_peruser->tid = ppdu_info->rx_status.tid;
  319. qdf_mem_copy(rx_stats_peruser->mac_addr,
  320. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  321. rx_stats_peruser->peer_id = peer->peer_id;
  322. cdp_rx_ppdu->vdev_id = peer->vdev->vdev_id;
  323. rx_stats_peruser->vdev_id = peer->vdev->vdev_id;
  324. rx_stats_peruser->mu_ul_info_valid = 0;
  325. dp_peer_unref_delete(peer, DP_MOD_ID_RX_PPDU_STATS);
  326. if (cdp_rx_ppdu->u.ppdu_type == HAL_RX_TYPE_MU_OFDMA ||
  327. cdp_rx_ppdu->u.ppdu_type == HAL_RX_TYPE_MU_MIMO) {
  328. if (rx_user_status->mu_ul_info_valid) {
  329. rx_stats_peruser->nss = rx_user_status->nss;
  330. rx_stats_peruser->mcs = rx_user_status->mcs;
  331. rx_stats_peruser->mu_ul_info_valid =
  332. rx_user_status->mu_ul_info_valid;
  333. rx_stats_peruser->ofdma_ru_start_index =
  334. rx_user_status->ofdma_ru_start_index;
  335. rx_stats_peruser->ofdma_ru_width =
  336. rx_user_status->ofdma_ru_width;
  337. rx_stats_peruser->user_index = i;
  338. ru_size = rx_user_status->ofdma_ru_size;
  339. /*
  340. * max RU size will be equal to
  341. * HTT_UL_OFDMA_V0_RU_SIZE_RU_996x2
  342. */
  343. if (ru_size >= OFDMA_NUM_RU_SIZE) {
  344. dp_err("invalid ru_size %d\n",
  345. ru_size);
  346. return;
  347. }
  348. is_data = dp_rx_inc_rusize_cnt(pdev,
  349. rx_user_status);
  350. }
  351. if (is_data) {
  352. /* counter to get number of MU OFDMA */
  353. pdev->stats.ul_ofdma.data_rx_ppdu++;
  354. pdev->stats.ul_ofdma.data_users[num_users]++;
  355. }
  356. }
  357. }
  358. }
  359. /**
  360. * dp_rx_populate_cdp_indication_ppdu() - Populate cdp rx indication structure
  361. * @pdev: pdev ctx
  362. * @ppdu_info: ppdu info structure from ppdu ring
  363. * @cdp_rx_ppdu: Rx PPDU indication structure
  364. *
  365. * Return: none
  366. */
  367. static inline void
  368. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  369. struct hal_rx_ppdu_info *ppdu_info,
  370. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  371. {
  372. struct dp_peer *peer;
  373. struct dp_soc *soc = pdev->soc;
  374. struct dp_ast_entry *ast_entry;
  375. uint32_t ast_index;
  376. uint32_t i;
  377. cdp_rx_ppdu->first_data_seq_ctrl =
  378. ppdu_info->rx_status.first_data_seq_ctrl;
  379. cdp_rx_ppdu->frame_ctrl =
  380. ppdu_info->rx_status.frame_control;
  381. cdp_rx_ppdu->tcp_msdu_count = ppdu_info->rx_status.tcp_msdu_count;
  382. cdp_rx_ppdu->udp_msdu_count = ppdu_info->rx_status.udp_msdu_count;
  383. cdp_rx_ppdu->other_msdu_count = ppdu_info->rx_status.other_msdu_count;
  384. cdp_rx_ppdu->u.preamble = ppdu_info->rx_status.preamble_type;
  385. /* num mpdu is consolidated and added together in num user loop */
  386. cdp_rx_ppdu->num_mpdu = ppdu_info->com_info.mpdu_cnt_fcs_ok;
  387. /* num msdu is consolidated and added together in num user loop */
  388. cdp_rx_ppdu->num_msdu = (cdp_rx_ppdu->tcp_msdu_count +
  389. cdp_rx_ppdu->udp_msdu_count +
  390. cdp_rx_ppdu->other_msdu_count);
  391. cdp_rx_ppdu->retries = CDP_FC_IS_RETRY_SET(cdp_rx_ppdu->frame_ctrl) ?
  392. ppdu_info->com_info.mpdu_cnt_fcs_ok : 0;
  393. if (ppdu_info->com_info.mpdu_cnt_fcs_ok > 1)
  394. cdp_rx_ppdu->is_ampdu = 1;
  395. else
  396. cdp_rx_ppdu->is_ampdu = 0;
  397. cdp_rx_ppdu->tid = ppdu_info->rx_status.tid;
  398. ast_index = ppdu_info->rx_status.ast_index;
  399. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  400. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  401. cdp_rx_ppdu->num_users = 0;
  402. goto end;
  403. }
  404. ast_entry = soc->ast_table[ast_index];
  405. if (!ast_entry || ast_entry->peer_id == HTT_INVALID_PEER) {
  406. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  407. cdp_rx_ppdu->num_users = 0;
  408. goto end;
  409. }
  410. peer = dp_peer_get_ref_by_id(soc, ast_entry->peer_id,
  411. DP_MOD_ID_RX_PPDU_STATS);
  412. if (!peer) {
  413. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  414. cdp_rx_ppdu->num_users = 0;
  415. goto end;
  416. }
  417. qdf_mem_copy(cdp_rx_ppdu->mac_addr,
  418. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  419. cdp_rx_ppdu->peer_id = peer->peer_id;
  420. cdp_rx_ppdu->vdev_id = peer->vdev->vdev_id;
  421. cdp_rx_ppdu->ppdu_id = ppdu_info->com_info.ppdu_id;
  422. cdp_rx_ppdu->length = ppdu_info->rx_status.ppdu_len;
  423. cdp_rx_ppdu->duration = ppdu_info->rx_status.duration;
  424. cdp_rx_ppdu->u.bw = ppdu_info->rx_status.bw;
  425. cdp_rx_ppdu->u.nss = ppdu_info->rx_status.nss;
  426. cdp_rx_ppdu->u.mcs = ppdu_info->rx_status.mcs;
  427. if ((ppdu_info->rx_status.sgi == VHT_SGI_NYSM) &&
  428. (ppdu_info->rx_status.preamble_type == HAL_RX_PKT_TYPE_11AC))
  429. cdp_rx_ppdu->u.gi = CDP_SGI_0_4_US;
  430. else
  431. cdp_rx_ppdu->u.gi = ppdu_info->rx_status.sgi;
  432. cdp_rx_ppdu->u.ldpc = ppdu_info->rx_status.ldpc;
  433. cdp_rx_ppdu->u.ppdu_type = ppdu_info->rx_status.reception_type;
  434. cdp_rx_ppdu->u.ltf_size = (ppdu_info->rx_status.he_data5 >>
  435. QDF_MON_STATUS_HE_LTF_SIZE_SHIFT) & 0x3;
  436. cdp_rx_ppdu->rssi = ppdu_info->rx_status.rssi_comb;
  437. cdp_rx_ppdu->timestamp = ppdu_info->rx_status.tsft;
  438. cdp_rx_ppdu->channel = ppdu_info->rx_status.chan_num;
  439. cdp_rx_ppdu->beamformed = ppdu_info->rx_status.beamformed;
  440. cdp_rx_ppdu->num_bytes = ppdu_info->rx_status.ppdu_len;
  441. cdp_rx_ppdu->lsig_a = ppdu_info->rx_status.rate;
  442. cdp_rx_ppdu->u.ltf_size = ppdu_info->rx_status.ltf_size;
  443. dp_rx_populate_rx_rssi_chain(ppdu_info, cdp_rx_ppdu);
  444. dp_rx_populate_su_evm_details(ppdu_info, cdp_rx_ppdu);
  445. cdp_rx_ppdu->rx_antenna = ppdu_info->rx_status.rx_antenna;
  446. cdp_rx_ppdu->nf = ppdu_info->rx_status.chan_noise_floor;
  447. for (i = 0; i < MAX_CHAIN; i++)
  448. cdp_rx_ppdu->per_chain_rssi[i] = ppdu_info->rx_status.rssi[i];
  449. cdp_rx_ppdu->is_mcast_bcast = ppdu_info->nac_info.mcast_bcast;
  450. cdp_rx_ppdu->num_users = ppdu_info->com_info.num_users;
  451. cdp_rx_ppdu->num_mpdu = 0;
  452. cdp_rx_ppdu->num_msdu = 0;
  453. dp_rx_populate_cdp_indication_ppdu_user(pdev, ppdu_info, cdp_rx_ppdu);
  454. dp_peer_unref_delete(peer, DP_MOD_ID_RX_PPDU_STATS);
  455. return;
  456. end:
  457. dp_rx_populate_cfr_non_assoc_sta(pdev, ppdu_info, cdp_rx_ppdu);
  458. }
  459. #else
  460. static inline void
  461. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  462. struct hal_rx_ppdu_info *ppdu_info,
  463. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  464. {
  465. }
  466. #endif
  467. /**
  468. * dp_rx_stats_update() - Update per-peer statistics
  469. * @soc: Datapath SOC handle
  470. * @peer: Datapath peer handle
  471. * @ppdu: PPDU Descriptor
  472. *
  473. * Return: None
  474. */
  475. #ifdef FEATURE_PERPKT_INFO
  476. static inline void dp_rx_rate_stats_update(struct dp_peer *peer,
  477. struct cdp_rx_indication_ppdu *ppdu,
  478. uint32_t user)
  479. {
  480. uint32_t ratekbps = 0;
  481. uint32_t ppdu_rx_rate = 0;
  482. uint32_t nss = 0;
  483. uint8_t mcs = 0;
  484. uint32_t rix;
  485. uint16_t ratecode;
  486. struct cdp_rx_stats_ppdu_user *ppdu_user = NULL;
  487. if (!peer || !ppdu)
  488. return;
  489. if (ppdu->u.ppdu_type != HAL_RX_TYPE_SU) {
  490. ppdu_user = &ppdu->user[user];
  491. if (ppdu_user->nss == 0)
  492. nss = 0;
  493. else
  494. nss = ppdu_user->nss - 1;
  495. mcs = ppdu_user->mcs;
  496. } else {
  497. if (ppdu->u.nss == 0)
  498. nss = 0;
  499. else
  500. nss = ppdu->u.nss - 1;
  501. mcs = ppdu->u.mcs;
  502. }
  503. ratekbps = dp_getrateindex(ppdu->u.gi,
  504. mcs,
  505. nss,
  506. ppdu->u.preamble,
  507. ppdu->u.bw,
  508. &rix,
  509. &ratecode);
  510. if (!ratekbps)
  511. return;
  512. ppdu->rix = rix;
  513. DP_STATS_UPD(peer, rx.last_rx_rate, ratekbps);
  514. dp_ath_rate_lpf(peer->stats.rx.avg_rx_rate, ratekbps);
  515. ppdu_rx_rate = dp_ath_rate_out(peer->stats.rx.avg_rx_rate);
  516. DP_STATS_UPD(peer, rx.rnd_avg_rx_rate, ppdu_rx_rate);
  517. ppdu->rx_ratekbps = ratekbps;
  518. ppdu->rx_ratecode = ratecode;
  519. if (ppdu->u.ppdu_type != HAL_RX_TYPE_SU)
  520. ppdu_user->rx_ratekbps = ratekbps;
  521. if (peer->vdev)
  522. peer->vdev->stats.rx.last_rx_rate = ratekbps;
  523. }
  524. static void dp_rx_stats_update(struct dp_pdev *pdev,
  525. struct cdp_rx_indication_ppdu *ppdu)
  526. {
  527. struct dp_soc *soc = NULL;
  528. uint8_t mcs, preamble, ac = 0, nss, ppdu_type;
  529. uint16_t num_msdu;
  530. uint8_t pkt_bw_offset;
  531. struct dp_peer *peer;
  532. struct cdp_rx_stats_ppdu_user *ppdu_user;
  533. uint32_t i;
  534. enum cdp_mu_packet_type mu_pkt_type;
  535. if (pdev)
  536. soc = pdev->soc;
  537. else
  538. return;
  539. if (!soc || soc->process_rx_status)
  540. return;
  541. preamble = ppdu->u.preamble;
  542. ppdu_type = ppdu->u.ppdu_type;
  543. for (i = 0; i < ppdu->num_users && i < CDP_MU_MAX_USERS; i++) {
  544. peer = NULL;
  545. ppdu_user = &ppdu->user[i];
  546. peer = dp_peer_get_ref_by_id(soc, ppdu_user->peer_id,
  547. DP_MOD_ID_RX_PPDU_STATS);
  548. if (!peer)
  549. peer = pdev->invalid_peer;
  550. if (ppdu_type == HAL_RX_TYPE_SU) {
  551. mcs = ppdu->u.mcs;
  552. nss = ppdu->u.nss;
  553. } else {
  554. mcs = ppdu_user->mcs;
  555. nss = ppdu_user->nss;
  556. }
  557. num_msdu = ppdu_user->num_msdu;
  558. switch (ppdu->u.bw) {
  559. case CMN_BW_20MHZ:
  560. pkt_bw_offset = PKT_BW_GAIN_20MHZ;
  561. break;
  562. case CMN_BW_40MHZ:
  563. pkt_bw_offset = PKT_BW_GAIN_40MHZ;
  564. break;
  565. case CMN_BW_80MHZ:
  566. pkt_bw_offset = PKT_BW_GAIN_80MHZ;
  567. break;
  568. case CMN_BW_160MHZ:
  569. pkt_bw_offset = PKT_BW_GAIN_160MHZ;
  570. break;
  571. default:
  572. pkt_bw_offset = 0;
  573. dp_rx_mon_status_debug("%pK: Invalid BW index = %d",
  574. soc, ppdu->u.bw);
  575. }
  576. DP_STATS_UPD(peer, rx.snr, (ppdu->rssi + pkt_bw_offset));
  577. if (peer->stats.rx.avg_snr == CDP_INVALID_SNR)
  578. peer->stats.rx.avg_snr =
  579. CDP_SNR_IN(peer->stats.rx.snr);
  580. else
  581. CDP_SNR_UPDATE_AVG(peer->stats.rx.avg_snr,
  582. peer->stats.rx.snr);
  583. if ((preamble == DOT11_A) || (preamble == DOT11_B))
  584. nss = 1;
  585. if (ppdu_type == HAL_RX_TYPE_SU) {
  586. if (nss) {
  587. DP_STATS_INC(peer, rx.nss[nss - 1], num_msdu);
  588. DP_STATS_INC(peer, rx.ppdu_nss[nss - 1], 1);
  589. }
  590. DP_STATS_INC(peer, rx.mpdu_cnt_fcs_ok,
  591. ppdu_user->mpdu_cnt_fcs_ok);
  592. DP_STATS_INC(peer, rx.mpdu_cnt_fcs_err,
  593. ppdu_user->mpdu_cnt_fcs_err);
  594. }
  595. if (ppdu_type >= HAL_RX_TYPE_MU_MIMO &&
  596. ppdu_type <= HAL_RX_TYPE_MU_OFDMA) {
  597. if (ppdu_type == HAL_RX_TYPE_MU_MIMO)
  598. mu_pkt_type = RX_TYPE_MU_MIMO;
  599. else
  600. mu_pkt_type = RX_TYPE_MU_OFDMA;
  601. if (nss) {
  602. DP_STATS_INC(peer, rx.nss[nss - 1], num_msdu);
  603. DP_STATS_INC(peer,
  604. rx.rx_mu[mu_pkt_type].ppdu_nss[nss - 1],
  605. 1);
  606. }
  607. DP_STATS_INC(peer,
  608. rx.rx_mu[mu_pkt_type].mpdu_cnt_fcs_ok,
  609. ppdu_user->mpdu_cnt_fcs_ok);
  610. DP_STATS_INC(peer,
  611. rx.rx_mu[mu_pkt_type].mpdu_cnt_fcs_err,
  612. ppdu_user->mpdu_cnt_fcs_err);
  613. }
  614. DP_STATS_INC(peer, rx.sgi_count[ppdu->u.gi], num_msdu);
  615. DP_STATS_INC(peer, rx.bw[ppdu->u.bw], num_msdu);
  616. DP_STATS_INC(peer, rx.reception_type[ppdu->u.ppdu_type],
  617. num_msdu);
  618. DP_STATS_INC(peer, rx.ppdu_cnt[ppdu->u.ppdu_type], 1);
  619. DP_STATS_INCC(peer, rx.ampdu_cnt, num_msdu,
  620. ppdu_user->is_ampdu);
  621. DP_STATS_INCC(peer, rx.non_ampdu_cnt, num_msdu,
  622. !(ppdu_user->is_ampdu));
  623. DP_STATS_UPD(peer, rx.rx_rate, mcs);
  624. DP_STATS_INCC(peer,
  625. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  626. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_A)));
  627. DP_STATS_INCC(peer,
  628. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  629. ((mcs < MAX_MCS_11A) && (preamble == DOT11_A)));
  630. DP_STATS_INCC(peer,
  631. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  632. ((mcs >= MAX_MCS_11B) && (preamble == DOT11_B)));
  633. DP_STATS_INCC(peer,
  634. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  635. ((mcs < MAX_MCS_11B) && (preamble == DOT11_B)));
  636. DP_STATS_INCC(peer,
  637. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  638. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_N)));
  639. DP_STATS_INCC(peer,
  640. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  641. ((mcs < MAX_MCS_11A) && (preamble == DOT11_N)));
  642. DP_STATS_INCC(peer,
  643. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  644. ((mcs >= MAX_MCS_11AC) && (preamble == DOT11_AC)));
  645. DP_STATS_INCC(peer,
  646. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  647. ((mcs < MAX_MCS_11AC) && (preamble == DOT11_AC)));
  648. DP_STATS_INCC(peer,
  649. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  650. ((mcs >= (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  651. DP_STATS_INCC(peer,
  652. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  653. ((mcs < (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  654. DP_STATS_INCC(peer,
  655. rx.su_ax_ppdu_cnt.mcs_count[MAX_MCS - 1], 1,
  656. ((mcs >= (MAX_MCS - 1)) && (preamble == DOT11_AX) &&
  657. (ppdu_type == HAL_RX_TYPE_SU)));
  658. DP_STATS_INCC(peer,
  659. rx.su_ax_ppdu_cnt.mcs_count[mcs], 1,
  660. ((mcs < (MAX_MCS - 1)) && (preamble == DOT11_AX) &&
  661. (ppdu_type == HAL_RX_TYPE_SU)));
  662. DP_STATS_INCC(peer,
  663. rx.rx_mu[RX_TYPE_MU_OFDMA].ppdu.mcs_count[MAX_MCS - 1],
  664. 1, ((mcs >= (MAX_MCS - 1)) &&
  665. (preamble == DOT11_AX) &&
  666. (ppdu_type == HAL_RX_TYPE_MU_OFDMA)));
  667. DP_STATS_INCC(peer,
  668. rx.rx_mu[RX_TYPE_MU_OFDMA].ppdu.mcs_count[mcs],
  669. 1, ((mcs < (MAX_MCS - 1)) &&
  670. (preamble == DOT11_AX) &&
  671. (ppdu_type == HAL_RX_TYPE_MU_OFDMA)));
  672. DP_STATS_INCC(peer,
  673. rx.rx_mu[RX_TYPE_MU_MIMO].ppdu.mcs_count[MAX_MCS - 1],
  674. 1, ((mcs >= (MAX_MCS - 1)) &&
  675. (preamble == DOT11_AX) &&
  676. (ppdu_type == HAL_RX_TYPE_MU_MIMO)));
  677. DP_STATS_INCC(peer,
  678. rx.rx_mu[RX_TYPE_MU_MIMO].ppdu.mcs_count[mcs],
  679. 1, ((mcs < (MAX_MCS - 1)) &&
  680. (preamble == DOT11_AX) &&
  681. (ppdu_type == HAL_RX_TYPE_MU_MIMO)));
  682. /*
  683. * If invalid TID, it could be a non-qos frame, hence do not
  684. * update any AC counters
  685. */
  686. ac = TID_TO_WME_AC(ppdu_user->tid);
  687. if (ppdu->tid != HAL_TID_INVALID)
  688. DP_STATS_INC(peer, rx.wme_ac_type[ac], num_msdu);
  689. dp_peer_stats_notify(pdev, peer);
  690. DP_STATS_UPD(peer, rx.last_snr, ppdu->rssi);
  691. dp_peer_qos_stats_notify(pdev, ppdu_user);
  692. if (peer == pdev->invalid_peer)
  693. continue;
  694. if (dp_is_subtype_data(ppdu->frame_ctrl))
  695. dp_rx_rate_stats_update(peer, ppdu, i);
  696. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  697. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, pdev->soc,
  698. &peer->stats, ppdu->peer_id,
  699. UPDATE_PEER_STATS, pdev->pdev_id);
  700. #endif
  701. dp_peer_unref_delete(peer, DP_MOD_ID_RX_PPDU_STATS);
  702. }
  703. }
  704. #endif
  705. /**
  706. * dp_rx_handle_mcopy_mode() - Allocate and deliver first MSDU payload
  707. * @soc: core txrx main context
  708. * @pdev: pdev structure
  709. * @ppdu_info: structure for rx ppdu ring
  710. * @nbuf: QDF nbuf
  711. * @fcs_ok_mpdu_cnt: fcs passsed mpdu index
  712. * @deliver_frame: flag to deliver wdi event
  713. *
  714. * Return: QDF_STATUS_SUCCESS - If nbuf to be freed by caller
  715. * QDF_STATUS_E_ALREADY - If nbuf not to be freed by caller
  716. */
  717. #ifdef FEATURE_PERPKT_INFO
  718. static inline QDF_STATUS
  719. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  720. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf,
  721. uint8_t fcs_ok_mpdu_cnt, bool deliver_frame)
  722. {
  723. uint16_t size = 0;
  724. struct ieee80211_frame *wh;
  725. uint32_t *nbuf_data;
  726. if (!ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].first_msdu_payload)
  727. return QDF_STATUS_SUCCESS;
  728. /* For M_COPY mode only one msdu per ppdu is sent to upper layer*/
  729. if (pdev->mcopy_mode == M_COPY) {
  730. if (pdev->m_copy_id.rx_ppdu_id == ppdu_info->com_info.ppdu_id)
  731. return QDF_STATUS_SUCCESS;
  732. }
  733. wh = (struct ieee80211_frame *)(ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].first_msdu_payload + 4);
  734. size = (ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].first_msdu_payload -
  735. qdf_nbuf_data(nbuf));
  736. if (qdf_nbuf_pull_head(nbuf, size) == NULL)
  737. return QDF_STATUS_SUCCESS;
  738. if (((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  739. IEEE80211_FC0_TYPE_MGT) ||
  740. ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  741. IEEE80211_FC0_TYPE_CTL)) {
  742. return QDF_STATUS_SUCCESS;
  743. }
  744. nbuf_data = (uint32_t *)qdf_nbuf_data(nbuf);
  745. *nbuf_data = pdev->ppdu_info.com_info.ppdu_id;
  746. /* only retain RX MSDU payload in the skb */
  747. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) - ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].payload_len);
  748. if (deliver_frame) {
  749. pdev->m_copy_id.rx_ppdu_id = ppdu_info->com_info.ppdu_id;
  750. dp_wdi_event_handler(WDI_EVENT_RX_DATA, soc,
  751. nbuf, HTT_INVALID_PEER,
  752. WDI_NO_VAL, pdev->pdev_id);
  753. }
  754. return QDF_STATUS_E_ALREADY;
  755. }
  756. #else
  757. static inline QDF_STATUS
  758. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  759. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf,
  760. uint8_t fcs_ok_cnt, bool deliver_frame)
  761. {
  762. return QDF_STATUS_SUCCESS;
  763. }
  764. #endif
  765. /**
  766. * dp_rx_mcopy_handle_last_mpdu() - cache and delive last MPDU header in a
  767. * status buffer if MPDU end tlv is received in different buffer
  768. * @soc: core txrx main context
  769. * @pdev: pdev structure
  770. * @ppdu_info: structure for rx ppdu ring
  771. * @status_nbuf: QDF nbuf
  772. *
  773. * Return: void
  774. */
  775. #ifdef FEATURE_PERPKT_INFO
  776. static inline void
  777. dp_rx_mcopy_handle_last_mpdu(struct dp_soc *soc, struct dp_pdev *pdev,
  778. struct hal_rx_ppdu_info *ppdu_info,
  779. qdf_nbuf_t status_nbuf)
  780. {
  781. QDF_STATUS mcopy_status;
  782. qdf_nbuf_t nbuf_clone = NULL;
  783. /* If the MPDU end tlv and RX header are received in different buffers,
  784. * process the RX header based on fcs status.
  785. */
  786. if (pdev->mcopy_status_nbuf) {
  787. /* For M_COPY mode only one msdu per ppdu is sent to upper layer*/
  788. if (pdev->mcopy_mode == M_COPY) {
  789. if (pdev->m_copy_id.rx_ppdu_id ==
  790. ppdu_info->com_info.ppdu_id)
  791. goto end1;
  792. }
  793. if (ppdu_info->is_fcs_passed) {
  794. nbuf_clone = qdf_nbuf_clone(pdev->mcopy_status_nbuf);
  795. if (!nbuf_clone) {
  796. QDF_TRACE(QDF_MODULE_ID_TXRX,
  797. QDF_TRACE_LEVEL_ERROR,
  798. "Failed to clone nbuf");
  799. goto end1;
  800. }
  801. pdev->m_copy_id.rx_ppdu_id = ppdu_info->com_info.ppdu_id;
  802. dp_wdi_event_handler(WDI_EVENT_RX_DATA, soc,
  803. nbuf_clone,
  804. HTT_INVALID_PEER,
  805. WDI_NO_VAL, pdev->pdev_id);
  806. ppdu_info->is_fcs_passed = false;
  807. }
  808. end1:
  809. qdf_nbuf_free(pdev->mcopy_status_nbuf);
  810. pdev->mcopy_status_nbuf = NULL;
  811. }
  812. /* If the MPDU end tlv and RX header are received in different buffers,
  813. * preserve the RX header as the fcs status will be received in MPDU
  814. * end tlv in next buffer. So, cache the buffer to be processd in next
  815. * iteration
  816. */
  817. if ((ppdu_info->fcs_ok_cnt + ppdu_info->fcs_err_cnt) !=
  818. ppdu_info->com_info.mpdu_cnt) {
  819. pdev->mcopy_status_nbuf = qdf_nbuf_clone(status_nbuf);
  820. if (pdev->mcopy_status_nbuf) {
  821. mcopy_status = dp_rx_handle_mcopy_mode(
  822. soc, pdev,
  823. ppdu_info,
  824. pdev->mcopy_status_nbuf,
  825. ppdu_info->fcs_ok_cnt,
  826. false);
  827. if (mcopy_status == QDF_STATUS_SUCCESS) {
  828. qdf_nbuf_free(pdev->mcopy_status_nbuf);
  829. pdev->mcopy_status_nbuf = NULL;
  830. }
  831. }
  832. }
  833. }
  834. #else
  835. static inline void
  836. dp_rx_mcopy_handle_last_mpdu(struct dp_soc *soc, struct dp_pdev *pdev,
  837. struct hal_rx_ppdu_info *ppdu_info,
  838. qdf_nbuf_t status_nbuf)
  839. {
  840. }
  841. #endif
  842. /**
  843. * dp_rx_mcopy_process_ppdu_info() - update mcopy ppdu info
  844. * @ppdu_info: structure for rx ppdu ring
  845. * @tlv_status: processed TLV status
  846. *
  847. * Return: void
  848. */
  849. #ifdef FEATURE_PERPKT_INFO
  850. static inline void
  851. dp_rx_mcopy_process_ppdu_info(struct dp_pdev *pdev,
  852. struct hal_rx_ppdu_info *ppdu_info,
  853. uint32_t tlv_status)
  854. {
  855. if (!pdev->mcopy_mode)
  856. return;
  857. /* The fcs status is received in MPDU end tlv. If the RX header
  858. * and its MPDU end tlv are received in different status buffer then
  859. * to process that header ppdu_info->is_fcs_passed is used.
  860. * If end tlv is received in next status buffer then com_info.mpdu_cnt
  861. * will be 0 at the time of receiving MPDU end tlv and we update the
  862. * is_fcs_passed flag based on ppdu_info->fcs_err.
  863. */
  864. if (tlv_status != HAL_TLV_STATUS_MPDU_END)
  865. return;
  866. if (!ppdu_info->fcs_err) {
  867. if (ppdu_info->fcs_ok_cnt >
  868. HAL_RX_MAX_MPDU_H_PER_STATUS_BUFFER) {
  869. dp_err("No. of MPDUs(%d) per status buff exceeded",
  870. ppdu_info->fcs_ok_cnt);
  871. return;
  872. }
  873. if (ppdu_info->com_info.mpdu_cnt)
  874. ppdu_info->fcs_ok_cnt++;
  875. else
  876. ppdu_info->is_fcs_passed = true;
  877. } else {
  878. if (ppdu_info->com_info.mpdu_cnt)
  879. ppdu_info->fcs_err_cnt++;
  880. else
  881. ppdu_info->is_fcs_passed = false;
  882. }
  883. }
  884. #else
  885. static inline void
  886. dp_rx_mcopy_process_ppdu_info(struct dp_pdev *pdev,
  887. struct hal_rx_ppdu_info *ppdu_info,
  888. uint32_t tlv_status)
  889. {
  890. }
  891. #endif
  892. #ifdef FEATURE_PERPKT_INFO
  893. static inline void
  894. dp_rx_process_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  895. struct hal_rx_ppdu_info *ppdu_info,
  896. uint32_t tlv_status,
  897. qdf_nbuf_t status_nbuf)
  898. {
  899. QDF_STATUS mcopy_status;
  900. qdf_nbuf_t nbuf_clone = NULL;
  901. uint8_t fcs_ok_mpdu_cnt = 0;
  902. dp_rx_mcopy_handle_last_mpdu(soc, pdev, ppdu_info, status_nbuf);
  903. if (qdf_unlikely(!ppdu_info->com_info.mpdu_cnt))
  904. goto end;
  905. if (qdf_unlikely(!ppdu_info->fcs_ok_cnt))
  906. goto end;
  907. /* For M_COPY mode only one msdu per ppdu is sent to upper layer*/
  908. if (pdev->mcopy_mode == M_COPY)
  909. ppdu_info->fcs_ok_cnt = 1;
  910. while (fcs_ok_mpdu_cnt < ppdu_info->fcs_ok_cnt) {
  911. nbuf_clone = qdf_nbuf_clone(status_nbuf);
  912. if (!nbuf_clone) {
  913. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  914. "Failed to clone nbuf");
  915. goto end;
  916. }
  917. mcopy_status = dp_rx_handle_mcopy_mode(soc, pdev,
  918. ppdu_info,
  919. nbuf_clone,
  920. fcs_ok_mpdu_cnt,
  921. true);
  922. if (mcopy_status == QDF_STATUS_SUCCESS)
  923. qdf_nbuf_free(nbuf_clone);
  924. fcs_ok_mpdu_cnt++;
  925. }
  926. end:
  927. qdf_nbuf_free(status_nbuf);
  928. ppdu_info->fcs_ok_cnt = 0;
  929. ppdu_info->fcs_err_cnt = 0;
  930. ppdu_info->com_info.mpdu_cnt = 0;
  931. qdf_mem_zero(&ppdu_info->ppdu_msdu_info,
  932. HAL_RX_MAX_MPDU_H_PER_STATUS_BUFFER
  933. * sizeof(struct hal_rx_msdu_payload_info));
  934. }
  935. #else
  936. static inline void
  937. dp_rx_process_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  938. struct hal_rx_ppdu_info *ppdu_info,
  939. uint32_t tlv_status,
  940. qdf_nbuf_t status_nbuf)
  941. {
  942. }
  943. #endif
  944. /**
  945. * dp_rx_handle_smart_mesh_mode() - Deliver header for smart mesh
  946. * @soc: Datapath SOC handle
  947. * @pdev: Datapath PDEV handle
  948. * @ppdu_info: Structure for rx ppdu info
  949. * @nbuf: Qdf nbuf abstraction for linux skb
  950. *
  951. * Return: 0 on success, 1 on failure
  952. */
  953. static inline int
  954. dp_rx_handle_smart_mesh_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  955. struct hal_rx_ppdu_info *ppdu_info,
  956. qdf_nbuf_t nbuf)
  957. {
  958. uint8_t size = 0;
  959. if (!pdev->monitor_vdev) {
  960. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  961. "[%s]:[%d] Monitor vdev is NULL !!",
  962. __func__, __LINE__);
  963. return 1;
  964. }
  965. if (!ppdu_info->msdu_info.first_msdu_payload) {
  966. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  967. "[%s]:[%d] First msdu payload not present",
  968. __func__, __LINE__);
  969. return 1;
  970. }
  971. /* Adding 4 bytes to get to start of 802.11 frame after phy_ppdu_id */
  972. size = (ppdu_info->msdu_info.first_msdu_payload -
  973. qdf_nbuf_data(nbuf)) + 4;
  974. ppdu_info->msdu_info.first_msdu_payload = NULL;
  975. if (qdf_nbuf_pull_head(nbuf, size) == NULL) {
  976. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  977. "[%s]:[%d] No header present",
  978. __func__, __LINE__);
  979. return 1;
  980. }
  981. /* Only retain RX MSDU payload in the skb */
  982. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) -
  983. ppdu_info->msdu_info.payload_len);
  984. if (!qdf_nbuf_update_radiotap(&pdev->ppdu_info.rx_status, nbuf,
  985. qdf_nbuf_headroom(nbuf))) {
  986. DP_STATS_INC(pdev, dropped.mon_radiotap_update_err, 1);
  987. return 1;
  988. }
  989. pdev->monitor_vdev->osif_rx_mon(pdev->monitor_vdev->osif_vdev,
  990. nbuf, NULL);
  991. pdev->ppdu_info.rx_status.monitor_direct_used = 0;
  992. return 0;
  993. }
  994. #if defined(WLAN_CFR_ENABLE) && defined(WLAN_ENH_CFR_ENABLE)
  995. /*
  996. * dp_rx_mon_handle_cfr_mu_info() - Gather macaddr and ast_index of peer(s) in
  997. * the PPDU received, this will be used for correlation of CFR data captured
  998. * for an UL-MU-PPDU
  999. * @pdev: pdev ctx
  1000. * @ppdu_info: pointer to ppdu info structure populated from ppdu status TLVs
  1001. * @cdp_rx_ppdu: Rx PPDU indication structure
  1002. *
  1003. * Return: none
  1004. */
  1005. static inline void
  1006. dp_rx_mon_handle_cfr_mu_info(struct dp_pdev *pdev,
  1007. struct hal_rx_ppdu_info *ppdu_info,
  1008. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1009. {
  1010. struct dp_peer *peer;
  1011. struct dp_soc *soc = pdev->soc;
  1012. struct dp_ast_entry *ast_entry;
  1013. struct mon_rx_user_status *rx_user_status;
  1014. struct cdp_rx_stats_ppdu_user *rx_stats_peruser;
  1015. uint32_t num_users;
  1016. int user_id;
  1017. uint32_t ast_index;
  1018. qdf_spin_lock_bh(&soc->ast_lock);
  1019. num_users = ppdu_info->com_info.num_users;
  1020. for (user_id = 0; user_id < num_users; user_id++) {
  1021. if (user_id > OFDMA_NUM_USERS) {
  1022. qdf_spin_unlock_bh(&soc->ast_lock);
  1023. return;
  1024. }
  1025. rx_user_status = &ppdu_info->rx_user_status[user_id];
  1026. rx_stats_peruser = &cdp_rx_ppdu->user[user_id];
  1027. ast_index = rx_user_status->ast_index;
  1028. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  1029. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  1030. continue;
  1031. }
  1032. ast_entry = soc->ast_table[ast_index];
  1033. if (!ast_entry || ast_entry->peer_id == HTT_INVALID_PEER) {
  1034. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  1035. continue;
  1036. }
  1037. peer = dp_peer_get_ref_by_id(soc, ast_entry->peer_id,
  1038. DP_MOD_ID_RX_PPDU_STATS);
  1039. if (!peer) {
  1040. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  1041. continue;
  1042. }
  1043. qdf_mem_copy(rx_stats_peruser->mac_addr,
  1044. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  1045. dp_peer_unref_delete(peer, DP_MOD_ID_RX_PPDU_STATS);
  1046. }
  1047. qdf_spin_unlock_bh(&soc->ast_lock);
  1048. }
  1049. /*
  1050. * dp_rx_mon_populate_cfr_ppdu_info() - Populate cdp ppdu info from hal ppdu
  1051. * info
  1052. * @pdev: pdev ctx
  1053. * @ppdu_info: ppdu info structure from ppdu ring
  1054. * @cdp_rx_ppdu : Rx PPDU indication structure
  1055. *
  1056. * Return: none
  1057. */
  1058. static inline void
  1059. dp_rx_mon_populate_cfr_ppdu_info(struct dp_pdev *pdev,
  1060. struct hal_rx_ppdu_info *ppdu_info,
  1061. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1062. {
  1063. int chain;
  1064. cdp_rx_ppdu->ppdu_id = ppdu_info->com_info.ppdu_id;
  1065. cdp_rx_ppdu->timestamp = ppdu_info->rx_status.tsft;
  1066. cdp_rx_ppdu->u.ppdu_type = ppdu_info->rx_status.reception_type;
  1067. cdp_rx_ppdu->num_users = ppdu_info->com_info.num_users;
  1068. for (chain = 0; chain < MAX_CHAIN; chain++)
  1069. cdp_rx_ppdu->per_chain_rssi[chain] =
  1070. ppdu_info->rx_status.rssi[chain];
  1071. dp_rx_mon_handle_cfr_mu_info(pdev, ppdu_info, cdp_rx_ppdu);
  1072. }
  1073. /**
  1074. * dp_cfr_rcc_mode_status() - Return status of cfr rcc mode
  1075. * @pdev: pdev ctx
  1076. *
  1077. * Return: True or False
  1078. */
  1079. static inline bool
  1080. dp_cfr_rcc_mode_status(struct dp_pdev *pdev)
  1081. {
  1082. return pdev->cfr_rcc_mode;
  1083. }
  1084. /*
  1085. * dp_rx_mon_populate_cfr_info() - Populate cdp ppdu info from hal cfr info
  1086. * @pdev: pdev ctx
  1087. * @ppdu_info: ppdu info structure from ppdu ring
  1088. * @cdp_rx_ppdu: Rx PPDU indication structure
  1089. *
  1090. * Return: none
  1091. */
  1092. static inline void
  1093. dp_rx_mon_populate_cfr_info(struct dp_pdev *pdev,
  1094. struct hal_rx_ppdu_info *ppdu_info,
  1095. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1096. {
  1097. struct cdp_rx_ppdu_cfr_info *cfr_info;
  1098. if (!dp_cfr_rcc_mode_status(pdev))
  1099. return;
  1100. cfr_info = &cdp_rx_ppdu->cfr_info;
  1101. cfr_info->bb_captured_channel
  1102. = ppdu_info->cfr_info.bb_captured_channel;
  1103. cfr_info->bb_captured_timeout
  1104. = ppdu_info->cfr_info.bb_captured_timeout;
  1105. cfr_info->bb_captured_reason
  1106. = ppdu_info->cfr_info.bb_captured_reason;
  1107. cfr_info->rx_location_info_valid
  1108. = ppdu_info->cfr_info.rx_location_info_valid;
  1109. cfr_info->chan_capture_status
  1110. = ppdu_info->cfr_info.chan_capture_status;
  1111. cfr_info->rtt_che_buffer_pointer_high8
  1112. = ppdu_info->cfr_info.rtt_che_buffer_pointer_high8;
  1113. cfr_info->rtt_che_buffer_pointer_low32
  1114. = ppdu_info->cfr_info.rtt_che_buffer_pointer_low32;
  1115. cfr_info->rtt_cfo_measurement
  1116. = (int16_t)ppdu_info->cfr_info.rtt_cfo_measurement;
  1117. cfr_info->agc_gain_info0
  1118. = ppdu_info->cfr_info.agc_gain_info0;
  1119. cfr_info->agc_gain_info1
  1120. = ppdu_info->cfr_info.agc_gain_info1;
  1121. cfr_info->agc_gain_info2
  1122. = ppdu_info->cfr_info.agc_gain_info2;
  1123. cfr_info->agc_gain_info3
  1124. = ppdu_info->cfr_info.agc_gain_info3;
  1125. cfr_info->rx_start_ts
  1126. = ppdu_info->cfr_info.rx_start_ts;
  1127. }
  1128. /**
  1129. * dp_update_cfr_dbg_stats() - Increment RCC debug statistics
  1130. * @pdev: pdev structure
  1131. * @ppdu_info: structure for rx ppdu ring
  1132. *
  1133. * Return: none
  1134. */
  1135. static inline void
  1136. dp_update_cfr_dbg_stats(struct dp_pdev *pdev,
  1137. struct hal_rx_ppdu_info *ppdu_info)
  1138. {
  1139. struct hal_rx_ppdu_cfr_info *cfr = &ppdu_info->cfr_info;
  1140. DP_STATS_INC(pdev,
  1141. rcc.chan_capture_status[cfr->chan_capture_status], 1);
  1142. if (cfr->rx_location_info_valid) {
  1143. DP_STATS_INC(pdev, rcc.rx_loc_info_valid_cnt, 1);
  1144. if (cfr->bb_captured_channel) {
  1145. DP_STATS_INC(pdev, rcc.bb_captured_channel_cnt, 1);
  1146. DP_STATS_INC(pdev,
  1147. rcc.reason_cnt[cfr->bb_captured_reason],
  1148. 1);
  1149. } else if (cfr->bb_captured_timeout) {
  1150. DP_STATS_INC(pdev, rcc.bb_captured_timeout_cnt, 1);
  1151. DP_STATS_INC(pdev,
  1152. rcc.reason_cnt[cfr->bb_captured_reason],
  1153. 1);
  1154. }
  1155. }
  1156. }
  1157. /*
  1158. * dp_rx_handle_cfr() - Gather cfr info from hal ppdu info
  1159. * @soc: core txrx main context
  1160. * @pdev: pdev ctx
  1161. * @ppdu_info: ppdu info structure from ppdu ring
  1162. *
  1163. * Return: none
  1164. */
  1165. static inline void
  1166. dp_rx_handle_cfr(struct dp_soc *soc, struct dp_pdev *pdev,
  1167. struct hal_rx_ppdu_info *ppdu_info)
  1168. {
  1169. qdf_nbuf_t ppdu_nbuf;
  1170. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  1171. dp_update_cfr_dbg_stats(pdev, ppdu_info);
  1172. if (!ppdu_info->cfr_info.bb_captured_channel)
  1173. return;
  1174. ppdu_nbuf = qdf_nbuf_alloc(soc->osdev,
  1175. sizeof(struct cdp_rx_indication_ppdu),
  1176. 0,
  1177. 0,
  1178. FALSE);
  1179. if (ppdu_nbuf) {
  1180. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  1181. dp_rx_mon_populate_cfr_info(pdev, ppdu_info, cdp_rx_ppdu);
  1182. dp_rx_mon_populate_cfr_ppdu_info(pdev, ppdu_info, cdp_rx_ppdu);
  1183. qdf_nbuf_put_tail(ppdu_nbuf,
  1184. sizeof(struct cdp_rx_indication_ppdu));
  1185. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC, soc,
  1186. ppdu_nbuf, HTT_INVALID_PEER,
  1187. WDI_NO_VAL, pdev->pdev_id);
  1188. }
  1189. }
  1190. /**
  1191. * dp_rx_populate_cfr_non_assoc_sta() - Populate cfr ppdu info for PPDUs from
  1192. * non-associated stations
  1193. * @pdev: pdev ctx
  1194. * @ppdu_info: ppdu info structure from ppdu ring
  1195. * @cdp_rx_ppdu: Rx PPDU indication structure
  1196. *
  1197. * Return: none
  1198. */
  1199. static inline void
  1200. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  1201. struct hal_rx_ppdu_info *ppdu_info,
  1202. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1203. {
  1204. if (!dp_cfr_rcc_mode_status(pdev))
  1205. return;
  1206. if (ppdu_info->cfr_info.bb_captured_channel)
  1207. dp_rx_mon_populate_cfr_ppdu_info(pdev, ppdu_info, cdp_rx_ppdu);
  1208. }
  1209. /**
  1210. * dp_bb_captured_chan_status() - Get the bb_captured_channel status
  1211. * @ppdu_info: structure for rx ppdu ring
  1212. *
  1213. * Return: Success/ Failure
  1214. */
  1215. static inline QDF_STATUS
  1216. dp_bb_captured_chan_status(struct dp_pdev *pdev,
  1217. struct hal_rx_ppdu_info *ppdu_info)
  1218. {
  1219. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  1220. struct hal_rx_ppdu_cfr_info *cfr = &ppdu_info->cfr_info;
  1221. if (dp_cfr_rcc_mode_status(pdev)) {
  1222. if (cfr->bb_captured_channel)
  1223. status = QDF_STATUS_SUCCESS;
  1224. }
  1225. return status;
  1226. }
  1227. #else
  1228. static inline void
  1229. dp_rx_mon_handle_cfr_mu_info(struct dp_pdev *pdev,
  1230. struct hal_rx_ppdu_info *ppdu_info,
  1231. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1232. {
  1233. }
  1234. static inline void
  1235. dp_rx_mon_populate_cfr_ppdu_info(struct dp_pdev *pdev,
  1236. struct hal_rx_ppdu_info *ppdu_info,
  1237. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1238. {
  1239. }
  1240. static inline void
  1241. dp_rx_mon_populate_cfr_info(struct dp_pdev *pdev,
  1242. struct hal_rx_ppdu_info *ppdu_info,
  1243. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1244. {
  1245. }
  1246. static inline void
  1247. dp_rx_handle_cfr(struct dp_soc *soc, struct dp_pdev *pdev,
  1248. struct hal_rx_ppdu_info *ppdu_info)
  1249. {
  1250. }
  1251. static inline void
  1252. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  1253. struct hal_rx_ppdu_info *ppdu_info,
  1254. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1255. {
  1256. }
  1257. static inline void
  1258. dp_update_cfr_dbg_stats(struct dp_pdev *pdev,
  1259. struct hal_rx_ppdu_info *ppdu_info)
  1260. {
  1261. }
  1262. static inline QDF_STATUS
  1263. dp_bb_captured_chan_status(struct dp_pdev *pdev,
  1264. struct hal_rx_ppdu_info *ppdu_info)
  1265. {
  1266. return QDF_STATUS_E_NOSUPPORT;
  1267. }
  1268. static inline bool
  1269. dp_cfr_rcc_mode_status(struct dp_pdev *pdev)
  1270. {
  1271. return false;
  1272. }
  1273. #endif
  1274. /**
  1275. * dp_rx_handle_ppdu_stats() - Allocate and deliver ppdu stats to cdp layer
  1276. * @soc: core txrx main context
  1277. * @pdev: pdev strcuture
  1278. * @ppdu_info: structure for rx ppdu ring
  1279. *
  1280. * Return: none
  1281. */
  1282. #ifdef FEATURE_PERPKT_INFO
  1283. static inline void
  1284. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  1285. struct hal_rx_ppdu_info *ppdu_info)
  1286. {
  1287. qdf_nbuf_t ppdu_nbuf;
  1288. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  1289. /*
  1290. * Do not allocate if fcs error,
  1291. * ast idx invalid / fctl invalid
  1292. *
  1293. * In CFR RCC mode - PPDU status TLVs of error pkts are also needed
  1294. */
  1295. if (ppdu_info->com_info.mpdu_cnt_fcs_ok == 0)
  1296. return;
  1297. if (ppdu_info->nac_info.fc_valid &&
  1298. ppdu_info->nac_info.to_ds_flag &&
  1299. ppdu_info->nac_info.mac_addr2_valid) {
  1300. struct dp_neighbour_peer *peer = NULL;
  1301. uint8_t rssi = ppdu_info->rx_status.rssi_comb;
  1302. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  1303. if (pdev->neighbour_peers_added) {
  1304. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  1305. neighbour_peer_list_elem) {
  1306. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr,
  1307. &ppdu_info->nac_info.mac_addr2,
  1308. QDF_MAC_ADDR_SIZE)) {
  1309. peer->rssi = rssi;
  1310. break;
  1311. }
  1312. }
  1313. }
  1314. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  1315. }
  1316. /* need not generate wdi event when mcopy, cfr rcc mode and
  1317. * enhanced stats are not enabled
  1318. */
  1319. if (!pdev->mcopy_mode && !pdev->enhanced_stats_en &&
  1320. !dp_cfr_rcc_mode_status(pdev))
  1321. return;
  1322. if (dp_cfr_rcc_mode_status(pdev))
  1323. dp_update_cfr_dbg_stats(pdev, ppdu_info);
  1324. if (!ppdu_info->rx_status.frame_control_info_valid ||
  1325. (ppdu_info->rx_status.ast_index == HAL_AST_IDX_INVALID)) {
  1326. if (!(pdev->mcopy_mode ||
  1327. (dp_bb_captured_chan_status(pdev, ppdu_info) ==
  1328. QDF_STATUS_SUCCESS)))
  1329. return;
  1330. }
  1331. ppdu_nbuf = qdf_nbuf_alloc(soc->osdev,
  1332. sizeof(struct cdp_rx_indication_ppdu),
  1333. 0, 0, FALSE);
  1334. if (ppdu_nbuf) {
  1335. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  1336. dp_rx_mon_populate_cfr_info(pdev, ppdu_info, cdp_rx_ppdu);
  1337. dp_rx_populate_cdp_indication_ppdu(pdev,
  1338. ppdu_info, cdp_rx_ppdu);
  1339. if (!qdf_nbuf_put_tail(ppdu_nbuf,
  1340. sizeof(struct cdp_rx_indication_ppdu)))
  1341. return;
  1342. dp_rx_stats_update(pdev, cdp_rx_ppdu);
  1343. if (cdp_rx_ppdu->peer_id != HTT_INVALID_PEER) {
  1344. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC,
  1345. soc, ppdu_nbuf,
  1346. cdp_rx_ppdu->peer_id,
  1347. WDI_NO_VAL, pdev->pdev_id);
  1348. } else if (pdev->mcopy_mode || dp_cfr_rcc_mode_status(pdev)) {
  1349. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC, soc,
  1350. ppdu_nbuf, HTT_INVALID_PEER,
  1351. WDI_NO_VAL, pdev->pdev_id);
  1352. } else {
  1353. qdf_nbuf_free(ppdu_nbuf);
  1354. }
  1355. }
  1356. }
  1357. #else
  1358. static inline void
  1359. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  1360. struct hal_rx_ppdu_info *ppdu_info)
  1361. {
  1362. }
  1363. #endif
  1364. /**
  1365. * dp_rx_process_peer_based_pktlog() - Process Rx pktlog if peer based
  1366. * filtering enabled
  1367. * @soc: core txrx main context
  1368. * @ppdu_info: Structure for rx ppdu info
  1369. * @status_nbuf: Qdf nbuf abstraction for linux skb
  1370. * @pdev_id: mac_id/pdev_id correspondinggly for MCL and WIN
  1371. *
  1372. * Return: none
  1373. */
  1374. static inline void
  1375. dp_rx_process_peer_based_pktlog(struct dp_soc *soc,
  1376. struct hal_rx_ppdu_info *ppdu_info,
  1377. qdf_nbuf_t status_nbuf, uint32_t pdev_id)
  1378. {
  1379. struct dp_peer *peer;
  1380. struct dp_ast_entry *ast_entry;
  1381. uint32_t ast_index;
  1382. ast_index = ppdu_info->rx_status.ast_index;
  1383. if (ast_index < wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  1384. ast_entry = soc->ast_table[ast_index];
  1385. if (ast_entry) {
  1386. peer = dp_peer_get_ref_by_id(soc, ast_entry->peer_id,
  1387. DP_MOD_ID_RX_PPDU_STATS);
  1388. if (peer) {
  1389. if ((peer->peer_id != HTT_INVALID_PEER) &&
  1390. (peer->peer_based_pktlog_filter)) {
  1391. dp_wdi_event_handler(
  1392. WDI_EVENT_RX_DESC, soc,
  1393. status_nbuf,
  1394. peer->peer_id,
  1395. WDI_NO_VAL, pdev_id);
  1396. }
  1397. dp_peer_unref_delete(peer,
  1398. DP_MOD_ID_RX_PPDU_STATS);
  1399. }
  1400. }
  1401. }
  1402. }
  1403. #if defined(HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_M)
  1404. static inline void
  1405. dp_rx_ul_ofdma_ru_size_to_width(
  1406. uint32_t ru_size,
  1407. uint32_t *ru_width)
  1408. {
  1409. uint32_t width;
  1410. width = 0;
  1411. switch (ru_size) {
  1412. case HTT_UL_OFDMA_V0_RU_SIZE_RU_26:
  1413. width = 1;
  1414. break;
  1415. case HTT_UL_OFDMA_V0_RU_SIZE_RU_52:
  1416. width = 2;
  1417. break;
  1418. case HTT_UL_OFDMA_V0_RU_SIZE_RU_106:
  1419. width = 4;
  1420. break;
  1421. case HTT_UL_OFDMA_V0_RU_SIZE_RU_242:
  1422. width = 9;
  1423. break;
  1424. case HTT_UL_OFDMA_V0_RU_SIZE_RU_484:
  1425. width = 18;
  1426. break;
  1427. case HTT_UL_OFDMA_V0_RU_SIZE_RU_996:
  1428. width = 37;
  1429. break;
  1430. case HTT_UL_OFDMA_V0_RU_SIZE_RU_996x2:
  1431. width = 74;
  1432. break;
  1433. default:
  1434. dp_rx_mon_status_err("RU size to width convert err");
  1435. break;
  1436. }
  1437. *ru_width = width;
  1438. }
  1439. static inline void
  1440. dp_rx_mon_handle_mu_ul_info(struct hal_rx_ppdu_info *ppdu_info)
  1441. {
  1442. struct mon_rx_user_status *mon_rx_user_status;
  1443. uint32_t num_users;
  1444. uint32_t i;
  1445. uint32_t mu_ul_user_v0_word0;
  1446. uint32_t mu_ul_user_v0_word1;
  1447. uint32_t ru_width;
  1448. uint32_t ru_size;
  1449. if (!(ppdu_info->rx_status.reception_type == HAL_RX_TYPE_MU_OFDMA ||
  1450. ppdu_info->rx_status.reception_type == HAL_RX_TYPE_MU_MIMO))
  1451. return;
  1452. num_users = ppdu_info->com_info.num_users;
  1453. if (num_users > HAL_MAX_UL_MU_USERS)
  1454. num_users = HAL_MAX_UL_MU_USERS;
  1455. for (i = 0; i < num_users; i++) {
  1456. mon_rx_user_status = &ppdu_info->rx_user_status[i];
  1457. mu_ul_user_v0_word0 =
  1458. mon_rx_user_status->mu_ul_user_v0_word0;
  1459. mu_ul_user_v0_word1 =
  1460. mon_rx_user_status->mu_ul_user_v0_word1;
  1461. if (HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_GET(
  1462. mu_ul_user_v0_word0) &&
  1463. !HTT_UL_OFDMA_USER_INFO_V0_W0_VER_GET(
  1464. mu_ul_user_v0_word0)) {
  1465. mon_rx_user_status->mcs =
  1466. HTT_UL_OFDMA_USER_INFO_V0_W1_MCS_GET(
  1467. mu_ul_user_v0_word1);
  1468. mon_rx_user_status->nss =
  1469. HTT_UL_OFDMA_USER_INFO_V0_W1_NSS_GET(
  1470. mu_ul_user_v0_word1) + 1;
  1471. mon_rx_user_status->mu_ul_info_valid = 1;
  1472. mon_rx_user_status->ofdma_ru_start_index =
  1473. HTT_UL_OFDMA_USER_INFO_V0_W1_RU_START_GET(
  1474. mu_ul_user_v0_word1);
  1475. ru_size =
  1476. HTT_UL_OFDMA_USER_INFO_V0_W1_RU_SIZE_GET(
  1477. mu_ul_user_v0_word1);
  1478. dp_rx_ul_ofdma_ru_size_to_width(ru_size, &ru_width);
  1479. mon_rx_user_status->ofdma_ru_width = ru_width;
  1480. mon_rx_user_status->ofdma_ru_size = ru_size;
  1481. }
  1482. }
  1483. }
  1484. #else
  1485. static inline void
  1486. dp_rx_mon_handle_mu_ul_info(struct hal_rx_ppdu_info *ppdu_info)
  1487. {
  1488. }
  1489. #endif
  1490. /**
  1491. * dp_rx_mon_status_process_tlv() - Process status TLV in status
  1492. * buffer on Rx status Queue posted by status SRNG processing.
  1493. * @soc: core txrx main context
  1494. * @int_ctx: interrupt context
  1495. * @mac_id: mac_id which is one of 3 mac_ids _ring
  1496. * @quota: amount of work which can be done
  1497. *
  1498. * Return: none
  1499. */
  1500. static inline void
  1501. dp_rx_mon_status_process_tlv(struct dp_soc *soc, struct dp_intr *int_ctx,
  1502. uint32_t mac_id, uint32_t quota)
  1503. {
  1504. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1505. struct hal_rx_ppdu_info *ppdu_info;
  1506. qdf_nbuf_t status_nbuf;
  1507. uint8_t *rx_tlv;
  1508. uint8_t *rx_tlv_start;
  1509. uint32_t tlv_status = HAL_TLV_STATUS_BUF_DONE;
  1510. QDF_STATUS enh_log_status = QDF_STATUS_SUCCESS;
  1511. struct cdp_pdev_mon_stats *rx_mon_stats;
  1512. int smart_mesh_status;
  1513. enum WDI_EVENT pktlog_mode = WDI_NO_VAL;
  1514. bool nbuf_used;
  1515. uint32_t rx_enh_capture_mode;
  1516. if (!pdev) {
  1517. dp_rx_mon_status_debug("%pK: pdev is null for mac_id = %d", soc,
  1518. mac_id);
  1519. return;
  1520. }
  1521. ppdu_info = &pdev->ppdu_info;
  1522. rx_mon_stats = &pdev->rx_mon_stats;
  1523. if (pdev->mon_ppdu_status != DP_PPDU_STATUS_START)
  1524. return;
  1525. rx_enh_capture_mode = pdev->rx_enh_capture_mode;
  1526. while (!qdf_nbuf_is_queue_empty(&pdev->rx_status_q)) {
  1527. status_nbuf = qdf_nbuf_queue_remove(&pdev->rx_status_q);
  1528. rx_tlv = qdf_nbuf_data(status_nbuf);
  1529. rx_tlv_start = rx_tlv;
  1530. nbuf_used = false;
  1531. if ((pdev->monitor_vdev) || (pdev->enhanced_stats_en) ||
  1532. (pdev->mcopy_mode) || (dp_cfr_rcc_mode_status(pdev)) ||
  1533. (rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED)) {
  1534. do {
  1535. tlv_status = hal_rx_status_get_tlv_info(rx_tlv,
  1536. ppdu_info, pdev->soc->hal_soc,
  1537. status_nbuf);
  1538. dp_rx_mon_update_dbg_ppdu_stats(ppdu_info,
  1539. rx_mon_stats);
  1540. dp_rx_mon_enh_capture_process(pdev, tlv_status,
  1541. status_nbuf, ppdu_info,
  1542. &nbuf_used);
  1543. dp_rx_mcopy_process_ppdu_info(pdev,
  1544. ppdu_info,
  1545. tlv_status);
  1546. rx_tlv = hal_rx_status_get_next_tlv(rx_tlv);
  1547. if ((rx_tlv - rx_tlv_start) >=
  1548. RX_MON_STATUS_BUF_SIZE)
  1549. break;
  1550. } while ((tlv_status == HAL_TLV_STATUS_PPDU_NOT_DONE) ||
  1551. (tlv_status == HAL_TLV_STATUS_HEADER) ||
  1552. (tlv_status == HAL_TLV_STATUS_MPDU_END) ||
  1553. (tlv_status == HAL_TLV_STATUS_MSDU_END));
  1554. }
  1555. if (pdev->dp_peer_based_pktlog) {
  1556. dp_rx_process_peer_based_pktlog(soc, ppdu_info,
  1557. status_nbuf,
  1558. pdev->pdev_id);
  1559. } else {
  1560. if (pdev->rx_pktlog_mode == DP_RX_PKTLOG_FULL)
  1561. pktlog_mode = WDI_EVENT_RX_DESC;
  1562. else if (pdev->rx_pktlog_mode == DP_RX_PKTLOG_LITE)
  1563. pktlog_mode = WDI_EVENT_LITE_RX;
  1564. if (pktlog_mode != WDI_NO_VAL)
  1565. dp_wdi_event_handler(pktlog_mode, soc,
  1566. status_nbuf,
  1567. HTT_INVALID_PEER,
  1568. WDI_NO_VAL, pdev->pdev_id);
  1569. }
  1570. /* smart monitor vap and m_copy cannot co-exist */
  1571. if (ppdu_info->rx_status.monitor_direct_used && pdev->neighbour_peers_added
  1572. && pdev->monitor_vdev) {
  1573. smart_mesh_status = dp_rx_handle_smart_mesh_mode(soc,
  1574. pdev, ppdu_info, status_nbuf);
  1575. if (smart_mesh_status)
  1576. qdf_nbuf_free(status_nbuf);
  1577. } else if (qdf_unlikely(pdev->mcopy_mode)) {
  1578. dp_rx_process_mcopy_mode(soc, pdev,
  1579. ppdu_info, tlv_status,
  1580. status_nbuf);
  1581. } else if (rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED) {
  1582. if (!nbuf_used)
  1583. qdf_nbuf_free(status_nbuf);
  1584. if (tlv_status == HAL_TLV_STATUS_PPDU_DONE)
  1585. enh_log_status =
  1586. dp_rx_handle_enh_capture(soc,
  1587. pdev, ppdu_info);
  1588. } else {
  1589. qdf_nbuf_free(status_nbuf);
  1590. }
  1591. if (tlv_status == HAL_TLV_STATUS_PPDU_NON_STD_DONE) {
  1592. dp_rx_mon_deliver_non_std(soc, mac_id);
  1593. } else if (tlv_status == HAL_TLV_STATUS_PPDU_DONE) {
  1594. rx_mon_stats->status_ppdu_done++;
  1595. dp_rx_mon_handle_mu_ul_info(ppdu_info);
  1596. if (pdev->tx_capture_enabled
  1597. != CDP_TX_ENH_CAPTURE_DISABLED)
  1598. dp_send_ack_frame_to_stack(soc, pdev,
  1599. ppdu_info);
  1600. if (pdev->enhanced_stats_en ||
  1601. pdev->mcopy_mode || pdev->neighbour_peers_added)
  1602. dp_rx_handle_ppdu_stats(soc, pdev, ppdu_info);
  1603. else if (dp_cfr_rcc_mode_status(pdev))
  1604. dp_rx_handle_cfr(soc, pdev, ppdu_info);
  1605. pdev->mon_ppdu_status = DP_PPDU_STATUS_DONE;
  1606. /*
  1607. * if chan_num is not fetched correctly from ppdu RX TLV,
  1608. * get it from pdev saved.
  1609. */
  1610. if (qdf_unlikely(pdev->ppdu_info.rx_status.chan_num == 0))
  1611. pdev->ppdu_info.rx_status.chan_num = pdev->mon_chan_num;
  1612. /*
  1613. * if chan_freq is not fetched correctly from ppdu RX TLV,
  1614. * get it from pdev saved.
  1615. */
  1616. if (qdf_unlikely(pdev->ppdu_info.rx_status.chan_freq == 0)) {
  1617. pdev->ppdu_info.rx_status.chan_freq =
  1618. pdev->mon_chan_freq;
  1619. }
  1620. if (!soc->full_mon_mode)
  1621. dp_rx_mon_dest_process(soc, int_ctx, mac_id,
  1622. quota);
  1623. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  1624. }
  1625. }
  1626. return;
  1627. }
  1628. /*
  1629. * dp_rx_nbuf_prepare() - prepare RX nbuf
  1630. * @soc: core txrx main context
  1631. * @pdev: core txrx pdev context
  1632. *
  1633. * This function alloc & map nbuf for RX dma usage, retry it if failed
  1634. * until retry times reaches max threshold or succeeded.
  1635. *
  1636. * Return: qdf_nbuf_t pointer if succeeded, NULL if failed.
  1637. */
  1638. static inline qdf_nbuf_t
  1639. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev)
  1640. {
  1641. uint8_t *buf;
  1642. int32_t nbuf_retry_count;
  1643. QDF_STATUS ret;
  1644. qdf_nbuf_t nbuf = NULL;
  1645. for (nbuf_retry_count = 0; nbuf_retry_count <
  1646. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD;
  1647. nbuf_retry_count++) {
  1648. /* Allocate a new skb using alloc_skb */
  1649. nbuf = qdf_nbuf_alloc_no_recycler(RX_MON_STATUS_BUF_SIZE,
  1650. RX_MON_STATUS_BUF_RESERVATION,
  1651. RX_DATA_BUFFER_ALIGNMENT);
  1652. if (!nbuf) {
  1653. DP_STATS_INC(pdev, replenish.nbuf_alloc_fail, 1);
  1654. continue;
  1655. }
  1656. buf = qdf_nbuf_data(nbuf);
  1657. memset(buf, 0, RX_MON_STATUS_BUF_SIZE);
  1658. ret = qdf_nbuf_map_nbytes_single(soc->osdev, nbuf,
  1659. QDF_DMA_FROM_DEVICE,
  1660. RX_MON_STATUS_BUF_SIZE);
  1661. /* nbuf map failed */
  1662. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  1663. qdf_nbuf_free(nbuf);
  1664. DP_STATS_INC(pdev, replenish.map_err, 1);
  1665. continue;
  1666. }
  1667. /* qdf_nbuf alloc and map succeeded */
  1668. break;
  1669. }
  1670. /* qdf_nbuf still alloc or map failed */
  1671. if (qdf_unlikely(nbuf_retry_count >=
  1672. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD))
  1673. return NULL;
  1674. return nbuf;
  1675. }
  1676. /*
  1677. * dp_rx_mon_status_srng_process() - Process monitor status ring
  1678. * post the status ring buffer to Rx status Queue for later
  1679. * processing when status ring is filled with status TLV.
  1680. * Allocate a new buffer to status ring if the filled buffer
  1681. * is posted.
  1682. * @soc: core txrx main context
  1683. * @int_ctx: interrupt context
  1684. * @mac_id: mac_id which is one of 3 mac_ids
  1685. * @quota: No. of ring entry that can be serviced in one shot.
  1686. * Return: uint32_t: No. of ring entry that is processed.
  1687. */
  1688. static inline uint32_t
  1689. dp_rx_mon_status_srng_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  1690. uint32_t mac_id, uint32_t quota)
  1691. {
  1692. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1693. hal_soc_handle_t hal_soc;
  1694. void *mon_status_srng;
  1695. void *rxdma_mon_status_ring_entry;
  1696. QDF_STATUS status;
  1697. enum dp_mon_reap_status reap_status;
  1698. uint32_t work_done = 0;
  1699. if (!pdev) {
  1700. dp_rx_mon_status_debug("%pK: pdev is null for mac_id = %d",
  1701. soc, mac_id);
  1702. return work_done;
  1703. }
  1704. mon_status_srng = soc->rxdma_mon_status_ring[mac_id].hal_srng;
  1705. qdf_assert(mon_status_srng);
  1706. if (!mon_status_srng || !hal_srng_initialized(mon_status_srng)) {
  1707. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1708. "%s %d : HAL Monitor Status Ring Init Failed -- %pK",
  1709. __func__, __LINE__, mon_status_srng);
  1710. return work_done;
  1711. }
  1712. hal_soc = soc->hal_soc;
  1713. qdf_assert(hal_soc);
  1714. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, mon_status_srng)))
  1715. goto done;
  1716. /* mon_status_ring_desc => WBM_BUFFER_RING STRUCT =>
  1717. * BUFFER_ADDR_INFO STRUCT
  1718. */
  1719. while (qdf_likely((rxdma_mon_status_ring_entry =
  1720. hal_srng_src_peek_n_get_next(hal_soc, mon_status_srng))
  1721. && quota--)) {
  1722. uint32_t rx_buf_cookie;
  1723. qdf_nbuf_t status_nbuf;
  1724. struct dp_rx_desc *rx_desc;
  1725. uint8_t *status_buf;
  1726. qdf_dma_addr_t paddr;
  1727. uint64_t buf_addr;
  1728. struct rx_desc_pool *rx_desc_pool;
  1729. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1730. buf_addr =
  1731. (HAL_RX_BUFFER_ADDR_31_0_GET(
  1732. rxdma_mon_status_ring_entry) |
  1733. ((uint64_t)(HAL_RX_BUFFER_ADDR_39_32_GET(
  1734. rxdma_mon_status_ring_entry)) << 32));
  1735. if (qdf_likely(buf_addr)) {
  1736. rx_buf_cookie =
  1737. HAL_RX_BUF_COOKIE_GET(
  1738. rxdma_mon_status_ring_entry);
  1739. rx_desc = dp_rx_cookie_2_va_mon_status(soc,
  1740. rx_buf_cookie);
  1741. qdf_assert(rx_desc);
  1742. status_nbuf = rx_desc->nbuf;
  1743. qdf_nbuf_sync_for_cpu(soc->osdev, status_nbuf,
  1744. QDF_DMA_FROM_DEVICE);
  1745. status_buf = qdf_nbuf_data(status_nbuf);
  1746. status = hal_get_rx_status_done(status_buf);
  1747. if (status != QDF_STATUS_SUCCESS) {
  1748. uint32_t hp, tp;
  1749. hal_get_sw_hptp(hal_soc, mon_status_srng,
  1750. &tp, &hp);
  1751. dp_info_rl("tlv tag status error hp:%u, tp:%u",
  1752. hp, tp);
  1753. /* RxDMA status done bit might not be set even
  1754. * though tp is moved by HW.
  1755. */
  1756. /* If done status is missing:
  1757. * 1. As per MAC team's suggestion,
  1758. * when HP + 1 entry is peeked and if DMA
  1759. * is not done and if HP + 2 entry's DMA done
  1760. * is set. skip HP + 1 entry and
  1761. * start processing in next interrupt.
  1762. * 2. If HP + 2 entry's DMA done is not set,
  1763. * poll onto HP + 1 entry DMA done to be set.
  1764. * Check status for same buffer for next time
  1765. * dp_rx_mon_status_srng_process
  1766. */
  1767. reap_status = dp_rx_mon_handle_status_buf_done(pdev,
  1768. mon_status_srng);
  1769. if (reap_status == DP_MON_STATUS_NO_DMA)
  1770. continue;
  1771. else if (reap_status == DP_MON_STATUS_REPLENISH) {
  1772. qdf_nbuf_unmap_nbytes_single(
  1773. soc->osdev, status_nbuf,
  1774. QDF_DMA_FROM_DEVICE,
  1775. rx_desc_pool->buf_size);
  1776. qdf_nbuf_free(status_nbuf);
  1777. goto buf_replenish;
  1778. }
  1779. }
  1780. qdf_nbuf_set_pktlen(status_nbuf,
  1781. RX_MON_STATUS_BUF_SIZE);
  1782. qdf_nbuf_unmap_nbytes_single(soc->osdev, status_nbuf,
  1783. QDF_DMA_FROM_DEVICE,
  1784. rx_desc_pool->buf_size);
  1785. /* Put the status_nbuf to queue */
  1786. qdf_nbuf_queue_add(&pdev->rx_status_q, status_nbuf);
  1787. } else {
  1788. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1789. union dp_rx_desc_list_elem_t *tail = NULL;
  1790. uint32_t num_alloc_desc;
  1791. num_alloc_desc = dp_rx_get_free_desc_list(soc, mac_id,
  1792. rx_desc_pool,
  1793. 1,
  1794. &desc_list,
  1795. &tail);
  1796. /*
  1797. * No free descriptors available
  1798. */
  1799. if (qdf_unlikely(num_alloc_desc == 0)) {
  1800. work_done++;
  1801. break;
  1802. }
  1803. rx_desc = &desc_list->rx_desc;
  1804. }
  1805. buf_replenish:
  1806. status_nbuf = dp_rx_nbuf_prepare(soc, pdev);
  1807. /*
  1808. * qdf_nbuf alloc or map failed,
  1809. * free the dp rx desc to free list,
  1810. * fill in NULL dma address at current HP entry,
  1811. * keep HP in mon_status_ring unchanged,
  1812. * wait next time dp_rx_mon_status_srng_process
  1813. * to fill in buffer at current HP.
  1814. */
  1815. if (qdf_unlikely(!status_nbuf)) {
  1816. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1817. union dp_rx_desc_list_elem_t *tail = NULL;
  1818. struct rx_desc_pool *rx_desc_pool;
  1819. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1820. dp_info_rl("fail to allocate or map qdf_nbuf");
  1821. dp_rx_add_to_free_desc_list(&desc_list,
  1822. &tail, rx_desc);
  1823. dp_rx_add_desc_list_to_free_list(soc, &desc_list,
  1824. &tail, mac_id, rx_desc_pool);
  1825. hal_rxdma_buff_addr_info_set(
  1826. rxdma_mon_status_ring_entry,
  1827. 0, 0, HAL_RX_BUF_RBM_SW3_BM);
  1828. work_done++;
  1829. break;
  1830. }
  1831. paddr = qdf_nbuf_get_frag_paddr(status_nbuf, 0);
  1832. rx_desc->nbuf = status_nbuf;
  1833. rx_desc->in_use = 1;
  1834. hal_rxdma_buff_addr_info_set(rxdma_mon_status_ring_entry,
  1835. paddr, rx_desc->cookie, HAL_RX_BUF_RBM_SW3_BM);
  1836. hal_srng_src_get_next(hal_soc, mon_status_srng);
  1837. work_done++;
  1838. }
  1839. done:
  1840. dp_srng_access_end(int_ctx, soc, mon_status_srng);
  1841. return work_done;
  1842. }
  1843. uint32_t
  1844. dp_rx_mon_status_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  1845. uint32_t mac_id, uint32_t quota)
  1846. {
  1847. uint32_t work_done;
  1848. work_done = dp_rx_mon_status_srng_process(soc, int_ctx, mac_id, quota);
  1849. quota -= work_done;
  1850. dp_rx_mon_status_process_tlv(soc, int_ctx, mac_id, quota);
  1851. return work_done;
  1852. }
  1853. #ifndef DISABLE_MON_CONFIG
  1854. uint32_t
  1855. dp_mon_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  1856. uint32_t mac_id, uint32_t quota)
  1857. {
  1858. if (qdf_unlikely(soc->full_mon_mode))
  1859. return dp_rx_mon_process(soc, int_ctx, mac_id, quota);
  1860. return dp_rx_mon_status_process(soc, int_ctx, mac_id, quota);
  1861. }
  1862. #else
  1863. uint32_t
  1864. dp_mon_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  1865. uint32_t mac_id, uint32_t quota)
  1866. {
  1867. return 0;
  1868. }
  1869. #endif
  1870. QDF_STATUS
  1871. dp_rx_pdev_mon_status_buffers_alloc(struct dp_pdev *pdev, uint32_t mac_id)
  1872. {
  1873. uint8_t pdev_id = pdev->pdev_id;
  1874. struct dp_soc *soc = pdev->soc;
  1875. struct dp_srng *mon_status_ring;
  1876. uint32_t num_entries;
  1877. struct rx_desc_pool *rx_desc_pool;
  1878. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1879. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1880. union dp_rx_desc_list_elem_t *tail = NULL;
  1881. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1882. mon_status_ring = &soc->rxdma_mon_status_ring[mac_id];
  1883. num_entries = mon_status_ring->num_entries;
  1884. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1885. dp_debug("Mon RX Desc Pool[%d] entries=%u",
  1886. pdev_id, num_entries);
  1887. return dp_rx_mon_status_buffers_replenish(soc, mac_id, mon_status_ring,
  1888. rx_desc_pool, num_entries,
  1889. &desc_list, &tail,
  1890. HAL_RX_BUF_RBM_SW3_BM);
  1891. }
  1892. QDF_STATUS
  1893. dp_rx_pdev_mon_status_desc_pool_alloc(struct dp_pdev *pdev, uint32_t mac_id)
  1894. {
  1895. uint8_t pdev_id = pdev->pdev_id;
  1896. struct dp_soc *soc = pdev->soc;
  1897. struct dp_srng *mon_status_ring;
  1898. uint32_t num_entries;
  1899. struct rx_desc_pool *rx_desc_pool;
  1900. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1901. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1902. mon_status_ring = &soc->rxdma_mon_status_ring[mac_id];
  1903. num_entries = mon_status_ring->num_entries;
  1904. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1905. dp_debug("Mon RX Desc Pool[%d] entries=%u", pdev_id, num_entries);
  1906. rx_desc_pool->desc_type = DP_RX_DESC_STATUS_TYPE;
  1907. return dp_rx_desc_pool_alloc(soc, num_entries + 1, rx_desc_pool);
  1908. }
  1909. void
  1910. dp_rx_pdev_mon_status_desc_pool_init(struct dp_pdev *pdev, uint32_t mac_id)
  1911. {
  1912. uint32_t i;
  1913. uint8_t pdev_id = pdev->pdev_id;
  1914. struct dp_soc *soc = pdev->soc;
  1915. struct dp_srng *mon_status_ring;
  1916. uint32_t num_entries;
  1917. struct rx_desc_pool *rx_desc_pool;
  1918. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1919. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1920. mon_status_ring = &soc->rxdma_mon_status_ring[mac_id];
  1921. num_entries = mon_status_ring->num_entries;
  1922. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1923. dp_debug("Mon RX Desc status Pool[%d] init entries=%u",
  1924. pdev_id, num_entries);
  1925. rx_desc_pool->owner = HAL_RX_BUF_RBM_SW3_BM;
  1926. rx_desc_pool->buf_size = RX_MON_STATUS_BUF_SIZE;
  1927. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  1928. /* Disable frag processing flag */
  1929. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  1930. dp_rx_desc_pool_init(soc, mac_id, num_entries + 1, rx_desc_pool);
  1931. qdf_nbuf_queue_init(&pdev->rx_status_q);
  1932. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  1933. qdf_mem_zero(&pdev->ppdu_info, sizeof(pdev->ppdu_info));
  1934. /*
  1935. * Set last_ppdu_id to HAL_INVALID_PPDU_ID in order to avoid ppdu_id
  1936. * match with '0' ppdu_id from monitor status ring
  1937. */
  1938. pdev->ppdu_info.com_info.last_ppdu_id = HAL_INVALID_PPDU_ID;
  1939. qdf_mem_zero(&pdev->rx_mon_stats, sizeof(pdev->rx_mon_stats));
  1940. dp_rx_mon_init_dbg_ppdu_stats(&pdev->ppdu_info,
  1941. &pdev->rx_mon_stats);
  1942. for (i = 0; i < MAX_MU_USERS; i++) {
  1943. qdf_nbuf_queue_init(&pdev->mpdu_q[i]);
  1944. pdev->is_mpdu_hdr[i] = true;
  1945. }
  1946. qdf_mem_zero(pdev->msdu_list, sizeof(pdev->msdu_list[MAX_MU_USERS]));
  1947. pdev->rx_enh_capture_mode = CDP_RX_ENH_CAPTURE_DISABLED;
  1948. }
  1949. void
  1950. dp_rx_pdev_mon_status_desc_pool_deinit(struct dp_pdev *pdev, uint32_t mac_id) {
  1951. uint8_t pdev_id = pdev->pdev_id;
  1952. struct dp_soc *soc = pdev->soc;
  1953. struct rx_desc_pool *rx_desc_pool;
  1954. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1955. dp_debug("Mon RX Desc status Pool[%d] deinit", pdev_id);
  1956. dp_rx_desc_pool_deinit(soc, rx_desc_pool);
  1957. }
  1958. void
  1959. dp_rx_pdev_mon_status_desc_pool_free(struct dp_pdev *pdev, uint32_t mac_id) {
  1960. uint8_t pdev_id = pdev->pdev_id;
  1961. struct dp_soc *soc = pdev->soc;
  1962. struct rx_desc_pool *rx_desc_pool;
  1963. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1964. dp_debug("Mon RX Status Desc Pool Free pdev[%d]", pdev_id);
  1965. dp_rx_desc_pool_free(soc, rx_desc_pool);
  1966. }
  1967. void
  1968. dp_rx_pdev_mon_status_buffers_free(struct dp_pdev *pdev, uint32_t mac_id)
  1969. {
  1970. uint8_t pdev_id = pdev->pdev_id;
  1971. struct dp_soc *soc = pdev->soc;
  1972. struct rx_desc_pool *rx_desc_pool;
  1973. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1974. dp_debug("Mon RX Status Desc Pool Free pdev[%d]", pdev_id);
  1975. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  1976. }
  1977. /*
  1978. * dp_rx_buffers_replenish() - replenish monitor status ring with
  1979. * rx nbufs called during dp rx
  1980. * monitor status ring initialization
  1981. *
  1982. * @soc: core txrx main context
  1983. * @mac_id: mac_id which is one of 3 mac_ids
  1984. * @dp_rxdma_srng: dp monitor status circular ring
  1985. * @rx_desc_pool; Pointer to Rx descriptor pool
  1986. * @num_req_buffers: number of buffer to be replenished
  1987. * @desc_list: list of descs if called from dp rx monitor status
  1988. * process or NULL during dp rx initialization or
  1989. * out of buffer interrupt
  1990. * @tail: tail of descs list
  1991. * @owner: who owns the nbuf (host, NSS etc...)
  1992. * Return: return success or failure
  1993. */
  1994. static inline
  1995. QDF_STATUS dp_rx_mon_status_buffers_replenish(struct dp_soc *dp_soc,
  1996. uint32_t mac_id,
  1997. struct dp_srng *dp_rxdma_srng,
  1998. struct rx_desc_pool *rx_desc_pool,
  1999. uint32_t num_req_buffers,
  2000. union dp_rx_desc_list_elem_t **desc_list,
  2001. union dp_rx_desc_list_elem_t **tail,
  2002. uint8_t owner)
  2003. {
  2004. uint32_t num_alloc_desc;
  2005. uint16_t num_desc_to_free = 0;
  2006. uint32_t num_entries_avail;
  2007. uint32_t count = 0;
  2008. int sync_hw_ptr = 1;
  2009. qdf_dma_addr_t paddr;
  2010. qdf_nbuf_t rx_netbuf;
  2011. void *rxdma_ring_entry;
  2012. union dp_rx_desc_list_elem_t *next;
  2013. void *rxdma_srng;
  2014. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  2015. if (!dp_pdev) {
  2016. dp_rx_mon_status_debug("%pK: pdev is null for mac_id = %d",
  2017. dp_soc, mac_id);
  2018. return QDF_STATUS_E_FAILURE;
  2019. }
  2020. rxdma_srng = dp_rxdma_srng->hal_srng;
  2021. qdf_assert(rxdma_srng);
  2022. dp_rx_mon_status_debug("%pK: requested %d buffers for replenish",
  2023. dp_soc, num_req_buffers);
  2024. /*
  2025. * if desc_list is NULL, allocate the descs from freelist
  2026. */
  2027. if (!(*desc_list)) {
  2028. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  2029. rx_desc_pool,
  2030. num_req_buffers,
  2031. desc_list,
  2032. tail);
  2033. if (!num_alloc_desc) {
  2034. dp_rx_mon_status_err("%pK: no free rx_descs in freelist",
  2035. dp_soc);
  2036. return QDF_STATUS_E_NOMEM;
  2037. }
  2038. dp_rx_mon_status_debug("%pK: %d rx desc allocated", dp_soc,
  2039. num_alloc_desc);
  2040. num_req_buffers = num_alloc_desc;
  2041. }
  2042. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2043. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  2044. rxdma_srng, sync_hw_ptr);
  2045. dp_rx_mon_status_debug("%pK: no of available entries in rxdma ring: %d",
  2046. dp_soc, num_entries_avail);
  2047. if (num_entries_avail < num_req_buffers) {
  2048. num_desc_to_free = num_req_buffers - num_entries_avail;
  2049. num_req_buffers = num_entries_avail;
  2050. }
  2051. while (count <= num_req_buffers) {
  2052. rx_netbuf = dp_rx_nbuf_prepare(dp_soc, dp_pdev);
  2053. /*
  2054. * qdf_nbuf alloc or map failed,
  2055. * keep HP in mon_status_ring unchanged,
  2056. * wait dp_rx_mon_status_srng_process
  2057. * to fill in buffer at current HP.
  2058. */
  2059. if (qdf_unlikely(!rx_netbuf)) {
  2060. dp_rx_mon_status_err("%pK: qdf_nbuf allocate or map fail, count %d",
  2061. dp_soc, count);
  2062. break;
  2063. }
  2064. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  2065. next = (*desc_list)->next;
  2066. rxdma_ring_entry = hal_srng_src_get_cur_hp_n_move_next(
  2067. dp_soc->hal_soc,
  2068. rxdma_srng);
  2069. if (qdf_unlikely(!rxdma_ring_entry)) {
  2070. dp_rx_mon_status_err("%pK: rxdma_ring_entry is NULL, count - %d",
  2071. dp_soc, count);
  2072. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev, rx_netbuf,
  2073. QDF_DMA_FROM_DEVICE,
  2074. rx_desc_pool->buf_size);
  2075. qdf_nbuf_free(rx_netbuf);
  2076. break;
  2077. }
  2078. (*desc_list)->rx_desc.nbuf = rx_netbuf;
  2079. (*desc_list)->rx_desc.in_use = 1;
  2080. count++;
  2081. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  2082. (*desc_list)->rx_desc.cookie, owner);
  2083. dp_rx_mon_status_debug("%pK: rx_desc=%pK, cookie=%d, nbuf=%pK, paddr=%pK",
  2084. dp_soc, &(*desc_list)->rx_desc,
  2085. (*desc_list)->rx_desc.cookie, rx_netbuf,
  2086. (void *)paddr);
  2087. *desc_list = next;
  2088. }
  2089. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2090. dp_rx_mon_status_debug("%pK: successfully replenished %d buffers",
  2091. dp_soc, num_req_buffers);
  2092. dp_rx_mon_status_debug("%pK: %d rx desc added back to free list",
  2093. dp_soc, num_desc_to_free);
  2094. /*
  2095. * add any available free desc back to the free list
  2096. */
  2097. if (*desc_list) {
  2098. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  2099. mac_id, rx_desc_pool);
  2100. }
  2101. return QDF_STATUS_SUCCESS;
  2102. }
  2103. #if !defined(DISABLE_MON_CONFIG) && defined(MON_ENABLE_DROP_FOR_MAC)
  2104. /**
  2105. * dp_mon_status_srng_drop_for_mac() - Drop the mon status ring packets for
  2106. * a given mac
  2107. * @pdev: DP pdev
  2108. * @mac_id: mac id
  2109. * @quota: maximum number of ring entries that can be processed
  2110. *
  2111. * Return: Number of ring entries reaped
  2112. */
  2113. static uint32_t
  2114. dp_mon_status_srng_drop_for_mac(struct dp_pdev *pdev, uint32_t mac_id,
  2115. uint32_t quota)
  2116. {
  2117. struct dp_soc *soc = pdev->soc;
  2118. void *mon_status_srng;
  2119. hal_soc_handle_t hal_soc;
  2120. void *ring_desc;
  2121. uint32_t reap_cnt = 0;
  2122. if (qdf_unlikely(!soc || !soc->hal_soc))
  2123. return reap_cnt;
  2124. mon_status_srng = soc->rxdma_mon_status_ring[mac_id].hal_srng;
  2125. if (qdf_unlikely(!mon_status_srng ||
  2126. !hal_srng_initialized(mon_status_srng)))
  2127. return reap_cnt;
  2128. hal_soc = soc->hal_soc;
  2129. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_status_srng)))
  2130. return reap_cnt;
  2131. while ((ring_desc =
  2132. hal_srng_src_peek_n_get_next(hal_soc, mon_status_srng)) &&
  2133. reap_cnt < MON_DROP_REAP_LIMIT && quota--) {
  2134. uint64_t buf_addr;
  2135. uint32_t rx_buf_cookie;
  2136. struct dp_rx_desc *rx_desc;
  2137. qdf_nbuf_t status_nbuf;
  2138. uint8_t *status_buf;
  2139. enum dp_mon_reap_status reap_status;
  2140. qdf_dma_addr_t iova;
  2141. struct rx_desc_pool *rx_desc_pool;
  2142. rx_desc_pool = &soc->rx_desc_status[mac_id];
  2143. buf_addr = (HAL_RX_BUFFER_ADDR_31_0_GET(ring_desc) |
  2144. ((uint64_t)(HAL_RX_BUFFER_ADDR_39_32_GET(ring_desc)) << 32));
  2145. if (qdf_likely(buf_addr)) {
  2146. rx_buf_cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  2147. rx_desc = dp_rx_cookie_2_va_mon_status(soc,
  2148. rx_buf_cookie);
  2149. qdf_assert(rx_desc);
  2150. status_nbuf = rx_desc->nbuf;
  2151. qdf_nbuf_sync_for_cpu(soc->osdev, status_nbuf,
  2152. QDF_DMA_FROM_DEVICE);
  2153. status_buf = qdf_nbuf_data(status_nbuf);
  2154. if (hal_get_rx_status_done(status_buf) !=
  2155. QDF_STATUS_SUCCESS) {
  2156. /* If done status is missing:
  2157. * 1. As per MAC team's suggestion,
  2158. * when HP + 1 entry is peeked and if DMA
  2159. * is not done and if HP + 2 entry's DMA done
  2160. * is set. skip HP + 1 entry and
  2161. * start processing in next interrupt.
  2162. * 2. If HP + 2 entry's DMA done is not set,
  2163. * poll onto HP + 1 entry DMA done to be set.
  2164. * Check status for same buffer for next time
  2165. * dp_rx_mon_status_srng_process
  2166. */
  2167. reap_status =
  2168. dp_rx_mon_handle_status_buf_done(pdev,
  2169. mon_status_srng);
  2170. if (reap_status == DP_MON_STATUS_NO_DMA)
  2171. break;
  2172. }
  2173. qdf_nbuf_unmap_nbytes_single(soc->osdev, status_nbuf,
  2174. QDF_DMA_FROM_DEVICE,
  2175. rx_desc_pool->buf_size);
  2176. qdf_nbuf_free(status_nbuf);
  2177. } else {
  2178. union dp_rx_desc_list_elem_t *rx_desc_elem;
  2179. qdf_spin_lock_bh(&rx_desc_pool->lock);
  2180. if (!rx_desc_pool->freelist) {
  2181. qdf_spin_unlock_bh(&rx_desc_pool->lock);
  2182. break;
  2183. }
  2184. rx_desc_elem = rx_desc_pool->freelist;
  2185. rx_desc_pool->freelist = rx_desc_pool->freelist->next;
  2186. qdf_spin_unlock_bh(&rx_desc_pool->lock);
  2187. rx_desc = &rx_desc_elem->rx_desc;
  2188. }
  2189. status_nbuf = dp_rx_nbuf_prepare(soc, pdev);
  2190. if (qdf_unlikely(!status_nbuf)) {
  2191. union dp_rx_desc_list_elem_t *desc_list = NULL;
  2192. union dp_rx_desc_list_elem_t *tail = NULL;
  2193. dp_info_rl("fail to allocate or map nbuf");
  2194. dp_rx_add_to_free_desc_list(&desc_list, &tail,
  2195. rx_desc);
  2196. dp_rx_add_desc_list_to_free_list(soc,
  2197. &desc_list,
  2198. &tail, mac_id,
  2199. rx_desc_pool);
  2200. hal_rxdma_buff_addr_info_set(ring_desc, 0, 0,
  2201. HAL_RX_BUF_RBM_SW3_BM);
  2202. break;
  2203. }
  2204. iova = qdf_nbuf_get_frag_paddr(status_nbuf, 0);
  2205. rx_desc->nbuf = status_nbuf;
  2206. rx_desc->in_use = 1;
  2207. hal_rxdma_buff_addr_info_set(ring_desc, iova, rx_desc->cookie,
  2208. HAL_RX_BUF_RBM_SW3_BM);
  2209. reap_cnt++;
  2210. hal_srng_src_get_next(hal_soc, mon_status_srng);
  2211. }
  2212. hal_srng_access_end(hal_soc, mon_status_srng);
  2213. return reap_cnt;
  2214. }
  2215. uint32_t dp_mon_drop_packets_for_mac(struct dp_pdev *pdev, uint32_t mac_id,
  2216. uint32_t quota)
  2217. {
  2218. uint32_t work_done;
  2219. work_done = dp_mon_status_srng_drop_for_mac(pdev, mac_id, quota);
  2220. dp_mon_dest_srng_drop_for_mac(pdev, mac_id);
  2221. return work_done;
  2222. }
  2223. #else
  2224. uint32_t dp_mon_drop_packets_for_mac(struct dp_pdev *pdev, uint32_t mac_id,
  2225. uint32_t quota)
  2226. {
  2227. return 0;
  2228. }
  2229. #endif