main.c 131 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/thermal.h>
  20. #include <linux/version.h>
  21. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  22. #include <linux/panic_notifier.h>
  23. #endif
  24. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  25. #include <soc/qcom/minidump.h>
  26. #endif
  27. #include "cnss_plat_ipc_qmi.h"
  28. #include "cnss_utils.h"
  29. #include "main.h"
  30. #include "bus.h"
  31. #include "debug.h"
  32. #include "genl.h"
  33. #include "reg.h"
  34. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  35. #include "smcinvoke.h"
  36. #include "smcinvoke_object.h"
  37. #include "IClientEnv.h"
  38. #define HW_STATE_UID 0x108
  39. #define HW_OP_GET_STATE 1
  40. #define HW_WIFI_UID 0x508
  41. #define FEATURE_NOT_SUPPORTED 12
  42. #define PERIPHERAL_NOT_FOUND 10
  43. #endif
  44. #define CNSS_DUMP_FORMAT_VER 0x11
  45. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  46. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  47. #define CNSS_DUMP_NAME "CNSS_WLAN"
  48. #define CNSS_DUMP_DESC_SIZE 0x1000
  49. #define CNSS_DUMP_SEG_VER 0x1
  50. #define FILE_SYSTEM_READY 1
  51. #define FW_READY_TIMEOUT 20000
  52. #define FW_ASSERT_TIMEOUT 5000
  53. #define CNSS_EVENT_PENDING 2989
  54. #define POWER_RESET_MIN_DELAY_MS 100
  55. #define CNSS_QUIRKS_DEFAULT 0
  56. #ifdef CONFIG_CNSS_EMULATION
  57. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  58. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  59. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  60. #else
  61. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  62. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  63. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  64. #endif
  65. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  66. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  67. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  68. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  69. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  70. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  71. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  72. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  73. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  74. enum cnss_cal_db_op {
  75. CNSS_CAL_DB_UPLOAD,
  76. CNSS_CAL_DB_DOWNLOAD,
  77. CNSS_CAL_DB_INVALID_OP,
  78. };
  79. enum cnss_recovery_type {
  80. CNSS_WLAN_RECOVERY = 0x1,
  81. CNSS_PCSS_RECOVERY = 0x2,
  82. };
  83. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  84. #define CNSS_MAX_DEV_NUM 2
  85. static struct cnss_plat_data *plat_env[CNSS_MAX_DEV_NUM];
  86. static int plat_env_count;
  87. #else
  88. static struct cnss_plat_data *plat_env;
  89. #endif
  90. static bool cnss_allow_driver_loading;
  91. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  92. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  93. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  94. };
  95. static struct cnss_fw_files FW_FILES_DEFAULT = {
  96. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  97. "utfbd.bin", "epping.bin", "evicted.bin"
  98. };
  99. struct cnss_driver_event {
  100. struct list_head list;
  101. enum cnss_driver_event_type type;
  102. bool sync;
  103. struct completion complete;
  104. int ret;
  105. void *data;
  106. };
  107. bool cnss_check_driver_loading_allowed(void)
  108. {
  109. return cnss_allow_driver_loading;
  110. }
  111. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  112. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  113. struct cnss_plat_data *plat_priv)
  114. {
  115. cnss_pr_dbg("Set plat_priv at %d", plat_env_count);
  116. if (plat_priv) {
  117. plat_priv->plat_idx = plat_env_count;
  118. plat_env[plat_priv->plat_idx] = plat_priv;
  119. plat_env_count++;
  120. }
  121. }
  122. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device
  123. *plat_dev)
  124. {
  125. int i;
  126. if (!plat_dev)
  127. return NULL;
  128. for (i = 0; i < plat_env_count; i++) {
  129. if (plat_env[i]->plat_dev == plat_dev)
  130. return plat_env[i];
  131. }
  132. return NULL;
  133. }
  134. struct cnss_plat_data *cnss_get_first_plat_priv(struct platform_device
  135. *plat_dev)
  136. {
  137. int i;
  138. if (!plat_dev) {
  139. for (i = 0; i < plat_env_count; i++) {
  140. if (plat_env[i])
  141. return plat_env[i];
  142. }
  143. }
  144. return NULL;
  145. }
  146. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  147. {
  148. cnss_pr_dbg("Clear plat_priv at %d", plat_priv->plat_idx);
  149. plat_env[plat_priv->plat_idx] = NULL;
  150. plat_env_count--;
  151. }
  152. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  153. {
  154. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  155. "wlan_%d", plat_priv->plat_idx);
  156. return 0;
  157. }
  158. static int cnss_plat_env_available(void)
  159. {
  160. int ret = 0;
  161. if (plat_env_count >= CNSS_MAX_DEV_NUM) {
  162. cnss_pr_err("ERROR: No space to store plat_priv\n");
  163. ret = -ENOMEM;
  164. }
  165. return ret;
  166. }
  167. int cnss_get_plat_env_count(void)
  168. {
  169. return plat_env_count;
  170. }
  171. struct cnss_plat_data *cnss_get_plat_env(int index)
  172. {
  173. return plat_env[index];
  174. }
  175. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  176. {
  177. int i;
  178. for (i = 0; i < plat_env_count; i++) {
  179. if (plat_env[i]->rc_num == rc_num)
  180. return plat_env[i];
  181. }
  182. return NULL;
  183. }
  184. static inline int
  185. cnss_get_qrtr_node_id(struct cnss_plat_data *plat_priv)
  186. {
  187. return of_property_read_u32(plat_priv->dev_node,
  188. "qcom,qrtr_node_id", &plat_priv->qrtr_node_id);
  189. }
  190. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  191. {
  192. int ret = 0;
  193. ret = cnss_get_qrtr_node_id(plat_priv);
  194. if (ret) {
  195. cnss_pr_warn("Failed to find qrtr_node_id err=%d\n", ret);
  196. plat_priv->qrtr_node_id = 0;
  197. plat_priv->wlfw_service_instance_id = 0;
  198. } else {
  199. plat_priv->wlfw_service_instance_id = plat_priv->qrtr_node_id +
  200. QRTR_NODE_FW_ID_BASE;
  201. cnss_pr_dbg("service_instance_id=0x%x\n",
  202. plat_priv->wlfw_service_instance_id);
  203. }
  204. }
  205. static inline int
  206. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  207. {
  208. return of_property_read_string(plat_priv->plat_dev->dev.of_node,
  209. "qcom,pld_bus_ops_name",
  210. &plat_priv->pld_bus_ops_name);
  211. }
  212. #else
  213. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  214. struct cnss_plat_data *plat_priv)
  215. {
  216. plat_env = plat_priv;
  217. }
  218. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  219. {
  220. return plat_env;
  221. }
  222. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  223. {
  224. plat_env = NULL;
  225. }
  226. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  227. {
  228. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  229. "wlan");
  230. return 0;
  231. }
  232. static int cnss_plat_env_available(void)
  233. {
  234. return 0;
  235. }
  236. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  237. {
  238. return cnss_bus_dev_to_plat_priv(NULL);
  239. }
  240. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  241. {
  242. }
  243. static int
  244. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  245. {
  246. return 0;
  247. }
  248. #endif
  249. void cnss_get_sleep_clk_supported(struct cnss_plat_data *plat_priv)
  250. {
  251. plat_priv->sleep_clk = of_property_read_bool(plat_priv->dev_node,
  252. "qcom,sleep-clk-support");
  253. cnss_pr_dbg("qcom,sleep-clk-support is %d\n",
  254. plat_priv->sleep_clk);
  255. }
  256. void cnss_get_bwscal_info(struct cnss_plat_data *plat_priv)
  257. {
  258. plat_priv->no_bwscale = of_property_read_bool(plat_priv->dev_node,
  259. "qcom,no-bwscale");
  260. }
  261. static inline int
  262. cnss_get_rc_num(struct cnss_plat_data *plat_priv)
  263. {
  264. return of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  265. "qcom,wlan-rc-num", &plat_priv->rc_num);
  266. }
  267. bool cnss_is_dual_wlan_enabled(void)
  268. {
  269. return IS_ENABLED(CONFIG_CNSS_SUPPORT_DUAL_DEV);
  270. }
  271. /**
  272. * cnss_get_mem_seg_count - Get segment count of memory
  273. * @type: memory type
  274. * @seg: segment count
  275. *
  276. * Return: 0 on success, negative value on failure
  277. */
  278. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  279. {
  280. struct cnss_plat_data *plat_priv;
  281. plat_priv = cnss_get_plat_priv(NULL);
  282. if (!plat_priv)
  283. return -ENODEV;
  284. switch (type) {
  285. case CNSS_REMOTE_MEM_TYPE_FW:
  286. *seg = plat_priv->fw_mem_seg_len;
  287. break;
  288. case CNSS_REMOTE_MEM_TYPE_QDSS:
  289. *seg = plat_priv->qdss_mem_seg_len;
  290. break;
  291. default:
  292. return -EINVAL;
  293. }
  294. return 0;
  295. }
  296. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  297. /**
  298. * cnss_get_wifi_kobject -return wifi kobject
  299. * Return: Null, to maintain driver comnpatibilty
  300. */
  301. struct kobject *cnss_get_wifi_kobj(struct device *dev)
  302. {
  303. struct cnss_plat_data *plat_priv;
  304. plat_priv = cnss_get_plat_priv(NULL);
  305. if (!plat_priv)
  306. return NULL;
  307. return plat_priv->wifi_kobj;
  308. }
  309. EXPORT_SYMBOL(cnss_get_wifi_kobj);
  310. /**
  311. * cnss_get_mem_segment_info - Get memory info of different type
  312. * @type: memory type
  313. * @segment: array to save the segment info
  314. * @seg: segment count
  315. *
  316. * Return: 0 on success, negative value on failure
  317. */
  318. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  319. struct cnss_mem_segment segment[],
  320. u32 segment_count)
  321. {
  322. struct cnss_plat_data *plat_priv;
  323. u32 i;
  324. plat_priv = cnss_get_plat_priv(NULL);
  325. if (!plat_priv)
  326. return -ENODEV;
  327. switch (type) {
  328. case CNSS_REMOTE_MEM_TYPE_FW:
  329. if (segment_count > plat_priv->fw_mem_seg_len)
  330. segment_count = plat_priv->fw_mem_seg_len;
  331. for (i = 0; i < segment_count; i++) {
  332. segment[i].size = plat_priv->fw_mem[i].size;
  333. segment[i].va = plat_priv->fw_mem[i].va;
  334. segment[i].pa = plat_priv->fw_mem[i].pa;
  335. }
  336. break;
  337. case CNSS_REMOTE_MEM_TYPE_QDSS:
  338. if (segment_count > plat_priv->qdss_mem_seg_len)
  339. segment_count = plat_priv->qdss_mem_seg_len;
  340. for (i = 0; i < segment_count; i++) {
  341. segment[i].size = plat_priv->qdss_mem[i].size;
  342. segment[i].va = plat_priv->qdss_mem[i].va;
  343. segment[i].pa = plat_priv->qdss_mem[i].pa;
  344. }
  345. break;
  346. default:
  347. return -EINVAL;
  348. }
  349. return 0;
  350. }
  351. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  352. static int cnss_get_audio_iommu_domain(struct cnss_plat_data *plat_priv)
  353. {
  354. struct device_node *audio_ion_node;
  355. struct platform_device *audio_ion_pdev;
  356. audio_ion_node = of_find_compatible_node(NULL, NULL,
  357. "qcom,msm-audio-ion");
  358. if (!audio_ion_node) {
  359. cnss_pr_err("Unable to get Audio ion node");
  360. return -EINVAL;
  361. }
  362. audio_ion_pdev = of_find_device_by_node(audio_ion_node);
  363. of_node_put(audio_ion_node);
  364. if (!audio_ion_pdev) {
  365. cnss_pr_err("Unable to get Audio ion platform device");
  366. return -EINVAL;
  367. }
  368. plat_priv->audio_iommu_domain =
  369. iommu_get_domain_for_dev(&audio_ion_pdev->dev);
  370. put_device(&audio_ion_pdev->dev);
  371. if (!plat_priv->audio_iommu_domain) {
  372. cnss_pr_err("Unable to get Audio ion iommu domain");
  373. return -EINVAL;
  374. }
  375. return 0;
  376. }
  377. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  378. enum cnss_feature_v01 feature)
  379. {
  380. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  381. return -EINVAL;
  382. plat_priv->feature_list |= 1 << feature;
  383. return 0;
  384. }
  385. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  386. enum cnss_feature_v01 feature)
  387. {
  388. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  389. return -EINVAL;
  390. plat_priv->feature_list &= ~(1 << feature);
  391. return 0;
  392. }
  393. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  394. u64 *feature_list)
  395. {
  396. if (unlikely(!plat_priv))
  397. return -EINVAL;
  398. *feature_list = plat_priv->feature_list;
  399. return 0;
  400. }
  401. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  402. {
  403. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  404. return;
  405. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  406. plat_priv->driver_state,
  407. atomic_read(&plat_priv->pm_count));
  408. pm_stay_awake(&plat_priv->plat_dev->dev);
  409. }
  410. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  411. {
  412. int r = atomic_dec_return(&plat_priv->pm_count);
  413. WARN_ON(r < 0);
  414. if (r != 0)
  415. return;
  416. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  417. plat_priv->driver_state,
  418. atomic_read(&plat_priv->pm_count));
  419. pm_relax(&plat_priv->plat_dev->dev);
  420. }
  421. int cnss_get_fw_files_for_target(struct device *dev,
  422. struct cnss_fw_files *pfw_files,
  423. u32 target_type, u32 target_version)
  424. {
  425. if (!pfw_files)
  426. return -ENODEV;
  427. switch (target_version) {
  428. case QCA6174_REV3_VERSION:
  429. case QCA6174_REV3_2_VERSION:
  430. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  431. break;
  432. default:
  433. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  434. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  435. target_type, target_version);
  436. break;
  437. }
  438. return 0;
  439. }
  440. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  441. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  442. {
  443. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  444. if (!plat_priv)
  445. return -ENODEV;
  446. if (!cap)
  447. return -EINVAL;
  448. *cap = plat_priv->cap;
  449. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  450. return 0;
  451. }
  452. EXPORT_SYMBOL(cnss_get_platform_cap);
  453. /**
  454. * cnss_get_fw_cap - Check whether FW supports specific capability or not
  455. * @dev: Device
  456. * @fw_cap: FW Capability which needs to be checked
  457. *
  458. * Return: TRUE if supported, FALSE on failure or if not supported
  459. */
  460. bool cnss_get_fw_cap(struct device *dev, enum cnss_fw_caps fw_cap)
  461. {
  462. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  463. bool is_supported = false;
  464. if (!plat_priv)
  465. return is_supported;
  466. if (!plat_priv->fw_caps)
  467. return is_supported;
  468. switch (fw_cap) {
  469. case CNSS_FW_CAP_DIRECT_LINK_SUPPORT:
  470. is_supported = !!(plat_priv->fw_caps &
  471. QMI_WLFW_DIRECT_LINK_SUPPORT_V01);
  472. if (is_supported && cnss_get_audio_iommu_domain(plat_priv))
  473. is_supported = false;
  474. break;
  475. default:
  476. cnss_pr_err("Invalid FW Capability: 0x%x\n", fw_cap);
  477. }
  478. cnss_pr_dbg("FW Capability 0x%x is %s\n", fw_cap,
  479. is_supported ? "supported" : "not supported");
  480. return is_supported;
  481. }
  482. EXPORT_SYMBOL(cnss_get_fw_cap);
  483. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  484. {
  485. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  486. if (!plat_priv)
  487. return;
  488. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  489. }
  490. EXPORT_SYMBOL(cnss_request_pm_qos);
  491. void cnss_remove_pm_qos(struct device *dev)
  492. {
  493. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  494. if (!plat_priv)
  495. return;
  496. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  497. }
  498. EXPORT_SYMBOL(cnss_remove_pm_qos);
  499. int cnss_wlan_enable(struct device *dev,
  500. struct cnss_wlan_enable_cfg *config,
  501. enum cnss_driver_mode mode,
  502. const char *host_version)
  503. {
  504. int ret = 0;
  505. struct cnss_plat_data *plat_priv;
  506. if (!dev) {
  507. cnss_pr_err("Invalid dev pointer\n");
  508. return -EINVAL;
  509. }
  510. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  511. if (!plat_priv)
  512. return -ENODEV;
  513. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  514. return 0;
  515. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  516. return 0;
  517. if (!config || !host_version) {
  518. cnss_pr_err("Invalid config or host_version pointer\n");
  519. return -EINVAL;
  520. }
  521. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  522. mode, config, host_version);
  523. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  524. goto skip_cfg;
  525. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  526. config->send_msi_ce = true;
  527. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  528. if (ret)
  529. goto out;
  530. skip_cfg:
  531. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  532. out:
  533. return ret;
  534. }
  535. EXPORT_SYMBOL(cnss_wlan_enable);
  536. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  537. {
  538. int ret = 0;
  539. struct cnss_plat_data *plat_priv;
  540. if (!dev) {
  541. cnss_pr_err("Invalid dev pointer\n");
  542. return -EINVAL;
  543. }
  544. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  545. if (!plat_priv)
  546. return -ENODEV;
  547. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  548. return 0;
  549. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  550. return 0;
  551. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  552. cnss_bus_free_qdss_mem(plat_priv);
  553. return ret;
  554. }
  555. EXPORT_SYMBOL(cnss_wlan_disable);
  556. int cnss_audio_smmu_map(struct device *dev, phys_addr_t paddr,
  557. dma_addr_t iova, size_t size)
  558. {
  559. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  560. uint32_t page_offset;
  561. if (!plat_priv)
  562. return -ENODEV;
  563. if (!plat_priv->audio_iommu_domain)
  564. return -EINVAL;
  565. page_offset = iova & (PAGE_SIZE - 1);
  566. if (page_offset + size > PAGE_SIZE)
  567. size += PAGE_SIZE;
  568. iova -= page_offset;
  569. paddr -= page_offset;
  570. return iommu_map(plat_priv->audio_iommu_domain, iova, paddr,
  571. roundup(size, PAGE_SIZE), IOMMU_READ | IOMMU_WRITE |
  572. IOMMU_CACHE);
  573. }
  574. EXPORT_SYMBOL(cnss_audio_smmu_map);
  575. void cnss_audio_smmu_unmap(struct device *dev, dma_addr_t iova, size_t size)
  576. {
  577. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  578. uint32_t page_offset;
  579. if (!plat_priv)
  580. return;
  581. if (!plat_priv->audio_iommu_domain)
  582. return;
  583. page_offset = iova & (PAGE_SIZE - 1);
  584. if (page_offset + size > PAGE_SIZE)
  585. size += PAGE_SIZE;
  586. iova -= page_offset;
  587. iommu_unmap(plat_priv->audio_iommu_domain, iova,
  588. roundup(size, PAGE_SIZE));
  589. }
  590. EXPORT_SYMBOL(cnss_audio_smmu_unmap);
  591. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  592. u32 data_len, u8 *output)
  593. {
  594. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  595. int ret = 0;
  596. if (!plat_priv) {
  597. cnss_pr_err("plat_priv is NULL!\n");
  598. return -EINVAL;
  599. }
  600. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  601. return 0;
  602. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  603. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  604. plat_priv->driver_state);
  605. ret = -EINVAL;
  606. goto out;
  607. }
  608. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  609. data_len, output);
  610. out:
  611. return ret;
  612. }
  613. EXPORT_SYMBOL(cnss_athdiag_read);
  614. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  615. u32 data_len, u8 *input)
  616. {
  617. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  618. int ret = 0;
  619. if (!plat_priv) {
  620. cnss_pr_err("plat_priv is NULL!\n");
  621. return -EINVAL;
  622. }
  623. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  624. return 0;
  625. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  626. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  627. plat_priv->driver_state);
  628. ret = -EINVAL;
  629. goto out;
  630. }
  631. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  632. data_len, input);
  633. out:
  634. return ret;
  635. }
  636. EXPORT_SYMBOL(cnss_athdiag_write);
  637. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  638. {
  639. struct cnss_plat_data *plat_priv;
  640. if (!dev) {
  641. cnss_pr_err("Invalid dev pointer\n");
  642. return -EINVAL;
  643. }
  644. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  645. if (!plat_priv)
  646. return -ENODEV;
  647. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  648. return 0;
  649. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  650. }
  651. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  652. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  653. {
  654. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  655. if (!plat_priv)
  656. return -EINVAL;
  657. if (!plat_priv->fw_pcie_gen_switch) {
  658. cnss_pr_err("Firmware does not support PCIe gen switch\n");
  659. return -EOPNOTSUPP;
  660. }
  661. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  662. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  663. return -EINVAL;
  664. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  665. plat_priv->pcie_gen_speed = pcie_gen_speed;
  666. return 0;
  667. }
  668. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  669. static bool cnss_is_aux_support_enabled(struct cnss_plat_data *plat_priv)
  670. {
  671. switch (plat_priv->device_id) {
  672. case PEACH_DEVICE_ID:
  673. if (!plat_priv->fw_aux_uc_support) {
  674. cnss_pr_dbg("FW does not support aux uc capability\n");
  675. return false;
  676. }
  677. break;
  678. default:
  679. cnss_pr_dbg("Host does not support aux uc capability\n");
  680. return false;
  681. }
  682. return true;
  683. }
  684. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  685. {
  686. int ret = 0;
  687. if (!plat_priv)
  688. return -ENODEV;
  689. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  690. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  691. if (ret)
  692. goto out;
  693. if (plat_priv->hds_enabled)
  694. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  695. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  696. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  697. plat_priv->ctrl_params.bdf_type = CNSS_BDF_BIN;
  698. cnss_wlfw_ini_file_send_sync(plat_priv, WLFW_CONN_ROAM_INI_V01);
  699. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  700. plat_priv->ctrl_params.bdf_type);
  701. if (ret)
  702. goto out;
  703. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  704. return 0;
  705. ret = cnss_bus_load_m3(plat_priv);
  706. if (ret)
  707. goto out;
  708. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  709. if (ret)
  710. goto out;
  711. if (cnss_is_aux_support_enabled(plat_priv)) {
  712. ret = cnss_bus_load_aux(plat_priv);
  713. if (ret)
  714. goto out;
  715. ret = cnss_wlfw_aux_dnld_send_sync(plat_priv);
  716. if (ret)
  717. goto out;
  718. }
  719. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  720. return 0;
  721. out:
  722. return ret;
  723. }
  724. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  725. {
  726. int ret = 0;
  727. if (!plat_priv->antenna) {
  728. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  729. if (ret)
  730. goto out;
  731. }
  732. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  733. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  734. if (ret)
  735. goto out;
  736. }
  737. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  738. if (ret)
  739. goto out;
  740. return 0;
  741. out:
  742. return ret;
  743. }
  744. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  745. {
  746. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  747. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  748. }
  749. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  750. {
  751. u32 i;
  752. int ret = 0;
  753. struct cnss_plat_ipc_daemon_config *cfg;
  754. ret = cnss_qmi_get_dms_mac(plat_priv);
  755. if (ret == 0 && plat_priv->dms.mac_valid)
  756. goto qmi_send;
  757. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  758. * Thus assert on failure to get MAC from DMS even after retries
  759. */
  760. if (plat_priv->use_nv_mac) {
  761. /* Check if Daemon says platform support DMS MAC provisioning */
  762. cfg = cnss_plat_ipc_qmi_daemon_config();
  763. if (cfg) {
  764. if (!cfg->dms_mac_addr_supported) {
  765. cnss_pr_err("DMS MAC address not supported\n");
  766. CNSS_ASSERT(0);
  767. return -EINVAL;
  768. }
  769. }
  770. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  771. if (plat_priv->dms.mac_valid)
  772. break;
  773. ret = cnss_qmi_get_dms_mac(plat_priv);
  774. if (ret == 0)
  775. break;
  776. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  777. }
  778. if (!plat_priv->dms.mac_valid) {
  779. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  780. CNSS_ASSERT(0);
  781. return -EINVAL;
  782. }
  783. }
  784. qmi_send:
  785. if (plat_priv->dms.mac_valid)
  786. ret =
  787. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  788. ARRAY_SIZE(plat_priv->dms.mac));
  789. return ret;
  790. }
  791. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  792. enum cnss_cal_db_op op, u32 *size)
  793. {
  794. int ret = 0;
  795. u32 timeout = cnss_get_timeout(plat_priv,
  796. CNSS_TIMEOUT_DAEMON_CONNECTION);
  797. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  798. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  799. if (op >= CNSS_CAL_DB_INVALID_OP)
  800. return -EINVAL;
  801. if (!plat_priv->cbc_file_download) {
  802. cnss_pr_info("CAL DB file not required as per BDF\n");
  803. return 0;
  804. }
  805. if (*size == 0) {
  806. cnss_pr_err("Invalid cal file size\n");
  807. return -EINVAL;
  808. }
  809. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  810. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  811. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  812. msecs_to_jiffies(timeout));
  813. if (!ret) {
  814. cnss_pr_err("Daemon not yet connected\n");
  815. CNSS_ASSERT(0);
  816. return ret;
  817. }
  818. }
  819. if (!plat_priv->cal_mem->va) {
  820. cnss_pr_err("CAL DB Memory not setup for FW\n");
  821. return -EINVAL;
  822. }
  823. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  824. if (op == CNSS_CAL_DB_DOWNLOAD) {
  825. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  826. ret = cnss_plat_ipc_qmi_file_download(client_id,
  827. CNSS_CAL_DB_FILE_NAME,
  828. plat_priv->cal_mem->va,
  829. size);
  830. } else {
  831. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  832. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  833. CNSS_CAL_DB_FILE_NAME,
  834. plat_priv->cal_mem->va,
  835. *size);
  836. }
  837. if (ret)
  838. cnss_pr_err("Cal DB file %s %s failure\n",
  839. CNSS_CAL_DB_FILE_NAME,
  840. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  841. else
  842. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  843. CNSS_CAL_DB_FILE_NAME,
  844. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  845. *size);
  846. return ret;
  847. }
  848. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  849. {
  850. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  851. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  852. return -EINVAL;
  853. }
  854. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  855. &plat_priv->cal_file_size);
  856. }
  857. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  858. u32 *cal_file_size)
  859. {
  860. /* To download pass the total size of cal DB mem allocated.
  861. * After cal file is download to mem, its size is updated in
  862. * return pointer
  863. */
  864. *cal_file_size = plat_priv->cal_mem->size;
  865. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  866. cal_file_size);
  867. }
  868. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  869. {
  870. int ret = 0;
  871. u32 cal_file_size = 0;
  872. if (!plat_priv)
  873. return -ENODEV;
  874. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  875. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  876. return -EINVAL;
  877. }
  878. cnss_pr_dbg("Processing FW Init Done..\n");
  879. del_timer(&plat_priv->fw_boot_timer);
  880. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  881. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  882. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  883. cnss_send_subsys_restart_level_msg(plat_priv);
  884. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  885. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  886. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  887. }
  888. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  889. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  890. CNSS_WALTEST);
  891. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  892. cnss_request_antenna_sharing(plat_priv);
  893. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  894. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  895. plat_priv->cal_time = jiffies;
  896. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  897. CNSS_CALIBRATION);
  898. } else {
  899. ret = cnss_setup_dms_mac(plat_priv);
  900. ret = cnss_bus_call_driver_probe(plat_priv);
  901. }
  902. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  903. goto out;
  904. else if (ret)
  905. goto shutdown;
  906. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  907. return 0;
  908. shutdown:
  909. cnss_bus_dev_shutdown(plat_priv);
  910. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  911. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  912. out:
  913. return ret;
  914. }
  915. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  916. {
  917. switch (type) {
  918. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  919. return "SERVER_ARRIVE";
  920. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  921. return "SERVER_EXIT";
  922. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  923. return "REQUEST_MEM";
  924. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  925. return "FW_MEM_READY";
  926. case CNSS_DRIVER_EVENT_FW_READY:
  927. return "FW_READY";
  928. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  929. return "COLD_BOOT_CAL_START";
  930. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  931. return "COLD_BOOT_CAL_DONE";
  932. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  933. return "REGISTER_DRIVER";
  934. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  935. return "UNREGISTER_DRIVER";
  936. case CNSS_DRIVER_EVENT_RECOVERY:
  937. return "RECOVERY";
  938. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  939. return "FORCE_FW_ASSERT";
  940. case CNSS_DRIVER_EVENT_POWER_UP:
  941. return "POWER_UP";
  942. case CNSS_DRIVER_EVENT_POWER_DOWN:
  943. return "POWER_DOWN";
  944. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  945. return "IDLE_RESTART";
  946. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  947. return "IDLE_SHUTDOWN";
  948. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  949. return "IMS_WFC_CALL_IND";
  950. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  951. return "WLFW_TWC_CFG_IND";
  952. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  953. return "QDSS_TRACE_REQ_MEM";
  954. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  955. return "FW_MEM_FILE_SAVE";
  956. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  957. return "QDSS_TRACE_FREE";
  958. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  959. return "QDSS_TRACE_REQ_DATA";
  960. case CNSS_DRIVER_EVENT_MAX:
  961. return "EVENT_MAX";
  962. }
  963. return "UNKNOWN";
  964. };
  965. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  966. enum cnss_driver_event_type type,
  967. u32 flags, void *data)
  968. {
  969. struct cnss_driver_event *event;
  970. unsigned long irq_flags;
  971. int gfp = GFP_KERNEL;
  972. int ret = 0;
  973. if (!plat_priv)
  974. return -ENODEV;
  975. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  976. cnss_driver_event_to_str(type), type,
  977. flags ? "-sync" : "", plat_priv->driver_state, flags);
  978. if (type >= CNSS_DRIVER_EVENT_MAX) {
  979. cnss_pr_err("Invalid Event type: %d, can't post", type);
  980. return -EINVAL;
  981. }
  982. if (in_interrupt() || irqs_disabled())
  983. gfp = GFP_ATOMIC;
  984. event = kzalloc(sizeof(*event), gfp);
  985. if (!event)
  986. return -ENOMEM;
  987. cnss_pm_stay_awake(plat_priv);
  988. event->type = type;
  989. event->data = data;
  990. init_completion(&event->complete);
  991. event->ret = CNSS_EVENT_PENDING;
  992. event->sync = !!(flags & CNSS_EVENT_SYNC);
  993. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  994. list_add_tail(&event->list, &plat_priv->event_list);
  995. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  996. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  997. if (!(flags & CNSS_EVENT_SYNC))
  998. goto out;
  999. if (flags & CNSS_EVENT_UNKILLABLE)
  1000. wait_for_completion(&event->complete);
  1001. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  1002. ret = wait_for_completion_killable(&event->complete);
  1003. else
  1004. ret = wait_for_completion_interruptible(&event->complete);
  1005. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  1006. cnss_driver_event_to_str(type), type,
  1007. plat_priv->driver_state, ret, event->ret);
  1008. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  1009. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  1010. event->sync = false;
  1011. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1012. ret = -EINTR;
  1013. goto out;
  1014. }
  1015. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1016. ret = event->ret;
  1017. kfree(event);
  1018. out:
  1019. cnss_pm_relax(plat_priv);
  1020. return ret;
  1021. }
  1022. /**
  1023. * cnss_get_timeout - Get timeout for corresponding type.
  1024. * @plat_priv: Pointer to platform driver context.
  1025. * @cnss_timeout_type: Timeout type.
  1026. *
  1027. * Return: Timeout in milliseconds.
  1028. */
  1029. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  1030. enum cnss_timeout_type timeout_type)
  1031. {
  1032. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  1033. switch (timeout_type) {
  1034. case CNSS_TIMEOUT_QMI:
  1035. return qmi_timeout;
  1036. case CNSS_TIMEOUT_POWER_UP:
  1037. return (qmi_timeout << 2);
  1038. case CNSS_TIMEOUT_IDLE_RESTART:
  1039. /* In idle restart power up sequence, we have fw_boot_timer to
  1040. * handle FW initialization failure.
  1041. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  1042. * account for FW dump collection and FW re-initialization on
  1043. * retry.
  1044. */
  1045. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  1046. case CNSS_TIMEOUT_CALIBRATION:
  1047. /* Similar to mission mode, in CBC if FW init fails
  1048. * fw recovery is tried. Thus return 2x the CBC timeout.
  1049. */
  1050. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  1051. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  1052. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  1053. case CNSS_TIMEOUT_RDDM:
  1054. return CNSS_RDDM_TIMEOUT_MS;
  1055. case CNSS_TIMEOUT_RECOVERY:
  1056. return RECOVERY_TIMEOUT;
  1057. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  1058. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  1059. default:
  1060. return qmi_timeout;
  1061. }
  1062. }
  1063. unsigned int cnss_get_boot_timeout(struct device *dev)
  1064. {
  1065. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1066. if (!plat_priv) {
  1067. cnss_pr_err("plat_priv is NULL\n");
  1068. return 0;
  1069. }
  1070. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  1071. }
  1072. EXPORT_SYMBOL(cnss_get_boot_timeout);
  1073. int cnss_power_up(struct device *dev)
  1074. {
  1075. int ret = 0;
  1076. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1077. unsigned int timeout;
  1078. if (!plat_priv) {
  1079. cnss_pr_err("plat_priv is NULL\n");
  1080. return -ENODEV;
  1081. }
  1082. cnss_pr_dbg("Powering up device\n");
  1083. ret = cnss_driver_event_post(plat_priv,
  1084. CNSS_DRIVER_EVENT_POWER_UP,
  1085. CNSS_EVENT_SYNC, NULL);
  1086. if (ret)
  1087. goto out;
  1088. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1089. goto out;
  1090. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  1091. reinit_completion(&plat_priv->power_up_complete);
  1092. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1093. msecs_to_jiffies(timeout));
  1094. if (!ret) {
  1095. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  1096. timeout);
  1097. ret = -EAGAIN;
  1098. goto out;
  1099. }
  1100. return 0;
  1101. out:
  1102. return ret;
  1103. }
  1104. EXPORT_SYMBOL(cnss_power_up);
  1105. int cnss_power_down(struct device *dev)
  1106. {
  1107. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1108. if (!plat_priv) {
  1109. cnss_pr_err("plat_priv is NULL\n");
  1110. return -ENODEV;
  1111. }
  1112. cnss_pr_dbg("Powering down device\n");
  1113. return cnss_driver_event_post(plat_priv,
  1114. CNSS_DRIVER_EVENT_POWER_DOWN,
  1115. CNSS_EVENT_SYNC, NULL);
  1116. }
  1117. EXPORT_SYMBOL(cnss_power_down);
  1118. int cnss_idle_restart(struct device *dev)
  1119. {
  1120. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1121. unsigned int timeout;
  1122. int ret = 0;
  1123. if (!plat_priv) {
  1124. cnss_pr_err("plat_priv is NULL\n");
  1125. return -ENODEV;
  1126. }
  1127. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  1128. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  1129. return -EBUSY;
  1130. }
  1131. cnss_pr_dbg("Doing idle restart\n");
  1132. reinit_completion(&plat_priv->power_up_complete);
  1133. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1134. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1135. ret = -EINVAL;
  1136. goto out;
  1137. }
  1138. ret = cnss_driver_event_post(plat_priv,
  1139. CNSS_DRIVER_EVENT_IDLE_RESTART,
  1140. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1141. if (ret == -EINTR && plat_priv->device_id != QCA6174_DEVICE_ID)
  1142. cnss_pr_err("Idle restart has been interrupted but device power up is still in progress");
  1143. else if (ret)
  1144. goto out;
  1145. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1146. ret = cnss_bus_call_driver_probe(plat_priv);
  1147. goto out;
  1148. }
  1149. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  1150. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1151. msecs_to_jiffies(timeout));
  1152. if (plat_priv->power_up_error) {
  1153. ret = plat_priv->power_up_error;
  1154. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1155. cnss_pr_dbg("Power up error:%d, exiting\n",
  1156. plat_priv->power_up_error);
  1157. goto out;
  1158. }
  1159. if (!ret) {
  1160. /* This exception occurs after attempting retry of FW recovery.
  1161. * Thus we can safely power off the device.
  1162. */
  1163. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  1164. timeout);
  1165. ret = -ETIMEDOUT;
  1166. cnss_power_down(dev);
  1167. CNSS_ASSERT(0);
  1168. goto out;
  1169. }
  1170. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1171. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1172. del_timer(&plat_priv->fw_boot_timer);
  1173. ret = -EINVAL;
  1174. goto out;
  1175. }
  1176. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  1177. * non-DRV is supported only once after device reboots and before wifi
  1178. * is turned on. We do not allow switching back to DRV.
  1179. * To bring device back into DRV, user needs to reboot device.
  1180. */
  1181. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  1182. cnss_pr_dbg("DRV is disabled\n");
  1183. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  1184. }
  1185. mutex_unlock(&plat_priv->driver_ops_lock);
  1186. return 0;
  1187. out:
  1188. mutex_unlock(&plat_priv->driver_ops_lock);
  1189. return ret;
  1190. }
  1191. EXPORT_SYMBOL(cnss_idle_restart);
  1192. int cnss_idle_shutdown(struct device *dev)
  1193. {
  1194. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1195. if (!plat_priv) {
  1196. cnss_pr_err("plat_priv is NULL\n");
  1197. return -ENODEV;
  1198. }
  1199. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  1200. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  1201. return -EAGAIN;
  1202. }
  1203. cnss_pr_dbg("Doing idle shutdown\n");
  1204. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) ||
  1205. test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state)) {
  1206. cnss_pr_dbg("Recovery in progress. Ignore IDLE Shutdown\n");
  1207. return -EBUSY;
  1208. }
  1209. return cnss_driver_event_post(plat_priv,
  1210. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1211. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1212. }
  1213. EXPORT_SYMBOL(cnss_idle_shutdown);
  1214. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  1215. {
  1216. int ret = 0;
  1217. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1218. if (ret < 0) {
  1219. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  1220. goto out;
  1221. }
  1222. ret = cnss_get_clk(plat_priv);
  1223. if (ret) {
  1224. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  1225. goto put_vreg;
  1226. }
  1227. ret = cnss_get_pinctrl(plat_priv);
  1228. if (ret) {
  1229. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  1230. goto put_clk;
  1231. }
  1232. return 0;
  1233. put_clk:
  1234. cnss_put_clk(plat_priv);
  1235. put_vreg:
  1236. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1237. out:
  1238. return ret;
  1239. }
  1240. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  1241. {
  1242. cnss_put_clk(plat_priv);
  1243. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1244. }
  1245. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1246. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  1247. unsigned long code,
  1248. void *ss_handle)
  1249. {
  1250. struct cnss_plat_data *plat_priv =
  1251. container_of(nb, struct cnss_plat_data, modem_nb);
  1252. struct cnss_esoc_info *esoc_info;
  1253. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  1254. if (!plat_priv)
  1255. return NOTIFY_DONE;
  1256. esoc_info = &plat_priv->esoc_info;
  1257. if (code == SUBSYS_AFTER_POWERUP)
  1258. esoc_info->modem_current_status = 1;
  1259. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  1260. esoc_info->modem_current_status = 0;
  1261. else
  1262. return NOTIFY_DONE;
  1263. if (!cnss_bus_call_driver_modem_status(plat_priv,
  1264. esoc_info->modem_current_status))
  1265. return NOTIFY_DONE;
  1266. return NOTIFY_OK;
  1267. }
  1268. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1269. {
  1270. int ret = 0;
  1271. struct device *dev;
  1272. struct cnss_esoc_info *esoc_info;
  1273. struct esoc_desc *esoc_desc;
  1274. const char *client_desc;
  1275. dev = &plat_priv->plat_dev->dev;
  1276. esoc_info = &plat_priv->esoc_info;
  1277. esoc_info->notify_modem_status =
  1278. of_property_read_bool(dev->of_node,
  1279. "qcom,notify-modem-status");
  1280. if (!esoc_info->notify_modem_status)
  1281. goto out;
  1282. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1283. &client_desc);
  1284. if (ret) {
  1285. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1286. } else {
  1287. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1288. if (IS_ERR_OR_NULL(esoc_desc)) {
  1289. ret = PTR_RET(esoc_desc);
  1290. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1291. ret);
  1292. goto out;
  1293. }
  1294. esoc_info->esoc_desc = esoc_desc;
  1295. }
  1296. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1297. esoc_info->modem_current_status = 0;
  1298. esoc_info->modem_notify_handler =
  1299. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1300. esoc_info->esoc_desc->name :
  1301. "modem", &plat_priv->modem_nb);
  1302. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1303. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1304. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1305. ret);
  1306. goto unreg_esoc;
  1307. }
  1308. return 0;
  1309. unreg_esoc:
  1310. if (esoc_info->esoc_desc)
  1311. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1312. out:
  1313. return ret;
  1314. }
  1315. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1316. {
  1317. struct device *dev;
  1318. struct cnss_esoc_info *esoc_info;
  1319. dev = &plat_priv->plat_dev->dev;
  1320. esoc_info = &plat_priv->esoc_info;
  1321. if (esoc_info->notify_modem_status)
  1322. subsys_notif_unregister_notifier
  1323. (esoc_info->modem_notify_handler,
  1324. &plat_priv->modem_nb);
  1325. if (esoc_info->esoc_desc)
  1326. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1327. }
  1328. #else
  1329. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1330. {
  1331. return 0;
  1332. }
  1333. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1334. #endif
  1335. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1336. {
  1337. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1338. int ret = 0;
  1339. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1340. return 0;
  1341. enable_irq(sol_gpio->dev_sol_irq);
  1342. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1343. if (ret)
  1344. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1345. ret);
  1346. return ret;
  1347. }
  1348. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1349. {
  1350. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1351. int ret = 0;
  1352. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1353. return 0;
  1354. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1355. if (ret)
  1356. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1357. ret);
  1358. disable_irq(sol_gpio->dev_sol_irq);
  1359. return ret;
  1360. }
  1361. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1362. {
  1363. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1364. if (sol_gpio->dev_sol_gpio < 0)
  1365. return -EINVAL;
  1366. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1367. }
  1368. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1369. {
  1370. struct cnss_plat_data *plat_priv = data;
  1371. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1372. sol_gpio->dev_sol_counter++;
  1373. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1374. irq, sol_gpio->dev_sol_counter);
  1375. /* Make sure abort current suspend */
  1376. cnss_pm_stay_awake(plat_priv);
  1377. cnss_pm_relax(plat_priv);
  1378. pm_system_wakeup();
  1379. cnss_bus_handle_dev_sol_irq(plat_priv);
  1380. return IRQ_HANDLED;
  1381. }
  1382. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1383. {
  1384. struct device *dev = &plat_priv->plat_dev->dev;
  1385. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1386. int ret = 0;
  1387. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1388. "wlan-dev-sol-gpio", 0);
  1389. if (sol_gpio->dev_sol_gpio < 0)
  1390. goto out;
  1391. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1392. sol_gpio->dev_sol_gpio);
  1393. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1394. if (ret) {
  1395. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1396. ret);
  1397. goto out;
  1398. }
  1399. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1400. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1401. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1402. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1403. if (ret) {
  1404. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1405. goto free_gpio;
  1406. }
  1407. return 0;
  1408. free_gpio:
  1409. gpio_free(sol_gpio->dev_sol_gpio);
  1410. out:
  1411. return ret;
  1412. }
  1413. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1414. {
  1415. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1416. if (sol_gpio->dev_sol_gpio < 0)
  1417. return;
  1418. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1419. gpio_free(sol_gpio->dev_sol_gpio);
  1420. }
  1421. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1422. {
  1423. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1424. if (sol_gpio->host_sol_gpio < 0)
  1425. return -EINVAL;
  1426. if (value)
  1427. cnss_pr_dbg("Assert host SOL GPIO\n");
  1428. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1429. return 0;
  1430. }
  1431. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1432. {
  1433. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1434. if (sol_gpio->host_sol_gpio < 0)
  1435. return -EINVAL;
  1436. return gpio_get_value(sol_gpio->host_sol_gpio);
  1437. }
  1438. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1439. {
  1440. struct device *dev = &plat_priv->plat_dev->dev;
  1441. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1442. int ret = 0;
  1443. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1444. "wlan-host-sol-gpio", 0);
  1445. if (sol_gpio->host_sol_gpio < 0)
  1446. goto out;
  1447. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1448. sol_gpio->host_sol_gpio);
  1449. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1450. if (ret) {
  1451. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1452. ret);
  1453. goto out;
  1454. }
  1455. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1456. return 0;
  1457. out:
  1458. return ret;
  1459. }
  1460. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1461. {
  1462. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1463. if (sol_gpio->host_sol_gpio < 0)
  1464. return;
  1465. gpio_free(sol_gpio->host_sol_gpio);
  1466. }
  1467. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1468. {
  1469. int ret;
  1470. ret = cnss_init_dev_sol_gpio(plat_priv);
  1471. if (ret)
  1472. goto out;
  1473. ret = cnss_init_host_sol_gpio(plat_priv);
  1474. if (ret)
  1475. goto deinit_dev_sol;
  1476. return 0;
  1477. deinit_dev_sol:
  1478. cnss_deinit_dev_sol_gpio(plat_priv);
  1479. out:
  1480. return ret;
  1481. }
  1482. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1483. {
  1484. cnss_deinit_host_sol_gpio(plat_priv);
  1485. cnss_deinit_dev_sol_gpio(plat_priv);
  1486. }
  1487. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1488. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1489. {
  1490. struct cnss_plat_data *plat_priv;
  1491. int ret = 0;
  1492. if (!subsys_desc->dev) {
  1493. cnss_pr_err("dev from subsys_desc is NULL\n");
  1494. return -ENODEV;
  1495. }
  1496. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1497. if (!plat_priv) {
  1498. cnss_pr_err("plat_priv is NULL\n");
  1499. return -ENODEV;
  1500. }
  1501. if (!plat_priv->driver_state) {
  1502. cnss_pr_dbg("subsys powerup is ignored\n");
  1503. return 0;
  1504. }
  1505. ret = cnss_bus_dev_powerup(plat_priv);
  1506. if (ret)
  1507. __pm_relax(plat_priv->recovery_ws);
  1508. return ret;
  1509. }
  1510. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1511. bool force_stop)
  1512. {
  1513. struct cnss_plat_data *plat_priv;
  1514. if (!subsys_desc->dev) {
  1515. cnss_pr_err("dev from subsys_desc is NULL\n");
  1516. return -ENODEV;
  1517. }
  1518. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1519. if (!plat_priv) {
  1520. cnss_pr_err("plat_priv is NULL\n");
  1521. return -ENODEV;
  1522. }
  1523. if (!plat_priv->driver_state) {
  1524. cnss_pr_dbg("subsys shutdown is ignored\n");
  1525. return 0;
  1526. }
  1527. return cnss_bus_dev_shutdown(plat_priv);
  1528. }
  1529. void cnss_device_crashed(struct device *dev)
  1530. {
  1531. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1532. struct cnss_subsys_info *subsys_info;
  1533. if (!plat_priv)
  1534. return;
  1535. subsys_info = &plat_priv->subsys_info;
  1536. if (subsys_info->subsys_device) {
  1537. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1538. subsys_set_crash_status(subsys_info->subsys_device, true);
  1539. subsystem_restart_dev(subsys_info->subsys_device);
  1540. }
  1541. }
  1542. EXPORT_SYMBOL(cnss_device_crashed);
  1543. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1544. {
  1545. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1546. if (!plat_priv) {
  1547. cnss_pr_err("plat_priv is NULL\n");
  1548. return;
  1549. }
  1550. cnss_bus_dev_crash_shutdown(plat_priv);
  1551. }
  1552. static int cnss_subsys_ramdump(int enable,
  1553. const struct subsys_desc *subsys_desc)
  1554. {
  1555. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1556. if (!plat_priv) {
  1557. cnss_pr_err("plat_priv is NULL\n");
  1558. return -ENODEV;
  1559. }
  1560. if (!enable)
  1561. return 0;
  1562. return cnss_bus_dev_ramdump(plat_priv);
  1563. }
  1564. static void cnss_recovery_work_handler(struct work_struct *work)
  1565. {
  1566. }
  1567. #else
  1568. void cnss_recovery_handler(struct cnss_plat_data *plat_priv)
  1569. {
  1570. int ret;
  1571. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1572. if (!plat_priv->recovery_enabled)
  1573. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1574. cnss_bus_dev_shutdown(plat_priv);
  1575. cnss_bus_dev_ramdump(plat_priv);
  1576. /* If recovery is triggered before Host driver registration,
  1577. * avoid device power up because eventually device will be
  1578. * power up as part of driver registration.
  1579. */
  1580. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1581. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1582. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1583. plat_priv->driver_state);
  1584. return;
  1585. }
  1586. msleep(POWER_RESET_MIN_DELAY_MS);
  1587. ret = cnss_bus_dev_powerup(plat_priv);
  1588. if (ret)
  1589. __pm_relax(plat_priv->recovery_ws);
  1590. return;
  1591. }
  1592. static void cnss_recovery_work_handler(struct work_struct *work)
  1593. {
  1594. struct cnss_plat_data *plat_priv =
  1595. container_of(work, struct cnss_plat_data, recovery_work);
  1596. cnss_recovery_handler(plat_priv);
  1597. }
  1598. void cnss_device_crashed(struct device *dev)
  1599. {
  1600. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1601. if (!plat_priv)
  1602. return;
  1603. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1604. schedule_work(&plat_priv->recovery_work);
  1605. }
  1606. EXPORT_SYMBOL(cnss_device_crashed);
  1607. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1608. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1609. {
  1610. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1611. struct cnss_ramdump_info *ramdump_info;
  1612. if (!plat_priv)
  1613. return NULL;
  1614. ramdump_info = &plat_priv->ramdump_info;
  1615. *size = ramdump_info->ramdump_size;
  1616. return ramdump_info->ramdump_va;
  1617. }
  1618. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1619. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1620. {
  1621. switch (reason) {
  1622. case CNSS_REASON_DEFAULT:
  1623. return "DEFAULT";
  1624. case CNSS_REASON_LINK_DOWN:
  1625. return "LINK_DOWN";
  1626. case CNSS_REASON_RDDM:
  1627. return "RDDM";
  1628. case CNSS_REASON_TIMEOUT:
  1629. return "TIMEOUT";
  1630. }
  1631. return "UNKNOWN";
  1632. };
  1633. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1634. enum cnss_recovery_reason reason)
  1635. {
  1636. plat_priv->recovery_count++;
  1637. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1638. goto self_recovery;
  1639. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1640. cnss_pr_dbg("Skip device recovery\n");
  1641. return 0;
  1642. }
  1643. /* FW recovery sequence has multiple steps and firmware load requires
  1644. * linux PM in awake state. Thus hold the cnss wake source until
  1645. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1646. * time taken in this process.
  1647. */
  1648. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1649. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1650. true);
  1651. switch (reason) {
  1652. case CNSS_REASON_LINK_DOWN:
  1653. if (!cnss_bus_check_link_status(plat_priv)) {
  1654. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1655. return 0;
  1656. }
  1657. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1658. &plat_priv->ctrl_params.quirks))
  1659. goto self_recovery;
  1660. if (!cnss_bus_recover_link_down(plat_priv)) {
  1661. /* clear recovery bit here to avoid skipping
  1662. * the recovery work for RDDM later
  1663. */
  1664. clear_bit(CNSS_DRIVER_RECOVERY,
  1665. &plat_priv->driver_state);
  1666. return 0;
  1667. }
  1668. break;
  1669. case CNSS_REASON_RDDM:
  1670. cnss_bus_collect_dump_info(plat_priv, false);
  1671. break;
  1672. case CNSS_REASON_DEFAULT:
  1673. case CNSS_REASON_TIMEOUT:
  1674. break;
  1675. default:
  1676. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1677. cnss_recovery_reason_to_str(reason), reason);
  1678. break;
  1679. }
  1680. cnss_bus_device_crashed(plat_priv);
  1681. return 0;
  1682. self_recovery:
  1683. cnss_pr_dbg("Going for self recovery\n");
  1684. cnss_bus_dev_shutdown(plat_priv);
  1685. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1686. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1687. &plat_priv->ctrl_params.quirks);
  1688. /* If link down self recovery is triggered before Host driver
  1689. * registration, avoid device power up because eventually device
  1690. * will be power up as part of driver registration.
  1691. */
  1692. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1693. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1694. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1695. plat_priv->driver_state);
  1696. return 0;
  1697. }
  1698. cnss_bus_dev_powerup(plat_priv);
  1699. return 0;
  1700. }
  1701. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1702. void *data)
  1703. {
  1704. struct cnss_recovery_data *recovery_data = data;
  1705. int ret = 0;
  1706. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1707. cnss_recovery_reason_to_str(recovery_data->reason),
  1708. recovery_data->reason);
  1709. if (!plat_priv->driver_state) {
  1710. cnss_pr_err("Improper driver state, ignore recovery\n");
  1711. ret = -EINVAL;
  1712. goto out;
  1713. }
  1714. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1715. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1716. ret = -EINVAL;
  1717. goto out;
  1718. }
  1719. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1720. cnss_pr_err("Recovery is already in progress\n");
  1721. CNSS_ASSERT(0);
  1722. ret = -EINVAL;
  1723. goto out;
  1724. }
  1725. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1726. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1727. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1728. ret = -EINVAL;
  1729. goto out;
  1730. }
  1731. switch (plat_priv->device_id) {
  1732. case QCA6174_DEVICE_ID:
  1733. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1734. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1735. &plat_priv->driver_state)) {
  1736. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1737. ret = -EINVAL;
  1738. goto out;
  1739. }
  1740. break;
  1741. default:
  1742. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1743. set_bit(CNSS_FW_BOOT_RECOVERY,
  1744. &plat_priv->driver_state);
  1745. }
  1746. break;
  1747. }
  1748. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1749. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1750. out:
  1751. kfree(data);
  1752. return ret;
  1753. }
  1754. int cnss_self_recovery(struct device *dev,
  1755. enum cnss_recovery_reason reason)
  1756. {
  1757. cnss_schedule_recovery(dev, reason);
  1758. return 0;
  1759. }
  1760. EXPORT_SYMBOL(cnss_self_recovery);
  1761. void cnss_schedule_recovery(struct device *dev,
  1762. enum cnss_recovery_reason reason)
  1763. {
  1764. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1765. struct cnss_recovery_data *data;
  1766. int gfp = GFP_KERNEL;
  1767. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1768. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1769. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1770. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1771. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1772. return;
  1773. }
  1774. if (in_interrupt() || irqs_disabled())
  1775. gfp = GFP_ATOMIC;
  1776. data = kzalloc(sizeof(*data), gfp);
  1777. if (!data)
  1778. return;
  1779. data->reason = reason;
  1780. cnss_driver_event_post(plat_priv,
  1781. CNSS_DRIVER_EVENT_RECOVERY,
  1782. 0, data);
  1783. }
  1784. EXPORT_SYMBOL(cnss_schedule_recovery);
  1785. int cnss_force_fw_assert(struct device *dev)
  1786. {
  1787. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1788. if (!plat_priv) {
  1789. cnss_pr_err("plat_priv is NULL\n");
  1790. return -ENODEV;
  1791. }
  1792. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1793. cnss_pr_info("Forced FW assert is not supported\n");
  1794. return -EOPNOTSUPP;
  1795. }
  1796. if (cnss_bus_is_device_down(plat_priv)) {
  1797. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1798. return 0;
  1799. }
  1800. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1801. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1802. return 0;
  1803. }
  1804. if (in_interrupt() || irqs_disabled())
  1805. cnss_driver_event_post(plat_priv,
  1806. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1807. 0, NULL);
  1808. else
  1809. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1810. return 0;
  1811. }
  1812. EXPORT_SYMBOL(cnss_force_fw_assert);
  1813. int cnss_force_collect_rddm(struct device *dev)
  1814. {
  1815. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1816. unsigned int timeout;
  1817. int ret = 0;
  1818. if (!plat_priv) {
  1819. cnss_pr_err("plat_priv is NULL\n");
  1820. return -ENODEV;
  1821. }
  1822. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1823. cnss_pr_info("Force collect rddm is not supported\n");
  1824. return -EOPNOTSUPP;
  1825. }
  1826. if (cnss_bus_is_device_down(plat_priv)) {
  1827. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1828. goto wait_rddm;
  1829. }
  1830. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1831. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1832. goto wait_rddm;
  1833. }
  1834. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1835. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1836. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1837. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1838. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1839. return 0;
  1840. }
  1841. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1842. if (ret)
  1843. return ret;
  1844. wait_rddm:
  1845. reinit_completion(&plat_priv->rddm_complete);
  1846. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1847. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1848. msecs_to_jiffies(timeout));
  1849. if (!ret) {
  1850. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1851. timeout);
  1852. ret = -ETIMEDOUT;
  1853. } else if (ret > 0) {
  1854. ret = 0;
  1855. }
  1856. return ret;
  1857. }
  1858. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1859. int cnss_qmi_send_get(struct device *dev)
  1860. {
  1861. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1862. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1863. return 0;
  1864. return cnss_bus_qmi_send_get(plat_priv);
  1865. }
  1866. EXPORT_SYMBOL(cnss_qmi_send_get);
  1867. int cnss_qmi_send_put(struct device *dev)
  1868. {
  1869. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1870. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1871. return 0;
  1872. return cnss_bus_qmi_send_put(plat_priv);
  1873. }
  1874. EXPORT_SYMBOL(cnss_qmi_send_put);
  1875. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1876. int cmd_len, void *cb_ctx,
  1877. int (*cb)(void *ctx, void *event, int event_len))
  1878. {
  1879. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1880. int ret;
  1881. if (!plat_priv)
  1882. return -ENODEV;
  1883. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1884. return -EINVAL;
  1885. plat_priv->get_info_cb = cb;
  1886. plat_priv->get_info_cb_ctx = cb_ctx;
  1887. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1888. if (ret) {
  1889. plat_priv->get_info_cb = NULL;
  1890. plat_priv->get_info_cb_ctx = NULL;
  1891. }
  1892. return ret;
  1893. }
  1894. EXPORT_SYMBOL(cnss_qmi_send);
  1895. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1896. {
  1897. int ret = 0;
  1898. u32 retry = 0, timeout;
  1899. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1900. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1901. goto out;
  1902. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1903. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1904. goto out;
  1905. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1906. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1907. goto out;
  1908. }
  1909. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1910. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1911. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1912. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1913. CNSS_ASSERT(0);
  1914. return -EINVAL;
  1915. }
  1916. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1917. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1918. break;
  1919. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1920. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1921. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1922. CNSS_ASSERT(0);
  1923. ret = -EINVAL;
  1924. goto mark_cal_fail;
  1925. }
  1926. }
  1927. switch (plat_priv->device_id) {
  1928. case QCA6290_DEVICE_ID:
  1929. case QCA6390_DEVICE_ID:
  1930. case QCA6490_DEVICE_ID:
  1931. case KIWI_DEVICE_ID:
  1932. case MANGO_DEVICE_ID:
  1933. case PEACH_DEVICE_ID:
  1934. break;
  1935. default:
  1936. cnss_pr_err("Not supported for device ID 0x%lx\n",
  1937. plat_priv->device_id);
  1938. ret = -EINVAL;
  1939. goto mark_cal_fail;
  1940. }
  1941. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1942. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1943. timeout = cnss_get_timeout(plat_priv,
  1944. CNSS_TIMEOUT_CALIBRATION);
  1945. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1946. timeout / 1000);
  1947. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1948. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1949. msecs_to_jiffies(timeout));
  1950. }
  1951. reinit_completion(&plat_priv->cal_complete);
  1952. ret = cnss_bus_dev_powerup(plat_priv);
  1953. mark_cal_fail:
  1954. if (ret) {
  1955. complete(&plat_priv->cal_complete);
  1956. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1957. /* Set CBC done in driver state to mark attempt and note error
  1958. * since calibration cannot be retried at boot.
  1959. */
  1960. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1961. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1962. if (plat_priv->device_id == QCA6174_DEVICE_ID ||
  1963. plat_priv->device_id == QCN7605_DEVICE_ID) {
  1964. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1965. goto out;
  1966. cnss_pr_info("Schedule WLAN driver load\n");
  1967. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1968. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1969. 0);
  1970. }
  1971. }
  1972. out:
  1973. return ret;
  1974. }
  1975. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  1976. void *data)
  1977. {
  1978. struct cnss_cal_info *cal_info = data;
  1979. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  1980. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  1981. goto out;
  1982. switch (cal_info->cal_status) {
  1983. case CNSS_CAL_DONE:
  1984. cnss_pr_dbg("Calibration completed successfully\n");
  1985. plat_priv->cal_done = true;
  1986. break;
  1987. case CNSS_CAL_TIMEOUT:
  1988. case CNSS_CAL_FAILURE:
  1989. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  1990. cal_info->cal_status);
  1991. break;
  1992. default:
  1993. cnss_pr_err("Unknown calibration status: %u\n",
  1994. cal_info->cal_status);
  1995. break;
  1996. }
  1997. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  1998. cnss_bus_free_qdss_mem(plat_priv);
  1999. cnss_release_antenna_sharing(plat_priv);
  2000. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  2001. goto skip_shutdown;
  2002. cnss_bus_dev_shutdown(plat_priv);
  2003. msleep(POWER_RESET_MIN_DELAY_MS);
  2004. skip_shutdown:
  2005. complete(&plat_priv->cal_complete);
  2006. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  2007. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  2008. if (cal_info->cal_status == CNSS_CAL_DONE) {
  2009. cnss_cal_mem_upload_to_file(plat_priv);
  2010. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  2011. goto out;
  2012. cnss_pr_dbg("Schedule WLAN driver load\n");
  2013. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2014. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2015. 0);
  2016. }
  2017. out:
  2018. kfree(data);
  2019. return 0;
  2020. }
  2021. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  2022. {
  2023. int ret;
  2024. ret = cnss_bus_dev_powerup(plat_priv);
  2025. if (ret)
  2026. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  2027. return ret;
  2028. }
  2029. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  2030. {
  2031. cnss_bus_dev_shutdown(plat_priv);
  2032. return 0;
  2033. }
  2034. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  2035. {
  2036. int ret = 0;
  2037. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  2038. if (ret < 0)
  2039. return ret;
  2040. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  2041. }
  2042. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  2043. u32 mem_seg_len, u64 pa, u32 size)
  2044. {
  2045. int i = 0;
  2046. u64 offset = 0;
  2047. void *va = NULL;
  2048. u64 local_pa;
  2049. u32 local_size;
  2050. for (i = 0; i < mem_seg_len; i++) {
  2051. local_pa = (u64)fw_mem[i].pa;
  2052. local_size = (u32)fw_mem[i].size;
  2053. if (pa == local_pa && size <= local_size) {
  2054. va = fw_mem[i].va;
  2055. break;
  2056. }
  2057. if (pa > local_pa &&
  2058. pa < local_pa + local_size &&
  2059. pa + size <= local_pa + local_size) {
  2060. offset = pa - local_pa;
  2061. va = fw_mem[i].va + offset;
  2062. break;
  2063. }
  2064. }
  2065. return va;
  2066. }
  2067. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  2068. void *data)
  2069. {
  2070. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2071. struct cnss_fw_mem *fw_mem_seg;
  2072. int ret = 0L;
  2073. void *va = NULL;
  2074. u32 i, fw_mem_seg_len;
  2075. switch (event_data->mem_type) {
  2076. case QMI_WLFW_MEM_TYPE_DDR_V01:
  2077. if (!plat_priv->fw_mem_seg_len)
  2078. goto invalid_mem_save;
  2079. fw_mem_seg = plat_priv->fw_mem;
  2080. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  2081. break;
  2082. case QMI_WLFW_MEM_QDSS_V01:
  2083. if (!plat_priv->qdss_mem_seg_len)
  2084. goto invalid_mem_save;
  2085. fw_mem_seg = plat_priv->qdss_mem;
  2086. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  2087. break;
  2088. default:
  2089. goto invalid_mem_save;
  2090. }
  2091. for (i = 0; i < event_data->mem_seg_len; i++) {
  2092. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  2093. event_data->mem_seg[i].addr,
  2094. event_data->mem_seg[i].size);
  2095. if (!va) {
  2096. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  2097. &event_data->mem_seg[i].addr,
  2098. event_data->mem_type);
  2099. ret = -EINVAL;
  2100. break;
  2101. }
  2102. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  2103. event_data->file_name,
  2104. event_data->mem_seg[i].size);
  2105. if (ret < 0) {
  2106. cnss_pr_err("Fail to save fw mem data: %d\n",
  2107. ret);
  2108. break;
  2109. }
  2110. }
  2111. kfree(data);
  2112. return ret;
  2113. invalid_mem_save:
  2114. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  2115. event_data->mem_type);
  2116. kfree(data);
  2117. return -EINVAL;
  2118. }
  2119. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  2120. {
  2121. cnss_bus_free_qdss_mem(plat_priv);
  2122. return 0;
  2123. }
  2124. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  2125. void *data)
  2126. {
  2127. int ret = 0;
  2128. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2129. if (!plat_priv)
  2130. return -ENODEV;
  2131. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  2132. event_data->total_size);
  2133. kfree(data);
  2134. return ret;
  2135. }
  2136. static void cnss_driver_event_work(struct work_struct *work)
  2137. {
  2138. struct cnss_plat_data *plat_priv =
  2139. container_of(work, struct cnss_plat_data, event_work);
  2140. struct cnss_driver_event *event;
  2141. unsigned long flags;
  2142. int ret = 0;
  2143. if (!plat_priv) {
  2144. cnss_pr_err("plat_priv is NULL!\n");
  2145. return;
  2146. }
  2147. cnss_pm_stay_awake(plat_priv);
  2148. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2149. while (!list_empty(&plat_priv->event_list)) {
  2150. event = list_first_entry(&plat_priv->event_list,
  2151. struct cnss_driver_event, list);
  2152. list_del(&event->list);
  2153. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2154. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  2155. cnss_driver_event_to_str(event->type),
  2156. event->sync ? "-sync" : "", event->type,
  2157. plat_priv->driver_state);
  2158. switch (event->type) {
  2159. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  2160. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  2161. break;
  2162. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  2163. ret = cnss_wlfw_server_exit(plat_priv);
  2164. break;
  2165. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  2166. ret = cnss_bus_alloc_fw_mem(plat_priv);
  2167. if (ret)
  2168. break;
  2169. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  2170. break;
  2171. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  2172. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  2173. break;
  2174. case CNSS_DRIVER_EVENT_FW_READY:
  2175. ret = cnss_fw_ready_hdlr(plat_priv);
  2176. break;
  2177. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  2178. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  2179. break;
  2180. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  2181. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  2182. event->data);
  2183. break;
  2184. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  2185. ret = cnss_bus_register_driver_hdlr(plat_priv,
  2186. event->data);
  2187. break;
  2188. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  2189. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  2190. break;
  2191. case CNSS_DRIVER_EVENT_RECOVERY:
  2192. ret = cnss_driver_recovery_hdlr(plat_priv,
  2193. event->data);
  2194. break;
  2195. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  2196. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  2197. break;
  2198. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  2199. set_bit(CNSS_DRIVER_IDLE_RESTART,
  2200. &plat_priv->driver_state);
  2201. fallthrough;
  2202. case CNSS_DRIVER_EVENT_POWER_UP:
  2203. ret = cnss_power_up_hdlr(plat_priv);
  2204. break;
  2205. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  2206. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  2207. &plat_priv->driver_state);
  2208. fallthrough;
  2209. case CNSS_DRIVER_EVENT_POWER_DOWN:
  2210. ret = cnss_power_down_hdlr(plat_priv);
  2211. break;
  2212. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  2213. ret = cnss_process_wfc_call_ind_event(plat_priv,
  2214. event->data);
  2215. break;
  2216. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  2217. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  2218. event->data);
  2219. break;
  2220. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  2221. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  2222. break;
  2223. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  2224. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  2225. event->data);
  2226. break;
  2227. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  2228. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  2229. break;
  2230. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  2231. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  2232. event->data);
  2233. break;
  2234. default:
  2235. cnss_pr_err("Invalid driver event type: %d",
  2236. event->type);
  2237. kfree(event);
  2238. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2239. continue;
  2240. }
  2241. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2242. if (event->sync) {
  2243. event->ret = ret;
  2244. complete(&event->complete);
  2245. continue;
  2246. }
  2247. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2248. kfree(event);
  2249. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2250. }
  2251. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2252. cnss_pm_relax(plat_priv);
  2253. }
  2254. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  2255. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2256. {
  2257. int ret = 0;
  2258. struct cnss_subsys_info *subsys_info;
  2259. subsys_info = &plat_priv->subsys_info;
  2260. subsys_info->subsys_desc.name = plat_priv->device_name;
  2261. subsys_info->subsys_desc.owner = THIS_MODULE;
  2262. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  2263. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  2264. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  2265. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  2266. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  2267. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  2268. if (IS_ERR(subsys_info->subsys_device)) {
  2269. ret = PTR_ERR(subsys_info->subsys_device);
  2270. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  2271. goto out;
  2272. }
  2273. subsys_info->subsys_handle =
  2274. subsystem_get(subsys_info->subsys_desc.name);
  2275. if (!subsys_info->subsys_handle) {
  2276. cnss_pr_err("Failed to get subsys_handle!\n");
  2277. ret = -EINVAL;
  2278. goto unregister_subsys;
  2279. } else if (IS_ERR(subsys_info->subsys_handle)) {
  2280. ret = PTR_ERR(subsys_info->subsys_handle);
  2281. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  2282. goto unregister_subsys;
  2283. }
  2284. return 0;
  2285. unregister_subsys:
  2286. subsys_unregister(subsys_info->subsys_device);
  2287. out:
  2288. return ret;
  2289. }
  2290. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2291. {
  2292. struct cnss_subsys_info *subsys_info;
  2293. subsys_info = &plat_priv->subsys_info;
  2294. subsystem_put(subsys_info->subsys_handle);
  2295. subsys_unregister(subsys_info->subsys_device);
  2296. }
  2297. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2298. {
  2299. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  2300. return create_ramdump_device(subsys_info->subsys_desc.name,
  2301. subsys_info->subsys_desc.dev);
  2302. }
  2303. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2304. void *ramdump_dev)
  2305. {
  2306. destroy_ramdump_device(ramdump_dev);
  2307. }
  2308. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2309. {
  2310. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2311. struct ramdump_segment segment;
  2312. memset(&segment, 0, sizeof(segment));
  2313. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  2314. segment.size = ramdump_info->ramdump_size;
  2315. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  2316. }
  2317. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2318. {
  2319. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2320. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2321. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2322. struct ramdump_segment *ramdump_segs, *s;
  2323. struct cnss_dump_meta_info meta_info = {0};
  2324. int i, ret = 0;
  2325. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2326. sizeof(*ramdump_segs),
  2327. GFP_KERNEL);
  2328. if (!ramdump_segs)
  2329. return -ENOMEM;
  2330. s = ramdump_segs + 1;
  2331. for (i = 0; i < dump_data->nentries; i++) {
  2332. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2333. cnss_pr_err("Unsupported dump type: %d",
  2334. dump_seg->type);
  2335. continue;
  2336. }
  2337. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2338. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2339. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2340. }
  2341. meta_info.entry[dump_seg->type].entry_num++;
  2342. s->address = dump_seg->address;
  2343. s->v_address = (void __iomem *)dump_seg->v_address;
  2344. s->size = dump_seg->size;
  2345. s++;
  2346. dump_seg++;
  2347. }
  2348. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2349. meta_info.version = CNSS_RAMDUMP_VERSION;
  2350. meta_info.chipset = plat_priv->device_id;
  2351. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2352. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2353. ramdump_segs->size = sizeof(meta_info);
  2354. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2355. dump_data->nentries + 1);
  2356. kfree(ramdump_segs);
  2357. return ret;
  2358. }
  2359. #else
  2360. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2361. void *data)
  2362. {
  2363. struct cnss_plat_data *plat_priv =
  2364. container_of(nb, struct cnss_plat_data, panic_nb);
  2365. cnss_bus_dev_crash_shutdown(plat_priv);
  2366. return NOTIFY_DONE;
  2367. }
  2368. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2369. {
  2370. int ret;
  2371. if (!plat_priv)
  2372. return -ENODEV;
  2373. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2374. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2375. &plat_priv->panic_nb);
  2376. if (ret) {
  2377. cnss_pr_err("Failed to register panic handler\n");
  2378. return -EINVAL;
  2379. }
  2380. return 0;
  2381. }
  2382. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2383. {
  2384. int ret;
  2385. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2386. &plat_priv->panic_nb);
  2387. if (ret)
  2388. cnss_pr_err("Failed to unregister panic handler\n");
  2389. }
  2390. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2391. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2392. {
  2393. return &plat_priv->plat_dev->dev;
  2394. }
  2395. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2396. void *ramdump_dev)
  2397. {
  2398. }
  2399. #endif
  2400. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2401. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2402. {
  2403. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2404. struct qcom_dump_segment segment;
  2405. struct list_head head;
  2406. INIT_LIST_HEAD(&head);
  2407. memset(&segment, 0, sizeof(segment));
  2408. segment.va = ramdump_info->ramdump_va;
  2409. segment.size = ramdump_info->ramdump_size;
  2410. list_add(&segment.node, &head);
  2411. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2412. }
  2413. #else
  2414. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2415. {
  2416. return 0;
  2417. }
  2418. /* Using completion event inside dynamically allocated ramdump_desc
  2419. * may result a race between freeing the event after setting it to
  2420. * complete inside dev coredump free callback and the thread that is
  2421. * waiting for completion.
  2422. */
  2423. DECLARE_COMPLETION(dump_done);
  2424. #define TIMEOUT_SAVE_DUMP_MS 30000
  2425. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2426. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2427. { \
  2428. if (class == ELFCLASS32) \
  2429. return sizeof(struct elf32_##__xhdr); \
  2430. else \
  2431. return sizeof(struct elf64_##__xhdr); \
  2432. }
  2433. SIZEOF_ELF_STRUCT(phdr)
  2434. SIZEOF_ELF_STRUCT(hdr)
  2435. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2436. do { \
  2437. if (class == ELFCLASS32) \
  2438. ((struct elf32_##__xhdr *)arg)->member = value; \
  2439. else \
  2440. ((struct elf64_##__xhdr *)arg)->member = value; \
  2441. } while (0)
  2442. #define set_ehdr_property(arg, class, member, value) \
  2443. set_xhdr_property(hdr, arg, class, member, value)
  2444. #define set_phdr_property(arg, class, member, value) \
  2445. set_xhdr_property(phdr, arg, class, member, value)
  2446. /* These replace qcom_ramdump driver APIs called from common API
  2447. * cnss_do_elf_dump() by the ones defined here.
  2448. */
  2449. #define qcom_dump_segment cnss_qcom_dump_segment
  2450. #define qcom_elf_dump cnss_qcom_elf_dump
  2451. #define dump_enabled cnss_dump_enabled
  2452. struct cnss_qcom_dump_segment {
  2453. struct list_head node;
  2454. dma_addr_t da;
  2455. void *va;
  2456. size_t size;
  2457. };
  2458. struct cnss_qcom_ramdump_desc {
  2459. void *data;
  2460. struct completion dump_done;
  2461. };
  2462. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2463. void *data, size_t datalen)
  2464. {
  2465. struct cnss_qcom_ramdump_desc *desc = data;
  2466. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2467. datalen);
  2468. }
  2469. static void cnss_qcom_devcd_freev(void *data)
  2470. {
  2471. struct cnss_qcom_ramdump_desc *desc = data;
  2472. cnss_pr_dbg("Free dump data for dev coredump\n");
  2473. complete(&dump_done);
  2474. vfree(desc->data);
  2475. kfree(desc);
  2476. }
  2477. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2478. gfp_t gfp)
  2479. {
  2480. struct cnss_qcom_ramdump_desc *desc;
  2481. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2482. int ret;
  2483. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2484. if (!desc)
  2485. return -ENOMEM;
  2486. desc->data = data;
  2487. reinit_completion(&dump_done);
  2488. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2489. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2490. ret = wait_for_completion_timeout(&dump_done,
  2491. msecs_to_jiffies(timeout));
  2492. if (!ret)
  2493. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2494. timeout);
  2495. return ret ? 0 : -ETIMEDOUT;
  2496. }
  2497. /* Since the elf32 and elf64 identification is identical apart from
  2498. * the class, use elf32 by default.
  2499. */
  2500. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2501. {
  2502. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2503. ehdr->e_ident[EI_CLASS] = class;
  2504. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2505. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2506. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2507. }
  2508. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2509. unsigned char class)
  2510. {
  2511. struct cnss_qcom_dump_segment *segment;
  2512. void *phdr, *ehdr;
  2513. size_t data_size, offset;
  2514. int phnum = 0;
  2515. void *data;
  2516. void __iomem *ptr;
  2517. if (!segs || list_empty(segs))
  2518. return -EINVAL;
  2519. data_size = sizeof_elf_hdr(class);
  2520. list_for_each_entry(segment, segs, node) {
  2521. data_size += sizeof_elf_phdr(class) + segment->size;
  2522. phnum++;
  2523. }
  2524. data = vmalloc(data_size);
  2525. if (!data)
  2526. return -ENOMEM;
  2527. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2528. ehdr = data;
  2529. memset(ehdr, 0, sizeof_elf_hdr(class));
  2530. init_elf_identification(ehdr, class);
  2531. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2532. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2533. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2534. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2535. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2536. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2537. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2538. phdr = data + sizeof_elf_hdr(class);
  2539. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2540. list_for_each_entry(segment, segs, node) {
  2541. memset(phdr, 0, sizeof_elf_phdr(class));
  2542. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2543. set_phdr_property(phdr, class, p_offset, offset);
  2544. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2545. set_phdr_property(phdr, class, p_paddr, segment->da);
  2546. set_phdr_property(phdr, class, p_filesz, segment->size);
  2547. set_phdr_property(phdr, class, p_memsz, segment->size);
  2548. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2549. set_phdr_property(phdr, class, p_align, 0);
  2550. if (segment->va) {
  2551. memcpy(data + offset, segment->va, segment->size);
  2552. } else {
  2553. ptr = devm_ioremap(dev, segment->da, segment->size);
  2554. if (!ptr) {
  2555. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2556. &segment->da, segment->size);
  2557. memset(data + offset, 0xff, segment->size);
  2558. } else {
  2559. memcpy_fromio(data + offset, ptr,
  2560. segment->size);
  2561. }
  2562. }
  2563. offset += segment->size;
  2564. phdr += sizeof_elf_phdr(class);
  2565. }
  2566. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2567. }
  2568. /* Saving dump to file system is always needed in this case. */
  2569. static bool cnss_dump_enabled(void)
  2570. {
  2571. return true;
  2572. }
  2573. #endif /* CONFIG_QCOM_RAMDUMP */
  2574. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2575. {
  2576. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2577. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2578. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2579. struct qcom_dump_segment *seg;
  2580. struct cnss_dump_meta_info meta_info = {0};
  2581. struct list_head head;
  2582. int i, ret = 0;
  2583. if (!dump_enabled()) {
  2584. cnss_pr_info("Dump collection is not enabled\n");
  2585. return ret;
  2586. }
  2587. INIT_LIST_HEAD(&head);
  2588. for (i = 0; i < dump_data->nentries; i++) {
  2589. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2590. cnss_pr_err("Unsupported dump type: %d",
  2591. dump_seg->type);
  2592. continue;
  2593. }
  2594. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2595. if (!seg) {
  2596. cnss_pr_err("%s: Failed to allocate mem for seg %d\n",
  2597. __func__, i);
  2598. continue;
  2599. }
  2600. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2601. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2602. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2603. }
  2604. meta_info.entry[dump_seg->type].entry_num++;
  2605. seg->da = dump_seg->address;
  2606. seg->va = dump_seg->v_address;
  2607. seg->size = dump_seg->size;
  2608. list_add_tail(&seg->node, &head);
  2609. dump_seg++;
  2610. }
  2611. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2612. if (!seg) {
  2613. cnss_pr_err("%s: Failed to allocate mem for elf ramdump seg\n",
  2614. __func__);
  2615. goto skip_elf_dump;
  2616. }
  2617. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2618. meta_info.version = CNSS_RAMDUMP_VERSION;
  2619. meta_info.chipset = plat_priv->device_id;
  2620. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2621. seg->va = &meta_info;
  2622. seg->size = sizeof(meta_info);
  2623. list_add(&seg->node, &head);
  2624. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2625. skip_elf_dump:
  2626. while (!list_empty(&head)) {
  2627. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2628. list_del(&seg->node);
  2629. kfree(seg);
  2630. }
  2631. return ret;
  2632. }
  2633. #ifdef CONFIG_CNSS2_SSR_DRIVER_DUMP
  2634. int cnss_do_host_ramdump(struct cnss_plat_data *plat_priv,
  2635. struct cnss_ssr_driver_dump_entry *ssr_entry,
  2636. size_t num_entries_loaded)
  2637. {
  2638. struct qcom_dump_segment *seg;
  2639. struct cnss_host_dump_meta_info meta_info = {0};
  2640. struct list_head head;
  2641. int dev_ret = 0;
  2642. struct device *new_device;
  2643. static const char * const wlan_str[] = {
  2644. [CNSS_HOST_WLAN_LOGS] = "wlan_logs",
  2645. [CNSS_HOST_HTC_CREDIT] = "htc_credit",
  2646. [CNSS_HOST_WMI_TX_CMP] = "wmi_tx_cmp",
  2647. [CNSS_HOST_WMI_COMMAND_LOG] = "wmi_command_log",
  2648. [CNSS_HOST_WMI_EVENT_LOG] = "wmi_event_log",
  2649. [CNSS_HOST_WMI_RX_EVENT] = "wmi_rx_event",
  2650. [CNSS_HOST_HAL_SOC] = "hal_soc",
  2651. [CNSS_HOST_GWLAN_LOGGING] = "gwlan_logging",
  2652. [CNSS_HOST_WMI_DEBUG_LOG_INFO] = "wmi_debug_log_info",
  2653. [CNSS_HOST_HTC_CREDIT_IDX] = "htc_credit_history_idx",
  2654. [CNSS_HOST_HTC_CREDIT_LEN] = "htc_credit_history_length",
  2655. [CNSS_HOST_WMI_TX_CMP_IDX] = "wmi_tx_cmp_idx",
  2656. [CNSS_HOST_WMI_COMMAND_LOG_IDX] = "wmi_command_log_idx",
  2657. [CNSS_HOST_WMI_EVENT_LOG_IDX] = "wmi_event_log_idx",
  2658. [CNSS_HOST_WMI_RX_EVENT_IDX] = "wmi_rx_event_idx",
  2659. [CNSS_HOST_HIF_CE_DESC_HISTORY] = "hif_ce_desc_history",
  2660. [CNSS_HOST_HIF_CE_DESC_HISTORY_BUFF] = "hif_ce_desc_history_buff",
  2661. [CNSS_HOST_HANG_EVENT_DATA] = "hang_event_data"
  2662. };
  2663. int i;
  2664. int ret = 0;
  2665. enum cnss_host_dump_type j;
  2666. if (!dump_enabled()) {
  2667. cnss_pr_info("Dump collection is not enabled\n");
  2668. return ret;
  2669. }
  2670. new_device = kcalloc(1, sizeof(*new_device), GFP_KERNEL);
  2671. if (!new_device) {
  2672. cnss_pr_err("Failed to alloc device mem\n");
  2673. return -ENOMEM;
  2674. }
  2675. device_initialize(new_device);
  2676. dev_set_name(new_device, "wlan_driver");
  2677. dev_ret = device_add(new_device);
  2678. if (dev_ret) {
  2679. cnss_pr_err("Failed to add new device\n");
  2680. goto put_device;
  2681. }
  2682. INIT_LIST_HEAD(&head);
  2683. for (i = 0; i < num_entries_loaded; i++) {
  2684. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2685. if (!seg) {
  2686. cnss_pr_err("Failed to alloc seg entry %d\n", i);
  2687. continue;
  2688. }
  2689. seg->va = ssr_entry[i].buffer_pointer;
  2690. seg->da = (dma_addr_t)ssr_entry[i].buffer_pointer;
  2691. seg->size = ssr_entry[i].buffer_size;
  2692. for (j = 0; j < CNSS_HOST_DUMP_TYPE_MAX; j++) {
  2693. if (strncmp(ssr_entry[i].region_name, wlan_str[j],
  2694. strlen(wlan_str[j])) == 0) {
  2695. meta_info.entry[i].type = j;
  2696. }
  2697. }
  2698. meta_info.entry[i].entry_start = i + 1;
  2699. meta_info.entry[i].entry_num++;
  2700. list_add_tail(&seg->node, &head);
  2701. }
  2702. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2703. if (!seg) {
  2704. cnss_pr_err("%s: Failed to allocate mem for host dump seg\n",
  2705. __func__);
  2706. goto skip_host_dump;
  2707. }
  2708. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2709. meta_info.version = CNSS_RAMDUMP_VERSION;
  2710. meta_info.chipset = plat_priv->device_id;
  2711. meta_info.total_entries = num_entries_loaded;
  2712. seg->va = &meta_info;
  2713. seg->da = (dma_addr_t)&meta_info;
  2714. seg->size = sizeof(meta_info);
  2715. list_add(&seg->node, &head);
  2716. ret = qcom_elf_dump(&head, new_device, ELF_CLASS);
  2717. skip_host_dump:
  2718. while (!list_empty(&head)) {
  2719. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2720. list_del(&seg->node);
  2721. kfree(seg);
  2722. }
  2723. device_del(new_device);
  2724. put_device:
  2725. put_device(new_device);
  2726. kfree(new_device);
  2727. return ret;
  2728. }
  2729. #endif
  2730. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2731. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2732. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2733. {
  2734. struct cnss_ramdump_info *ramdump_info;
  2735. struct msm_dump_entry dump_entry;
  2736. ramdump_info = &plat_priv->ramdump_info;
  2737. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2738. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2739. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2740. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2741. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2742. sizeof(ramdump_info->dump_data.name));
  2743. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2744. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2745. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2746. &dump_entry);
  2747. }
  2748. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2749. {
  2750. int ret = 0;
  2751. struct device *dev;
  2752. struct cnss_ramdump_info *ramdump_info;
  2753. u32 ramdump_size = 0;
  2754. dev = &plat_priv->plat_dev->dev;
  2755. ramdump_info = &plat_priv->ramdump_info;
  2756. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2757. /* dt type: legacy or converged */
  2758. ret = of_property_read_u32(dev->of_node,
  2759. "qcom,wlan-ramdump-dynamic",
  2760. &ramdump_size);
  2761. } else {
  2762. ret = of_property_read_u32(plat_priv->dev_node,
  2763. "qcom,wlan-ramdump-dynamic",
  2764. &ramdump_size);
  2765. }
  2766. if (ret == 0) {
  2767. ramdump_info->ramdump_va =
  2768. dma_alloc_coherent(dev, ramdump_size,
  2769. &ramdump_info->ramdump_pa,
  2770. GFP_KERNEL);
  2771. if (ramdump_info->ramdump_va)
  2772. ramdump_info->ramdump_size = ramdump_size;
  2773. }
  2774. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2775. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2776. if (ramdump_info->ramdump_size == 0) {
  2777. cnss_pr_info("Ramdump will not be collected");
  2778. goto out;
  2779. }
  2780. ret = cnss_init_dump_entry(plat_priv);
  2781. if (ret) {
  2782. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2783. goto free_ramdump;
  2784. }
  2785. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2786. if (!ramdump_info->ramdump_dev) {
  2787. cnss_pr_err("Failed to create ramdump device!");
  2788. ret = -ENOMEM;
  2789. goto free_ramdump;
  2790. }
  2791. return 0;
  2792. free_ramdump:
  2793. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2794. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2795. out:
  2796. return ret;
  2797. }
  2798. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2799. {
  2800. struct device *dev;
  2801. struct cnss_ramdump_info *ramdump_info;
  2802. dev = &plat_priv->plat_dev->dev;
  2803. ramdump_info = &plat_priv->ramdump_info;
  2804. if (ramdump_info->ramdump_dev)
  2805. cnss_destroy_ramdump_device(plat_priv,
  2806. ramdump_info->ramdump_dev);
  2807. if (ramdump_info->ramdump_va)
  2808. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2809. ramdump_info->ramdump_va,
  2810. ramdump_info->ramdump_pa);
  2811. }
  2812. /**
  2813. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2814. * @ret: Error returned by msm_dump_data_register_nominidump
  2815. *
  2816. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2817. * ignore failure.
  2818. *
  2819. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2820. */
  2821. static int cnss_ignore_dump_data_reg_fail(int ret)
  2822. {
  2823. return ret;
  2824. }
  2825. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2826. {
  2827. int ret = 0;
  2828. struct cnss_ramdump_info_v2 *info_v2;
  2829. struct cnss_dump_data *dump_data;
  2830. struct msm_dump_entry dump_entry;
  2831. struct device *dev = &plat_priv->plat_dev->dev;
  2832. u32 ramdump_size = 0;
  2833. info_v2 = &plat_priv->ramdump_info_v2;
  2834. dump_data = &info_v2->dump_data;
  2835. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2836. /* dt type: legacy or converged */
  2837. ret = of_property_read_u32(dev->of_node,
  2838. "qcom,wlan-ramdump-dynamic",
  2839. &ramdump_size);
  2840. } else {
  2841. ret = of_property_read_u32(plat_priv->dev_node,
  2842. "qcom,wlan-ramdump-dynamic",
  2843. &ramdump_size);
  2844. }
  2845. if (ret == 0)
  2846. info_v2->ramdump_size = ramdump_size;
  2847. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2848. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2849. if (!info_v2->dump_data_vaddr)
  2850. return -ENOMEM;
  2851. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2852. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2853. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2854. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2855. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2856. sizeof(dump_data->name));
  2857. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2858. dump_entry.addr = virt_to_phys(dump_data);
  2859. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2860. &dump_entry);
  2861. if (ret) {
  2862. ret = cnss_ignore_dump_data_reg_fail(ret);
  2863. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2864. ret ? "Error" : "Ignoring", ret);
  2865. goto free_ramdump;
  2866. }
  2867. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2868. if (!info_v2->ramdump_dev) {
  2869. cnss_pr_err("Failed to create ramdump device!\n");
  2870. ret = -ENOMEM;
  2871. goto free_ramdump;
  2872. }
  2873. return 0;
  2874. free_ramdump:
  2875. kfree(info_v2->dump_data_vaddr);
  2876. info_v2->dump_data_vaddr = NULL;
  2877. return ret;
  2878. }
  2879. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2880. {
  2881. struct cnss_ramdump_info_v2 *info_v2;
  2882. info_v2 = &plat_priv->ramdump_info_v2;
  2883. if (info_v2->ramdump_dev)
  2884. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2885. kfree(info_v2->dump_data_vaddr);
  2886. info_v2->dump_data_vaddr = NULL;
  2887. info_v2->dump_data_valid = false;
  2888. }
  2889. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2890. {
  2891. int ret = 0;
  2892. switch (plat_priv->device_id) {
  2893. case QCA6174_DEVICE_ID:
  2894. ret = cnss_register_ramdump_v1(plat_priv);
  2895. break;
  2896. case QCA6290_DEVICE_ID:
  2897. case QCA6390_DEVICE_ID:
  2898. case QCN7605_DEVICE_ID:
  2899. case QCA6490_DEVICE_ID:
  2900. case KIWI_DEVICE_ID:
  2901. case MANGO_DEVICE_ID:
  2902. case PEACH_DEVICE_ID:
  2903. ret = cnss_register_ramdump_v2(plat_priv);
  2904. break;
  2905. default:
  2906. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2907. ret = -ENODEV;
  2908. break;
  2909. }
  2910. return ret;
  2911. }
  2912. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2913. {
  2914. switch (plat_priv->device_id) {
  2915. case QCA6174_DEVICE_ID:
  2916. cnss_unregister_ramdump_v1(plat_priv);
  2917. break;
  2918. case QCA6290_DEVICE_ID:
  2919. case QCA6390_DEVICE_ID:
  2920. case QCN7605_DEVICE_ID:
  2921. case QCA6490_DEVICE_ID:
  2922. case KIWI_DEVICE_ID:
  2923. case MANGO_DEVICE_ID:
  2924. case PEACH_DEVICE_ID:
  2925. cnss_unregister_ramdump_v2(plat_priv);
  2926. break;
  2927. default:
  2928. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2929. break;
  2930. }
  2931. }
  2932. #else
  2933. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2934. {
  2935. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2936. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2937. struct device *dev = &plat_priv->plat_dev->dev;
  2938. u32 ramdump_size = 0;
  2939. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2940. &ramdump_size) == 0)
  2941. info_v2->ramdump_size = ramdump_size;
  2942. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2943. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2944. if (!info_v2->dump_data_vaddr)
  2945. return -ENOMEM;
  2946. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2947. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2948. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2949. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2950. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2951. sizeof(dump_data->name));
  2952. info_v2->ramdump_dev = dev;
  2953. return 0;
  2954. }
  2955. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2956. {
  2957. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2958. info_v2->ramdump_dev = NULL;
  2959. kfree(info_v2->dump_data_vaddr);
  2960. info_v2->dump_data_vaddr = NULL;
  2961. info_v2->dump_data_valid = false;
  2962. }
  2963. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2964. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2965. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2966. phys_addr_t *pa, unsigned long attrs)
  2967. {
  2968. struct sg_table sgt;
  2969. int ret;
  2970. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  2971. if (ret) {
  2972. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  2973. va, &dma, size, attrs);
  2974. return -EINVAL;
  2975. }
  2976. *pa = page_to_phys(sg_page(sgt.sgl));
  2977. sg_free_table(&sgt);
  2978. return 0;
  2979. }
  2980. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2981. enum cnss_fw_dump_type type, int seg_no,
  2982. void *va, phys_addr_t pa, size_t size)
  2983. {
  2984. struct md_region md_entry;
  2985. int ret;
  2986. switch (type) {
  2987. case CNSS_FW_IMAGE:
  2988. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2989. seg_no);
  2990. break;
  2991. case CNSS_FW_RDDM:
  2992. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2993. seg_no);
  2994. break;
  2995. case CNSS_FW_REMOTE_HEAP:
  2996. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2997. seg_no);
  2998. break;
  2999. default:
  3000. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3001. return -EINVAL;
  3002. }
  3003. md_entry.phys_addr = pa;
  3004. md_entry.virt_addr = (uintptr_t)va;
  3005. md_entry.size = size;
  3006. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3007. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3008. md_entry.name, va, &pa, size);
  3009. ret = msm_minidump_add_region(&md_entry);
  3010. if (ret < 0)
  3011. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  3012. return ret;
  3013. }
  3014. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3015. enum cnss_fw_dump_type type, int seg_no,
  3016. void *va, phys_addr_t pa, size_t size)
  3017. {
  3018. struct md_region md_entry;
  3019. int ret;
  3020. switch (type) {
  3021. case CNSS_FW_IMAGE:
  3022. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  3023. seg_no);
  3024. break;
  3025. case CNSS_FW_RDDM:
  3026. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  3027. seg_no);
  3028. break;
  3029. case CNSS_FW_REMOTE_HEAP:
  3030. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  3031. seg_no);
  3032. break;
  3033. default:
  3034. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3035. return -EINVAL;
  3036. }
  3037. md_entry.phys_addr = pa;
  3038. md_entry.virt_addr = (uintptr_t)va;
  3039. md_entry.size = size;
  3040. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3041. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3042. md_entry.name, va, &pa, size);
  3043. ret = msm_minidump_remove_region(&md_entry);
  3044. if (ret)
  3045. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  3046. ret);
  3047. return ret;
  3048. }
  3049. #else
  3050. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  3051. phys_addr_t *pa, unsigned long attrs)
  3052. {
  3053. return 0;
  3054. }
  3055. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  3056. enum cnss_fw_dump_type type, int seg_no,
  3057. void *va, phys_addr_t pa, size_t size)
  3058. {
  3059. return 0;
  3060. }
  3061. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3062. enum cnss_fw_dump_type type, int seg_no,
  3063. void *va, phys_addr_t pa, size_t size)
  3064. {
  3065. return 0;
  3066. }
  3067. #endif /* CONFIG_QCOM_MINIDUMP */
  3068. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  3069. const struct firmware **fw_entry,
  3070. const char *filename)
  3071. {
  3072. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  3073. return request_firmware_direct(fw_entry, filename,
  3074. &plat_priv->plat_dev->dev);
  3075. else
  3076. return firmware_request_nowarn(fw_entry, filename,
  3077. &plat_priv->plat_dev->dev);
  3078. }
  3079. #if IS_ENABLED(CONFIG_INTERCONNECT)
  3080. /**
  3081. * cnss_register_bus_scale() - Setup interconnect voting data
  3082. * @plat_priv: Platform data structure
  3083. *
  3084. * For different interconnect path configured in device tree setup voting data
  3085. * for list of bandwidth requirements.
  3086. *
  3087. * Result: 0 for success. -EINVAL if not configured
  3088. */
  3089. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3090. {
  3091. int ret = -EINVAL;
  3092. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  3093. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3094. struct device *dev = &plat_priv->plat_dev->dev;
  3095. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  3096. ret = of_property_read_u32(dev->of_node,
  3097. "qcom,icc-path-count",
  3098. &plat_priv->icc.path_count);
  3099. if (ret) {
  3100. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  3101. return 0;
  3102. }
  3103. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  3104. "qcom,bus-bw-cfg-count",
  3105. &plat_priv->icc.bus_bw_cfg_count);
  3106. if (ret) {
  3107. cnss_pr_err("Failed to get Bus BW Config table size\n");
  3108. goto cleanup;
  3109. }
  3110. cfg_arr_size = plat_priv->icc.path_count *
  3111. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  3112. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  3113. if (!cfg_arr) {
  3114. cnss_pr_err("Failed to alloc cfg table mem\n");
  3115. ret = -ENOMEM;
  3116. goto cleanup;
  3117. }
  3118. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  3119. "qcom,bus-bw-cfg", cfg_arr,
  3120. cfg_arr_size);
  3121. if (ret) {
  3122. cnss_pr_err("Invalid Bus BW Config Table\n");
  3123. goto cleanup;
  3124. }
  3125. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  3126. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  3127. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  3128. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  3129. GFP_KERNEL);
  3130. if (!bus_bw_info) {
  3131. ret = -ENOMEM;
  3132. goto out;
  3133. }
  3134. ret = of_property_read_string_index(dev->of_node,
  3135. "interconnect-names", idx,
  3136. &bus_bw_info->icc_name);
  3137. if (ret)
  3138. goto out;
  3139. bus_bw_info->icc_path =
  3140. of_icc_get(&plat_priv->plat_dev->dev,
  3141. bus_bw_info->icc_name);
  3142. if (IS_ERR(bus_bw_info->icc_path)) {
  3143. ret = PTR_ERR(bus_bw_info->icc_path);
  3144. if (ret != -EPROBE_DEFER) {
  3145. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  3146. bus_bw_info->icc_name, ret);
  3147. goto out;
  3148. }
  3149. }
  3150. bus_bw_info->cfg_table =
  3151. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  3152. sizeof(*bus_bw_info->cfg_table),
  3153. GFP_KERNEL);
  3154. if (!bus_bw_info->cfg_table) {
  3155. ret = -ENOMEM;
  3156. goto out;
  3157. }
  3158. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  3159. bus_bw_info->icc_name);
  3160. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  3161. CNSS_ICC_VOTE_MAX);
  3162. i < plat_priv->icc.bus_bw_cfg_count;
  3163. i++, j += 2) {
  3164. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  3165. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  3166. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  3167. i, bus_bw_info->cfg_table[i].avg_bw,
  3168. bus_bw_info->cfg_table[i].peak_bw);
  3169. }
  3170. list_add_tail(&bus_bw_info->list,
  3171. &plat_priv->icc.list_head);
  3172. }
  3173. kfree(cfg_arr);
  3174. return 0;
  3175. out:
  3176. list_for_each_entry_safe(bus_bw_info, tmp,
  3177. &plat_priv->icc.list_head, list) {
  3178. list_del(&bus_bw_info->list);
  3179. }
  3180. cleanup:
  3181. kfree(cfg_arr);
  3182. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3183. return ret;
  3184. }
  3185. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  3186. {
  3187. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3188. list_for_each_entry_safe(bus_bw_info, tmp,
  3189. &plat_priv->icc.list_head, list) {
  3190. list_del(&bus_bw_info->list);
  3191. if (bus_bw_info->icc_path)
  3192. icc_put(bus_bw_info->icc_path);
  3193. }
  3194. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3195. }
  3196. #else
  3197. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3198. {
  3199. return 0;
  3200. }
  3201. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  3202. #endif /* CONFIG_INTERCONNECT */
  3203. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  3204. {
  3205. struct cnss_plat_data *plat_priv = cb_ctx;
  3206. if (!plat_priv) {
  3207. cnss_pr_err("%s: Invalid context\n", __func__);
  3208. return;
  3209. }
  3210. if (status) {
  3211. cnss_pr_info("CNSS Daemon connected\n");
  3212. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3213. complete(&plat_priv->daemon_connected);
  3214. } else {
  3215. cnss_pr_info("CNSS Daemon disconnected\n");
  3216. reinit_completion(&plat_priv->daemon_connected);
  3217. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3218. }
  3219. }
  3220. static ssize_t enable_hds_store(struct device *dev,
  3221. struct device_attribute *attr,
  3222. const char *buf, size_t count)
  3223. {
  3224. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3225. unsigned int enable_hds = 0;
  3226. if (!plat_priv)
  3227. return -ENODEV;
  3228. if (sscanf(buf, "%du", &enable_hds) != 1) {
  3229. cnss_pr_err("Invalid enable_hds sysfs command\n");
  3230. return -EINVAL;
  3231. }
  3232. if (enable_hds)
  3233. plat_priv->hds_enabled = true;
  3234. else
  3235. plat_priv->hds_enabled = false;
  3236. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  3237. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  3238. return count;
  3239. }
  3240. static ssize_t recovery_show(struct device *dev,
  3241. struct device_attribute *attr,
  3242. char *buf)
  3243. {
  3244. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3245. u32 buf_size = PAGE_SIZE;
  3246. u32 curr_len = 0;
  3247. u32 buf_written = 0;
  3248. if (!plat_priv)
  3249. return -ENODEV;
  3250. buf_written = scnprintf(buf, buf_size,
  3251. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  3252. "BIT0 -- wlan fw recovery\n"
  3253. "BIT1 -- wlan pcss recovery\n"
  3254. "---------------------------------\n");
  3255. curr_len += buf_written;
  3256. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3257. "WLAN recovery %s[%d]\n",
  3258. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  3259. plat_priv->recovery_enabled);
  3260. curr_len += buf_written;
  3261. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3262. "WLAN PCSS recovery %s[%d]\n",
  3263. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  3264. plat_priv->recovery_pcss_enabled);
  3265. curr_len += buf_written;
  3266. /*
  3267. * Now size of curr_len is not over page size for sure,
  3268. * later if new item or none-fixed size item added, need
  3269. * add check to make sure curr_len is not over page size.
  3270. */
  3271. return curr_len;
  3272. }
  3273. static ssize_t time_sync_period_show(struct device *dev,
  3274. struct device_attribute *attr,
  3275. char *buf)
  3276. {
  3277. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3278. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  3279. plat_priv->ctrl_params.time_sync_period);
  3280. }
  3281. static ssize_t time_sync_period_store(struct device *dev,
  3282. struct device_attribute *attr,
  3283. const char *buf, size_t count)
  3284. {
  3285. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3286. unsigned int time_sync_period = 0;
  3287. if (!plat_priv)
  3288. return -ENODEV;
  3289. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  3290. cnss_pr_err("Invalid time sync sysfs command\n");
  3291. return -EINVAL;
  3292. }
  3293. if (time_sync_period >= CNSS_MIN_TIME_SYNC_PERIOD)
  3294. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3295. return count;
  3296. }
  3297. static ssize_t recovery_store(struct device *dev,
  3298. struct device_attribute *attr,
  3299. const char *buf, size_t count)
  3300. {
  3301. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3302. unsigned int recovery = 0;
  3303. if (!plat_priv)
  3304. return -ENODEV;
  3305. if (sscanf(buf, "%du", &recovery) != 1) {
  3306. cnss_pr_err("Invalid recovery sysfs command\n");
  3307. return -EINVAL;
  3308. }
  3309. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  3310. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  3311. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  3312. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  3313. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  3314. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  3315. cnss_send_subsys_restart_level_msg(plat_priv);
  3316. return count;
  3317. }
  3318. static ssize_t shutdown_store(struct device *dev,
  3319. struct device_attribute *attr,
  3320. const char *buf, size_t count)
  3321. {
  3322. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3323. cnss_pr_dbg("Received shutdown notification\n");
  3324. if (plat_priv) {
  3325. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3326. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3327. del_timer(&plat_priv->fw_boot_timer);
  3328. complete_all(&plat_priv->power_up_complete);
  3329. complete_all(&plat_priv->cal_complete);
  3330. cnss_pr_dbg("Shutdown notification handled\n");
  3331. }
  3332. return count;
  3333. }
  3334. static ssize_t fs_ready_store(struct device *dev,
  3335. struct device_attribute *attr,
  3336. const char *buf, size_t count)
  3337. {
  3338. int fs_ready = 0;
  3339. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3340. if (sscanf(buf, "%du", &fs_ready) != 1)
  3341. return -EINVAL;
  3342. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  3343. fs_ready, count);
  3344. if (!plat_priv) {
  3345. cnss_pr_err("plat_priv is NULL\n");
  3346. return count;
  3347. }
  3348. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  3349. cnss_pr_dbg("QMI is bypassed\n");
  3350. return count;
  3351. }
  3352. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  3353. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  3354. cnss_driver_event_post(plat_priv,
  3355. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3356. 0, NULL);
  3357. }
  3358. return count;
  3359. }
  3360. static ssize_t qdss_trace_start_store(struct device *dev,
  3361. struct device_attribute *attr,
  3362. const char *buf, size_t count)
  3363. {
  3364. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3365. wlfw_qdss_trace_start(plat_priv);
  3366. cnss_pr_dbg("Received QDSS start command\n");
  3367. return count;
  3368. }
  3369. static ssize_t qdss_trace_stop_store(struct device *dev,
  3370. struct device_attribute *attr,
  3371. const char *buf, size_t count)
  3372. {
  3373. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3374. u32 option = 0;
  3375. if (sscanf(buf, "%du", &option) != 1)
  3376. return -EINVAL;
  3377. wlfw_qdss_trace_stop(plat_priv, option);
  3378. cnss_pr_dbg("Received QDSS stop command\n");
  3379. return count;
  3380. }
  3381. static ssize_t qdss_conf_download_store(struct device *dev,
  3382. struct device_attribute *attr,
  3383. const char *buf, size_t count)
  3384. {
  3385. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3386. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  3387. cnss_pr_dbg("Received QDSS download config command\n");
  3388. return count;
  3389. }
  3390. static ssize_t hw_trace_override_store(struct device *dev,
  3391. struct device_attribute *attr,
  3392. const char *buf, size_t count)
  3393. {
  3394. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3395. int tmp = 0;
  3396. if (sscanf(buf, "%du", &tmp) != 1)
  3397. return -EINVAL;
  3398. plat_priv->hw_trc_override = tmp;
  3399. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3400. return count;
  3401. }
  3402. static ssize_t charger_mode_store(struct device *dev,
  3403. struct device_attribute *attr,
  3404. const char *buf, size_t count)
  3405. {
  3406. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3407. int tmp = 0;
  3408. if (sscanf(buf, "%du", &tmp) != 1)
  3409. return -EINVAL;
  3410. plat_priv->charger_mode = tmp;
  3411. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  3412. return count;
  3413. }
  3414. static DEVICE_ATTR_WO(fs_ready);
  3415. static DEVICE_ATTR_WO(shutdown);
  3416. static DEVICE_ATTR_RW(recovery);
  3417. static DEVICE_ATTR_WO(enable_hds);
  3418. static DEVICE_ATTR_WO(qdss_trace_start);
  3419. static DEVICE_ATTR_WO(qdss_trace_stop);
  3420. static DEVICE_ATTR_WO(qdss_conf_download);
  3421. static DEVICE_ATTR_WO(hw_trace_override);
  3422. static DEVICE_ATTR_WO(charger_mode);
  3423. static DEVICE_ATTR_RW(time_sync_period);
  3424. static struct attribute *cnss_attrs[] = {
  3425. &dev_attr_fs_ready.attr,
  3426. &dev_attr_shutdown.attr,
  3427. &dev_attr_recovery.attr,
  3428. &dev_attr_enable_hds.attr,
  3429. &dev_attr_qdss_trace_start.attr,
  3430. &dev_attr_qdss_trace_stop.attr,
  3431. &dev_attr_qdss_conf_download.attr,
  3432. &dev_attr_hw_trace_override.attr,
  3433. &dev_attr_charger_mode.attr,
  3434. &dev_attr_time_sync_period.attr,
  3435. NULL,
  3436. };
  3437. static struct attribute_group cnss_attr_group = {
  3438. .attrs = cnss_attrs,
  3439. };
  3440. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3441. {
  3442. struct device *dev = &plat_priv->plat_dev->dev;
  3443. int ret;
  3444. char cnss_name[CNSS_FS_NAME_SIZE];
  3445. char shutdown_name[32];
  3446. if (cnss_is_dual_wlan_enabled()) {
  3447. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3448. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3449. snprintf(shutdown_name, sizeof(shutdown_name),
  3450. "shutdown_wlan_%d", plat_priv->plat_idx);
  3451. } else {
  3452. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3453. snprintf(shutdown_name, sizeof(shutdown_name),
  3454. "shutdown_wlan");
  3455. }
  3456. ret = sysfs_create_link(kernel_kobj, &dev->kobj, cnss_name);
  3457. if (ret) {
  3458. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3459. ret);
  3460. goto out;
  3461. }
  3462. /* This is only for backward compatibility. */
  3463. ret = sysfs_create_link(kernel_kobj, &dev->kobj, shutdown_name);
  3464. if (ret) {
  3465. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3466. ret);
  3467. goto rm_cnss_link;
  3468. }
  3469. return 0;
  3470. rm_cnss_link:
  3471. sysfs_remove_link(kernel_kobj, cnss_name);
  3472. out:
  3473. return ret;
  3474. }
  3475. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3476. {
  3477. char cnss_name[CNSS_FS_NAME_SIZE];
  3478. char shutdown_name[32];
  3479. if (cnss_is_dual_wlan_enabled()) {
  3480. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3481. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3482. snprintf(shutdown_name, sizeof(shutdown_name),
  3483. "shutdown_wlan_%d", plat_priv->plat_idx);
  3484. } else {
  3485. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3486. snprintf(shutdown_name, sizeof(shutdown_name),
  3487. "shutdown_wlan");
  3488. }
  3489. sysfs_remove_link(kernel_kobj, shutdown_name);
  3490. sysfs_remove_link(kernel_kobj, cnss_name);
  3491. }
  3492. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3493. {
  3494. int ret = 0;
  3495. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3496. &cnss_attr_group);
  3497. if (ret) {
  3498. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3499. ret);
  3500. goto out;
  3501. }
  3502. cnss_create_sysfs_link(plat_priv);
  3503. return 0;
  3504. out:
  3505. return ret;
  3506. }
  3507. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3508. {
  3509. cnss_remove_sysfs_link(plat_priv);
  3510. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3511. }
  3512. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3513. {
  3514. spin_lock_init(&plat_priv->event_lock);
  3515. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3516. WQ_UNBOUND, 1);
  3517. if (!plat_priv->event_wq) {
  3518. cnss_pr_err("Failed to create event workqueue!\n");
  3519. return -EFAULT;
  3520. }
  3521. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3522. INIT_LIST_HEAD(&plat_priv->event_list);
  3523. return 0;
  3524. }
  3525. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3526. {
  3527. destroy_workqueue(plat_priv->event_wq);
  3528. }
  3529. static int cnss_reboot_notifier(struct notifier_block *nb,
  3530. unsigned long action,
  3531. void *data)
  3532. {
  3533. struct cnss_plat_data *plat_priv =
  3534. container_of(nb, struct cnss_plat_data, reboot_nb);
  3535. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3536. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3537. del_timer(&plat_priv->fw_boot_timer);
  3538. complete_all(&plat_priv->power_up_complete);
  3539. complete_all(&plat_priv->cal_complete);
  3540. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3541. return NOTIFY_DONE;
  3542. }
  3543. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3544. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3545. {
  3546. struct Object client_env;
  3547. struct Object app_object;
  3548. u32 wifi_uid = HW_WIFI_UID;
  3549. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3550. int ret;
  3551. u8 state = 0;
  3552. /* Once this flag is set, secure peripheral feature
  3553. * will not be supported till next reboot
  3554. */
  3555. if (plat_priv->sec_peri_feature_disable)
  3556. return 0;
  3557. /* get rootObj */
  3558. ret = get_client_env_object(&client_env);
  3559. if (ret) {
  3560. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3561. goto end;
  3562. }
  3563. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3564. if (ret) {
  3565. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3566. if (ret == FEATURE_NOT_SUPPORTED) {
  3567. ret = 0; /* Do not Assert */
  3568. plat_priv->sec_peri_feature_disable = true;
  3569. cnss_pr_dbg("Secure HW feature not supported\n");
  3570. }
  3571. goto exit_release_clientenv;
  3572. }
  3573. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3574. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3575. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3576. ObjectCounts_pack(1, 1, 0, 0));
  3577. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3578. if (ret) {
  3579. if (ret == PERIPHERAL_NOT_FOUND) {
  3580. ret = 0; /* Do not Assert */
  3581. plat_priv->sec_peri_feature_disable = true;
  3582. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3583. }
  3584. goto exit_release_app_obj;
  3585. }
  3586. if (state == 1)
  3587. set_bit(CNSS_WLAN_HW_DISABLED,
  3588. &plat_priv->driver_state);
  3589. else
  3590. clear_bit(CNSS_WLAN_HW_DISABLED,
  3591. &plat_priv->driver_state);
  3592. exit_release_app_obj:
  3593. Object_release(app_object);
  3594. exit_release_clientenv:
  3595. Object_release(client_env);
  3596. end:
  3597. if (ret) {
  3598. cnss_pr_err("Unable to get HW disable status\n");
  3599. CNSS_ASSERT(0);
  3600. }
  3601. return ret;
  3602. }
  3603. #else
  3604. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3605. {
  3606. return 0;
  3607. }
  3608. #endif
  3609. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  3610. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  3611. {
  3612. }
  3613. #else
  3614. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  3615. {
  3616. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3617. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3618. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3619. }
  3620. #endif
  3621. #ifdef CONFIG_WCNSS_MEM_PRE_ALLOC
  3622. static void cnss_initialize_mem_pool(unsigned long device_id)
  3623. {
  3624. cnss_initialize_prealloc_pool(device_id);
  3625. }
  3626. static void cnss_deinitialize_mem_pool(void)
  3627. {
  3628. cnss_deinitialize_prealloc_pool();
  3629. }
  3630. #else
  3631. static void cnss_initialize_mem_pool(unsigned long device_id)
  3632. {
  3633. }
  3634. static void cnss_deinitialize_mem_pool(void)
  3635. {
  3636. }
  3637. #endif
  3638. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3639. {
  3640. int ret;
  3641. ret = cnss_init_sol_gpio(plat_priv);
  3642. if (ret)
  3643. return ret;
  3644. timer_setup(&plat_priv->fw_boot_timer,
  3645. cnss_bus_fw_boot_timeout_hdlr, 0);
  3646. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3647. if (ret)
  3648. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3649. ret);
  3650. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3651. init_completion(&plat_priv->power_up_complete);
  3652. init_completion(&plat_priv->cal_complete);
  3653. init_completion(&plat_priv->rddm_complete);
  3654. init_completion(&plat_priv->recovery_complete);
  3655. init_completion(&plat_priv->daemon_connected);
  3656. mutex_init(&plat_priv->dev_lock);
  3657. mutex_init(&plat_priv->driver_ops_lock);
  3658. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3659. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3660. if (ret)
  3661. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3662. ret);
  3663. plat_priv->recovery_ws =
  3664. wakeup_source_register(&plat_priv->plat_dev->dev,
  3665. "CNSS_FW_RECOVERY");
  3666. if (!plat_priv->recovery_ws)
  3667. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3668. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3669. cnss_daemon_connection_update_cb,
  3670. plat_priv);
  3671. if (ret)
  3672. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3673. ret);
  3674. cnss_sram_dump_init(plat_priv);
  3675. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3676. "qcom,rc-ep-short-channel"))
  3677. cnss_set_feature_list(plat_priv, CNSS_RC_EP_ULTRASHORT_CHANNEL_V01);
  3678. if (plat_priv->device_id == PEACH_DEVICE_ID)
  3679. cnss_set_feature_list(plat_priv, CNSS_AUX_UC_SUPPORT_V01);
  3680. return 0;
  3681. }
  3682. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  3683. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  3684. {
  3685. }
  3686. #else
  3687. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  3688. {
  3689. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3690. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3691. kfree(plat_priv->sram_dump);
  3692. }
  3693. #endif
  3694. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3695. {
  3696. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3697. plat_priv);
  3698. complete_all(&plat_priv->recovery_complete);
  3699. complete_all(&plat_priv->rddm_complete);
  3700. complete_all(&plat_priv->cal_complete);
  3701. complete_all(&plat_priv->power_up_complete);
  3702. complete_all(&plat_priv->daemon_connected);
  3703. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3704. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3705. del_timer(&plat_priv->fw_boot_timer);
  3706. wakeup_source_unregister(plat_priv->recovery_ws);
  3707. cnss_deinit_sol_gpio(plat_priv);
  3708. cnss_sram_dump_deinit(plat_priv);
  3709. kfree(plat_priv->on_chip_pmic_board_ids);
  3710. }
  3711. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  3712. {
  3713. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  3714. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  3715. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3716. "qcom,wlan-cbc-enabled");
  3717. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  3718. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  3719. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  3720. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  3721. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3722. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  3723. * enabled by default
  3724. */
  3725. plat_priv->adsp_pc_enabled = true;
  3726. }
  3727. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  3728. {
  3729. struct device *dev = &plat_priv->plat_dev->dev;
  3730. plat_priv->use_pm_domain =
  3731. of_property_read_bool(dev->of_node, "use-pm-domain");
  3732. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  3733. }
  3734. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  3735. {
  3736. struct device *dev = &plat_priv->plat_dev->dev;
  3737. plat_priv->set_wlaon_pwr_ctrl =
  3738. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  3739. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  3740. plat_priv->set_wlaon_pwr_ctrl);
  3741. }
  3742. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  3743. {
  3744. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3745. "qcom,converged-dt") ||
  3746. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3747. "qcom,same-dt-multi-dev") ||
  3748. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3749. "qcom,multi-wlan-exchg"));
  3750. }
  3751. static const struct platform_device_id cnss_platform_id_table[] = {
  3752. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  3753. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  3754. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  3755. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  3756. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  3757. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  3758. { .name = "peach", .driver_data = PEACH_DEVICE_ID, },
  3759. { .name = "qcaconv", .driver_data = 0, },
  3760. { },
  3761. };
  3762. static const struct of_device_id cnss_of_match_table[] = {
  3763. {
  3764. .compatible = "qcom,cnss",
  3765. .data = (void *)&cnss_platform_id_table[0]},
  3766. {
  3767. .compatible = "qcom,cnss-qca6290",
  3768. .data = (void *)&cnss_platform_id_table[1]},
  3769. {
  3770. .compatible = "qcom,cnss-qca6390",
  3771. .data = (void *)&cnss_platform_id_table[2]},
  3772. {
  3773. .compatible = "qcom,cnss-qca6490",
  3774. .data = (void *)&cnss_platform_id_table[3]},
  3775. {
  3776. .compatible = "qcom,cnss-kiwi",
  3777. .data = (void *)&cnss_platform_id_table[4]},
  3778. {
  3779. .compatible = "qcom,cnss-mango",
  3780. .data = (void *)&cnss_platform_id_table[5]},
  3781. {
  3782. .compatible = "qcom,cnss-peach",
  3783. .data = (void *)&cnss_platform_id_table[6]},
  3784. {
  3785. .compatible = "qcom,cnss-qca-converged",
  3786. .data = (void *)&cnss_platform_id_table[7]},
  3787. { },
  3788. };
  3789. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  3790. static inline bool
  3791. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  3792. {
  3793. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3794. "use-nv-mac");
  3795. }
  3796. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  3797. {
  3798. struct device_node *child;
  3799. u32 id, i;
  3800. int id_n, device_identifier_gpio, ret;
  3801. u8 gpio_value;
  3802. if (plat_priv->dt_type != CNSS_DTT_CONVERGED)
  3803. return 0;
  3804. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  3805. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  3806. if (ret) {
  3807. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  3808. return ret;
  3809. }
  3810. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  3811. gpio_value = gpio_get_value(device_identifier_gpio);
  3812. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  3813. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  3814. child) {
  3815. if (strcmp(child->name, "chip_cfg"))
  3816. continue;
  3817. id_n = of_property_count_u32_elems(child, "supported-ids");
  3818. if (id_n <= 0) {
  3819. cnss_pr_err("Device id is NOT set\n");
  3820. return -EINVAL;
  3821. }
  3822. for (i = 0; i < id_n; i++) {
  3823. ret = of_property_read_u32_index(child,
  3824. "supported-ids",
  3825. i, &id);
  3826. if (ret) {
  3827. cnss_pr_err("Failed to read supported ids\n");
  3828. return -EINVAL;
  3829. }
  3830. if (gpio_value && id == QCA6490_DEVICE_ID) {
  3831. plat_priv->plat_dev->dev.of_node = child;
  3832. plat_priv->device_id = QCA6490_DEVICE_ID;
  3833. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  3834. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3835. child->name, i, id);
  3836. return 0;
  3837. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  3838. plat_priv->plat_dev->dev.of_node = child;
  3839. plat_priv->device_id = KIWI_DEVICE_ID;
  3840. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  3841. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3842. child->name, i, id);
  3843. return 0;
  3844. }
  3845. }
  3846. }
  3847. return -EINVAL;
  3848. }
  3849. static inline u32
  3850. cnss_dt_type(struct cnss_plat_data *plat_priv)
  3851. {
  3852. bool is_converged_dt = of_property_read_bool(
  3853. plat_priv->plat_dev->dev.of_node, "qcom,converged-dt");
  3854. bool is_multi_wlan_xchg;
  3855. if (is_converged_dt)
  3856. return CNSS_DTT_CONVERGED;
  3857. is_multi_wlan_xchg = of_property_read_bool(
  3858. plat_priv->plat_dev->dev.of_node, "qcom,multi-wlan-exchg");
  3859. if (is_multi_wlan_xchg)
  3860. return CNSS_DTT_MULTIEXCHG;
  3861. return CNSS_DTT_LEGACY;
  3862. }
  3863. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  3864. {
  3865. int ret = 0;
  3866. int retry = 0;
  3867. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  3868. return 0;
  3869. retry:
  3870. ret = cnss_power_on_device(plat_priv, true);
  3871. if (ret)
  3872. goto end;
  3873. ret = cnss_bus_init(plat_priv);
  3874. if (ret) {
  3875. if ((ret != -EPROBE_DEFER) &&
  3876. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  3877. cnss_power_off_device(plat_priv);
  3878. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  3879. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  3880. goto retry;
  3881. }
  3882. goto power_off;
  3883. }
  3884. return 0;
  3885. power_off:
  3886. cnss_power_off_device(plat_priv);
  3887. end:
  3888. return ret;
  3889. }
  3890. int cnss_wlan_hw_enable(void)
  3891. {
  3892. struct cnss_plat_data *plat_priv;
  3893. int ret = 0;
  3894. if (cnss_is_dual_wlan_enabled())
  3895. plat_priv = cnss_get_first_plat_priv(NULL);
  3896. else
  3897. plat_priv = cnss_get_plat_priv(NULL);
  3898. if (!plat_priv)
  3899. return -ENODEV;
  3900. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  3901. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  3902. goto register_driver;
  3903. ret = cnss_wlan_device_init(plat_priv);
  3904. if (ret) {
  3905. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state))
  3906. CNSS_ASSERT(0);
  3907. return ret;
  3908. }
  3909. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  3910. cnss_driver_event_post(plat_priv,
  3911. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3912. 0, NULL);
  3913. register_driver:
  3914. if (plat_priv->driver_ops)
  3915. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  3916. return ret;
  3917. }
  3918. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  3919. int cnss_set_wfc_mode(struct device *dev, struct cnss_wfc_cfg cfg)
  3920. {
  3921. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3922. int ret = 0;
  3923. if (!plat_priv)
  3924. return -ENODEV;
  3925. /* If IMS server is connected, return success without QMI send */
  3926. if (test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  3927. cnss_pr_dbg("Ignore host request as IMS server is connected");
  3928. return ret;
  3929. }
  3930. ret = cnss_wlfw_send_host_wfc_call_status(plat_priv, cfg);
  3931. return ret;
  3932. }
  3933. EXPORT_SYMBOL(cnss_set_wfc_mode);
  3934. static int cnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  3935. unsigned long *thermal_state)
  3936. {
  3937. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3938. if (!tcdev || !tcdev->devdata) {
  3939. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  3940. return -EINVAL;
  3941. }
  3942. cnss_tcdev = tcdev->devdata;
  3943. *thermal_state = cnss_tcdev->max_thermal_state;
  3944. return 0;
  3945. }
  3946. static int cnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  3947. unsigned long *thermal_state)
  3948. {
  3949. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3950. if (!tcdev || !tcdev->devdata) {
  3951. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  3952. return -EINVAL;
  3953. }
  3954. cnss_tcdev = tcdev->devdata;
  3955. *thermal_state = cnss_tcdev->curr_thermal_state;
  3956. return 0;
  3957. }
  3958. static int cnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  3959. unsigned long thermal_state)
  3960. {
  3961. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3962. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3963. int ret = 0;
  3964. if (!tcdev || !tcdev->devdata) {
  3965. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  3966. return -EINVAL;
  3967. }
  3968. cnss_tcdev = tcdev->devdata;
  3969. if (thermal_state > cnss_tcdev->max_thermal_state)
  3970. return -EINVAL;
  3971. cnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  3972. thermal_state, cnss_tcdev->tcdev_id);
  3973. mutex_lock(&plat_priv->tcdev_lock);
  3974. ret = cnss_bus_set_therm_cdev_state(plat_priv,
  3975. thermal_state,
  3976. cnss_tcdev->tcdev_id);
  3977. if (!ret)
  3978. cnss_tcdev->curr_thermal_state = thermal_state;
  3979. mutex_unlock(&plat_priv->tcdev_lock);
  3980. if (ret) {
  3981. cnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  3982. ret, cnss_tcdev->tcdev_id);
  3983. return ret;
  3984. }
  3985. return 0;
  3986. }
  3987. static struct thermal_cooling_device_ops cnss_cooling_ops = {
  3988. .get_max_state = cnss_tcdev_get_max_state,
  3989. .get_cur_state = cnss_tcdev_get_cur_state,
  3990. .set_cur_state = cnss_tcdev_set_cur_state,
  3991. };
  3992. int cnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  3993. int tcdev_id)
  3994. {
  3995. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  3996. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3997. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  3998. struct device_node *dev_node;
  3999. int ret = 0;
  4000. if (!priv) {
  4001. cnss_pr_err("Platform driver is not initialized!\n");
  4002. return -ENODEV;
  4003. }
  4004. cnss_tcdev = kzalloc(sizeof(*cnss_tcdev), GFP_KERNEL);
  4005. if (!cnss_tcdev) {
  4006. cnss_pr_err("Failed to allocate cnss_tcdev object!\n");
  4007. return -ENOMEM;
  4008. }
  4009. cnss_tcdev->tcdev_id = tcdev_id;
  4010. cnss_tcdev->max_thermal_state = max_state;
  4011. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  4012. "qcom,cnss_cdev%d", tcdev_id);
  4013. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  4014. if (!dev_node) {
  4015. cnss_pr_err("Failed to get cooling device node\n");
  4016. kfree(cnss_tcdev);
  4017. return -EINVAL;
  4018. }
  4019. cnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  4020. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  4021. cnss_tcdev->tcdev = thermal_of_cooling_device_register(dev_node,
  4022. cdev_node_name,
  4023. cnss_tcdev,
  4024. &cnss_cooling_ops);
  4025. if (IS_ERR_OR_NULL(cnss_tcdev->tcdev)) {
  4026. ret = PTR_ERR(cnss_tcdev->tcdev);
  4027. cnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  4028. ret, cnss_tcdev->tcdev_id);
  4029. kfree(cnss_tcdev);
  4030. } else {
  4031. cnss_pr_dbg("Cooling device registered for cdev id %d",
  4032. cnss_tcdev->tcdev_id);
  4033. mutex_lock(&priv->tcdev_lock);
  4034. list_add(&cnss_tcdev->tcdev_list,
  4035. &priv->cnss_tcdev_list);
  4036. mutex_unlock(&priv->tcdev_lock);
  4037. }
  4038. } else {
  4039. cnss_pr_dbg("Cooling device registration not supported");
  4040. kfree(cnss_tcdev);
  4041. ret = -EOPNOTSUPP;
  4042. }
  4043. return ret;
  4044. }
  4045. EXPORT_SYMBOL(cnss_thermal_cdev_register);
  4046. void cnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  4047. {
  4048. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4049. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4050. if (!priv) {
  4051. cnss_pr_err("Platform driver is not initialized!\n");
  4052. return;
  4053. }
  4054. mutex_lock(&priv->tcdev_lock);
  4055. while (!list_empty(&priv->cnss_tcdev_list)) {
  4056. cnss_tcdev = list_first_entry(&priv->cnss_tcdev_list,
  4057. struct cnss_thermal_cdev,
  4058. tcdev_list);
  4059. thermal_cooling_device_unregister(cnss_tcdev->tcdev);
  4060. list_del(&cnss_tcdev->tcdev_list);
  4061. kfree(cnss_tcdev);
  4062. }
  4063. mutex_unlock(&priv->tcdev_lock);
  4064. }
  4065. EXPORT_SYMBOL(cnss_thermal_cdev_unregister);
  4066. int cnss_get_curr_therm_cdev_state(struct device *dev,
  4067. unsigned long *thermal_state,
  4068. int tcdev_id)
  4069. {
  4070. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4071. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4072. if (!priv) {
  4073. cnss_pr_err("Platform driver is not initialized!\n");
  4074. return -ENODEV;
  4075. }
  4076. mutex_lock(&priv->tcdev_lock);
  4077. list_for_each_entry(cnss_tcdev, &priv->cnss_tcdev_list, tcdev_list) {
  4078. if (cnss_tcdev->tcdev_id != tcdev_id)
  4079. continue;
  4080. *thermal_state = cnss_tcdev->curr_thermal_state;
  4081. mutex_unlock(&priv->tcdev_lock);
  4082. cnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  4083. cnss_tcdev->curr_thermal_state, tcdev_id);
  4084. return 0;
  4085. }
  4086. mutex_unlock(&priv->tcdev_lock);
  4087. cnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  4088. return -EINVAL;
  4089. }
  4090. EXPORT_SYMBOL(cnss_get_curr_therm_cdev_state);
  4091. static int cnss_probe(struct platform_device *plat_dev)
  4092. {
  4093. int ret = 0;
  4094. struct cnss_plat_data *plat_priv;
  4095. const struct of_device_id *of_id;
  4096. const struct platform_device_id *device_id;
  4097. if (cnss_get_plat_priv(plat_dev)) {
  4098. cnss_pr_err("Driver is already initialized!\n");
  4099. ret = -EEXIST;
  4100. goto out;
  4101. }
  4102. ret = cnss_plat_env_available();
  4103. if (ret)
  4104. goto out;
  4105. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  4106. if (!of_id || !of_id->data) {
  4107. cnss_pr_err("Failed to find of match device!\n");
  4108. ret = -ENODEV;
  4109. goto out;
  4110. }
  4111. device_id = of_id->data;
  4112. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  4113. GFP_KERNEL);
  4114. if (!plat_priv) {
  4115. ret = -ENOMEM;
  4116. goto out;
  4117. }
  4118. plat_priv->plat_dev = plat_dev;
  4119. plat_priv->dev_node = NULL;
  4120. plat_priv->device_id = device_id->driver_data;
  4121. plat_priv->dt_type = cnss_dt_type(plat_priv);
  4122. cnss_pr_dbg("Probing platform driver from dt type: %d\n",
  4123. plat_priv->dt_type);
  4124. plat_priv->use_fw_path_with_prefix =
  4125. cnss_use_fw_path_with_prefix(plat_priv);
  4126. ret = cnss_get_dev_cfg_node(plat_priv);
  4127. if (ret) {
  4128. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  4129. goto reset_plat_dev;
  4130. }
  4131. cnss_initialize_mem_pool(plat_priv->device_id);
  4132. ret = cnss_get_pld_bus_ops_name(plat_priv);
  4133. if (ret)
  4134. cnss_pr_vdbg("Failed to find bus ops name, err = %d\n",
  4135. ret);
  4136. ret = cnss_get_rc_num(plat_priv);
  4137. if (ret)
  4138. cnss_pr_err("Failed to find PCIe RC number, err = %d\n", ret);
  4139. cnss_pr_dbg("rc_num=%d\n", plat_priv->rc_num);
  4140. plat_priv->bus_type = cnss_get_bus_type(plat_priv);
  4141. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  4142. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  4143. cnss_set_plat_priv(plat_dev, plat_priv);
  4144. cnss_set_device_name(plat_priv);
  4145. platform_set_drvdata(plat_dev, plat_priv);
  4146. INIT_LIST_HEAD(&plat_priv->vreg_list);
  4147. INIT_LIST_HEAD(&plat_priv->clk_list);
  4148. cnss_get_pm_domain_info(plat_priv);
  4149. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  4150. cnss_power_misc_params_init(plat_priv);
  4151. cnss_get_tcs_info(plat_priv);
  4152. cnss_get_cpr_info(plat_priv);
  4153. cnss_aop_interface_init(plat_priv);
  4154. cnss_init_control_params(plat_priv);
  4155. ret = cnss_get_resources(plat_priv);
  4156. if (ret)
  4157. goto reset_ctx;
  4158. ret = cnss_register_esoc(plat_priv);
  4159. if (ret)
  4160. goto free_res;
  4161. ret = cnss_register_bus_scale(plat_priv);
  4162. if (ret)
  4163. goto unreg_esoc;
  4164. ret = cnss_create_sysfs(plat_priv);
  4165. if (ret)
  4166. goto unreg_bus_scale;
  4167. ret = cnss_event_work_init(plat_priv);
  4168. if (ret)
  4169. goto remove_sysfs;
  4170. ret = cnss_dms_init(plat_priv);
  4171. if (ret)
  4172. goto deinit_event_work;
  4173. ret = cnss_debugfs_create(plat_priv);
  4174. if (ret)
  4175. goto deinit_dms;
  4176. ret = cnss_misc_init(plat_priv);
  4177. if (ret)
  4178. goto destroy_debugfs;
  4179. ret = cnss_wlan_hw_disable_check(plat_priv);
  4180. if (ret)
  4181. goto deinit_misc;
  4182. /* Make sure all platform related init are done before
  4183. * device power on and bus init.
  4184. */
  4185. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  4186. ret = cnss_wlan_device_init(plat_priv);
  4187. if (ret)
  4188. goto deinit_misc;
  4189. } else {
  4190. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  4191. }
  4192. cnss_register_coex_service(plat_priv);
  4193. cnss_register_ims_service(plat_priv);
  4194. mutex_init(&plat_priv->tcdev_lock);
  4195. INIT_LIST_HEAD(&plat_priv->cnss_tcdev_list);
  4196. cnss_pr_info("Platform driver probed successfully.\n");
  4197. return 0;
  4198. deinit_misc:
  4199. cnss_misc_deinit(plat_priv);
  4200. destroy_debugfs:
  4201. cnss_debugfs_destroy(plat_priv);
  4202. deinit_dms:
  4203. cnss_dms_deinit(plat_priv);
  4204. deinit_event_work:
  4205. cnss_event_work_deinit(plat_priv);
  4206. remove_sysfs:
  4207. cnss_remove_sysfs(plat_priv);
  4208. unreg_bus_scale:
  4209. cnss_unregister_bus_scale(plat_priv);
  4210. unreg_esoc:
  4211. cnss_unregister_esoc(plat_priv);
  4212. free_res:
  4213. cnss_put_resources(plat_priv);
  4214. reset_ctx:
  4215. cnss_aop_interface_deinit(plat_priv);
  4216. platform_set_drvdata(plat_dev, NULL);
  4217. cnss_deinitialize_mem_pool();
  4218. reset_plat_dev:
  4219. cnss_clear_plat_priv(plat_priv);
  4220. out:
  4221. return ret;
  4222. }
  4223. static int cnss_remove(struct platform_device *plat_dev)
  4224. {
  4225. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  4226. plat_priv->audio_iommu_domain = NULL;
  4227. cnss_genl_exit();
  4228. cnss_unregister_ims_service(plat_priv);
  4229. cnss_unregister_coex_service(plat_priv);
  4230. cnss_bus_deinit(plat_priv);
  4231. cnss_misc_deinit(plat_priv);
  4232. cnss_debugfs_destroy(plat_priv);
  4233. cnss_dms_deinit(plat_priv);
  4234. cnss_qmi_deinit(plat_priv);
  4235. cnss_event_work_deinit(plat_priv);
  4236. cnss_cancel_dms_work();
  4237. cnss_remove_sysfs(plat_priv);
  4238. cnss_unregister_bus_scale(plat_priv);
  4239. cnss_unregister_esoc(plat_priv);
  4240. cnss_put_resources(plat_priv);
  4241. cnss_aop_interface_deinit(plat_priv);
  4242. cnss_deinitialize_mem_pool();
  4243. platform_set_drvdata(plat_dev, NULL);
  4244. cnss_clear_plat_priv(plat_priv);
  4245. return 0;
  4246. }
  4247. static struct platform_driver cnss_platform_driver = {
  4248. .probe = cnss_probe,
  4249. .remove = cnss_remove,
  4250. .driver = {
  4251. .name = "cnss2",
  4252. .of_match_table = cnss_of_match_table,
  4253. #ifdef CONFIG_CNSS_ASYNC
  4254. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4255. #endif
  4256. },
  4257. };
  4258. static bool cnss_check_compatible_node(void)
  4259. {
  4260. struct device_node *dn = NULL;
  4261. for_each_matching_node(dn, cnss_of_match_table) {
  4262. if (of_device_is_available(dn)) {
  4263. cnss_allow_driver_loading = true;
  4264. return true;
  4265. }
  4266. }
  4267. return false;
  4268. }
  4269. /**
  4270. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  4271. *
  4272. * Valid device tree node means a node with "compatible" property from the
  4273. * device match table and "status" property is not disabled.
  4274. *
  4275. * Return: true if valid device tree node found, false if not found
  4276. */
  4277. static bool cnss_is_valid_dt_node_found(void)
  4278. {
  4279. struct device_node *dn = NULL;
  4280. for_each_matching_node(dn, cnss_of_match_table) {
  4281. if (of_device_is_available(dn))
  4282. break;
  4283. }
  4284. if (dn)
  4285. return true;
  4286. return false;
  4287. }
  4288. static int __init cnss_initialize(void)
  4289. {
  4290. int ret = 0;
  4291. if (!cnss_is_valid_dt_node_found())
  4292. return -ENODEV;
  4293. if (!cnss_check_compatible_node())
  4294. return ret;
  4295. cnss_debug_init();
  4296. ret = platform_driver_register(&cnss_platform_driver);
  4297. if (ret)
  4298. cnss_debug_deinit();
  4299. ret = cnss_genl_init();
  4300. if (ret < 0)
  4301. cnss_pr_err("CNSS genl init failed %d\n", ret);
  4302. return ret;
  4303. }
  4304. static void __exit cnss_exit(void)
  4305. {
  4306. cnss_genl_exit();
  4307. platform_driver_unregister(&cnss_platform_driver);
  4308. cnss_debug_deinit();
  4309. }
  4310. module_init(cnss_initialize);
  4311. module_exit(cnss_exit);
  4312. MODULE_LICENSE("GPL v2");
  4313. MODULE_DESCRIPTION("CNSS2 Platform Driver");