wcd937x.c 84 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/slab.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/device.h>
  9. #include <linux/delay.h>
  10. #include <linux/kernel.h>
  11. #include <linux/component.h>
  12. #include <linux/regmap.h>
  13. #include <linux/pm_runtime.h>
  14. #include <sound/soc.h>
  15. #include <sound/tlv.h>
  16. #include <soc/soundwire.h>
  17. #include <sound/soc.h>
  18. #include <sound/soc-dapm.h>
  19. #include "internal.h"
  20. #include "wcd937x.h"
  21. #include <asoc/wcdcal-hwdep.h>
  22. #include "wcd937x-registers.h"
  23. #include <asoc/msm-cdc-pinctrl.h>
  24. #include <dt-bindings/sound/audio-codec-port-types.h>
  25. #include <asoc/msm-cdc-supply.h>
  26. #define DRV_NAME "wcd937x_codec"
  27. #define WCD9370_VARIANT 0
  28. #define WCD9375_VARIANT 5
  29. #define WCD937X_VARIANT_ENTRY_SIZE 32
  30. #define NUM_SWRS_DT_PARAMS 5
  31. #define WCD937X_VERSION_1_0 1
  32. #define WCD937X_VERSION_ENTRY_SIZE 32
  33. #define EAR_RX_PATH_AUX 1
  34. enum {
  35. CODEC_TX = 0,
  36. CODEC_RX,
  37. };
  38. enum {
  39. ALLOW_BUCK_DISABLE,
  40. HPH_COMP_DELAY,
  41. HPH_PA_DELAY,
  42. };
  43. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  44. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  45. static int wcd937x_handle_post_irq(void *data);
  46. static int wcd937x_reset(struct device *dev);
  47. static int wcd937x_reset_low(struct device *dev);
  48. static const struct regmap_irq wcd937x_irqs[WCD937X_NUM_IRQS] = {
  49. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
  50. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
  51. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_DET, 0, 0x04),
  52. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_LEG_DET, 0, 0x08),
  53. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_SW_DET, 0, 0x10),
  54. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_OCP_INT, 0, 0x20),
  55. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_CNP_INT, 0, 0x40),
  56. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_OCP_INT, 0, 0x80),
  57. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_CNP_INT, 1, 0x01),
  58. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_CNP_INT, 1, 0x02),
  59. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_SCD_INT, 1, 0x04),
  60. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_CNP_INT, 1, 0x08),
  61. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_SCD_INT, 1, 0x10),
  62. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_PDM_WD_INT, 1, 0x20),
  63. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_PDM_WD_INT, 1, 0x40),
  64. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_PDM_WD_INT, 1, 0x80),
  65. REGMAP_IRQ_REG(WCD937X_IRQ_LDORT_SCD_INT, 2, 0x01),
  66. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_MOISTURE_INT, 2, 0x02),
  67. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_SURGE_DET_INT, 2, 0x04),
  68. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
  69. };
  70. static struct regmap_irq_chip wcd937x_regmap_irq_chip = {
  71. .name = "wcd937x",
  72. .irqs = wcd937x_irqs,
  73. .num_irqs = ARRAY_SIZE(wcd937x_irqs),
  74. .num_regs = 3,
  75. .status_base = WCD937X_DIGITAL_INTR_STATUS_0,
  76. .mask_base = WCD937X_DIGITAL_INTR_MASK_0,
  77. .ack_base = WCD937X_DIGITAL_INTR_CLEAR_0,
  78. .use_ack = 1,
  79. .type_base = WCD937X_DIGITAL_INTR_LEVEL_0,
  80. .runtime_pm = false,
  81. .handle_post_irq = wcd937x_handle_post_irq,
  82. .irq_drv_data = NULL,
  83. };
  84. static int wcd937x_handle_post_irq(void *data)
  85. {
  86. struct wcd937x_priv *wcd937x = data;
  87. u32 status1 = 0, status2 = 0, status3 = 0;
  88. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_0, &status1);
  89. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_1, &status2);
  90. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_2, &status3);
  91. wcd937x->tx_swr_dev->slave_irq_pending =
  92. ((status1 || status2 || status3) ? true : false);
  93. return IRQ_HANDLED;
  94. }
  95. static int wcd937x_init_reg(struct snd_soc_component *component)
  96. {
  97. snd_soc_component_update_bits(component, WCD937X_SLEEP_CTL,
  98. 0x0E, 0x0E);
  99. snd_soc_component_update_bits(component, WCD937X_SLEEP_CTL,
  100. 0x80, 0x80);
  101. usleep_range(1000, 1010);
  102. snd_soc_component_update_bits(component, WCD937X_SLEEP_CTL,
  103. 0x40, 0x40);
  104. usleep_range(1000, 1010);
  105. snd_soc_component_update_bits(component, WCD937X_LDORXTX_CONFIG,
  106. 0x10, 0x00);
  107. snd_soc_component_update_bits(component, WCD937X_BIAS_VBG_FINE_ADJ,
  108. 0xF0, 0x80);
  109. snd_soc_component_update_bits(component, WCD937X_ANA_BIAS,
  110. 0x80, 0x80);
  111. snd_soc_component_update_bits(component, WCD937X_ANA_BIAS,
  112. 0x40, 0x40);
  113. usleep_range(10000, 10010);
  114. snd_soc_component_update_bits(component, WCD937X_ANA_BIAS,
  115. 0x40, 0x00);
  116. snd_soc_component_update_bits(component, WCD937X_HPH_OCP_CTL,
  117. 0xFF, 0x3A);
  118. snd_soc_component_update_bits(component, WCD937X_RX_OCP_CTL,
  119. 0x0F, 0x02);
  120. snd_soc_component_update_bits(component,
  121. WCD937X_HPH_SURGE_HPHLR_SURGE_EN,
  122. 0xFF, 0xD9);
  123. snd_soc_component_update_bits(component, WCD937X_MICB1_TEST_CTL_1,
  124. 0xFF, 0xFA);
  125. snd_soc_component_update_bits(component, WCD937X_MICB2_TEST_CTL_1,
  126. 0xFF, 0xFA);
  127. snd_soc_component_update_bits(component, WCD937X_MICB3_TEST_CTL_1,
  128. 0xFF, 0xFA);
  129. return 0;
  130. }
  131. static int wcd937x_set_port_params(struct snd_soc_component *component,
  132. u8 slv_prt_type, u8 *port_id, u8 *num_ch,
  133. u8 *ch_mask, u32 *ch_rate,
  134. u8 *port_type, u8 path)
  135. {
  136. int i, j;
  137. u8 num_ports = 0;
  138. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  139. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  140. switch (path) {
  141. case CODEC_RX:
  142. map = &wcd937x->rx_port_mapping;
  143. num_ports = wcd937x->num_rx_ports;
  144. break;
  145. case CODEC_TX:
  146. map = &wcd937x->tx_port_mapping;
  147. num_ports = wcd937x->num_tx_ports;
  148. break;
  149. }
  150. for (i = 0; i <= num_ports; i++) {
  151. for (j = 0; j < MAX_CH_PER_PORT; j++) {
  152. if ((*map)[i][j].slave_port_type == slv_prt_type)
  153. goto found;
  154. }
  155. }
  156. found:
  157. if (i > num_ports || j == MAX_CH_PER_PORT) {
  158. dev_err(component->dev, "%s Failed to find slave port for type %u\n",
  159. __func__, slv_prt_type);
  160. return -EINVAL;
  161. }
  162. *port_id = i;
  163. *num_ch = (*map)[i][j].num_ch;
  164. *ch_mask = (*map)[i][j].ch_mask;
  165. *ch_rate = (*map)[i][j].ch_rate;
  166. *port_type = (*map)[i][j].master_port_type;
  167. return 0;
  168. }
  169. static int wcd937x_parse_port_mapping(struct device *dev,
  170. char *prop, u8 path)
  171. {
  172. u32 *dt_array, map_size, map_length;
  173. u32 port_num = 0, ch_mask, ch_rate, old_port_num = 0;
  174. u32 slave_port_type, master_port_type;
  175. u32 i, ch_iter = 0;
  176. int ret = 0;
  177. u8 *num_ports = NULL;
  178. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  179. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  180. switch (path) {
  181. case CODEC_RX:
  182. map = &wcd937x->rx_port_mapping;
  183. num_ports = &wcd937x->num_rx_ports;
  184. break;
  185. case CODEC_TX:
  186. map = &wcd937x->tx_port_mapping;
  187. num_ports = &wcd937x->num_tx_ports;
  188. break;
  189. }
  190. if (!of_find_property(dev->of_node, prop,
  191. &map_size)) {
  192. dev_err(dev, "missing port mapping prop %s\n", prop);
  193. ret = -EINVAL;
  194. goto err;
  195. }
  196. map_length = map_size / (NUM_SWRS_DT_PARAMS * sizeof(u32));
  197. dt_array = kzalloc(map_size, GFP_KERNEL);
  198. if (!dt_array) {
  199. ret = -ENOMEM;
  200. goto err;
  201. }
  202. ret = of_property_read_u32_array(dev->of_node, prop, dt_array,
  203. NUM_SWRS_DT_PARAMS * map_length);
  204. if (ret) {
  205. dev_err(dev, "%s: Failed to read port mapping from prop %s\n",
  206. __func__, prop);
  207. ret = -EINVAL;
  208. goto err_pdata_fail;
  209. }
  210. for (i = 0; i < map_length; i++) {
  211. port_num = dt_array[NUM_SWRS_DT_PARAMS * i];
  212. slave_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 1];
  213. ch_mask = dt_array[NUM_SWRS_DT_PARAMS * i + 2];
  214. ch_rate = dt_array[NUM_SWRS_DT_PARAMS * i + 3];
  215. master_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 4];
  216. if (port_num != old_port_num)
  217. ch_iter = 0;
  218. (*map)[port_num][ch_iter].slave_port_type = slave_port_type;
  219. (*map)[port_num][ch_iter].ch_mask = ch_mask;
  220. (*map)[port_num][ch_iter].master_port_type = master_port_type;
  221. (*map)[port_num][ch_iter].num_ch = __sw_hweight8(ch_mask);
  222. (*map)[port_num][ch_iter++].ch_rate = ch_rate;
  223. old_port_num = port_num;
  224. }
  225. *num_ports = port_num;
  226. kfree(dt_array);
  227. return 0;
  228. err_pdata_fail:
  229. kfree(dt_array);
  230. err:
  231. return ret;
  232. }
  233. static int wcd937x_tx_connect_port(struct snd_soc_component *component,
  234. u8 slv_port_type, u8 enable)
  235. {
  236. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  237. u8 port_id;
  238. u8 num_ch;
  239. u8 ch_mask;
  240. u32 ch_rate;
  241. u8 port_type;
  242. u8 num_port = 1;
  243. int ret = 0;
  244. ret = wcd937x_set_port_params(component, slv_port_type, &port_id,
  245. &num_ch, &ch_mask, &ch_rate,
  246. &port_type, CODEC_TX);
  247. if (ret)
  248. return ret;
  249. if (enable)
  250. ret = swr_connect_port(wcd937x->tx_swr_dev, &port_id,
  251. num_port, &ch_mask, &ch_rate,
  252. &num_ch, &port_type);
  253. else
  254. ret = swr_disconnect_port(wcd937x->tx_swr_dev, &port_id,
  255. num_port, &ch_mask, &port_type);
  256. return ret;
  257. }
  258. static int wcd937x_rx_connect_port(struct snd_soc_component *component,
  259. u8 slv_port_type, u8 enable)
  260. {
  261. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  262. u8 port_id;
  263. u8 num_ch;
  264. u8 ch_mask;
  265. u32 ch_rate;
  266. u8 port_type;
  267. u8 num_port = 1;
  268. int ret = 0;
  269. ret = wcd937x_set_port_params(component, slv_port_type, &port_id,
  270. &num_ch, &ch_mask, &ch_rate,
  271. &port_type, CODEC_RX);
  272. if (ret)
  273. return ret;
  274. if (enable)
  275. ret = swr_connect_port(wcd937x->rx_swr_dev, &port_id,
  276. num_port, &ch_mask, &ch_rate,
  277. &num_ch, &port_type);
  278. else
  279. ret = swr_disconnect_port(wcd937x->rx_swr_dev, &port_id,
  280. num_port, &ch_mask, &port_type);
  281. return ret;
  282. }
  283. static int wcd937x_rx_clk_enable(struct snd_soc_component *component)
  284. {
  285. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  286. if (wcd937x->rx_clk_cnt == 0) {
  287. snd_soc_component_update_bits(component,
  288. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x08, 0x08);
  289. snd_soc_component_update_bits(component,
  290. WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x01, 0x01);
  291. snd_soc_component_update_bits(component,
  292. WCD937X_ANA_RX_SUPPLIES, 0x01, 0x01);
  293. snd_soc_component_update_bits(component,
  294. WCD937X_DIGITAL_CDC_RX0_CTL, 0x40, 0x00);
  295. snd_soc_component_update_bits(component,
  296. WCD937X_DIGITAL_CDC_RX1_CTL, 0x40, 0x00);
  297. snd_soc_component_update_bits(component,
  298. WCD937X_DIGITAL_CDC_RX2_CTL, 0x40, 0x00);
  299. snd_soc_component_update_bits(component,
  300. WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x02, 0x02);
  301. }
  302. wcd937x->rx_clk_cnt++;
  303. return 0;
  304. }
  305. static int wcd937x_rx_clk_disable(struct snd_soc_component *component)
  306. {
  307. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  308. if (wcd937x->rx_clk_cnt == 0) {
  309. dev_dbg(wcd937x->dev, "%s:clk already disabled\n", __func__);
  310. return 0;
  311. }
  312. wcd937x->rx_clk_cnt--;
  313. if (wcd937x->rx_clk_cnt == 0) {
  314. snd_soc_component_update_bits(component,
  315. WCD937X_ANA_RX_SUPPLIES, 0x01, 0x00);
  316. snd_soc_component_update_bits(component,
  317. WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  318. 0x02, 0x00);
  319. snd_soc_component_update_bits(component,
  320. WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  321. 0x01, 0x00);
  322. }
  323. return 0;
  324. }
  325. /*
  326. * wcd937x_soc_get_mbhc: get wcd937x_mbhc handle of corresponding component
  327. * @component: handle to snd_soc_component *
  328. *
  329. * return wcd937x_mbhc handle or error code in case of failure
  330. */
  331. struct wcd937x_mbhc *wcd937x_soc_get_mbhc(struct snd_soc_component *component)
  332. {
  333. struct wcd937x_priv *wcd937x;
  334. if (!component) {
  335. pr_err("%s: Invalid params, NULL component\n", __func__);
  336. return NULL;
  337. }
  338. wcd937x = snd_soc_component_get_drvdata(component);
  339. if (!wcd937x) {
  340. pr_err("%s: Invalid params, NULL tavil\n", __func__);
  341. return NULL;
  342. }
  343. return wcd937x->mbhc;
  344. }
  345. EXPORT_SYMBOL(wcd937x_soc_get_mbhc);
  346. static int wcd937x_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
  347. struct snd_kcontrol *kcontrol,
  348. int event)
  349. {
  350. struct snd_soc_component *component =
  351. snd_soc_dapm_to_component(w->dapm);
  352. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  353. int hph_mode = wcd937x->hph_mode;
  354. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  355. w->name, event);
  356. switch (event) {
  357. case SND_SOC_DAPM_PRE_PMU:
  358. wcd937x_rx_clk_enable(component);
  359. snd_soc_component_update_bits(component,
  360. WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  361. 0x01, 0x01);
  362. snd_soc_component_update_bits(component,
  363. WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  364. 0x04, 0x04);
  365. snd_soc_component_update_bits(component,
  366. WCD937X_HPH_RDAC_CLK_CTL1,
  367. 0x80, 0x00);
  368. set_bit(HPH_COMP_DELAY, &wcd937x->status_mask);
  369. break;
  370. case SND_SOC_DAPM_POST_PMU:
  371. if (hph_mode == CLS_AB_HIFI || hph_mode == CLS_H_HIFI)
  372. snd_soc_component_update_bits(component,
  373. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  374. 0x0F, 0x02);
  375. else if (hph_mode == CLS_H_LOHIFI)
  376. snd_soc_component_update_bits(component,
  377. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  378. 0x0F, 0x06);
  379. if (wcd937x->comp1_enable) {
  380. snd_soc_component_update_bits(component,
  381. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  382. 0x02, 0x02);
  383. snd_soc_component_update_bits(component,
  384. WCD937X_HPH_L_EN, 0x20, 0x00);
  385. if (wcd937x->comp2_enable) {
  386. snd_soc_component_update_bits(component,
  387. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  388. 0x01, 0x01);
  389. snd_soc_component_update_bits(component,
  390. WCD937X_HPH_R_EN, 0x20, 0x00);
  391. }
  392. /*
  393. * 5ms sleep is required after COMP is enabled as per
  394. * HW requirement
  395. */
  396. if (test_bit(HPH_COMP_DELAY, &wcd937x->status_mask)) {
  397. usleep_range(5000, 5100);
  398. clear_bit(HPH_COMP_DELAY,
  399. &wcd937x->status_mask);
  400. }
  401. } else {
  402. snd_soc_component_update_bits(component,
  403. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  404. 0x02, 0x00);
  405. snd_soc_component_update_bits(component,
  406. WCD937X_HPH_L_EN, 0x20, 0x20);
  407. }
  408. snd_soc_component_update_bits(component,
  409. WCD937X_HPH_NEW_INT_HPH_TIMER1, 0x02, 0x00);
  410. break;
  411. case SND_SOC_DAPM_POST_PMD:
  412. snd_soc_component_update_bits(component,
  413. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  414. 0x0F, 0x01);
  415. break;
  416. }
  417. return 0;
  418. }
  419. static int wcd937x_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
  420. struct snd_kcontrol *kcontrol,
  421. int event)
  422. {
  423. struct snd_soc_component *component =
  424. snd_soc_dapm_to_component(w->dapm);
  425. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  426. int hph_mode = wcd937x->hph_mode;
  427. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  428. w->name, event);
  429. switch (event) {
  430. case SND_SOC_DAPM_PRE_PMU:
  431. wcd937x_rx_clk_enable(component);
  432. snd_soc_component_update_bits(component,
  433. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x02, 0x02);
  434. snd_soc_component_update_bits(component,
  435. WCD937X_DIGITAL_CDC_HPH_GAIN_CTL, 0x08, 0x08);
  436. snd_soc_component_update_bits(component,
  437. WCD937X_HPH_RDAC_CLK_CTL1, 0x80, 0x00);
  438. set_bit(HPH_COMP_DELAY, &wcd937x->status_mask);
  439. break;
  440. case SND_SOC_DAPM_POST_PMU:
  441. if (hph_mode == CLS_AB_HIFI || hph_mode == CLS_H_HIFI)
  442. snd_soc_component_update_bits(component,
  443. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_R,
  444. 0x0F, 0x02);
  445. else if (hph_mode == CLS_H_LOHIFI)
  446. snd_soc_component_update_bits(component,
  447. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_R,
  448. 0x0F, 0x06);
  449. if (wcd937x->comp2_enable) {
  450. snd_soc_component_update_bits(component,
  451. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  452. 0x01, 0x01);
  453. snd_soc_component_update_bits(component,
  454. WCD937X_HPH_R_EN, 0x20, 0x00);
  455. if (wcd937x->comp1_enable) {
  456. snd_soc_component_update_bits(component,
  457. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  458. 0x02, 0x02);
  459. snd_soc_component_update_bits(component,
  460. WCD937X_HPH_L_EN, 0x20, 0x00);
  461. }
  462. /*
  463. * 5ms sleep is required after COMP is enabled as per
  464. * HW requirement
  465. */
  466. if (test_bit(HPH_COMP_DELAY, &wcd937x->status_mask)) {
  467. usleep_range(5000, 5100);
  468. clear_bit(HPH_COMP_DELAY,
  469. &wcd937x->status_mask);
  470. }
  471. } else {
  472. snd_soc_component_update_bits(component,
  473. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  474. 0x01, 0x00);
  475. snd_soc_component_update_bits(component,
  476. WCD937X_HPH_R_EN, 0x20, 0x20);
  477. }
  478. snd_soc_component_update_bits(component,
  479. WCD937X_HPH_NEW_INT_HPH_TIMER1, 0x02, 0x00);
  480. break;
  481. case SND_SOC_DAPM_POST_PMD:
  482. snd_soc_component_update_bits(component,
  483. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_R,
  484. 0x0F, 0x01);
  485. break;
  486. }
  487. return 0;
  488. }
  489. static int wcd937x_codec_ear_dac_event(struct snd_soc_dapm_widget *w,
  490. struct snd_kcontrol *kcontrol,
  491. int event)
  492. {
  493. struct snd_soc_component *component =
  494. snd_soc_dapm_to_component(w->dapm);
  495. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  496. int hph_mode = wcd937x->hph_mode;
  497. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  498. w->name, event);
  499. switch (event) {
  500. case SND_SOC_DAPM_PRE_PMU:
  501. wcd937x_rx_clk_enable(component);
  502. snd_soc_component_update_bits(component,
  503. WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  504. 0x04, 0x04);
  505. snd_soc_component_update_bits(component,
  506. WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  507. 0x01, 0x01);
  508. if (hph_mode == CLS_AB_HIFI || hph_mode == CLS_H_HIFI)
  509. snd_soc_component_update_bits(component,
  510. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  511. 0x0F, 0x02);
  512. else if (hph_mode == CLS_H_LOHIFI)
  513. snd_soc_component_update_bits(component,
  514. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  515. 0x0F, 0x06);
  516. snd_soc_component_update_bits(component,
  517. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  518. 0x02, 0x02);
  519. usleep_range(5000, 5010);
  520. snd_soc_component_update_bits(component, WCD937X_FLYBACK_EN,
  521. 0x04, 0x00);
  522. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  523. WCD_CLSH_EVENT_PRE_DAC,
  524. WCD_CLSH_STATE_EAR,
  525. hph_mode);
  526. break;
  527. case SND_SOC_DAPM_POST_PMD:
  528. if (hph_mode == CLS_AB_HIFI || hph_mode == CLS_H_LOHIFI ||
  529. hph_mode == CLS_H_HIFI)
  530. snd_soc_component_update_bits(component,
  531. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  532. 0x0F, 0x01);
  533. break;
  534. };
  535. return 0;
  536. }
  537. static int wcd937x_codec_aux_dac_event(struct snd_soc_dapm_widget *w,
  538. struct snd_kcontrol *kcontrol,
  539. int event)
  540. {
  541. struct snd_soc_component *component =
  542. snd_soc_dapm_to_component(w->dapm);
  543. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  544. int hph_mode = wcd937x->hph_mode;
  545. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  546. w->name, event);
  547. switch (event) {
  548. case SND_SOC_DAPM_PRE_PMU:
  549. wcd937x_rx_clk_enable(component);
  550. snd_soc_component_update_bits(component,
  551. WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  552. 0x04, 0x04);
  553. snd_soc_component_update_bits(component,
  554. WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  555. 0x04, 0x04);
  556. snd_soc_component_update_bits(component,
  557. WCD937X_DIGITAL_CDC_AUX_GAIN_CTL,
  558. 0x01, 0x01);
  559. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  560. WCD_CLSH_EVENT_PRE_DAC,
  561. WCD_CLSH_STATE_AUX,
  562. hph_mode);
  563. break;
  564. case SND_SOC_DAPM_POST_PMD:
  565. wcd937x_rx_clk_disable(component);
  566. snd_soc_component_update_bits(component,
  567. WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  568. 0x04, 0x00);
  569. break;
  570. };
  571. return 0;
  572. }
  573. static int wcd937x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
  574. struct snd_kcontrol *kcontrol,
  575. int event)
  576. {
  577. struct snd_soc_component *component =
  578. snd_soc_dapm_to_component(w->dapm);
  579. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  580. int ret = 0;
  581. int hph_mode = wcd937x->hph_mode;
  582. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  583. w->name, event);
  584. switch (event) {
  585. case SND_SOC_DAPM_PRE_PMU:
  586. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  587. wcd937x->rx_swr_dev->dev_num,
  588. true);
  589. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  590. WCD_CLSH_EVENT_PRE_DAC,
  591. WCD_CLSH_STATE_HPHR,
  592. hph_mode);
  593. snd_soc_component_update_bits(component, WCD937X_ANA_HPH,
  594. 0x10, 0x10);
  595. usleep_range(100, 110);
  596. set_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  597. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  598. wcd937x->rx_swr_dev->dev_num,
  599. true);
  600. snd_soc_component_update_bits(component,
  601. WCD937X_DIGITAL_PDM_WD_CTL1, 0x17, 0x13);
  602. break;
  603. case SND_SOC_DAPM_POST_PMU:
  604. /*
  605. * 7ms sleep is required after PA is enabled as per
  606. * HW requirement. If compander is disabled, then
  607. * 20ms delay is required.
  608. */
  609. if (test_bit(HPH_PA_DELAY, &wcd937x->status_mask)) {
  610. if (!wcd937x->comp2_enable)
  611. usleep_range(20000, 20100);
  612. else
  613. usleep_range(7000, 7100);
  614. clear_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  615. }
  616. snd_soc_component_update_bits(component,
  617. WCD937X_HPH_NEW_INT_HPH_TIMER1,
  618. 0x02, 0x02);
  619. snd_soc_component_update_bits(component,
  620. WCD937X_HPH_R_TEST, 0x01, 0x01);
  621. if (hph_mode == CLS_AB || hph_mode == CLS_AB_HIFI)
  622. snd_soc_component_update_bits(component,
  623. WCD937X_ANA_RX_SUPPLIES,
  624. 0x02, 0x02);
  625. if (wcd937x->update_wcd_event)
  626. wcd937x->update_wcd_event(wcd937x->handle,
  627. WCD_BOLERO_EVT_RX_MUTE,
  628. (WCD_RX2 << 0x10));
  629. break;
  630. case SND_SOC_DAPM_PRE_PMD:
  631. snd_soc_component_update_bits(component,
  632. WCD937X_HPH_R_TEST, 0x01, 0x00);
  633. if (wcd937x->update_wcd_event)
  634. wcd937x->update_wcd_event(wcd937x->handle,
  635. WCD_BOLERO_EVT_RX_MUTE,
  636. (WCD_RX2 << 0x10 | 0x1));
  637. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  638. WCD_EVENT_PRE_HPHR_PA_OFF,
  639. &wcd937x->mbhc->wcd_mbhc);
  640. set_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  641. break;
  642. case SND_SOC_DAPM_POST_PMD:
  643. /*
  644. * 7ms sleep is required after PA is disabled as per
  645. * HW requirement. If compander is disabled, then
  646. * 20ms delay is required.
  647. */
  648. if (test_bit(HPH_PA_DELAY, &wcd937x->status_mask)) {
  649. if (!wcd937x->comp2_enable)
  650. usleep_range(20000, 20100);
  651. else
  652. usleep_range(7000, 7100);
  653. clear_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  654. }
  655. snd_soc_component_update_bits(component,
  656. WCD937X_DIGITAL_PDM_WD_CTL1, 0x17, 0x00);
  657. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  658. WCD_EVENT_POST_HPHR_PA_OFF,
  659. &wcd937x->mbhc->wcd_mbhc);
  660. snd_soc_component_update_bits(component, WCD937X_ANA_HPH,
  661. 0x10, 0x00);
  662. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  663. WCD_CLSH_EVENT_POST_PA,
  664. WCD_CLSH_STATE_HPHR,
  665. hph_mode);
  666. break;
  667. };
  668. return ret;
  669. }
  670. static int wcd937x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
  671. struct snd_kcontrol *kcontrol,
  672. int event)
  673. {
  674. struct snd_soc_component *component =
  675. snd_soc_dapm_to_component(w->dapm);
  676. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  677. int ret = 0;
  678. int hph_mode = wcd937x->hph_mode;
  679. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  680. w->name, event);
  681. switch (event) {
  682. case SND_SOC_DAPM_PRE_PMU:
  683. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  684. wcd937x->rx_swr_dev->dev_num,
  685. true);
  686. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  687. WCD_CLSH_EVENT_PRE_DAC,
  688. WCD_CLSH_STATE_HPHL,
  689. hph_mode);
  690. snd_soc_component_update_bits(component, WCD937X_ANA_HPH,
  691. 0x20, 0x20);
  692. usleep_range(100, 110);
  693. set_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  694. snd_soc_component_update_bits(component,
  695. WCD937X_DIGITAL_PDM_WD_CTL0, 0x17, 0x13);
  696. break;
  697. case SND_SOC_DAPM_POST_PMU:
  698. /*
  699. * 7ms sleep is required after PA is enabled as per
  700. * HW requirement. If compander is disabled, then
  701. * 20ms delay is required.
  702. */
  703. if (test_bit(HPH_PA_DELAY, &wcd937x->status_mask)) {
  704. if (!wcd937x->comp1_enable)
  705. usleep_range(20000, 20100);
  706. else
  707. usleep_range(7000, 7100);
  708. clear_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  709. }
  710. snd_soc_component_update_bits(component,
  711. WCD937X_HPH_NEW_INT_HPH_TIMER1,
  712. 0x02, 0x02);
  713. snd_soc_component_update_bits(component,
  714. WCD937X_HPH_L_TEST, 0x01, 0x01);
  715. if (hph_mode == CLS_AB || hph_mode == CLS_AB_HIFI)
  716. snd_soc_component_update_bits(component,
  717. WCD937X_ANA_RX_SUPPLIES,
  718. 0x02, 0x02);
  719. if (wcd937x->update_wcd_event)
  720. wcd937x->update_wcd_event(wcd937x->handle,
  721. WCD_BOLERO_EVT_RX_MUTE,
  722. (WCD_RX1 << 0x10));
  723. break;
  724. case SND_SOC_DAPM_PRE_PMD:
  725. snd_soc_component_update_bits(component,
  726. WCD937X_HPH_L_TEST, 0x01, 0x00);
  727. if (wcd937x->update_wcd_event)
  728. wcd937x->update_wcd_event(wcd937x->handle,
  729. WCD_BOLERO_EVT_RX_MUTE,
  730. (WCD_RX1 << 0x10 | 0x1));
  731. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  732. WCD_EVENT_PRE_HPHL_PA_OFF,
  733. &wcd937x->mbhc->wcd_mbhc);
  734. set_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  735. break;
  736. case SND_SOC_DAPM_POST_PMD:
  737. /*
  738. * 7ms sleep is required after PA is disabled as per
  739. * HW requirement. If compander is disabled, then
  740. * 20ms delay is required.
  741. */
  742. if (test_bit(HPH_PA_DELAY, &wcd937x->status_mask)) {
  743. if (!wcd937x->comp1_enable)
  744. usleep_range(20000, 20100);
  745. else
  746. usleep_range(7000, 7100);
  747. clear_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  748. }
  749. snd_soc_component_update_bits(component,
  750. WCD937X_DIGITAL_PDM_WD_CTL0, 0x17, 0x00);
  751. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  752. WCD_EVENT_POST_HPHL_PA_OFF,
  753. &wcd937x->mbhc->wcd_mbhc);
  754. snd_soc_component_update_bits(component, WCD937X_ANA_HPH,
  755. 0x20, 0x00);
  756. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  757. WCD_CLSH_EVENT_POST_PA,
  758. WCD_CLSH_STATE_HPHL,
  759. hph_mode);
  760. break;
  761. };
  762. return ret;
  763. }
  764. static int wcd937x_codec_enable_aux_pa(struct snd_soc_dapm_widget *w,
  765. struct snd_kcontrol *kcontrol,
  766. int event)
  767. {
  768. struct snd_soc_component *component =
  769. snd_soc_dapm_to_component(w->dapm);
  770. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  771. int hph_mode = wcd937x->hph_mode;
  772. int ret = 0;
  773. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  774. w->name, event);
  775. switch (event) {
  776. case SND_SOC_DAPM_PRE_PMU:
  777. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  778. wcd937x->rx_swr_dev->dev_num,
  779. true);
  780. snd_soc_component_update_bits(component,
  781. WCD937X_DIGITAL_PDM_WD_CTL2, 0x05, 0x05);
  782. break;
  783. case SND_SOC_DAPM_POST_PMU:
  784. usleep_range(1000, 1010);
  785. if (hph_mode == CLS_AB || hph_mode == CLS_AB_HIFI)
  786. snd_soc_component_update_bits(component,
  787. WCD937X_ANA_RX_SUPPLIES,
  788. 0x02, 0x02);
  789. if (wcd937x->update_wcd_event)
  790. wcd937x->update_wcd_event(wcd937x->handle,
  791. WCD_BOLERO_EVT_RX_MUTE,
  792. (WCD_RX3 << 0x10));
  793. break;
  794. case SND_SOC_DAPM_PRE_PMD:
  795. if (wcd937x->update_wcd_event)
  796. wcd937x->update_wcd_event(wcd937x->handle,
  797. WCD_BOLERO_EVT_RX_MUTE,
  798. (WCD_RX3 << 0x10 | 0x1));
  799. break;
  800. case SND_SOC_DAPM_POST_PMD:
  801. /* Add delay as per hw requirement */
  802. usleep_range(2000, 2010);
  803. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  804. WCD_CLSH_EVENT_POST_PA,
  805. WCD_CLSH_STATE_AUX,
  806. hph_mode);
  807. snd_soc_component_update_bits(component,
  808. WCD937X_DIGITAL_PDM_WD_CTL2, 0x05, 0x00);
  809. break;
  810. };
  811. return ret;
  812. }
  813. static int wcd937x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
  814. struct snd_kcontrol *kcontrol,
  815. int event)
  816. {
  817. struct snd_soc_component *component =
  818. snd_soc_dapm_to_component(w->dapm);
  819. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  820. int hph_mode = wcd937x->hph_mode;
  821. int ret = 0;
  822. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  823. w->name, event);
  824. switch (event) {
  825. case SND_SOC_DAPM_PRE_PMU:
  826. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  827. wcd937x->rx_swr_dev->dev_num,
  828. true);
  829. /*
  830. * Enable watchdog interrupt for HPHL or AUX
  831. * depending on mux value
  832. */
  833. wcd937x->ear_rx_path =
  834. snd_soc_component_read32(
  835. component, WCD937X_DIGITAL_CDC_EAR_PATH_CTL);
  836. if (wcd937x->ear_rx_path & EAR_RX_PATH_AUX)
  837. snd_soc_component_update_bits(component,
  838. WCD937X_DIGITAL_PDM_WD_CTL2,
  839. 0x05, 0x05);
  840. else
  841. snd_soc_component_update_bits(component,
  842. WCD937X_DIGITAL_PDM_WD_CTL0,
  843. 0x17, 0x13);
  844. if (!wcd937x->comp1_enable)
  845. snd_soc_component_update_bits(component,
  846. WCD937X_ANA_EAR_COMPANDER_CTL, 0x80, 0x80);
  847. break;
  848. case SND_SOC_DAPM_POST_PMU:
  849. usleep_range(6000, 6010);
  850. if (hph_mode == CLS_AB || hph_mode == CLS_AB_HIFI)
  851. snd_soc_component_update_bits(component,
  852. WCD937X_ANA_RX_SUPPLIES,
  853. 0x02, 0x02);
  854. if (wcd937x->update_wcd_event)
  855. wcd937x->update_wcd_event(wcd937x->handle,
  856. WCD_BOLERO_EVT_RX_MUTE,
  857. (WCD_RX1 << 0x10));
  858. break;
  859. case SND_SOC_DAPM_PRE_PMD:
  860. if (wcd937x->update_wcd_event)
  861. wcd937x->update_wcd_event(wcd937x->handle,
  862. WCD_BOLERO_EVT_RX_MUTE,
  863. (WCD_RX1 << 0x10 | 0x1));
  864. break;
  865. case SND_SOC_DAPM_POST_PMD:
  866. if (!wcd937x->comp1_enable)
  867. snd_soc_component_update_bits(component,
  868. WCD937X_ANA_EAR_COMPANDER_CTL, 0x80, 0x00);
  869. usleep_range(7000, 7010);
  870. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  871. WCD_CLSH_EVENT_POST_PA,
  872. WCD_CLSH_STATE_EAR,
  873. hph_mode);
  874. snd_soc_component_update_bits(component, WCD937X_FLYBACK_EN,
  875. 0x04, 0x04);
  876. if (wcd937x->ear_rx_path & EAR_RX_PATH_AUX)
  877. snd_soc_component_update_bits(component,
  878. WCD937X_DIGITAL_PDM_WD_CTL2,
  879. 0x05, 0x00);
  880. else
  881. snd_soc_component_update_bits(component,
  882. WCD937X_DIGITAL_PDM_WD_CTL0,
  883. 0x17, 0x00);
  884. break;
  885. };
  886. return ret;
  887. }
  888. static int wcd937x_enable_clsh(struct snd_soc_dapm_widget *w,
  889. struct snd_kcontrol *kcontrol,
  890. int event)
  891. {
  892. struct snd_soc_component *component =
  893. snd_soc_dapm_to_component(w->dapm);
  894. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  895. int mode = wcd937x->hph_mode;
  896. int ret = 0;
  897. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  898. w->name, event);
  899. if (mode == CLS_H_LOHIFI || mode == CLS_H_ULP ||
  900. mode == CLS_H_HIFI || mode == CLS_H_LP) {
  901. wcd937x_rx_connect_port(component, CLSH,
  902. SND_SOC_DAPM_EVENT_ON(event));
  903. }
  904. if (SND_SOC_DAPM_EVENT_OFF(event))
  905. ret = swr_slvdev_datapath_control(
  906. wcd937x->rx_swr_dev,
  907. wcd937x->rx_swr_dev->dev_num,
  908. false);
  909. return ret;
  910. }
  911. static int wcd937x_enable_rx1(struct snd_soc_dapm_widget *w,
  912. struct snd_kcontrol *kcontrol,
  913. int event)
  914. {
  915. struct snd_soc_component *component =
  916. snd_soc_dapm_to_component(w->dapm);
  917. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  918. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  919. w->name, event);
  920. switch (event) {
  921. case SND_SOC_DAPM_PRE_PMU:
  922. wcd937x_rx_connect_port(component, HPH_L, true);
  923. if (wcd937x->comp1_enable)
  924. wcd937x_rx_connect_port(component, COMP_L, true);
  925. break;
  926. case SND_SOC_DAPM_POST_PMD:
  927. wcd937x_rx_connect_port(component, HPH_L, false);
  928. if (wcd937x->comp1_enable)
  929. wcd937x_rx_connect_port(component, COMP_L, false);
  930. wcd937x_rx_clk_disable(component);
  931. snd_soc_component_update_bits(component,
  932. WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  933. 0x01, 0x00);
  934. break;
  935. };
  936. return 0;
  937. }
  938. static int wcd937x_enable_rx2(struct snd_soc_dapm_widget *w,
  939. struct snd_kcontrol *kcontrol, int event)
  940. {
  941. struct snd_soc_component *component =
  942. snd_soc_dapm_to_component(w->dapm);
  943. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  944. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  945. w->name, event);
  946. switch (event) {
  947. case SND_SOC_DAPM_PRE_PMU:
  948. wcd937x_rx_connect_port(component, HPH_R, true);
  949. if (wcd937x->comp2_enable)
  950. wcd937x_rx_connect_port(component, COMP_R, true);
  951. break;
  952. case SND_SOC_DAPM_POST_PMD:
  953. wcd937x_rx_connect_port(component, HPH_R, false);
  954. if (wcd937x->comp2_enable)
  955. wcd937x_rx_connect_port(component, COMP_R, false);
  956. wcd937x_rx_clk_disable(component);
  957. snd_soc_component_update_bits(component,
  958. WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  959. 0x02, 0x00);
  960. break;
  961. };
  962. return 0;
  963. }
  964. static int wcd937x_enable_rx3(struct snd_soc_dapm_widget *w,
  965. struct snd_kcontrol *kcontrol,
  966. int event)
  967. {
  968. struct snd_soc_component *component =
  969. snd_soc_dapm_to_component(w->dapm);
  970. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  971. w->name, event);
  972. switch (event) {
  973. case SND_SOC_DAPM_PRE_PMU:
  974. wcd937x_rx_connect_port(component, LO, true);
  975. break;
  976. case SND_SOC_DAPM_POST_PMD:
  977. wcd937x_rx_connect_port(component, LO, false);
  978. usleep_range(6000, 6010);
  979. wcd937x_rx_clk_disable(component);
  980. snd_soc_component_update_bits(component,
  981. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x04, 0x00);
  982. break;
  983. }
  984. return 0;
  985. }
  986. static int wcd937x_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  987. struct snd_kcontrol *kcontrol,
  988. int event)
  989. {
  990. struct snd_soc_component *component =
  991. snd_soc_dapm_to_component(w->dapm);
  992. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  993. u16 dmic_clk_reg;
  994. s32 *dmic_clk_cnt;
  995. unsigned int dmic;
  996. char *wname;
  997. int ret = 0;
  998. wname = strpbrk(w->name, "012345");
  999. if (!wname) {
  1000. dev_err(component->dev, "%s: widget not found\n", __func__);
  1001. return -EINVAL;
  1002. }
  1003. ret = kstrtouint(wname, 10, &dmic);
  1004. if (ret < 0) {
  1005. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  1006. __func__);
  1007. return -EINVAL;
  1008. }
  1009. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1010. w->name, event);
  1011. switch (dmic) {
  1012. case 0:
  1013. case 1:
  1014. dmic_clk_cnt = &(wcd937x->dmic_0_1_clk_cnt);
  1015. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC1_CTL;
  1016. break;
  1017. case 2:
  1018. case 3:
  1019. dmic_clk_cnt = &(wcd937x->dmic_2_3_clk_cnt);
  1020. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC2_CTL;
  1021. break;
  1022. case 4:
  1023. case 5:
  1024. dmic_clk_cnt = &(wcd937x->dmic_4_5_clk_cnt);
  1025. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC3_CTL;
  1026. break;
  1027. default:
  1028. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  1029. __func__);
  1030. return -EINVAL;
  1031. };
  1032. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_clk_cnt %d\n",
  1033. __func__, event, dmic, *dmic_clk_cnt);
  1034. switch (event) {
  1035. case SND_SOC_DAPM_PRE_PMU:
  1036. snd_soc_component_update_bits(component,
  1037. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x80, 0x80);
  1038. snd_soc_component_update_bits(component,
  1039. dmic_clk_reg, 0x07, 0x02);
  1040. snd_soc_component_update_bits(component,
  1041. dmic_clk_reg, 0x08, 0x08);
  1042. snd_soc_component_update_bits(component,
  1043. dmic_clk_reg, 0x70, 0x20);
  1044. wcd937x_tx_connect_port(component, DMIC0 + (w->shift), true);
  1045. break;
  1046. case SND_SOC_DAPM_POST_PMD:
  1047. wcd937x_tx_connect_port(component, DMIC0 + (w->shift), false);
  1048. break;
  1049. };
  1050. return 0;
  1051. }
  1052. /*
  1053. * wcd937x_get_micb_vout_ctl_val: converts micbias from volts to register value
  1054. * @micb_mv: micbias in mv
  1055. *
  1056. * return register value converted
  1057. */
  1058. int wcd937x_get_micb_vout_ctl_val(u32 micb_mv)
  1059. {
  1060. /* min micbias voltage is 1V and maximum is 2.85V */
  1061. if (micb_mv < 1000 || micb_mv > 2850) {
  1062. pr_err("%s: unsupported micbias voltage\n", __func__);
  1063. return -EINVAL;
  1064. }
  1065. return (micb_mv - 1000) / 50;
  1066. }
  1067. EXPORT_SYMBOL(wcd937x_get_micb_vout_ctl_val);
  1068. /*
  1069. * wcd937x_mbhc_micb_adjust_voltage: adjust specific micbias voltage
  1070. * @component: handle to snd_soc_component *
  1071. * @req_volt: micbias voltage to be set
  1072. * @micb_num: micbias to be set, e.g. micbias1 or micbias2
  1073. *
  1074. * return 0 if adjustment is success or error code in case of failure
  1075. */
  1076. int wcd937x_mbhc_micb_adjust_voltage(struct snd_soc_component *component,
  1077. int req_volt, int micb_num)
  1078. {
  1079. struct wcd937x_priv *wcd937x =
  1080. snd_soc_component_get_drvdata(component);
  1081. int cur_vout_ctl, req_vout_ctl;
  1082. int micb_reg, micb_val, micb_en;
  1083. int ret = 0;
  1084. switch (micb_num) {
  1085. case MIC_BIAS_1:
  1086. micb_reg = WCD937X_ANA_MICB1;
  1087. break;
  1088. case MIC_BIAS_2:
  1089. micb_reg = WCD937X_ANA_MICB2;
  1090. break;
  1091. case MIC_BIAS_3:
  1092. micb_reg = WCD937X_ANA_MICB3;
  1093. break;
  1094. default:
  1095. return -EINVAL;
  1096. }
  1097. mutex_lock(&wcd937x->micb_lock);
  1098. /*
  1099. * If requested micbias voltage is same as current micbias
  1100. * voltage, then just return. Otherwise, adjust voltage as
  1101. * per requested value. If micbias is already enabled, then
  1102. * to avoid slow micbias ramp-up or down enable pull-up
  1103. * momentarily, change the micbias value and then re-enable
  1104. * micbias.
  1105. */
  1106. micb_val = snd_soc_component_read32(component, micb_reg);
  1107. micb_en = (micb_val & 0xC0) >> 6;
  1108. cur_vout_ctl = micb_val & 0x3F;
  1109. req_vout_ctl = wcd937x_get_micb_vout_ctl_val(req_volt);
  1110. if (req_vout_ctl < 0) {
  1111. ret = -EINVAL;
  1112. goto exit;
  1113. }
  1114. if (cur_vout_ctl == req_vout_ctl) {
  1115. ret = 0;
  1116. goto exit;
  1117. }
  1118. dev_dbg(component->dev, "%s: micb_num: %d, cur_mv: %d, req_mv: %d, micb_en: %d\n",
  1119. __func__, micb_num, WCD_VOUT_CTL_TO_MICB(cur_vout_ctl),
  1120. req_volt, micb_en);
  1121. if (micb_en == 0x1)
  1122. snd_soc_component_update_bits(component, micb_reg, 0xC0, 0x80);
  1123. snd_soc_component_update_bits(component, micb_reg, 0x3F, req_vout_ctl);
  1124. if (micb_en == 0x1) {
  1125. snd_soc_component_update_bits(component, micb_reg, 0xC0, 0x40);
  1126. /*
  1127. * Add 2ms delay as per HW requirement after enabling
  1128. * micbias
  1129. */
  1130. usleep_range(2000, 2100);
  1131. }
  1132. exit:
  1133. mutex_unlock(&wcd937x->micb_lock);
  1134. return ret;
  1135. }
  1136. EXPORT_SYMBOL(wcd937x_mbhc_micb_adjust_voltage);
  1137. static int wcd937x_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
  1138. struct snd_kcontrol *kcontrol,
  1139. int event)
  1140. {
  1141. struct snd_soc_component *component =
  1142. snd_soc_dapm_to_component(w->dapm);
  1143. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1144. int ret = 0;
  1145. switch (event) {
  1146. case SND_SOC_DAPM_PRE_PMU:
  1147. ret = swr_slvdev_datapath_control(wcd937x->tx_swr_dev,
  1148. wcd937x->tx_swr_dev->dev_num,
  1149. true);
  1150. break;
  1151. case SND_SOC_DAPM_POST_PMD:
  1152. ret = swr_slvdev_datapath_control(wcd937x->tx_swr_dev,
  1153. wcd937x->tx_swr_dev->dev_num,
  1154. false);
  1155. break;
  1156. };
  1157. return ret;
  1158. }
  1159. static int wcd937x_codec_enable_adc(struct snd_soc_dapm_widget *w,
  1160. struct snd_kcontrol *kcontrol,
  1161. int event){
  1162. struct snd_soc_component *component =
  1163. snd_soc_dapm_to_component(w->dapm);
  1164. struct wcd937x_priv *wcd937x =
  1165. snd_soc_component_get_drvdata(component);
  1166. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1167. w->name, event);
  1168. switch (event) {
  1169. case SND_SOC_DAPM_PRE_PMU:
  1170. mutex_lock(&wcd937x->ana_tx_clk_lock);
  1171. wcd937x->ana_clk_count++;
  1172. mutex_unlock(&wcd937x->ana_tx_clk_lock);
  1173. snd_soc_component_update_bits(component,
  1174. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x80, 0x80);
  1175. snd_soc_component_update_bits(component,
  1176. WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x08, 0x08);
  1177. snd_soc_component_update_bits(component,
  1178. WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x10, 0x10);
  1179. wcd937x_tx_connect_port(component, ADC1 + (w->shift), true);
  1180. break;
  1181. case SND_SOC_DAPM_POST_PMD:
  1182. wcd937x_tx_connect_port(component, ADC1 + (w->shift), false);
  1183. snd_soc_component_update_bits(component,
  1184. WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x08, 0x00);
  1185. break;
  1186. };
  1187. return 0;
  1188. }
  1189. static int wcd937x_enable_req(struct snd_soc_dapm_widget *w,
  1190. struct snd_kcontrol *kcontrol, int event)
  1191. {
  1192. struct snd_soc_component *component =
  1193. snd_soc_dapm_to_component(w->dapm);
  1194. struct wcd937x_priv *wcd937x =
  1195. snd_soc_component_get_drvdata(component);
  1196. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1197. w->name, event);
  1198. switch (event) {
  1199. case SND_SOC_DAPM_PRE_PMU:
  1200. snd_soc_component_update_bits(component,
  1201. WCD937X_DIGITAL_CDC_REQ_CTL, 0x02, 0x02);
  1202. snd_soc_component_update_bits(component,
  1203. WCD937X_DIGITAL_CDC_REQ_CTL, 0x01, 0x00);
  1204. snd_soc_component_update_bits(component,
  1205. WCD937X_ANA_TX_CH2, 0x40, 0x40);
  1206. snd_soc_component_update_bits(component,
  1207. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x30, 0x30);
  1208. snd_soc_component_update_bits(component,
  1209. WCD937X_ANA_TX_CH1, 0x80, 0x80);
  1210. snd_soc_component_update_bits(component,
  1211. WCD937X_ANA_TX_CH2, 0x40, 0x00);
  1212. snd_soc_component_update_bits(component,
  1213. WCD937X_ANA_TX_CH2, 0x80, 0x80);
  1214. break;
  1215. case SND_SOC_DAPM_POST_PMD:
  1216. snd_soc_component_update_bits(component,
  1217. WCD937X_ANA_TX_CH1, 0x80, 0x00);
  1218. snd_soc_component_update_bits(component,
  1219. WCD937X_ANA_TX_CH2, 0x80, 0x00);
  1220. snd_soc_component_update_bits(component,
  1221. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x10, 0x00);
  1222. mutex_lock(&wcd937x->ana_tx_clk_lock);
  1223. wcd937x->ana_clk_count--;
  1224. if (wcd937x->ana_clk_count <= 0) {
  1225. snd_soc_component_update_bits(component,
  1226. WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x10, 0x00);
  1227. wcd937x->ana_clk_count = 0;
  1228. }
  1229. mutex_unlock(&wcd937x->ana_tx_clk_lock);
  1230. snd_soc_component_update_bits(component,
  1231. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x80, 0x00);
  1232. break;
  1233. };
  1234. return 0;
  1235. }
  1236. int wcd937x_micbias_control(struct snd_soc_component *component,
  1237. int micb_num, int req, bool is_dapm)
  1238. {
  1239. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1240. int micb_index = micb_num - 1;
  1241. u16 micb_reg;
  1242. int pre_off_event = 0, post_off_event = 0;
  1243. int post_on_event = 0, post_dapm_off = 0;
  1244. int post_dapm_on = 0;
  1245. if ((micb_index < 0) || (micb_index > WCD937X_MAX_MICBIAS - 1)) {
  1246. dev_err(component->dev, "%s: Invalid micbias index, micb_ind:%d\n",
  1247. __func__, micb_index);
  1248. return -EINVAL;
  1249. }
  1250. switch (micb_num) {
  1251. case MIC_BIAS_1:
  1252. micb_reg = WCD937X_ANA_MICB1;
  1253. break;
  1254. case MIC_BIAS_2:
  1255. micb_reg = WCD937X_ANA_MICB2;
  1256. pre_off_event = WCD_EVENT_PRE_MICBIAS_2_OFF;
  1257. post_off_event = WCD_EVENT_POST_MICBIAS_2_OFF;
  1258. post_on_event = WCD_EVENT_POST_MICBIAS_2_ON;
  1259. post_dapm_on = WCD_EVENT_POST_DAPM_MICBIAS_2_ON;
  1260. post_dapm_off = WCD_EVENT_POST_DAPM_MICBIAS_2_OFF;
  1261. break;
  1262. case MIC_BIAS_3:
  1263. micb_reg = WCD937X_ANA_MICB3;
  1264. break;
  1265. default:
  1266. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  1267. __func__, micb_num);
  1268. return -EINVAL;
  1269. };
  1270. mutex_lock(&wcd937x->micb_lock);
  1271. switch (req) {
  1272. case MICB_PULLUP_ENABLE:
  1273. wcd937x->pullup_ref[micb_index]++;
  1274. if ((wcd937x->pullup_ref[micb_index] == 1) &&
  1275. (wcd937x->micb_ref[micb_index] == 0))
  1276. snd_soc_component_update_bits(component, micb_reg,
  1277. 0xC0, 0x80);
  1278. break;
  1279. case MICB_PULLUP_DISABLE:
  1280. if (wcd937x->pullup_ref[micb_index] > 0)
  1281. wcd937x->pullup_ref[micb_index]--;
  1282. if ((wcd937x->pullup_ref[micb_index] == 0) &&
  1283. (wcd937x->micb_ref[micb_index] == 0))
  1284. snd_soc_component_update_bits(component, micb_reg,
  1285. 0xC0, 0x00);
  1286. break;
  1287. case MICB_ENABLE:
  1288. wcd937x->micb_ref[micb_index]++;
  1289. mutex_lock(&wcd937x->ana_tx_clk_lock);
  1290. wcd937x->ana_clk_count++;
  1291. mutex_unlock(&wcd937x->ana_tx_clk_lock);
  1292. if (wcd937x->micb_ref[micb_index] == 1) {
  1293. snd_soc_component_update_bits(component,
  1294. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0xE0, 0xE0);
  1295. snd_soc_component_update_bits(component,
  1296. WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x10, 0x10);
  1297. snd_soc_component_update_bits(component,
  1298. WCD937X_MICB1_TEST_CTL_2, 0x01, 0x01);
  1299. snd_soc_component_update_bits(component,
  1300. WCD937X_MICB2_TEST_CTL_2, 0x01, 0x01);
  1301. snd_soc_component_update_bits(component,
  1302. WCD937X_MICB3_TEST_CTL_2, 0x01, 0x01);
  1303. snd_soc_component_update_bits(component,
  1304. micb_reg, 0xC0, 0x40);
  1305. if (post_on_event)
  1306. blocking_notifier_call_chain(
  1307. &wcd937x->mbhc->notifier, post_on_event,
  1308. &wcd937x->mbhc->wcd_mbhc);
  1309. }
  1310. if (is_dapm && post_dapm_on && wcd937x->mbhc)
  1311. blocking_notifier_call_chain(
  1312. &wcd937x->mbhc->notifier, post_dapm_on,
  1313. &wcd937x->mbhc->wcd_mbhc);
  1314. break;
  1315. case MICB_DISABLE:
  1316. mutex_lock(&wcd937x->ana_tx_clk_lock);
  1317. wcd937x->ana_clk_count--;
  1318. mutex_unlock(&wcd937x->ana_tx_clk_lock);
  1319. if (wcd937x->micb_ref[micb_index] > 0)
  1320. wcd937x->micb_ref[micb_index]--;
  1321. if ((wcd937x->micb_ref[micb_index] == 0) &&
  1322. (wcd937x->pullup_ref[micb_index] > 0))
  1323. snd_soc_component_update_bits(component, micb_reg,
  1324. 0xC0, 0x80);
  1325. else if ((wcd937x->micb_ref[micb_index] == 0) &&
  1326. (wcd937x->pullup_ref[micb_index] == 0)) {
  1327. if (pre_off_event && wcd937x->mbhc)
  1328. blocking_notifier_call_chain(
  1329. &wcd937x->mbhc->notifier, pre_off_event,
  1330. &wcd937x->mbhc->wcd_mbhc);
  1331. snd_soc_component_update_bits(component, micb_reg,
  1332. 0xC0, 0x00);
  1333. if (post_off_event && wcd937x->mbhc)
  1334. blocking_notifier_call_chain(
  1335. &wcd937x->mbhc->notifier,
  1336. post_off_event,
  1337. &wcd937x->mbhc->wcd_mbhc);
  1338. }
  1339. mutex_lock(&wcd937x->ana_tx_clk_lock);
  1340. if (wcd937x->ana_clk_count <= 0) {
  1341. snd_soc_component_update_bits(component,
  1342. WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  1343. 0x10, 0x00);
  1344. wcd937x->ana_clk_count = 0;
  1345. }
  1346. mutex_unlock(&wcd937x->ana_tx_clk_lock);
  1347. if (is_dapm && post_dapm_off && wcd937x->mbhc)
  1348. blocking_notifier_call_chain(
  1349. &wcd937x->mbhc->notifier, post_dapm_off,
  1350. &wcd937x->mbhc->wcd_mbhc);
  1351. break;
  1352. };
  1353. dev_dbg(component->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
  1354. __func__, micb_num, wcd937x->micb_ref[micb_index],
  1355. wcd937x->pullup_ref[micb_index]);
  1356. mutex_unlock(&wcd937x->micb_lock);
  1357. return 0;
  1358. }
  1359. EXPORT_SYMBOL(wcd937x_micbias_control);
  1360. static int wcd937x_get_logical_addr(struct swr_device *swr_dev)
  1361. {
  1362. int ret = 0;
  1363. uint8_t devnum = 0;
  1364. ret = swr_get_logical_dev_num(swr_dev, swr_dev->addr, &devnum);
  1365. if (ret) {
  1366. dev_err(&swr_dev->dev,
  1367. "%s get devnum %d for dev addr %lx failed\n",
  1368. __func__, devnum, swr_dev->addr);
  1369. return ret;
  1370. }
  1371. swr_dev->dev_num = devnum;
  1372. return 0;
  1373. }
  1374. static int wcd937x_event_notify(struct notifier_block *block,
  1375. unsigned long val,
  1376. void *data)
  1377. {
  1378. u16 event = (val & 0xffff);
  1379. u16 amic = (val >> 0x10);
  1380. u16 mask = 0x40, reg = 0x0;
  1381. int ret = 0;
  1382. struct wcd937x_priv *wcd937x = dev_get_drvdata((struct device *)data);
  1383. struct snd_soc_component *component = wcd937x->component;
  1384. struct wcd_mbhc *mbhc;
  1385. switch (event) {
  1386. case BOLERO_WCD_EVT_TX_CH_HOLD_CLEAR:
  1387. if (amic == 0x1 || amic == 0x2)
  1388. reg = WCD937X_ANA_TX_CH2;
  1389. else if (amic == 0x3)
  1390. reg = WCD937X_ANA_TX_CH3_HPF;
  1391. else
  1392. return 0;
  1393. if (amic == 0x2)
  1394. mask = 0x20;
  1395. snd_soc_component_update_bits(component, reg, mask, 0x00);
  1396. break;
  1397. case BOLERO_WCD_EVT_PA_OFF_PRE_SSR:
  1398. snd_soc_component_update_bits(component, WCD937X_ANA_HPH,
  1399. 0xC0, 0x00);
  1400. snd_soc_component_update_bits(component, WCD937X_ANA_EAR,
  1401. 0x80, 0x00);
  1402. snd_soc_component_update_bits(component, WCD937X_AUX_AUXPA,
  1403. 0x80, 0x00);
  1404. break;
  1405. case BOLERO_WCD_EVT_SSR_DOWN:
  1406. mbhc = &wcd937x->mbhc->wcd_mbhc;
  1407. wcd937x_mbhc_ssr_down(wcd937x->mbhc, component);
  1408. wcd937x_reset_low(wcd937x->dev);
  1409. break;
  1410. case BOLERO_WCD_EVT_SSR_UP:
  1411. wcd937x_reset(wcd937x->dev);
  1412. wcd937x_get_logical_addr(wcd937x->tx_swr_dev);
  1413. wcd937x_get_logical_addr(wcd937x->rx_swr_dev);
  1414. regcache_mark_dirty(wcd937x->regmap);
  1415. regcache_sync(wcd937x->regmap);
  1416. /* Enable surge protection */
  1417. snd_soc_component_update_bits(component,
  1418. WCD937X_HPH_SURGE_HPHLR_SURGE_EN,
  1419. 0xFF, 0xD9);
  1420. /* Initialize MBHC module */
  1421. mbhc = &wcd937x->mbhc->wcd_mbhc;
  1422. ret = wcd937x_mbhc_post_ssr_init(wcd937x->mbhc, component);
  1423. if (ret) {
  1424. dev_err(component->dev, "%s: mbhc initialization failed\n",
  1425. __func__);
  1426. } else {
  1427. wcd937x_mbhc_hs_detect(component, mbhc->mbhc_cfg);
  1428. }
  1429. break;
  1430. default:
  1431. dev_err(component->dev, "%s: invalid event %d\n", __func__,
  1432. event);
  1433. break;
  1434. }
  1435. return 0;
  1436. }
  1437. static int __wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1438. int event)
  1439. {
  1440. struct snd_soc_component *component =
  1441. snd_soc_dapm_to_component(w->dapm);
  1442. int micb_num;
  1443. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1444. __func__, w->name, event);
  1445. if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1")))
  1446. micb_num = MIC_BIAS_1;
  1447. else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2")))
  1448. micb_num = MIC_BIAS_2;
  1449. else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3")))
  1450. micb_num = MIC_BIAS_3;
  1451. else
  1452. return -EINVAL;
  1453. switch (event) {
  1454. case SND_SOC_DAPM_PRE_PMU:
  1455. wcd937x_micbias_control(component, micb_num,
  1456. MICB_ENABLE, true);
  1457. break;
  1458. case SND_SOC_DAPM_POST_PMU:
  1459. usleep_range(1000, 1100);
  1460. break;
  1461. case SND_SOC_DAPM_POST_PMD:
  1462. wcd937x_micbias_control(component, micb_num,
  1463. MICB_DISABLE, true);
  1464. break;
  1465. };
  1466. return 0;
  1467. }
  1468. static int wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1469. struct snd_kcontrol *kcontrol,
  1470. int event)
  1471. {
  1472. return __wcd937x_codec_enable_micbias(w, event);
  1473. }
  1474. static int wcd937x_rx_hph_mode_get(struct snd_kcontrol *kcontrol,
  1475. struct snd_ctl_elem_value *ucontrol)
  1476. {
  1477. struct snd_soc_component *component =
  1478. snd_soc_kcontrol_component(kcontrol);
  1479. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1480. ucontrol->value.integer.value[0] = wcd937x->hph_mode;
  1481. return 0;
  1482. }
  1483. static int wcd937x_rx_hph_mode_put(struct snd_kcontrol *kcontrol,
  1484. struct snd_ctl_elem_value *ucontrol)
  1485. {
  1486. struct snd_soc_component *component =
  1487. snd_soc_kcontrol_component(kcontrol);
  1488. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1489. u32 mode_val;
  1490. mode_val = ucontrol->value.enumerated.item[0];
  1491. dev_dbg(component->dev, "%s: mode: %d\n", __func__, mode_val);
  1492. if (mode_val == 0) {
  1493. dev_warn(component->dev, "%s:Invalid HPH Mode, default to class_AB\n",
  1494. __func__);
  1495. mode_val = 3; /* enum will be updated later */
  1496. }
  1497. wcd937x->hph_mode = mode_val;
  1498. return 0;
  1499. }
  1500. static int wcd937x_ear_pa_gain_get(struct snd_kcontrol *kcontrol,
  1501. struct snd_ctl_elem_value *ucontrol)
  1502. {
  1503. u8 ear_pa_gain = 0;
  1504. struct snd_soc_component *component =
  1505. snd_soc_kcontrol_component(kcontrol);
  1506. ear_pa_gain = snd_soc_component_read32(component,
  1507. WCD937X_ANA_EAR_COMPANDER_CTL);
  1508. ear_pa_gain = (ear_pa_gain & 0x7C) >> 2;
  1509. ucontrol->value.integer.value[0] = ear_pa_gain;
  1510. dev_dbg(component->dev, "%s: ear_pa_gain = 0x%x\n", __func__,
  1511. ear_pa_gain);
  1512. return 0;
  1513. }
  1514. static int wcd937x_ear_pa_gain_put(struct snd_kcontrol *kcontrol,
  1515. struct snd_ctl_elem_value *ucontrol)
  1516. {
  1517. u8 ear_pa_gain = 0;
  1518. struct snd_soc_component *component =
  1519. snd_soc_kcontrol_component(kcontrol);
  1520. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1521. dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  1522. __func__, ucontrol->value.integer.value[0]);
  1523. ear_pa_gain = ucontrol->value.integer.value[0] << 2;
  1524. if (!wcd937x->comp1_enable) {
  1525. snd_soc_component_update_bits(component,
  1526. WCD937X_ANA_EAR_COMPANDER_CTL,
  1527. 0x7C, ear_pa_gain);
  1528. }
  1529. return 0;
  1530. }
  1531. static int wcd937x_get_compander(struct snd_kcontrol *kcontrol,
  1532. struct snd_ctl_elem_value *ucontrol)
  1533. {
  1534. struct snd_soc_component *component =
  1535. snd_soc_kcontrol_component(kcontrol);
  1536. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1537. bool hphr;
  1538. struct soc_multi_mixer_control *mc;
  1539. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1540. hphr = mc->shift;
  1541. ucontrol->value.integer.value[0] = hphr ? wcd937x->comp2_enable :
  1542. wcd937x->comp1_enable;
  1543. return 0;
  1544. }
  1545. static int wcd937x_set_compander(struct snd_kcontrol *kcontrol,
  1546. struct snd_ctl_elem_value *ucontrol)
  1547. {
  1548. struct snd_soc_component *component =
  1549. snd_soc_kcontrol_component(kcontrol);
  1550. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1551. int value = ucontrol->value.integer.value[0];
  1552. bool hphr;
  1553. struct soc_multi_mixer_control *mc;
  1554. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1555. hphr = mc->shift;
  1556. if (hphr)
  1557. wcd937x->comp2_enable = value;
  1558. else
  1559. wcd937x->comp1_enable = value;
  1560. return 0;
  1561. }
  1562. static int wcd937x_codec_enable_vdd_buck(struct snd_soc_dapm_widget *w,
  1563. struct snd_kcontrol *kcontrol,
  1564. int event)
  1565. {
  1566. struct snd_soc_component *component =
  1567. snd_soc_dapm_to_component(w->dapm);
  1568. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1569. struct wcd937x_pdata *pdata = NULL;
  1570. int ret = 0;
  1571. pdata = dev_get_platdata(wcd937x->dev);
  1572. if (!pdata) {
  1573. dev_err(component->dev, "%s: pdata is NULL\n", __func__);
  1574. return -EINVAL;
  1575. }
  1576. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1577. w->name, event);
  1578. switch (event) {
  1579. case SND_SOC_DAPM_PRE_PMU:
  1580. if (test_bit(ALLOW_BUCK_DISABLE, &wcd937x->status_mask)) {
  1581. dev_dbg(component->dev,
  1582. "%s: buck already in enabled state\n",
  1583. __func__);
  1584. clear_bit(ALLOW_BUCK_DISABLE, &wcd937x->status_mask);
  1585. return 0;
  1586. }
  1587. ret = msm_cdc_enable_ondemand_supply(wcd937x->dev,
  1588. wcd937x->supplies,
  1589. pdata->regulator,
  1590. pdata->num_supplies,
  1591. "cdc-vdd-buck");
  1592. if (ret == -EINVAL) {
  1593. dev_err(component->dev, "%s: vdd buck is not enabled\n",
  1594. __func__);
  1595. return ret;
  1596. }
  1597. clear_bit(ALLOW_BUCK_DISABLE, &wcd937x->status_mask);
  1598. /*
  1599. * 200us sleep is required after LDO15 is enabled as per
  1600. * HW requirement
  1601. */
  1602. usleep_range(200, 250);
  1603. break;
  1604. case SND_SOC_DAPM_POST_PMD:
  1605. set_bit(ALLOW_BUCK_DISABLE, &wcd937x->status_mask);
  1606. break;
  1607. }
  1608. return 0;
  1609. }
  1610. static const char * const rx_hph_mode_mux_text[] = {
  1611. "CLS_H_INVALID", "CLS_H_HIFI", "CLS_H_LP", "CLS_AB", "CLS_H_LOHIFI",
  1612. "CLS_H_ULP", "CLS_AB_HIFI",
  1613. };
  1614. static const char * const wcd937x_ear_pa_gain_text[] = {
  1615. "G_6_DB", "G_4P5_DB", "G_3_DB", "G_1P5_DB", "G_0_DB",
  1616. "G_M1P5_DB", "G_M3_DB", "G_M4P5_DB",
  1617. "G_M6_DB", "G_7P5_DB", "G_M9_DB",
  1618. "G_M10P5_DB", "G_M12_DB", "G_M13P5_DB",
  1619. "G_M15_DB", "G_M16P5_DB", "G_M18_DB",
  1620. };
  1621. static const struct soc_enum rx_hph_mode_mux_enum =
  1622. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(rx_hph_mode_mux_text),
  1623. rx_hph_mode_mux_text);
  1624. static SOC_ENUM_SINGLE_EXT_DECL(wcd937x_ear_pa_gain_enum,
  1625. wcd937x_ear_pa_gain_text);
  1626. static const struct snd_kcontrol_new wcd937x_snd_controls[] = {
  1627. SOC_ENUM_EXT("EAR PA GAIN", wcd937x_ear_pa_gain_enum,
  1628. wcd937x_ear_pa_gain_get, wcd937x_ear_pa_gain_put),
  1629. SOC_ENUM_EXT("RX HPH Mode", rx_hph_mode_mux_enum,
  1630. wcd937x_rx_hph_mode_get, wcd937x_rx_hph_mode_put),
  1631. SOC_SINGLE_EXT("HPHL_COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  1632. wcd937x_get_compander, wcd937x_set_compander),
  1633. SOC_SINGLE_EXT("HPHR_COMP Switch", SND_SOC_NOPM, 1, 1, 0,
  1634. wcd937x_get_compander, wcd937x_set_compander),
  1635. SOC_SINGLE_TLV("HPHL Volume", WCD937X_HPH_L_EN, 0, 20, 1, line_gain),
  1636. SOC_SINGLE_TLV("HPHR Volume", WCD937X_HPH_R_EN, 0, 20, 1, line_gain),
  1637. SOC_SINGLE_TLV("ADC1 Volume", WCD937X_ANA_TX_CH1, 0, 20, 0,
  1638. analog_gain),
  1639. SOC_SINGLE_TLV("ADC2 Volume", WCD937X_ANA_TX_CH2, 0, 20, 0,
  1640. analog_gain),
  1641. SOC_SINGLE_TLV("ADC3 Volume", WCD937X_ANA_TX_CH3, 0, 20, 0,
  1642. analog_gain),
  1643. };
  1644. static const struct snd_kcontrol_new adc1_switch[] = {
  1645. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1646. };
  1647. static const struct snd_kcontrol_new adc2_switch[] = {
  1648. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1649. };
  1650. static const struct snd_kcontrol_new adc3_switch[] = {
  1651. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1652. };
  1653. static const struct snd_kcontrol_new dmic1_switch[] = {
  1654. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1655. };
  1656. static const struct snd_kcontrol_new dmic2_switch[] = {
  1657. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1658. };
  1659. static const struct snd_kcontrol_new dmic3_switch[] = {
  1660. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1661. };
  1662. static const struct snd_kcontrol_new dmic4_switch[] = {
  1663. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1664. };
  1665. static const struct snd_kcontrol_new dmic5_switch[] = {
  1666. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1667. };
  1668. static const struct snd_kcontrol_new dmic6_switch[] = {
  1669. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1670. };
  1671. static const struct snd_kcontrol_new ear_rdac_switch[] = {
  1672. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1673. };
  1674. static const struct snd_kcontrol_new aux_rdac_switch[] = {
  1675. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1676. };
  1677. static const struct snd_kcontrol_new hphl_rdac_switch[] = {
  1678. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1679. };
  1680. static const struct snd_kcontrol_new hphr_rdac_switch[] = {
  1681. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1682. };
  1683. static const char * const adc2_mux_text[] = {
  1684. "INP2", "INP3"
  1685. };
  1686. static const char * const rdac3_mux_text[] = {
  1687. "RX1", "RX3"
  1688. };
  1689. static const struct soc_enum adc2_enum =
  1690. SOC_ENUM_SINGLE(WCD937X_TX_NEW_TX_CH2_SEL, 7,
  1691. ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
  1692. static const struct soc_enum rdac3_enum =
  1693. SOC_ENUM_SINGLE(WCD937X_DIGITAL_CDC_EAR_PATH_CTL, 0,
  1694. ARRAY_SIZE(rdac3_mux_text), rdac3_mux_text);
  1695. static const struct snd_kcontrol_new tx_adc2_mux =
  1696. SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
  1697. static const struct snd_kcontrol_new rx_rdac3_mux =
  1698. SOC_DAPM_ENUM("RDAC3_MUX Mux", rdac3_enum);
  1699. static const struct snd_soc_dapm_widget wcd937x_dapm_widgets[] = {
  1700. /*input widgets*/
  1701. SND_SOC_DAPM_INPUT("AMIC1"),
  1702. SND_SOC_DAPM_INPUT("AMIC2"),
  1703. SND_SOC_DAPM_INPUT("AMIC3"),
  1704. SND_SOC_DAPM_INPUT("IN1_HPHL"),
  1705. SND_SOC_DAPM_INPUT("IN2_HPHR"),
  1706. SND_SOC_DAPM_INPUT("IN3_AUX"),
  1707. /*tx widgets*/
  1708. SND_SOC_DAPM_ADC_E("ADC1", NULL, SND_SOC_NOPM, 0, 0,
  1709. wcd937x_codec_enable_adc,
  1710. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1711. SND_SOC_DAPM_ADC_E("ADC2", NULL, SND_SOC_NOPM, 1, 0,
  1712. wcd937x_codec_enable_adc,
  1713. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1714. SND_SOC_DAPM_MIXER_E("ADC1 REQ", SND_SOC_NOPM, 0, 0,
  1715. NULL, 0, wcd937x_enable_req,
  1716. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1717. SND_SOC_DAPM_MIXER_E("ADC2 REQ", SND_SOC_NOPM, 0, 0,
  1718. NULL, 0, wcd937x_enable_req,
  1719. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1720. SND_SOC_DAPM_MUX("ADC2 MUX", SND_SOC_NOPM, 0, 0,
  1721. &tx_adc2_mux),
  1722. /*tx mixers*/
  1723. SND_SOC_DAPM_MIXER_E("ADC1_MIXER", SND_SOC_NOPM, 0, 0,
  1724. adc1_switch, ARRAY_SIZE(adc1_switch),
  1725. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1726. SND_SOC_DAPM_POST_PMD),
  1727. SND_SOC_DAPM_MIXER_E("ADC2_MIXER", SND_SOC_NOPM, 0, 0,
  1728. adc2_switch, ARRAY_SIZE(adc2_switch),
  1729. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1730. SND_SOC_DAPM_POST_PMD),
  1731. /* micbias widgets*/
  1732. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1733. wcd937x_codec_enable_micbias,
  1734. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1735. SND_SOC_DAPM_POST_PMD),
  1736. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1737. wcd937x_codec_enable_micbias,
  1738. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1739. SND_SOC_DAPM_POST_PMD),
  1740. SND_SOC_DAPM_MICBIAS_E("MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1741. wcd937x_codec_enable_micbias,
  1742. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1743. SND_SOC_DAPM_POST_PMD),
  1744. SND_SOC_DAPM_SUPPLY("VDD_BUCK", SND_SOC_NOPM, 0, 0,
  1745. wcd937x_codec_enable_vdd_buck,
  1746. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1747. SND_SOC_DAPM_SUPPLY_S("CLS_H_PORT", 1, SND_SOC_NOPM, 0, 0,
  1748. wcd937x_enable_clsh,
  1749. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1750. /*rx widgets*/
  1751. SND_SOC_DAPM_PGA_E("EAR PGA", WCD937X_ANA_EAR, 7, 0, NULL, 0,
  1752. wcd937x_codec_enable_ear_pa,
  1753. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1754. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1755. SND_SOC_DAPM_PGA_E("AUX PGA", WCD937X_AUX_AUXPA, 7, 0, NULL, 0,
  1756. wcd937x_codec_enable_aux_pa,
  1757. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1758. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1759. SND_SOC_DAPM_PGA_E("HPHL PGA", WCD937X_ANA_HPH, 7, 0, NULL, 0,
  1760. wcd937x_codec_enable_hphl_pa,
  1761. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1762. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1763. SND_SOC_DAPM_PGA_E("HPHR PGA", WCD937X_ANA_HPH, 6, 0, NULL, 0,
  1764. wcd937x_codec_enable_hphr_pa,
  1765. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1766. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1767. SND_SOC_DAPM_DAC_E("RDAC1", NULL, SND_SOC_NOPM, 0, 0,
  1768. wcd937x_codec_hphl_dac_event,
  1769. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1770. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1771. SND_SOC_DAPM_DAC_E("RDAC2", NULL, SND_SOC_NOPM, 0, 0,
  1772. wcd937x_codec_hphr_dac_event,
  1773. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1774. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1775. SND_SOC_DAPM_DAC_E("RDAC3", NULL, SND_SOC_NOPM, 0, 0,
  1776. wcd937x_codec_ear_dac_event,
  1777. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1778. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1779. SND_SOC_DAPM_DAC_E("RDAC4", NULL, SND_SOC_NOPM, 0, 0,
  1780. wcd937x_codec_aux_dac_event,
  1781. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1782. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1783. SND_SOC_DAPM_MUX("RDAC3_MUX", SND_SOC_NOPM, 0, 0, &rx_rdac3_mux),
  1784. SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
  1785. wcd937x_enable_rx1, SND_SOC_DAPM_PRE_PMU |
  1786. SND_SOC_DAPM_POST_PMD),
  1787. SND_SOC_DAPM_MIXER_E("RX2", SND_SOC_NOPM, 0, 0, NULL, 0,
  1788. wcd937x_enable_rx2, SND_SOC_DAPM_PRE_PMU |
  1789. SND_SOC_DAPM_POST_PMD),
  1790. SND_SOC_DAPM_MIXER_E("RX3", SND_SOC_NOPM, 0, 0, NULL, 0,
  1791. wcd937x_enable_rx3, SND_SOC_DAPM_PRE_PMU |
  1792. SND_SOC_DAPM_POST_PMD),
  1793. /* rx mixer widgets*/
  1794. SND_SOC_DAPM_MIXER("EAR_RDAC", SND_SOC_NOPM, 0, 0,
  1795. ear_rdac_switch, ARRAY_SIZE(ear_rdac_switch)),
  1796. SND_SOC_DAPM_MIXER("AUX_RDAC", SND_SOC_NOPM, 0, 0,
  1797. aux_rdac_switch, ARRAY_SIZE(aux_rdac_switch)),
  1798. SND_SOC_DAPM_MIXER("HPHL_RDAC", SND_SOC_NOPM, 0, 0,
  1799. hphl_rdac_switch, ARRAY_SIZE(hphl_rdac_switch)),
  1800. SND_SOC_DAPM_MIXER("HPHR_RDAC", SND_SOC_NOPM, 0, 0,
  1801. hphr_rdac_switch, ARRAY_SIZE(hphr_rdac_switch)),
  1802. /*output widgets tx*/
  1803. SND_SOC_DAPM_OUTPUT("ADC1_OUTPUT"),
  1804. SND_SOC_DAPM_OUTPUT("ADC2_OUTPUT"),
  1805. /*output widgets rx*/
  1806. SND_SOC_DAPM_OUTPUT("EAR"),
  1807. SND_SOC_DAPM_OUTPUT("AUX"),
  1808. SND_SOC_DAPM_OUTPUT("HPHL"),
  1809. SND_SOC_DAPM_OUTPUT("HPHR"),
  1810. };
  1811. static const struct snd_soc_dapm_widget wcd9375_dapm_widgets[] = {
  1812. /*input widgets*/
  1813. SND_SOC_DAPM_INPUT("AMIC4"),
  1814. /*tx widgets*/
  1815. SND_SOC_DAPM_ADC_E("ADC3", NULL, SND_SOC_NOPM, 2, 0,
  1816. wcd937x_codec_enable_adc,
  1817. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1818. SND_SOC_DAPM_MIXER_E("ADC3 REQ", SND_SOC_NOPM, 0, 0,
  1819. NULL, 0, wcd937x_enable_req,
  1820. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1821. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  1822. wcd937x_codec_enable_dmic,
  1823. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1824. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 1, 0,
  1825. wcd937x_codec_enable_dmic,
  1826. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1827. SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 2, 0,
  1828. wcd937x_codec_enable_dmic,
  1829. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1830. SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 3, 0,
  1831. wcd937x_codec_enable_dmic,
  1832. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1833. SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 4, 0,
  1834. wcd937x_codec_enable_dmic,
  1835. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1836. SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 5, 0,
  1837. wcd937x_codec_enable_dmic,
  1838. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1839. /*tx mixer widgets*/
  1840. SND_SOC_DAPM_MIXER_E("DMIC1_MIXER", SND_SOC_NOPM, 0,
  1841. 0, dmic1_switch, ARRAY_SIZE(dmic1_switch),
  1842. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1843. SND_SOC_DAPM_POST_PMD),
  1844. SND_SOC_DAPM_MIXER_E("DMIC2_MIXER", SND_SOC_NOPM, 0,
  1845. 0, dmic2_switch, ARRAY_SIZE(dmic2_switch),
  1846. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1847. SND_SOC_DAPM_POST_PMD),
  1848. SND_SOC_DAPM_MIXER_E("DMIC3_MIXER", SND_SOC_NOPM, 0,
  1849. 0, dmic3_switch, ARRAY_SIZE(dmic3_switch),
  1850. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1851. SND_SOC_DAPM_POST_PMD),
  1852. SND_SOC_DAPM_MIXER_E("DMIC4_MIXER", SND_SOC_NOPM, 0,
  1853. 0, dmic4_switch, ARRAY_SIZE(dmic4_switch),
  1854. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1855. SND_SOC_DAPM_POST_PMD),
  1856. SND_SOC_DAPM_MIXER_E("DMIC5_MIXER", SND_SOC_NOPM, 0,
  1857. 0, dmic5_switch, ARRAY_SIZE(dmic5_switch),
  1858. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1859. SND_SOC_DAPM_POST_PMD),
  1860. SND_SOC_DAPM_MIXER_E("DMIC6_MIXER", SND_SOC_NOPM, 0,
  1861. 0, dmic6_switch, ARRAY_SIZE(dmic6_switch),
  1862. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1863. SND_SOC_DAPM_POST_PMD),
  1864. SND_SOC_DAPM_MIXER_E("ADC3_MIXER", SND_SOC_NOPM, 0, 0, adc3_switch,
  1865. ARRAY_SIZE(adc3_switch), wcd937x_tx_swr_ctrl,
  1866. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1867. /*output widgets*/
  1868. SND_SOC_DAPM_OUTPUT("DMIC1_OUTPUT"),
  1869. SND_SOC_DAPM_OUTPUT("DMIC2_OUTPUT"),
  1870. SND_SOC_DAPM_OUTPUT("DMIC3_OUTPUT"),
  1871. SND_SOC_DAPM_OUTPUT("DMIC4_OUTPUT"),
  1872. SND_SOC_DAPM_OUTPUT("DMIC5_OUTPUT"),
  1873. SND_SOC_DAPM_OUTPUT("DMIC6_OUTPUT"),
  1874. SND_SOC_DAPM_OUTPUT("ADC3_OUTPUT"),
  1875. };
  1876. static const struct snd_soc_dapm_route wcd937x_audio_map[] = {
  1877. {"ADC1_OUTPUT", NULL, "ADC1_MIXER"},
  1878. {"ADC1_MIXER", "Switch", "ADC1 REQ"},
  1879. {"ADC1 REQ", NULL, "ADC1"},
  1880. {"ADC1", NULL, "AMIC1"},
  1881. {"ADC2_OUTPUT", NULL, "ADC2_MIXER"},
  1882. {"ADC2_MIXER", "Switch", "ADC2 REQ"},
  1883. {"ADC2 REQ", NULL, "ADC2"},
  1884. {"ADC2", NULL, "ADC2 MUX"},
  1885. {"ADC2 MUX", "INP3", "AMIC3"},
  1886. {"ADC2 MUX", "INP2", "AMIC2"},
  1887. {"IN1_HPHL", NULL, "VDD_BUCK"},
  1888. {"IN1_HPHL", NULL, "CLS_H_PORT"},
  1889. {"RX1", NULL, "IN1_HPHL"},
  1890. {"RDAC1", NULL, "RX1"},
  1891. {"HPHL_RDAC", "Switch", "RDAC1"},
  1892. {"HPHL PGA", NULL, "HPHL_RDAC"},
  1893. {"HPHL", NULL, "HPHL PGA"},
  1894. {"IN2_HPHR", NULL, "VDD_BUCK"},
  1895. {"IN2_HPHR", NULL, "CLS_H_PORT"},
  1896. {"RX2", NULL, "IN2_HPHR"},
  1897. {"RDAC2", NULL, "RX2"},
  1898. {"HPHR_RDAC", "Switch", "RDAC2"},
  1899. {"HPHR PGA", NULL, "HPHR_RDAC"},
  1900. {"HPHR", NULL, "HPHR PGA"},
  1901. {"IN3_AUX", NULL, "VDD_BUCK"},
  1902. {"IN3_AUX", NULL, "CLS_H_PORT"},
  1903. {"RX3", NULL, "IN3_AUX"},
  1904. {"RDAC4", NULL, "RX3"},
  1905. {"AUX_RDAC", "Switch", "RDAC4"},
  1906. {"AUX PGA", NULL, "AUX_RDAC"},
  1907. {"AUX", NULL, "AUX PGA"},
  1908. {"RDAC3_MUX", "RX3", "RX3"},
  1909. {"RDAC3_MUX", "RX1", "RX1"},
  1910. {"RDAC3", NULL, "RDAC3_MUX"},
  1911. {"EAR_RDAC", "Switch", "RDAC3"},
  1912. {"EAR PGA", NULL, "EAR_RDAC"},
  1913. {"EAR", NULL, "EAR PGA"},
  1914. };
  1915. static const struct snd_soc_dapm_route wcd9375_audio_map[] = {
  1916. {"ADC3_OUTPUT", NULL, "ADC3_MIXER"},
  1917. {"ADC3_MIXER", "Switch", "ADC3 REQ"},
  1918. {"ADC3 REQ", NULL, "ADC3"},
  1919. {"ADC3", NULL, "AMIC4"},
  1920. {"DMIC1_OUTPUT", NULL, "DMIC1_MIXER"},
  1921. {"DMIC1_MIXER", "Switch", "DMIC1"},
  1922. {"DMIC2_OUTPUT", NULL, "DMIC2_MIXER"},
  1923. {"DMIC2_MIXER", "Switch", "DMIC2"},
  1924. {"DMIC3_OUTPUT", NULL, "DMIC3_MIXER"},
  1925. {"DMIC3_MIXER", "Switch", "DMIC3"},
  1926. {"DMIC4_OUTPUT", NULL, "DMIC4_MIXER"},
  1927. {"DMIC4_MIXER", "Switch", "DMIC4"},
  1928. {"DMIC5_OUTPUT", NULL, "DMIC5_MIXER"},
  1929. {"DMIC5_MIXER", "Switch", "DMIC5"},
  1930. {"DMIC6_OUTPUT", NULL, "DMIC6_MIXER"},
  1931. {"DMIC6_MIXER", "Switch", "DMIC6"},
  1932. };
  1933. static ssize_t wcd937x_version_read(struct snd_info_entry *entry,
  1934. void *file_private_data,
  1935. struct file *file,
  1936. char __user *buf, size_t count,
  1937. loff_t pos)
  1938. {
  1939. struct wcd937x_priv *priv;
  1940. char buffer[WCD937X_VERSION_ENTRY_SIZE];
  1941. int len = 0;
  1942. priv = (struct wcd937x_priv *) entry->private_data;
  1943. if (!priv) {
  1944. pr_err("%s: wcd937x priv is null\n", __func__);
  1945. return -EINVAL;
  1946. }
  1947. switch (priv->version) {
  1948. case WCD937X_VERSION_1_0:
  1949. len = snprintf(buffer, sizeof(buffer), "WCD937X_1_0\n");
  1950. break;
  1951. default:
  1952. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  1953. }
  1954. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  1955. }
  1956. static struct snd_info_entry_ops wcd937x_info_ops = {
  1957. .read = wcd937x_version_read,
  1958. };
  1959. static ssize_t wcd937x_variant_read(struct snd_info_entry *entry,
  1960. void *file_private_data,
  1961. struct file *file,
  1962. char __user *buf, size_t count,
  1963. loff_t pos)
  1964. {
  1965. struct wcd937x_priv *priv;
  1966. char buffer[WCD937X_VARIANT_ENTRY_SIZE];
  1967. int len = 0;
  1968. priv = (struct wcd937x_priv *) entry->private_data;
  1969. if (!priv) {
  1970. pr_err("%s: wcd937x priv is null\n", __func__);
  1971. return -EINVAL;
  1972. }
  1973. switch (priv->variant) {
  1974. case WCD9370_VARIANT:
  1975. len = snprintf(buffer, sizeof(buffer), "WCD9370\n");
  1976. break;
  1977. case WCD9375_VARIANT:
  1978. len = snprintf(buffer, sizeof(buffer), "WCD9375\n");
  1979. break;
  1980. default:
  1981. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  1982. }
  1983. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  1984. }
  1985. static struct snd_info_entry_ops wcd937x_variant_ops = {
  1986. .read = wcd937x_variant_read,
  1987. };
  1988. /*
  1989. * wcd937x_info_create_codec_entry - creates wcd937x module
  1990. * @codec_root: The parent directory
  1991. * @component: component instance
  1992. *
  1993. * Creates wcd937x module, variant and version entry under the given
  1994. * parent directory.
  1995. *
  1996. * Return: 0 on success or negative error code on failure.
  1997. */
  1998. int wcd937x_info_create_codec_entry(struct snd_info_entry *codec_root,
  1999. struct snd_soc_component *component)
  2000. {
  2001. struct snd_info_entry *version_entry;
  2002. struct snd_info_entry *variant_entry;
  2003. struct wcd937x_priv *priv;
  2004. struct snd_soc_card *card;
  2005. if (!codec_root || !component)
  2006. return -EINVAL;
  2007. priv = snd_soc_component_get_drvdata(component);
  2008. if (priv->entry) {
  2009. dev_dbg(priv->dev,
  2010. "%s:wcd937x module already created\n", __func__);
  2011. return 0;
  2012. }
  2013. card = component->card;
  2014. priv->entry = snd_info_create_subdir(codec_root->module,
  2015. "wcd937x", codec_root);
  2016. if (!priv->entry) {
  2017. dev_dbg(component->dev, "%s: failed to create wcd937x entry\n",
  2018. __func__);
  2019. return -ENOMEM;
  2020. }
  2021. version_entry = snd_info_create_card_entry(card->snd_card,
  2022. "version",
  2023. priv->entry);
  2024. if (!version_entry) {
  2025. dev_dbg(component->dev, "%s: failed to create wcd937x version entry\n",
  2026. __func__);
  2027. return -ENOMEM;
  2028. }
  2029. version_entry->private_data = priv;
  2030. version_entry->size = WCD937X_VERSION_ENTRY_SIZE;
  2031. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  2032. version_entry->c.ops = &wcd937x_info_ops;
  2033. if (snd_info_register(version_entry) < 0) {
  2034. snd_info_free_entry(version_entry);
  2035. return -ENOMEM;
  2036. }
  2037. priv->version_entry = version_entry;
  2038. variant_entry = snd_info_create_card_entry(card->snd_card,
  2039. "variant",
  2040. priv->entry);
  2041. if (!variant_entry) {
  2042. dev_dbg(codec->dev, "%s: failed to create wcd937x variant entry\n",
  2043. __func__);
  2044. return -ENOMEM;
  2045. }
  2046. variant_entry->private_data = priv;
  2047. variant_entry->size = WCD937X_VARIANT_ENTRY_SIZE;
  2048. variant_entry->content = SNDRV_INFO_CONTENT_DATA;
  2049. variant_entry->c.ops = &wcd937x_variant_ops;
  2050. if (snd_info_register(variant_entry) < 0) {
  2051. snd_info_free_entry(variant_entry);
  2052. return -ENOMEM;
  2053. }
  2054. priv->variant_entry = variant_entry;
  2055. return 0;
  2056. }
  2057. EXPORT_SYMBOL(wcd937x_info_create_codec_entry);
  2058. static int wcd937x_set_micbias_data(struct wcd937x_priv *wcd937x,
  2059. struct wcd937x_pdata *pdata)
  2060. {
  2061. int vout_ctl_1 = 0, vout_ctl_2 = 0, vout_ctl_3 = 0;
  2062. int rc = 0;
  2063. if (!pdata) {
  2064. dev_err(wcd937x->dev, "%s: NULL pdata\n", __func__);
  2065. return -ENODEV;
  2066. }
  2067. /* set micbias voltage */
  2068. vout_ctl_1 = wcd937x_get_micb_vout_ctl_val(pdata->micbias.micb1_mv);
  2069. vout_ctl_2 = wcd937x_get_micb_vout_ctl_val(pdata->micbias.micb2_mv);
  2070. vout_ctl_3 = wcd937x_get_micb_vout_ctl_val(pdata->micbias.micb3_mv);
  2071. if (vout_ctl_1 < 0 || vout_ctl_2 < 0 || vout_ctl_3 < 0) {
  2072. rc = -EINVAL;
  2073. goto done;
  2074. }
  2075. regmap_update_bits(wcd937x->regmap, WCD937X_ANA_MICB1, 0x3F,
  2076. vout_ctl_1);
  2077. regmap_update_bits(wcd937x->regmap, WCD937X_ANA_MICB2, 0x3F,
  2078. vout_ctl_2);
  2079. regmap_update_bits(wcd937x->regmap, WCD937X_ANA_MICB3, 0x3F,
  2080. vout_ctl_3);
  2081. done:
  2082. return rc;
  2083. }
  2084. static int wcd937x_soc_codec_probe(struct snd_soc_component *component)
  2085. {
  2086. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  2087. struct snd_soc_dapm_context *dapm =
  2088. snd_soc_component_get_dapm(component);
  2089. int variant;
  2090. int ret = -EINVAL;
  2091. dev_info(component->dev, "%s()\n", __func__);
  2092. wcd937x = snd_soc_component_get_drvdata(component);
  2093. if (!wcd937x)
  2094. return -EINVAL;
  2095. wcd937x->component = component;
  2096. variant = (snd_soc_component_read32(
  2097. component, WCD937X_DIGITAL_EFUSE_REG_0) & 0x1E) >> 1;
  2098. wcd937x->variant = variant;
  2099. wcd937x->fw_data = devm_kzalloc(component->dev,
  2100. sizeof(*(wcd937x->fw_data)),
  2101. GFP_KERNEL);
  2102. if (!wcd937x->fw_data) {
  2103. dev_err(component->dev, "Failed to allocate fw_data\n");
  2104. ret = -ENOMEM;
  2105. goto err;
  2106. }
  2107. set_bit(WCD9XXX_MBHC_CAL, wcd937x->fw_data->cal_bit);
  2108. ret = wcd_cal_create_hwdep(wcd937x->fw_data,
  2109. WCD9XXX_CODEC_HWDEP_NODE, component);
  2110. if (ret < 0) {
  2111. dev_err(component->dev, "%s hwdep failed %d\n", __func__, ret);
  2112. goto err_hwdep;
  2113. }
  2114. ret = wcd937x_mbhc_init(&wcd937x->mbhc, component, wcd937x->fw_data);
  2115. if (ret) {
  2116. pr_err("%s: mbhc initialization failed\n", __func__);
  2117. goto err_hwdep;
  2118. }
  2119. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  2120. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  2121. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  2122. snd_soc_dapm_ignore_suspend(dapm, "IN1_HPHL");
  2123. snd_soc_dapm_ignore_suspend(dapm, "IN2_HPHR");
  2124. snd_soc_dapm_ignore_suspend(dapm, "IN3_AUX");
  2125. snd_soc_dapm_ignore_suspend(dapm, "ADC1_OUTPUT");
  2126. snd_soc_dapm_ignore_suspend(dapm, "ADC2_OUTPUT");
  2127. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  2128. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  2129. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  2130. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  2131. snd_soc_dapm_sync(dapm);
  2132. wcd_cls_h_init(&wcd937x->clsh_info);
  2133. wcd937x_init_reg(component);
  2134. if (wcd937x->variant == WCD9375_VARIANT) {
  2135. ret = snd_soc_dapm_new_controls(dapm, wcd9375_dapm_widgets,
  2136. ARRAY_SIZE(wcd9375_dapm_widgets));
  2137. if (ret < 0) {
  2138. dev_err(component->dev, "%s: Failed to add snd_ctls\n",
  2139. __func__);
  2140. goto err_hwdep;
  2141. }
  2142. ret = snd_soc_dapm_add_routes(dapm, wcd9375_audio_map,
  2143. ARRAY_SIZE(wcd9375_audio_map));
  2144. if (ret < 0) {
  2145. dev_err(component->dev, "%s: Failed to add routes\n",
  2146. __func__);
  2147. goto err_hwdep;
  2148. }
  2149. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  2150. snd_soc_dapm_ignore_suspend(dapm, "DMIC1_OUTPUT");
  2151. snd_soc_dapm_ignore_suspend(dapm, "DMIC2_OUTPUT");
  2152. snd_soc_dapm_ignore_suspend(dapm, "DMIC3_OUTPUT");
  2153. snd_soc_dapm_ignore_suspend(dapm, "DMIC4_OUTPUT");
  2154. snd_soc_dapm_ignore_suspend(dapm, "DMIC5_OUTPUT");
  2155. snd_soc_dapm_ignore_suspend(dapm, "DMIC6_OUTPUT");
  2156. snd_soc_dapm_ignore_suspend(dapm, "ADC3_OUTPUT");
  2157. snd_soc_dapm_sync(dapm);
  2158. }
  2159. wcd937x->version = WCD937X_VERSION_1_0;
  2160. /* Register event notifier */
  2161. wcd937x->nblock.notifier_call = wcd937x_event_notify;
  2162. if (wcd937x->register_notifier) {
  2163. ret = wcd937x->register_notifier(wcd937x->handle,
  2164. &wcd937x->nblock,
  2165. true);
  2166. if (ret) {
  2167. dev_err(component->dev,
  2168. "%s: Failed to register notifier %d\n",
  2169. __func__, ret);
  2170. return ret;
  2171. }
  2172. }
  2173. return ret;
  2174. err_hwdep:
  2175. wcd937x->fw_data = NULL;
  2176. err:
  2177. return ret;
  2178. }
  2179. static void wcd937x_soc_codec_remove(struct snd_soc_component *component)
  2180. {
  2181. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  2182. if (!wcd937x)
  2183. return;
  2184. if (wcd937x->register_notifier)
  2185. wcd937x->register_notifier(wcd937x->handle,
  2186. &wcd937x->nblock,
  2187. false);
  2188. return;
  2189. }
  2190. static const struct snd_soc_component_driver soc_codec_dev_wcd937x = {
  2191. .name = DRV_NAME,
  2192. .probe = wcd937x_soc_codec_probe,
  2193. .remove = wcd937x_soc_codec_remove,
  2194. .controls = wcd937x_snd_controls,
  2195. .num_controls = ARRAY_SIZE(wcd937x_snd_controls),
  2196. .dapm_widgets = wcd937x_dapm_widgets,
  2197. .num_dapm_widgets = ARRAY_SIZE(wcd937x_dapm_widgets),
  2198. .dapm_routes = wcd937x_audio_map,
  2199. .num_dapm_routes = ARRAY_SIZE(wcd937x_audio_map),
  2200. };
  2201. #ifdef CONFIG_PM_SLEEP
  2202. static int wcd937x_suspend(struct device *dev)
  2203. {
  2204. struct wcd937x_priv *wcd937x = NULL;
  2205. int ret = 0;
  2206. struct wcd937x_pdata *pdata = NULL;
  2207. if (!dev)
  2208. return -ENODEV;
  2209. wcd937x = dev_get_drvdata(dev);
  2210. if (!wcd937x)
  2211. return -EINVAL;
  2212. pdata = dev_get_platdata(wcd937x->dev);
  2213. if (!pdata) {
  2214. dev_err(dev, "%s: pdata is NULL\n", __func__);
  2215. return -EINVAL;
  2216. }
  2217. if (test_bit(ALLOW_BUCK_DISABLE, &wcd937x->status_mask)) {
  2218. ret = msm_cdc_disable_ondemand_supply(wcd937x->dev,
  2219. wcd937x->supplies,
  2220. pdata->regulator,
  2221. pdata->num_supplies,
  2222. "cdc-vdd-buck");
  2223. if (ret == -EINVAL) {
  2224. dev_err(dev, "%s: vdd buck is not disabled\n",
  2225. __func__);
  2226. return 0;
  2227. }
  2228. clear_bit(ALLOW_BUCK_DISABLE, &wcd937x->status_mask);
  2229. }
  2230. return 0;
  2231. }
  2232. static int wcd937x_resume(struct device *dev)
  2233. {
  2234. return 0;
  2235. }
  2236. #endif
  2237. static int wcd937x_reset(struct device *dev)
  2238. {
  2239. struct wcd937x_priv *wcd937x = NULL;
  2240. int rc = 0;
  2241. int value = 0;
  2242. if (!dev)
  2243. return -ENODEV;
  2244. wcd937x = dev_get_drvdata(dev);
  2245. if (!wcd937x)
  2246. return -EINVAL;
  2247. if (!wcd937x->rst_np) {
  2248. dev_err(dev, "%s: reset gpio device node not specified\n",
  2249. __func__);
  2250. return -EINVAL;
  2251. }
  2252. value = msm_cdc_pinctrl_get_state(wcd937x->rst_np);
  2253. if (value > 0)
  2254. return 0;
  2255. rc = msm_cdc_pinctrl_select_sleep_state(wcd937x->rst_np);
  2256. if (rc) {
  2257. dev_err(dev, "%s: wcd sleep state request fail!\n",
  2258. __func__);
  2259. return rc;
  2260. }
  2261. /* 20ms sleep required after pulling the reset gpio to LOW */
  2262. usleep_range(20, 30);
  2263. rc = msm_cdc_pinctrl_select_active_state(wcd937x->rst_np);
  2264. if (rc) {
  2265. dev_err(dev, "%s: wcd active state request fail!\n",
  2266. __func__);
  2267. return rc;
  2268. }
  2269. /* 20ms sleep required after pulling the reset gpio to HIGH */
  2270. usleep_range(20, 30);
  2271. return rc;
  2272. }
  2273. static int wcd937x_read_of_property_u32(struct device *dev, const char *name,
  2274. u32 *val)
  2275. {
  2276. int rc = 0;
  2277. rc = of_property_read_u32(dev->of_node, name, val);
  2278. if (rc)
  2279. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  2280. __func__, name, dev->of_node->full_name);
  2281. return rc;
  2282. }
  2283. static void wcd937x_dt_parse_micbias_info(struct device *dev,
  2284. struct wcd937x_micbias_setting *mb)
  2285. {
  2286. u32 prop_val = 0;
  2287. int rc = 0;
  2288. /* MB1 */
  2289. if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
  2290. NULL)) {
  2291. rc = wcd937x_read_of_property_u32(dev,
  2292. "qcom,cdc-micbias1-mv",
  2293. &prop_val);
  2294. if (!rc)
  2295. mb->micb1_mv = prop_val;
  2296. } else {
  2297. dev_info(dev, "%s: Micbias1 DT property not found\n",
  2298. __func__);
  2299. }
  2300. /* MB2 */
  2301. if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
  2302. NULL)) {
  2303. rc = wcd937x_read_of_property_u32(dev,
  2304. "qcom,cdc-micbias2-mv",
  2305. &prop_val);
  2306. if (!rc)
  2307. mb->micb2_mv = prop_val;
  2308. } else {
  2309. dev_info(dev, "%s: Micbias2 DT property not found\n",
  2310. __func__);
  2311. }
  2312. /* MB3 */
  2313. if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
  2314. NULL)) {
  2315. rc = wcd937x_read_of_property_u32(dev,
  2316. "qcom,cdc-micbias3-mv",
  2317. &prop_val);
  2318. if (!rc)
  2319. mb->micb3_mv = prop_val;
  2320. } else {
  2321. dev_info(dev, "%s: Micbias3 DT property not found\n",
  2322. __func__);
  2323. }
  2324. }
  2325. static int wcd937x_reset_low(struct device *dev)
  2326. {
  2327. struct wcd937x_priv *wcd937x = NULL;
  2328. int rc = 0;
  2329. if (!dev)
  2330. return -ENODEV;
  2331. wcd937x = dev_get_drvdata(dev);
  2332. if (!wcd937x)
  2333. return -EINVAL;
  2334. if (!wcd937x->rst_np) {
  2335. dev_err(dev, "%s: reset gpio device node not specified\n",
  2336. __func__);
  2337. return -EINVAL;
  2338. }
  2339. rc = msm_cdc_pinctrl_select_sleep_state(wcd937x->rst_np);
  2340. if (rc) {
  2341. dev_err(dev, "%s: wcd sleep state request fail!\n",
  2342. __func__);
  2343. return rc;
  2344. }
  2345. /* 20ms sleep required after pulling the reset gpio to LOW */
  2346. usleep_range(20, 30);
  2347. return rc;
  2348. }
  2349. struct wcd937x_pdata *wcd937x_populate_dt_data(struct device *dev)
  2350. {
  2351. struct wcd937x_pdata *pdata = NULL;
  2352. pdata = kzalloc(sizeof(struct wcd937x_pdata),
  2353. GFP_KERNEL);
  2354. if (!pdata)
  2355. return NULL;
  2356. pdata->rst_np = of_parse_phandle(dev->of_node,
  2357. "qcom,wcd-rst-gpio-node", 0);
  2358. if (!pdata->rst_np) {
  2359. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  2360. __func__, "qcom,wcd-rst-gpio-node",
  2361. dev->of_node->full_name);
  2362. return NULL;
  2363. }
  2364. /* Parse power supplies */
  2365. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  2366. &pdata->num_supplies);
  2367. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  2368. dev_err(dev, "%s: no power supplies defined for codec\n",
  2369. __func__);
  2370. return NULL;
  2371. }
  2372. pdata->rx_slave = of_parse_phandle(dev->of_node, "qcom,rx-slave", 0);
  2373. pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
  2374. wcd937x_dt_parse_micbias_info(dev, &pdata->micbias);
  2375. return pdata;
  2376. }
  2377. static int wcd937x_wakeup(void *handle, bool enable)
  2378. {
  2379. struct wcd937x_priv *priv;
  2380. if (!handle) {
  2381. pr_err("%s: NULL handle\n", __func__);
  2382. return -EINVAL;
  2383. }
  2384. priv = (struct wcd937x_priv *)handle;
  2385. if (!priv->tx_swr_dev) {
  2386. pr_err("%s: tx swr dev is NULL\n", __func__);
  2387. return -EINVAL;
  2388. }
  2389. if (enable)
  2390. return swr_device_wakeup_vote(priv->tx_swr_dev);
  2391. else
  2392. return swr_device_wakeup_unvote(priv->tx_swr_dev);
  2393. }
  2394. static irqreturn_t wcd937x_wd_handle_irq(int irq, void *data)
  2395. {
  2396. pr_err_ratelimited("%s: Watchdog interrupt for irq =%d triggered\n",
  2397. __func__, irq);
  2398. return IRQ_HANDLED;
  2399. }
  2400. static int wcd937x_bind(struct device *dev)
  2401. {
  2402. int ret = 0, i = 0;
  2403. struct wcd937x_priv *wcd937x = NULL;
  2404. struct wcd937x_pdata *pdata = NULL;
  2405. struct wcd_ctrl_platform_data *plat_data = NULL;
  2406. wcd937x = kzalloc(sizeof(struct wcd937x_priv), GFP_KERNEL);
  2407. if (!wcd937x)
  2408. return -ENOMEM;
  2409. dev_set_drvdata(dev, wcd937x);
  2410. pdata = wcd937x_populate_dt_data(dev);
  2411. if (!pdata) {
  2412. dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
  2413. return -EINVAL;
  2414. }
  2415. wcd937x->dev = dev;
  2416. wcd937x->dev->platform_data = pdata;
  2417. wcd937x->rst_np = pdata->rst_np;
  2418. ret = msm_cdc_init_supplies(dev, &wcd937x->supplies,
  2419. pdata->regulator, pdata->num_supplies);
  2420. if (!wcd937x->supplies) {
  2421. dev_err(dev, "%s: Cannot init wcd supplies\n",
  2422. __func__);
  2423. goto err_bind_all;
  2424. }
  2425. plat_data = dev_get_platdata(dev->parent);
  2426. if (!plat_data) {
  2427. dev_err(dev, "%s: platform data from parent is NULL\n",
  2428. __func__);
  2429. ret = -EINVAL;
  2430. goto err_bind_all;
  2431. }
  2432. wcd937x->handle = (void *)plat_data->handle;
  2433. if (!wcd937x->handle) {
  2434. dev_err(dev, "%s: handle is NULL\n", __func__);
  2435. ret = -EINVAL;
  2436. goto err_bind_all;
  2437. }
  2438. wcd937x->update_wcd_event = plat_data->update_wcd_event;
  2439. if (!wcd937x->update_wcd_event) {
  2440. dev_err(dev, "%s: update_wcd_event api is null!\n",
  2441. __func__);
  2442. ret = -EINVAL;
  2443. goto err_bind_all;
  2444. }
  2445. wcd937x->register_notifier = plat_data->register_notifier;
  2446. if (!wcd937x->register_notifier) {
  2447. dev_err(dev, "%s: register_notifier api is null!\n",
  2448. __func__);
  2449. ret = -EINVAL;
  2450. goto err_bind_all;
  2451. }
  2452. ret = msm_cdc_enable_static_supplies(dev, wcd937x->supplies,
  2453. pdata->regulator,
  2454. pdata->num_supplies);
  2455. if (ret) {
  2456. dev_err(dev, "%s: wcd static supply enable failed!\n",
  2457. __func__);
  2458. goto err_bind_all;
  2459. }
  2460. wcd937x_reset(dev);
  2461. /*
  2462. * Add 5msec delay to provide sufficient time for
  2463. * soundwire auto enumeration of slave devices as
  2464. * as per HW requirement.
  2465. */
  2466. usleep_range(5000, 5010);
  2467. wcd937x->wakeup = wcd937x_wakeup;
  2468. ret = component_bind_all(dev, wcd937x);
  2469. if (ret) {
  2470. dev_err(dev, "%s: Slave bind failed, ret = %d\n",
  2471. __func__, ret);
  2472. goto err_bind_all;
  2473. }
  2474. ret = wcd937x_parse_port_mapping(dev, "qcom,rx_swr_ch_map", CODEC_RX);
  2475. ret |= wcd937x_parse_port_mapping(dev, "qcom,tx_swr_ch_map", CODEC_TX);
  2476. if (ret) {
  2477. dev_err(dev, "Failed to read port mapping\n");
  2478. goto err;
  2479. }
  2480. wcd937x->rx_swr_dev = get_matching_swr_slave_device(pdata->rx_slave);
  2481. if (!wcd937x->rx_swr_dev) {
  2482. dev_err(dev, "%s: Could not find RX swr slave device\n",
  2483. __func__);
  2484. ret = -ENODEV;
  2485. goto err;
  2486. }
  2487. wcd937x->tx_swr_dev = get_matching_swr_slave_device(pdata->tx_slave);
  2488. if (!wcd937x->tx_swr_dev) {
  2489. dev_err(dev, "%s: Could not find TX swr slave device\n",
  2490. __func__);
  2491. ret = -ENODEV;
  2492. goto err;
  2493. }
  2494. wcd937x->regmap = devm_regmap_init_swr(wcd937x->tx_swr_dev,
  2495. &wcd937x_regmap_config);
  2496. if (!wcd937x->regmap) {
  2497. dev_err(dev, "%s: Regmap init failed\n",
  2498. __func__);
  2499. goto err;
  2500. }
  2501. /* Set all interupts as edge triggered */
  2502. for (i = 0; i < wcd937x_regmap_irq_chip.num_regs; i++)
  2503. regmap_write(wcd937x->regmap,
  2504. (WCD937X_DIGITAL_INTR_LEVEL_0 + i), 0);
  2505. wcd937x_regmap_irq_chip.irq_drv_data = wcd937x;
  2506. wcd937x->irq_info.wcd_regmap_irq_chip = &wcd937x_regmap_irq_chip;
  2507. wcd937x->irq_info.codec_name = "WCD937X";
  2508. wcd937x->irq_info.regmap = wcd937x->regmap;
  2509. wcd937x->irq_info.dev = dev;
  2510. ret = wcd_irq_init(&wcd937x->irq_info, &wcd937x->virq);
  2511. if (ret) {
  2512. dev_err(dev, "%s: IRQ init failed: %d\n",
  2513. __func__, ret);
  2514. goto err;
  2515. }
  2516. wcd937x->tx_swr_dev->slave_irq = wcd937x->virq;
  2517. ret = wcd937x_set_micbias_data(wcd937x, pdata);
  2518. if (ret < 0) {
  2519. dev_err(dev, "%s: bad micbias pdata\n", __func__);
  2520. goto err_irq;
  2521. }
  2522. mutex_init(&wcd937x->micb_lock);
  2523. mutex_init(&wcd937x->ana_tx_clk_lock);
  2524. /* Request for watchdog interrupt */
  2525. wcd_request_irq(&wcd937x->irq_info, WCD937X_IRQ_HPHR_PDM_WD_INT,
  2526. "HPHR PDM WD INT", wcd937x_wd_handle_irq, NULL);
  2527. wcd_request_irq(&wcd937x->irq_info, WCD937X_IRQ_HPHL_PDM_WD_INT,
  2528. "HPHL PDM WD INT", wcd937x_wd_handle_irq, NULL);
  2529. wcd_request_irq(&wcd937x->irq_info, WCD937X_IRQ_AUX_PDM_WD_INT,
  2530. "AUX PDM WD INT", wcd937x_wd_handle_irq, NULL);
  2531. /* Enable watchdog interrupt for HPH and AUX */
  2532. wcd_enable_irq(&wcd937x->irq_info, WCD937X_IRQ_HPHR_PDM_WD_INT);
  2533. wcd_enable_irq(&wcd937x->irq_info, WCD937X_IRQ_HPHL_PDM_WD_INT);
  2534. wcd_enable_irq(&wcd937x->irq_info, WCD937X_IRQ_AUX_PDM_WD_INT);
  2535. ret = snd_soc_register_component(dev, &soc_codec_dev_wcd937x,
  2536. NULL, 0);
  2537. if (ret) {
  2538. dev_err(dev, "%s: Codec registration failed\n",
  2539. __func__);
  2540. goto err_irq;
  2541. }
  2542. return ret;
  2543. err_irq:
  2544. wcd_irq_exit(&wcd937x->irq_info, wcd937x->virq);
  2545. err:
  2546. component_unbind_all(dev, wcd937x);
  2547. err_bind_all:
  2548. dev_set_drvdata(dev, NULL);
  2549. kfree(pdata);
  2550. kfree(wcd937x);
  2551. return ret;
  2552. }
  2553. static void wcd937x_unbind(struct device *dev)
  2554. {
  2555. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  2556. struct wcd937x_pdata *pdata = dev_get_platdata(wcd937x->dev);
  2557. wcd_irq_exit(&wcd937x->irq_info, wcd937x->virq);
  2558. snd_soc_unregister_component(dev);
  2559. component_unbind_all(dev, wcd937x);
  2560. mutex_destroy(&wcd937x->micb_lock);
  2561. mutex_destroy(&wcd937x->ana_tx_clk_lock);
  2562. dev_set_drvdata(dev, NULL);
  2563. kfree(pdata);
  2564. kfree(wcd937x);
  2565. }
  2566. static const struct of_device_id wcd937x_dt_match[] = {
  2567. { .compatible = "qcom,wcd937x-codec" },
  2568. {}
  2569. };
  2570. static const struct component_master_ops wcd937x_comp_ops = {
  2571. .bind = wcd937x_bind,
  2572. .unbind = wcd937x_unbind,
  2573. };
  2574. static int wcd937x_compare_of(struct device *dev, void *data)
  2575. {
  2576. return dev->of_node == data;
  2577. }
  2578. static void wcd937x_release_of(struct device *dev, void *data)
  2579. {
  2580. of_node_put(data);
  2581. }
  2582. static int wcd937x_add_slave_components(struct device *dev,
  2583. struct component_match **matchptr)
  2584. {
  2585. struct device_node *np, *rx_node, *tx_node;
  2586. np = dev->of_node;
  2587. rx_node = of_parse_phandle(np, "qcom,rx-slave", 0);
  2588. if (!rx_node) {
  2589. dev_err(dev, "%s: Rx-slave node not defined\n", __func__);
  2590. return -ENODEV;
  2591. }
  2592. of_node_get(rx_node);
  2593. component_match_add_release(dev, matchptr,
  2594. wcd937x_release_of,
  2595. wcd937x_compare_of,
  2596. rx_node);
  2597. tx_node = of_parse_phandle(np, "qcom,tx-slave", 0);
  2598. if (!tx_node) {
  2599. dev_err(dev, "%s: Tx-slave node not defined\n", __func__);
  2600. return -ENODEV;
  2601. }
  2602. of_node_get(tx_node);
  2603. component_match_add_release(dev, matchptr,
  2604. wcd937x_release_of,
  2605. wcd937x_compare_of,
  2606. tx_node);
  2607. return 0;
  2608. }
  2609. static int wcd937x_probe(struct platform_device *pdev)
  2610. {
  2611. struct component_match *match = NULL;
  2612. int ret;
  2613. ret = wcd937x_add_slave_components(&pdev->dev, &match);
  2614. if (ret)
  2615. return ret;
  2616. return component_master_add_with_match(&pdev->dev,
  2617. &wcd937x_comp_ops, match);
  2618. }
  2619. static int wcd937x_remove(struct platform_device *pdev)
  2620. {
  2621. component_master_del(&pdev->dev, &wcd937x_comp_ops);
  2622. dev_set_drvdata(&pdev->dev, NULL);
  2623. return 0;
  2624. }
  2625. #ifdef CONFIG_PM_SLEEP
  2626. static const struct dev_pm_ops wcd937x_dev_pm_ops = {
  2627. SET_SYSTEM_SLEEP_PM_OPS(
  2628. wcd937x_suspend,
  2629. wcd937x_resume
  2630. )
  2631. };
  2632. #endif
  2633. static struct platform_driver wcd937x_codec_driver = {
  2634. .probe = wcd937x_probe,
  2635. .remove = wcd937x_remove,
  2636. .driver = {
  2637. .name = "wcd937x_codec",
  2638. .owner = THIS_MODULE,
  2639. .of_match_table = of_match_ptr(wcd937x_dt_match),
  2640. #ifdef CONFIG_PM_SLEEP
  2641. .pm = &wcd937x_dev_pm_ops,
  2642. #endif
  2643. .suppress_bind_attrs = true,
  2644. },
  2645. };
  2646. module_platform_driver(wcd937x_codec_driver);
  2647. MODULE_DESCRIPTION("WCD937X Codec driver");
  2648. MODULE_LICENSE("GPL v2");