qcrypto.c 150 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * QTI Crypto driver
  4. *
  5. * Copyright (c) 2010-2021, The Linux Foundation. All rights reserved.
  6. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
  7. */
  8. #include <linux/module.h>
  9. #include <linux/device.h>
  10. #include <linux/mod_devicetable.h>
  11. #include <linux/clk.h>
  12. #include <linux/cpu.h>
  13. #include <linux/types.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/dma-mapping.h>
  16. #include <linux/dmapool.h>
  17. #include <linux/crypto.h>
  18. #include <linux/kernel.h>
  19. #include <linux/rtnetlink.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/spinlock.h>
  22. #include <linux/llist.h>
  23. #include <linux/debugfs.h>
  24. #include <linux/workqueue.h>
  25. #include <linux/sched.h>
  26. #include <linux/init.h>
  27. #include <linux/cache.h>
  28. #include <linux/interconnect.h>
  29. #include <linux/hardirq.h>
  30. #include <linux/version.h>
  31. #include "qcrypto.h"
  32. #include "qcom_crypto_device.h"
  33. #include <crypto/ctr.h>
  34. #include <crypto/des.h>
  35. #include <crypto/aes.h>
  36. #include <crypto/sha1.h>
  37. #include <crypto/sha2.h>
  38. #include <crypto/hash.h>
  39. #include <crypto/algapi.h>
  40. #include <crypto/aead.h>
  41. #include <crypto/authenc.h>
  42. #include <crypto/scatterwalk.h>
  43. #include <crypto/skcipher.h>
  44. #include <crypto/internal/skcipher.h>
  45. #include <crypto/internal/hash.h>
  46. #include <crypto/internal/aead.h>
  47. #include "fips_status.h"
  48. #include "qce.h"
  49. #define DEBUG_MAX_FNAME 16
  50. #define DEBUG_MAX_RW_BUF 4096
  51. #define QCRYPTO_BIG_NUMBER 9999999 /* a big number */
  52. /*
  53. * For crypto 5.0 which has burst size alignment requirement.
  54. */
  55. #define MAX_ALIGN_SIZE 0x40
  56. #define QCRYPTO_HIGH_BANDWIDTH_TIMEOUT 1000
  57. /* Status of response workq */
  58. enum resp_workq_sts {
  59. NOT_SCHEDULED = 0,
  60. IS_SCHEDULED = 1,
  61. SCHEDULE_AGAIN = 2
  62. };
  63. /* Status of req processing by CEs */
  64. enum req_processing_sts {
  65. STOPPED = 0,
  66. IN_PROGRESS = 1
  67. };
  68. enum qcrypto_bus_state {
  69. BUS_NO_BANDWIDTH = 0,
  70. BUS_HAS_BANDWIDTH,
  71. BUS_BANDWIDTH_RELEASING,
  72. BUS_BANDWIDTH_ALLOCATING,
  73. BUS_SUSPENDED,
  74. BUS_SUSPENDING,
  75. };
  76. struct crypto_stat {
  77. u64 aead_sha1_aes_enc;
  78. u64 aead_sha1_aes_dec;
  79. u64 aead_sha1_des_enc;
  80. u64 aead_sha1_des_dec;
  81. u64 aead_sha1_3des_enc;
  82. u64 aead_sha1_3des_dec;
  83. u64 aead_sha256_aes_enc;
  84. u64 aead_sha256_aes_dec;
  85. u64 aead_sha256_des_enc;
  86. u64 aead_sha256_des_dec;
  87. u64 aead_sha256_3des_enc;
  88. u64 aead_sha256_3des_dec;
  89. u64 aead_ccm_aes_enc;
  90. u64 aead_ccm_aes_dec;
  91. u64 aead_rfc4309_ccm_aes_enc;
  92. u64 aead_rfc4309_ccm_aes_dec;
  93. u64 aead_op_success;
  94. u64 aead_op_fail;
  95. u64 aead_bad_msg;
  96. u64 sk_cipher_aes_enc;
  97. u64 sk_cipher_aes_dec;
  98. u64 sk_cipher_des_enc;
  99. u64 sk_cipher_des_dec;
  100. u64 sk_cipher_3des_enc;
  101. u64 sk_cipher_3des_dec;
  102. u64 sk_cipher_op_success;
  103. u64 sk_cipher_op_fail;
  104. u64 sha1_digest;
  105. u64 sha256_digest;
  106. u64 sha1_hmac_digest;
  107. u64 sha256_hmac_digest;
  108. u64 ahash_op_success;
  109. u64 ahash_op_fail;
  110. };
  111. static struct crypto_stat _qcrypto_stat;
  112. static struct dentry *_debug_dent;
  113. static char _debug_read_buf[DEBUG_MAX_RW_BUF];
  114. static bool _qcrypto_init_assign;
  115. struct crypto_priv;
  116. struct qcrypto_req_control {
  117. unsigned int index;
  118. bool in_use;
  119. struct crypto_engine *pce;
  120. struct crypto_async_request *req;
  121. struct qcrypto_resp_ctx *arsp;
  122. int res; /* execution result */
  123. };
  124. struct crypto_engine {
  125. struct list_head elist;
  126. void *qce; /* qce handle */
  127. struct platform_device *pdev; /* platform device */
  128. struct crypto_priv *pcp;
  129. struct icc_path *icc_path;
  130. struct crypto_queue req_queue; /*
  131. * request queue for those requests
  132. * that have this engine assigned
  133. * waiting to be executed
  134. */
  135. u64 total_req;
  136. u64 err_req;
  137. u32 unit;
  138. u32 ce_device;
  139. u32 ce_hw_instance;
  140. unsigned int signature;
  141. enum qcrypto_bus_state bw_state;
  142. bool high_bw_req;
  143. struct timer_list bw_reaper_timer;
  144. struct work_struct bw_reaper_ws;
  145. struct work_struct bw_allocate_ws;
  146. /* engine execution sequence number */
  147. u32 active_seq;
  148. /* last QCRYPTO_HIGH_BANDWIDTH_TIMEOUT active_seq */
  149. u32 last_active_seq;
  150. bool check_flag;
  151. /*Added to support multi-requests*/
  152. unsigned int max_req;
  153. struct qcrypto_req_control *preq_pool;
  154. atomic_t req_count;
  155. bool issue_req; /* an request is being issued to qce */
  156. bool first_engine; /* this engine is the first engine or not */
  157. unsigned int irq_cpu; /* the cpu running the irq of this engine */
  158. unsigned int max_req_used; /* debug stats */
  159. };
  160. #define MAX_SMP_CPU 8
  161. struct crypto_priv {
  162. /* CE features supported by target device*/
  163. struct msm_ce_hw_support platform_support;
  164. /* CE features/algorithms supported by HW engine*/
  165. struct ce_hw_support ce_support;
  166. /* the lock protects crypto queue and req */
  167. spinlock_t lock;
  168. /* list of registered algorithms */
  169. struct list_head alg_list;
  170. /* current active request */
  171. struct crypto_async_request *req;
  172. struct work_struct unlock_ce_ws;
  173. struct list_head engine_list; /* list of qcrypto engines */
  174. int32_t total_units; /* total units of engines */
  175. struct mutex engine_lock;
  176. struct crypto_engine *next_engine; /* next assign engine */
  177. struct crypto_queue req_queue; /*
  178. * request queue for those requests
  179. * that waiting for an available
  180. * engine.
  181. */
  182. struct llist_head ordered_resp_list; /* Queue to maintain
  183. * responses in sequence.
  184. */
  185. atomic_t resp_cnt;
  186. struct workqueue_struct *resp_wq;
  187. struct work_struct resp_work; /*
  188. * Workq to send responses
  189. * in sequence.
  190. */
  191. enum resp_workq_sts sched_resp_workq_status;
  192. enum req_processing_sts ce_req_proc_sts;
  193. int cpu_getting_irqs_frm_first_ce;
  194. struct crypto_engine *first_engine;
  195. struct crypto_engine *scheduled_eng; /* last engine scheduled */
  196. /* debug stats */
  197. unsigned int no_avail;
  198. unsigned int resp_stop;
  199. unsigned int resp_start;
  200. unsigned int max_qlen;
  201. unsigned int queue_work_eng3;
  202. unsigned int queue_work_not_eng3;
  203. unsigned int queue_work_not_eng3_nz;
  204. unsigned int max_resp_qlen;
  205. unsigned int max_reorder_cnt;
  206. unsigned int cpu_req[MAX_SMP_CPU+1];
  207. };
  208. static struct crypto_priv qcrypto_dev;
  209. static struct crypto_engine *_qcrypto_static_assign_engine(
  210. struct crypto_priv *cp);
  211. static struct crypto_engine *_avail_eng(struct crypto_priv *cp);
  212. static struct qcrypto_req_control *qcrypto_alloc_req_control(
  213. struct crypto_engine *pce)
  214. {
  215. int i;
  216. struct qcrypto_req_control *pqcrypto_req_control = pce->preq_pool;
  217. unsigned int req_count;
  218. for (i = 0; i < pce->max_req; i++) {
  219. if (!xchg(&pqcrypto_req_control->in_use, true)) {
  220. req_count = atomic_inc_return(&pce->req_count);
  221. if (req_count > pce->max_req_used)
  222. pce->max_req_used = req_count;
  223. return pqcrypto_req_control;
  224. }
  225. pqcrypto_req_control++;
  226. }
  227. return NULL;
  228. }
  229. static void qcrypto_free_req_control(struct crypto_engine *pce,
  230. struct qcrypto_req_control *preq)
  231. {
  232. /* do this before free req */
  233. preq->req = NULL;
  234. preq->arsp = NULL;
  235. /* free req */
  236. if (!xchg(&preq->in_use, false))
  237. pr_warn("request info %pK free already\n", preq);
  238. else
  239. atomic_dec(&pce->req_count);
  240. }
  241. static struct qcrypto_req_control *find_req_control_for_areq(
  242. struct crypto_engine *pce,
  243. struct crypto_async_request *areq)
  244. {
  245. int i;
  246. struct qcrypto_req_control *pqcrypto_req_control = pce->preq_pool;
  247. for (i = 0; i < pce->max_req; i++) {
  248. if (pqcrypto_req_control->req == areq)
  249. return pqcrypto_req_control;
  250. pqcrypto_req_control++;
  251. }
  252. return NULL;
  253. }
  254. static void qcrypto_init_req_control(struct crypto_engine *pce,
  255. struct qcrypto_req_control *pqcrypto_req_control)
  256. {
  257. int i;
  258. pce->preq_pool = pqcrypto_req_control;
  259. atomic_set(&pce->req_count, 0);
  260. for (i = 0; i < pce->max_req; i++) {
  261. pqcrypto_req_control->index = i;
  262. pqcrypto_req_control->in_use = false;
  263. pqcrypto_req_control->pce = pce;
  264. pqcrypto_req_control++;
  265. }
  266. }
  267. static struct crypto_engine *_qrypto_find_pengine_device(struct crypto_priv *cp,
  268. unsigned int device)
  269. {
  270. struct crypto_engine *entry = NULL;
  271. unsigned long flags;
  272. spin_lock_irqsave(&cp->lock, flags);
  273. list_for_each_entry(entry, &cp->engine_list, elist) {
  274. if (entry->ce_device == device)
  275. break;
  276. }
  277. spin_unlock_irqrestore(&cp->lock, flags);
  278. if (((entry != NULL) && (entry->ce_device != device)) ||
  279. (entry == NULL)) {
  280. pr_err("Device node for CE device %d NOT FOUND!!\n",
  281. device);
  282. return NULL;
  283. }
  284. return entry;
  285. }
  286. static struct crypto_engine *_qrypto_find_pengine_device_hw
  287. (struct crypto_priv *cp,
  288. u32 device,
  289. u32 hw_instance)
  290. {
  291. struct crypto_engine *entry = NULL;
  292. unsigned long flags;
  293. spin_lock_irqsave(&cp->lock, flags);
  294. list_for_each_entry(entry, &cp->engine_list, elist) {
  295. if ((entry->ce_device == device) &&
  296. (entry->ce_hw_instance == hw_instance))
  297. break;
  298. }
  299. spin_unlock_irqrestore(&cp->lock, flags);
  300. if (((entry != NULL) &&
  301. ((entry->ce_device != device)
  302. || (entry->ce_hw_instance != hw_instance)))
  303. || (entry == NULL)) {
  304. pr_err("Device node for CE device %d NOT FOUND!!\n",
  305. device);
  306. return NULL;
  307. }
  308. return entry;
  309. }
  310. int qcrypto_get_num_engines(void)
  311. {
  312. struct crypto_priv *cp = &qcrypto_dev;
  313. struct crypto_engine *entry = NULL;
  314. int count = 0;
  315. list_for_each_entry(entry, &cp->engine_list, elist) {
  316. count++;
  317. }
  318. return count;
  319. }
  320. EXPORT_SYMBOL(qcrypto_get_num_engines);
  321. void qcrypto_get_engine_list(size_t num_engines,
  322. struct crypto_engine_entry *arr)
  323. {
  324. struct crypto_priv *cp = &qcrypto_dev;
  325. struct crypto_engine *entry = NULL;
  326. size_t arr_index = 0;
  327. list_for_each_entry(entry, &cp->engine_list, elist) {
  328. arr[arr_index].ce_device = entry->ce_device;
  329. arr[arr_index].hw_instance = entry->ce_hw_instance;
  330. arr_index++;
  331. if (arr_index >= num_engines)
  332. break;
  333. }
  334. }
  335. EXPORT_SYMBOL(qcrypto_get_engine_list);
  336. enum qcrypto_alg_type {
  337. QCRYPTO_ALG_CIPHER = 0,
  338. QCRYPTO_ALG_SHA = 1,
  339. QCRYPTO_ALG_AEAD = 2,
  340. QCRYPTO_ALG_LAST
  341. };
  342. struct qcrypto_alg {
  343. struct list_head entry;
  344. struct skcipher_alg cipher_alg;
  345. struct ahash_alg sha_alg;
  346. struct aead_alg aead_alg;
  347. enum qcrypto_alg_type alg_type;
  348. struct crypto_priv *cp;
  349. };
  350. #define QCRYPTO_MAX_KEY_SIZE 64
  351. /* max of AES_BLOCK_SIZE, DES3_EDE_BLOCK_SIZE */
  352. #define QCRYPTO_MAX_IV_LENGTH 16
  353. #define QCRYPTO_CCM4309_NONCE_LEN 3
  354. struct qcrypto_cipher_ctx {
  355. struct list_head rsp_queue; /* response queue */
  356. struct crypto_engine *pengine; /* fixed engine assigned to this tfm */
  357. struct crypto_priv *cp;
  358. unsigned int flags;
  359. enum qce_hash_alg_enum auth_alg; /* for aead */
  360. u8 auth_key[QCRYPTO_MAX_KEY_SIZE];
  361. u8 iv[QCRYPTO_MAX_IV_LENGTH];
  362. u8 enc_key[QCRYPTO_MAX_KEY_SIZE];
  363. unsigned int enc_key_len;
  364. unsigned int authsize;
  365. unsigned int auth_key_len;
  366. u8 ccm4309_nonce[QCRYPTO_CCM4309_NONCE_LEN];
  367. struct crypto_sync_skcipher *cipher_aes192_fb;
  368. struct crypto_ahash *ahash_aead_aes192_fb;
  369. };
  370. struct qcrypto_resp_ctx {
  371. struct list_head list;
  372. struct llist_node llist;
  373. struct crypto_async_request *async_req; /* async req */
  374. int res; /* execution result */
  375. };
  376. struct qcrypto_cipher_req_ctx {
  377. struct qcrypto_resp_ctx rsp_entry;/* rsp entry. */
  378. struct crypto_engine *pengine; /* engine assigned to this request */
  379. u8 *iv;
  380. u8 rfc4309_iv[QCRYPTO_MAX_IV_LENGTH];
  381. unsigned int ivsize;
  382. int aead;
  383. int ccmtype; /* default: 0, rfc4309: 1 */
  384. struct scatterlist asg; /* Formatted associated data sg */
  385. unsigned char *adata; /* Pointer to formatted assoc data */
  386. enum qce_cipher_alg_enum alg;
  387. enum qce_cipher_dir_enum dir;
  388. enum qce_cipher_mode_enum mode;
  389. struct scatterlist *orig_src; /* Original src sg ptr */
  390. struct scatterlist *orig_dst; /* Original dst sg ptr */
  391. struct scatterlist dsg; /* Dest Data sg */
  392. struct scatterlist ssg; /* Source Data sg */
  393. unsigned char *data; /* Incoming data pointer*/
  394. struct aead_request *aead_req;
  395. struct ahash_request *fb_hash_req;
  396. uint8_t fb_ahash_digest[SHA256_DIGEST_SIZE];
  397. struct scatterlist fb_ablkcipher_src_sg[2];
  398. struct scatterlist fb_ablkcipher_dst_sg[2];
  399. char *fb_aes_iv;
  400. unsigned int fb_ahash_length;
  401. struct skcipher_request *fb_aes_req;
  402. struct scatterlist *fb_aes_src;
  403. struct scatterlist *fb_aes_dst;
  404. unsigned int fb_aes_cryptlen;
  405. };
  406. #define SHA_MAX_BLOCK_SIZE SHA256_BLOCK_SIZE
  407. #define SHA_MAX_STATE_SIZE (SHA256_DIGEST_SIZE / sizeof(u32))
  408. #define SHA_MAX_DIGEST_SIZE SHA256_DIGEST_SIZE
  409. #define MSM_QCRYPTO_REQ_QUEUE_LENGTH 768
  410. #define COMPLETION_CB_BACKLOG_LENGTH_STOP 400
  411. #define COMPLETION_CB_BACKLOG_LENGTH_START \
  412. (COMPLETION_CB_BACKLOG_LENGTH_STOP / 2)
  413. static uint8_t _std_init_vector_sha1_uint8[] = {
  414. 0x67, 0x45, 0x23, 0x01, 0xEF, 0xCD, 0xAB, 0x89,
  415. 0x98, 0xBA, 0xDC, 0xFE, 0x10, 0x32, 0x54, 0x76,
  416. 0xC3, 0xD2, 0xE1, 0xF0
  417. };
  418. /* standard initialization vector for SHA-256, source: FIPS 180-2 */
  419. static uint8_t _std_init_vector_sha256_uint8[] = {
  420. 0x6A, 0x09, 0xE6, 0x67, 0xBB, 0x67, 0xAE, 0x85,
  421. 0x3C, 0x6E, 0xF3, 0x72, 0xA5, 0x4F, 0xF5, 0x3A,
  422. 0x51, 0x0E, 0x52, 0x7F, 0x9B, 0x05, 0x68, 0x8C,
  423. 0x1F, 0x83, 0xD9, 0xAB, 0x5B, 0xE0, 0xCD, 0x19
  424. };
  425. struct qcrypto_sha_ctx {
  426. struct list_head rsp_queue; /* response queue */
  427. struct crypto_engine *pengine; /* fixed engine assigned to this tfm */
  428. struct crypto_priv *cp;
  429. unsigned int flags;
  430. enum qce_hash_alg_enum alg;
  431. uint32_t diglen;
  432. uint32_t authkey_in_len;
  433. uint8_t authkey[SHA_MAX_BLOCK_SIZE];
  434. struct ahash_request *ahash_req;
  435. struct completion ahash_req_complete;
  436. };
  437. struct qcrypto_sha_req_ctx {
  438. struct qcrypto_resp_ctx rsp_entry;/* rsp entry. */
  439. struct crypto_engine *pengine; /* engine assigned to this request */
  440. struct scatterlist *src;
  441. uint32_t nbytes;
  442. struct scatterlist *orig_src; /* Original src sg ptr */
  443. struct scatterlist dsg; /* Data sg */
  444. unsigned char *data; /* Incoming data pointer*/
  445. unsigned char *data2; /* Updated data pointer*/
  446. uint32_t byte_count[4];
  447. u64 count;
  448. uint8_t first_blk;
  449. uint8_t last_blk;
  450. uint8_t trailing_buf[SHA_MAX_BLOCK_SIZE];
  451. uint32_t trailing_buf_len;
  452. /* dma buffer, Internal use */
  453. uint8_t staging_dmabuf
  454. [SHA_MAX_BLOCK_SIZE+SHA_MAX_DIGEST_SIZE+MAX_ALIGN_SIZE];
  455. uint8_t digest[SHA_MAX_DIGEST_SIZE];
  456. struct scatterlist sg[2];
  457. };
  458. static void _byte_stream_to_words(uint32_t *iv, unsigned char *b,
  459. unsigned int len)
  460. {
  461. unsigned int n;
  462. n = len / sizeof(uint32_t);
  463. for (; n > 0; n--) {
  464. *iv = ((*b << 24) & 0xff000000) |
  465. (((*(b+1)) << 16) & 0xff0000) |
  466. (((*(b+2)) << 8) & 0xff00) |
  467. (*(b+3) & 0xff);
  468. b += sizeof(uint32_t);
  469. iv++;
  470. }
  471. n = len % sizeof(uint32_t);
  472. if (n == 3) {
  473. *iv = ((*b << 24) & 0xff000000) |
  474. (((*(b+1)) << 16) & 0xff0000) |
  475. (((*(b+2)) << 8) & 0xff00);
  476. } else if (n == 2) {
  477. *iv = ((*b << 24) & 0xff000000) |
  478. (((*(b+1)) << 16) & 0xff0000);
  479. } else if (n == 1) {
  480. *iv = ((*b << 24) & 0xff000000);
  481. }
  482. }
  483. static void _words_to_byte_stream(uint32_t *iv, unsigned char *b,
  484. unsigned int len)
  485. {
  486. unsigned int n = len / sizeof(uint32_t);
  487. for (; n > 0; n--) {
  488. *b++ = (unsigned char) ((*iv >> 24) & 0xff);
  489. *b++ = (unsigned char) ((*iv >> 16) & 0xff);
  490. *b++ = (unsigned char) ((*iv >> 8) & 0xff);
  491. *b++ = (unsigned char) (*iv & 0xff);
  492. iv++;
  493. }
  494. n = len % sizeof(uint32_t);
  495. if (n == 3) {
  496. *b++ = (unsigned char) ((*iv >> 24) & 0xff);
  497. *b++ = (unsigned char) ((*iv >> 16) & 0xff);
  498. *b = (unsigned char) ((*iv >> 8) & 0xff);
  499. } else if (n == 2) {
  500. *b++ = (unsigned char) ((*iv >> 24) & 0xff);
  501. *b = (unsigned char) ((*iv >> 16) & 0xff);
  502. } else if (n == 1) {
  503. *b = (unsigned char) ((*iv >> 24) & 0xff);
  504. }
  505. }
  506. static void qcrypto_ce_set_bus(struct crypto_engine *pengine,
  507. bool high_bw_req)
  508. {
  509. struct crypto_priv *cp = pengine->pcp;
  510. unsigned int control_flag;
  511. int ret = 0;
  512. if (cp->ce_support.req_bw_before_clk) {
  513. if (high_bw_req)
  514. control_flag = QCE_BW_REQUEST_FIRST;
  515. else
  516. control_flag = QCE_CLK_DISABLE_FIRST;
  517. } else {
  518. if (high_bw_req)
  519. control_flag = QCE_CLK_ENABLE_FIRST;
  520. else
  521. control_flag = QCE_BW_REQUEST_RESET_FIRST;
  522. }
  523. switch (control_flag) {
  524. case QCE_CLK_ENABLE_FIRST:
  525. ret = qce_enable_clk(pengine->qce);
  526. if (ret) {
  527. pr_err("%s Unable enable clk\n", __func__);
  528. return;
  529. }
  530. ret = icc_set_bw(pengine->icc_path,
  531. CRYPTO_AVG_BW, CRYPTO_PEAK_BW);
  532. if (ret) {
  533. pr_err("%s Unable to set high bw\n", __func__);
  534. ret = qce_disable_clk(pengine->qce);
  535. if (ret)
  536. pr_err("%s Unable disable clk\n", __func__);
  537. return;
  538. }
  539. break;
  540. case QCE_BW_REQUEST_FIRST:
  541. ret = icc_set_bw(pengine->icc_path,
  542. CRYPTO_AVG_BW, CRYPTO_PEAK_BW);
  543. if (ret) {
  544. pr_err("%s Unable to set high bw\n", __func__);
  545. return;
  546. }
  547. ret = qce_enable_clk(pengine->qce);
  548. if (ret) {
  549. pr_err("%s Unable enable clk\n", __func__);
  550. ret = icc_set_bw(pengine->icc_path, 0, 0);
  551. if (ret)
  552. pr_err("%s Unable to set low bw\n", __func__);
  553. return;
  554. }
  555. break;
  556. case QCE_CLK_DISABLE_FIRST:
  557. ret = qce_disable_clk(pengine->qce);
  558. if (ret) {
  559. pr_err("%s Unable to disable clk\n", __func__);
  560. return;
  561. }
  562. ret = icc_set_bw(pengine->icc_path, 0, 0);
  563. if (ret) {
  564. pr_err("%s Unable to set low bw\n", __func__);
  565. ret = qce_enable_clk(pengine->qce);
  566. if (ret)
  567. pr_err("%s Unable enable clk\n", __func__);
  568. return;
  569. }
  570. break;
  571. case QCE_BW_REQUEST_RESET_FIRST:
  572. ret = icc_set_bw(pengine->icc_path, 0, 0);
  573. if (ret) {
  574. pr_err("%s Unable to set low bw\n", __func__);
  575. return;
  576. }
  577. ret = qce_disable_clk(pengine->qce);
  578. if (ret) {
  579. pr_err("%s Unable to disable clk\n", __func__);
  580. ret = icc_set_bw(pengine->icc_path,
  581. CRYPTO_AVG_BW, CRYPTO_PEAK_BW);
  582. if (ret)
  583. pr_err("%s Unable to set high bw\n", __func__);
  584. return;
  585. }
  586. break;
  587. default:
  588. return;
  589. }
  590. }
  591. static void qcrypto_bw_reaper_timer_callback(struct timer_list *data)
  592. {
  593. struct crypto_engine *pengine = from_timer(pengine, data,
  594. bw_reaper_timer);
  595. schedule_work(&pengine->bw_reaper_ws);
  596. }
  597. static void qcrypto_bw_set_timeout(struct crypto_engine *pengine)
  598. {
  599. pengine->bw_reaper_timer.expires = jiffies +
  600. msecs_to_jiffies(QCRYPTO_HIGH_BANDWIDTH_TIMEOUT);
  601. mod_timer(&(pengine->bw_reaper_timer),
  602. pengine->bw_reaper_timer.expires);
  603. }
  604. static void qcrypto_ce_bw_allocate_req(struct crypto_engine *pengine)
  605. {
  606. schedule_work(&pengine->bw_allocate_ws);
  607. }
  608. static int _start_qcrypto_process(struct crypto_priv *cp,
  609. struct crypto_engine *pengine);
  610. static void qcrypto_bw_allocate_work(struct work_struct *work)
  611. {
  612. struct crypto_engine *pengine = container_of(work,
  613. struct crypto_engine, bw_allocate_ws);
  614. unsigned long flags;
  615. struct crypto_priv *cp = pengine->pcp;
  616. spin_lock_irqsave(&cp->lock, flags);
  617. pengine->bw_state = BUS_BANDWIDTH_ALLOCATING;
  618. spin_unlock_irqrestore(&cp->lock, flags);
  619. qcrypto_ce_set_bus(pengine, true);
  620. qcrypto_bw_set_timeout(pengine);
  621. spin_lock_irqsave(&cp->lock, flags);
  622. pengine->bw_state = BUS_HAS_BANDWIDTH;
  623. pengine->high_bw_req = false;
  624. pengine->active_seq++;
  625. pengine->check_flag = true;
  626. spin_unlock_irqrestore(&cp->lock, flags);
  627. _start_qcrypto_process(cp, pengine);
  628. };
  629. static void qcrypto_bw_reaper_work(struct work_struct *work)
  630. {
  631. struct crypto_engine *pengine = container_of(work,
  632. struct crypto_engine, bw_reaper_ws);
  633. struct crypto_priv *cp = pengine->pcp;
  634. unsigned long flags;
  635. u32 active_seq;
  636. bool restart = false;
  637. spin_lock_irqsave(&cp->lock, flags);
  638. active_seq = pengine->active_seq;
  639. if (pengine->bw_state == BUS_HAS_BANDWIDTH &&
  640. (active_seq == pengine->last_active_seq)) {
  641. /* check if engine is stuck */
  642. if (atomic_read(&pengine->req_count) > 0) {
  643. if (pengine->check_flag)
  644. dev_warn(&pengine->pdev->dev,
  645. "The engine appears to be stuck seq %d.\n",
  646. active_seq);
  647. pengine->check_flag = false;
  648. goto ret;
  649. }
  650. pengine->bw_state = BUS_BANDWIDTH_RELEASING;
  651. spin_unlock_irqrestore(&cp->lock, flags);
  652. qcrypto_ce_set_bus(pengine, false);
  653. spin_lock_irqsave(&cp->lock, flags);
  654. if (pengine->high_bw_req) {
  655. /* we got request while we are disabling clock */
  656. pengine->bw_state = BUS_BANDWIDTH_ALLOCATING;
  657. spin_unlock_irqrestore(&cp->lock, flags);
  658. qcrypto_ce_set_bus(pengine, true);
  659. spin_lock_irqsave(&cp->lock, flags);
  660. pengine->bw_state = BUS_HAS_BANDWIDTH;
  661. pengine->high_bw_req = false;
  662. restart = true;
  663. } else
  664. pengine->bw_state = BUS_NO_BANDWIDTH;
  665. }
  666. ret:
  667. pengine->last_active_seq = active_seq;
  668. spin_unlock_irqrestore(&cp->lock, flags);
  669. if (restart)
  670. _start_qcrypto_process(cp, pengine);
  671. if (pengine->bw_state != BUS_NO_BANDWIDTH)
  672. qcrypto_bw_set_timeout(pengine);
  673. }
  674. static int qcrypto_count_sg(struct scatterlist *sg, int nbytes)
  675. {
  676. int i;
  677. for (i = 0; nbytes > 0 && sg != NULL; i++, sg = sg_next(sg))
  678. nbytes -= sg->length;
  679. return i;
  680. }
  681. static size_t qcrypto_sg_copy_from_buffer(struct scatterlist *sgl,
  682. unsigned int nents, void *buf, size_t buflen)
  683. {
  684. int i;
  685. size_t offset, len;
  686. for (i = 0, offset = 0; i < nents; ++i) {
  687. len = sg_copy_from_buffer(sgl, 1, buf, buflen);
  688. buf += len;
  689. buflen -= len;
  690. offset += len;
  691. sgl = sg_next(sgl);
  692. }
  693. return offset;
  694. }
  695. static size_t qcrypto_sg_copy_to_buffer(struct scatterlist *sgl,
  696. unsigned int nents, void *buf, size_t buflen)
  697. {
  698. int i;
  699. size_t offset, len;
  700. for (i = 0, offset = 0; i < nents; ++i) {
  701. len = sg_copy_to_buffer(sgl, 1, buf, buflen);
  702. buf += len;
  703. buflen -= len;
  704. offset += len;
  705. sgl = sg_next(sgl);
  706. }
  707. return offset;
  708. }
  709. static struct qcrypto_alg *_qcrypto_sha_alg_alloc(struct crypto_priv *cp,
  710. struct ahash_alg *template)
  711. {
  712. struct qcrypto_alg *q_alg;
  713. q_alg = kzalloc(sizeof(struct qcrypto_alg), GFP_KERNEL);
  714. if (!q_alg)
  715. return ERR_PTR(-ENOMEM);
  716. q_alg->alg_type = QCRYPTO_ALG_SHA;
  717. q_alg->sha_alg = *template;
  718. q_alg->cp = cp;
  719. return q_alg;
  720. }
  721. static struct qcrypto_alg *_qcrypto_cipher_alg_alloc(struct crypto_priv *cp,
  722. struct skcipher_alg *template)
  723. {
  724. struct qcrypto_alg *q_alg;
  725. q_alg = kzalloc(sizeof(struct qcrypto_alg), GFP_KERNEL);
  726. if (!q_alg)
  727. return ERR_PTR(-ENOMEM);
  728. q_alg->alg_type = QCRYPTO_ALG_CIPHER;
  729. q_alg->cipher_alg = *template;
  730. q_alg->cp = cp;
  731. return q_alg;
  732. }
  733. static struct qcrypto_alg *_qcrypto_aead_alg_alloc(struct crypto_priv *cp,
  734. struct aead_alg *template)
  735. {
  736. struct qcrypto_alg *q_alg;
  737. q_alg = kzalloc(sizeof(struct qcrypto_alg), GFP_KERNEL);
  738. if (!q_alg)
  739. return ERR_PTR(-ENOMEM);
  740. q_alg->alg_type = QCRYPTO_ALG_AEAD;
  741. q_alg->aead_alg = *template;
  742. q_alg->cp = cp;
  743. return q_alg;
  744. }
  745. static int _qcrypto_cipher_ctx_init(struct qcrypto_cipher_ctx *ctx,
  746. struct qcrypto_alg *q_alg)
  747. {
  748. if (!ctx || !q_alg) {
  749. pr_err("ctx or q_alg is NULL\n");
  750. return -EINVAL;
  751. }
  752. ctx->flags = 0;
  753. /* update context with ptr to cp */
  754. ctx->cp = q_alg->cp;
  755. /* random first IV */
  756. get_random_bytes(ctx->iv, QCRYPTO_MAX_IV_LENGTH);
  757. if (_qcrypto_init_assign) {
  758. ctx->pengine = _qcrypto_static_assign_engine(ctx->cp);
  759. if (ctx->pengine == NULL)
  760. return -ENODEV;
  761. } else
  762. ctx->pengine = NULL;
  763. INIT_LIST_HEAD(&ctx->rsp_queue);
  764. ctx->auth_alg = QCE_HASH_LAST;
  765. return 0;
  766. }
  767. static int _qcrypto_ahash_cra_init(struct crypto_tfm *tfm)
  768. {
  769. struct crypto_ahash *ahash = __crypto_ahash_cast(tfm);
  770. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(tfm);
  771. struct ahash_alg *alg = container_of(crypto_hash_alg_common(ahash),
  772. struct ahash_alg, halg);
  773. struct qcrypto_alg *q_alg = container_of(alg, struct qcrypto_alg,
  774. sha_alg);
  775. crypto_ahash_set_reqsize(ahash, sizeof(struct qcrypto_sha_req_ctx));
  776. /* update context with ptr to cp */
  777. sha_ctx->cp = q_alg->cp;
  778. sha_ctx->flags = 0;
  779. sha_ctx->ahash_req = NULL;
  780. if (_qcrypto_init_assign) {
  781. sha_ctx->pengine = _qcrypto_static_assign_engine(sha_ctx->cp);
  782. if (sha_ctx->pengine == NULL)
  783. return -ENODEV;
  784. } else
  785. sha_ctx->pengine = NULL;
  786. INIT_LIST_HEAD(&sha_ctx->rsp_queue);
  787. return 0;
  788. }
  789. static void _qcrypto_ahash_cra_exit(struct crypto_tfm *tfm)
  790. {
  791. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(tfm);
  792. if (!list_empty(&sha_ctx->rsp_queue))
  793. pr_err("%s: requests still outstanding\n", __func__);
  794. if (sha_ctx->ahash_req != NULL) {
  795. ahash_request_free(sha_ctx->ahash_req);
  796. sha_ctx->ahash_req = NULL;
  797. }
  798. }
  799. #if (KERNEL_VERSION(6, 2, 0) <= LINUX_VERSION_CODE)
  800. static void _crypto_sha_hmac_ahash_req_complete(void *data, int err);
  801. #else
  802. static void _crypto_sha_hmac_ahash_req_complete(
  803. struct crypto_async_request *req, int err);
  804. #endif
  805. static int _qcrypto_ahash_hmac_cra_init(struct crypto_tfm *tfm)
  806. {
  807. struct crypto_ahash *ahash = __crypto_ahash_cast(tfm);
  808. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(tfm);
  809. int ret = 0;
  810. ret = _qcrypto_ahash_cra_init(tfm);
  811. if (ret)
  812. return ret;
  813. sha_ctx->ahash_req = ahash_request_alloc(ahash, GFP_KERNEL);
  814. if (sha_ctx->ahash_req == NULL) {
  815. _qcrypto_ahash_cra_exit(tfm);
  816. return -ENOMEM;
  817. }
  818. init_completion(&sha_ctx->ahash_req_complete);
  819. ahash_request_set_callback(sha_ctx->ahash_req,
  820. CRYPTO_TFM_REQ_MAY_BACKLOG,
  821. _crypto_sha_hmac_ahash_req_complete,
  822. &sha_ctx->ahash_req_complete);
  823. crypto_ahash_clear_flags(ahash, ~0);
  824. return 0;
  825. }
  826. static int _qcrypto_skcipher_init(struct crypto_skcipher *tfm)
  827. {
  828. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  829. struct skcipher_alg *alg = crypto_skcipher_alg(tfm);
  830. struct qcrypto_alg *q_alg;
  831. q_alg = container_of(alg, struct qcrypto_alg, cipher_alg);
  832. crypto_skcipher_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  833. return _qcrypto_cipher_ctx_init(ctx, q_alg);
  834. }
  835. static int _qcrypto_aes_skcipher_init(struct crypto_skcipher *tfm)
  836. {
  837. const char *name = crypto_tfm_alg_name(&tfm->base);
  838. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  839. int ret;
  840. struct crypto_priv *cp = &qcrypto_dev;
  841. if (cp->ce_support.use_sw_aes_cbc_ecb_ctr_algo) {
  842. ctx->cipher_aes192_fb = NULL;
  843. return _qcrypto_skcipher_init(tfm);
  844. }
  845. ctx->cipher_aes192_fb = crypto_alloc_sync_skcipher(name, 0,
  846. CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK);
  847. if (IS_ERR(ctx->cipher_aes192_fb)) {
  848. pr_err("Error allocating fallback algo %s\n", name);
  849. ret = PTR_ERR(ctx->cipher_aes192_fb);
  850. ctx->cipher_aes192_fb = NULL;
  851. return ret;
  852. }
  853. return _qcrypto_skcipher_init(tfm);
  854. }
  855. static int _qcrypto_aead_cra_init(struct crypto_aead *tfm)
  856. {
  857. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  858. struct aead_alg *aeadalg = crypto_aead_alg(tfm);
  859. struct qcrypto_alg *q_alg = container_of(aeadalg, struct qcrypto_alg,
  860. aead_alg);
  861. return _qcrypto_cipher_ctx_init(ctx, q_alg);
  862. }
  863. static int _qcrypto_cra_aead_sha1_init(struct crypto_aead *tfm)
  864. {
  865. int rc;
  866. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  867. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  868. rc = _qcrypto_aead_cra_init(tfm);
  869. ctx->auth_alg = QCE_HASH_SHA1_HMAC;
  870. return rc;
  871. }
  872. static int _qcrypto_cra_aead_sha256_init(struct crypto_aead *tfm)
  873. {
  874. int rc;
  875. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  876. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  877. rc = _qcrypto_aead_cra_init(tfm);
  878. ctx->auth_alg = QCE_HASH_SHA256_HMAC;
  879. return rc;
  880. }
  881. static int _qcrypto_cra_aead_ccm_init(struct crypto_aead *tfm)
  882. {
  883. int rc;
  884. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  885. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  886. rc = _qcrypto_aead_cra_init(tfm);
  887. ctx->auth_alg = QCE_HASH_AES_CMAC;
  888. return rc;
  889. }
  890. static int _qcrypto_cra_aead_rfc4309_ccm_init(struct crypto_aead *tfm)
  891. {
  892. int rc;
  893. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  894. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  895. rc = _qcrypto_aead_cra_init(tfm);
  896. ctx->auth_alg = QCE_HASH_AES_CMAC;
  897. return rc;
  898. }
  899. static int _qcrypto_cra_aead_aes_sha1_init(struct crypto_aead *tfm)
  900. {
  901. int rc;
  902. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  903. struct crypto_priv *cp = &qcrypto_dev;
  904. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  905. rc = _qcrypto_aead_cra_init(tfm);
  906. if (rc)
  907. return rc;
  908. ctx->cipher_aes192_fb = NULL;
  909. ctx->ahash_aead_aes192_fb = NULL;
  910. if (!cp->ce_support.aes_key_192) {
  911. ctx->cipher_aes192_fb = crypto_alloc_sync_skcipher(
  912. "cbc(aes)", 0, 0);
  913. if (IS_ERR(ctx->cipher_aes192_fb)) {
  914. ctx->cipher_aes192_fb = NULL;
  915. } else {
  916. ctx->ahash_aead_aes192_fb = crypto_alloc_ahash(
  917. "hmac(sha1)", 0, 0);
  918. if (IS_ERR(ctx->ahash_aead_aes192_fb)) {
  919. ctx->ahash_aead_aes192_fb = NULL;
  920. crypto_free_sync_skcipher(
  921. ctx->cipher_aes192_fb);
  922. ctx->cipher_aes192_fb = NULL;
  923. }
  924. }
  925. }
  926. ctx->auth_alg = QCE_HASH_SHA1_HMAC;
  927. return 0;
  928. }
  929. static int _qcrypto_cra_aead_aes_sha256_init(struct crypto_aead *tfm)
  930. {
  931. int rc;
  932. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  933. struct crypto_priv *cp = &qcrypto_dev;
  934. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  935. rc = _qcrypto_aead_cra_init(tfm);
  936. if (rc)
  937. return rc;
  938. ctx->cipher_aes192_fb = NULL;
  939. ctx->ahash_aead_aes192_fb = NULL;
  940. if (!cp->ce_support.aes_key_192) {
  941. ctx->cipher_aes192_fb = crypto_alloc_sync_skcipher(
  942. "cbc(aes)", 0, 0);
  943. if (IS_ERR(ctx->cipher_aes192_fb)) {
  944. ctx->cipher_aes192_fb = NULL;
  945. } else {
  946. ctx->ahash_aead_aes192_fb = crypto_alloc_ahash(
  947. "hmac(sha256)", 0, 0);
  948. if (IS_ERR(ctx->ahash_aead_aes192_fb)) {
  949. ctx->ahash_aead_aes192_fb = NULL;
  950. crypto_free_sync_skcipher(
  951. ctx->cipher_aes192_fb);
  952. ctx->cipher_aes192_fb = NULL;
  953. }
  954. }
  955. }
  956. ctx->auth_alg = QCE_HASH_SHA256_HMAC;
  957. return 0;
  958. }
  959. static void _qcrypto_skcipher_exit(struct crypto_skcipher *tfm)
  960. {
  961. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  962. if (!list_empty(&ctx->rsp_queue))
  963. pr_err("_qcrypto__cra_skcipher_exit: requests still outstanding\n");
  964. }
  965. static void _qcrypto_aes_skcipher_exit(struct crypto_skcipher *tfm)
  966. {
  967. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  968. _qcrypto_skcipher_exit(tfm);
  969. if (ctx->cipher_aes192_fb)
  970. crypto_free_sync_skcipher(ctx->cipher_aes192_fb);
  971. ctx->cipher_aes192_fb = NULL;
  972. }
  973. static void _qcrypto_cra_aead_exit(struct crypto_aead *tfm)
  974. {
  975. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  976. if (!list_empty(&ctx->rsp_queue))
  977. pr_err("_qcrypto__cra_aead_exit: requests still outstanding\n");
  978. }
  979. static void _qcrypto_cra_aead_aes_exit(struct crypto_aead *tfm)
  980. {
  981. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  982. if (!list_empty(&ctx->rsp_queue))
  983. pr_err("_qcrypto__cra_aead_exit: requests still outstanding\n");
  984. if (ctx->cipher_aes192_fb)
  985. crypto_free_sync_skcipher(ctx->cipher_aes192_fb);
  986. if (ctx->ahash_aead_aes192_fb)
  987. crypto_free_ahash(ctx->ahash_aead_aes192_fb);
  988. ctx->cipher_aes192_fb = NULL;
  989. ctx->ahash_aead_aes192_fb = NULL;
  990. }
  991. static int _disp_stats(int id)
  992. {
  993. struct crypto_stat *pstat;
  994. int len = 0;
  995. unsigned long flags;
  996. struct crypto_priv *cp = &qcrypto_dev;
  997. struct crypto_engine *pe;
  998. int i;
  999. pstat = &_qcrypto_stat;
  1000. len = scnprintf(_debug_read_buf, DEBUG_MAX_RW_BUF - 1,
  1001. "\nQTI crypto accelerator %d Statistics\n",
  1002. id + 1);
  1003. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1004. " SK CIPHER AES encryption : %llu\n",
  1005. pstat->sk_cipher_aes_enc);
  1006. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1007. " SK CIPHER AES decryption : %llu\n",
  1008. pstat->sk_cipher_aes_dec);
  1009. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1010. " SK CIPHER DES encryption : %llu\n",
  1011. pstat->sk_cipher_des_enc);
  1012. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1013. " SK CIPHER DES decryption : %llu\n",
  1014. pstat->sk_cipher_des_dec);
  1015. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1016. " SK CIPHER 3DES encryption : %llu\n",
  1017. pstat->sk_cipher_3des_enc);
  1018. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1019. " SK CIPHER 3DES decryption : %llu\n",
  1020. pstat->sk_cipher_3des_dec);
  1021. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1022. " SK CIPHER operation success : %llu\n",
  1023. pstat->sk_cipher_op_success);
  1024. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1025. " SK CIPHER operation fail : %llu\n",
  1026. pstat->sk_cipher_op_fail);
  1027. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1028. "\n");
  1029. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1030. " AEAD SHA1-AES encryption : %llu\n",
  1031. pstat->aead_sha1_aes_enc);
  1032. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1033. " AEAD SHA1-AES decryption : %llu\n",
  1034. pstat->aead_sha1_aes_dec);
  1035. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1036. " AEAD SHA1-DES encryption : %llu\n",
  1037. pstat->aead_sha1_des_enc);
  1038. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1039. " AEAD SHA1-DES decryption : %llu\n",
  1040. pstat->aead_sha1_des_dec);
  1041. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1042. " AEAD SHA1-3DES encryption : %llu\n",
  1043. pstat->aead_sha1_3des_enc);
  1044. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1045. " AEAD SHA1-3DES decryption : %llu\n",
  1046. pstat->aead_sha1_3des_dec);
  1047. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1048. " AEAD SHA256-AES encryption : %llu\n",
  1049. pstat->aead_sha256_aes_enc);
  1050. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1051. " AEAD SHA256-AES decryption : %llu\n",
  1052. pstat->aead_sha256_aes_dec);
  1053. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1054. " AEAD SHA256-DES encryption : %llu\n",
  1055. pstat->aead_sha256_des_enc);
  1056. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1057. " AEAD SHA256-DES decryption : %llu\n",
  1058. pstat->aead_sha256_des_dec);
  1059. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1060. " AEAD SHA256-3DES encryption : %llu\n",
  1061. pstat->aead_sha256_3des_enc);
  1062. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1063. " AEAD SHA256-3DES decryption : %llu\n",
  1064. pstat->aead_sha256_3des_dec);
  1065. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1066. " AEAD CCM-AES encryption : %llu\n",
  1067. pstat->aead_ccm_aes_enc);
  1068. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1069. " AEAD CCM-AES decryption : %llu\n",
  1070. pstat->aead_ccm_aes_dec);
  1071. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1072. " AEAD RFC4309-CCM-AES encryption : %llu\n",
  1073. pstat->aead_rfc4309_ccm_aes_enc);
  1074. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1075. " AEAD RFC4309-CCM-AES decryption : %llu\n",
  1076. pstat->aead_rfc4309_ccm_aes_dec);
  1077. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1078. " AEAD operation success : %llu\n",
  1079. pstat->aead_op_success);
  1080. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1081. " AEAD operation fail : %llu\n",
  1082. pstat->aead_op_fail);
  1083. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1084. " AEAD bad message : %llu\n",
  1085. pstat->aead_bad_msg);
  1086. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1087. "\n");
  1088. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1089. " AHASH SHA1 digest : %llu\n",
  1090. pstat->sha1_digest);
  1091. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1092. " AHASH SHA256 digest : %llu\n",
  1093. pstat->sha256_digest);
  1094. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1095. " AHASH SHA1 HMAC digest : %llu\n",
  1096. pstat->sha1_hmac_digest);
  1097. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1098. " AHASH SHA256 HMAC digest : %llu\n",
  1099. pstat->sha256_hmac_digest);
  1100. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1101. " AHASH operation success : %llu\n",
  1102. pstat->ahash_op_success);
  1103. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1104. " AHASH operation fail : %llu\n",
  1105. pstat->ahash_op_fail);
  1106. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1107. " resp start, resp stop, max rsp queue reorder-cnt : %u %u %u %u\n",
  1108. cp->resp_start, cp->resp_stop,
  1109. cp->max_resp_qlen, cp->max_reorder_cnt);
  1110. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1111. " max queue length, no avail : %u %u\n",
  1112. cp->max_qlen, cp->no_avail);
  1113. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1114. " work queue : %u %u %u\n",
  1115. cp->queue_work_eng3,
  1116. cp->queue_work_not_eng3,
  1117. cp->queue_work_not_eng3_nz);
  1118. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1119. "\n");
  1120. spin_lock_irqsave(&cp->lock, flags);
  1121. list_for_each_entry(pe, &cp->engine_list, elist) {
  1122. len += scnprintf(
  1123. _debug_read_buf + len,
  1124. DEBUG_MAX_RW_BUF - len - 1,
  1125. " Engine %4d Req max %d : %llu\n",
  1126. pe->unit,
  1127. pe->max_req_used,
  1128. pe->total_req
  1129. );
  1130. len += scnprintf(
  1131. _debug_read_buf + len,
  1132. DEBUG_MAX_RW_BUF - len - 1,
  1133. " Engine %4d Req Error : %llu\n",
  1134. pe->unit,
  1135. pe->err_req
  1136. );
  1137. qce_get_driver_stats(pe->qce);
  1138. }
  1139. spin_unlock_irqrestore(&cp->lock, flags);
  1140. for (i = 0; i < MAX_SMP_CPU+1; i++)
  1141. if (cp->cpu_req[i])
  1142. len += scnprintf(
  1143. _debug_read_buf + len,
  1144. DEBUG_MAX_RW_BUF - len - 1,
  1145. "CPU %d Issue Req : %d\n",
  1146. i, cp->cpu_req[i]);
  1147. return len;
  1148. }
  1149. static void _qcrypto_remove_engine(struct crypto_engine *pengine)
  1150. {
  1151. struct crypto_priv *cp;
  1152. struct qcrypto_alg *q_alg;
  1153. struct qcrypto_alg *n;
  1154. unsigned long flags;
  1155. struct crypto_engine *pe;
  1156. cp = pengine->pcp;
  1157. spin_lock_irqsave(&cp->lock, flags);
  1158. list_del(&pengine->elist);
  1159. if (pengine->first_engine) {
  1160. cp->first_engine = NULL;
  1161. pe = list_first_entry(&cp->engine_list, struct crypto_engine,
  1162. elist);
  1163. if (pe) {
  1164. pe->first_engine = true;
  1165. cp->first_engine = pe;
  1166. }
  1167. }
  1168. if (cp->next_engine == pengine)
  1169. cp->next_engine = NULL;
  1170. if (cp->scheduled_eng == pengine)
  1171. cp->scheduled_eng = NULL;
  1172. spin_unlock_irqrestore(&cp->lock, flags);
  1173. cp->total_units--;
  1174. cancel_work_sync(&pengine->bw_reaper_ws);
  1175. cancel_work_sync(&pengine->bw_allocate_ws);
  1176. del_timer_sync(&pengine->bw_reaper_timer);
  1177. if (pengine->icc_path)
  1178. icc_put(pengine->icc_path);
  1179. pengine->icc_path = NULL;
  1180. kfree_sensitive(pengine->preq_pool);
  1181. if (cp->total_units)
  1182. return;
  1183. list_for_each_entry_safe(q_alg, n, &cp->alg_list, entry) {
  1184. if (q_alg->alg_type == QCRYPTO_ALG_CIPHER)
  1185. crypto_unregister_skcipher(&q_alg->cipher_alg);
  1186. if (q_alg->alg_type == QCRYPTO_ALG_SHA)
  1187. crypto_unregister_ahash(&q_alg->sha_alg);
  1188. if (q_alg->alg_type == QCRYPTO_ALG_AEAD)
  1189. crypto_unregister_aead(&q_alg->aead_alg);
  1190. list_del(&q_alg->entry);
  1191. kfree_sensitive(q_alg);
  1192. }
  1193. }
  1194. static int _qcrypto_remove(struct platform_device *pdev)
  1195. {
  1196. struct crypto_engine *pengine;
  1197. struct crypto_priv *cp;
  1198. pengine = platform_get_drvdata(pdev);
  1199. if (!pengine)
  1200. return 0;
  1201. cp = pengine->pcp;
  1202. mutex_lock(&cp->engine_lock);
  1203. _qcrypto_remove_engine(pengine);
  1204. mutex_unlock(&cp->engine_lock);
  1205. if (pengine->qce)
  1206. qce_close(pengine->qce);
  1207. kfree_sensitive(pengine);
  1208. return 0;
  1209. }
  1210. static int _qcrypto_check_aes_keylen(struct crypto_priv *cp, unsigned int len)
  1211. {
  1212. switch (len) {
  1213. case AES_KEYSIZE_128:
  1214. case AES_KEYSIZE_256:
  1215. break;
  1216. case AES_KEYSIZE_192:
  1217. if (cp->ce_support.aes_key_192)
  1218. break;
  1219. else
  1220. return -EINVAL;
  1221. default:
  1222. //crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  1223. return -EINVAL;
  1224. }
  1225. return 0;
  1226. }
  1227. static int _qcrypto_setkey_aes_192_fallback(struct crypto_skcipher *tfm,
  1228. const u8 *key)
  1229. {
  1230. //struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher);
  1231. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  1232. int ret;
  1233. ctx->enc_key_len = AES_KEYSIZE_192;
  1234. crypto_sync_skcipher_clear_flags(ctx->cipher_aes192_fb,
  1235. CRYPTO_TFM_REQ_MASK);
  1236. crypto_sync_skcipher_set_flags(ctx->cipher_aes192_fb,
  1237. (crypto_skcipher_get_flags(tfm) & CRYPTO_TFM_REQ_MASK));
  1238. ret = crypto_sync_skcipher_setkey(ctx->cipher_aes192_fb, key,
  1239. AES_KEYSIZE_192);
  1240. /*
  1241. * TODO: delete or find equivalent in new crypto_skcipher api
  1242. if (ret) {
  1243. tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK;
  1244. tfm->crt_flags |=
  1245. (cipher->base.crt_flags & CRYPTO_TFM_RES_MASK);
  1246. }
  1247. */
  1248. return ret;
  1249. }
  1250. static int _qcrypto_setkey_aes(struct crypto_skcipher *tfm, const u8 *key,
  1251. unsigned int keylen)
  1252. {
  1253. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  1254. struct crypto_priv *cp = ctx->cp;
  1255. if ((ctx->flags & QCRYPTO_CTX_USE_HW_KEY) == QCRYPTO_CTX_USE_HW_KEY)
  1256. return 0;
  1257. if ((keylen == AES_KEYSIZE_192) && (!cp->ce_support.aes_key_192)
  1258. && ctx->cipher_aes192_fb)
  1259. return _qcrypto_setkey_aes_192_fallback(tfm, key);
  1260. if (_qcrypto_check_aes_keylen(cp, keylen))
  1261. return -EINVAL;
  1262. ctx->enc_key_len = keylen;
  1263. if (!(ctx->flags & QCRYPTO_CTX_USE_PIPE_KEY)) {
  1264. if (key != NULL) {
  1265. memcpy(ctx->enc_key, key, keylen);
  1266. } else {
  1267. pr_err("%s Invalid key pointer\n", __func__);
  1268. return -EINVAL;
  1269. }
  1270. }
  1271. return 0;
  1272. }
  1273. static int _qcrypto_setkey_aes_xts(struct crypto_skcipher *tfm,
  1274. const u8 *key, unsigned int keylen)
  1275. {
  1276. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  1277. struct crypto_priv *cp = ctx->cp;
  1278. if ((ctx->flags & QCRYPTO_CTX_USE_HW_KEY) == QCRYPTO_CTX_USE_HW_KEY)
  1279. return 0;
  1280. if (_qcrypto_check_aes_keylen(cp, keylen/2))
  1281. return -EINVAL;
  1282. ctx->enc_key_len = keylen;
  1283. if (!(ctx->flags & QCRYPTO_CTX_USE_PIPE_KEY)) {
  1284. if (key != NULL) {
  1285. memcpy(ctx->enc_key, key, keylen);
  1286. } else {
  1287. pr_err("%s Invalid key pointer\n", __func__);
  1288. return -EINVAL;
  1289. }
  1290. }
  1291. return 0;
  1292. }
  1293. static int _qcrypto_setkey_des(struct crypto_skcipher *tfm, const u8 *key,
  1294. unsigned int keylen)
  1295. {
  1296. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  1297. struct des_ctx dctx;
  1298. if (!key) {
  1299. pr_err("%s Invalid key pointer\n", __func__);
  1300. return -EINVAL;
  1301. }
  1302. if ((ctx->flags & QCRYPTO_CTX_USE_HW_KEY) == QCRYPTO_CTX_USE_HW_KEY) {
  1303. pr_err("%s HW KEY usage not supported for DES algorithm\n", __func__);
  1304. return 0;
  1305. }
  1306. if (keylen != DES_KEY_SIZE) {
  1307. //crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  1308. return -EINVAL;
  1309. }
  1310. memset(&dctx, 0, sizeof(dctx));
  1311. /*Need to be fixed. Compilation error was seen with the below API.
  1312. Needs to be uncommented and enable
  1313. if (des_expand_key(&dctx, key, keylen) == -ENOKEY) {
  1314. if (crypto_skcipher_get_flags(tfm) & CRYPTO_TFM_REQ_FORBID_WEAK_KEYS)
  1315. return -EINVAL;
  1316. else
  1317. return 0;
  1318. }*/
  1319. /*
  1320. * TODO: delete of find equivalent in skcipher api
  1321. if (ret) {
  1322. tfm->crt_flags |= CRYPTO_TFM_RES_WEAK_KEY;
  1323. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_WEAK_KEY);
  1324. return -EINVAL;
  1325. }
  1326. */
  1327. ctx->enc_key_len = keylen;
  1328. if (!(ctx->flags & QCRYPTO_CTX_USE_PIPE_KEY))
  1329. memcpy(ctx->enc_key, key, keylen);
  1330. return 0;
  1331. }
  1332. static int _qcrypto_setkey_3des(struct crypto_skcipher *tfm, const u8 *key,
  1333. unsigned int keylen)
  1334. {
  1335. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  1336. if ((ctx->flags & QCRYPTO_CTX_USE_HW_KEY) == QCRYPTO_CTX_USE_HW_KEY) {
  1337. pr_err("%s HW KEY usage not supported for 3DES algorithm\n", __func__);
  1338. return 0;
  1339. }
  1340. if (keylen != DES3_EDE_KEY_SIZE) {
  1341. //crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  1342. return -EINVAL;
  1343. }
  1344. ctx->enc_key_len = keylen;
  1345. if (!(ctx->flags & QCRYPTO_CTX_USE_PIPE_KEY)) {
  1346. if (key != NULL) {
  1347. memcpy(ctx->enc_key, key, keylen);
  1348. } else {
  1349. pr_err("%s Invalid key pointer\n", __func__);
  1350. return -EINVAL;
  1351. }
  1352. }
  1353. return 0;
  1354. }
  1355. static void seq_response(struct work_struct *work)
  1356. {
  1357. struct crypto_priv *cp = container_of(work, struct crypto_priv,
  1358. resp_work);
  1359. struct llist_node *list;
  1360. struct llist_node *rev = NULL;
  1361. struct crypto_engine *pengine;
  1362. unsigned long flags;
  1363. int total_unit;
  1364. again:
  1365. list = llist_del_all(&cp->ordered_resp_list);
  1366. if (!list)
  1367. goto end;
  1368. while (list) {
  1369. struct llist_node *t = list;
  1370. list = llist_next(list);
  1371. t->next = rev;
  1372. rev = t;
  1373. }
  1374. while (rev) {
  1375. struct qcrypto_resp_ctx *arsp;
  1376. struct crypto_async_request *areq;
  1377. arsp = container_of(rev, struct qcrypto_resp_ctx, llist);
  1378. rev = llist_next(rev);
  1379. areq = arsp->async_req;
  1380. local_bh_disable();
  1381. areq->complete(areq, arsp->res);
  1382. local_bh_enable();
  1383. atomic_dec(&cp->resp_cnt);
  1384. }
  1385. if (atomic_read(&cp->resp_cnt) < COMPLETION_CB_BACKLOG_LENGTH_START &&
  1386. (cmpxchg(&cp->ce_req_proc_sts, STOPPED, IN_PROGRESS)
  1387. == STOPPED)) {
  1388. cp->resp_start++;
  1389. for (total_unit = cp->total_units; total_unit-- > 0;) {
  1390. spin_lock_irqsave(&cp->lock, flags);
  1391. pengine = _avail_eng(cp);
  1392. spin_unlock_irqrestore(&cp->lock, flags);
  1393. if (pengine)
  1394. _start_qcrypto_process(cp, pengine);
  1395. else
  1396. break;
  1397. }
  1398. }
  1399. end:
  1400. if (cmpxchg(&cp->sched_resp_workq_status, SCHEDULE_AGAIN,
  1401. IS_SCHEDULED) == SCHEDULE_AGAIN)
  1402. goto again;
  1403. else if (cmpxchg(&cp->sched_resp_workq_status, IS_SCHEDULED,
  1404. NOT_SCHEDULED) == SCHEDULE_AGAIN)
  1405. goto end;
  1406. }
  1407. #define SCHEUDLE_RSP_QLEN_THRESHOLD 64
  1408. static void _qcrypto_tfm_complete(struct crypto_engine *pengine, u32 type,
  1409. void *tfm_ctx,
  1410. struct qcrypto_resp_ctx *cur_arsp,
  1411. int res)
  1412. {
  1413. struct crypto_priv *cp = pengine->pcp;
  1414. unsigned long flags;
  1415. struct qcrypto_resp_ctx *arsp;
  1416. struct list_head *plist;
  1417. unsigned int resp_qlen;
  1418. unsigned int cnt = 0;
  1419. switch (type) {
  1420. case CRYPTO_ALG_TYPE_AHASH:
  1421. plist = &((struct qcrypto_sha_ctx *) tfm_ctx)->rsp_queue;
  1422. break;
  1423. case CRYPTO_ALG_TYPE_SKCIPHER:
  1424. case CRYPTO_ALG_TYPE_AEAD:
  1425. default:
  1426. plist = &((struct qcrypto_cipher_ctx *) tfm_ctx)->rsp_queue;
  1427. break;
  1428. }
  1429. spin_lock_irqsave(&cp->lock, flags);
  1430. cur_arsp->res = res;
  1431. while (!list_empty(plist)) {
  1432. arsp = list_first_entry(plist,
  1433. struct qcrypto_resp_ctx, list);
  1434. if (arsp->res == -EINPROGRESS)
  1435. break;
  1436. list_del(&arsp->list);
  1437. llist_add(&arsp->llist, &cp->ordered_resp_list);
  1438. atomic_inc(&cp->resp_cnt);
  1439. cnt++;
  1440. }
  1441. resp_qlen = atomic_read(&cp->resp_cnt);
  1442. if (resp_qlen > cp->max_resp_qlen)
  1443. cp->max_resp_qlen = resp_qlen;
  1444. if (cnt > cp->max_reorder_cnt)
  1445. cp->max_reorder_cnt = cnt;
  1446. if ((resp_qlen >= COMPLETION_CB_BACKLOG_LENGTH_STOP) &&
  1447. cmpxchg(&cp->ce_req_proc_sts, IN_PROGRESS,
  1448. STOPPED) == IN_PROGRESS) {
  1449. cp->resp_stop++;
  1450. }
  1451. spin_unlock_irqrestore(&cp->lock, flags);
  1452. retry:
  1453. if (!llist_empty(&cp->ordered_resp_list)) {
  1454. unsigned int cpu;
  1455. if (pengine->first_engine) {
  1456. cpu = WORK_CPU_UNBOUND;
  1457. cp->queue_work_eng3++;
  1458. } else {
  1459. cp->queue_work_not_eng3++;
  1460. cpu = cp->cpu_getting_irqs_frm_first_ce;
  1461. /*
  1462. * If source not the first engine, and there
  1463. * are outstanding requests going on first engine,
  1464. * skip scheduling of work queue to anticipate
  1465. * more may be coming. If the response queue
  1466. * length exceeds threshold, to avoid further
  1467. * delay, schedule work queue immediately.
  1468. */
  1469. if (cp->first_engine && atomic_read(
  1470. &cp->first_engine->req_count)) {
  1471. if (resp_qlen < SCHEUDLE_RSP_QLEN_THRESHOLD)
  1472. return;
  1473. cp->queue_work_not_eng3_nz++;
  1474. }
  1475. }
  1476. if (cmpxchg(&cp->sched_resp_workq_status, NOT_SCHEDULED,
  1477. IS_SCHEDULED) == NOT_SCHEDULED)
  1478. queue_work_on(cpu, cp->resp_wq, &cp->resp_work);
  1479. else if (cmpxchg(&cp->sched_resp_workq_status, IS_SCHEDULED,
  1480. SCHEDULE_AGAIN) == NOT_SCHEDULED)
  1481. goto retry;
  1482. }
  1483. }
  1484. static void req_done(struct qcrypto_req_control *pqcrypto_req_control)
  1485. {
  1486. struct crypto_engine *pengine;
  1487. struct crypto_async_request *areq;
  1488. struct crypto_priv *cp;
  1489. struct qcrypto_resp_ctx *arsp;
  1490. u32 type = 0;
  1491. void *tfm_ctx = NULL;
  1492. unsigned int cpu;
  1493. int res;
  1494. pengine = pqcrypto_req_control->pce;
  1495. cp = pengine->pcp;
  1496. areq = pqcrypto_req_control->req;
  1497. arsp = pqcrypto_req_control->arsp;
  1498. res = pqcrypto_req_control->res;
  1499. qcrypto_free_req_control(pengine, pqcrypto_req_control);
  1500. if (areq) {
  1501. type = crypto_tfm_alg_type(areq->tfm);
  1502. tfm_ctx = crypto_tfm_ctx(areq->tfm);
  1503. }
  1504. cpu = smp_processor_id();
  1505. pengine->irq_cpu = cpu;
  1506. if (pengine->first_engine) {
  1507. if (cpu != cp->cpu_getting_irqs_frm_first_ce)
  1508. cp->cpu_getting_irqs_frm_first_ce = cpu;
  1509. }
  1510. if (areq)
  1511. _qcrypto_tfm_complete(pengine, type, tfm_ctx, arsp, res);
  1512. if (READ_ONCE(cp->ce_req_proc_sts) == IN_PROGRESS)
  1513. _start_qcrypto_process(cp, pengine);
  1514. }
  1515. static void _qce_ahash_complete(void *cookie, unsigned char *digest,
  1516. unsigned char *authdata, int ret)
  1517. {
  1518. struct ahash_request *areq = (struct ahash_request *) cookie;
  1519. struct crypto_async_request *async_req;
  1520. struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
  1521. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(areq->base.tfm);
  1522. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(areq);
  1523. struct crypto_priv *cp = sha_ctx->cp;
  1524. struct crypto_stat *pstat;
  1525. uint32_t diglen = crypto_ahash_digestsize(ahash);
  1526. uint32_t *auth32 = (uint32_t *)authdata;
  1527. struct crypto_engine *pengine;
  1528. struct qcrypto_req_control *pqcrypto_req_control;
  1529. async_req = &areq->base;
  1530. pstat = &_qcrypto_stat;
  1531. pengine = rctx->pengine;
  1532. pqcrypto_req_control = find_req_control_for_areq(pengine,
  1533. async_req);
  1534. if (pqcrypto_req_control == NULL) {
  1535. pr_err("async request not found\n");
  1536. return;
  1537. }
  1538. #ifdef QCRYPTO_DEBUG
  1539. dev_info(&pengine->pdev->dev, "%s: %pK ret %d\n",
  1540. __func__, areq, ret);
  1541. #endif
  1542. if (digest) {
  1543. memcpy(rctx->digest, digest, diglen);
  1544. if (rctx->last_blk)
  1545. memcpy(areq->result, digest, diglen);
  1546. }
  1547. if (authdata) {
  1548. rctx->byte_count[0] = auth32[0];
  1549. rctx->byte_count[1] = auth32[1];
  1550. rctx->byte_count[2] = auth32[2];
  1551. rctx->byte_count[3] = auth32[3];
  1552. }
  1553. areq->src = rctx->src;
  1554. areq->nbytes = rctx->nbytes;
  1555. rctx->last_blk = 0;
  1556. rctx->first_blk = 0;
  1557. if (ret) {
  1558. pqcrypto_req_control->res = -ENXIO;
  1559. pstat->ahash_op_fail++;
  1560. } else {
  1561. pqcrypto_req_control->res = 0;
  1562. pstat->ahash_op_success++;
  1563. }
  1564. if (cp->ce_support.aligned_only) {
  1565. areq->src = rctx->orig_src;
  1566. kfree(rctx->data);
  1567. }
  1568. req_done(pqcrypto_req_control);
  1569. }
  1570. static void _qce_sk_cipher_complete(void *cookie, unsigned char *icb,
  1571. unsigned char *iv, int ret)
  1572. {
  1573. struct skcipher_request *areq = (struct skcipher_request *) cookie;
  1574. struct crypto_async_request *async_req;
  1575. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
  1576. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  1577. struct crypto_priv *cp = ctx->cp;
  1578. struct crypto_stat *pstat;
  1579. struct qcrypto_cipher_req_ctx *rctx;
  1580. struct crypto_engine *pengine;
  1581. struct qcrypto_req_control *pqcrypto_req_control;
  1582. async_req = &areq->base;
  1583. pstat = &_qcrypto_stat;
  1584. rctx = skcipher_request_ctx(areq);
  1585. pengine = rctx->pengine;
  1586. pqcrypto_req_control = find_req_control_for_areq(pengine,
  1587. async_req);
  1588. if (pqcrypto_req_control == NULL) {
  1589. pr_err("async request not found\n");
  1590. return;
  1591. }
  1592. #ifdef QCRYPTO_DEBUG
  1593. dev_info(&pengine->pdev->dev, "%s: %pK ret %d\n",
  1594. __func__, areq, ret);
  1595. #endif
  1596. if (iv)
  1597. memcpy(ctx->iv, iv, crypto_skcipher_ivsize(tfm));
  1598. if (ret) {
  1599. pqcrypto_req_control->res = -ENXIO;
  1600. pstat->sk_cipher_op_fail++;
  1601. } else {
  1602. pqcrypto_req_control->res = 0;
  1603. pstat->sk_cipher_op_success++;
  1604. }
  1605. if (cp->ce_support.aligned_only) {
  1606. struct qcrypto_cipher_req_ctx *rctx;
  1607. uint32_t num_sg = 0;
  1608. uint32_t bytes = 0;
  1609. rctx = skcipher_request_ctx(areq);
  1610. areq->src = rctx->orig_src;
  1611. areq->dst = rctx->orig_dst;
  1612. num_sg = qcrypto_count_sg(areq->dst, areq->cryptlen);
  1613. bytes = qcrypto_sg_copy_from_buffer(areq->dst, num_sg,
  1614. rctx->data, areq->cryptlen);
  1615. if (bytes != areq->cryptlen)
  1616. pr_warn("bytes copied=0x%x bytes to copy= 0x%x\n",
  1617. bytes, areq->cryptlen);
  1618. kfree_sensitive(rctx->data);
  1619. }
  1620. req_done(pqcrypto_req_control);
  1621. }
  1622. static void _qce_aead_complete(void *cookie, unsigned char *icv,
  1623. unsigned char *iv, int ret)
  1624. {
  1625. struct aead_request *areq = (struct aead_request *) cookie;
  1626. struct crypto_async_request *async_req;
  1627. struct crypto_aead *aead = crypto_aead_reqtfm(areq);
  1628. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(areq->base.tfm);
  1629. struct qcrypto_cipher_req_ctx *rctx;
  1630. struct crypto_stat *pstat;
  1631. struct crypto_engine *pengine;
  1632. struct qcrypto_req_control *pqcrypto_req_control;
  1633. async_req = &areq->base;
  1634. pstat = &_qcrypto_stat;
  1635. rctx = aead_request_ctx(areq);
  1636. pengine = rctx->pengine;
  1637. pqcrypto_req_control = find_req_control_for_areq(pengine,
  1638. async_req);
  1639. if (pqcrypto_req_control == NULL) {
  1640. pr_err("async request not found\n");
  1641. return;
  1642. }
  1643. if (rctx->mode == QCE_MODE_CCM) {
  1644. kfree_sensitive(rctx->adata);
  1645. } else {
  1646. uint32_t ivsize = crypto_aead_ivsize(aead);
  1647. if (ret == 0) {
  1648. if (rctx->dir == QCE_ENCRYPT) {
  1649. /* copy the icv to dst */
  1650. scatterwalk_map_and_copy(icv, areq->dst,
  1651. areq->cryptlen + areq->assoclen,
  1652. ctx->authsize, 1);
  1653. } else {
  1654. unsigned char tmp[SHA256_DIGESTSIZE] = {0};
  1655. /* compare icv from src */
  1656. scatterwalk_map_and_copy(tmp,
  1657. areq->src, areq->assoclen +
  1658. areq->cryptlen - ctx->authsize,
  1659. ctx->authsize, 0);
  1660. ret = memcmp(icv, tmp, ctx->authsize);
  1661. if (ret != 0)
  1662. ret = -EBADMSG;
  1663. }
  1664. } else {
  1665. ret = -ENXIO;
  1666. }
  1667. if (iv)
  1668. memcpy(ctx->iv, iv, ivsize);
  1669. }
  1670. if (ret == (-EBADMSG))
  1671. pstat->aead_bad_msg++;
  1672. else if (ret)
  1673. pstat->aead_op_fail++;
  1674. else
  1675. pstat->aead_op_success++;
  1676. pqcrypto_req_control->res = ret;
  1677. req_done(pqcrypto_req_control);
  1678. }
  1679. static int aead_ccm_set_msg_len(u8 *block, unsigned int msglen, int csize)
  1680. {
  1681. __be32 data;
  1682. memset(block, 0, csize);
  1683. block += csize;
  1684. if (csize >= 4)
  1685. csize = 4;
  1686. else if (msglen > (1 << (8 * csize)))
  1687. return -EOVERFLOW;
  1688. data = cpu_to_be32(msglen);
  1689. memcpy(block - csize, (u8 *)&data + 4 - csize, csize);
  1690. return 0;
  1691. }
  1692. static int qccrypto_set_aead_ccm_nonce(struct qce_req *qreq, uint32_t assoclen)
  1693. {
  1694. unsigned int i = ((unsigned int)qreq->iv[0]) + 1;
  1695. memcpy(&qreq->nonce[0], qreq->iv, qreq->ivsize);
  1696. /*
  1697. * Format control info per RFC 3610 and
  1698. * NIST Special Publication 800-38C
  1699. */
  1700. qreq->nonce[0] |= (8 * ((qreq->authsize - 2) / 2));
  1701. if (assoclen)
  1702. qreq->nonce[0] |= 64;
  1703. if (i > MAX_NONCE)
  1704. return -EINVAL;
  1705. return aead_ccm_set_msg_len(qreq->nonce + 16 - i, qreq->cryptlen, i);
  1706. }
  1707. static int qcrypto_aead_ccm_format_adata(struct qce_req *qreq, uint32_t alen,
  1708. struct scatterlist *sg, unsigned char *adata)
  1709. {
  1710. uint32_t len;
  1711. uint32_t bytes = 0;
  1712. uint32_t num_sg = 0;
  1713. /*
  1714. * Add control info for associated data
  1715. * RFC 3610 and NIST Special Publication 800-38C
  1716. */
  1717. if (alen < 65280) {
  1718. *(__be16 *)adata = cpu_to_be16(alen);
  1719. len = 2;
  1720. } else {
  1721. if ((alen >= 65280) && (alen <= 0xffffffff)) {
  1722. *(__be16 *)adata = cpu_to_be16(0xfffe);
  1723. *(__be32 *)&adata[2] = cpu_to_be32(alen);
  1724. len = 6;
  1725. } else {
  1726. *(__be16 *)adata = cpu_to_be16(0xffff);
  1727. *(__be32 *)&adata[6] = cpu_to_be32(alen);
  1728. len = 10;
  1729. }
  1730. }
  1731. adata += len;
  1732. qreq->assoclen = ALIGN((alen + len), 16);
  1733. num_sg = qcrypto_count_sg(sg, alen);
  1734. bytes = qcrypto_sg_copy_to_buffer(sg, num_sg, adata, alen);
  1735. if (bytes != alen)
  1736. pr_warn("bytes copied=0x%x bytes to copy= 0x%x\n", bytes, alen);
  1737. return 0;
  1738. }
  1739. static int _qcrypto_process_skcipher(struct crypto_engine *pengine,
  1740. struct qcrypto_req_control *pqcrypto_req_control)
  1741. {
  1742. struct crypto_async_request *async_req;
  1743. struct qce_req qreq;
  1744. int ret;
  1745. struct qcrypto_cipher_req_ctx *rctx;
  1746. struct qcrypto_cipher_ctx *cipher_ctx;
  1747. struct skcipher_request *req;
  1748. struct crypto_skcipher *tfm;
  1749. async_req = pqcrypto_req_control->req;
  1750. req = container_of(async_req, struct skcipher_request, base);
  1751. cipher_ctx = crypto_tfm_ctx(async_req->tfm);
  1752. rctx = skcipher_request_ctx(req);
  1753. rctx->pengine = pengine;
  1754. tfm = crypto_skcipher_reqtfm(req);
  1755. if (pengine->pcp->ce_support.aligned_only) {
  1756. uint32_t bytes = 0;
  1757. uint32_t num_sg = 0;
  1758. rctx->orig_src = req->src;
  1759. rctx->orig_dst = req->dst;
  1760. rctx->data = kzalloc((req->cryptlen + 64), GFP_ATOMIC);
  1761. if (rctx->data == NULL)
  1762. return -ENOMEM;
  1763. num_sg = qcrypto_count_sg(req->src, req->cryptlen);
  1764. bytes = qcrypto_sg_copy_to_buffer(req->src, num_sg, rctx->data,
  1765. req->cryptlen);
  1766. if (bytes != req->cryptlen)
  1767. pr_warn("bytes copied=0x%x bytes to copy= 0x%x\n",
  1768. bytes, req->cryptlen);
  1769. sg_set_buf(&rctx->dsg, rctx->data, req->cryptlen);
  1770. sg_mark_end(&rctx->dsg);
  1771. rctx->iv = req->iv;
  1772. req->src = &rctx->dsg;
  1773. req->dst = &rctx->dsg;
  1774. }
  1775. qreq.op = QCE_REQ_ABLK_CIPHER; //TODO: change name in qcedev.h
  1776. qreq.qce_cb = _qce_sk_cipher_complete;
  1777. qreq.areq = req;
  1778. qreq.alg = rctx->alg;
  1779. qreq.dir = rctx->dir;
  1780. qreq.mode = rctx->mode;
  1781. qreq.enckey = cipher_ctx->enc_key;
  1782. qreq.encklen = cipher_ctx->enc_key_len;
  1783. qreq.iv = req->iv;
  1784. qreq.ivsize = crypto_skcipher_ivsize(tfm);
  1785. qreq.cryptlen = req->cryptlen;
  1786. qreq.use_pmem = 0;
  1787. qreq.flags = cipher_ctx->flags;
  1788. if ((cipher_ctx->enc_key_len == 0) &&
  1789. (pengine->pcp->platform_support.hw_key_support == 0))
  1790. ret = -EINVAL;
  1791. else
  1792. ret = qce_ablk_cipher_req(pengine->qce, &qreq); //maybe change name?
  1793. return ret;
  1794. }
  1795. static int _qcrypto_process_ahash(struct crypto_engine *pengine,
  1796. struct qcrypto_req_control *pqcrypto_req_control)
  1797. {
  1798. struct crypto_async_request *async_req;
  1799. struct ahash_request *req;
  1800. struct qce_sha_req sreq;
  1801. struct qcrypto_sha_req_ctx *rctx;
  1802. struct qcrypto_sha_ctx *sha_ctx;
  1803. int ret = 0;
  1804. async_req = pqcrypto_req_control->req;
  1805. req = container_of(async_req,
  1806. struct ahash_request, base);
  1807. rctx = ahash_request_ctx(req);
  1808. sha_ctx = crypto_tfm_ctx(async_req->tfm);
  1809. rctx->pengine = pengine;
  1810. sreq.qce_cb = _qce_ahash_complete;
  1811. sreq.digest = &rctx->digest[0];
  1812. sreq.src = req->src;
  1813. sreq.auth_data[0] = rctx->byte_count[0];
  1814. sreq.auth_data[1] = rctx->byte_count[1];
  1815. sreq.auth_data[2] = rctx->byte_count[2];
  1816. sreq.auth_data[3] = rctx->byte_count[3];
  1817. sreq.first_blk = rctx->first_blk;
  1818. sreq.last_blk = rctx->last_blk;
  1819. sreq.size = req->nbytes;
  1820. sreq.areq = req;
  1821. sreq.flags = sha_ctx->flags;
  1822. switch (sha_ctx->alg) {
  1823. case QCE_HASH_SHA1:
  1824. sreq.alg = QCE_HASH_SHA1;
  1825. sreq.authkey = NULL;
  1826. break;
  1827. case QCE_HASH_SHA256:
  1828. sreq.alg = QCE_HASH_SHA256;
  1829. sreq.authkey = NULL;
  1830. break;
  1831. case QCE_HASH_SHA1_HMAC:
  1832. sreq.alg = QCE_HASH_SHA1_HMAC;
  1833. sreq.authkey = &sha_ctx->authkey[0];
  1834. sreq.authklen = SHA_HMAC_KEY_SIZE;
  1835. break;
  1836. case QCE_HASH_SHA256_HMAC:
  1837. sreq.alg = QCE_HASH_SHA256_HMAC;
  1838. sreq.authkey = &sha_ctx->authkey[0];
  1839. sreq.authklen = SHA_HMAC_KEY_SIZE;
  1840. break;
  1841. default:
  1842. pr_err("Algorithm %d not supported, exiting\n", sha_ctx->alg);
  1843. ret = -1;
  1844. break;
  1845. }
  1846. ret = qce_process_sha_req(pengine->qce, &sreq);
  1847. return ret;
  1848. }
  1849. static int _qcrypto_process_aead(struct crypto_engine *pengine,
  1850. struct qcrypto_req_control *pqcrypto_req_control)
  1851. {
  1852. struct crypto_async_request *async_req;
  1853. struct qce_req qreq;
  1854. int ret = 0;
  1855. struct qcrypto_cipher_req_ctx *rctx;
  1856. struct qcrypto_cipher_ctx *cipher_ctx;
  1857. struct aead_request *req;
  1858. struct crypto_aead *aead;
  1859. async_req = pqcrypto_req_control->req;
  1860. req = container_of(async_req, struct aead_request, base);
  1861. aead = crypto_aead_reqtfm(req);
  1862. rctx = aead_request_ctx(req);
  1863. rctx->pengine = pengine;
  1864. cipher_ctx = crypto_tfm_ctx(async_req->tfm);
  1865. qreq.op = QCE_REQ_AEAD;
  1866. qreq.qce_cb = _qce_aead_complete;
  1867. qreq.areq = req;
  1868. qreq.alg = rctx->alg;
  1869. qreq.dir = rctx->dir;
  1870. qreq.mode = rctx->mode;
  1871. qreq.iv = rctx->iv;
  1872. qreq.enckey = cipher_ctx->enc_key;
  1873. qreq.encklen = cipher_ctx->enc_key_len;
  1874. qreq.authkey = cipher_ctx->auth_key;
  1875. qreq.authklen = cipher_ctx->auth_key_len;
  1876. qreq.authsize = crypto_aead_authsize(aead);
  1877. qreq.auth_alg = cipher_ctx->auth_alg;
  1878. if (qreq.mode == QCE_MODE_CCM)
  1879. qreq.ivsize = AES_BLOCK_SIZE;
  1880. else
  1881. qreq.ivsize = crypto_aead_ivsize(aead);
  1882. qreq.flags = cipher_ctx->flags;
  1883. if (qreq.mode == QCE_MODE_CCM) {
  1884. uint32_t assoclen;
  1885. if (qreq.dir == QCE_ENCRYPT)
  1886. qreq.cryptlen = req->cryptlen;
  1887. else
  1888. qreq.cryptlen = req->cryptlen -
  1889. qreq.authsize;
  1890. /* if rfc4309 ccm, adjust assoclen */
  1891. assoclen = req->assoclen;
  1892. if (rctx->ccmtype)
  1893. assoclen -= 8;
  1894. /* Get NONCE */
  1895. ret = qccrypto_set_aead_ccm_nonce(&qreq, assoclen);
  1896. if (ret)
  1897. return ret;
  1898. if (assoclen) {
  1899. rctx->adata = kzalloc((assoclen + 0x64),
  1900. GFP_ATOMIC);
  1901. if (!rctx->adata)
  1902. return -ENOMEM;
  1903. /* Format Associated data */
  1904. ret = qcrypto_aead_ccm_format_adata(&qreq,
  1905. assoclen,
  1906. req->src,
  1907. rctx->adata);
  1908. } else {
  1909. qreq.assoclen = 0;
  1910. rctx->adata = NULL;
  1911. }
  1912. if (ret) {
  1913. kfree_sensitive(rctx->adata);
  1914. return ret;
  1915. }
  1916. /*
  1917. * update req with new formatted associated
  1918. * data info
  1919. */
  1920. qreq.asg = &rctx->asg;
  1921. if (rctx->adata)
  1922. sg_set_buf(qreq.asg, rctx->adata,
  1923. qreq.assoclen);
  1924. sg_mark_end(qreq.asg);
  1925. }
  1926. ret = qce_aead_req(pengine->qce, &qreq);
  1927. return ret;
  1928. }
  1929. static struct crypto_engine *_qcrypto_static_assign_engine(
  1930. struct crypto_priv *cp)
  1931. {
  1932. struct crypto_engine *pengine;
  1933. unsigned long flags;
  1934. spin_lock_irqsave(&cp->lock, flags);
  1935. if (cp->next_engine)
  1936. pengine = cp->next_engine;
  1937. else
  1938. pengine = list_first_entry(&cp->engine_list,
  1939. struct crypto_engine, elist);
  1940. if (list_is_last(&pengine->elist, &cp->engine_list))
  1941. cp->next_engine = list_first_entry(
  1942. &cp->engine_list, struct crypto_engine, elist);
  1943. else
  1944. cp->next_engine = list_next_entry(pengine, elist);
  1945. spin_unlock_irqrestore(&cp->lock, flags);
  1946. return pengine;
  1947. }
  1948. static int _start_qcrypto_process(struct crypto_priv *cp,
  1949. struct crypto_engine *pengine)
  1950. {
  1951. struct crypto_async_request *async_req = NULL;
  1952. struct crypto_async_request *backlog_eng = NULL;
  1953. struct crypto_async_request *backlog_cp = NULL;
  1954. unsigned long flags;
  1955. u32 type;
  1956. int ret = 0;
  1957. struct crypto_stat *pstat;
  1958. void *tfm_ctx;
  1959. struct qcrypto_cipher_req_ctx *cipher_rctx;
  1960. struct qcrypto_sha_req_ctx *ahash_rctx;
  1961. struct skcipher_request *skcipher_req;
  1962. struct ahash_request *ahash_req;
  1963. struct aead_request *aead_req;
  1964. struct qcrypto_resp_ctx *arsp;
  1965. struct qcrypto_req_control *pqcrypto_req_control;
  1966. unsigned int cpu = MAX_SMP_CPU;
  1967. if (READ_ONCE(cp->ce_req_proc_sts) == STOPPED)
  1968. return 0;
  1969. if (in_interrupt()) {
  1970. cpu = smp_processor_id();
  1971. if (cpu >= MAX_SMP_CPU)
  1972. cpu = MAX_SMP_CPU - 1;
  1973. } else
  1974. cpu = MAX_SMP_CPU;
  1975. pstat = &_qcrypto_stat;
  1976. again:
  1977. spin_lock_irqsave(&cp->lock, flags);
  1978. if (pengine->issue_req ||
  1979. atomic_read(&pengine->req_count) >= (pengine->max_req)) {
  1980. spin_unlock_irqrestore(&cp->lock, flags);
  1981. return 0;
  1982. }
  1983. backlog_eng = crypto_get_backlog(&pengine->req_queue);
  1984. /* make sure it is in high bandwidth state */
  1985. if (pengine->bw_state != BUS_HAS_BANDWIDTH) {
  1986. spin_unlock_irqrestore(&cp->lock, flags);
  1987. return 0;
  1988. }
  1989. /* try to get request from request queue of the engine first */
  1990. async_req = crypto_dequeue_request(&pengine->req_queue);
  1991. if (!async_req) {
  1992. /*
  1993. * if no request from the engine,
  1994. * try to get from request queue of driver
  1995. */
  1996. backlog_cp = crypto_get_backlog(&cp->req_queue);
  1997. async_req = crypto_dequeue_request(&cp->req_queue);
  1998. if (!async_req) {
  1999. spin_unlock_irqrestore(&cp->lock, flags);
  2000. return 0;
  2001. }
  2002. }
  2003. pqcrypto_req_control = qcrypto_alloc_req_control(pengine);
  2004. if (pqcrypto_req_control == NULL) {
  2005. pr_err("Allocation of request failed\n");
  2006. spin_unlock_irqrestore(&cp->lock, flags);
  2007. return 0;
  2008. }
  2009. /* add associated rsp entry to tfm response queue */
  2010. type = crypto_tfm_alg_type(async_req->tfm);
  2011. tfm_ctx = crypto_tfm_ctx(async_req->tfm);
  2012. switch (type) {
  2013. case CRYPTO_ALG_TYPE_AHASH:
  2014. ahash_req = container_of(async_req,
  2015. struct ahash_request, base);
  2016. ahash_rctx = ahash_request_ctx(ahash_req);
  2017. arsp = &ahash_rctx->rsp_entry;
  2018. list_add_tail(
  2019. &arsp->list,
  2020. &((struct qcrypto_sha_ctx *)tfm_ctx)
  2021. ->rsp_queue);
  2022. break;
  2023. case CRYPTO_ALG_TYPE_SKCIPHER:
  2024. skcipher_req = container_of(async_req,
  2025. struct skcipher_request, base);
  2026. cipher_rctx = skcipher_request_ctx(skcipher_req);
  2027. arsp = &cipher_rctx->rsp_entry;
  2028. list_add_tail(
  2029. &arsp->list,
  2030. &((struct qcrypto_cipher_ctx *)tfm_ctx)
  2031. ->rsp_queue);
  2032. break;
  2033. case CRYPTO_ALG_TYPE_AEAD:
  2034. default:
  2035. aead_req = container_of(async_req,
  2036. struct aead_request, base);
  2037. cipher_rctx = aead_request_ctx(aead_req);
  2038. arsp = &cipher_rctx->rsp_entry;
  2039. list_add_tail(
  2040. &arsp->list,
  2041. &((struct qcrypto_cipher_ctx *)tfm_ctx)
  2042. ->rsp_queue);
  2043. break;
  2044. }
  2045. arsp->res = -EINPROGRESS;
  2046. arsp->async_req = async_req;
  2047. pqcrypto_req_control->pce = pengine;
  2048. pqcrypto_req_control->req = async_req;
  2049. pqcrypto_req_control->arsp = arsp;
  2050. pengine->active_seq++;
  2051. pengine->check_flag = true;
  2052. pengine->issue_req = true;
  2053. cp->cpu_req[cpu]++;
  2054. smp_mb(); /* make it visible */
  2055. spin_unlock_irqrestore(&cp->lock, flags);
  2056. if (backlog_eng)
  2057. backlog_eng->complete(backlog_eng, -EINPROGRESS);
  2058. if (backlog_cp)
  2059. backlog_cp->complete(backlog_cp, -EINPROGRESS);
  2060. switch (type) {
  2061. case CRYPTO_ALG_TYPE_SKCIPHER:
  2062. ret = _qcrypto_process_skcipher(pengine, pqcrypto_req_control);
  2063. break;
  2064. case CRYPTO_ALG_TYPE_AHASH:
  2065. ret = _qcrypto_process_ahash(pengine, pqcrypto_req_control);
  2066. break;
  2067. case CRYPTO_ALG_TYPE_AEAD:
  2068. ret = _qcrypto_process_aead(pengine, pqcrypto_req_control);
  2069. break;
  2070. default:
  2071. ret = -EINVAL;
  2072. }
  2073. pengine->issue_req = false;
  2074. smp_mb(); /* make it visible */
  2075. pengine->total_req++;
  2076. if (ret) {
  2077. pengine->err_req++;
  2078. qcrypto_free_req_control(pengine, pqcrypto_req_control);
  2079. if (type == CRYPTO_ALG_TYPE_SKCIPHER)
  2080. pstat->sk_cipher_op_fail++;
  2081. else
  2082. if (type == CRYPTO_ALG_TYPE_AHASH)
  2083. pstat->ahash_op_fail++;
  2084. else
  2085. pstat->aead_op_fail++;
  2086. _qcrypto_tfm_complete(pengine, type, tfm_ctx, arsp, ret);
  2087. goto again;
  2088. }
  2089. return ret;
  2090. }
  2091. static inline struct crypto_engine *_next_eng(struct crypto_priv *cp,
  2092. struct crypto_engine *p)
  2093. {
  2094. if (p == NULL || list_is_last(&p->elist, &cp->engine_list))
  2095. p = list_first_entry(&cp->engine_list, struct crypto_engine,
  2096. elist);
  2097. else
  2098. p = list_entry(p->elist.next, struct crypto_engine, elist);
  2099. return p;
  2100. }
  2101. static struct crypto_engine *_avail_eng(struct crypto_priv *cp)
  2102. {
  2103. /* call this function with spinlock set */
  2104. struct crypto_engine *q = NULL;
  2105. struct crypto_engine *p = cp->scheduled_eng;
  2106. struct crypto_engine *q1;
  2107. int eng_cnt = cp->total_units;
  2108. if (unlikely(list_empty(&cp->engine_list))) {
  2109. pr_err("%s: no valid ce to schedule\n", __func__);
  2110. return NULL;
  2111. }
  2112. p = _next_eng(cp, p);
  2113. q1 = p;
  2114. while (eng_cnt-- > 0) {
  2115. if (!p->issue_req && atomic_read(&p->req_count) < p->max_req) {
  2116. q = p;
  2117. break;
  2118. }
  2119. p = _next_eng(cp, p);
  2120. if (q1 == p)
  2121. break;
  2122. }
  2123. cp->scheduled_eng = q;
  2124. return q;
  2125. }
  2126. static int _qcrypto_queue_req(struct crypto_priv *cp,
  2127. struct crypto_engine *pengine,
  2128. struct crypto_async_request *req)
  2129. {
  2130. int ret;
  2131. unsigned long flags;
  2132. spin_lock_irqsave(&cp->lock, flags);
  2133. if (pengine) {
  2134. ret = crypto_enqueue_request(&pengine->req_queue, req);
  2135. } else {
  2136. ret = crypto_enqueue_request(&cp->req_queue, req);
  2137. pengine = _avail_eng(cp);
  2138. if (cp->req_queue.qlen > cp->max_qlen)
  2139. cp->max_qlen = cp->req_queue.qlen;
  2140. }
  2141. if (pengine) {
  2142. switch (pengine->bw_state) {
  2143. case BUS_NO_BANDWIDTH:
  2144. if (!pengine->high_bw_req) {
  2145. qcrypto_ce_bw_allocate_req(pengine);
  2146. pengine->high_bw_req = true;
  2147. }
  2148. pengine = NULL;
  2149. break;
  2150. case BUS_HAS_BANDWIDTH:
  2151. break;
  2152. case BUS_BANDWIDTH_RELEASING:
  2153. pengine->high_bw_req = true;
  2154. pengine = NULL;
  2155. break;
  2156. case BUS_BANDWIDTH_ALLOCATING:
  2157. pengine = NULL;
  2158. break;
  2159. case BUS_SUSPENDED:
  2160. case BUS_SUSPENDING:
  2161. default:
  2162. pengine = NULL;
  2163. break;
  2164. }
  2165. } else {
  2166. cp->no_avail++;
  2167. }
  2168. spin_unlock_irqrestore(&cp->lock, flags);
  2169. if (pengine && (READ_ONCE(cp->ce_req_proc_sts) == IN_PROGRESS))
  2170. _start_qcrypto_process(cp, pengine);
  2171. return ret;
  2172. }
  2173. static int _qcrypto_enc_aes_192_fallback(struct skcipher_request *req)
  2174. {
  2175. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2176. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2177. int err;
  2178. SYNC_SKCIPHER_REQUEST_ON_STACK(subreq, ctx->cipher_aes192_fb);
  2179. skcipher_request_set_sync_tfm(subreq, ctx->cipher_aes192_fb);
  2180. skcipher_request_set_callback(subreq, req->base.flags, NULL, NULL);
  2181. skcipher_request_set_crypt(subreq, req->src, req->dst,
  2182. req->cryptlen, req->iv);
  2183. err = crypto_skcipher_encrypt(subreq);
  2184. skcipher_request_zero(subreq);
  2185. return err;
  2186. }
  2187. static int _qcrypto_dec_aes_192_fallback(struct skcipher_request *req)
  2188. {
  2189. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2190. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2191. int err;
  2192. SYNC_SKCIPHER_REQUEST_ON_STACK(subreq, ctx->cipher_aes192_fb);
  2193. skcipher_request_set_sync_tfm(subreq, ctx->cipher_aes192_fb);
  2194. skcipher_request_set_callback(subreq, req->base.flags, NULL, NULL);
  2195. skcipher_request_set_crypt(subreq, req->src, req->dst,
  2196. req->cryptlen, req->iv);
  2197. err = crypto_skcipher_decrypt(subreq);
  2198. skcipher_request_zero(subreq);
  2199. return err;
  2200. }
  2201. static int _qcrypto_enc_aes_ecb(struct skcipher_request *req)
  2202. {
  2203. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2204. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2205. struct qcrypto_cipher_req_ctx *rctx;
  2206. struct crypto_priv *cp = ctx->cp;
  2207. struct crypto_stat *pstat = &_qcrypto_stat;
  2208. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2209. #ifdef QCRYPTO_DEBUG
  2210. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2211. #endif
  2212. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2213. (!cp->ce_support.aes_key_192) &&
  2214. ctx->cipher_aes192_fb)
  2215. return _qcrypto_enc_aes_192_fallback(req);
  2216. rctx = skcipher_request_ctx(req);
  2217. rctx->aead = 0;
  2218. rctx->alg = CIPHER_ALG_AES;
  2219. rctx->dir = QCE_ENCRYPT;
  2220. rctx->mode = QCE_MODE_ECB;
  2221. pstat->sk_cipher_aes_enc++;
  2222. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2223. }
  2224. static int _qcrypto_enc_aes_cbc(struct skcipher_request *req)
  2225. {
  2226. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2227. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2228. struct qcrypto_cipher_req_ctx *rctx;
  2229. struct crypto_priv *cp = ctx->cp;
  2230. struct crypto_stat *pstat = &_qcrypto_stat;
  2231. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2232. #ifdef QCRYPTO_DEBUG
  2233. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2234. #endif
  2235. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2236. (!cp->ce_support.aes_key_192) &&
  2237. ctx->cipher_aes192_fb)
  2238. return _qcrypto_enc_aes_192_fallback(req);
  2239. rctx = skcipher_request_ctx(req);
  2240. rctx->aead = 0;
  2241. rctx->alg = CIPHER_ALG_AES;
  2242. rctx->dir = QCE_ENCRYPT;
  2243. rctx->mode = QCE_MODE_CBC;
  2244. pstat->sk_cipher_aes_enc++;
  2245. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2246. }
  2247. static int _qcrypto_enc_aes_ctr(struct skcipher_request *req)
  2248. {
  2249. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2250. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2251. struct qcrypto_cipher_req_ctx *rctx;
  2252. struct crypto_priv *cp = ctx->cp;
  2253. struct crypto_stat *pstat = &_qcrypto_stat;
  2254. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2255. #ifdef QCRYPTO_DEBUG
  2256. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2257. #endif
  2258. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2259. (!cp->ce_support.aes_key_192) &&
  2260. ctx->cipher_aes192_fb)
  2261. return _qcrypto_enc_aes_192_fallback(req);
  2262. rctx = skcipher_request_ctx(req);
  2263. rctx->aead = 0;
  2264. rctx->alg = CIPHER_ALG_AES;
  2265. rctx->dir = QCE_ENCRYPT;
  2266. rctx->mode = QCE_MODE_CTR;
  2267. pstat->sk_cipher_aes_enc++;
  2268. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2269. }
  2270. static int _qcrypto_enc_aes_xts(struct skcipher_request *req)
  2271. {
  2272. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2273. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2274. struct qcrypto_cipher_req_ctx *rctx;
  2275. struct crypto_stat *pstat = &_qcrypto_stat;
  2276. struct crypto_priv *cp = ctx->cp;
  2277. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2278. rctx = skcipher_request_ctx(req);
  2279. rctx->aead = 0;
  2280. rctx->alg = CIPHER_ALG_AES;
  2281. rctx->dir = QCE_ENCRYPT;
  2282. rctx->mode = QCE_MODE_XTS;
  2283. pstat->sk_cipher_aes_enc++;
  2284. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2285. }
  2286. static int _qcrypto_aead_encrypt_aes_ccm(struct aead_request *req)
  2287. {
  2288. struct qcrypto_cipher_req_ctx *rctx;
  2289. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2290. struct crypto_priv *cp = ctx->cp;
  2291. struct crypto_stat *pstat;
  2292. if ((ctx->authsize > 16) || (ctx->authsize < 4) || (ctx->authsize & 1))
  2293. return -EINVAL;
  2294. if ((ctx->auth_key_len != AES_KEYSIZE_128) &&
  2295. (ctx->auth_key_len != AES_KEYSIZE_256))
  2296. return -EINVAL;
  2297. pstat = &_qcrypto_stat;
  2298. rctx = aead_request_ctx(req);
  2299. rctx->aead = 1;
  2300. rctx->alg = CIPHER_ALG_AES;
  2301. rctx->dir = QCE_ENCRYPT;
  2302. rctx->mode = QCE_MODE_CCM;
  2303. rctx->iv = req->iv;
  2304. rctx->ccmtype = 0;
  2305. pstat->aead_ccm_aes_enc++;
  2306. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2307. }
  2308. static int _qcrypto_aead_rfc4309_enc_aes_ccm(struct aead_request *req)
  2309. {
  2310. struct qcrypto_cipher_req_ctx *rctx;
  2311. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2312. struct crypto_priv *cp = ctx->cp;
  2313. struct crypto_stat *pstat;
  2314. pstat = &_qcrypto_stat;
  2315. if (req->assoclen != 16 && req->assoclen != 20)
  2316. return -EINVAL;
  2317. rctx = aead_request_ctx(req);
  2318. rctx->aead = 1;
  2319. rctx->alg = CIPHER_ALG_AES;
  2320. rctx->dir = QCE_ENCRYPT;
  2321. rctx->mode = QCE_MODE_CCM;
  2322. memset(rctx->rfc4309_iv, 0, sizeof(rctx->rfc4309_iv));
  2323. rctx->rfc4309_iv[0] = 3; /* L -1 */
  2324. memcpy(&rctx->rfc4309_iv[1], ctx->ccm4309_nonce, 3);
  2325. memcpy(&rctx->rfc4309_iv[4], req->iv, 8);
  2326. rctx->ccmtype = 1;
  2327. rctx->iv = rctx->rfc4309_iv;
  2328. pstat->aead_rfc4309_ccm_aes_enc++;
  2329. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2330. }
  2331. static int _qcrypto_enc_des_ecb(struct skcipher_request *req)
  2332. {
  2333. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2334. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2335. struct qcrypto_cipher_req_ctx *rctx;
  2336. struct crypto_priv *cp = ctx->cp;
  2337. struct crypto_stat *pstat = &_qcrypto_stat;
  2338. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2339. rctx = skcipher_request_ctx(req);
  2340. rctx->aead = 0;
  2341. rctx->alg = CIPHER_ALG_DES;
  2342. rctx->dir = QCE_ENCRYPT;
  2343. rctx->mode = QCE_MODE_ECB;
  2344. pstat->sk_cipher_des_enc++;
  2345. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2346. }
  2347. static int _qcrypto_enc_des_cbc(struct skcipher_request *req)
  2348. {
  2349. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2350. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2351. struct qcrypto_cipher_req_ctx *rctx;
  2352. struct crypto_priv *cp = ctx->cp;
  2353. struct crypto_stat *pstat = &_qcrypto_stat;
  2354. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2355. rctx = skcipher_request_ctx(req);
  2356. rctx->aead = 0;
  2357. rctx->alg = CIPHER_ALG_DES;
  2358. rctx->dir = QCE_ENCRYPT;
  2359. rctx->mode = QCE_MODE_CBC;
  2360. pstat->sk_cipher_des_enc++;
  2361. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2362. }
  2363. static int _qcrypto_enc_3des_ecb(struct skcipher_request *req)
  2364. {
  2365. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2366. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2367. struct qcrypto_cipher_req_ctx *rctx;
  2368. struct crypto_priv *cp = ctx->cp;
  2369. struct crypto_stat *pstat = &_qcrypto_stat;
  2370. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2371. rctx = skcipher_request_ctx(req);
  2372. rctx->aead = 0;
  2373. rctx->alg = CIPHER_ALG_3DES;
  2374. rctx->dir = QCE_ENCRYPT;
  2375. rctx->mode = QCE_MODE_ECB;
  2376. pstat->sk_cipher_3des_enc++;
  2377. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2378. }
  2379. static int _qcrypto_enc_3des_cbc(struct skcipher_request *req)
  2380. {
  2381. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2382. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2383. struct qcrypto_cipher_req_ctx *rctx;
  2384. struct crypto_priv *cp = ctx->cp;
  2385. struct crypto_stat *pstat = &_qcrypto_stat;
  2386. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2387. rctx = skcipher_request_ctx(req);
  2388. rctx->aead = 0;
  2389. rctx->alg = CIPHER_ALG_3DES;
  2390. rctx->dir = QCE_ENCRYPT;
  2391. rctx->mode = QCE_MODE_CBC;
  2392. pstat->sk_cipher_3des_enc++;
  2393. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2394. }
  2395. static int _qcrypto_dec_aes_ecb(struct skcipher_request *req)
  2396. {
  2397. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2398. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2399. struct qcrypto_cipher_req_ctx *rctx;
  2400. struct crypto_priv *cp = ctx->cp;
  2401. struct crypto_stat *pstat = &_qcrypto_stat;
  2402. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2403. #ifdef QCRYPTO_DEBUG
  2404. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2405. #endif
  2406. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2407. (!cp->ce_support.aes_key_192) &&
  2408. ctx->cipher_aes192_fb)
  2409. return _qcrypto_dec_aes_192_fallback(req);
  2410. rctx = skcipher_request_ctx(req);
  2411. rctx->aead = 0;
  2412. rctx->alg = CIPHER_ALG_AES;
  2413. rctx->dir = QCE_DECRYPT;
  2414. rctx->mode = QCE_MODE_ECB;
  2415. pstat->sk_cipher_aes_dec++;
  2416. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2417. }
  2418. static int _qcrypto_dec_aes_cbc(struct skcipher_request *req)
  2419. {
  2420. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2421. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2422. struct qcrypto_cipher_req_ctx *rctx;
  2423. struct crypto_priv *cp = ctx->cp;
  2424. struct crypto_stat *pstat = &_qcrypto_stat;
  2425. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2426. #ifdef QCRYPTO_DEBUG
  2427. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2428. #endif
  2429. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2430. (!cp->ce_support.aes_key_192) &&
  2431. ctx->cipher_aes192_fb)
  2432. return _qcrypto_dec_aes_192_fallback(req);
  2433. rctx = skcipher_request_ctx(req);
  2434. rctx->aead = 0;
  2435. rctx->alg = CIPHER_ALG_AES;
  2436. rctx->dir = QCE_DECRYPT;
  2437. rctx->mode = QCE_MODE_CBC;
  2438. pstat->sk_cipher_aes_dec++;
  2439. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2440. }
  2441. static int _qcrypto_dec_aes_ctr(struct skcipher_request *req)
  2442. {
  2443. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2444. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2445. struct qcrypto_cipher_req_ctx *rctx;
  2446. struct crypto_priv *cp = ctx->cp;
  2447. struct crypto_stat *pstat = &_qcrypto_stat;
  2448. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2449. #ifdef QCRYPTO_DEBUG
  2450. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2451. #endif
  2452. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2453. (!cp->ce_support.aes_key_192) &&
  2454. ctx->cipher_aes192_fb)
  2455. return _qcrypto_dec_aes_192_fallback(req);
  2456. rctx = skcipher_request_ctx(req);
  2457. rctx->aead = 0;
  2458. rctx->alg = CIPHER_ALG_AES;
  2459. rctx->mode = QCE_MODE_CTR;
  2460. /* Note. There is no such thing as aes/counter mode, decrypt */
  2461. rctx->dir = QCE_ENCRYPT;
  2462. pstat->sk_cipher_aes_dec++;
  2463. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2464. }
  2465. static int _qcrypto_dec_des_ecb(struct skcipher_request *req)
  2466. {
  2467. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2468. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2469. struct qcrypto_cipher_req_ctx *rctx;
  2470. struct crypto_priv *cp = ctx->cp;
  2471. struct crypto_stat *pstat = &_qcrypto_stat;
  2472. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2473. rctx = skcipher_request_ctx(req);
  2474. rctx->aead = 0;
  2475. rctx->alg = CIPHER_ALG_DES;
  2476. rctx->dir = QCE_DECRYPT;
  2477. rctx->mode = QCE_MODE_ECB;
  2478. pstat->sk_cipher_des_dec++;
  2479. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2480. }
  2481. static int _qcrypto_dec_des_cbc(struct skcipher_request *req)
  2482. {
  2483. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2484. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2485. struct qcrypto_cipher_req_ctx *rctx;
  2486. struct crypto_priv *cp = ctx->cp;
  2487. struct crypto_stat *pstat = &_qcrypto_stat;
  2488. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2489. rctx = skcipher_request_ctx(req);
  2490. rctx->aead = 0;
  2491. rctx->alg = CIPHER_ALG_DES;
  2492. rctx->dir = QCE_DECRYPT;
  2493. rctx->mode = QCE_MODE_CBC;
  2494. pstat->sk_cipher_des_dec++;
  2495. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2496. }
  2497. static int _qcrypto_dec_3des_ecb(struct skcipher_request *req)
  2498. {
  2499. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2500. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2501. struct qcrypto_cipher_req_ctx *rctx;
  2502. struct crypto_priv *cp = ctx->cp;
  2503. struct crypto_stat *pstat = &_qcrypto_stat;
  2504. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2505. rctx = skcipher_request_ctx(req);
  2506. rctx->aead = 0;
  2507. rctx->alg = CIPHER_ALG_3DES;
  2508. rctx->dir = QCE_DECRYPT;
  2509. rctx->mode = QCE_MODE_ECB;
  2510. pstat->sk_cipher_3des_dec++;
  2511. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2512. }
  2513. static int _qcrypto_dec_3des_cbc(struct skcipher_request *req)
  2514. {
  2515. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2516. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2517. struct qcrypto_cipher_req_ctx *rctx;
  2518. struct crypto_priv *cp = ctx->cp;
  2519. struct crypto_stat *pstat = &_qcrypto_stat;
  2520. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2521. rctx = skcipher_request_ctx(req);
  2522. rctx->aead = 0;
  2523. rctx->alg = CIPHER_ALG_3DES;
  2524. rctx->dir = QCE_DECRYPT;
  2525. rctx->mode = QCE_MODE_CBC;
  2526. pstat->sk_cipher_3des_dec++;
  2527. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2528. }
  2529. static int _qcrypto_dec_aes_xts(struct skcipher_request *req)
  2530. {
  2531. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2532. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2533. struct qcrypto_cipher_req_ctx *rctx;
  2534. struct crypto_priv *cp = ctx->cp;
  2535. struct crypto_stat *pstat = &_qcrypto_stat;
  2536. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2537. rctx = skcipher_request_ctx(req);
  2538. rctx->aead = 0;
  2539. rctx->alg = CIPHER_ALG_AES;
  2540. rctx->mode = QCE_MODE_XTS;
  2541. rctx->dir = QCE_DECRYPT;
  2542. pstat->sk_cipher_aes_dec++;
  2543. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2544. }
  2545. static int _qcrypto_aead_decrypt_aes_ccm(struct aead_request *req)
  2546. {
  2547. struct qcrypto_cipher_req_ctx *rctx;
  2548. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2549. struct crypto_priv *cp = ctx->cp;
  2550. struct crypto_stat *pstat;
  2551. if ((ctx->authsize > 16) || (ctx->authsize < 4) || (ctx->authsize & 1))
  2552. return -EINVAL;
  2553. if ((ctx->auth_key_len != AES_KEYSIZE_128) &&
  2554. (ctx->auth_key_len != AES_KEYSIZE_256))
  2555. return -EINVAL;
  2556. pstat = &_qcrypto_stat;
  2557. rctx = aead_request_ctx(req);
  2558. rctx->aead = 1;
  2559. rctx->alg = CIPHER_ALG_AES;
  2560. rctx->dir = QCE_DECRYPT;
  2561. rctx->mode = QCE_MODE_CCM;
  2562. rctx->iv = req->iv;
  2563. rctx->ccmtype = 0;
  2564. pstat->aead_ccm_aes_dec++;
  2565. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2566. }
  2567. static int _qcrypto_aead_rfc4309_dec_aes_ccm(struct aead_request *req)
  2568. {
  2569. struct qcrypto_cipher_req_ctx *rctx;
  2570. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2571. struct crypto_priv *cp = ctx->cp;
  2572. struct crypto_stat *pstat;
  2573. pstat = &_qcrypto_stat;
  2574. if (req->assoclen != 16 && req->assoclen != 20)
  2575. return -EINVAL;
  2576. rctx = aead_request_ctx(req);
  2577. rctx->aead = 1;
  2578. rctx->alg = CIPHER_ALG_AES;
  2579. rctx->dir = QCE_DECRYPT;
  2580. rctx->mode = QCE_MODE_CCM;
  2581. memset(rctx->rfc4309_iv, 0, sizeof(rctx->rfc4309_iv));
  2582. rctx->rfc4309_iv[0] = 3; /* L -1 */
  2583. memcpy(&rctx->rfc4309_iv[1], ctx->ccm4309_nonce, 3);
  2584. memcpy(&rctx->rfc4309_iv[4], req->iv, 8);
  2585. rctx->ccmtype = 1;
  2586. rctx->iv = rctx->rfc4309_iv;
  2587. pstat->aead_rfc4309_ccm_aes_dec++;
  2588. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2589. }
  2590. static int _qcrypto_aead_setauthsize(struct crypto_aead *authenc,
  2591. unsigned int authsize)
  2592. {
  2593. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(authenc);
  2594. ctx->authsize = authsize;
  2595. return 0;
  2596. }
  2597. static int _qcrypto_aead_ccm_setauthsize(struct crypto_aead *authenc,
  2598. unsigned int authsize)
  2599. {
  2600. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(authenc);
  2601. switch (authsize) {
  2602. case 4:
  2603. case 6:
  2604. case 8:
  2605. case 10:
  2606. case 12:
  2607. case 14:
  2608. case 16:
  2609. break;
  2610. default:
  2611. return -EINVAL;
  2612. }
  2613. ctx->authsize = authsize;
  2614. return 0;
  2615. }
  2616. static int _qcrypto_aead_rfc4309_ccm_setauthsize(struct crypto_aead *authenc,
  2617. unsigned int authsize)
  2618. {
  2619. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(authenc);
  2620. switch (authsize) {
  2621. case 8:
  2622. case 12:
  2623. case 16:
  2624. break;
  2625. default:
  2626. return -EINVAL;
  2627. }
  2628. ctx->authsize = authsize;
  2629. return 0;
  2630. }
  2631. static int _qcrypto_aead_setkey(struct crypto_aead *tfm, const u8 *key,
  2632. unsigned int keylen)
  2633. {
  2634. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  2635. struct rtattr *rta = (struct rtattr *)key;
  2636. struct crypto_authenc_key_param *param;
  2637. int ret;
  2638. if (!RTA_OK(rta, keylen))
  2639. goto badkey;
  2640. if (rta->rta_type != CRYPTO_AUTHENC_KEYA_PARAM)
  2641. goto badkey;
  2642. if (RTA_PAYLOAD(rta) < sizeof(*param))
  2643. goto badkey;
  2644. param = RTA_DATA(rta);
  2645. ctx->enc_key_len = be32_to_cpu(param->enckeylen);
  2646. key += RTA_ALIGN(rta->rta_len);
  2647. keylen -= RTA_ALIGN(rta->rta_len);
  2648. if (keylen < ctx->enc_key_len)
  2649. goto badkey;
  2650. ctx->auth_key_len = keylen - ctx->enc_key_len;
  2651. if (ctx->enc_key_len >= QCRYPTO_MAX_KEY_SIZE ||
  2652. ctx->auth_key_len >= QCRYPTO_MAX_KEY_SIZE)
  2653. goto badkey;
  2654. memset(ctx->auth_key, 0, QCRYPTO_MAX_KEY_SIZE);
  2655. memcpy(ctx->enc_key, key + ctx->auth_key_len, ctx->enc_key_len);
  2656. memcpy(ctx->auth_key, key, ctx->auth_key_len);
  2657. if (ctx->enc_key_len == AES_KEYSIZE_192 && ctx->cipher_aes192_fb &&
  2658. ctx->ahash_aead_aes192_fb) {
  2659. crypto_ahash_clear_flags(ctx->ahash_aead_aes192_fb, ~0);
  2660. ret = crypto_ahash_setkey(ctx->ahash_aead_aes192_fb,
  2661. ctx->auth_key, ctx->auth_key_len);
  2662. if (ret)
  2663. goto badkey;
  2664. crypto_sync_skcipher_clear_flags(ctx->cipher_aes192_fb, ~0);
  2665. ret = crypto_sync_skcipher_setkey(ctx->cipher_aes192_fb,
  2666. ctx->enc_key, ctx->enc_key_len);
  2667. if (ret)
  2668. goto badkey;
  2669. }
  2670. return 0;
  2671. badkey:
  2672. ctx->enc_key_len = 0;
  2673. //crypto_aead_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  2674. return -EINVAL;
  2675. }
  2676. static int _qcrypto_aead_ccm_setkey(struct crypto_aead *aead, const u8 *key,
  2677. unsigned int keylen)
  2678. {
  2679. struct crypto_tfm *tfm = crypto_aead_tfm(aead);
  2680. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  2681. struct crypto_priv *cp = ctx->cp;
  2682. switch (keylen) {
  2683. case AES_KEYSIZE_128:
  2684. case AES_KEYSIZE_256:
  2685. break;
  2686. case AES_KEYSIZE_192:
  2687. if (cp->ce_support.aes_key_192) {
  2688. break;
  2689. }
  2690. else {
  2691. ctx->enc_key_len = 0;
  2692. return -EINVAL;
  2693. }
  2694. default:
  2695. ctx->enc_key_len = 0;
  2696. //crypto_aead_set_flags(aead, CRYPTO_TFM_RES_BAD_KEY_LEN);
  2697. return -EINVAL;
  2698. }
  2699. ctx->enc_key_len = keylen;
  2700. memcpy(ctx->enc_key, key, keylen);
  2701. ctx->auth_key_len = keylen;
  2702. memcpy(ctx->auth_key, key, keylen);
  2703. return 0;
  2704. }
  2705. static int _qcrypto_aead_rfc4309_ccm_setkey(struct crypto_aead *aead,
  2706. const u8 *key, unsigned int key_len)
  2707. {
  2708. struct crypto_tfm *tfm = crypto_aead_tfm(aead);
  2709. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  2710. int ret;
  2711. if (key_len < QCRYPTO_CCM4309_NONCE_LEN)
  2712. return -EINVAL;
  2713. key_len -= QCRYPTO_CCM4309_NONCE_LEN;
  2714. memcpy(ctx->ccm4309_nonce, key + key_len, QCRYPTO_CCM4309_NONCE_LEN);
  2715. ret = _qcrypto_aead_ccm_setkey(aead, key, key_len);
  2716. return ret;
  2717. }
  2718. static void _qcrypto_aead_aes_192_fb_a_cb(struct qcrypto_cipher_req_ctx *rctx,
  2719. int res)
  2720. {
  2721. struct aead_request *req;
  2722. struct crypto_async_request *areq;
  2723. req = rctx->aead_req;
  2724. areq = &req->base;
  2725. if (rctx->fb_aes_req)
  2726. skcipher_request_free(rctx->fb_aes_req);
  2727. if (rctx->fb_hash_req)
  2728. ahash_request_free(rctx->fb_hash_req);
  2729. rctx->fb_aes_req = NULL;
  2730. rctx->fb_hash_req = NULL;
  2731. kfree(rctx->fb_aes_iv);
  2732. areq->complete(areq, res);
  2733. }
  2734. #if (KERNEL_VERSION(6, 2, 0) <= LINUX_VERSION_CODE)
  2735. static void _aead_aes_fb_stage2_ahash_complete(void *data, int err)
  2736. #else
  2737. static void _aead_aes_fb_stage2_ahash_complete(
  2738. struct crypto_async_request *base, int err)
  2739. #endif
  2740. {
  2741. struct qcrypto_cipher_req_ctx *rctx;
  2742. struct aead_request *req;
  2743. struct qcrypto_cipher_ctx *ctx;
  2744. #if (KERNEL_VERSION(6, 2, 0) <= LINUX_VERSION_CODE)
  2745. rctx = data;
  2746. #else
  2747. rctx = base->data;
  2748. #endif
  2749. req = rctx->aead_req;
  2750. ctx = crypto_tfm_ctx(req->base.tfm);
  2751. /* copy icv */
  2752. if (err == 0)
  2753. scatterwalk_map_and_copy(rctx->fb_ahash_digest,
  2754. rctx->fb_aes_dst,
  2755. req->cryptlen,
  2756. ctx->authsize, 1);
  2757. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2758. }
  2759. static int _start_aead_aes_fb_stage2_hmac(struct qcrypto_cipher_req_ctx *rctx)
  2760. {
  2761. struct ahash_request *ahash_req;
  2762. ahash_req = rctx->fb_hash_req;
  2763. ahash_request_set_callback(ahash_req, CRYPTO_TFM_REQ_MAY_BACKLOG,
  2764. _aead_aes_fb_stage2_ahash_complete, rctx);
  2765. return crypto_ahash_digest(ahash_req);
  2766. }
  2767. #if (KERNEL_VERSION(6, 2, 0) <= LINUX_VERSION_CODE)
  2768. static void _aead_aes_fb_stage2_decrypt_complete(void *data, int err)
  2769. #else
  2770. static void _aead_aes_fb_stage2_decrypt_complete(
  2771. struct crypto_async_request *base, int err)
  2772. #endif
  2773. {
  2774. struct qcrypto_cipher_req_ctx *rctx;
  2775. #if (KERNEL_VERSION(6, 2, 0) <= LINUX_VERSION_CODE)
  2776. rctx = data;
  2777. #else
  2778. rctx = base->data;
  2779. #endif
  2780. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2781. }
  2782. static int _start_aead_aes_fb_stage2_decrypt(
  2783. struct qcrypto_cipher_req_ctx *rctx)
  2784. {
  2785. struct skcipher_request *aes_req;
  2786. aes_req = rctx->fb_aes_req;
  2787. skcipher_request_set_callback(aes_req, CRYPTO_TFM_REQ_MAY_BACKLOG,
  2788. _aead_aes_fb_stage2_decrypt_complete, rctx);
  2789. return crypto_skcipher_decrypt(aes_req);
  2790. }
  2791. #if (KERNEL_VERSION(6, 2, 0) <= LINUX_VERSION_CODE)
  2792. static void _aead_aes_fb_stage1_ahash_complete(void *data, int err)
  2793. #else
  2794. static void _aead_aes_fb_stage1_ahash_complete(
  2795. struct crypto_async_request *base, int err)
  2796. #endif
  2797. {
  2798. struct qcrypto_cipher_req_ctx *rctx;
  2799. struct aead_request *req;
  2800. struct qcrypto_cipher_ctx *ctx;
  2801. #if (KERNEL_VERSION(6, 2, 0) <= LINUX_VERSION_CODE)
  2802. rctx = data;
  2803. #else
  2804. rctx = base->data;
  2805. #endif
  2806. req = rctx->aead_req;
  2807. ctx = crypto_tfm_ctx(req->base.tfm);
  2808. /* compare icv */
  2809. if (err == 0) {
  2810. unsigned char *tmp;
  2811. tmp = kmalloc(ctx->authsize, GFP_KERNEL);
  2812. if (!tmp) {
  2813. err = -ENOMEM;
  2814. goto ret;
  2815. }
  2816. scatterwalk_map_and_copy(tmp, rctx->fb_aes_src,
  2817. req->cryptlen - ctx->authsize, ctx->authsize, 0);
  2818. if (memcmp(rctx->fb_ahash_digest, tmp, ctx->authsize) != 0)
  2819. err = -EBADMSG;
  2820. kfree(tmp);
  2821. }
  2822. ret:
  2823. if (err)
  2824. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2825. else {
  2826. err = _start_aead_aes_fb_stage2_decrypt(rctx);
  2827. if (err != -EINPROGRESS && err != -EBUSY)
  2828. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2829. }
  2830. }
  2831. #if (KERNEL_VERSION(6, 2, 0) <= LINUX_VERSION_CODE)
  2832. static void _aead_aes_fb_stage1_encrypt_complete(void *data, int err)
  2833. #else
  2834. static void _aead_aes_fb_stage1_encrypt_complete(
  2835. struct crypto_async_request *base, int err)
  2836. #endif
  2837. {
  2838. struct qcrypto_cipher_req_ctx *rctx;
  2839. struct aead_request *req;
  2840. struct qcrypto_cipher_ctx *ctx;
  2841. #if (KERNEL_VERSION(6, 2, 0) <= LINUX_VERSION_CODE)
  2842. rctx = data;
  2843. #else
  2844. rctx = base->data;
  2845. #endif
  2846. req = rctx->aead_req;
  2847. ctx = crypto_tfm_ctx(req->base.tfm);
  2848. memcpy(ctx->iv, rctx->fb_aes_iv, rctx->ivsize);
  2849. if (err) {
  2850. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2851. return;
  2852. }
  2853. err = _start_aead_aes_fb_stage2_hmac(rctx);
  2854. /* copy icv */
  2855. if (err == 0) {
  2856. scatterwalk_map_and_copy(rctx->fb_ahash_digest,
  2857. rctx->fb_aes_dst,
  2858. req->cryptlen,
  2859. ctx->authsize, 1);
  2860. }
  2861. if (err != -EINPROGRESS && err != -EBUSY)
  2862. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2863. }
  2864. static int _qcrypto_aead_aes_192_fallback(struct aead_request *req,
  2865. bool is_encrypt)
  2866. {
  2867. int rc = -EINVAL;
  2868. struct qcrypto_cipher_req_ctx *rctx = aead_request_ctx(req);
  2869. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2870. struct crypto_aead *aead_tfm = crypto_aead_reqtfm(req);
  2871. struct skcipher_request *aes_req = NULL;
  2872. struct ahash_request *ahash_req = NULL;
  2873. int nbytes;
  2874. struct scatterlist *src, *dst;
  2875. rctx->fb_aes_iv = NULL;
  2876. aes_req = skcipher_request_alloc(&ctx->cipher_aes192_fb->base,
  2877. GFP_KERNEL);
  2878. if (!aes_req)
  2879. return -ENOMEM;
  2880. ahash_req = ahash_request_alloc(ctx->ahash_aead_aes192_fb, GFP_KERNEL);
  2881. if (!ahash_req)
  2882. goto ret;
  2883. rctx->fb_aes_req = aes_req;
  2884. rctx->fb_hash_req = ahash_req;
  2885. rctx->aead_req = req;
  2886. /* assoc and iv are sitting in the beginning of src sg list */
  2887. /* Similarly, assoc and iv are sitting in the beginning of dst list */
  2888. src = scatterwalk_ffwd(rctx->fb_ablkcipher_src_sg, req->src,
  2889. req->assoclen);
  2890. dst = scatterwalk_ffwd(rctx->fb_ablkcipher_dst_sg, req->dst,
  2891. req->assoclen);
  2892. nbytes = req->cryptlen;
  2893. if (!is_encrypt)
  2894. nbytes -= ctx->authsize;
  2895. rctx->fb_ahash_length = nbytes + req->assoclen;
  2896. rctx->fb_aes_src = src;
  2897. rctx->fb_aes_dst = dst;
  2898. rctx->fb_aes_cryptlen = nbytes;
  2899. rctx->ivsize = crypto_aead_ivsize(aead_tfm);
  2900. rctx->fb_aes_iv = kmemdup(req->iv, rctx->ivsize, GFP_ATOMIC);
  2901. if (!rctx->fb_aes_iv)
  2902. goto ret;
  2903. skcipher_request_set_crypt(aes_req, rctx->fb_aes_src,
  2904. rctx->fb_aes_dst,
  2905. rctx->fb_aes_cryptlen, rctx->fb_aes_iv);
  2906. if (is_encrypt)
  2907. ahash_request_set_crypt(ahash_req, req->dst,
  2908. rctx->fb_ahash_digest,
  2909. rctx->fb_ahash_length);
  2910. else
  2911. ahash_request_set_crypt(ahash_req, req->src,
  2912. rctx->fb_ahash_digest,
  2913. rctx->fb_ahash_length);
  2914. if (is_encrypt) {
  2915. skcipher_request_set_callback(aes_req,
  2916. CRYPTO_TFM_REQ_MAY_BACKLOG,
  2917. _aead_aes_fb_stage1_encrypt_complete, rctx);
  2918. rc = crypto_skcipher_encrypt(aes_req);
  2919. if (rc == 0) {
  2920. memcpy(ctx->iv, rctx->fb_aes_iv, rctx->ivsize);
  2921. rc = _start_aead_aes_fb_stage2_hmac(rctx);
  2922. if (rc == 0) {
  2923. /* copy icv */
  2924. scatterwalk_map_and_copy(rctx->fb_ahash_digest,
  2925. dst,
  2926. req->cryptlen,
  2927. ctx->authsize, 1);
  2928. }
  2929. }
  2930. if (rc == -EINPROGRESS || rc == -EBUSY)
  2931. return rc;
  2932. goto ret;
  2933. } else {
  2934. ahash_request_set_callback(ahash_req,
  2935. CRYPTO_TFM_REQ_MAY_BACKLOG,
  2936. _aead_aes_fb_stage1_ahash_complete, rctx);
  2937. rc = crypto_ahash_digest(ahash_req);
  2938. if (rc == 0) {
  2939. unsigned char *tmp;
  2940. tmp = kmalloc(ctx->authsize, GFP_KERNEL);
  2941. if (!tmp) {
  2942. rc = -ENOMEM;
  2943. goto ret;
  2944. }
  2945. /* compare icv */
  2946. scatterwalk_map_and_copy(tmp,
  2947. src, req->cryptlen - ctx->authsize,
  2948. ctx->authsize, 0);
  2949. if (memcmp(rctx->fb_ahash_digest, tmp,
  2950. ctx->authsize) != 0)
  2951. rc = -EBADMSG;
  2952. else
  2953. rc = _start_aead_aes_fb_stage2_decrypt(rctx);
  2954. kfree(tmp);
  2955. }
  2956. if (rc == -EINPROGRESS || rc == -EBUSY)
  2957. return rc;
  2958. goto ret;
  2959. }
  2960. ret:
  2961. if (aes_req)
  2962. skcipher_request_free(aes_req);
  2963. if (ahash_req)
  2964. ahash_request_free(ahash_req);
  2965. kfree(rctx->fb_aes_iv);
  2966. return rc;
  2967. }
  2968. static int _qcrypto_aead_encrypt_aes_cbc(struct aead_request *req)
  2969. {
  2970. struct qcrypto_cipher_req_ctx *rctx;
  2971. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2972. struct crypto_priv *cp = ctx->cp;
  2973. struct crypto_stat *pstat;
  2974. pstat = &_qcrypto_stat;
  2975. #ifdef QCRYPTO_DEBUG
  2976. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2977. #endif
  2978. rctx = aead_request_ctx(req);
  2979. rctx->aead = 1;
  2980. rctx->alg = CIPHER_ALG_AES;
  2981. rctx->dir = QCE_ENCRYPT;
  2982. rctx->mode = QCE_MODE_CBC;
  2983. rctx->iv = req->iv;
  2984. rctx->aead_req = req;
  2985. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  2986. pstat->aead_sha1_aes_enc++;
  2987. else
  2988. pstat->aead_sha256_aes_enc++;
  2989. if (ctx->enc_key_len == AES_KEYSIZE_192 && ctx->cipher_aes192_fb &&
  2990. ctx->ahash_aead_aes192_fb)
  2991. return _qcrypto_aead_aes_192_fallback(req, true);
  2992. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2993. }
  2994. static int _qcrypto_aead_decrypt_aes_cbc(struct aead_request *req)
  2995. {
  2996. struct qcrypto_cipher_req_ctx *rctx;
  2997. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2998. struct crypto_priv *cp = ctx->cp;
  2999. struct crypto_stat *pstat;
  3000. pstat = &_qcrypto_stat;
  3001. #ifdef QCRYPTO_DEBUG
  3002. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  3003. #endif
  3004. rctx = aead_request_ctx(req);
  3005. rctx->aead = 1;
  3006. rctx->alg = CIPHER_ALG_AES;
  3007. rctx->dir = QCE_DECRYPT;
  3008. rctx->mode = QCE_MODE_CBC;
  3009. rctx->iv = req->iv;
  3010. rctx->aead_req = req;
  3011. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  3012. pstat->aead_sha1_aes_dec++;
  3013. else
  3014. pstat->aead_sha256_aes_dec++;
  3015. if (ctx->enc_key_len == AES_KEYSIZE_192 && ctx->cipher_aes192_fb &&
  3016. ctx->ahash_aead_aes192_fb)
  3017. return _qcrypto_aead_aes_192_fallback(req, false);
  3018. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  3019. }
  3020. static int _qcrypto_aead_encrypt_des_cbc(struct aead_request *req)
  3021. {
  3022. struct qcrypto_cipher_req_ctx *rctx;
  3023. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3024. struct crypto_priv *cp = ctx->cp;
  3025. struct crypto_stat *pstat;
  3026. pstat = &_qcrypto_stat;
  3027. rctx = aead_request_ctx(req);
  3028. rctx->aead = 1;
  3029. rctx->alg = CIPHER_ALG_DES;
  3030. rctx->dir = QCE_ENCRYPT;
  3031. rctx->mode = QCE_MODE_CBC;
  3032. rctx->iv = req->iv;
  3033. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  3034. pstat->aead_sha1_des_enc++;
  3035. else
  3036. pstat->aead_sha256_des_enc++;
  3037. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  3038. }
  3039. static int _qcrypto_aead_decrypt_des_cbc(struct aead_request *req)
  3040. {
  3041. struct qcrypto_cipher_req_ctx *rctx;
  3042. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3043. struct crypto_priv *cp = ctx->cp;
  3044. struct crypto_stat *pstat;
  3045. pstat = &_qcrypto_stat;
  3046. rctx = aead_request_ctx(req);
  3047. rctx->aead = 1;
  3048. rctx->alg = CIPHER_ALG_DES;
  3049. rctx->dir = QCE_DECRYPT;
  3050. rctx->mode = QCE_MODE_CBC;
  3051. rctx->iv = req->iv;
  3052. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  3053. pstat->aead_sha1_des_dec++;
  3054. else
  3055. pstat->aead_sha256_des_dec++;
  3056. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  3057. }
  3058. static int _qcrypto_aead_encrypt_3des_cbc(struct aead_request *req)
  3059. {
  3060. struct qcrypto_cipher_req_ctx *rctx;
  3061. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3062. struct crypto_priv *cp = ctx->cp;
  3063. struct crypto_stat *pstat;
  3064. pstat = &_qcrypto_stat;
  3065. rctx = aead_request_ctx(req);
  3066. rctx->aead = 1;
  3067. rctx->alg = CIPHER_ALG_3DES;
  3068. rctx->dir = QCE_ENCRYPT;
  3069. rctx->mode = QCE_MODE_CBC;
  3070. rctx->iv = req->iv;
  3071. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  3072. pstat->aead_sha1_3des_enc++;
  3073. else
  3074. pstat->aead_sha256_3des_enc++;
  3075. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  3076. }
  3077. static int _qcrypto_aead_decrypt_3des_cbc(struct aead_request *req)
  3078. {
  3079. struct qcrypto_cipher_req_ctx *rctx;
  3080. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3081. struct crypto_priv *cp = ctx->cp;
  3082. struct crypto_stat *pstat;
  3083. pstat = &_qcrypto_stat;
  3084. rctx = aead_request_ctx(req);
  3085. rctx->aead = 1;
  3086. rctx->alg = CIPHER_ALG_3DES;
  3087. rctx->dir = QCE_DECRYPT;
  3088. rctx->mode = QCE_MODE_CBC;
  3089. rctx->iv = req->iv;
  3090. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  3091. pstat->aead_sha1_3des_dec++;
  3092. else
  3093. pstat->aead_sha256_3des_dec++;
  3094. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  3095. }
  3096. static int _sha_init(struct ahash_request *req)
  3097. {
  3098. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3099. rctx->first_blk = 1;
  3100. rctx->last_blk = 0;
  3101. rctx->byte_count[0] = 0;
  3102. rctx->byte_count[1] = 0;
  3103. rctx->byte_count[2] = 0;
  3104. rctx->byte_count[3] = 0;
  3105. rctx->trailing_buf_len = 0;
  3106. rctx->count = 0;
  3107. return 0;
  3108. }
  3109. static int _sha1_init(struct ahash_request *req)
  3110. {
  3111. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3112. struct crypto_stat *pstat;
  3113. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3114. pstat = &_qcrypto_stat;
  3115. _sha_init(req);
  3116. sha_ctx->alg = QCE_HASH_SHA1;
  3117. memset(&rctx->trailing_buf[0], 0x00, SHA1_BLOCK_SIZE);
  3118. memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
  3119. SHA1_DIGEST_SIZE);
  3120. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  3121. pstat->sha1_digest++;
  3122. return 0;
  3123. }
  3124. static int _sha256_init(struct ahash_request *req)
  3125. {
  3126. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3127. struct crypto_stat *pstat;
  3128. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3129. pstat = &_qcrypto_stat;
  3130. _sha_init(req);
  3131. sha_ctx->alg = QCE_HASH_SHA256;
  3132. memset(&rctx->trailing_buf[0], 0x00, SHA256_BLOCK_SIZE);
  3133. memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
  3134. SHA256_DIGEST_SIZE);
  3135. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  3136. pstat->sha256_digest++;
  3137. return 0;
  3138. }
  3139. static int _sha1_export(struct ahash_request *req, void *out)
  3140. {
  3141. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3142. struct sha1_state *out_ctx = (struct sha1_state *)out;
  3143. out_ctx->count = rctx->count;
  3144. _byte_stream_to_words(out_ctx->state, rctx->digest, SHA1_DIGEST_SIZE);
  3145. memcpy(out_ctx->buffer, rctx->trailing_buf, SHA1_BLOCK_SIZE);
  3146. return 0;
  3147. }
  3148. static int _sha1_hmac_export(struct ahash_request *req, void *out)
  3149. {
  3150. return _sha1_export(req, out);
  3151. }
  3152. /* crypto hw padding constant for hmac first operation */
  3153. #define HMAC_PADDING 64
  3154. static int __sha1_import_common(struct ahash_request *req, const void *in,
  3155. bool hmac)
  3156. {
  3157. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3158. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3159. struct sha1_state *in_ctx = (struct sha1_state *)in;
  3160. u64 hw_count = in_ctx->count;
  3161. rctx->count = in_ctx->count;
  3162. memcpy(rctx->trailing_buf, in_ctx->buffer, SHA1_BLOCK_SIZE);
  3163. if (in_ctx->count <= SHA1_BLOCK_SIZE) {
  3164. rctx->first_blk = 1;
  3165. } else {
  3166. rctx->first_blk = 0;
  3167. /*
  3168. * For hmac, there is a hardware padding done
  3169. * when first is set. So the byte_count will be
  3170. * incremened by 64 after the operstion of first
  3171. */
  3172. if (hmac)
  3173. hw_count += HMAC_PADDING;
  3174. }
  3175. rctx->byte_count[0] = (uint32_t)(hw_count & 0xFFFFFFC0);
  3176. rctx->byte_count[1] = (uint32_t)(hw_count >> 32);
  3177. _words_to_byte_stream(in_ctx->state, rctx->digest, sha_ctx->diglen);
  3178. rctx->trailing_buf_len = (uint32_t)(in_ctx->count &
  3179. (SHA1_BLOCK_SIZE-1));
  3180. return 0;
  3181. }
  3182. static int _sha1_import(struct ahash_request *req, const void *in)
  3183. {
  3184. return __sha1_import_common(req, in, false);
  3185. }
  3186. static int _sha1_hmac_import(struct ahash_request *req, const void *in)
  3187. {
  3188. return __sha1_import_common(req, in, true);
  3189. }
  3190. static int _sha256_export(struct ahash_request *req, void *out)
  3191. {
  3192. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3193. struct sha256_state *out_ctx = (struct sha256_state *)out;
  3194. out_ctx->count = rctx->count;
  3195. _byte_stream_to_words(out_ctx->state, rctx->digest, SHA256_DIGEST_SIZE);
  3196. memcpy(out_ctx->buf, rctx->trailing_buf, SHA256_BLOCK_SIZE);
  3197. return 0;
  3198. }
  3199. static int _sha256_hmac_export(struct ahash_request *req, void *out)
  3200. {
  3201. return _sha256_export(req, out);
  3202. }
  3203. static int __sha256_import_common(struct ahash_request *req, const void *in,
  3204. bool hmac)
  3205. {
  3206. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3207. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3208. struct sha256_state *in_ctx = (struct sha256_state *)in;
  3209. u64 hw_count = in_ctx->count;
  3210. rctx->count = in_ctx->count;
  3211. memcpy(rctx->trailing_buf, in_ctx->buf, SHA256_BLOCK_SIZE);
  3212. if (in_ctx->count <= SHA256_BLOCK_SIZE) {
  3213. rctx->first_blk = 1;
  3214. } else {
  3215. rctx->first_blk = 0;
  3216. /*
  3217. * for hmac, there is a hardware padding done
  3218. * when first is set. So the byte_count will be
  3219. * incremened by 64 after the operstion of first
  3220. */
  3221. if (hmac)
  3222. hw_count += HMAC_PADDING;
  3223. }
  3224. rctx->byte_count[0] = (uint32_t)(hw_count & 0xFFFFFFC0);
  3225. rctx->byte_count[1] = (uint32_t)(hw_count >> 32);
  3226. _words_to_byte_stream(in_ctx->state, rctx->digest, sha_ctx->diglen);
  3227. rctx->trailing_buf_len = (uint32_t)(in_ctx->count &
  3228. (SHA256_BLOCK_SIZE-1));
  3229. return 0;
  3230. }
  3231. static int _sha256_import(struct ahash_request *req, const void *in)
  3232. {
  3233. return __sha256_import_common(req, in, false);
  3234. }
  3235. static int _sha256_hmac_import(struct ahash_request *req, const void *in)
  3236. {
  3237. return __sha256_import_common(req, in, true);
  3238. }
  3239. static int _copy_source(struct ahash_request *req)
  3240. {
  3241. struct qcrypto_sha_req_ctx *srctx = NULL;
  3242. uint32_t bytes = 0;
  3243. uint32_t num_sg = 0;
  3244. srctx = ahash_request_ctx(req);
  3245. srctx->orig_src = req->src;
  3246. srctx->data = kzalloc((req->nbytes + 64), GFP_ATOMIC);
  3247. if (srctx->data == NULL) {
  3248. pr_err("Mem Alloc fail rctx->data, err %ld for 0x%x\n",
  3249. PTR_ERR(srctx->data), (req->nbytes + 64));
  3250. return -ENOMEM;
  3251. }
  3252. num_sg = qcrypto_count_sg(req->src, req->nbytes);
  3253. bytes = qcrypto_sg_copy_to_buffer(req->src, num_sg, srctx->data,
  3254. req->nbytes);
  3255. if (bytes != req->nbytes)
  3256. pr_warn("bytes copied=0x%x bytes to copy= 0x%x\n", bytes,
  3257. req->nbytes);
  3258. sg_set_buf(&srctx->dsg, srctx->data,
  3259. req->nbytes);
  3260. sg_mark_end(&srctx->dsg);
  3261. req->src = &srctx->dsg;
  3262. return 0;
  3263. }
  3264. static int _sha_update(struct ahash_request *req, uint32_t sha_block_size)
  3265. {
  3266. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3267. struct crypto_priv *cp = sha_ctx->cp;
  3268. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3269. uint32_t total, len, num_sg;
  3270. struct scatterlist *sg_last;
  3271. uint8_t *k_src = NULL;
  3272. uint32_t sha_pad_len = 0;
  3273. uint32_t trailing_buf_len = 0;
  3274. uint32_t nbytes;
  3275. uint32_t offset = 0;
  3276. uint32_t bytes = 0;
  3277. uint8_t *staging;
  3278. int ret = 0;
  3279. /* check for trailing buffer from previous updates and append it */
  3280. total = req->nbytes + rctx->trailing_buf_len;
  3281. len = req->nbytes;
  3282. if (total <= sha_block_size) {
  3283. k_src = &rctx->trailing_buf[rctx->trailing_buf_len];
  3284. num_sg = qcrypto_count_sg(req->src, len);
  3285. bytes = qcrypto_sg_copy_to_buffer(req->src, num_sg, k_src, len);
  3286. rctx->trailing_buf_len = total;
  3287. return 0;
  3288. }
  3289. /* save the original req structure fields*/
  3290. rctx->src = req->src;
  3291. rctx->nbytes = req->nbytes;
  3292. staging = (uint8_t *)ALIGN(((uintptr_t)rctx->staging_dmabuf),
  3293. L1_CACHE_BYTES);
  3294. memcpy(staging, rctx->trailing_buf, rctx->trailing_buf_len);
  3295. k_src = &rctx->trailing_buf[0];
  3296. /* get new trailing buffer */
  3297. sha_pad_len = ALIGN(total, sha_block_size) - total;
  3298. trailing_buf_len = sha_block_size - sha_pad_len;
  3299. offset = req->nbytes - trailing_buf_len;
  3300. if (offset != req->nbytes)
  3301. scatterwalk_map_and_copy(k_src, req->src, offset,
  3302. trailing_buf_len, 0);
  3303. nbytes = total - trailing_buf_len;
  3304. num_sg = qcrypto_count_sg(req->src, req->nbytes);
  3305. len = rctx->trailing_buf_len;
  3306. sg_last = req->src;
  3307. while (len < nbytes) {
  3308. if ((len + sg_last->length) > nbytes)
  3309. break;
  3310. len += sg_last->length;
  3311. sg_last = sg_next(sg_last);
  3312. }
  3313. if (rctx->trailing_buf_len) {
  3314. if (cp->ce_support.aligned_only) {
  3315. rctx->data2 = kzalloc((req->nbytes + 64), GFP_ATOMIC);
  3316. if (rctx->data2 == NULL)
  3317. return -ENOMEM;
  3318. memcpy(rctx->data2, staging,
  3319. rctx->trailing_buf_len);
  3320. memcpy((rctx->data2 + rctx->trailing_buf_len),
  3321. rctx->data, req->src->length);
  3322. kfree_sensitive(rctx->data);
  3323. rctx->data = rctx->data2;
  3324. sg_set_buf(&rctx->sg[0], rctx->data,
  3325. (rctx->trailing_buf_len +
  3326. req->src->length));
  3327. req->src = rctx->sg;
  3328. sg_mark_end(&rctx->sg[0]);
  3329. } else {
  3330. sg_mark_end(sg_last);
  3331. memset(rctx->sg, 0, sizeof(rctx->sg));
  3332. sg_set_buf(&rctx->sg[0], staging,
  3333. rctx->trailing_buf_len);
  3334. sg_mark_end(&rctx->sg[1]);
  3335. sg_chain(rctx->sg, 2, req->src);
  3336. req->src = rctx->sg;
  3337. }
  3338. } else
  3339. sg_mark_end(sg_last);
  3340. req->nbytes = nbytes;
  3341. rctx->trailing_buf_len = trailing_buf_len;
  3342. ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
  3343. return ret;
  3344. }
  3345. static int _sha1_update(struct ahash_request *req)
  3346. {
  3347. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3348. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3349. struct crypto_priv *cp = sha_ctx->cp;
  3350. if (cp->ce_support.aligned_only) {
  3351. if (_copy_source(req))
  3352. return -ENOMEM;
  3353. }
  3354. rctx->count += req->nbytes;
  3355. return _sha_update(req, SHA1_BLOCK_SIZE);
  3356. }
  3357. static int _sha256_update(struct ahash_request *req)
  3358. {
  3359. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3360. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3361. struct crypto_priv *cp = sha_ctx->cp;
  3362. if (cp->ce_support.aligned_only) {
  3363. if (_copy_source(req))
  3364. return -ENOMEM;
  3365. }
  3366. rctx->count += req->nbytes;
  3367. return _sha_update(req, SHA256_BLOCK_SIZE);
  3368. }
  3369. static int _sha_final(struct ahash_request *req, uint32_t sha_block_size)
  3370. {
  3371. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3372. struct crypto_priv *cp = sha_ctx->cp;
  3373. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3374. int ret = 0;
  3375. uint8_t *staging;
  3376. if (cp->ce_support.aligned_only) {
  3377. if (_copy_source(req))
  3378. return -ENOMEM;
  3379. }
  3380. rctx->last_blk = 1;
  3381. /* save the original req structure fields*/
  3382. rctx->src = req->src;
  3383. rctx->nbytes = req->nbytes;
  3384. staging = (uint8_t *)ALIGN(((uintptr_t)rctx->staging_dmabuf),
  3385. L1_CACHE_BYTES);
  3386. memcpy(staging, rctx->trailing_buf, rctx->trailing_buf_len);
  3387. sg_set_buf(&rctx->sg[0], staging, rctx->trailing_buf_len);
  3388. sg_mark_end(&rctx->sg[0]);
  3389. req->src = &rctx->sg[0];
  3390. req->nbytes = rctx->trailing_buf_len;
  3391. ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
  3392. return ret;
  3393. }
  3394. static int _sha1_final(struct ahash_request *req)
  3395. {
  3396. return _sha_final(req, SHA1_BLOCK_SIZE);
  3397. }
  3398. static int _sha256_final(struct ahash_request *req)
  3399. {
  3400. return _sha_final(req, SHA256_BLOCK_SIZE);
  3401. }
  3402. static int _sha_digest(struct ahash_request *req)
  3403. {
  3404. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3405. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3406. struct crypto_priv *cp = sha_ctx->cp;
  3407. int ret = 0;
  3408. if (cp->ce_support.aligned_only) {
  3409. if (_copy_source(req))
  3410. return -ENOMEM;
  3411. }
  3412. /* save the original req structure fields*/
  3413. rctx->src = req->src;
  3414. rctx->nbytes = req->nbytes;
  3415. rctx->first_blk = 1;
  3416. rctx->last_blk = 1;
  3417. ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
  3418. return ret;
  3419. }
  3420. static int _sha1_digest(struct ahash_request *req)
  3421. {
  3422. _sha1_init(req);
  3423. return _sha_digest(req);
  3424. }
  3425. static int _sha256_digest(struct ahash_request *req)
  3426. {
  3427. _sha256_init(req);
  3428. return _sha_digest(req);
  3429. }
  3430. #if (KERNEL_VERSION(6, 2, 0) <= LINUX_VERSION_CODE)
  3431. static void _crypto_sha_hmac_ahash_req_complete(void *data, int err)
  3432. {
  3433. struct completion *ahash_req_complete = data;
  3434. #else
  3435. static void _crypto_sha_hmac_ahash_req_complete(
  3436. struct crypto_async_request *req, int err)
  3437. {
  3438. struct completion *ahash_req_complete = req->data;
  3439. #endif
  3440. if (err == -EINPROGRESS)
  3441. return;
  3442. complete(ahash_req_complete);
  3443. }
  3444. static int _sha_hmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  3445. unsigned int len)
  3446. {
  3447. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(&tfm->base);
  3448. uint8_t *in_buf;
  3449. int ret = 0;
  3450. struct scatterlist sg = {0};
  3451. struct ahash_request *ahash_req;
  3452. struct completion ahash_req_complete;
  3453. ahash_req = ahash_request_alloc(tfm, GFP_KERNEL);
  3454. if (ahash_req == NULL)
  3455. return -ENOMEM;
  3456. init_completion(&ahash_req_complete);
  3457. ahash_request_set_callback(ahash_req,
  3458. CRYPTO_TFM_REQ_MAY_BACKLOG,
  3459. _crypto_sha_hmac_ahash_req_complete,
  3460. &ahash_req_complete);
  3461. crypto_ahash_clear_flags(tfm, ~0);
  3462. in_buf = kzalloc(len + 64, GFP_KERNEL);
  3463. if (in_buf == NULL) {
  3464. ahash_request_free(ahash_req);
  3465. return -ENOMEM;
  3466. }
  3467. memcpy(in_buf, key, len);
  3468. sg_set_buf(&sg, in_buf, len);
  3469. sg_mark_end(&sg);
  3470. ahash_request_set_crypt(ahash_req, &sg,
  3471. &sha_ctx->authkey[0], len);
  3472. if (sha_ctx->alg == QCE_HASH_SHA1)
  3473. ret = _sha1_digest(ahash_req);
  3474. else
  3475. ret = _sha256_digest(ahash_req);
  3476. if (ret == -EINPROGRESS || ret == -EBUSY) {
  3477. ret =
  3478. wait_for_completion_interruptible(
  3479. &ahash_req_complete);
  3480. reinit_completion(&sha_ctx->ahash_req_complete);
  3481. }
  3482. kfree_sensitive(in_buf);
  3483. ahash_request_free(ahash_req);
  3484. return ret;
  3485. }
  3486. static int _sha1_hmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  3487. unsigned int len)
  3488. {
  3489. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(&tfm->base);
  3490. int ret = 0;
  3491. memset(&sha_ctx->authkey[0], 0, SHA1_BLOCK_SIZE);
  3492. if (len <= SHA1_BLOCK_SIZE) {
  3493. memcpy(&sha_ctx->authkey[0], key, len);
  3494. sha_ctx->authkey_in_len = len;
  3495. } else {
  3496. sha_ctx->alg = QCE_HASH_SHA1;
  3497. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  3498. ret = _sha_hmac_setkey(tfm, key, len);
  3499. if (ret)
  3500. pr_err("SHA1 hmac setkey failed\n");
  3501. sha_ctx->authkey_in_len = SHA1_BLOCK_SIZE;
  3502. }
  3503. return ret;
  3504. }
  3505. static int _sha256_hmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  3506. unsigned int len)
  3507. {
  3508. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(&tfm->base);
  3509. int ret = 0;
  3510. memset(&sha_ctx->authkey[0], 0, SHA256_BLOCK_SIZE);
  3511. if (len <= SHA256_BLOCK_SIZE) {
  3512. memcpy(&sha_ctx->authkey[0], key, len);
  3513. sha_ctx->authkey_in_len = len;
  3514. } else {
  3515. sha_ctx->alg = QCE_HASH_SHA256;
  3516. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  3517. ret = _sha_hmac_setkey(tfm, key, len);
  3518. if (ret)
  3519. pr_err("SHA256 hmac setkey failed\n");
  3520. sha_ctx->authkey_in_len = SHA256_BLOCK_SIZE;
  3521. }
  3522. return ret;
  3523. }
  3524. static int _sha_hmac_init_ihash(struct ahash_request *req,
  3525. uint32_t sha_block_size)
  3526. {
  3527. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3528. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3529. int i;
  3530. for (i = 0; i < sha_block_size; i++)
  3531. rctx->trailing_buf[i] = sha_ctx->authkey[i] ^ 0x36;
  3532. rctx->trailing_buf_len = sha_block_size;
  3533. return 0;
  3534. }
  3535. static int _sha1_hmac_init(struct ahash_request *req)
  3536. {
  3537. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3538. struct crypto_priv *cp = sha_ctx->cp;
  3539. struct crypto_stat *pstat;
  3540. int ret = 0;
  3541. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3542. pstat = &_qcrypto_stat;
  3543. pstat->sha1_hmac_digest++;
  3544. _sha_init(req);
  3545. memset(&rctx->trailing_buf[0], 0x00, SHA1_BLOCK_SIZE);
  3546. memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
  3547. SHA1_DIGEST_SIZE);
  3548. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  3549. if (cp->ce_support.sha_hmac)
  3550. sha_ctx->alg = QCE_HASH_SHA1_HMAC;
  3551. else {
  3552. sha_ctx->alg = QCE_HASH_SHA1;
  3553. ret = _sha_hmac_init_ihash(req, SHA1_BLOCK_SIZE);
  3554. }
  3555. return ret;
  3556. }
  3557. static int _sha256_hmac_init(struct ahash_request *req)
  3558. {
  3559. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3560. struct crypto_priv *cp = sha_ctx->cp;
  3561. struct crypto_stat *pstat;
  3562. int ret = 0;
  3563. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3564. pstat = &_qcrypto_stat;
  3565. pstat->sha256_hmac_digest++;
  3566. _sha_init(req);
  3567. memset(&rctx->trailing_buf[0], 0x00, SHA256_BLOCK_SIZE);
  3568. memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
  3569. SHA256_DIGEST_SIZE);
  3570. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  3571. if (cp->ce_support.sha_hmac)
  3572. sha_ctx->alg = QCE_HASH_SHA256_HMAC;
  3573. else {
  3574. sha_ctx->alg = QCE_HASH_SHA256;
  3575. ret = _sha_hmac_init_ihash(req, SHA256_BLOCK_SIZE);
  3576. }
  3577. return ret;
  3578. }
  3579. static int _sha1_hmac_update(struct ahash_request *req)
  3580. {
  3581. return _sha1_update(req);
  3582. }
  3583. static int _sha256_hmac_update(struct ahash_request *req)
  3584. {
  3585. return _sha256_update(req);
  3586. }
  3587. static int _sha_hmac_outer_hash(struct ahash_request *req,
  3588. uint32_t sha_digest_size, uint32_t sha_block_size)
  3589. {
  3590. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3591. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3592. struct crypto_priv *cp = sha_ctx->cp;
  3593. int i;
  3594. uint8_t *staging;
  3595. uint8_t *p;
  3596. staging = (uint8_t *)ALIGN(((uintptr_t)rctx->staging_dmabuf),
  3597. L1_CACHE_BYTES);
  3598. p = staging;
  3599. for (i = 0; i < sha_block_size; i++)
  3600. *p++ = sha_ctx->authkey[i] ^ 0x5c;
  3601. memcpy(p, &rctx->digest[0], sha_digest_size);
  3602. sg_set_buf(&rctx->sg[0], staging, sha_block_size +
  3603. sha_digest_size);
  3604. sg_mark_end(&rctx->sg[0]);
  3605. /* save the original req structure fields*/
  3606. rctx->src = req->src;
  3607. rctx->nbytes = req->nbytes;
  3608. req->src = &rctx->sg[0];
  3609. req->nbytes = sha_block_size + sha_digest_size;
  3610. _sha_init(req);
  3611. if (sha_ctx->alg == QCE_HASH_SHA1) {
  3612. memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
  3613. SHA1_DIGEST_SIZE);
  3614. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  3615. } else {
  3616. memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
  3617. SHA256_DIGEST_SIZE);
  3618. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  3619. }
  3620. rctx->last_blk = 1;
  3621. return _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
  3622. }
  3623. static int _sha_hmac_inner_hash(struct ahash_request *req,
  3624. uint32_t sha_digest_size, uint32_t sha_block_size)
  3625. {
  3626. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3627. struct ahash_request *areq = sha_ctx->ahash_req;
  3628. struct crypto_priv *cp = sha_ctx->cp;
  3629. int ret = 0;
  3630. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3631. uint8_t *staging;
  3632. staging = (uint8_t *)ALIGN(((uintptr_t)rctx->staging_dmabuf),
  3633. L1_CACHE_BYTES);
  3634. memcpy(staging, rctx->trailing_buf, rctx->trailing_buf_len);
  3635. sg_set_buf(&rctx->sg[0], staging, rctx->trailing_buf_len);
  3636. sg_mark_end(&rctx->sg[0]);
  3637. ahash_request_set_crypt(areq, &rctx->sg[0], &rctx->digest[0],
  3638. rctx->trailing_buf_len);
  3639. rctx->last_blk = 1;
  3640. ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &areq->base);
  3641. if (ret == -EINPROGRESS || ret == -EBUSY) {
  3642. ret =
  3643. wait_for_completion_interruptible(&sha_ctx->ahash_req_complete);
  3644. reinit_completion(&sha_ctx->ahash_req_complete);
  3645. }
  3646. return ret;
  3647. }
  3648. static int _sha1_hmac_final(struct ahash_request *req)
  3649. {
  3650. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3651. struct crypto_priv *cp = sha_ctx->cp;
  3652. int ret = 0;
  3653. if (cp->ce_support.sha_hmac)
  3654. return _sha_final(req, SHA1_BLOCK_SIZE);
  3655. ret = _sha_hmac_inner_hash(req, SHA1_DIGEST_SIZE, SHA1_BLOCK_SIZE);
  3656. if (ret)
  3657. return ret;
  3658. return _sha_hmac_outer_hash(req, SHA1_DIGEST_SIZE, SHA1_BLOCK_SIZE);
  3659. }
  3660. static int _sha256_hmac_final(struct ahash_request *req)
  3661. {
  3662. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3663. struct crypto_priv *cp = sha_ctx->cp;
  3664. int ret = 0;
  3665. if (cp->ce_support.sha_hmac)
  3666. return _sha_final(req, SHA256_BLOCK_SIZE);
  3667. ret = _sha_hmac_inner_hash(req, SHA256_DIGEST_SIZE, SHA256_BLOCK_SIZE);
  3668. if (ret)
  3669. return ret;
  3670. return _sha_hmac_outer_hash(req, SHA256_DIGEST_SIZE, SHA256_BLOCK_SIZE);
  3671. }
  3672. static int _sha1_hmac_digest(struct ahash_request *req)
  3673. {
  3674. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3675. struct crypto_stat *pstat;
  3676. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3677. pstat = &_qcrypto_stat;
  3678. pstat->sha1_hmac_digest++;
  3679. _sha_init(req);
  3680. memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
  3681. SHA1_DIGEST_SIZE);
  3682. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  3683. sha_ctx->alg = QCE_HASH_SHA1_HMAC;
  3684. return _sha_digest(req);
  3685. }
  3686. static int _sha256_hmac_digest(struct ahash_request *req)
  3687. {
  3688. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3689. struct crypto_stat *pstat;
  3690. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3691. pstat = &_qcrypto_stat;
  3692. pstat->sha256_hmac_digest++;
  3693. _sha_init(req);
  3694. memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
  3695. SHA256_DIGEST_SIZE);
  3696. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  3697. sha_ctx->alg = QCE_HASH_SHA256_HMAC;
  3698. return _sha_digest(req);
  3699. }
  3700. static int _qcrypto_prefix_alg_cra_name(char cra_name[], unsigned int size)
  3701. {
  3702. char new_cra_name[CRYPTO_MAX_ALG_NAME] = "qcom-";
  3703. if (size >= CRYPTO_MAX_ALG_NAME - strlen("qcom-"))
  3704. return -EINVAL;
  3705. strlcat(new_cra_name, cra_name, CRYPTO_MAX_ALG_NAME);
  3706. strlcpy(cra_name, new_cra_name, CRYPTO_MAX_ALG_NAME);
  3707. return 0;
  3708. }
  3709. int qcrypto_cipher_set_device(struct skcipher_request *req, unsigned int dev)
  3710. {
  3711. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  3712. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  3713. struct crypto_priv *cp = ctx->cp;
  3714. struct crypto_engine *pengine = NULL;
  3715. pengine = _qrypto_find_pengine_device(cp, dev);
  3716. if (pengine == NULL)
  3717. return -ENODEV;
  3718. ctx->pengine = pengine;
  3719. return 0;
  3720. }
  3721. EXPORT_SYMBOL(qcrypto_cipher_set_device);
  3722. int qcrypto_cipher_set_device_hw(struct skcipher_request *req, u32 dev,
  3723. u32 hw_inst)
  3724. {
  3725. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3726. struct crypto_priv *cp = ctx->cp;
  3727. struct crypto_engine *pengine = NULL;
  3728. pengine = _qrypto_find_pengine_device_hw(cp, dev, hw_inst);
  3729. if (pengine == NULL)
  3730. return -ENODEV;
  3731. ctx->pengine = pengine;
  3732. return 0;
  3733. }
  3734. EXPORT_SYMBOL(qcrypto_cipher_set_device_hw);
  3735. int qcrypto_aead_set_device(struct aead_request *req, unsigned int dev)
  3736. {
  3737. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3738. struct crypto_priv *cp = ctx->cp;
  3739. struct crypto_engine *pengine = NULL;
  3740. pengine = _qrypto_find_pengine_device(cp, dev);
  3741. if (pengine == NULL)
  3742. return -ENODEV;
  3743. ctx->pengine = pengine;
  3744. return 0;
  3745. }
  3746. EXPORT_SYMBOL(qcrypto_aead_set_device);
  3747. int qcrypto_ahash_set_device(struct ahash_request *req, unsigned int dev)
  3748. {
  3749. struct qcrypto_sha_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3750. struct crypto_priv *cp = ctx->cp;
  3751. struct crypto_engine *pengine = NULL;
  3752. pengine = _qrypto_find_pengine_device(cp, dev);
  3753. if (pengine == NULL)
  3754. return -ENODEV;
  3755. ctx->pengine = pengine;
  3756. return 0;
  3757. }
  3758. EXPORT_SYMBOL(qcrypto_ahash_set_device);
  3759. int qcrypto_cipher_set_flag(struct skcipher_request *req, unsigned int flags)
  3760. {
  3761. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  3762. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  3763. struct crypto_priv *cp = ctx->cp;
  3764. if ((flags & QCRYPTO_CTX_USE_HW_KEY) &&
  3765. (!cp->platform_support.hw_key_support)) {
  3766. pr_err("%s HW key usage not supported\n", __func__);
  3767. return -EINVAL;
  3768. }
  3769. if (((flags | ctx->flags) & QCRYPTO_CTX_KEY_MASK) ==
  3770. QCRYPTO_CTX_KEY_MASK) {
  3771. pr_err("%s Cannot set all key flags\n", __func__);
  3772. return -EINVAL;
  3773. }
  3774. ctx->flags |= flags;
  3775. return 0;
  3776. }
  3777. EXPORT_SYMBOL(qcrypto_cipher_set_flag);
  3778. int qcrypto_aead_set_flag(struct aead_request *req, unsigned int flags)
  3779. {
  3780. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3781. struct crypto_priv *cp = ctx->cp;
  3782. if ((flags & QCRYPTO_CTX_USE_HW_KEY) &&
  3783. (!cp->platform_support.hw_key_support)) {
  3784. pr_err("%s HW key usage not supported\n", __func__);
  3785. return -EINVAL;
  3786. }
  3787. if (((flags | ctx->flags) & QCRYPTO_CTX_KEY_MASK) ==
  3788. QCRYPTO_CTX_KEY_MASK) {
  3789. pr_err("%s Cannot set all key flags\n", __func__);
  3790. return -EINVAL;
  3791. }
  3792. ctx->flags |= flags;
  3793. return 0;
  3794. }
  3795. EXPORT_SYMBOL(qcrypto_aead_set_flag);
  3796. int qcrypto_ahash_set_flag(struct ahash_request *req, unsigned int flags)
  3797. {
  3798. struct qcrypto_sha_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3799. struct crypto_priv *cp = ctx->cp;
  3800. if ((flags & QCRYPTO_CTX_USE_HW_KEY) &&
  3801. (!cp->platform_support.hw_key_support)) {
  3802. pr_err("%s HW key usage not supported\n", __func__);
  3803. return -EINVAL;
  3804. }
  3805. if (((flags | ctx->flags) & QCRYPTO_CTX_KEY_MASK) ==
  3806. QCRYPTO_CTX_KEY_MASK) {
  3807. pr_err("%s Cannot set all key flags\n", __func__);
  3808. return -EINVAL;
  3809. }
  3810. ctx->flags |= flags;
  3811. return 0;
  3812. }
  3813. EXPORT_SYMBOL(qcrypto_ahash_set_flag);
  3814. int qcrypto_cipher_clear_flag(struct skcipher_request *req,
  3815. unsigned int flags)
  3816. {
  3817. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  3818. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  3819. ctx->flags &= ~flags;
  3820. return 0;
  3821. }
  3822. EXPORT_SYMBOL(qcrypto_cipher_clear_flag);
  3823. int qcrypto_aead_clear_flag(struct aead_request *req, unsigned int flags)
  3824. {
  3825. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3826. ctx->flags &= ~flags;
  3827. return 0;
  3828. }
  3829. EXPORT_SYMBOL(qcrypto_aead_clear_flag);
  3830. int qcrypto_ahash_clear_flag(struct ahash_request *req, unsigned int flags)
  3831. {
  3832. struct qcrypto_sha_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3833. ctx->flags &= ~flags;
  3834. return 0;
  3835. }
  3836. EXPORT_SYMBOL(qcrypto_ahash_clear_flag);
  3837. static struct ahash_alg _qcrypto_ahash_algos[] = {
  3838. {
  3839. .init = _sha1_init,
  3840. .update = _sha1_update,
  3841. .final = _sha1_final,
  3842. .digest = _sha1_digest,
  3843. .export = _sha1_export,
  3844. .import = _sha1_import,
  3845. .halg = {
  3846. .digestsize = SHA1_DIGEST_SIZE,
  3847. .statesize = sizeof(struct sha1_state),
  3848. .base = {
  3849. .cra_name = "sha1",
  3850. .cra_driver_name = "qcrypto-sha1",
  3851. .cra_priority = 300,
  3852. .cra_flags = CRYPTO_ALG_ASYNC,
  3853. .cra_blocksize = SHA1_BLOCK_SIZE,
  3854. .cra_ctxsize = sizeof(struct qcrypto_sha_ctx),
  3855. .cra_alignmask = 0,
  3856. .cra_module = THIS_MODULE,
  3857. .cra_init = _qcrypto_ahash_cra_init,
  3858. .cra_exit = _qcrypto_ahash_cra_exit,
  3859. },
  3860. },
  3861. },
  3862. {
  3863. .init = _sha256_init,
  3864. .update = _sha256_update,
  3865. .final = _sha256_final,
  3866. .digest = _sha256_digest,
  3867. .export = _sha256_export,
  3868. .import = _sha256_import,
  3869. .halg = {
  3870. .digestsize = SHA256_DIGEST_SIZE,
  3871. .statesize = sizeof(struct sha256_state),
  3872. .base = {
  3873. .cra_name = "sha256",
  3874. .cra_driver_name = "qcrypto-sha256",
  3875. .cra_priority = 300,
  3876. .cra_flags = CRYPTO_ALG_ASYNC,
  3877. .cra_blocksize = SHA256_BLOCK_SIZE,
  3878. .cra_ctxsize = sizeof(struct qcrypto_sha_ctx),
  3879. .cra_alignmask = 0,
  3880. .cra_module = THIS_MODULE,
  3881. .cra_init = _qcrypto_ahash_cra_init,
  3882. .cra_exit = _qcrypto_ahash_cra_exit,
  3883. },
  3884. },
  3885. },
  3886. };
  3887. static struct ahash_alg _qcrypto_sha_hmac_algos[] = {
  3888. {
  3889. .init = _sha1_hmac_init,
  3890. .update = _sha1_hmac_update,
  3891. .final = _sha1_hmac_final,
  3892. .export = _sha1_hmac_export,
  3893. .import = _sha1_hmac_import,
  3894. .digest = _sha1_hmac_digest,
  3895. .setkey = _sha1_hmac_setkey,
  3896. .halg = {
  3897. .digestsize = SHA1_DIGEST_SIZE,
  3898. .statesize = sizeof(struct sha1_state),
  3899. .base = {
  3900. .cra_name = "hmac(sha1)",
  3901. .cra_driver_name = "qcrypto-hmac-sha1",
  3902. .cra_priority = 300,
  3903. .cra_flags = CRYPTO_ALG_ASYNC,
  3904. .cra_blocksize = SHA1_BLOCK_SIZE,
  3905. .cra_ctxsize = sizeof(struct qcrypto_sha_ctx),
  3906. .cra_alignmask = 0,
  3907. .cra_module = THIS_MODULE,
  3908. .cra_init = _qcrypto_ahash_hmac_cra_init,
  3909. .cra_exit = _qcrypto_ahash_cra_exit,
  3910. },
  3911. },
  3912. },
  3913. {
  3914. .init = _sha256_hmac_init,
  3915. .update = _sha256_hmac_update,
  3916. .final = _sha256_hmac_final,
  3917. .export = _sha256_hmac_export,
  3918. .import = _sha256_hmac_import,
  3919. .digest = _sha256_hmac_digest,
  3920. .setkey = _sha256_hmac_setkey,
  3921. .halg = {
  3922. .digestsize = SHA256_DIGEST_SIZE,
  3923. .statesize = sizeof(struct sha256_state),
  3924. .base = {
  3925. .cra_name = "hmac(sha256)",
  3926. .cra_driver_name = "qcrypto-hmac-sha256",
  3927. .cra_priority = 300,
  3928. .cra_flags = CRYPTO_ALG_ASYNC,
  3929. .cra_blocksize = SHA256_BLOCK_SIZE,
  3930. .cra_ctxsize = sizeof(struct qcrypto_sha_ctx),
  3931. .cra_alignmask = 0,
  3932. .cra_module = THIS_MODULE,
  3933. .cra_init = _qcrypto_ahash_hmac_cra_init,
  3934. .cra_exit = _qcrypto_ahash_cra_exit,
  3935. },
  3936. },
  3937. },
  3938. };
  3939. static struct skcipher_alg _qcrypto_sk_cipher_algos[] = {
  3940. {
  3941. .setkey = _qcrypto_setkey_aes,
  3942. .encrypt = _qcrypto_enc_aes_ecb,
  3943. .decrypt = _qcrypto_dec_aes_ecb,
  3944. .init = _qcrypto_aes_skcipher_init,
  3945. .exit = _qcrypto_aes_skcipher_exit,
  3946. .min_keysize = AES_MIN_KEY_SIZE,
  3947. .max_keysize = AES_MAX_KEY_SIZE,
  3948. .base = {
  3949. .cra_name = "ecb(aes)",
  3950. .cra_driver_name = "qcrypto-ecb-aes",
  3951. .cra_priority = 300,
  3952. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC,
  3953. .cra_blocksize = AES_BLOCK_SIZE,
  3954. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3955. .cra_alignmask = 0,
  3956. .cra_module = THIS_MODULE,
  3957. },
  3958. },
  3959. {
  3960. .setkey = _qcrypto_setkey_aes,
  3961. .encrypt = _qcrypto_enc_aes_cbc,
  3962. .decrypt = _qcrypto_dec_aes_cbc,
  3963. .init = _qcrypto_aes_skcipher_init,
  3964. .exit = _qcrypto_aes_skcipher_exit,
  3965. .min_keysize = AES_MIN_KEY_SIZE,
  3966. .max_keysize = AES_MAX_KEY_SIZE,
  3967. .ivsize = AES_BLOCK_SIZE,
  3968. .base = {
  3969. .cra_name = "cbc(aes)",
  3970. .cra_driver_name = "qcrypto-cbc-aes",
  3971. .cra_priority = 300,
  3972. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC,
  3973. .cra_blocksize = AES_BLOCK_SIZE,
  3974. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3975. .cra_alignmask = 0,
  3976. .cra_module = THIS_MODULE,
  3977. },
  3978. },
  3979. {
  3980. .setkey = _qcrypto_setkey_aes,
  3981. .encrypt = _qcrypto_enc_aes_ctr,
  3982. .decrypt = _qcrypto_dec_aes_ctr,
  3983. .init = _qcrypto_aes_skcipher_init,
  3984. .exit = _qcrypto_aes_skcipher_exit,
  3985. .min_keysize = AES_MIN_KEY_SIZE,
  3986. .max_keysize = AES_MAX_KEY_SIZE,
  3987. .ivsize = AES_BLOCK_SIZE,
  3988. .base = {
  3989. .cra_name = "ctr(aes)",
  3990. .cra_driver_name = "qcrypto-ctr-aes",
  3991. .cra_priority = 300,
  3992. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC,
  3993. .cra_blocksize = AES_BLOCK_SIZE,
  3994. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3995. .cra_alignmask = 0,
  3996. .cra_module = THIS_MODULE,
  3997. },
  3998. },
  3999. {
  4000. .setkey = _qcrypto_setkey_des,
  4001. .encrypt = _qcrypto_enc_des_ecb,
  4002. .decrypt = _qcrypto_dec_des_ecb,
  4003. .init = _qcrypto_skcipher_init,
  4004. .exit = _qcrypto_skcipher_exit,
  4005. .min_keysize = DES_KEY_SIZE,
  4006. .max_keysize = DES_KEY_SIZE,
  4007. .base = {
  4008. .cra_name = "ecb(des)",
  4009. .cra_driver_name = "qcrypto-ecb-des",
  4010. .cra_priority = 300,
  4011. .cra_flags = CRYPTO_ALG_ASYNC,
  4012. .cra_blocksize = DES_BLOCK_SIZE,
  4013. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4014. .cra_alignmask = 0,
  4015. .cra_module = THIS_MODULE,
  4016. },
  4017. },
  4018. {
  4019. .setkey = _qcrypto_setkey_des,
  4020. .encrypt = _qcrypto_enc_des_cbc,
  4021. .decrypt = _qcrypto_dec_des_cbc,
  4022. .init = _qcrypto_skcipher_init,
  4023. .exit = _qcrypto_skcipher_exit,
  4024. .min_keysize = DES_KEY_SIZE,
  4025. .max_keysize = DES_KEY_SIZE,
  4026. .ivsize = DES_BLOCK_SIZE,
  4027. .base = {
  4028. .cra_name = "cbc(des)",
  4029. .cra_driver_name = "qcrypto-cbc-des",
  4030. .cra_priority = 300,
  4031. .cra_flags = CRYPTO_ALG_ASYNC,
  4032. .cra_blocksize = DES_BLOCK_SIZE,
  4033. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4034. .cra_alignmask = 0,
  4035. .cra_module = THIS_MODULE,
  4036. },
  4037. },
  4038. {
  4039. .setkey = _qcrypto_setkey_3des,
  4040. .encrypt = _qcrypto_enc_3des_ecb,
  4041. .decrypt = _qcrypto_dec_3des_ecb,
  4042. .init = _qcrypto_skcipher_init,
  4043. .exit = _qcrypto_skcipher_exit,
  4044. .min_keysize = DES3_EDE_KEY_SIZE,
  4045. .max_keysize = DES3_EDE_KEY_SIZE,
  4046. .base = {
  4047. .cra_name = "ecb(des3_ede)",
  4048. .cra_driver_name = "qcrypto-ecb-3des",
  4049. .cra_priority = 300,
  4050. .cra_flags = CRYPTO_ALG_ASYNC,
  4051. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  4052. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4053. .cra_alignmask = 0,
  4054. .cra_module = THIS_MODULE,
  4055. },
  4056. },
  4057. {
  4058. .setkey = _qcrypto_setkey_3des,
  4059. .encrypt = _qcrypto_enc_3des_cbc,
  4060. .decrypt = _qcrypto_dec_3des_cbc,
  4061. .init = _qcrypto_skcipher_init,
  4062. .exit = _qcrypto_skcipher_exit,
  4063. .min_keysize = DES3_EDE_KEY_SIZE,
  4064. .max_keysize = DES3_EDE_KEY_SIZE,
  4065. .ivsize = DES3_EDE_BLOCK_SIZE,
  4066. .base = {
  4067. .cra_name = "cbc(des3_ede)",
  4068. .cra_driver_name = "qcrypto-cbc-3des",
  4069. .cra_priority = 300,
  4070. .cra_flags = CRYPTO_ALG_ASYNC,
  4071. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  4072. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4073. .cra_alignmask = 0,
  4074. .cra_module = THIS_MODULE,
  4075. },
  4076. },
  4077. };
  4078. static struct skcipher_alg _qcrypto_sk_cipher_xts_algo = {
  4079. .setkey = _qcrypto_setkey_aes_xts,
  4080. .encrypt = _qcrypto_enc_aes_xts,
  4081. .decrypt = _qcrypto_dec_aes_xts,
  4082. .init = _qcrypto_skcipher_init,
  4083. .exit = _qcrypto_skcipher_exit,
  4084. .min_keysize = AES_MIN_KEY_SIZE,
  4085. .max_keysize = AES_MAX_KEY_SIZE,
  4086. .ivsize = AES_BLOCK_SIZE,
  4087. .base = {
  4088. .cra_name = "xts(aes)",
  4089. .cra_driver_name = "qcrypto-xts-aes",
  4090. .cra_priority = 300,
  4091. .cra_flags = CRYPTO_ALG_ASYNC,
  4092. .cra_blocksize = AES_BLOCK_SIZE,
  4093. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4094. .cra_alignmask = 0,
  4095. .cra_module = THIS_MODULE,
  4096. },
  4097. };
  4098. static struct aead_alg _qcrypto_aead_sha1_hmac_algos[] = {
  4099. {
  4100. .setkey = _qcrypto_aead_setkey,
  4101. .setauthsize = _qcrypto_aead_setauthsize,
  4102. .encrypt = _qcrypto_aead_encrypt_aes_cbc,
  4103. .decrypt = _qcrypto_aead_decrypt_aes_cbc,
  4104. .init = _qcrypto_cra_aead_aes_sha1_init,
  4105. .exit = _qcrypto_cra_aead_aes_exit,
  4106. .ivsize = AES_BLOCK_SIZE,
  4107. .maxauthsize = SHA1_DIGEST_SIZE,
  4108. .base = {
  4109. .cra_name = "authenc(hmac(sha1),cbc(aes))",
  4110. .cra_driver_name = "qcrypto-aead-hmac-sha1-cbc-aes",
  4111. .cra_priority = 300,
  4112. .cra_flags = CRYPTO_ALG_ASYNC,
  4113. .cra_blocksize = AES_BLOCK_SIZE,
  4114. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4115. .cra_alignmask = 0,
  4116. .cra_module = THIS_MODULE,
  4117. },
  4118. },
  4119. {
  4120. .setkey = _qcrypto_aead_setkey,
  4121. .setauthsize = _qcrypto_aead_setauthsize,
  4122. .encrypt = _qcrypto_aead_encrypt_des_cbc,
  4123. .decrypt = _qcrypto_aead_decrypt_des_cbc,
  4124. .init = _qcrypto_cra_aead_sha1_init,
  4125. .exit = _qcrypto_cra_aead_exit,
  4126. .ivsize = DES_BLOCK_SIZE,
  4127. .maxauthsize = SHA1_DIGEST_SIZE,
  4128. .base = {
  4129. .cra_name = "authenc(hmac(sha1),cbc(des))",
  4130. .cra_driver_name = "qcrypto-aead-hmac-sha1-cbc-des",
  4131. .cra_priority = 300,
  4132. .cra_flags = CRYPTO_ALG_ASYNC,
  4133. .cra_blocksize = DES_BLOCK_SIZE,
  4134. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4135. .cra_alignmask = 0,
  4136. .cra_module = THIS_MODULE,
  4137. },
  4138. },
  4139. {
  4140. .setkey = _qcrypto_aead_setkey,
  4141. .setauthsize = _qcrypto_aead_setauthsize,
  4142. .encrypt = _qcrypto_aead_encrypt_3des_cbc,
  4143. .decrypt = _qcrypto_aead_decrypt_3des_cbc,
  4144. .init = _qcrypto_cra_aead_sha1_init,
  4145. .exit = _qcrypto_cra_aead_exit,
  4146. .ivsize = DES3_EDE_BLOCK_SIZE,
  4147. .maxauthsize = SHA1_DIGEST_SIZE,
  4148. .base = {
  4149. .cra_name = "authenc(hmac(sha1),cbc(des3_ede))",
  4150. .cra_driver_name = "qcrypto-aead-hmac-sha1-cbc-3des",
  4151. .cra_priority = 300,
  4152. .cra_flags = CRYPTO_ALG_ASYNC,
  4153. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  4154. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4155. .cra_alignmask = 0,
  4156. .cra_module = THIS_MODULE,
  4157. },
  4158. },
  4159. };
  4160. static struct aead_alg _qcrypto_aead_sha256_hmac_algos[] = {
  4161. {
  4162. .setkey = _qcrypto_aead_setkey,
  4163. .setauthsize = _qcrypto_aead_setauthsize,
  4164. .encrypt = _qcrypto_aead_encrypt_aes_cbc,
  4165. .decrypt = _qcrypto_aead_decrypt_aes_cbc,
  4166. .init = _qcrypto_cra_aead_aes_sha256_init,
  4167. .exit = _qcrypto_cra_aead_aes_exit,
  4168. .ivsize = AES_BLOCK_SIZE,
  4169. .maxauthsize = SHA256_DIGEST_SIZE,
  4170. .base = {
  4171. .cra_name = "authenc(hmac(sha256),cbc(aes))",
  4172. .cra_driver_name = "qcrypto-aead-hmac-sha256-cbc-aes",
  4173. .cra_priority = 300,
  4174. .cra_flags = CRYPTO_ALG_ASYNC,
  4175. .cra_blocksize = AES_BLOCK_SIZE,
  4176. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4177. .cra_alignmask = 0,
  4178. .cra_module = THIS_MODULE,
  4179. },
  4180. },
  4181. {
  4182. .setkey = _qcrypto_aead_setkey,
  4183. .setauthsize = _qcrypto_aead_setauthsize,
  4184. .encrypt = _qcrypto_aead_encrypt_des_cbc,
  4185. .decrypt = _qcrypto_aead_decrypt_des_cbc,
  4186. .init = _qcrypto_cra_aead_sha256_init,
  4187. .exit = _qcrypto_cra_aead_exit,
  4188. .ivsize = DES_BLOCK_SIZE,
  4189. .maxauthsize = SHA256_DIGEST_SIZE,
  4190. .base = {
  4191. .cra_name = "authenc(hmac(sha256),cbc(des))",
  4192. .cra_driver_name = "qcrypto-aead-hmac-sha256-cbc-des",
  4193. .cra_priority = 300,
  4194. .cra_flags = CRYPTO_ALG_ASYNC,
  4195. .cra_blocksize = DES_BLOCK_SIZE,
  4196. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4197. .cra_alignmask = 0,
  4198. .cra_module = THIS_MODULE,
  4199. },
  4200. },
  4201. {
  4202. .setkey = _qcrypto_aead_setkey,
  4203. .setauthsize = _qcrypto_aead_setauthsize,
  4204. .encrypt = _qcrypto_aead_encrypt_3des_cbc,
  4205. .decrypt = _qcrypto_aead_decrypt_3des_cbc,
  4206. .init = _qcrypto_cra_aead_sha256_init,
  4207. .exit = _qcrypto_cra_aead_exit,
  4208. .ivsize = DES3_EDE_BLOCK_SIZE,
  4209. .maxauthsize = SHA256_DIGEST_SIZE,
  4210. .base = {
  4211. .cra_name = "authenc(hmac(sha256),cbc(des3_ede))",
  4212. .cra_driver_name = "qcrypto-aead-hmac-sha256-cbc-3des",
  4213. .cra_priority = 300,
  4214. .cra_flags = CRYPTO_ALG_ASYNC,
  4215. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  4216. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4217. .cra_alignmask = 0,
  4218. .cra_module = THIS_MODULE,
  4219. },
  4220. },
  4221. };
  4222. static struct aead_alg _qcrypto_aead_ccm_algo = {
  4223. .setkey = _qcrypto_aead_ccm_setkey,
  4224. .setauthsize = _qcrypto_aead_ccm_setauthsize,
  4225. .encrypt = _qcrypto_aead_encrypt_aes_ccm,
  4226. .decrypt = _qcrypto_aead_decrypt_aes_ccm,
  4227. .init = _qcrypto_cra_aead_ccm_init,
  4228. .exit = _qcrypto_cra_aead_exit,
  4229. .ivsize = AES_BLOCK_SIZE,
  4230. .maxauthsize = AES_BLOCK_SIZE,
  4231. .base = {
  4232. .cra_name = "ccm(aes)",
  4233. .cra_driver_name = "qcrypto-aes-ccm",
  4234. .cra_priority = 300,
  4235. .cra_flags = CRYPTO_ALG_ASYNC,
  4236. .cra_blocksize = AES_BLOCK_SIZE,
  4237. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4238. .cra_alignmask = 0,
  4239. .cra_module = THIS_MODULE,
  4240. },
  4241. };
  4242. static struct aead_alg _qcrypto_aead_rfc4309_ccm_algo = {
  4243. .setkey = _qcrypto_aead_rfc4309_ccm_setkey,
  4244. .setauthsize = _qcrypto_aead_rfc4309_ccm_setauthsize,
  4245. .encrypt = _qcrypto_aead_rfc4309_enc_aes_ccm,
  4246. .decrypt = _qcrypto_aead_rfc4309_dec_aes_ccm,
  4247. .init = _qcrypto_cra_aead_rfc4309_ccm_init,
  4248. .exit = _qcrypto_cra_aead_exit,
  4249. .ivsize = 8,
  4250. .maxauthsize = 16,
  4251. .base = {
  4252. .cra_name = "rfc4309(ccm(aes))",
  4253. .cra_driver_name = "qcrypto-rfc4309-aes-ccm",
  4254. .cra_priority = 300,
  4255. .cra_flags = CRYPTO_ALG_ASYNC,
  4256. .cra_blocksize = 1,
  4257. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4258. .cra_alignmask = 0,
  4259. .cra_module = THIS_MODULE,
  4260. },
  4261. };
  4262. static int _qcrypto_probe(struct platform_device *pdev)
  4263. {
  4264. int rc = 0;
  4265. void *handle;
  4266. struct crypto_priv *cp = &qcrypto_dev;
  4267. int i;
  4268. struct msm_ce_hw_support *platform_support;
  4269. struct crypto_engine *pengine;
  4270. unsigned long flags;
  4271. struct qcrypto_req_control *pqcrypto_req_control = NULL;
  4272. pengine = kzalloc(sizeof(*pengine), GFP_KERNEL);
  4273. if (!pengine)
  4274. return -ENOMEM;
  4275. pengine->icc_path = of_icc_get(&pdev->dev, "data_path");
  4276. if (IS_ERR(pengine->icc_path)) {
  4277. dev_err(&pdev->dev, "failed to get icc path\n");
  4278. rc = PTR_ERR(pengine->icc_path);
  4279. goto exit_kzfree;
  4280. }
  4281. pengine->bw_state = BUS_NO_BANDWIDTH;
  4282. rc = icc_set_bw(pengine->icc_path, CRYPTO_AVG_BW, CRYPTO_PEAK_BW);
  4283. if (rc) {
  4284. dev_err(&pdev->dev, "failed to set high bandwidth\n");
  4285. goto exit_kzfree;
  4286. }
  4287. handle = qce_open(pdev, &rc);
  4288. if (handle == NULL) {
  4289. rc = -ENODEV;
  4290. goto exit_free_pdata;
  4291. }
  4292. rc = icc_set_bw(pengine->icc_path, 0, 0);
  4293. if (rc) {
  4294. dev_err(&pdev->dev, "failed to set low bandwidth\n");
  4295. goto exit_qce_close;
  4296. }
  4297. platform_set_drvdata(pdev, pengine);
  4298. pengine->qce = handle;
  4299. pengine->pcp = cp;
  4300. pengine->pdev = pdev;
  4301. pengine->signature = 0xdeadbeef;
  4302. timer_setup(&(pengine->bw_reaper_timer),
  4303. qcrypto_bw_reaper_timer_callback, 0);
  4304. INIT_WORK(&pengine->bw_reaper_ws, qcrypto_bw_reaper_work);
  4305. INIT_WORK(&pengine->bw_allocate_ws, qcrypto_bw_allocate_work);
  4306. pengine->high_bw_req = false;
  4307. pengine->active_seq = 0;
  4308. pengine->last_active_seq = 0;
  4309. pengine->check_flag = false;
  4310. pengine->max_req_used = 0;
  4311. pengine->issue_req = false;
  4312. crypto_init_queue(&pengine->req_queue, MSM_QCRYPTO_REQ_QUEUE_LENGTH);
  4313. mutex_lock(&cp->engine_lock);
  4314. cp->total_units++;
  4315. pengine->unit = cp->total_units;
  4316. spin_lock_irqsave(&cp->lock, flags);
  4317. pengine->first_engine = list_empty(&cp->engine_list);
  4318. if (pengine->first_engine)
  4319. cp->first_engine = pengine;
  4320. list_add_tail(&pengine->elist, &cp->engine_list);
  4321. cp->next_engine = pengine;
  4322. spin_unlock_irqrestore(&cp->lock, flags);
  4323. qce_hw_support(pengine->qce, &cp->ce_support);
  4324. pengine->ce_hw_instance = cp->ce_support.ce_hw_instance;
  4325. pengine->max_req = cp->ce_support.max_request;
  4326. pqcrypto_req_control = kcalloc(pengine->max_req,
  4327. sizeof(struct qcrypto_req_control),
  4328. GFP_KERNEL);
  4329. if (pqcrypto_req_control == NULL) {
  4330. rc = -ENOMEM;
  4331. goto exit_unlock_mutex;
  4332. }
  4333. qcrypto_init_req_control(pengine, pqcrypto_req_control);
  4334. if (cp->ce_support.bam) {
  4335. cp->platform_support.ce_shared = cp->ce_support.is_shared;
  4336. cp->platform_support.shared_ce_resource = 0;
  4337. cp->platform_support.hw_key_support = cp->ce_support.hw_key;
  4338. cp->platform_support.sha_hmac = 1;
  4339. pengine->ce_device = cp->ce_support.ce_device;
  4340. } else {
  4341. platform_support =
  4342. (struct msm_ce_hw_support *)pdev->dev.platform_data;
  4343. cp->platform_support.ce_shared = platform_support->ce_shared;
  4344. cp->platform_support.shared_ce_resource =
  4345. platform_support->shared_ce_resource;
  4346. cp->platform_support.hw_key_support =
  4347. platform_support->hw_key_support;
  4348. cp->platform_support.sha_hmac = platform_support->sha_hmac;
  4349. }
  4350. if (cp->total_units != 1)
  4351. goto exit_unlock_mutex;
  4352. /* register crypto cipher algorithms the device supports */
  4353. for (i = 0; i < ARRAY_SIZE(_qcrypto_sk_cipher_algos); i++) {
  4354. struct qcrypto_alg *q_alg;
  4355. q_alg = _qcrypto_cipher_alg_alloc(cp,
  4356. &_qcrypto_sk_cipher_algos[i]);
  4357. if (IS_ERR(q_alg)) {
  4358. rc = PTR_ERR(q_alg);
  4359. goto err;
  4360. }
  4361. if (cp->ce_support.use_sw_aes_cbc_ecb_ctr_algo) {
  4362. rc = _qcrypto_prefix_alg_cra_name(
  4363. q_alg->cipher_alg.base.cra_name,
  4364. strlen(q_alg->cipher_alg.base.cra_name));
  4365. if (rc) {
  4366. dev_err(&pdev->dev,
  4367. "The algorithm name %s is too long.\n",
  4368. q_alg->cipher_alg.base.cra_name);
  4369. kfree(q_alg);
  4370. goto err;
  4371. }
  4372. }
  4373. rc = crypto_register_skcipher(&q_alg->cipher_alg);
  4374. if (rc) {
  4375. dev_err(&pdev->dev, "%s alg registration failed\n",
  4376. q_alg->cipher_alg.base.cra_driver_name);
  4377. kfree_sensitive(q_alg);
  4378. } else {
  4379. list_add_tail(&q_alg->entry, &cp->alg_list);
  4380. dev_info(&pdev->dev, "%s\n",
  4381. q_alg->cipher_alg.base.cra_driver_name);
  4382. }
  4383. }
  4384. /* register crypto cipher algorithms the device supports */
  4385. if (cp->ce_support.aes_xts) {
  4386. struct qcrypto_alg *q_alg;
  4387. q_alg = _qcrypto_cipher_alg_alloc(cp,
  4388. &_qcrypto_sk_cipher_xts_algo);
  4389. if (IS_ERR(q_alg)) {
  4390. rc = PTR_ERR(q_alg);
  4391. goto err;
  4392. }
  4393. if (cp->ce_support.use_sw_aes_xts_algo) {
  4394. rc = _qcrypto_prefix_alg_cra_name(
  4395. q_alg->cipher_alg.base.cra_name,
  4396. strlen(q_alg->cipher_alg.base.cra_name));
  4397. if (rc) {
  4398. dev_err(&pdev->dev,
  4399. "The algorithm name %s is too long.\n",
  4400. q_alg->cipher_alg.base.cra_name);
  4401. kfree(q_alg);
  4402. goto err;
  4403. }
  4404. }
  4405. rc = crypto_register_skcipher(&q_alg->cipher_alg);
  4406. if (rc) {
  4407. dev_err(&pdev->dev, "%s alg registration failed\n",
  4408. q_alg->cipher_alg.base.cra_driver_name);
  4409. kfree_sensitive(q_alg);
  4410. } else {
  4411. list_add_tail(&q_alg->entry, &cp->alg_list);
  4412. dev_info(&pdev->dev, "%s\n",
  4413. q_alg->cipher_alg.base.cra_driver_name);
  4414. }
  4415. }
  4416. /*
  4417. * Register crypto hash (sha1 and sha256) algorithms the
  4418. * device supports
  4419. */
  4420. for (i = 0; i < ARRAY_SIZE(_qcrypto_ahash_algos); i++) {
  4421. struct qcrypto_alg *q_alg = NULL;
  4422. q_alg = _qcrypto_sha_alg_alloc(cp, &_qcrypto_ahash_algos[i]);
  4423. if (IS_ERR(q_alg)) {
  4424. rc = PTR_ERR(q_alg);
  4425. goto err;
  4426. }
  4427. if (cp->ce_support.use_sw_ahash_algo) {
  4428. rc = _qcrypto_prefix_alg_cra_name(
  4429. q_alg->sha_alg.halg.base.cra_name,
  4430. strlen(q_alg->sha_alg.halg.base.cra_name));
  4431. if (rc) {
  4432. dev_err(&pdev->dev,
  4433. "The algorithm name %s is too long.\n",
  4434. q_alg->sha_alg.halg.base.cra_name);
  4435. kfree(q_alg);
  4436. goto err;
  4437. }
  4438. }
  4439. rc = crypto_register_ahash(&q_alg->sha_alg);
  4440. if (rc) {
  4441. dev_err(&pdev->dev, "%s alg registration failed\n",
  4442. q_alg->sha_alg.halg.base.cra_driver_name);
  4443. kfree_sensitive(q_alg);
  4444. } else {
  4445. list_add_tail(&q_alg->entry, &cp->alg_list);
  4446. dev_info(&pdev->dev, "%s\n",
  4447. q_alg->sha_alg.halg.base.cra_driver_name);
  4448. }
  4449. }
  4450. /* register crypto aead (hmac-sha1) algorithms the device supports */
  4451. if (cp->ce_support.sha1_hmac_20 || cp->ce_support.sha1_hmac
  4452. || cp->ce_support.sha_hmac) {
  4453. for (i = 0; i < ARRAY_SIZE(_qcrypto_aead_sha1_hmac_algos);
  4454. i++) {
  4455. struct qcrypto_alg *q_alg;
  4456. q_alg = _qcrypto_aead_alg_alloc(cp,
  4457. &_qcrypto_aead_sha1_hmac_algos[i]);
  4458. if (IS_ERR(q_alg)) {
  4459. rc = PTR_ERR(q_alg);
  4460. goto err;
  4461. }
  4462. if (cp->ce_support.use_sw_aead_algo) {
  4463. rc = _qcrypto_prefix_alg_cra_name(
  4464. q_alg->aead_alg.base.cra_name,
  4465. strlen(q_alg->aead_alg.base.cra_name));
  4466. if (rc) {
  4467. dev_err(&pdev->dev,
  4468. "The algorithm name %s is too long.\n",
  4469. q_alg->aead_alg.base.cra_name);
  4470. kfree(q_alg);
  4471. goto err;
  4472. }
  4473. }
  4474. rc = crypto_register_aead(&q_alg->aead_alg);
  4475. if (rc) {
  4476. dev_err(&pdev->dev,
  4477. "%s alg registration failed\n",
  4478. q_alg->aead_alg.base.cra_driver_name);
  4479. kfree(q_alg);
  4480. } else {
  4481. list_add_tail(&q_alg->entry, &cp->alg_list);
  4482. dev_info(&pdev->dev, "%s\n",
  4483. q_alg->aead_alg.base.cra_driver_name);
  4484. }
  4485. }
  4486. }
  4487. /* register crypto aead (hmac-sha256) algorithms the device supports */
  4488. if (cp->ce_support.sha_hmac) {
  4489. for (i = 0; i < ARRAY_SIZE(_qcrypto_aead_sha256_hmac_algos);
  4490. i++) {
  4491. struct qcrypto_alg *q_alg;
  4492. q_alg = _qcrypto_aead_alg_alloc(cp,
  4493. &_qcrypto_aead_sha256_hmac_algos[i]);
  4494. if (IS_ERR(q_alg)) {
  4495. rc = PTR_ERR(q_alg);
  4496. goto err;
  4497. }
  4498. if (cp->ce_support.use_sw_aead_algo) {
  4499. rc = _qcrypto_prefix_alg_cra_name(
  4500. q_alg->aead_alg.base.cra_name,
  4501. strlen(q_alg->aead_alg.base.cra_name));
  4502. if (rc) {
  4503. dev_err(&pdev->dev,
  4504. "The algorithm name %s is too long.\n",
  4505. q_alg->aead_alg.base.cra_name);
  4506. kfree(q_alg);
  4507. goto err;
  4508. }
  4509. }
  4510. rc = crypto_register_aead(&q_alg->aead_alg);
  4511. if (rc) {
  4512. dev_err(&pdev->dev,
  4513. "%s alg registration failed\n",
  4514. q_alg->aead_alg.base.cra_driver_name);
  4515. kfree(q_alg);
  4516. } else {
  4517. list_add_tail(&q_alg->entry, &cp->alg_list);
  4518. dev_info(&pdev->dev, "%s\n",
  4519. q_alg->aead_alg.base.cra_driver_name);
  4520. }
  4521. }
  4522. }
  4523. if ((cp->ce_support.sha_hmac) || (cp->platform_support.sha_hmac)) {
  4524. /* register crypto hmac algorithms the device supports */
  4525. for (i = 0; i < ARRAY_SIZE(_qcrypto_sha_hmac_algos); i++) {
  4526. struct qcrypto_alg *q_alg = NULL;
  4527. q_alg = _qcrypto_sha_alg_alloc(cp,
  4528. &_qcrypto_sha_hmac_algos[i]);
  4529. if (IS_ERR(q_alg)) {
  4530. rc = PTR_ERR(q_alg);
  4531. goto err;
  4532. }
  4533. if (cp->ce_support.use_sw_hmac_algo) {
  4534. rc = _qcrypto_prefix_alg_cra_name(
  4535. q_alg->sha_alg.halg.base.cra_name,
  4536. strlen(
  4537. q_alg->sha_alg.halg.base.cra_name));
  4538. if (rc) {
  4539. dev_err(&pdev->dev,
  4540. "The algorithm name %s is too long.\n",
  4541. q_alg->sha_alg.halg.base.cra_name);
  4542. kfree(q_alg);
  4543. goto err;
  4544. }
  4545. }
  4546. rc = crypto_register_ahash(&q_alg->sha_alg);
  4547. if (rc) {
  4548. dev_err(&pdev->dev,
  4549. "%s alg registration failed\n",
  4550. q_alg->sha_alg.halg.base.cra_driver_name);
  4551. kfree_sensitive(q_alg);
  4552. } else {
  4553. list_add_tail(&q_alg->entry, &cp->alg_list);
  4554. dev_info(&pdev->dev, "%s\n",
  4555. q_alg->sha_alg.halg.base.cra_driver_name);
  4556. }
  4557. }
  4558. }
  4559. /*
  4560. * Register crypto cipher (aes-ccm) algorithms the
  4561. * device supports
  4562. */
  4563. if (cp->ce_support.aes_ccm) {
  4564. struct qcrypto_alg *q_alg;
  4565. q_alg = _qcrypto_aead_alg_alloc(cp, &_qcrypto_aead_ccm_algo);
  4566. if (IS_ERR(q_alg)) {
  4567. rc = PTR_ERR(q_alg);
  4568. goto err;
  4569. }
  4570. if (cp->ce_support.use_sw_aes_ccm_algo) {
  4571. rc = _qcrypto_prefix_alg_cra_name(
  4572. q_alg->aead_alg.base.cra_name,
  4573. strlen(q_alg->aead_alg.base.cra_name));
  4574. if (rc) {
  4575. dev_err(&pdev->dev,
  4576. "The algorithm name %s is too long.\n",
  4577. q_alg->aead_alg.base.cra_name);
  4578. kfree(q_alg);
  4579. goto err;
  4580. }
  4581. }
  4582. rc = crypto_register_aead(&q_alg->aead_alg);
  4583. if (rc) {
  4584. dev_err(&pdev->dev, "%s alg registration failed\n",
  4585. q_alg->aead_alg.base.cra_driver_name);
  4586. kfree_sensitive(q_alg);
  4587. } else {
  4588. list_add_tail(&q_alg->entry, &cp->alg_list);
  4589. dev_info(&pdev->dev, "%s\n",
  4590. q_alg->aead_alg.base.cra_driver_name);
  4591. }
  4592. q_alg = _qcrypto_aead_alg_alloc(cp,
  4593. &_qcrypto_aead_rfc4309_ccm_algo);
  4594. if (IS_ERR(q_alg)) {
  4595. rc = PTR_ERR(q_alg);
  4596. goto err;
  4597. }
  4598. if (cp->ce_support.use_sw_aes_ccm_algo) {
  4599. rc = _qcrypto_prefix_alg_cra_name(
  4600. q_alg->aead_alg.base.cra_name,
  4601. strlen(q_alg->aead_alg.base.cra_name));
  4602. if (rc) {
  4603. dev_err(&pdev->dev,
  4604. "The algorithm name %s is too long.\n",
  4605. q_alg->aead_alg.base.cra_name);
  4606. kfree(q_alg);
  4607. goto err;
  4608. }
  4609. }
  4610. rc = crypto_register_aead(&q_alg->aead_alg);
  4611. if (rc) {
  4612. dev_err(&pdev->dev, "%s alg registration failed\n",
  4613. q_alg->aead_alg.base.cra_driver_name);
  4614. kfree(q_alg);
  4615. } else {
  4616. list_add_tail(&q_alg->entry, &cp->alg_list);
  4617. dev_info(&pdev->dev, "%s\n",
  4618. q_alg->aead_alg.base.cra_driver_name);
  4619. }
  4620. }
  4621. mutex_unlock(&cp->engine_lock);
  4622. return 0;
  4623. err:
  4624. _qcrypto_remove_engine(pengine);
  4625. kfree_sensitive(pqcrypto_req_control);
  4626. exit_unlock_mutex:
  4627. mutex_unlock(&cp->engine_lock);
  4628. exit_qce_close:
  4629. if (pengine->qce)
  4630. qce_close(pengine->qce);
  4631. exit_free_pdata:
  4632. icc_set_bw(pengine->icc_path, 0, 0);
  4633. platform_set_drvdata(pdev, NULL);
  4634. exit_kzfree:
  4635. memset(pengine, 0, ksize((void *)pengine));
  4636. kfree(pengine);
  4637. return rc;
  4638. }
  4639. static int _qcrypto_engine_in_use(struct crypto_engine *pengine)
  4640. {
  4641. struct crypto_priv *cp = pengine->pcp;
  4642. if ((atomic_read(&pengine->req_count) > 0) || pengine->req_queue.qlen
  4643. || cp->req_queue.qlen)
  4644. return 1;
  4645. return 0;
  4646. }
  4647. static void _qcrypto_do_suspending(struct crypto_engine *pengine)
  4648. {
  4649. del_timer_sync(&pengine->bw_reaper_timer);
  4650. qcrypto_ce_set_bus(pengine, false);
  4651. }
  4652. static int _qcrypto_suspend(struct platform_device *pdev, pm_message_t state)
  4653. {
  4654. int ret = 0;
  4655. struct crypto_engine *pengine;
  4656. struct crypto_priv *cp;
  4657. unsigned long flags;
  4658. pengine = platform_get_drvdata(pdev);
  4659. if (!pengine)
  4660. return -EINVAL;
  4661. /*
  4662. * Check if this platform supports clock management in suspend/resume
  4663. * If not, just simply return 0.
  4664. */
  4665. cp = pengine->pcp;
  4666. if (!cp->ce_support.clk_mgmt_sus_res)
  4667. return 0;
  4668. spin_lock_irqsave(&cp->lock, flags);
  4669. switch (pengine->bw_state) {
  4670. case BUS_NO_BANDWIDTH:
  4671. if (!pengine->high_bw_req)
  4672. pengine->bw_state = BUS_SUSPENDED;
  4673. else
  4674. ret = -EBUSY;
  4675. break;
  4676. case BUS_HAS_BANDWIDTH:
  4677. if (_qcrypto_engine_in_use(pengine)) {
  4678. ret = -EBUSY;
  4679. } else {
  4680. pengine->bw_state = BUS_SUSPENDING;
  4681. spin_unlock_irqrestore(&cp->lock, flags);
  4682. _qcrypto_do_suspending(pengine);
  4683. spin_lock_irqsave(&cp->lock, flags);
  4684. pengine->bw_state = BUS_SUSPENDED;
  4685. }
  4686. break;
  4687. case BUS_BANDWIDTH_RELEASING:
  4688. case BUS_BANDWIDTH_ALLOCATING:
  4689. case BUS_SUSPENDED:
  4690. case BUS_SUSPENDING:
  4691. default:
  4692. ret = -EBUSY;
  4693. break;
  4694. }
  4695. spin_unlock_irqrestore(&cp->lock, flags);
  4696. if (ret)
  4697. return ret;
  4698. if (qce_pm_table.suspend) {
  4699. qcrypto_ce_set_bus(pengine, true);
  4700. qce_pm_table.suspend(pengine->qce);
  4701. qcrypto_ce_set_bus(pengine, false);
  4702. }
  4703. return 0;
  4704. }
  4705. static int _qcrypto_resume(struct platform_device *pdev)
  4706. {
  4707. struct crypto_engine *pengine;
  4708. struct crypto_priv *cp;
  4709. unsigned long flags;
  4710. int ret = 0;
  4711. pengine = platform_get_drvdata(pdev);
  4712. if (!pengine)
  4713. return -EINVAL;
  4714. cp = pengine->pcp;
  4715. if (!cp->ce_support.clk_mgmt_sus_res)
  4716. return 0;
  4717. spin_lock_irqsave(&cp->lock, flags);
  4718. if (pengine->bw_state == BUS_SUSPENDED) {
  4719. spin_unlock_irqrestore(&cp->lock, flags);
  4720. if (qce_pm_table.resume) {
  4721. qcrypto_ce_set_bus(pengine, true);
  4722. qce_pm_table.resume(pengine->qce);
  4723. qcrypto_ce_set_bus(pengine, false);
  4724. }
  4725. spin_lock_irqsave(&cp->lock, flags);
  4726. pengine->bw_state = BUS_NO_BANDWIDTH;
  4727. pengine->active_seq++;
  4728. pengine->check_flag = false;
  4729. if (cp->req_queue.qlen || pengine->req_queue.qlen) {
  4730. if (!pengine->high_bw_req) {
  4731. qcrypto_ce_bw_allocate_req(pengine);
  4732. pengine->high_bw_req = true;
  4733. }
  4734. }
  4735. } else
  4736. ret = -EBUSY;
  4737. spin_unlock_irqrestore(&cp->lock, flags);
  4738. return ret;
  4739. }
  4740. static const struct of_device_id qcrypto_match[] = {
  4741. {.compatible = "qcom,qcrypto",},
  4742. {}
  4743. };
  4744. static struct platform_driver __qcrypto = {
  4745. .probe = _qcrypto_probe,
  4746. .remove = _qcrypto_remove,
  4747. .suspend = _qcrypto_suspend,
  4748. .resume = _qcrypto_resume,
  4749. .driver = {
  4750. .name = "qcrypto",
  4751. .of_match_table = qcrypto_match,
  4752. },
  4753. };
  4754. static int _debug_qcrypto;
  4755. static ssize_t _debug_stats_read(struct file *file, char __user *buf,
  4756. size_t count, loff_t *ppos)
  4757. {
  4758. int rc = -EINVAL;
  4759. int qcrypto = *((int *) file->private_data);
  4760. int len;
  4761. len = _disp_stats(qcrypto);
  4762. if (len <= count)
  4763. rc = simple_read_from_buffer((void __user *) buf, len,
  4764. ppos, (void *) _debug_read_buf, len);
  4765. return rc;
  4766. }
  4767. static ssize_t _debug_stats_write(struct file *file, const char __user *buf,
  4768. size_t count, loff_t *ppos)
  4769. {
  4770. unsigned long flags;
  4771. struct crypto_priv *cp = &qcrypto_dev;
  4772. struct crypto_engine *pe;
  4773. int i;
  4774. memset((char *)&_qcrypto_stat, 0, sizeof(struct crypto_stat));
  4775. spin_lock_irqsave(&cp->lock, flags);
  4776. list_for_each_entry(pe, &cp->engine_list, elist) {
  4777. pe->total_req = 0;
  4778. pe->err_req = 0;
  4779. qce_clear_driver_stats(pe->qce);
  4780. pe->max_req_used = 0;
  4781. }
  4782. cp->max_qlen = 0;
  4783. cp->resp_start = 0;
  4784. cp->resp_stop = 0;
  4785. cp->no_avail = 0;
  4786. cp->max_resp_qlen = 0;
  4787. cp->queue_work_eng3 = 0;
  4788. cp->queue_work_not_eng3 = 0;
  4789. cp->queue_work_not_eng3_nz = 0;
  4790. cp->max_reorder_cnt = 0;
  4791. for (i = 0; i < MAX_SMP_CPU + 1; i++)
  4792. cp->cpu_req[i] = 0;
  4793. spin_unlock_irqrestore(&cp->lock, flags);
  4794. return count;
  4795. }
  4796. static const struct file_operations _debug_stats_ops = {
  4797. .open = simple_open,
  4798. .read = _debug_stats_read,
  4799. .write = _debug_stats_write,
  4800. };
  4801. static int _qcrypto_debug_init(void)
  4802. {
  4803. int rc;
  4804. char name[DEBUG_MAX_FNAME];
  4805. struct dentry *dent;
  4806. _debug_dent = debugfs_create_dir("qcrypto", NULL);
  4807. if (IS_ERR(_debug_dent)) {
  4808. pr_debug("qcrypto debugfs_create_dir fail, error %ld\n",
  4809. PTR_ERR(_debug_dent));
  4810. return PTR_ERR(_debug_dent);
  4811. }
  4812. snprintf(name, DEBUG_MAX_FNAME-1, "stats-%d", 1);
  4813. _debug_qcrypto = 0;
  4814. dent = debugfs_create_file(name, 0644, _debug_dent,
  4815. &_debug_qcrypto, &_debug_stats_ops);
  4816. if (dent == NULL) {
  4817. pr_debug("qcrypto debugfs_create_file fail, error %ld\n",
  4818. PTR_ERR(dent));
  4819. rc = PTR_ERR(dent);
  4820. goto err;
  4821. }
  4822. return 0;
  4823. err:
  4824. debugfs_remove_recursive(_debug_dent);
  4825. return rc;
  4826. }
  4827. static int __init _qcrypto_init(void)
  4828. {
  4829. struct crypto_priv *pcp = &qcrypto_dev;
  4830. _qcrypto_debug_init();
  4831. INIT_LIST_HEAD(&pcp->alg_list);
  4832. INIT_LIST_HEAD(&pcp->engine_list);
  4833. init_llist_head(&pcp->ordered_resp_list);
  4834. spin_lock_init(&pcp->lock);
  4835. mutex_init(&pcp->engine_lock);
  4836. pcp->resp_wq = alloc_workqueue("qcrypto_seq_response_wq",
  4837. WQ_MEM_RECLAIM | WQ_HIGHPRI | WQ_CPU_INTENSIVE, 1);
  4838. if (!pcp->resp_wq) {
  4839. pr_err("Error allocating workqueue\n");
  4840. return -ENOMEM;
  4841. }
  4842. INIT_WORK(&pcp->resp_work, seq_response);
  4843. pcp->total_units = 0;
  4844. pcp->next_engine = NULL;
  4845. pcp->scheduled_eng = NULL;
  4846. pcp->ce_req_proc_sts = IN_PROGRESS;
  4847. crypto_init_queue(&pcp->req_queue, MSM_QCRYPTO_REQ_QUEUE_LENGTH);
  4848. return platform_driver_register(&__qcrypto);
  4849. }
  4850. static void __exit _qcrypto_exit(void)
  4851. {
  4852. pr_debug("%s Unregister QCRYPTO\n", __func__);
  4853. debugfs_remove_recursive(_debug_dent);
  4854. platform_driver_unregister(&__qcrypto);
  4855. }
  4856. module_init(_qcrypto_init);
  4857. module_exit(_qcrypto_exit);
  4858. MODULE_LICENSE("GPL v2");
  4859. MODULE_DESCRIPTION("QTI Crypto driver");