wcd9360-dsp-cntl.c 34 KB

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  1. /*
  2. * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/slab.h>
  14. #include <linux/delay.h>
  15. #include <linux/component.h>
  16. #include <linux/debugfs.h>
  17. #include <sound/soc.h>
  18. #include <sound/wcd-dsp-mgr.h>
  19. #include <asoc/wcd9360-registers.h>
  20. #include "wcd9360.h"
  21. #include "wcd9360-dsp-cntl.h"
  22. #include "../wcd9xxx-irq.h"
  23. #include "../core.h"
  24. #define WCD_CNTL_DIR_NAME_LEN_MAX 32
  25. #define WCD_CPE_FLL_MAX_RETRIES 5
  26. #define WCD_MEM_ENABLE_MAX_RETRIES 20
  27. #define WCD_DSP_BOOT_TIMEOUT_MS 3000
  28. #define WCD_SYSFS_ENTRY_MAX_LEN 8
  29. #define WCD_PROCFS_ENTRY_MAX_LEN 16
  30. #define WCD_9360_RAMDUMP_START_ADDR 0x20100000
  31. #define WCD_9360_RAMDUMP_SIZE ((1024 * 1024) - 128)
  32. #define WCD_CNTL_MUTEX_LOCK(codec, lock) \
  33. { \
  34. dev_dbg(codec->dev, "%s: mutex_lock(%s)\n", \
  35. __func__, __stringify_1(lock)); \
  36. mutex_lock(&lock); \
  37. }
  38. #define WCD_CNTL_MUTEX_UNLOCK(codec, lock) \
  39. { \
  40. dev_dbg(codec->dev, "%s: mutex_unlock(%s)\n", \
  41. __func__, __stringify_1(lock)); \
  42. mutex_unlock(&lock); \
  43. }
  44. enum wcd_mem_type {
  45. WCD_MEM_TYPE_ALWAYS_ON,
  46. WCD_MEM_TYPE_SWITCHABLE,
  47. };
  48. struct wcd_cntl_attribute {
  49. struct attribute attr;
  50. ssize_t (*show)(struct wcd_dsp_cntl *cntl, char *buf);
  51. ssize_t (*store)(struct wcd_dsp_cntl *cntl, const char *buf,
  52. ssize_t count);
  53. };
  54. #define WCD_CNTL_ATTR(_name, _mode, _show, _store) \
  55. static struct wcd_cntl_attribute cntl_attr_##_name = { \
  56. .attr = {.name = __stringify(_name), .mode = _mode}, \
  57. .show = _show, \
  58. .store = _store, \
  59. }
  60. #define to_wcd_cntl_attr(a) \
  61. container_of((a), struct wcd_cntl_attribute, attr)
  62. #define to_wcd_cntl(kobj) \
  63. container_of((kobj), struct wcd_dsp_cntl, wcd_kobj)
  64. static u8 mem_enable_values[] = {
  65. 0xFE, 0xFC, 0xF8, 0xF0,
  66. 0xE0, 0xC0, 0x80, 0x00,
  67. };
  68. static ssize_t wdsp_boot_show(struct wcd_dsp_cntl *cntl, char *buf)
  69. {
  70. return snprintf(buf, WCD_SYSFS_ENTRY_MAX_LEN,
  71. "%u", cntl->boot_reqs);
  72. }
  73. static ssize_t wdsp_boot_store(struct wcd_dsp_cntl *cntl,
  74. const char *buf, ssize_t count)
  75. {
  76. u32 val;
  77. bool vote;
  78. int ret;
  79. ret = kstrtou32(buf, 10, &val);
  80. if (ret) {
  81. dev_err(cntl->codec->dev,
  82. "%s: Invalid entry, ret = %d\n", __func__, ret);
  83. return -EINVAL;
  84. }
  85. if (val > 0) {
  86. cntl->boot_reqs++;
  87. vote = true;
  88. } else {
  89. cntl->boot_reqs--;
  90. vote = false;
  91. }
  92. if (cntl->m_dev && cntl->m_ops &&
  93. cntl->m_ops->vote_for_dsp)
  94. ret = cntl->m_ops->vote_for_dsp(cntl->m_dev, vote);
  95. else
  96. ret = -EINVAL;
  97. if (ret < 0)
  98. dev_err(cntl->codec->dev,
  99. "%s: failed to %s dsp\n", __func__,
  100. vote ? "enable" : "disable");
  101. return count;
  102. }
  103. WCD_CNTL_ATTR(boot, 0660, wdsp_boot_show, wdsp_boot_store);
  104. static ssize_t wcd_cntl_sysfs_show(struct kobject *kobj,
  105. struct attribute *attr, char *buf)
  106. {
  107. struct wcd_cntl_attribute *wcd_attr = to_wcd_cntl_attr(attr);
  108. struct wcd_dsp_cntl *cntl = to_wcd_cntl(kobj);
  109. ssize_t ret = -EINVAL;
  110. if (cntl && wcd_attr->show)
  111. ret = wcd_attr->show(cntl, buf);
  112. return ret;
  113. }
  114. static ssize_t wcd_cntl_sysfs_store(struct kobject *kobj,
  115. struct attribute *attr, const char *buf,
  116. size_t count)
  117. {
  118. struct wcd_cntl_attribute *wcd_attr = to_wcd_cntl_attr(attr);
  119. struct wcd_dsp_cntl *cntl = to_wcd_cntl(kobj);
  120. ssize_t ret = -EINVAL;
  121. if (cntl && wcd_attr->store)
  122. ret = wcd_attr->store(cntl, buf, count);
  123. return ret;
  124. }
  125. static const struct sysfs_ops wcd_cntl_sysfs_ops = {
  126. .show = wcd_cntl_sysfs_show,
  127. .store = wcd_cntl_sysfs_store,
  128. };
  129. static struct kobj_type wcd_cntl_ktype = {
  130. .sysfs_ops = &wcd_cntl_sysfs_ops,
  131. };
  132. static void wcd_cntl_change_online_state(struct wcd_dsp_cntl *cntl,
  133. u8 online)
  134. {
  135. struct wdsp_ssr_entry *ssr_entry = &cntl->ssr_entry;
  136. unsigned long ret;
  137. WCD_CNTL_MUTEX_LOCK(cntl->codec, cntl->ssr_mutex);
  138. ssr_entry->offline = !online;
  139. /* Make sure the write is complete */
  140. wmb();
  141. ret = xchg(&ssr_entry->offline_change, 1);
  142. wake_up_interruptible(&ssr_entry->offline_poll_wait);
  143. dev_dbg(cntl->codec->dev,
  144. "%s: requested %u, offline %u offline_change %u, ret = %ldn",
  145. __func__, online, ssr_entry->offline,
  146. ssr_entry->offline_change, ret);
  147. WCD_CNTL_MUTEX_UNLOCK(cntl->codec, cntl->ssr_mutex);
  148. }
  149. static ssize_t wdsp_ssr_entry_read(struct snd_info_entry *entry,
  150. void *file_priv_data, struct file *file,
  151. char __user *buf, size_t count, loff_t pos)
  152. {
  153. int len = 0;
  154. char buffer[WCD_PROCFS_ENTRY_MAX_LEN];
  155. struct wcd_dsp_cntl *cntl;
  156. struct wdsp_ssr_entry *ssr_entry;
  157. ssize_t ret;
  158. u8 offline;
  159. cntl = (struct wcd_dsp_cntl *) entry->private_data;
  160. if (!cntl) {
  161. pr_err("%s: Invalid private data for SSR procfs entry\n",
  162. __func__);
  163. return -EINVAL;
  164. }
  165. ssr_entry = &cntl->ssr_entry;
  166. WCD_CNTL_MUTEX_LOCK(cntl->codec, cntl->ssr_mutex);
  167. offline = ssr_entry->offline;
  168. /* Make sure the read is complete */
  169. rmb();
  170. dev_dbg(cntl->codec->dev, "%s: offline = %s\n", __func__,
  171. offline ? "true" : "false");
  172. len = snprintf(buffer, sizeof(buffer), "%s\n",
  173. offline ? "OFFLINE" : "ONLINE");
  174. ret = simple_read_from_buffer(buf, count, &pos, buffer, len);
  175. WCD_CNTL_MUTEX_UNLOCK(cntl->codec, cntl->ssr_mutex);
  176. return ret;
  177. }
  178. static unsigned int wdsp_ssr_entry_poll(struct snd_info_entry *entry,
  179. void *private_data, struct file *file,
  180. poll_table *wait)
  181. {
  182. struct wcd_dsp_cntl *cntl;
  183. struct wdsp_ssr_entry *ssr_entry;
  184. unsigned int ret = 0;
  185. if (!entry || !entry->private_data) {
  186. pr_err("%s: %s is NULL\n", __func__,
  187. (!entry) ? "entry" : "private_data");
  188. return -EINVAL;
  189. }
  190. cntl = (struct wcd_dsp_cntl *) entry->private_data;
  191. ssr_entry = &cntl->ssr_entry;
  192. dev_dbg(cntl->codec->dev, "%s: Poll wait, offline = %u\n",
  193. __func__, ssr_entry->offline);
  194. poll_wait(file, &ssr_entry->offline_poll_wait, wait);
  195. dev_dbg(cntl->codec->dev, "%s: Woken up Poll wait, offline = %u\n",
  196. __func__, ssr_entry->offline);
  197. WCD_CNTL_MUTEX_LOCK(cntl->codec, cntl->ssr_mutex);
  198. if (xchg(&ssr_entry->offline_change, 0))
  199. ret = POLLIN | POLLPRI | POLLRDNORM;
  200. dev_dbg(cntl->codec->dev, "%s: ret (%d) from poll_wait\n",
  201. __func__, ret);
  202. WCD_CNTL_MUTEX_UNLOCK(cntl->codec, cntl->ssr_mutex);
  203. return ret;
  204. }
  205. static struct snd_info_entry_ops wdsp_ssr_entry_ops = {
  206. .read = wdsp_ssr_entry_read,
  207. .poll = wdsp_ssr_entry_poll,
  208. };
  209. static int wcd_cntl_cpe_fll_calibrate(struct wcd_dsp_cntl *cntl)
  210. {
  211. struct snd_soc_codec *codec = cntl->codec;
  212. int ret = 0, retry = 0;
  213. u8 cal_lsb, cal_msb;
  214. u8 lock_det;
  215. /* Make sure clocks are gated */
  216. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPE_CTL,
  217. 0x05, 0x00);
  218. /* Enable CPE FLL reference clock */
  219. snd_soc_update_bits(codec, WCD9360_CLK_SYS_MCLK2_PRG1,
  220. 0x80, 0x80);
  221. snd_soc_update_bits(codec, WCD9360_CPE_FLL_USER_CTL_5,
  222. 0xF3, 0x13);
  223. snd_soc_write(codec, WCD9360_CPE_FLL_L_VAL_CTL_0, 0x50);
  224. /* Disable CPAR reset and Enable CPAR clk */
  225. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CTL,
  226. 0x02, 0x02);
  227. /* Write calibration l-value based on cdc clk rate */
  228. if (cntl->clk_rate == 9600000) {
  229. cal_lsb = 0x6d;
  230. cal_msb = 0x00;
  231. } else {
  232. cal_lsb = 0x56;
  233. cal_msb = 0x00;
  234. }
  235. snd_soc_write(codec, WCD9360_CPE_FLL_USER_CTL_6, cal_lsb);
  236. snd_soc_write(codec, WCD9360_CPE_FLL_USER_CTL_7, cal_msb);
  237. /* FLL mode to follow power up sequence */
  238. snd_soc_update_bits(codec, WCD9360_CPE_FLL_FLL_MODE,
  239. 0x60, 0x00);
  240. /* HW controlled CPE FLL */
  241. snd_soc_update_bits(codec, WCD9360_CPE_FLL_FLL_MODE,
  242. 0x80, 0x80);
  243. /* Force on CPE FLL */
  244. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CFG,
  245. 0x04, 0x04);
  246. do {
  247. /* Time for FLL calibration to complete */
  248. usleep_range(1000, 1100);
  249. lock_det = snd_soc_read(codec, WCD9360_CPE_FLL_STATUS_3);
  250. retry++;
  251. } while (!(lock_det & 0x01) &&
  252. retry <= WCD_CPE_FLL_MAX_RETRIES);
  253. if (!(lock_det & 0x01)) {
  254. dev_err(codec->dev, "%s: lock detect not set, 0x%02x\n",
  255. __func__, lock_det);
  256. ret = -EIO;
  257. goto err_lock_det;
  258. }
  259. snd_soc_update_bits(codec, WCD9360_CPE_FLL_FLL_MODE,
  260. 0x60, 0x20);
  261. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CFG,
  262. 0x04, 0x00);
  263. return ret;
  264. err_lock_det:
  265. /* Undo the register settings */
  266. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CFG,
  267. 0x04, 0x00);
  268. snd_soc_update_bits(codec, WCD9360_CPE_FLL_FLL_MODE,
  269. 0x80, 0x00);
  270. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CTL,
  271. 0x02, 0x00);
  272. return ret;
  273. }
  274. static void wcd_cntl_config_cpar(struct wcd_dsp_cntl *cntl)
  275. {
  276. struct snd_soc_codec *codec = cntl->codec;
  277. u8 nom_lo, nom_hi, svs2_lo, svs2_hi;
  278. /* Configure CPAR */
  279. nom_hi = svs2_hi = 0;
  280. if (cntl->clk_rate == 9600000) {
  281. nom_lo = 0x90;
  282. svs2_lo = 0x50;
  283. } else {
  284. nom_lo = 0x70;
  285. svs2_lo = 0x3e;
  286. }
  287. snd_soc_write(codec, WCD9360_TEST_DEBUG_LVAL_NOM_LOW, nom_lo);
  288. snd_soc_write(codec, WCD9360_TEST_DEBUG_LVAL_NOM_HIGH, nom_hi);
  289. snd_soc_write(codec, WCD9360_TEST_DEBUG_LVAL_SVS_SVS2_LOW, svs2_lo);
  290. snd_soc_write(codec, WCD9360_TEST_DEBUG_LVAL_SVS_SVS2_HIGH, svs2_hi);
  291. snd_soc_update_bits(codec, WCD9360_CPE_SS_PWR_CPEFLL_CTL,
  292. 0x03, 0x03);
  293. }
  294. static int wcd_cntl_cpe_fll_ctrl(struct wcd_dsp_cntl *cntl,
  295. bool enable)
  296. {
  297. struct snd_soc_codec *codec = cntl->codec;
  298. int ret = 0;
  299. if (enable) {
  300. ret = wcd_cntl_cpe_fll_calibrate(cntl);
  301. if (ret < 0) {
  302. dev_err(codec->dev,
  303. "%s: cpe_fll_cal failed, err = %d\n",
  304. __func__, ret);
  305. goto done;
  306. }
  307. wcd_cntl_config_cpar(cntl);
  308. /* Enable AHB CLK and CPE CLK*/
  309. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPE_CTL,
  310. 0x05, 0x05);
  311. } else {
  312. /* Disable AHB CLK and CPE CLK */
  313. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPE_CTL,
  314. 0x05, 0x00);
  315. /* Reset the CPAR mode for CPE FLL */
  316. snd_soc_write(codec, WCD9360_CPE_FLL_FLL_MODE, 0x20);
  317. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CFG,
  318. 0x04, 0x00);
  319. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CTL,
  320. 0x02, 0x00);
  321. }
  322. done:
  323. return ret;
  324. }
  325. static int wcd_cntl_clocks_enable(struct wcd_dsp_cntl *cntl)
  326. {
  327. struct snd_soc_codec *codec = cntl->codec;
  328. int ret;
  329. WCD_CNTL_MUTEX_LOCK(codec, cntl->clk_mutex);
  330. /* Enable codec clock */
  331. if (cntl->cdc_cb && cntl->cdc_cb->cdc_clk_en)
  332. ret = cntl->cdc_cb->cdc_clk_en(codec, true);
  333. else
  334. ret = -EINVAL;
  335. if (ret < 0) {
  336. dev_err(codec->dev,
  337. "%s: Failed to enable cdc clk, err = %d\n",
  338. __func__, ret);
  339. goto done;
  340. }
  341. /* Pull CPAR out of reset */
  342. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CTL, 0x04, 0x00);
  343. /* Configure and Enable CPE FLL clock */
  344. ret = wcd_cntl_cpe_fll_ctrl(cntl, true);
  345. if (ret < 0) {
  346. dev_err(codec->dev,
  347. "%s: Failed to enable cpe clk, err = %d\n",
  348. __func__, ret);
  349. goto err_cpe_clk;
  350. }
  351. cntl->is_clk_enabled = true;
  352. /* Ungate the CPR clock */
  353. snd_soc_update_bits(codec, WCD9360_CODEC_RPM_CLK_GATE, 0x10, 0x00);
  354. done:
  355. WCD_CNTL_MUTEX_UNLOCK(codec, cntl->clk_mutex);
  356. return ret;
  357. err_cpe_clk:
  358. if (cntl->cdc_cb && cntl->cdc_cb->cdc_clk_en)
  359. cntl->cdc_cb->cdc_clk_en(codec, false);
  360. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CTL, 0x04, 0x04);
  361. WCD_CNTL_MUTEX_UNLOCK(codec, cntl->clk_mutex);
  362. return ret;
  363. }
  364. static int wcd_cntl_clocks_disable(struct wcd_dsp_cntl *cntl)
  365. {
  366. struct snd_soc_codec *codec = cntl->codec;
  367. int ret = 0;
  368. WCD_CNTL_MUTEX_LOCK(codec, cntl->clk_mutex);
  369. if (!cntl->is_clk_enabled) {
  370. dev_info(codec->dev, "%s: clocks already disabled\n",
  371. __func__);
  372. goto done;
  373. }
  374. /* Gate the CPR clock */
  375. snd_soc_update_bits(codec, WCD9360_CODEC_RPM_CLK_GATE, 0x10, 0x10);
  376. /* Disable CPE FLL clock */
  377. ret = wcd_cntl_cpe_fll_ctrl(cntl, false);
  378. if (ret < 0)
  379. dev_err(codec->dev,
  380. "%s: Failed to disable cpe clk, err = %d\n",
  381. __func__, ret);
  382. /*
  383. * Even if CPE FLL disable failed, go ahead and disable
  384. * the codec clock
  385. */
  386. if (cntl->cdc_cb && cntl->cdc_cb->cdc_clk_en)
  387. ret = cntl->cdc_cb->cdc_clk_en(codec, false);
  388. else
  389. ret = -EINVAL;
  390. cntl->is_clk_enabled = false;
  391. /* Put CPAR in reset */
  392. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CTL, 0x04, 0x04);
  393. done:
  394. WCD_CNTL_MUTEX_UNLOCK(codec, cntl->clk_mutex);
  395. return ret;
  396. }
  397. static void wcd_cntl_cpar_ctrl(struct wcd_dsp_cntl *cntl,
  398. bool enable)
  399. {
  400. struct snd_soc_codec *codec = cntl->codec;
  401. if (enable)
  402. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CTL, 0x03, 0x03);
  403. else
  404. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPAR_CTL, 0x03, 0x00);
  405. }
  406. static int wcd_cntl_enable_memory(struct wcd_dsp_cntl *cntl,
  407. enum wcd_mem_type mem_type)
  408. {
  409. struct snd_soc_codec *codec = cntl->codec;
  410. struct wcd9xxx *wcd9xxx = dev_get_drvdata(codec->dev->parent);
  411. int loop_cnt = 0;
  412. u8 status = 0;
  413. int ret = 0;
  414. switch (mem_type) {
  415. case WCD_MEM_TYPE_ALWAYS_ON:
  416. /* 512KB of always on region */
  417. wcd9xxx_slim_write_repeat(wcd9xxx,
  418. WCD9360_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_0,
  419. ARRAY_SIZE(mem_enable_values),
  420. mem_enable_values);
  421. wcd9xxx_slim_write_repeat(wcd9xxx,
  422. WCD9360_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_1,
  423. ARRAY_SIZE(mem_enable_values),
  424. mem_enable_values);
  425. break;
  426. case WCD_MEM_TYPE_SWITCHABLE:
  427. snd_soc_update_bits(codec, WCD9360_TEST_DEBUG_MEM_CTRL,
  428. 0x80, 0x80);
  429. do {
  430. loop_cnt++;
  431. /* Time to enable the power domain for memory */
  432. usleep_range(100, 150);
  433. } while ((status & 0x02) != 0x02 &&
  434. loop_cnt != WCD_MEM_ENABLE_MAX_RETRIES);
  435. if ((status & 0x02) != 0x02) {
  436. dev_err(cntl->codec->dev,
  437. "%s: power domain not enabled, status = 0x%02x\n",
  438. __func__, status);
  439. ret = -EIO;
  440. goto done;
  441. }
  442. /* Rest of the memory */
  443. wcd9xxx_slim_write_repeat(wcd9xxx,
  444. WCD9360_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_2,
  445. ARRAY_SIZE(mem_enable_values),
  446. mem_enable_values);
  447. wcd9xxx_slim_write_repeat(wcd9xxx,
  448. WCD9360_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_3,
  449. ARRAY_SIZE(mem_enable_values),
  450. mem_enable_values);
  451. snd_soc_write(codec, WCD9360_CPE_SS_PWR_CPE_DRAM1_SHUTDOWN,
  452. 0x05);
  453. break;
  454. default:
  455. dev_err(cntl->codec->dev, "%s: Invalid mem_type %d\n",
  456. __func__, mem_type);
  457. ret = -EINVAL;
  458. break;
  459. }
  460. done:
  461. /* Make sure Deep sleep of memories is enabled for all banks */
  462. snd_soc_write(codec, WCD9360_CPE_SS_PWR_CPE_SYSMEM_DEEPSLP_0, 0xFF);
  463. snd_soc_write(codec, WCD9360_CPE_SS_PWR_CPE_SYSMEM_DEEPSLP_1, 0x0F);
  464. return ret;
  465. }
  466. static void wcd_cntl_disable_memory(struct wcd_dsp_cntl *cntl,
  467. enum wcd_mem_type mem_type)
  468. {
  469. struct snd_soc_codec *codec = cntl->codec;
  470. switch (mem_type) {
  471. case WCD_MEM_TYPE_ALWAYS_ON:
  472. snd_soc_write(codec, WCD9360_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_1,
  473. 0xFF);
  474. snd_soc_write(codec, WCD9360_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_0,
  475. 0xFF);
  476. break;
  477. case WCD_MEM_TYPE_SWITCHABLE:
  478. snd_soc_write(codec, WCD9360_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_3,
  479. 0xFF);
  480. snd_soc_write(codec, WCD9360_CPE_SS_PWR_CPE_SYSMEM_SHUTDOWN_2,
  481. 0xFF);
  482. snd_soc_write(codec, WCD9360_CPE_SS_PWR_CPE_DRAM1_SHUTDOWN,
  483. 0x07);
  484. snd_soc_update_bits(codec, WCD9360_TEST_DEBUG_MEM_CTRL,
  485. 0x80, 0x00);
  486. break;
  487. default:
  488. dev_err(cntl->codec->dev, "%s: Invalid mem_type %d\n",
  489. __func__, mem_type);
  490. break;
  491. }
  492. snd_soc_write(codec, WCD9360_CPE_SS_PWR_CPE_SYSMEM_DEEPSLP_0, 0xFF);
  493. snd_soc_write(codec, WCD9360_CPE_SS_PWR_CPE_SYSMEM_DEEPSLP_1, 0x0F);
  494. }
  495. static void wcd_cntl_do_shutdown(struct wcd_dsp_cntl *cntl)
  496. {
  497. struct snd_soc_codec *codec = cntl->codec;
  498. /* Disable WDOG */
  499. snd_soc_update_bits(codec, WCD9360_CPE_SS_WDOG_CFG,
  500. 0x3F, 0x01);
  501. /* Put WDSP in reset state */
  502. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPE_CTL,
  503. 0x02, 0x00);
  504. /* If DSP transitions from boot to shutdown, then vote for SVS */
  505. if (cntl->is_wdsp_booted)
  506. cntl->cdc_cb->cdc_vote_svs(codec, true);
  507. cntl->is_wdsp_booted = false;
  508. }
  509. static int wcd_cntl_do_boot(struct wcd_dsp_cntl *cntl)
  510. {
  511. struct snd_soc_codec *codec = cntl->codec;
  512. int ret = 0;
  513. /*
  514. * Debug mode is set from debugfs file node. If debug_mode
  515. * is set, then do not configure the watchdog timer. This
  516. * will be required for debugging the DSP firmware.
  517. */
  518. if (cntl->debug_mode) {
  519. snd_soc_update_bits(codec, WCD9360_CPE_SS_WDOG_CFG,
  520. 0x3F, 0x01);
  521. } else {
  522. snd_soc_update_bits(codec, WCD9360_CPE_SS_WDOG_CFG,
  523. 0x3F, 0x21);
  524. }
  525. /* Make sure all the error interrupts are cleared */
  526. snd_soc_write(codec, WCD9360_CPE_SS_SS_ERROR_INT_CLEAR_0A, 0xFF);
  527. snd_soc_write(codec, WCD9360_CPE_SS_SS_ERROR_INT_CLEAR_0B, 0xFF);
  528. reinit_completion(&cntl->boot_complete);
  529. /* Remove WDSP out of reset */
  530. snd_soc_update_bits(codec, WCD9360_CPE_SS_CPE_CTL,
  531. 0x02, 0x02);
  532. /*
  533. * In debug mode, DSP may not boot up normally,
  534. * wait indefinitely for DSP to boot.
  535. */
  536. if (cntl->debug_mode) {
  537. wait_for_completion(&cntl->boot_complete);
  538. dev_dbg(codec->dev, "%s: WDSP booted in dbg mode\n", __func__);
  539. cntl->is_wdsp_booted = true;
  540. goto done;
  541. }
  542. /* Boot in normal mode */
  543. ret = wait_for_completion_timeout(&cntl->boot_complete,
  544. msecs_to_jiffies(WCD_DSP_BOOT_TIMEOUT_MS));
  545. if (!ret) {
  546. dev_err(codec->dev, "%s: WDSP boot timed out\n",
  547. __func__);
  548. ret = -ETIMEDOUT;
  549. goto err_boot;
  550. } else {
  551. /*
  552. * Re-initialize the return code to 0, as in success case,
  553. * it will hold the remaining time for completion timeout
  554. */
  555. ret = 0;
  556. }
  557. dev_dbg(codec->dev, "%s: WDSP booted in normal mode\n", __func__);
  558. cntl->is_wdsp_booted = true;
  559. /* Enable WDOG */
  560. snd_soc_update_bits(codec, WCD9360_CPE_SS_WDOG_CFG,
  561. 0x10, 0x10);
  562. done:
  563. /* If dsp booted up, then remove vote on SVS */
  564. if (cntl->is_wdsp_booted)
  565. cntl->cdc_cb->cdc_vote_svs(codec, false);
  566. return ret;
  567. err_boot:
  568. /* call shutdown to perform cleanup */
  569. wcd_cntl_do_shutdown(cntl);
  570. return ret;
  571. }
  572. static irqreturn_t wcd_cntl_ipc_irq(int irq, void *data)
  573. {
  574. struct wcd_dsp_cntl *cntl = data;
  575. int ret;
  576. complete(&cntl->boot_complete);
  577. if (cntl->m_dev && cntl->m_ops &&
  578. cntl->m_ops->signal_handler)
  579. ret = cntl->m_ops->signal_handler(cntl->m_dev, WDSP_IPC1_INTR,
  580. NULL);
  581. else
  582. ret = -EINVAL;
  583. if (ret < 0)
  584. dev_err(cntl->codec->dev,
  585. "%s: Failed to handle irq %d\n", __func__, irq);
  586. return IRQ_HANDLED;
  587. }
  588. static irqreturn_t wcd_cntl_err_irq(int irq, void *data)
  589. {
  590. struct wcd_dsp_cntl *cntl = data;
  591. struct snd_soc_codec *codec = cntl->codec;
  592. struct wdsp_err_signal_arg arg;
  593. u16 status = 0;
  594. u8 reg_val;
  595. int ret = 0;
  596. reg_val = snd_soc_read(codec, WCD9360_CPE_SS_SS_ERROR_INT_STATUS_0A);
  597. status = status | reg_val;
  598. reg_val = snd_soc_read(codec, WCD9360_CPE_SS_SS_ERROR_INT_STATUS_0B);
  599. status = status | (reg_val << 8);
  600. dev_info(codec->dev, "%s: error interrupt status = 0x%x\n",
  601. __func__, status);
  602. if ((status & cntl->irqs.fatal_irqs) &&
  603. (cntl->m_dev && cntl->m_ops && cntl->m_ops->signal_handler)) {
  604. arg.mem_dumps_enabled = cntl->ramdump_enable;
  605. arg.remote_start_addr = WCD_9360_RAMDUMP_START_ADDR;
  606. arg.dump_size = WCD_9360_RAMDUMP_SIZE;
  607. ret = cntl->m_ops->signal_handler(cntl->m_dev, WDSP_ERR_INTR,
  608. &arg);
  609. if (ret < 0)
  610. dev_err(cntl->codec->dev,
  611. "%s: Failed to handle fatal irq 0x%x\n",
  612. __func__, status & cntl->irqs.fatal_irqs);
  613. wcd_cntl_change_online_state(cntl, 0);
  614. } else {
  615. dev_err(cntl->codec->dev, "%s: Invalid signal_handler\n",
  616. __func__);
  617. }
  618. return IRQ_HANDLED;
  619. }
  620. static int wcd_control_handler(struct device *dev, void *priv_data,
  621. enum wdsp_event_type event, void *data)
  622. {
  623. struct wcd_dsp_cntl *cntl = priv_data;
  624. struct snd_soc_codec *codec = cntl->codec;
  625. int ret = 0;
  626. switch (event) {
  627. case WDSP_EVENT_POST_INIT:
  628. case WDSP_EVENT_POST_DLOAD_CODE:
  629. case WDSP_EVENT_DLOAD_FAILED:
  630. case WDSP_EVENT_POST_SHUTDOWN:
  631. /* Disable CPAR */
  632. wcd_cntl_cpar_ctrl(cntl, false);
  633. /* Disable all the clocks */
  634. ret = wcd_cntl_clocks_disable(cntl);
  635. if (ret < 0)
  636. dev_err(codec->dev,
  637. "%s: Failed to disable clocks, err = %d\n",
  638. __func__, ret);
  639. if (event == WDSP_EVENT_POST_DLOAD_CODE)
  640. /* Mark DSP online since code download is complete */
  641. wcd_cntl_change_online_state(cntl, 1);
  642. break;
  643. case WDSP_EVENT_PRE_DLOAD_DATA:
  644. case WDSP_EVENT_PRE_DLOAD_CODE:
  645. /* Enable all the clocks */
  646. ret = wcd_cntl_clocks_enable(cntl);
  647. if (ret < 0) {
  648. dev_err(codec->dev,
  649. "%s: Failed to enable clocks, err = %d\n",
  650. __func__, ret);
  651. goto done;
  652. }
  653. /* Enable CPAR */
  654. wcd_cntl_cpar_ctrl(cntl, true);
  655. if (event == WDSP_EVENT_PRE_DLOAD_CODE)
  656. wcd_cntl_enable_memory(cntl, WCD_MEM_TYPE_ALWAYS_ON);
  657. else if (event == WDSP_EVENT_PRE_DLOAD_DATA)
  658. wcd_cntl_enable_memory(cntl, WCD_MEM_TYPE_SWITCHABLE);
  659. break;
  660. case WDSP_EVENT_DO_BOOT:
  661. ret = wcd_cntl_do_boot(cntl);
  662. if (ret < 0)
  663. dev_err(codec->dev,
  664. "%s: WDSP boot failed, err = %d\n",
  665. __func__, ret);
  666. break;
  667. case WDSP_EVENT_DO_SHUTDOWN:
  668. wcd_cntl_do_shutdown(cntl);
  669. wcd_cntl_disable_memory(cntl, WCD_MEM_TYPE_SWITCHABLE);
  670. break;
  671. default:
  672. dev_dbg(codec->dev, "%s: unhandled event %d\n",
  673. __func__, event);
  674. }
  675. done:
  676. return ret;
  677. }
  678. static int wcd_cntl_sysfs_init(char *dir, struct wcd_dsp_cntl *cntl)
  679. {
  680. struct snd_soc_codec *codec = cntl->codec;
  681. int ret = 0;
  682. ret = kobject_init_and_add(&cntl->wcd_kobj, &wcd_cntl_ktype,
  683. kernel_kobj, dir);
  684. if (ret < 0) {
  685. dev_err(codec->dev,
  686. "%s: Failed to add kobject %s, err = %d\n",
  687. __func__, dir, ret);
  688. goto done;
  689. }
  690. ret = sysfs_create_file(&cntl->wcd_kobj, &cntl_attr_boot.attr);
  691. if (ret < 0) {
  692. dev_err(codec->dev,
  693. "%s: Failed to add wdsp_boot sysfs entry to %s\n",
  694. __func__, dir);
  695. goto fail_create_file;
  696. }
  697. return ret;
  698. fail_create_file:
  699. kobject_put(&cntl->wcd_kobj);
  700. done:
  701. return ret;
  702. }
  703. static void wcd_cntl_sysfs_remove(struct wcd_dsp_cntl *cntl)
  704. {
  705. sysfs_remove_file(&cntl->wcd_kobj, &cntl_attr_boot.attr);
  706. kobject_put(&cntl->wcd_kobj);
  707. }
  708. static void wcd_cntl_debugfs_init(char *dir, struct wcd_dsp_cntl *cntl)
  709. {
  710. struct snd_soc_codec *codec = cntl->codec;
  711. cntl->entry = debugfs_create_dir(dir, NULL);
  712. if (IS_ERR_OR_NULL(dir)) {
  713. dev_err(codec->dev, "%s debugfs_create_dir failed for %s\n",
  714. __func__, dir);
  715. goto done;
  716. }
  717. debugfs_create_u32("debug_mode", 0644,
  718. cntl->entry, &cntl->debug_mode);
  719. debugfs_create_bool("ramdump_enable", 0644,
  720. cntl->entry, &cntl->ramdump_enable);
  721. done:
  722. return;
  723. }
  724. static void wcd_cntl_debugfs_remove(struct wcd_dsp_cntl *cntl)
  725. {
  726. if (cntl)
  727. debugfs_remove(cntl->entry);
  728. }
  729. static int wcd_miscdev_release(struct inode *inode, struct file *filep)
  730. {
  731. struct wcd_dsp_cntl *cntl = container_of(filep->private_data,
  732. struct wcd_dsp_cntl, miscdev);
  733. if (!cntl->m_dev || !cntl->m_ops ||
  734. !cntl->m_ops->vote_for_dsp) {
  735. dev_err(cntl->codec->dev,
  736. "%s: DSP not ready to boot\n", __func__);
  737. return -EINVAL;
  738. }
  739. /* Make sure the DSP users goes to zero upon closing dev node */
  740. while (cntl->boot_reqs > 0) {
  741. cntl->m_ops->vote_for_dsp(cntl->m_dev, false);
  742. cntl->boot_reqs--;
  743. }
  744. return 0;
  745. }
  746. static ssize_t wcd_miscdev_write(struct file *filep, const char __user *ubuf,
  747. size_t count, loff_t *pos)
  748. {
  749. struct wcd_dsp_cntl *cntl = container_of(filep->private_data,
  750. struct wcd_dsp_cntl, miscdev);
  751. char val[count];
  752. bool vote;
  753. int ret = 0;
  754. if (count == 0 || count > 2) {
  755. pr_err("%s: Invalid count = %zd\n", __func__, count);
  756. ret = -EINVAL;
  757. goto done;
  758. }
  759. ret = copy_from_user(val, ubuf, count);
  760. if (ret < 0) {
  761. dev_err(cntl->codec->dev,
  762. "%s: copy_from_user failed, err = %d\n",
  763. __func__, ret);
  764. ret = -EFAULT;
  765. goto done;
  766. }
  767. if (val[0] == '1') {
  768. cntl->boot_reqs++;
  769. vote = true;
  770. } else if (val[0] == '0') {
  771. if (cntl->boot_reqs == 0) {
  772. dev_err(cntl->codec->dev,
  773. "%s: WDSP already disabled\n", __func__);
  774. ret = -EINVAL;
  775. goto done;
  776. }
  777. cntl->boot_reqs--;
  778. vote = false;
  779. } else {
  780. dev_err(cntl->codec->dev, "%s: Invalid value %s\n",
  781. __func__, val);
  782. ret = -EINVAL;
  783. goto done;
  784. }
  785. dev_dbg(cntl->codec->dev,
  786. "%s: booted = %s, ref_cnt = %d, vote = %s\n",
  787. __func__, cntl->is_wdsp_booted ? "true" : "false",
  788. cntl->boot_reqs, vote ? "true" : "false");
  789. if (cntl->m_dev && cntl->m_ops &&
  790. cntl->m_ops->vote_for_dsp)
  791. ret = cntl->m_ops->vote_for_dsp(cntl->m_dev, vote);
  792. else
  793. ret = -EINVAL;
  794. done:
  795. if (ret)
  796. return ret;
  797. else
  798. return count;
  799. }
  800. static const struct file_operations wcd_miscdev_fops = {
  801. .write = wcd_miscdev_write,
  802. .release = wcd_miscdev_release,
  803. };
  804. static int wcd_cntl_miscdev_create(struct wcd_dsp_cntl *cntl)
  805. {
  806. snprintf(cntl->miscdev_name, ARRAY_SIZE(cntl->miscdev_name),
  807. "wcd_dsp%u_control", cntl->dsp_instance);
  808. cntl->miscdev.minor = MISC_DYNAMIC_MINOR;
  809. cntl->miscdev.name = cntl->miscdev_name;
  810. cntl->miscdev.fops = &wcd_miscdev_fops;
  811. cntl->miscdev.parent = cntl->codec->dev;
  812. return misc_register(&cntl->miscdev);
  813. }
  814. static void wcd_cntl_miscdev_destroy(struct wcd_dsp_cntl *cntl)
  815. {
  816. misc_deregister(&cntl->miscdev);
  817. }
  818. static int wcd_control_init(struct device *dev, void *priv_data)
  819. {
  820. struct wcd_dsp_cntl *cntl = priv_data;
  821. struct snd_soc_codec *codec = cntl->codec;
  822. struct wcd9xxx *wcd9xxx = dev_get_drvdata(codec->dev->parent);
  823. struct wcd9xxx_core_resource *core_res = &wcd9xxx->core_res;
  824. int ret;
  825. bool err_irq_requested = false;
  826. ret = wcd9xxx_request_irq(core_res,
  827. cntl->irqs.cpe_ipc1_irq,
  828. wcd_cntl_ipc_irq, "CPE IPC1",
  829. cntl);
  830. if (ret < 0) {
  831. dev_err(codec->dev,
  832. "%s: Failed to request cpe ipc irq, err = %d\n",
  833. __func__, ret);
  834. goto done;
  835. }
  836. /* Unmask the fatal irqs */
  837. snd_soc_write(codec, WCD9360_CPE_SS_SS_ERROR_INT_MASK_0A,
  838. ~(cntl->irqs.fatal_irqs & 0xFF));
  839. snd_soc_write(codec, WCD9360_CPE_SS_SS_ERROR_INT_MASK_0B,
  840. ~((cntl->irqs.fatal_irqs >> 8) & 0xFF));
  841. /*
  842. * CPE ERR irq is used only for error reporting from WCD DSP,
  843. * even if this request fails, DSP can be function normally.
  844. * Continuing with init even if the CPE ERR irq request fails.
  845. */
  846. if (wcd9xxx_request_irq(core_res, cntl->irqs.cpe_err_irq,
  847. wcd_cntl_err_irq, "CPE ERR", cntl))
  848. dev_info(codec->dev, "%s: Failed request_irq(cpe_err_irq)",
  849. __func__);
  850. else
  851. err_irq_requested = true;
  852. /* Enable all the clocks */
  853. ret = wcd_cntl_clocks_enable(cntl);
  854. if (ret < 0) {
  855. dev_err(codec->dev, "%s: Failed to enable clocks, err = %d\n",
  856. __func__, ret);
  857. goto err_clk_enable;
  858. }
  859. wcd_cntl_cpar_ctrl(cntl, true);
  860. return 0;
  861. err_clk_enable:
  862. /* Mask all error interrupts */
  863. snd_soc_write(codec, WCD9360_CPE_SS_SS_ERROR_INT_MASK_0A, 0xFF);
  864. snd_soc_write(codec, WCD9360_CPE_SS_SS_ERROR_INT_MASK_0B, 0xFF);
  865. /* Free the irq's requested */
  866. wcd9xxx_free_irq(core_res, cntl->irqs.cpe_ipc1_irq, cntl);
  867. if (err_irq_requested)
  868. wcd9xxx_free_irq(core_res, cntl->irqs.cpe_err_irq, cntl);
  869. done:
  870. return ret;
  871. }
  872. static int wcd_control_deinit(struct device *dev, void *priv_data)
  873. {
  874. struct wcd_dsp_cntl *cntl = priv_data;
  875. struct snd_soc_codec *codec = cntl->codec;
  876. struct wcd9xxx *wcd9xxx = dev_get_drvdata(codec->dev->parent);
  877. struct wcd9xxx_core_resource *core_res = &wcd9xxx->core_res;
  878. wcd_cntl_clocks_disable(cntl);
  879. wcd_cntl_cpar_ctrl(cntl, false);
  880. /* Mask all error interrupts */
  881. snd_soc_write(codec, WCD9360_CPE_SS_SS_ERROR_INT_MASK_0A, 0xFF);
  882. snd_soc_write(codec, WCD9360_CPE_SS_SS_ERROR_INT_MASK_0B, 0xFF);
  883. /* Free the irq's requested */
  884. wcd9xxx_free_irq(core_res, cntl->irqs.cpe_err_irq, cntl);
  885. wcd9xxx_free_irq(core_res, cntl->irqs.cpe_ipc1_irq, cntl);
  886. return 0;
  887. }
  888. static struct wdsp_cmpnt_ops control_ops = {
  889. .init = wcd_control_init,
  890. .deinit = wcd_control_deinit,
  891. .event_handler = wcd_control_handler,
  892. };
  893. static int wcd_ctrl_component_bind(struct device *dev,
  894. struct device *master,
  895. void *data)
  896. {
  897. struct wcd_dsp_cntl *cntl;
  898. struct snd_soc_codec *codec;
  899. struct snd_card *card;
  900. struct snd_info_entry *entry;
  901. char proc_name[WCD_PROCFS_ENTRY_MAX_LEN];
  902. char wcd_cntl_dir_name[WCD_CNTL_DIR_NAME_LEN_MAX];
  903. int ret = 0;
  904. if (!dev || !master || !data) {
  905. pr_err("%s: Invalid parameters\n", __func__);
  906. return -EINVAL;
  907. }
  908. cntl = pahu_get_wcd_dsp_cntl(dev);
  909. if (!cntl) {
  910. dev_err(dev, "%s: Failed to get cntl reference\n",
  911. __func__);
  912. return -EINVAL;
  913. }
  914. cntl->m_dev = master;
  915. cntl->m_ops = data;
  916. if (!cntl->m_ops->register_cmpnt_ops) {
  917. dev_err(dev, "%s: invalid master callback register_cmpnt_ops\n",
  918. __func__);
  919. ret = -EINVAL;
  920. goto done;
  921. }
  922. ret = cntl->m_ops->register_cmpnt_ops(master, dev, cntl, &control_ops);
  923. if (ret) {
  924. dev_err(dev, "%s: register_cmpnt_ops failed, err = %d\n",
  925. __func__, ret);
  926. goto done;
  927. }
  928. ret = wcd_cntl_miscdev_create(cntl);
  929. if (ret < 0) {
  930. dev_err(dev, "%s: misc dev register failed, err = %d\n",
  931. __func__, ret);
  932. goto done;
  933. }
  934. snprintf(wcd_cntl_dir_name, WCD_CNTL_DIR_NAME_LEN_MAX,
  935. "%s%d", "wdsp", cntl->dsp_instance);
  936. ret = wcd_cntl_sysfs_init(wcd_cntl_dir_name, cntl);
  937. if (ret < 0) {
  938. dev_err(dev, "%s: sysfs_init failed, err = %d\n",
  939. __func__, ret);
  940. goto err_sysfs_init;
  941. }
  942. wcd_cntl_debugfs_init(wcd_cntl_dir_name, cntl);
  943. codec = cntl->codec;
  944. card = codec->component.card->snd_card;
  945. snprintf(proc_name, WCD_PROCFS_ENTRY_MAX_LEN, "%s%d%s", "cpe",
  946. cntl->dsp_instance, "_state");
  947. entry = snd_info_create_card_entry(card, proc_name, card->proc_root);
  948. if (!entry) {
  949. /* Do not treat this as Fatal error */
  950. dev_err(dev, "%s: Failed to create procfs entry %s\n",
  951. __func__, proc_name);
  952. goto err_sysfs_init;
  953. }
  954. cntl->ssr_entry.entry = entry;
  955. cntl->ssr_entry.offline = 1;
  956. entry->size = WCD_PROCFS_ENTRY_MAX_LEN;
  957. entry->content = SNDRV_INFO_CONTENT_DATA;
  958. entry->c.ops = &wdsp_ssr_entry_ops;
  959. entry->private_data = cntl;
  960. ret = snd_info_register(entry);
  961. if (ret < 0) {
  962. dev_err(dev, "%s: Failed to register entry %s, err = %d\n",
  963. __func__, proc_name, ret);
  964. snd_info_free_entry(entry);
  965. /* Let bind still happen even if creating the entry failed */
  966. ret = 0;
  967. }
  968. done:
  969. return ret;
  970. err_sysfs_init:
  971. wcd_cntl_miscdev_destroy(cntl);
  972. return ret;
  973. }
  974. static void wcd_ctrl_component_unbind(struct device *dev,
  975. struct device *master,
  976. void *data)
  977. {
  978. struct wcd_dsp_cntl *cntl;
  979. if (!dev) {
  980. pr_err("%s: Invalid device\n", __func__);
  981. return;
  982. }
  983. cntl = pahu_get_wcd_dsp_cntl(dev);
  984. if (!cntl) {
  985. dev_err(dev, "%s: Failed to get cntl reference\n",
  986. __func__);
  987. return;
  988. }
  989. cntl->m_dev = NULL;
  990. cntl->m_ops = NULL;
  991. /* Remove the sysfs entries */
  992. wcd_cntl_sysfs_remove(cntl);
  993. /* Remove the debugfs entries */
  994. wcd_cntl_debugfs_remove(cntl);
  995. /* Remove the misc device */
  996. wcd_cntl_miscdev_destroy(cntl);
  997. }
  998. static const struct component_ops wcd_ctrl_component_ops = {
  999. .bind = wcd_ctrl_component_bind,
  1000. .unbind = wcd_ctrl_component_unbind,
  1001. };
  1002. /*
  1003. * wcd9360_dsp_ssr_event: handle the SSR event raised by caller.
  1004. * @cntl: Handle to the wcd_dsp_cntl structure
  1005. * @event: The SSR event to be handled
  1006. *
  1007. * Notifies the manager driver about the SSR event.
  1008. * Returns 0 on success and negative error code on error.
  1009. */
  1010. int wcd9360_dsp_ssr_event(struct wcd_dsp_cntl *cntl, enum cdc_ssr_event event)
  1011. {
  1012. int ret = 0;
  1013. if (!cntl) {
  1014. pr_err("%s: Invalid handle to control\n", __func__);
  1015. return -EINVAL;
  1016. }
  1017. if (!cntl->m_dev || !cntl->m_ops || !cntl->m_ops->signal_handler) {
  1018. dev_err(cntl->codec->dev,
  1019. "%s: Invalid signal_handler callback\n", __func__);
  1020. return -EINVAL;
  1021. }
  1022. switch (event) {
  1023. case WCD_CDC_DOWN_EVENT:
  1024. ret = cntl->m_ops->signal_handler(cntl->m_dev,
  1025. WDSP_CDC_DOWN_SIGNAL,
  1026. NULL);
  1027. if (ret < 0)
  1028. dev_err(cntl->codec->dev,
  1029. "%s: WDSP_CDC_DOWN_SIGNAL failed, err = %d\n",
  1030. __func__, ret);
  1031. wcd_cntl_change_online_state(cntl, 0);
  1032. break;
  1033. case WCD_CDC_UP_EVENT:
  1034. ret = cntl->m_ops->signal_handler(cntl->m_dev,
  1035. WDSP_CDC_UP_SIGNAL,
  1036. NULL);
  1037. if (ret < 0)
  1038. dev_err(cntl->codec->dev,
  1039. "%s: WDSP_CDC_UP_SIGNAL failed, err = %d\n",
  1040. __func__, ret);
  1041. break;
  1042. default:
  1043. dev_err(cntl->codec->dev, "%s: Invalid event %d\n",
  1044. __func__, event);
  1045. ret = -EINVAL;
  1046. break;
  1047. }
  1048. return ret;
  1049. }
  1050. EXPORT_SYMBOL(wcd9360_dsp_ssr_event);
  1051. /*
  1052. * wcd9360_dsp_cntl_init: Initialize the wcd-dsp control
  1053. * @codec: pointer to the codec handle
  1054. * @params: Parameters required to initialize wcd-dsp control
  1055. *
  1056. * This API is expected to be invoked by the codec driver and
  1057. * provide information essential for the wcd dsp control to
  1058. * configure and initialize the dsp
  1059. */
  1060. void wcd9360_dsp_cntl_init(struct snd_soc_codec *codec,
  1061. struct wcd_dsp_params *params,
  1062. struct wcd_dsp_cntl **cntl)
  1063. {
  1064. struct wcd_dsp_cntl *control;
  1065. int ret;
  1066. if (!codec || !params) {
  1067. pr_err("%s: Invalid handle to %s\n", __func__,
  1068. (!codec) ? "codec" : "params");
  1069. *cntl = NULL;
  1070. return;
  1071. }
  1072. if (*cntl) {
  1073. pr_err("%s: cntl is non NULL, maybe already initialized ?\n",
  1074. __func__);
  1075. return;
  1076. }
  1077. if (!params->cb || !params->cb->cdc_clk_en ||
  1078. !params->cb->cdc_vote_svs) {
  1079. dev_err(codec->dev,
  1080. "%s: clk_en and vote_svs callbacks must be provided\n",
  1081. __func__);
  1082. return;
  1083. }
  1084. control = kzalloc(sizeof(*control), GFP_KERNEL);
  1085. if (!(control))
  1086. return;
  1087. control->codec = codec;
  1088. control->clk_rate = params->clk_rate;
  1089. control->cdc_cb = params->cb;
  1090. control->dsp_instance = params->dsp_instance;
  1091. memcpy(&control->irqs, &params->irqs, sizeof(control->irqs));
  1092. init_completion(&control->boot_complete);
  1093. mutex_init(&control->clk_mutex);
  1094. mutex_init(&control->ssr_mutex);
  1095. init_waitqueue_head(&control->ssr_entry.offline_poll_wait);
  1096. /*
  1097. * The default state of WDSP is in SVS mode.
  1098. * Vote for SVS now, the vote will be removed only
  1099. * after DSP is booted up.
  1100. */
  1101. control->cdc_cb->cdc_vote_svs(codec, true);
  1102. /*
  1103. * If this is the last component needed by master to be ready,
  1104. * then component_bind will be called within the component_add.
  1105. * Hence, the data pointer should be assigned before component_add,
  1106. * so that we can access it during this component's bind call.
  1107. */
  1108. *cntl = control;
  1109. ret = component_add(codec->dev, &wcd_ctrl_component_ops);
  1110. if (ret) {
  1111. dev_err(codec->dev, "%s: component_add failed, err = %d\n",
  1112. __func__, ret);
  1113. kfree(*cntl);
  1114. *cntl = NULL;
  1115. }
  1116. }
  1117. EXPORT_SYMBOL(wcd9360_dsp_cntl_init);
  1118. /*
  1119. * wcd9360_dsp_cntl_deinit: De-initialize the wcd-dsp control
  1120. * @cntl: The struct wcd_dsp_cntl to de-initialize
  1121. *
  1122. * This API is intended to be invoked by the codec driver
  1123. * to de-initialize the wcd dsp control
  1124. */
  1125. void wcd9360_dsp_cntl_deinit(struct wcd_dsp_cntl **cntl)
  1126. {
  1127. struct wcd_dsp_cntl *control = *cntl;
  1128. struct snd_soc_codec *codec;
  1129. /* If control is NULL, there is nothing to de-initialize */
  1130. if (!control)
  1131. return;
  1132. codec = control->codec;
  1133. /*
  1134. * Calling shutdown will cleanup all register states,
  1135. * irrespective of DSP was booted up or not.
  1136. */
  1137. wcd_cntl_do_shutdown(control);
  1138. wcd_cntl_disable_memory(control, WCD_MEM_TYPE_SWITCHABLE);
  1139. wcd_cntl_disable_memory(control, WCD_MEM_TYPE_ALWAYS_ON);
  1140. component_del(codec->dev, &wcd_ctrl_component_ops);
  1141. mutex_destroy(&control->clk_mutex);
  1142. mutex_destroy(&control->ssr_mutex);
  1143. kfree(*cntl);
  1144. *cntl = NULL;
  1145. }
  1146. EXPORT_SYMBOL(wcd9360_dsp_cntl_deinit);