ep92.c 48 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/init.h>
  6. #include <linux/delay.h>
  7. #include <linux/module.h>
  8. #include <linux/kernel.h>
  9. #include <linux/i2c.h>
  10. #include <linux/slab.h>
  11. #include <linux/fs.h>
  12. #include <linux/debugfs.h>
  13. #include <linux/sysfs.h>
  14. #include <linux/kobject.h>
  15. #include <sound/core.h>
  16. #include <sound/pcm.h>
  17. #include <sound/pcm_params.h>
  18. #include <sound/tlv.h>
  19. #include <sound/soc.h>
  20. #include <linux/workqueue.h>
  21. #include "ep92.h"
  22. #define DRV_NAME "ep92_codec"
  23. #define EP92_POLL_INTERVAL_OFF_MSEC 200
  24. #define EP92_POLL_INTERVAL_ON_MSEC 20
  25. #define EP92_POLL_RUNOUT_MSEC 5000
  26. #define EP92_SYSFS_ENTRY_MAX_LEN 64
  27. #define EP92_HYST_CNT 5
  28. #define EP92_RATES (SNDRV_PCM_RATE_32000 |\
  29. SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
  30. SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 |\
  31. SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000)
  32. #define EP92_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)
  33. static const unsigned int ep92_samp_freq_table[8] = {
  34. 32000, 44100, 48000, 88200, 96000, 176400, 192000, 768000
  35. };
  36. static const unsigned int ep92_dsd_freq_table[4] = {
  37. 64, 128, 256, 0
  38. };
  39. static bool ep92_volatile_register(struct device *dev, unsigned int reg)
  40. {
  41. /* do not cache register state in regmap */
  42. return true;
  43. }
  44. static bool ep92_writeable_registers(struct device *dev, unsigned int reg)
  45. {
  46. if (reg >= EP92_ISP_MODE_ENTER_ISP && reg <= EP92_GENERAL_CONTROL_4)
  47. return true;
  48. return false;
  49. }
  50. static bool ep92_readable_registers(struct device *dev, unsigned int reg)
  51. {
  52. if (reg >= EP92_BI_VENDOR_ID_0 && reg <= EP92_MAX_REGISTER_ADDR)
  53. return true;
  54. return false;
  55. }
  56. /* codec private data */
  57. struct ep92_pdata {
  58. struct regmap *regmap;
  59. struct snd_soc_component *component;
  60. struct timer_list timer;
  61. struct work_struct read_status_worker;
  62. int irq;
  63. int poll_trig;
  64. int poll_rem;
  65. int force_inactive;
  66. int hyst_tx_plug;
  67. int hyst_link_on0;
  68. int hyst_link_on1;
  69. int hyst_link_on2;
  70. int filt_tx_plug;
  71. int filt_link_on0;
  72. int filt_link_on1;
  73. int filt_link_on2;
  74. struct {
  75. u8 tx_info;
  76. u8 video_latency;
  77. } gi; /* General Info block */
  78. struct {
  79. u8 ctl;
  80. u8 rx_sel;
  81. u8 ctl2;
  82. u8 cec_volume;
  83. u8 link;
  84. } gc; /* General Control block */
  85. struct {
  86. u8 system_status_0;
  87. u8 system_status_1;
  88. u8 audio_status;
  89. u8 cs[5];
  90. u8 cc;
  91. u8 ca;
  92. } ai; /* Audio Info block */
  93. u8 old_mode;
  94. #if IS_ENABLED(CONFIG_DEBUG_FS)
  95. struct dentry *debugfs_dir;
  96. struct dentry *debugfs_file_wo;
  97. struct dentry *debugfs_file_ro;
  98. #endif /* CONFIG_DEBUG_FS */
  99. };
  100. #if IS_ENABLED(CONFIG_DEBUG_FS)
  101. static int debugfs_codec_open_op(struct inode *inode, struct file *file)
  102. {
  103. file->private_data = inode->i_private;
  104. return 0;
  105. }
  106. static int debugfs_get_parameters(char *buf, u32 *param1, int num_of_par)
  107. {
  108. char *token;
  109. int base, cnt;
  110. token = strsep(&buf, " ");
  111. for (cnt = 0; cnt < num_of_par; cnt++) {
  112. if (token) {
  113. if ((token[1] == 'x') || (token[1] == 'X'))
  114. base = 16;
  115. else
  116. base = 10;
  117. if (kstrtou32(token, base, &param1[cnt]) != 0)
  118. return -EINVAL;
  119. token = strsep(&buf, " ");
  120. } else {
  121. return -EINVAL;
  122. }
  123. }
  124. return 0;
  125. }
  126. static ssize_t debugfs_codec_write_op(struct file *filp,
  127. const char __user *ubuf, size_t cnt, loff_t *ppos)
  128. {
  129. struct ep92_pdata *ep92 = (struct ep92_pdata *) filp->private_data;
  130. struct snd_soc_component *component = ep92->component;
  131. char lbuf[32];
  132. int rc;
  133. u32 param[2];
  134. if (!component)
  135. return -ENODEV;
  136. if (!filp || !ppos || !ubuf)
  137. return -EINVAL;
  138. if (cnt > sizeof(lbuf) - 1)
  139. return -EINVAL;
  140. rc = copy_from_user(lbuf, ubuf, cnt);
  141. if (rc)
  142. return -EFAULT;
  143. lbuf[cnt] = '\0';
  144. rc = debugfs_get_parameters(lbuf, param, 2);
  145. if ((param[0] < EP92_ISP_MODE_ENTER_ISP)
  146. || (param[0] > EP92_GENERAL_CONTROL_4)) {
  147. dev_err(component->dev, "%s: reg address 0x%02X out of range\n",
  148. __func__, param[0]);
  149. return -EINVAL;
  150. }
  151. if ((param[1] < 0) || (param[1] > 255)) {
  152. dev_err(component->dev, "%s: reg data 0x%02X out of range\n",
  153. __func__, param[1]);
  154. return -EINVAL;
  155. }
  156. if (rc == 0) {
  157. rc = cnt;
  158. dev_info(component->dev, "%s: reg[0x%02X]=0x%02X\n",
  159. __func__, param[0], param[1]);
  160. snd_soc_component_write(component, param[0], param[1]);
  161. } else {
  162. dev_err(component->dev, "%s: write to register addr=0x%02X failed\n",
  163. __func__, param[0]);
  164. }
  165. return rc;
  166. }
  167. static ssize_t debugfs_ep92_reg_show(struct snd_soc_component *component,
  168. char __user *ubuf, size_t count, loff_t *ppos)
  169. {
  170. int i, reg_val, len;
  171. ssize_t total = 0;
  172. char tmp_buf[20];
  173. if (!ubuf || !ppos || !component || *ppos < 0)
  174. return -EINVAL;
  175. for (i = (int) *ppos / 11; i <= EP92_MAX_REGISTER_ADDR; i++) {
  176. reg_val = snd_soc_component_read32(component, i);
  177. len = snprintf(tmp_buf, 20, "0x%02X: 0x%02X\n", i,
  178. (reg_val & 0xFF));
  179. if ((total + len) > count)
  180. break;
  181. if (copy_to_user((ubuf + total), tmp_buf, len)) {
  182. dev_err(component->dev, "%s: fail to copy reg dump\n",
  183. __func__);
  184. total = -EFAULT;
  185. goto copy_err;
  186. }
  187. *ppos += len;
  188. total += len;
  189. }
  190. copy_err:
  191. return total;
  192. }
  193. static ssize_t debugfs_codec_read_op(struct file *filp,
  194. char __user *ubuf, size_t cnt, loff_t *ppos)
  195. {
  196. struct ep92_pdata *ep92 = (struct ep92_pdata *) filp->private_data;
  197. struct snd_soc_component *component = ep92->component;
  198. ssize_t ret_cnt;
  199. if (!component)
  200. return -ENODEV;
  201. if (!filp || !ppos || !ubuf || *ppos < 0)
  202. return -EINVAL;
  203. ret_cnt = debugfs_ep92_reg_show(component, ubuf, cnt, ppos);
  204. return ret_cnt;
  205. }
  206. static const struct file_operations debugfs_codec_ops = {
  207. .open = debugfs_codec_open_op,
  208. .write = debugfs_codec_write_op,
  209. .read = debugfs_codec_read_op,
  210. };
  211. #endif /* CONFIG_DEBUG_FS */
  212. static int ep92_send_uevent(struct ep92_pdata *ep92, char *event)
  213. {
  214. char *env[] = { event, NULL };
  215. if (!event || !ep92)
  216. return -EINVAL;
  217. if (!ep92->component)
  218. return -ENODEV;
  219. return kobject_uevent_env(&ep92->component->dev->kobj,
  220. KOBJ_CHANGE, env);
  221. }
  222. static int ep92_startup(struct snd_pcm_substream *substream,
  223. struct snd_soc_dai *dai)
  224. {
  225. return 0;
  226. }
  227. static void ep92_shutdown(struct snd_pcm_substream *substream,
  228. struct snd_soc_dai *dai)
  229. {
  230. }
  231. static int ep92_hw_params(struct snd_pcm_substream *substream,
  232. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  233. {
  234. return 0;
  235. }
  236. static struct snd_soc_dai_ops ep92_dai_ops = {
  237. .startup = ep92_startup,
  238. .shutdown = ep92_shutdown,
  239. .hw_params = ep92_hw_params,
  240. };
  241. static struct snd_soc_dai_driver ep92_dai[] = {
  242. {
  243. .name = "ep92-hdmi",
  244. .id = 1,
  245. .capture = {
  246. .stream_name = "HDMI Capture",
  247. .rate_max = 192000,
  248. .rate_min = 32000,
  249. .channels_min = 1,
  250. .channels_max = 8,
  251. .rates = EP92_RATES,
  252. .formats = EP92_FORMATS,
  253. },
  254. .ops = &ep92_dai_ops, /* callbacks */
  255. },
  256. {
  257. .name = "ep92-arc",
  258. .id = 2,
  259. .capture = {
  260. .stream_name = "ARC Capture",
  261. .rate_max = 192000,
  262. .rate_min = 32000,
  263. .channels_min = 1,
  264. .channels_max = 2,
  265. .rates = EP92_RATES,
  266. .formats = EP92_FORMATS,
  267. },
  268. .ops = &ep92_dai_ops, /* callbacks */
  269. },
  270. };
  271. static void ep92_read_general_control(struct snd_soc_component *component,
  272. struct ep92_pdata *ep92)
  273. {
  274. u8 old, change;
  275. int val;
  276. old = ep92->gi.tx_info;
  277. ep92->gi.tx_info = snd_soc_component_read32(component,
  278. EP92_BI_GENERAL_INFO_0);
  279. if (ep92->gi.tx_info == 0xff) {
  280. dev_dbg(component->dev, "ep92 EP92_BI_GENERAL_INFO_0 read 0xff\n");
  281. ep92->gi.tx_info = old;
  282. }
  283. /* implement hysteresis to prevent events on glitches */
  284. if (ep92->gi.tx_info & EP92_GI_TX_HOT_PLUG_MASK) {
  285. if (ep92->hyst_tx_plug < EP92_HYST_CNT) {
  286. ep92->hyst_tx_plug++;
  287. if ((ep92->hyst_tx_plug == EP92_HYST_CNT) &&
  288. (ep92->filt_tx_plug == 0)) {
  289. ep92->filt_tx_plug = 1;
  290. dev_dbg(component->dev, "ep92 out_plug changed to 1\n");
  291. ep92_send_uevent(ep92,
  292. "EP92EVT_OUT_PLUG=CONNECTED");
  293. }
  294. }
  295. } else {
  296. if (ep92->hyst_tx_plug > 0) {
  297. ep92->hyst_tx_plug--;
  298. if ((ep92->hyst_tx_plug == 0) &&
  299. (ep92->filt_tx_plug == 1)) {
  300. ep92->filt_tx_plug = 0;
  301. dev_dbg(component->dev, "ep92 out_plug changed to 0\n");
  302. ep92_send_uevent(ep92,
  303. "EP92EVT_OUT_PLUG=DISCONNECTED");
  304. }
  305. }
  306. }
  307. old = ep92->gi.video_latency;
  308. ep92->gi.video_latency = snd_soc_component_read32(component,
  309. EP92_BI_GENERAL_INFO_4);
  310. if (ep92->gi.video_latency == 0xff) {
  311. dev_dbg(component->dev, "ep92 EP92_BI_GENERAL_INFO_4 read 0xff\n");
  312. ep92->gi.video_latency = old;
  313. }
  314. change = ep92->gi.video_latency ^ old;
  315. if (change & EP92_GI_VIDEO_LATENCY_MASK) {
  316. val = ep92->gi.video_latency;
  317. if (val > 0)
  318. val = (val - 1) * 2;
  319. dev_dbg(component->dev, "ep92 video latency changed to %d\n", val);
  320. ep92_send_uevent(ep92, "EP92EVT_VIDEO_LATENCY=CHANGED");
  321. }
  322. old = ep92->gc.ctl;
  323. ep92->gc.ctl = snd_soc_component_read32(component,
  324. EP92_GENERAL_CONTROL_0);
  325. if (ep92->gc.ctl == 0xff) {
  326. dev_dbg(component->dev, "ep92 EP92_GENERAL_CONTROL_0 read 0xff\n");
  327. ep92->gc.ctl = old;
  328. }
  329. change = ep92->gc.ctl ^ old;
  330. if (change & EP92_GC_POWER_MASK) {
  331. val = (ep92->gc.ctl >> EP92_GC_POWER_SHIFT) &
  332. EP92_2CHOICE_MASK;
  333. dev_dbg(component->dev, "ep92 power changed to %d\n", val);
  334. if (val)
  335. ep92_send_uevent(ep92, "EP92EVT_POWER=ON");
  336. else
  337. ep92_send_uevent(ep92, "EP92EVT_POWER=OFF");
  338. }
  339. if (change & EP92_GC_AUDIO_PATH_MASK) {
  340. val = (ep92->gc.ctl >> EP92_GC_AUDIO_PATH_SHIFT) &
  341. EP92_2CHOICE_MASK;
  342. dev_dbg(component->dev, "ep92 audio_path changed to %d\n", val);
  343. if (val)
  344. ep92_send_uevent(ep92, "EP92EVT_AUDIO_PATH=TV");
  345. else
  346. ep92_send_uevent(ep92, "EP92EVT_AUDIO_PATH=SPEAKER");
  347. }
  348. if (change & EP92_GC_CEC_MUTE_MASK) {
  349. val = (ep92->gc.ctl >> EP92_GC_CEC_MUTE_SHIFT) &
  350. EP92_2CHOICE_MASK;
  351. dev_dbg(component->dev, "ep92 cec_mute changed to %d\n", val);
  352. if (val)
  353. ep92_send_uevent(ep92, "EP92EVT_CEC_MUTE=NORMAL");
  354. else
  355. ep92_send_uevent(ep92, "EP92EVT_CEC_MUTE=MUTED");
  356. }
  357. if (change & EP92_GC_ARC_EN_MASK) {
  358. val = ep92->gc.ctl & EP92_2CHOICE_MASK;
  359. dev_dbg(component->dev, "ep92 arc_en changed to %d\n", val);
  360. if (val)
  361. ep92_send_uevent(ep92, "EP92EVT_ARC_EN=ON");
  362. else
  363. ep92_send_uevent(ep92, "EP92EVT_ARC_EN=OFF");
  364. }
  365. old = ep92->gc.rx_sel;
  366. ep92->gc.rx_sel = snd_soc_component_read32(component,
  367. EP92_GENERAL_CONTROL_1);
  368. if (ep92->gc.rx_sel == 0xff) {
  369. dev_dbg(component->dev, "ep92 EP92_GENERAL_CONTROL_1 read 0xff\n");
  370. ep92->gc.rx_sel = old;
  371. }
  372. change = ep92->gc.rx_sel ^ old;
  373. if (change & EP92_GC_RX_SEL_MASK) {
  374. val = ep92->gc.rx_sel & EP92_GC_RX_SEL_MASK;
  375. dev_dbg(component->dev, "ep92 rx_sel changed to %d\n", val);
  376. ep92_send_uevent(ep92, "EP92EVT_SRC_SEL=CHANGED");
  377. }
  378. old = ep92->gc.cec_volume;
  379. ep92->gc.cec_volume = snd_soc_component_read32(component,
  380. EP92_GENERAL_CONTROL_3);
  381. if (ep92->gc.cec_volume == 0xff) {
  382. dev_dbg(component->dev, "ep92 EP92_GENERAL_CONTROL_3 read 0xff\n");
  383. ep92->gc.cec_volume = old;
  384. }
  385. change = ep92->gc.cec_volume ^ old;
  386. if (change & EP92_GC_CEC_VOLUME_MASK) {
  387. val = ep92->gc.cec_volume & EP92_GC_CEC_VOLUME_MASK;
  388. dev_dbg(component->dev, "ep92 cec_volume changed to %d\n", val);
  389. ep92_send_uevent(ep92, "EP92EVT_CEC_VOLUME=CHANGED");
  390. }
  391. old = ep92->gc.link;
  392. ep92->gc.link = snd_soc_component_read32(component,
  393. EP92_GENERAL_CONTROL_4);
  394. if (ep92->gc.link == 0xff) {
  395. dev_dbg(component->dev, "ep92 EP92_GENERAL_CONTROL_4 read 0xff\n");
  396. ep92->gc.link = old;
  397. }
  398. /* implement hysteresis to prevent events on glitches */
  399. if (ep92->gc.link & EP92_GC_LINK_ON0_MASK) {
  400. if (ep92->hyst_link_on0 < EP92_HYST_CNT) {
  401. ep92->hyst_link_on0++;
  402. if ((ep92->hyst_link_on0 == EP92_HYST_CNT) &&
  403. (ep92->filt_link_on0 == 0)) {
  404. ep92->filt_link_on0 = 1;
  405. dev_dbg(component->dev, "ep92 link_on0 changed to 1\n");
  406. ep92_send_uevent(ep92,
  407. "EP92EVT_LINK_ON0=CONNECTED");
  408. }
  409. }
  410. } else {
  411. if (ep92->hyst_link_on0 > 0) {
  412. ep92->hyst_link_on0--;
  413. if ((ep92->hyst_link_on0 == 0) &&
  414. (ep92->filt_link_on0 == 1)) {
  415. ep92->filt_link_on0 = 0;
  416. dev_dbg(component->dev, "ep92 link_on0 changed to 0\n");
  417. ep92_send_uevent(ep92,
  418. "EP92EVT_LINK_ON0=DISCONNECTED");
  419. }
  420. }
  421. }
  422. /* implement hysteresis to prevent events on glitches */
  423. if (ep92->gc.link & EP92_GC_LINK_ON1_MASK) {
  424. if (ep92->hyst_link_on1 < EP92_HYST_CNT) {
  425. ep92->hyst_link_on1++;
  426. if ((ep92->hyst_link_on1 == EP92_HYST_CNT) &&
  427. (ep92->filt_link_on1 == 0)) {
  428. ep92->filt_link_on1 = 1;
  429. dev_dbg(component->dev, "ep92 link_on1 changed to 1\n");
  430. ep92_send_uevent(ep92,
  431. "EP92EVT_LINK_ON1=CONNECTED");
  432. }
  433. }
  434. } else {
  435. if (ep92->hyst_link_on1 > 0) {
  436. ep92->hyst_link_on1--;
  437. if ((ep92->hyst_link_on1 == 0) &&
  438. (ep92->filt_link_on1 == 1)) {
  439. ep92->filt_link_on1 = 0;
  440. dev_dbg(component->dev, "ep92 link_on1 changed to 0\n");
  441. ep92_send_uevent(ep92,
  442. "EP92EVT_LINK_ON1=DISCONNECTED");
  443. }
  444. }
  445. }
  446. /* implement hysteresis to prevent events on glitches */
  447. if (ep92->gc.link & EP92_GC_LINK_ON2_MASK) {
  448. if (ep92->hyst_link_on2 < EP92_HYST_CNT) {
  449. ep92->hyst_link_on2++;
  450. if ((ep92->hyst_link_on2 == EP92_HYST_CNT) &&
  451. (ep92->filt_link_on2 == 0)) {
  452. ep92->filt_link_on2 = 1;
  453. dev_dbg(component->dev, "ep92 link_on2 changed to 1\n");
  454. ep92_send_uevent(ep92,
  455. "EP92EVT_LINK_ON2=CONNECTED");
  456. }
  457. }
  458. } else {
  459. if (ep92->hyst_link_on2 > 0) {
  460. ep92->hyst_link_on2--;
  461. if ((ep92->hyst_link_on2 == 0) &&
  462. (ep92->filt_link_on2 == 1)) {
  463. ep92->filt_link_on2 = 0;
  464. dev_dbg(component->dev, "ep92 link_on2 changed to 0\n");
  465. ep92_send_uevent(ep92,
  466. "EP92EVT_LINK_ON2=DISCONNECTED");
  467. }
  468. }
  469. }
  470. }
  471. static void ep92_read_audio_info(struct snd_soc_component *component,
  472. struct ep92_pdata *ep92)
  473. {
  474. u8 old, change;
  475. u8 new_mode;
  476. bool send_uevent = false;
  477. old = ep92->ai.system_status_0;
  478. ep92->ai.system_status_0 = snd_soc_component_read32(component,
  479. EP92_AUDIO_INFO_SYSTEM_STATUS_0);
  480. if (ep92->ai.system_status_0 == 0xff) {
  481. dev_dbg(component->dev, "ep92 EP92_AUDIO_INFO_SYSTEM_STATUS_0 read 0xff\n");
  482. ep92->ai.system_status_0 = old;
  483. }
  484. change = ep92->ai.system_status_0 ^ old;
  485. if (change & EP92_AI_MCLK_ON_MASK) {
  486. dev_dbg(component->dev, "ep92 status changed to %d\n",
  487. (ep92->ai.system_status_0 >> EP92_AI_MCLK_ON_SHIFT) &
  488. EP92_2CHOICE_MASK);
  489. send_uevent = true;
  490. }
  491. if (change & EP92_AI_AVMUTE_MASK) {
  492. dev_dbg(component->dev, "ep92 avmute changed to %d\n",
  493. (ep92->ai.system_status_0 >> EP92_AI_AVMUTE_SHIFT) &
  494. EP92_2CHOICE_MASK);
  495. send_uevent = true;
  496. }
  497. if (change & EP92_AI_LAYOUT_MASK) {
  498. dev_dbg(component->dev, "ep92 layout changed to %d\n",
  499. (ep92->ai.system_status_0) & EP92_2CHOICE_MASK);
  500. send_uevent = true;
  501. }
  502. old = ep92->ai.system_status_1;
  503. ep92->ai.system_status_1 = snd_soc_read(codec,
  504. EP92_AUDIO_INFO_SYSTEM_STATUS_1);
  505. if (ep92->ai.system_status_1 == 0xff) {
  506. dev_dbg(codec->dev,
  507. "ep92 EP92_AUDIO_INFO_SYSTEM_STATUS_1 read 0xff\n");
  508. ep92->ai.system_status_1 = old;
  509. }
  510. change = ep92->ai.system_status_1 ^ old;
  511. if (change & EP92_AI_DSD_RATE_MASK) {
  512. dev_dbg(codec->dev, "ep92 dsd rate changed to %d\n",
  513. ep92_dsd_freq_table[(ep92->ai.system_status_1 &
  514. EP92_AI_DSD_RATE_MASK)
  515. >> EP92_AI_DSD_RATE_SHIFT]);
  516. send_uevent = true;
  517. }
  518. old = ep92->ai.audio_status;
  519. ep92->ai.audio_status = snd_soc_component_read32(component,
  520. EP92_AUDIO_INFO_AUDIO_STATUS);
  521. if (ep92->ai.audio_status == 0xff) {
  522. dev_dbg(component->dev, "ep92 EP92_AUDIO_INFO_AUDIO_STATUS read 0xff\n");
  523. ep92->ai.audio_status = old;
  524. }
  525. change = ep92->ai.audio_status ^ old;
  526. if (change & EP92_AI_RATE_MASK) {
  527. dev_dbg(component->dev, "ep92 rate changed to %d\n",
  528. ep92_samp_freq_table[(ep92->ai.audio_status) &
  529. EP92_AI_RATE_MASK]);
  530. send_uevent = true;
  531. }
  532. old = ep92->ai.cs[0];
  533. ep92->ai.cs[0] = snd_soc_component_read32(component,
  534. EP92_AUDIO_INFO_CHANNEL_STATUS_0);
  535. if (ep92->ai.cs[0] == 0xff) {
  536. dev_dbg(component->dev, "ep92 EP92_AUDIO_INFO_CHANNEL_STATUS_0 read 0xff\n");
  537. ep92->ai.cs[0] = old;
  538. }
  539. change = ep92->ai.cs[0] ^ old;
  540. if (change & EP92_AI_PREEMPH_MASK) {
  541. dev_dbg(component->dev, "ep92 preemph changed to %d\n",
  542. (ep92->ai.cs[0] & EP92_AI_PREEMPH_MASK) >>
  543. EP92_AI_PREEMPH_SHIFT);
  544. send_uevent = true;
  545. }
  546. new_mode = ep92->old_mode;
  547. if (ep92->ai.audio_status & EP92_AI_DSD_ADO_MASK)
  548. new_mode = 2; /* One bit audio */
  549. else if (ep92->ai.audio_status & EP92_AI_STD_ADO_MASK) {
  550. if (ep92->ai.cs[0] & EP92_AI_NPCM_MASK)
  551. new_mode = 1; /* Compr */
  552. else
  553. new_mode = 0; /* LPCM */
  554. } else if (ep92->ai.audio_status & EP92_AI_HBR_ADO_MASK)
  555. new_mode = 1; /* Compr */
  556. if (ep92->old_mode != new_mode) {
  557. dev_dbg(component->dev, "ep92 mode changed to %d\n", new_mode);
  558. send_uevent = true;
  559. }
  560. ep92->old_mode = new_mode;
  561. old = ep92->ai.cc;
  562. ep92->ai.cc = snd_soc_component_read32(component,
  563. EP92_AUDIO_INFO_ADO_INFO_FRAME_1);
  564. if (ep92->ai.cc == 0xff) {
  565. dev_dbg(component->dev, "ep92 EP92_AUDIO_INFO_ADO_INFO_FRAME_1 read 0xff\n");
  566. ep92->ai.cc = old;
  567. }
  568. change = ep92->ai.cc ^ old;
  569. if (change & EP92_AI_CH_COUNT_MASK) {
  570. dev_dbg(component->dev, "ep92 ch_count changed to %d (%d)\n",
  571. ep92->ai.cc & EP92_AI_CH_COUNT_MASK,
  572. (ep92->ai.cc & EP92_AI_CH_COUNT_MASK) == 0 ? 0 :
  573. (ep92->ai.cc & EP92_AI_CH_COUNT_MASK) + 1);
  574. send_uevent = true;
  575. }
  576. old = ep92->ai.ca;
  577. ep92->ai.ca = snd_soc_component_read32(component,
  578. EP92_AUDIO_INFO_ADO_INFO_FRAME_4);
  579. if (ep92->ai.ca == 0xff) {
  580. dev_dbg(component->dev, "ep92 EP92_AUDIO_INFO_ADO_INFO_FRAME_4 read 0xff\n");
  581. ep92->ai.ca = old;
  582. }
  583. change = ep92->ai.ca ^ old;
  584. if (change & EP92_AI_CH_ALLOC_MASK) {
  585. dev_dbg(component->dev, "ep92 ch_alloc changed to 0x%02x\n",
  586. (ep92->ai.ca) & EP92_AI_CH_ALLOC_MASK);
  587. send_uevent = true;
  588. }
  589. if (send_uevent)
  590. ep92_send_uevent(ep92, "EP92EVT_AUDIO=MEDIA_CONFIG_CHANGE");
  591. }
  592. static void ep92_init(struct snd_soc_component *component,
  593. struct ep92_pdata *ep92)
  594. {
  595. int reg0 = 0;
  596. int reg1 = 0;
  597. int reg2 = 0;
  598. int reg3 = 0;
  599. if (!ep92 || !component)
  600. return;
  601. reg0 = snd_soc_component_read32(component, EP92_BI_VERSION_YEAR);
  602. reg1 = snd_soc_component_read32(component, EP92_BI_VERSION_MONTH);
  603. reg2 = snd_soc_component_read32(component, EP92_BI_VERSION_DATE);
  604. reg3 = snd_soc_component_read32(component, EP92_BI_VERSION_NUM);
  605. dev_info(compoent->dev, "ep92 version info %02d/%02d/%02d %d\n",
  606. reg0, reg1, reg2, reg3);
  607. /* update the format information in mixer controls */
  608. ep92_read_general_control(component, ep92);
  609. ep92_read_audio_info(component, ep92);
  610. }
  611. static int ep92_probe(struct snd_soc_component *component)
  612. {
  613. struct ep92_pdata *ep92 = snd_soc_component_get_drvdata(component);
  614. ep92->component = component;
  615. ep92_init(component, ep92);
  616. /* start polling when codec is registered */
  617. mod_timer(&ep92->timer, jiffies +
  618. msecs_to_jiffies(EP92_POLL_INTERVAL_OFF_MSEC));
  619. return 0;
  620. }
  621. static void ep92_remove(struct snd_soc_component *component)
  622. {
  623. return;
  624. }
  625. static const struct snd_soc_component_driver soc_codec_drv_ep92 = {
  626. .name = DRV_NAME,
  627. .probe = ep92_probe,
  628. .remove = ep92_remove,
  629. };
  630. static struct regmap_config ep92_regmap_config = {
  631. .reg_bits = 8,
  632. .val_bits = 8,
  633. .cache_type = REGCACHE_RBTREE,
  634. .reg_defaults = ep92_reg_defaults,
  635. .num_reg_defaults = ARRAY_SIZE(ep92_reg_defaults),
  636. .max_register = EP92_MAX_REGISTER_ADDR,
  637. .volatile_reg = ep92_volatile_register,
  638. .writeable_reg = ep92_writeable_registers,
  639. .readable_reg = ep92_readable_registers,
  640. };
  641. void ep92_read_status(struct work_struct *work)
  642. {
  643. struct ep92_pdata *ep92 = container_of(work, struct ep92_pdata,
  644. read_status_worker);
  645. struct snd_soc_component *component = ep92->component;
  646. u8 val;
  647. /* No polling before component is initialized */
  648. if (component == NULL)
  649. return;
  650. if (ep92->force_inactive)
  651. return;
  652. /* check ADO_CHF that is set when audio format has changed */
  653. val = snd_soc_component_read32(component, EP92_BI_GENERAL_INFO_1);
  654. if (val == 0xff) {
  655. /* workaround for Nak'ed first read */
  656. val = snd_soc_component_read32(component,
  657. EP92_BI_GENERAL_INFO_1);
  658. if (val == 0xff)
  659. return; /* assume device not present */
  660. }
  661. if (val & EP92_GI_ADO_CHF_MASK)
  662. dev_dbg(component->dev, "ep92 audio mode change trigger.\n");
  663. if (val & EP92_GI_CEC_ECF_MASK)
  664. dev_dbg(component->dev, "ep92 CEC change trigger.\n");
  665. /* check for general control changes */
  666. ep92_read_general_control(component, ep92);
  667. /* update the format information in mixer controls */
  668. ep92_read_audio_info(component, ep92);
  669. }
  670. static irqreturn_t ep92_irq(int irq, void *data)
  671. {
  672. struct ep92_pdata *ep92 = data;
  673. struct snd_soc_component *component = ep92->component;
  674. /* Treat interrupt before component is initialized as spurious */
  675. if (component == NULL)
  676. return IRQ_NONE;
  677. dev_dbg(component->dev, "ep92_interrupt\n");
  678. ep92->poll_trig = 1;
  679. mod_timer(&ep92->timer, jiffies +
  680. msecs_to_jiffies(EP92_POLL_INTERVAL_ON_MSEC));
  681. schedule_work(&ep92->read_status_worker);
  682. return IRQ_HANDLED;
  683. };
  684. void ep92_poll_status(struct timer_list *t)
  685. {
  686. struct ep92_pdata *ep92 = from_timer(ep92, t, timer);
  687. struct snd_soc_component *component = ep92->component;
  688. if (ep92->force_inactive)
  689. return;
  690. /* if no IRQ is configured, always keep on polling */
  691. if (ep92->irq == 0)
  692. ep92->poll_rem = EP92_POLL_RUNOUT_MSEC;
  693. /* on interrupt, start polling for some time */
  694. if (ep92->poll_trig) {
  695. if (ep92->poll_rem == 0)
  696. dev_info(component->dev, "status checking activated\n");
  697. ep92->poll_trig = 0;
  698. ep92->poll_rem = EP92_POLL_RUNOUT_MSEC;
  699. }
  700. /*
  701. * If power_on == 0, poll only until poll_rem reaches zero and stop.
  702. * This allows to system to go to low power sleep mode.
  703. * Otherwise (power_on == 1) always re-arm timer to keep on polling.
  704. */
  705. if ((ep92->gc.ctl & EP92_GC_POWER_MASK) == 0) {
  706. if (ep92->poll_rem) {
  707. mod_timer(&ep92->timer, jiffies +
  708. msecs_to_jiffies(EP92_POLL_INTERVAL_OFF_MSEC));
  709. if (ep92->poll_rem > EP92_POLL_INTERVAL_OFF_MSEC) {
  710. ep92->poll_rem -= EP92_POLL_INTERVAL_OFF_MSEC;
  711. } else {
  712. dev_info(component->dev, "status checking stopped\n");
  713. ep92->poll_rem = 0;
  714. }
  715. }
  716. } else {
  717. ep92->poll_rem = EP92_POLL_RUNOUT_MSEC;
  718. mod_timer(&ep92->timer, jiffies +
  719. msecs_to_jiffies(EP92_POLL_INTERVAL_ON_MSEC));
  720. }
  721. schedule_work(&ep92->read_status_worker);
  722. }
  723. static const struct of_device_id ep92_of_match[] = {
  724. { .compatible = "explore,ep92a6", },
  725. { }
  726. };
  727. MODULE_DEVICE_TABLE(of, ep92_of_match);
  728. static ssize_t ep92_sysfs_rda_chipid(struct device *dev,
  729. struct device_attribute *attr, char *buf)
  730. {
  731. ssize_t ret = 0;
  732. int reg0 = 0;
  733. int reg1 = 0;
  734. int reg2 = 0;
  735. int reg3 = 0;
  736. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  737. if (!ep92 || !ep92->component) {
  738. dev_err(dev, "%s: device error\n", __func__);
  739. return -ENODEV;
  740. }
  741. reg0 = snd_soc_component_read32(ep92->component, EP92_BI_VENDOR_ID_0);
  742. reg1 = snd_soc_component_read32(ep92->component, EP92_BI_VENDOR_ID_1);
  743. reg2 = snd_soc_component_read32(ep92->component, EP92_BI_DEVICE_ID_0);
  744. reg3 = snd_soc_component_read32(ep92->component, EP92_BI_DEVICE_ID_1);
  745. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%02x%02x/%02x%02x\n",
  746. reg0, reg1, reg2, reg3);
  747. dev_dbg(dev, "%s: '%s'\n", __func__, buf);
  748. return ret;
  749. }
  750. static ssize_t ep92_sysfs_rda_version(struct device *dev,
  751. struct device_attribute *attr, char *buf)
  752. {
  753. ssize_t ret = 0;
  754. int reg0 = 0;
  755. int reg1 = 0;
  756. int reg2 = 0;
  757. int reg3 = 0;
  758. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  759. if (!ep92 || !ep92->component) {
  760. dev_err(dev, "%s: device error\n", __func__);
  761. return -ENODEV;
  762. }
  763. reg0 = snd_soc_component_read32(ep92->component,
  764. EP92_BI_VERSION_YEAR);
  765. reg1 = snd_soc_component_read32(ep92->component,
  766. EP92_BI_VERSION_MONTH);
  767. reg2 = snd_soc_component_read32(ep92->component,
  768. EP92_BI_VERSION_DATE);
  769. reg3 = snd_soc_component_read32(ep92->component,
  770. EP92_BI_VERSION_NUM);
  771. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%02d/%02d/%02d %d\n",
  772. reg0, reg1, reg2, reg3);
  773. dev_dbg(dev, "%s: '%s'\n", __func__, buf);
  774. return ret;
  775. }
  776. static ssize_t ep92_sysfs_rda_audio_state(struct device *dev,
  777. struct device_attribute *attr, char *buf)
  778. {
  779. ssize_t ret;
  780. int val;
  781. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  782. if (!ep92 || !ep92->component) {
  783. dev_err(dev, "%s: device error\n", __func__);
  784. return -ENODEV;
  785. }
  786. val = (ep92->ai.system_status_0 & EP92_AI_MCLK_ON_MASK) >>
  787. EP92_AI_MCLK_ON_SHIFT;
  788. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  789. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  790. return ret;
  791. }
  792. static ssize_t ep92_sysfs_rda_audio_format(struct device *dev,
  793. struct device_attribute *attr, char *buf)
  794. {
  795. ssize_t ret;
  796. int val;
  797. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  798. if (!ep92 || !ep92->component) {
  799. dev_err(dev, "%s: device error\n", __func__);
  800. return -ENODEV;
  801. }
  802. val = ep92->old_mode;
  803. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  804. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  805. return ret;
  806. }
  807. static ssize_t ep92_sysfs_rda_dsd_rate(struct device *dev,
  808. struct device_attribute *attr, char *buf)
  809. {
  810. ssize_t ret = 0;
  811. int val;
  812. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  813. if (!ep92 || !ep92->codec) {
  814. dev_err(dev, "%s: device error\n", __func__);
  815. return -ENODEV;
  816. }
  817. val = ep92_dsd_freq_table[(ep92->ai.system_status_1 &
  818. EP92_AI_DSD_RATE_MASK) >> EP92_AI_DSD_RATE_SHIFT];
  819. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  820. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  821. return ret;
  822. }
  823. static ssize_t ep92_sysfs_rda_audio_rate(struct device *dev,
  824. struct device_attribute *attr, char *buf)
  825. {
  826. ssize_t ret;
  827. int val;
  828. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  829. if (!ep92 || !ep92->component) {
  830. dev_err(dev, "%s: device error\n", __func__);
  831. return -ENODEV;
  832. }
  833. val = ep92_samp_freq_table[(ep92->ai.audio_status) &
  834. EP92_AI_RATE_MASK];
  835. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  836. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  837. return ret;
  838. }
  839. static ssize_t ep92_sysfs_rda_audio_layout(struct device *dev,
  840. struct device_attribute *attr, char *buf)
  841. {
  842. ssize_t ret;
  843. int val;
  844. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  845. if (!ep92 || !ep92->component) {
  846. dev_err(dev, "%s: device error\n", __func__);
  847. return -ENODEV;
  848. }
  849. val = (ep92->ai.system_status_0 & EP92_AI_LAYOUT_MASK) >>
  850. EP92_AI_LAYOUT_SHIFT;
  851. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  852. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  853. return ret;
  854. }
  855. static ssize_t ep92_sysfs_rda_audio_ch_count(struct device *dev,
  856. struct device_attribute *attr, char *buf)
  857. {
  858. ssize_t ret;
  859. int val;
  860. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  861. if (!ep92 || !ep92->component) {
  862. dev_err(dev, "%s: device error\n", __func__);
  863. return -ENODEV;
  864. }
  865. val = ep92->ai.cc & EP92_AI_CH_COUNT_MASK;
  866. /* mapping is ch_count = reg_val + 1, with exception: 0 = unknown */
  867. if (val > 0)
  868. val += 1;
  869. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  870. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  871. return ret;
  872. }
  873. static ssize_t ep92_sysfs_rda_audio_ch_alloc(struct device *dev,
  874. struct device_attribute *attr, char *buf)
  875. {
  876. ssize_t ret;
  877. int val;
  878. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  879. if (!ep92 || !ep92->component) {
  880. dev_err(dev, "%s: device error\n", __func__);
  881. return -ENODEV;
  882. }
  883. val = ep92->ai.ca & EP92_AI_CH_ALLOC_MASK;
  884. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  885. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  886. return ret;
  887. }
  888. static ssize_t ep92_sysfs_rda_audio_preemph(struct device *dev,
  889. struct device_attribute *attr, char *buf)
  890. {
  891. ssize_t ret;
  892. int val;
  893. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  894. if (!ep92 || !ep92->component) {
  895. dev_err(dev, "%s: device error\n", __func__);
  896. return -ENODEV;
  897. }
  898. val = (ep92->ai.cs[0] & EP92_AI_PREEMPH_MASK) >>
  899. EP92_AI_PREEMPH_SHIFT;
  900. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  901. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  902. return ret;
  903. }
  904. static ssize_t ep92_sysfs_rda_avmute(struct device *dev,
  905. struct device_attribute *attr, char *buf)
  906. {
  907. ssize_t ret;
  908. int val;
  909. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  910. if (!ep92 || !ep92->component) {
  911. dev_err(dev, "%s: device error\n", __func__);
  912. return -ENODEV;
  913. }
  914. val = (ep92->ai.system_status_0 >> EP92_AI_AVMUTE_SHIFT) &
  915. EP92_2CHOICE_MASK;
  916. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  917. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  918. return ret;
  919. }
  920. static ssize_t ep92_sysfs_rda_link_on0(struct device *dev,
  921. struct device_attribute *attr, char *buf)
  922. {
  923. ssize_t ret;
  924. int val;
  925. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  926. if (!ep92 || !ep92->component) {
  927. dev_err(dev, "%s: device error\n", __func__);
  928. return -ENODEV;
  929. }
  930. val = ep92->filt_link_on0;
  931. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  932. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  933. return ret;
  934. }
  935. static ssize_t ep92_sysfs_rda_link_on1(struct device *dev,
  936. struct device_attribute *attr, char *buf)
  937. {
  938. ssize_t ret;
  939. int val;
  940. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  941. if (!ep92 || !ep92->component) {
  942. dev_err(dev, "%s: device error\n", __func__);
  943. return -ENODEV;
  944. }
  945. val = ep92->filt_link_on1;
  946. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  947. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  948. return ret;
  949. }
  950. static ssize_t ep92_sysfs_rda_link_on2(struct device *dev,
  951. struct device_attribute *attr, char *buf)
  952. {
  953. ssize_t ret;
  954. int val;
  955. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  956. if (!ep92 || !ep92->component) {
  957. dev_err(dev, "%s: device error\n", __func__);
  958. return -ENODEV;
  959. }
  960. val = ep92->filt_link_on2;
  961. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  962. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  963. return ret;
  964. }
  965. static ssize_t ep92_sysfs_rda_out_plug(struct device *dev,
  966. struct device_attribute *attr, char *buf)
  967. {
  968. ssize_t ret;
  969. int val;
  970. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  971. if (!ep92 || !ep92->component) {
  972. dev_err(dev, "%s: device error\n", __func__);
  973. return -ENODEV;
  974. }
  975. val = ep92->filt_tx_plug;
  976. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  977. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  978. return ret;
  979. }
  980. static ssize_t ep92_sysfs_rda_video_latency(struct device *dev,
  981. struct device_attribute *attr, char *buf)
  982. {
  983. ssize_t ret;
  984. int val;
  985. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  986. if (!ep92 || !ep92->component) {
  987. dev_err(dev, "%s: device error\n", __func__);
  988. return -ENODEV;
  989. }
  990. val = ep92->gi.video_latency & EP92_GI_VIDEO_LATENCY_MASK;
  991. if (val > 0)
  992. val = (val - 1) * 2;
  993. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  994. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  995. return ret;
  996. }
  997. static ssize_t ep92_sysfs_rda_arc_disable(struct device *dev,
  998. struct device_attribute *attr, char *buf)
  999. {
  1000. ssize_t ret;
  1001. int val;
  1002. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1003. if (!ep92 || !ep92->component) {
  1004. dev_err(dev, "%s: device error\n", __func__);
  1005. return -ENODEV;
  1006. }
  1007. val = (ep92->gc.ctl2 >> EP92_GC_ARC_DIS_SHIFT) &
  1008. EP92_2CHOICE_MASK;
  1009. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  1010. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  1011. return ret;
  1012. }
  1013. static ssize_t ep92_sysfs_wta_arc_disable(struct device *dev,
  1014. struct device_attribute *attr, const char *buf, size_t count)
  1015. {
  1016. int reg, val, rc;
  1017. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1018. if (!ep92 || !ep92->component) {
  1019. dev_err(dev, "%s: device error\n", __func__);
  1020. return -ENODEV;
  1021. }
  1022. rc = kstrtoint(buf, 10, &val);
  1023. if (rc) {
  1024. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  1025. goto end;
  1026. }
  1027. if ((val < 0) || (val > 1)) {
  1028. dev_err(dev, "%s: value out of range.\n", __func__);
  1029. rc = -EINVAL;
  1030. goto end;
  1031. }
  1032. reg = snd_soc_component_read32(ep92->component,
  1033. EP92_GENERAL_CONTROL_2);
  1034. reg &= ~EP92_GC_ARC_DIS_MASK;
  1035. reg |= ((val << EP92_GC_ARC_DIS_SHIFT) & EP92_GC_ARC_DIS_MASK);
  1036. snd_soc_component_write(ep92->component, EP92_GENERAL_CONTROL_2, reg);
  1037. ep92->gc.ctl2 &= ~EP92_GC_ARC_DIS_MASK;
  1038. ep92->gc.ctl2 |= (val << EP92_GC_ARC_DIS_SHIFT) & EP92_GC_ARC_DIS_MASK;
  1039. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  1040. end:
  1041. return rc;
  1042. }
  1043. static ssize_t ep92_sysfs_rda_power(struct device *dev,
  1044. struct device_attribute *attr, char *buf)
  1045. {
  1046. ssize_t ret;
  1047. int val;
  1048. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1049. if (!ep92 || !ep92->component) {
  1050. dev_err(dev, "%s: device error\n", __func__);
  1051. return -ENODEV;
  1052. }
  1053. val = (ep92->gc.ctl >> EP92_GC_POWER_SHIFT) & EP92_2CHOICE_MASK;
  1054. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  1055. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  1056. return ret;
  1057. }
  1058. static ssize_t ep92_sysfs_wta_power(struct device *dev,
  1059. struct device_attribute *attr, const char *buf, size_t count)
  1060. {
  1061. int reg, val, rc;
  1062. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1063. if (!ep92 || !ep92->component) {
  1064. dev_err(dev, "%s: device error\n", __func__);
  1065. return -ENODEV;
  1066. }
  1067. rc = kstrtoint(buf, 10, &val);
  1068. if (rc) {
  1069. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  1070. goto end;
  1071. }
  1072. if ((val < 0) || (val > 1)) {
  1073. dev_err(dev, "%s: value out of range.\n", __func__);
  1074. rc = -EINVAL;
  1075. goto end;
  1076. }
  1077. reg = snd_soc_component_read32(ep92->component, EP92_GENERAL_CONTROL_0);
  1078. reg &= ~EP92_GC_POWER_MASK;
  1079. reg |= (val << EP92_GC_POWER_SHIFT) & EP92_GC_POWER_MASK;
  1080. snd_soc_component_write(ep92->component, EP92_GENERAL_CONTROL_0, reg);
  1081. ep92->gc.ctl &= ~EP92_GC_POWER_MASK;
  1082. ep92->gc.ctl |= (val << EP92_GC_POWER_SHIFT) & EP92_GC_POWER_MASK;
  1083. if (val == 1) {
  1084. ep92->poll_trig = 1;
  1085. mod_timer(&ep92->timer, jiffies +
  1086. msecs_to_jiffies(EP92_POLL_INTERVAL_ON_MSEC));
  1087. }
  1088. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  1089. end:
  1090. return rc;
  1091. }
  1092. static ssize_t ep92_sysfs_rda_audio_path(struct device *dev,
  1093. struct device_attribute *attr, char *buf)
  1094. {
  1095. ssize_t ret;
  1096. int val;
  1097. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1098. if (!ep92 || !ep92->component) {
  1099. dev_err(dev, "%s: device error\n", __func__);
  1100. return -ENODEV;
  1101. }
  1102. val = (ep92->gc.ctl >> EP92_GC_AUDIO_PATH_SHIFT) & EP92_2CHOICE_MASK;
  1103. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  1104. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  1105. return ret;
  1106. }
  1107. static ssize_t ep92_sysfs_wta_audio_path(struct device *dev,
  1108. struct device_attribute *attr, const char *buf, size_t count)
  1109. {
  1110. int reg, val, rc;
  1111. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1112. if (!ep92 || !ep92->component) {
  1113. dev_err(dev, "%s: device error\n", __func__);
  1114. return -ENODEV;
  1115. }
  1116. rc = kstrtoint(buf, 10, &val);
  1117. if (rc) {
  1118. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  1119. goto end;
  1120. }
  1121. if ((val < 0) || (val > 1)) {
  1122. dev_err(dev, "%s: value out of range.\n", __func__);
  1123. rc = -EINVAL;
  1124. goto end;
  1125. }
  1126. reg = snd_soc_component_read32(ep92->component,
  1127. EP92_GENERAL_CONTROL_0);
  1128. reg &= ~EP92_GC_AUDIO_PATH_MASK;
  1129. reg |= (val << EP92_GC_AUDIO_PATH_SHIFT) & EP92_GC_AUDIO_PATH_MASK;
  1130. snd_soc_component_write(ep92->component, EP92_GENERAL_CONTROL_0, reg);
  1131. ep92->gc.ctl &= ~EP92_GC_AUDIO_PATH_MASK;
  1132. ep92->gc.ctl |= (val << EP92_GC_AUDIO_PATH_SHIFT) &
  1133. EP92_GC_AUDIO_PATH_MASK;
  1134. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  1135. end:
  1136. return rc;
  1137. }
  1138. static ssize_t ep92_sysfs_rda_src_sel(struct device *dev,
  1139. struct device_attribute *attr, char *buf)
  1140. {
  1141. ssize_t ret;
  1142. int val;
  1143. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1144. if (!ep92 || !ep92->component) {
  1145. dev_err(dev, "%s: device error\n", __func__);
  1146. return -ENODEV;
  1147. }
  1148. val = ep92->gc.rx_sel & EP92_GC_RX_SEL_MASK;
  1149. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  1150. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  1151. return ret;
  1152. }
  1153. static ssize_t ep92_sysfs_wta_src_sel(struct device *dev,
  1154. struct device_attribute *attr, const char *buf, size_t count)
  1155. {
  1156. int reg, val, rc;
  1157. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1158. if (!ep92 || !ep92->component) {
  1159. dev_err(dev, "%s: device error\n", __func__);
  1160. return -ENODEV;
  1161. }
  1162. rc = kstrtoint(buf, 10, &val);
  1163. if (rc) {
  1164. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  1165. goto end;
  1166. }
  1167. if ((val < 0) || (val > 7)) {
  1168. dev_err(dev, "%s: value out of range.\n", __func__);
  1169. rc = -EINVAL;
  1170. goto end;
  1171. }
  1172. reg = snd_soc_component_read32(ep92->component,
  1173. EP92_GENERAL_CONTROL_1);
  1174. reg &= ~EP92_GC_RX_SEL_MASK;
  1175. reg |= (val << EP92_GC_RX_SEL_SHIFT) & EP92_GC_RX_SEL_MASK;
  1176. snd_soc_component_write(ep92->component, EP92_GENERAL_CONTROL_1, reg);
  1177. ep92->gc.rx_sel &= ~EP92_GC_RX_SEL_MASK;
  1178. ep92->gc.rx_sel |= (val << EP92_GC_RX_SEL_SHIFT) & EP92_GC_RX_SEL_MASK;
  1179. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  1180. end:
  1181. return rc;
  1182. }
  1183. static ssize_t ep92_sysfs_rda_arc_enable(struct device *dev,
  1184. struct device_attribute *attr, char *buf)
  1185. {
  1186. ssize_t ret;
  1187. int val;
  1188. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1189. if (!ep92 || !ep92->component) {
  1190. dev_err(dev, "%s: device error\n", __func__);
  1191. return -ENODEV;
  1192. }
  1193. val = (ep92->gc.ctl >> EP92_GC_ARC_EN_SHIFT) & EP92_2CHOICE_MASK;
  1194. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  1195. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  1196. return ret;
  1197. }
  1198. static ssize_t ep92_sysfs_wta_arc_enable(struct device *dev,
  1199. struct device_attribute *attr, const char *buf, size_t count)
  1200. {
  1201. int reg, val, rc;
  1202. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1203. if (!ep92 || !ep92->component) {
  1204. dev_err(dev, "%s: device error\n", __func__);
  1205. return -ENODEV;
  1206. }
  1207. rc = kstrtoint(buf, 10, &val);
  1208. if (rc) {
  1209. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  1210. goto end;
  1211. }
  1212. if ((val < 0) || (val > 1)) {
  1213. dev_err(dev, "%s: value out of range.\n", __func__);
  1214. rc = -EINVAL;
  1215. goto end;
  1216. }
  1217. reg = snd_soc_component_read32(ep92->component, EP92_GENERAL_CONTROL_0);
  1218. reg &= ~EP92_GC_ARC_EN_MASK;
  1219. reg |= (val << EP92_GC_ARC_EN_SHIFT) & EP92_GC_ARC_EN_MASK;
  1220. snd_soc_component_write(ep92->component, EP92_GENERAL_CONTROL_0, reg);
  1221. ep92->gc.ctl &= ~EP92_GC_ARC_EN_MASK;
  1222. ep92->gc.ctl |= (val << EP92_GC_ARC_EN_SHIFT) &
  1223. EP92_GC_ARC_EN_MASK;
  1224. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  1225. end:
  1226. return rc;
  1227. }
  1228. static ssize_t ep92_sysfs_rda_cec_mute(struct device *dev,
  1229. struct device_attribute *attr, char *buf)
  1230. {
  1231. ssize_t ret;
  1232. int val;
  1233. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1234. if (!ep92 || !ep92->component) {
  1235. dev_err(dev, "%s: device error\n", __func__);
  1236. return -ENODEV;
  1237. }
  1238. val = (ep92->gc.ctl >> EP92_GC_CEC_MUTE_SHIFT) & EP92_2CHOICE_MASK;
  1239. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  1240. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  1241. return ret;
  1242. }
  1243. static ssize_t ep92_sysfs_wta_cec_mute(struct device *dev,
  1244. struct device_attribute *attr, const char *buf, size_t count)
  1245. {
  1246. int reg, val, rc;
  1247. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1248. if (!ep92 || !ep92->component) {
  1249. dev_err(dev, "%s: device error\n", __func__);
  1250. return -ENODEV;
  1251. }
  1252. rc = kstrtoint(buf, 10, &val);
  1253. if (rc) {
  1254. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  1255. goto end;
  1256. }
  1257. if ((val < 0) || (val > 1)) {
  1258. dev_err(dev, "%s: value out of range.\n", __func__);
  1259. rc = -EINVAL;
  1260. goto end;
  1261. }
  1262. reg = snd_soc_component_read32(ep92->component, EP92_GENERAL_CONTROL_0);
  1263. reg &= ~EP92_GC_CEC_MUTE_MASK;
  1264. reg |= (val << EP92_GC_CEC_MUTE_SHIFT) & EP92_GC_CEC_MUTE_MASK;
  1265. snd_soc_component_write(ep92->component, EP92_GENERAL_CONTROL_0, reg);
  1266. ep92->gc.ctl &= ~EP92_GC_CEC_MUTE_MASK;
  1267. ep92->gc.ctl |= (val << EP92_GC_CEC_MUTE_SHIFT) &
  1268. EP92_GC_CEC_MUTE_MASK;
  1269. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  1270. end:
  1271. return rc;
  1272. }
  1273. static ssize_t ep92_sysfs_rda_cec_volume(struct device *dev,
  1274. struct device_attribute *attr, char *buf)
  1275. {
  1276. ssize_t ret;
  1277. int val;
  1278. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1279. if (!ep92 || !ep92->component) {
  1280. dev_err(dev, "%s: device error\n", __func__);
  1281. return -ENODEV;
  1282. }
  1283. val = (ep92->gc.cec_volume >> EP92_GC_CEC_VOLUME_SHIFT) &
  1284. EP92_GC_CEC_VOLUME_MASK;
  1285. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  1286. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  1287. return ret;
  1288. }
  1289. static ssize_t ep92_sysfs_wta_cec_volume(struct device *dev,
  1290. struct device_attribute *attr, const char *buf, size_t count)
  1291. {
  1292. int reg, val, rc;
  1293. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1294. if (!ep92 || !ep92->component) {
  1295. dev_err(dev, "%s: device error\n", __func__);
  1296. return -ENODEV;
  1297. }
  1298. rc = kstrtoint(buf, 10, &val);
  1299. if (rc) {
  1300. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  1301. goto end;
  1302. }
  1303. if ((val < 0) || (val > EP92_GC_CEC_VOLUME_MAX)) {
  1304. dev_err(dev, "%s: value out of range.\n", __func__);
  1305. rc = -EINVAL;
  1306. goto end;
  1307. }
  1308. reg = val & EP92_GC_CEC_VOLUME_MASK;
  1309. snd_soc_component_write(ep92->component, EP92_GENERAL_CONTROL_3, reg);
  1310. ep92->gc.cec_volume = val & EP92_GC_CEC_VOLUME_MASK;
  1311. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  1312. end:
  1313. return rc;
  1314. }
  1315. static ssize_t ep92_sysfs_rda_runout(struct device *dev,
  1316. struct device_attribute *attr, char *buf)
  1317. {
  1318. ssize_t ret;
  1319. int val;
  1320. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1321. if (!ep92 || !ep92->component) {
  1322. dev_err(dev, "%s: device error\n", __func__);
  1323. return -ENODEV;
  1324. }
  1325. val = ep92->poll_rem;
  1326. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  1327. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  1328. return ret;
  1329. }
  1330. static ssize_t ep92_sysfs_rda_force_inactive(struct device *dev,
  1331. struct device_attribute *attr, char *buf)
  1332. {
  1333. ssize_t ret;
  1334. int val;
  1335. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1336. if (!ep92 || !ep92->component) {
  1337. dev_err(dev, "%s: device error\n", __func__);
  1338. return -ENODEV;
  1339. }
  1340. val = ep92->force_inactive;
  1341. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  1342. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  1343. return ret;
  1344. }
  1345. static ssize_t ep92_sysfs_wta_force_inactive(struct device *dev,
  1346. struct device_attribute *attr, const char *buf, size_t count)
  1347. {
  1348. int val, rc;
  1349. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1350. if (!ep92 || !ep92->component) {
  1351. dev_err(dev, "%s: device error\n", __func__);
  1352. return -ENODEV;
  1353. }
  1354. rc = kstrtoint(buf, 10, &val);
  1355. if (rc) {
  1356. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  1357. goto end;
  1358. }
  1359. if ((val < 0) || (val > 1)) {
  1360. dev_err(dev, "%s: value out of range.\n", __func__);
  1361. rc = -EINVAL;
  1362. goto end;
  1363. }
  1364. if (val == 0) {
  1365. ep92->force_inactive = 0;
  1366. ep92->poll_trig = 1;
  1367. mod_timer(&ep92->timer, jiffies +
  1368. msecs_to_jiffies(EP92_POLL_INTERVAL_ON_MSEC));
  1369. } else {
  1370. ep92->force_inactive = 1;
  1371. ep92->poll_rem = 0;
  1372. }
  1373. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  1374. end:
  1375. return rc;
  1376. }
  1377. static DEVICE_ATTR(chipid, 0444, ep92_sysfs_rda_chipid, NULL);
  1378. static DEVICE_ATTR(version, 0444, ep92_sysfs_rda_version, NULL);
  1379. static DEVICE_ATTR(audio_state, 0444, ep92_sysfs_rda_audio_state, NULL);
  1380. static DEVICE_ATTR(audio_format, 0444, ep92_sysfs_rda_audio_format, NULL);
  1381. static DEVICE_ATTR(audio_rate, 0444, ep92_sysfs_rda_audio_rate, NULL);
  1382. static DEVICE_ATTR(audio_layout, 0444, ep92_sysfs_rda_audio_layout, NULL);
  1383. static DEVICE_ATTR(audio_ch_count, 0444, ep92_sysfs_rda_audio_ch_count, NULL);
  1384. static DEVICE_ATTR(audio_ch_alloc, 0444, ep92_sysfs_rda_audio_ch_alloc, NULL);
  1385. static DEVICE_ATTR(audio_preemph, 0444, ep92_sysfs_rda_audio_preemph, NULL);
  1386. static DEVICE_ATTR(audio_avmute, 0444, ep92_sysfs_rda_avmute, NULL);
  1387. static DEVICE_ATTR(link_on0, 0444, ep92_sysfs_rda_link_on0, NULL);
  1388. static DEVICE_ATTR(link_on1, 0444, ep92_sysfs_rda_link_on1, NULL);
  1389. static DEVICE_ATTR(link_on2, 0444, ep92_sysfs_rda_link_on2, NULL);
  1390. static DEVICE_ATTR(out_plug, 0444, ep92_sysfs_rda_out_plug, NULL);
  1391. static DEVICE_ATTR(video_latency, 0444, ep92_sysfs_rda_video_latency, NULL);
  1392. static DEVICE_ATTR(arc_disable, 0644, ep92_sysfs_rda_arc_disable,
  1393. ep92_sysfs_wta_arc_disable);
  1394. static DEVICE_ATTR(power_on, 0644, ep92_sysfs_rda_power, ep92_sysfs_wta_power);
  1395. static DEVICE_ATTR(audio_path, 0644, ep92_sysfs_rda_audio_path,
  1396. ep92_sysfs_wta_audio_path);
  1397. static DEVICE_ATTR(src_sel, 0644, ep92_sysfs_rda_src_sel,
  1398. ep92_sysfs_wta_src_sel);
  1399. static DEVICE_ATTR(arc_enable, 0644, ep92_sysfs_rda_arc_enable,
  1400. ep92_sysfs_wta_arc_enable);
  1401. static DEVICE_ATTR(cec_mute, 0644, ep92_sysfs_rda_cec_mute,
  1402. ep92_sysfs_wta_cec_mute);
  1403. static DEVICE_ATTR(cec_volume, 0644, ep92_sysfs_rda_cec_volume,
  1404. ep92_sysfs_wta_cec_volume);
  1405. static DEVICE_ATTR(runout, 0444, ep92_sysfs_rda_runout, NULL);
  1406. static DEVICE_ATTR(force_inactive, 0644, ep92_sysfs_rda_force_inactive,
  1407. ep92_sysfs_wta_force_inactive);
  1408. static DEVICE_ATTR(dsd_rate, 0444, ep92_sysfs_rda_dsd_rate, NULL);
  1409. static struct attribute *ep92_fs_attrs[] = {
  1410. &dev_attr_chipid.attr,
  1411. &dev_attr_version.attr,
  1412. &dev_attr_audio_state.attr,
  1413. &dev_attr_audio_format.attr,
  1414. &dev_attr_audio_rate.attr,
  1415. &dev_attr_audio_layout.attr,
  1416. &dev_attr_audio_ch_count.attr,
  1417. &dev_attr_audio_ch_alloc.attr,
  1418. &dev_attr_audio_preemph.attr,
  1419. &dev_attr_audio_avmute.attr,
  1420. &dev_attr_link_on0.attr,
  1421. &dev_attr_link_on1.attr,
  1422. &dev_attr_link_on2.attr,
  1423. &dev_attr_out_plug.attr,
  1424. &dev_attr_video_latency.attr,
  1425. &dev_attr_arc_disable.attr,
  1426. &dev_attr_power_on.attr,
  1427. &dev_attr_audio_path.attr,
  1428. &dev_attr_src_sel.attr,
  1429. &dev_attr_arc_enable.attr,
  1430. &dev_attr_cec_mute.attr,
  1431. &dev_attr_cec_volume.attr,
  1432. &dev_attr_runout.attr,
  1433. &dev_attr_force_inactive.attr,
  1434. &dev_attr_dsd_rate.attr,
  1435. NULL,
  1436. };
  1437. static struct attribute_group ep92_fs_attrs_group = {
  1438. .attrs = ep92_fs_attrs,
  1439. };
  1440. static int ep92_sysfs_create(struct i2c_client *client,
  1441. struct ep92_pdata *ep92)
  1442. {
  1443. int rc;
  1444. rc = sysfs_create_group(&client->dev.kobj, &ep92_fs_attrs_group);
  1445. return rc;
  1446. }
  1447. static void ep92_sysfs_remove(struct i2c_client *client,
  1448. struct ep92_pdata *ep92)
  1449. {
  1450. sysfs_remove_group(&client->dev.kobj, &ep92_fs_attrs_group);
  1451. }
  1452. static int ep92_i2c_probe(struct i2c_client *client,
  1453. const struct i2c_device_id *id)
  1454. {
  1455. struct ep92_pdata *ep92;
  1456. int ret;
  1457. #if IS_ENABLED(CONFIG_DEBUG_FS)
  1458. char debugfs_dir_name[32];
  1459. #endif
  1460. ep92 = devm_kzalloc(&client->dev, sizeof(struct ep92_pdata),
  1461. GFP_KERNEL);
  1462. if (ep92 == NULL)
  1463. return -ENOMEM;
  1464. ep92->regmap = devm_regmap_init_i2c(client, &ep92_regmap_config);
  1465. if (IS_ERR(ep92->regmap)) {
  1466. ret = PTR_ERR(ep92->regmap);
  1467. dev_err(&client->dev,
  1468. "%s: Failed to allocate regmap for I2C device: %d\n",
  1469. __func__, ret);
  1470. return ret;
  1471. }
  1472. i2c_set_clientdata(client, ep92);
  1473. /* register interrupt handler */
  1474. INIT_WORK(&ep92->read_status_worker, ep92_read_status);
  1475. ep92->irq = client->irq;
  1476. if (ep92->irq) {
  1477. ret = devm_request_threaded_irq(&client->dev, ep92->irq,
  1478. NULL, ep92_irq, IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
  1479. "ep92_irq", ep92);
  1480. if (ret) {
  1481. dev_err(&client->dev,
  1482. "%s: Failed to request IRQ %d: %d\n",
  1483. __func__, ep92->irq, ret);
  1484. ep92->irq = 0;
  1485. }
  1486. }
  1487. /* prepare timer */
  1488. timer_setup(&ep92->timer, ep92_poll_status, 0);
  1489. ep92->poll_rem = EP92_POLL_RUNOUT_MSEC;
  1490. #if IS_ENABLED(CONFIG_DEBUG_FS)
  1491. /* debugfs interface */
  1492. snprintf(debugfs_dir_name, sizeof(debugfs_dir_name), "%s-%s",
  1493. client->name, dev_name(&client->dev));
  1494. ep92->debugfs_dir = debugfs_create_dir(debugfs_dir_name, NULL);
  1495. if (!ep92->debugfs_dir) {
  1496. dev_dbg(&client->dev,
  1497. "%s: Failed to create /sys/kernel/debug/%s for debugfs\n",
  1498. __func__, debugfs_dir_name);
  1499. return -ENOMEM;
  1500. }
  1501. ep92->debugfs_file_wo = debugfs_create_file(
  1502. "write_reg_val", S_IFREG | 0444, ep92->debugfs_dir,
  1503. (void *) ep92,
  1504. &debugfs_codec_ops);
  1505. if (!ep92->debugfs_file_wo) {
  1506. dev_dbg(&client->dev,
  1507. "%s: Failed to create /sys/kernel/debug/%s/write_reg_val\n",
  1508. __func__, debugfs_dir_name);
  1509. return -ENOMEM;
  1510. }
  1511. ep92->debugfs_file_ro = debugfs_create_file(
  1512. "show_reg_dump", S_IFREG | 0444, ep92->debugfs_dir,
  1513. (void *) ep92,
  1514. &debugfs_codec_ops);
  1515. if (!ep92->debugfs_file_ro) {
  1516. dev_dbg(&client->dev,
  1517. "%s: Failed to create /sys/kernel/debug/%s/show_reg_dump\n",
  1518. __func__, debugfs_dir_name);
  1519. return -ENOMEM;
  1520. }
  1521. #endif /* CONFIG_DEBUG_FS */
  1522. /* register component */
  1523. ret = snd_soc_register_component(&client->dev, &soc_codec_drv_ep92,
  1524. ep92_dai, ARRAY_SIZE(ep92_dai));
  1525. if (ret) {
  1526. dev_err(&client->dev, "%s %d: Failed to register CODEC: %d\n",
  1527. __func__, __LINE__, ret);
  1528. goto err_reg;
  1529. }
  1530. ret = ep92_sysfs_create(client, ep92);
  1531. if (ret) {
  1532. dev_err(&client->dev, "%s: sysfs creation failed ret=%d\n",
  1533. __func__, ret);
  1534. goto err_sysfs;
  1535. }
  1536. return 0;
  1537. err_sysfs:
  1538. snd_soc_unregister_component(&client->dev);
  1539. err_reg:
  1540. del_timer(&ep92->timer);
  1541. return ret;
  1542. }
  1543. static int ep92_i2c_remove(struct i2c_client *client)
  1544. {
  1545. struct ep92_pdata *ep92;
  1546. ep92 = i2c_get_clientdata(client);
  1547. if (ep92) {
  1548. del_timer(&ep92->timer);
  1549. #if IS_ENABLED(CONFIG_DEBUG_FS)
  1550. debugfs_remove_recursive(ep92->debugfs_dir);
  1551. #endif
  1552. }
  1553. snd_soc_unregister_component(&client->dev);
  1554. ep92_sysfs_remove(client, ep92);
  1555. return 0;
  1556. }
  1557. static const struct i2c_device_id ep92_i2c_id[] = {
  1558. { "ep92-dev", 0},
  1559. { }
  1560. };
  1561. MODULE_DEVICE_TABLE(i2c, ep92_i2c_id);
  1562. static struct i2c_driver ep92_i2c_driver = {
  1563. .probe = ep92_i2c_probe,
  1564. .remove = ep92_i2c_remove,
  1565. .id_table = ep92_i2c_id,
  1566. .driver = {
  1567. .name = "ep92",
  1568. .owner = THIS_MODULE,
  1569. .of_match_table = ep92_of_match
  1570. },
  1571. };
  1572. static int __init ep92_codec_init(void)
  1573. {
  1574. int ret = 0;
  1575. ret = i2c_add_driver(&ep92_i2c_driver);
  1576. if (ret)
  1577. pr_err("Failed to register EP92 I2C driver: %d\n", ret);
  1578. return ret;
  1579. }
  1580. module_init(ep92_codec_init);
  1581. static void __exit ep92_codec_exit(void)
  1582. {
  1583. i2c_del_driver(&ep92_i2c_driver);
  1584. }
  1585. module_exit(ep92_codec_exit);
  1586. MODULE_DESCRIPTION("EP92 HDMI repeater/switch driver");
  1587. MODULE_LICENSE("GPL v2");