hif_main.c 29 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275
  1. /*
  2. * Copyright (c) 2015-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
  5. *
  6. *
  7. * Permission to use, copy, modify, and/or distribute this software for
  8. * any purpose with or without fee is hereby granted, provided that the
  9. * above copyright notice and this permission notice appear in all
  10. * copies.
  11. *
  12. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  13. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  14. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  15. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  16. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  17. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  18. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  19. * PERFORMANCE OF THIS SOFTWARE.
  20. */
  21. /*
  22. * This file was originally distributed by Qualcomm Atheros, Inc.
  23. * under proprietary terms before Copyright ownership was assigned
  24. * to the Linux Foundation.
  25. */
  26. #include "targcfg.h"
  27. #include "qdf_lock.h"
  28. #include "qdf_status.h"
  29. #include "qdf_status.h"
  30. #include <qdf_atomic.h> /* qdf_atomic_read */
  31. #include <targaddrs.h>
  32. #include "hif_io32.h"
  33. #include <hif.h>
  34. #include "regtable.h"
  35. #define ATH_MODULE_NAME hif
  36. #include <a_debug.h>
  37. #include "hif_main.h"
  38. #include "hif_hw_version.h"
  39. #if defined(HIF_PCI) || defined(HIF_SNOC) || defined(HIF_AHB)
  40. #include "ce_tasklet.h"
  41. #endif
  42. #include "qdf_trace.h"
  43. #include "qdf_status.h"
  44. #include "hif_debug.h"
  45. #include "mp_dev.h"
  46. #include "ce_api.h"
  47. #ifdef QCA_WIFI_QCA8074
  48. #include "hal_api.h"
  49. #endif
  50. #include "hif_napi.h"
  51. void hif_dump(struct hif_opaque_softc *hif_ctx, uint8_t cmd_id, bool start)
  52. {
  53. hif_trigger_dump(hif_ctx, cmd_id, start);
  54. }
  55. /**
  56. * hif_get_target_id(): hif_get_target_id
  57. *
  58. * Return the virtual memory base address to the caller
  59. *
  60. * @scn: hif_softc
  61. *
  62. * Return: A_target_id_t
  63. */
  64. A_target_id_t hif_get_target_id(struct hif_softc *scn)
  65. {
  66. return scn->mem;
  67. }
  68. /**
  69. * hif_get_targetdef(): hif_get_targetdef
  70. * @scn: scn
  71. *
  72. * Return: void *
  73. */
  74. void *hif_get_targetdef(struct hif_opaque_softc *hif_ctx)
  75. {
  76. struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
  77. return scn->targetdef;
  78. }
  79. /**
  80. * hif_vote_link_down(): unvote for link up
  81. *
  82. * Call hif_vote_link_down to release a previous request made using
  83. * hif_vote_link_up. A hif_vote_link_down call should only be made
  84. * after a corresponding hif_vote_link_up, otherwise you could be
  85. * negating a vote from another source. When no votes are present
  86. * hif will not guarantee the linkstate after hif_bus_suspend.
  87. *
  88. * SYNCHRONIZE WITH hif_vote_link_up by only calling in MC thread
  89. * and initialization deinitialization sequencences.
  90. *
  91. * Return: n/a
  92. */
  93. void hif_vote_link_down(struct hif_opaque_softc *hif_ctx)
  94. {
  95. struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
  96. QDF_BUG(scn);
  97. scn->linkstate_vote--;
  98. if (scn->linkstate_vote == 0)
  99. hif_bus_prevent_linkdown(scn, false);
  100. }
  101. /**
  102. * hif_vote_link_up(): vote to prevent bus from suspending
  103. *
  104. * Makes hif guarantee that fw can message the host normally
  105. * durring suspend.
  106. *
  107. * SYNCHRONIZE WITH hif_vote_link_up by only calling in MC thread
  108. * and initialization deinitialization sequencences.
  109. *
  110. * Return: n/a
  111. */
  112. void hif_vote_link_up(struct hif_opaque_softc *hif_ctx)
  113. {
  114. struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
  115. QDF_BUG(scn);
  116. scn->linkstate_vote++;
  117. if (scn->linkstate_vote == 1)
  118. hif_bus_prevent_linkdown(scn, true);
  119. }
  120. /**
  121. * hif_can_suspend_link(): query if hif is permitted to suspend the link
  122. *
  123. * Hif will ensure that the link won't be suspended if the upperlayers
  124. * don't want it to.
  125. *
  126. * SYNCHRONIZATION: MC thread is stopped before bus suspend thus
  127. * we don't need extra locking to ensure votes dont change while
  128. * we are in the process of suspending or resuming.
  129. *
  130. * Return: false if hif will guarantee link up durring suspend.
  131. */
  132. bool hif_can_suspend_link(struct hif_opaque_softc *hif_ctx)
  133. {
  134. struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
  135. QDF_BUG(scn);
  136. return scn->linkstate_vote == 0;
  137. }
  138. #ifndef CONFIG_WIN
  139. #define QCA9984_HOST_INTEREST_ADDRESS -1
  140. #define QCA9888_HOST_INTEREST_ADDRESS -1
  141. #define IPQ4019_HOST_INTEREST_ADDRESS -1
  142. #endif
  143. /**
  144. * hif_hia_item_address(): hif_hia_item_address
  145. * @target_type: target_type
  146. * @item_offset: item_offset
  147. *
  148. * Return: n/a
  149. */
  150. uint32_t hif_hia_item_address(uint32_t target_type, uint32_t item_offset)
  151. {
  152. switch (target_type) {
  153. case TARGET_TYPE_AR6002:
  154. return AR6002_HOST_INTEREST_ADDRESS + item_offset;
  155. case TARGET_TYPE_AR6003:
  156. return AR6003_HOST_INTEREST_ADDRESS + item_offset;
  157. case TARGET_TYPE_AR6004:
  158. return AR6004_HOST_INTEREST_ADDRESS + item_offset;
  159. case TARGET_TYPE_AR6006:
  160. return AR6006_HOST_INTEREST_ADDRESS + item_offset;
  161. case TARGET_TYPE_AR9888:
  162. return AR9888_HOST_INTEREST_ADDRESS + item_offset;
  163. case TARGET_TYPE_AR6320:
  164. case TARGET_TYPE_AR6320V2:
  165. return AR6320_HOST_INTEREST_ADDRESS + item_offset;
  166. case TARGET_TYPE_ADRASTEA:
  167. /* ADRASTEA doesn't have a host interest address */
  168. ASSERT(0);
  169. return 0;
  170. case TARGET_TYPE_AR900B:
  171. return AR900B_HOST_INTEREST_ADDRESS + item_offset;
  172. case TARGET_TYPE_QCA9984:
  173. return QCA9984_HOST_INTEREST_ADDRESS + item_offset;
  174. case TARGET_TYPE_QCA9888:
  175. return QCA9888_HOST_INTEREST_ADDRESS + item_offset;
  176. case TARGET_TYPE_IPQ4019:
  177. return IPQ4019_HOST_INTEREST_ADDRESS + item_offset;
  178. default:
  179. ASSERT(0);
  180. return 0;
  181. }
  182. }
  183. /**
  184. * hif_max_num_receives_reached() - check max receive is reached
  185. * @scn: HIF Context
  186. * @count: unsigned int.
  187. *
  188. * Output check status as bool
  189. *
  190. * Return: bool
  191. */
  192. bool hif_max_num_receives_reached(struct hif_softc *scn, unsigned int count)
  193. {
  194. if (QDF_IS_EPPING_ENABLED(hif_get_conparam(scn)))
  195. return count > 120;
  196. else
  197. return count > MAX_NUM_OF_RECEIVES;
  198. }
  199. /**
  200. * init_buffer_count() - initial buffer count
  201. * @maxSize: qdf_size_t
  202. *
  203. * routine to modify the initial buffer count to be allocated on an os
  204. * platform basis. Platform owner will need to modify this as needed
  205. *
  206. * Return: qdf_size_t
  207. */
  208. qdf_size_t init_buffer_count(qdf_size_t maxSize)
  209. {
  210. return maxSize;
  211. }
  212. /**
  213. * hif_save_htc_htt_config_endpoint() - save htt_tx_endpoint
  214. * @hif_ctx: hif context
  215. * @htc_htt_tx_endpoint: htt_tx_endpoint
  216. *
  217. * Return: void
  218. */
  219. void hif_save_htc_htt_config_endpoint(struct hif_opaque_softc *hif_ctx,
  220. int htc_htt_tx_endpoint)
  221. {
  222. struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
  223. if (!scn) {
  224. HIF_ERROR("%s: error: scn or scn->hif_sc is NULL!",
  225. __func__);
  226. return;
  227. }
  228. scn->htc_htt_tx_endpoint = htc_htt_tx_endpoint;
  229. }
  230. static const struct qwlan_hw qwlan_hw_list[] = {
  231. {
  232. .id = AR6320_REV1_VERSION,
  233. .subid = 0,
  234. .name = "QCA6174_REV1",
  235. },
  236. {
  237. .id = AR6320_REV1_1_VERSION,
  238. .subid = 0x1,
  239. .name = "QCA6174_REV1_1",
  240. },
  241. {
  242. .id = AR6320_REV1_3_VERSION,
  243. .subid = 0x2,
  244. .name = "QCA6174_REV1_3",
  245. },
  246. {
  247. .id = AR6320_REV2_1_VERSION,
  248. .subid = 0x4,
  249. .name = "QCA6174_REV2_1",
  250. },
  251. {
  252. .id = AR6320_REV2_1_VERSION,
  253. .subid = 0x5,
  254. .name = "QCA6174_REV2_2",
  255. },
  256. {
  257. .id = AR6320_REV3_VERSION,
  258. .subid = 0x6,
  259. .name = "QCA6174_REV2.3",
  260. },
  261. {
  262. .id = AR6320_REV3_VERSION,
  263. .subid = 0x8,
  264. .name = "QCA6174_REV3",
  265. },
  266. {
  267. .id = AR6320_REV3_VERSION,
  268. .subid = 0x9,
  269. .name = "QCA6174_REV3_1",
  270. },
  271. {
  272. .id = AR6320_REV3_2_VERSION,
  273. .subid = 0xA,
  274. .name = "AR6320_REV3_2_VERSION",
  275. },
  276. {
  277. .id = WCN3990_v1,
  278. .subid = 0x0,
  279. .name = "WCN3990_V1",
  280. },
  281. {
  282. .id = WCN3990_v2,
  283. .subid = 0x0,
  284. .name = "WCN3990_V2",
  285. },
  286. {
  287. .id = WCN3990_v2_1,
  288. .subid = 0x0,
  289. .name = "WCN3990_V2.1",
  290. },
  291. {
  292. .id = QCA9379_REV1_VERSION,
  293. .subid = 0xC,
  294. .name = "QCA9379_REV1",
  295. }
  296. };
  297. /**
  298. * hif_get_hw_name(): get a human readable name for the hardware
  299. * @info: Target Info
  300. *
  301. * Return: human readable name for the underlying wifi hardware.
  302. */
  303. static const char *hif_get_hw_name(struct hif_target_info *info)
  304. {
  305. int i;
  306. if (info->hw_name)
  307. return info->hw_name;
  308. for (i = 0; i < ARRAY_SIZE(qwlan_hw_list); i++) {
  309. if (info->target_version == qwlan_hw_list[i].id &&
  310. info->target_revision == qwlan_hw_list[i].subid) {
  311. return qwlan_hw_list[i].name;
  312. }
  313. }
  314. info->hw_name = qdf_mem_malloc(64);
  315. if (!info->hw_name)
  316. return "Unknown Device (nomem)";
  317. i = qdf_snprint(info->hw_name, 64, "HW_VERSION=%x.",
  318. info->target_version);
  319. if (i < 0)
  320. return "Unknown Device (snprintf failure)";
  321. else
  322. return info->hw_name;
  323. }
  324. /**
  325. * hif_get_hw_info(): hif_get_hw_info
  326. * @scn: scn
  327. * @version: version
  328. * @revision: revision
  329. *
  330. * Return: n/a
  331. */
  332. void hif_get_hw_info(struct hif_opaque_softc *scn, u32 *version, u32 *revision,
  333. const char **target_name)
  334. {
  335. struct hif_target_info *info = hif_get_target_info_handle(scn);
  336. struct hif_softc *sc = HIF_GET_SOFTC(scn);
  337. if (sc->bus_type == QDF_BUS_TYPE_USB)
  338. hif_usb_get_hw_info(sc);
  339. *version = info->target_version;
  340. *revision = info->target_revision;
  341. *target_name = hif_get_hw_name(info);
  342. }
  343. /**
  344. * hif_get_dev_ba(): API to get device base address.
  345. * @scn: scn
  346. * @version: version
  347. * @revision: revision
  348. *
  349. * Return: n/a
  350. */
  351. void *hif_get_dev_ba(struct hif_opaque_softc *hif_handle)
  352. {
  353. struct hif_softc *scn = (struct hif_softc *)hif_handle;
  354. return scn->mem;
  355. }
  356. /**
  357. * hif_open(): hif_open
  358. * @qdf_ctx: QDF Context
  359. * @mode: Driver Mode
  360. * @bus_type: Bus Type
  361. * @cbk: CDS Callbacks
  362. *
  363. * API to open HIF Context
  364. *
  365. * Return: HIF Opaque Pointer
  366. */
  367. struct hif_opaque_softc *hif_open(qdf_device_t qdf_ctx, uint32_t mode,
  368. enum qdf_bus_type bus_type,
  369. struct hif_driver_state_callbacks *cbk)
  370. {
  371. struct hif_softc *scn;
  372. QDF_STATUS status = QDF_STATUS_SUCCESS;
  373. int bus_context_size = hif_bus_get_context_size(bus_type);
  374. if (bus_context_size == 0) {
  375. HIF_ERROR("%s: context size 0 not allowed", __func__);
  376. return NULL;
  377. }
  378. scn = (struct hif_softc *)qdf_mem_malloc(bus_context_size);
  379. if (!scn) {
  380. HIF_ERROR("%s: cannot alloc memory for HIF context of size:%d",
  381. __func__, bus_context_size);
  382. return GET_HIF_OPAQUE_HDL(scn);
  383. }
  384. scn->qdf_dev = qdf_ctx;
  385. scn->hif_con_param = mode;
  386. qdf_atomic_init(&scn->active_tasklet_cnt);
  387. qdf_atomic_init(&scn->active_grp_tasklet_cnt);
  388. qdf_atomic_init(&scn->link_suspended);
  389. qdf_atomic_init(&scn->tasklet_from_intr);
  390. qdf_mem_copy(&scn->callbacks, cbk, sizeof(struct hif_driver_state_callbacks));
  391. scn->bus_type = bus_type;
  392. status = hif_bus_open(scn, bus_type);
  393. if (status != QDF_STATUS_SUCCESS) {
  394. HIF_ERROR("%s: hif_bus_open error = %d, bus_type = %d",
  395. __func__, status, bus_type);
  396. qdf_mem_free(scn);
  397. scn = NULL;
  398. }
  399. return GET_HIF_OPAQUE_HDL(scn);
  400. }
  401. /**
  402. * hif_close(): hif_close
  403. * @hif_ctx: hif_ctx
  404. *
  405. * Return: n/a
  406. */
  407. void hif_close(struct hif_opaque_softc *hif_ctx)
  408. {
  409. struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
  410. if (scn == NULL) {
  411. HIF_ERROR("%s: hif_opaque_softc is NULL", __func__);
  412. return;
  413. }
  414. if (scn->athdiag_procfs_inited) {
  415. athdiag_procfs_remove();
  416. scn->athdiag_procfs_inited = false;
  417. }
  418. if (scn->target_info.hw_name) {
  419. char *hw_name = scn->target_info.hw_name;
  420. scn->target_info.hw_name = "ErrUnloading";
  421. qdf_mem_free(hw_name);
  422. }
  423. hif_bus_close(scn);
  424. qdf_mem_free(scn);
  425. }
  426. #ifdef QCA_WIFI_QCA8074
  427. static QDF_STATUS hif_hal_attach(struct hif_softc *scn)
  428. {
  429. if (ce_srng_based(scn)) {
  430. scn->hal_soc = hal_attach(scn, scn->qdf_dev);
  431. if (scn->hal_soc == NULL)
  432. return QDF_STATUS_E_FAILURE;
  433. }
  434. return QDF_STATUS_SUCCESS;
  435. }
  436. #else
  437. static QDF_STATUS hif_hal_attach(struct hif_softc *scn)
  438. {
  439. return QDF_STATUS_SUCCESS;
  440. }
  441. #endif
  442. /**
  443. * hif_enable(): hif_enable
  444. * @hif_ctx: hif_ctx
  445. * @dev: dev
  446. * @bdev: bus dev
  447. * @bid: bus ID
  448. * @bus_type: bus type
  449. * @type: enable type
  450. *
  451. * Return: QDF_STATUS
  452. */
  453. QDF_STATUS hif_enable(struct hif_opaque_softc *hif_ctx, struct device *dev,
  454. void *bdev, const hif_bus_id *bid,
  455. enum qdf_bus_type bus_type,
  456. enum hif_enable_type type)
  457. {
  458. QDF_STATUS status;
  459. struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
  460. if (scn == NULL) {
  461. HIF_ERROR("%s: hif_ctx = NULL", __func__);
  462. return QDF_STATUS_E_NULL_VALUE;
  463. }
  464. status = hif_enable_bus(scn, dev, bdev, bid, type);
  465. if (status != QDF_STATUS_SUCCESS) {
  466. HIF_ERROR("%s: hif_enable_bus error = %d",
  467. __func__, status);
  468. return status;
  469. }
  470. status = hif_hal_attach(scn);
  471. if (status != QDF_STATUS_SUCCESS) {
  472. HIF_ERROR("%s: hal attach failed", __func__);
  473. return status;
  474. }
  475. if (hif_bus_configure(scn)) {
  476. HIF_ERROR("%s: Target probe failed.", __func__);
  477. hif_disable_bus(scn);
  478. status = QDF_STATUS_E_FAILURE;
  479. return status;
  480. }
  481. /*
  482. * Flag to avoid potential unallocated memory access from MSI
  483. * interrupt handler which could get scheduled as soon as MSI
  484. * is enabled, i.e to take care of the race due to the order
  485. * in where MSI is enabled before the memory, that will be
  486. * in interrupt handlers, is allocated.
  487. */
  488. scn->hif_init_done = true;
  489. HIF_TRACE("%s: OK", __func__);
  490. return QDF_STATUS_SUCCESS;
  491. }
  492. void hif_disable(struct hif_opaque_softc *hif_ctx, enum hif_disable_type type)
  493. {
  494. struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
  495. if (!scn)
  496. return;
  497. hif_nointrs(scn);
  498. if (scn->hif_init_done == false)
  499. hif_shutdown_device(hif_ctx);
  500. else
  501. hif_stop(hif_ctx);
  502. hif_disable_bus(scn);
  503. hif_wlan_disable(scn);
  504. scn->notice_send = false;
  505. HIF_INFO("%s: X", __func__);
  506. }
  507. void hif_display_stats(struct hif_opaque_softc *hif_ctx)
  508. {
  509. hif_display_bus_stats(hif_ctx);
  510. }
  511. void hif_clear_stats(struct hif_opaque_softc *hif_ctx)
  512. {
  513. hif_clear_bus_stats(hif_ctx);
  514. }
  515. /**
  516. * hif_crash_shutdown_dump_bus_register() - dump bus registers
  517. * @hif_ctx: hif_ctx
  518. *
  519. * Return: n/a
  520. */
  521. #if defined(TARGET_RAMDUMP_AFTER_KERNEL_PANIC) \
  522. && defined(DEBUG)
  523. static void hif_crash_shutdown_dump_bus_register(void *hif_ctx)
  524. {
  525. struct hif_opaque_softc *scn = hif_ctx;
  526. if (hif_check_soc_status(scn))
  527. return;
  528. if (hif_dump_registers(scn))
  529. HIF_ERROR("Failed to dump bus registers!");
  530. }
  531. /**
  532. * hif_crash_shutdown(): hif_crash_shutdown
  533. *
  534. * This function is called by the platform driver to dump CE registers
  535. *
  536. * @hif_ctx: hif_ctx
  537. *
  538. * Return: n/a
  539. */
  540. void hif_crash_shutdown(struct hif_opaque_softc *hif_ctx)
  541. {
  542. struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
  543. if (!hif_ctx)
  544. return;
  545. if (scn->bus_type == QDF_BUS_TYPE_SNOC) {
  546. HIF_INFO_MED("%s: RAM dump disabled for bustype %d",
  547. __func__, scn->bus_type);
  548. return;
  549. }
  550. if (TARGET_STATUS_RESET == scn->target_status) {
  551. HIF_INFO_MED("%s: Target is already asserted, ignore!",
  552. __func__);
  553. return;
  554. }
  555. if (hif_is_load_or_unload_in_progress(scn)) {
  556. HIF_ERROR("%s: Load/unload is in progress, ignore!", __func__);
  557. return;
  558. }
  559. hif_crash_shutdown_dump_bus_register(hif_ctx);
  560. if (ol_copy_ramdump(hif_ctx))
  561. goto out;
  562. HIF_INFO_MED("%s: RAM dump collecting completed!", __func__);
  563. out:
  564. return;
  565. }
  566. #else
  567. void hif_crash_shutdown(struct hif_opaque_softc *hif_ctx)
  568. {
  569. HIF_INFO_MED("%s: Collecting target RAM dump disabled",
  570. __func__);
  571. return;
  572. }
  573. #endif /* TARGET_RAMDUMP_AFTER_KERNEL_PANIC */
  574. #ifdef QCA_WIFI_3_0
  575. /**
  576. * hif_check_fw_reg(): hif_check_fw_reg
  577. * @scn: scn
  578. * @state:
  579. *
  580. * Return: int
  581. */
  582. int hif_check_fw_reg(struct hif_opaque_softc *scn)
  583. {
  584. return 0;
  585. }
  586. #endif
  587. #ifdef IPA_OFFLOAD
  588. /**
  589. * hif_read_phy_mem_base(): hif_read_phy_mem_base
  590. * @scn: scn
  591. * @phy_mem_base: physical mem base
  592. *
  593. * Return: n/a
  594. */
  595. void hif_read_phy_mem_base(struct hif_softc *scn, qdf_dma_addr_t *phy_mem_base)
  596. {
  597. *phy_mem_base = scn->mem_pa;
  598. }
  599. #endif /* IPA_OFFLOAD */
  600. /**
  601. * hif_get_device_type(): hif_get_device_type
  602. * @device_id: device_id
  603. * @revision_id: revision_id
  604. * @hif_type: returned hif_type
  605. * @target_type: returned target_type
  606. *
  607. * Return: int
  608. */
  609. int hif_get_device_type(uint32_t device_id,
  610. uint32_t revision_id,
  611. uint32_t *hif_type, uint32_t *target_type)
  612. {
  613. int ret = 0;
  614. switch (device_id) {
  615. case ADRASTEA_DEVICE_ID_P2_E12:
  616. *hif_type = HIF_TYPE_ADRASTEA;
  617. *target_type = TARGET_TYPE_ADRASTEA;
  618. break;
  619. case AR9888_DEVICE_ID:
  620. *hif_type = HIF_TYPE_AR9888;
  621. *target_type = TARGET_TYPE_AR9888;
  622. break;
  623. case AR6320_DEVICE_ID:
  624. switch (revision_id) {
  625. case AR6320_FW_1_1:
  626. case AR6320_FW_1_3:
  627. *hif_type = HIF_TYPE_AR6320;
  628. *target_type = TARGET_TYPE_AR6320;
  629. break;
  630. case AR6320_FW_2_0:
  631. case AR6320_FW_3_0:
  632. case AR6320_FW_3_2:
  633. *hif_type = HIF_TYPE_AR6320V2;
  634. *target_type = TARGET_TYPE_AR6320V2;
  635. break;
  636. default:
  637. HIF_ERROR("%s: error - dev_id = 0x%x, rev_id = 0x%x",
  638. __func__, device_id, revision_id);
  639. ret = -ENODEV;
  640. goto end;
  641. }
  642. break;
  643. case AR9887_DEVICE_ID:
  644. *hif_type = HIF_TYPE_AR9888;
  645. *target_type = TARGET_TYPE_AR9888;
  646. HIF_INFO(" *********** AR9887 **************");
  647. break;
  648. case QCA9984_DEVICE_ID:
  649. *hif_type = HIF_TYPE_QCA9984;
  650. *target_type = TARGET_TYPE_QCA9984;
  651. HIF_INFO(" *********** QCA9984 *************");
  652. break;
  653. case QCA9888_DEVICE_ID:
  654. *hif_type = HIF_TYPE_QCA9888;
  655. *target_type = TARGET_TYPE_QCA9888;
  656. HIF_INFO(" *********** QCA9888 *************");
  657. break;
  658. case AR900B_DEVICE_ID:
  659. *hif_type = HIF_TYPE_AR900B;
  660. *target_type = TARGET_TYPE_AR900B;
  661. HIF_INFO(" *********** AR900B *************");
  662. break;
  663. case IPQ4019_DEVICE_ID:
  664. *hif_type = HIF_TYPE_IPQ4019;
  665. *target_type = TARGET_TYPE_IPQ4019;
  666. HIF_INFO(" *********** IPQ4019 *************");
  667. break;
  668. case QCA8074_DEVICE_ID:
  669. case RUMIM2M_DEVICE_ID_NODE0:
  670. case RUMIM2M_DEVICE_ID_NODE1:
  671. *hif_type = HIF_TYPE_QCA8074;
  672. *target_type = TARGET_TYPE_QCA8074;
  673. HIF_INFO(" *********** QCA8074 *************\n");
  674. break;
  675. case QCA6290_EMULATION_DEVICE_ID:
  676. *hif_type = HIF_TYPE_QCA6290;
  677. *target_type = TARGET_TYPE_QCA6290;
  678. HIF_INFO(" *********** QCA6290EMU *************\n");
  679. break;
  680. default:
  681. HIF_ERROR("%s: Unsupported device ID!", __func__);
  682. ret = -ENODEV;
  683. break;
  684. }
  685. end:
  686. return ret;
  687. }
  688. /**
  689. * hif_needs_bmi() - return true if the soc needs bmi through the driver
  690. * @hif_ctx: hif context
  691. *
  692. * Return: true if the soc needs driver bmi otherwise false
  693. */
  694. bool hif_needs_bmi(struct hif_opaque_softc *hif_ctx)
  695. {
  696. struct hif_softc *hif_sc = HIF_GET_SOFTC(hif_ctx);
  697. return (hif_sc->bus_type != QDF_BUS_TYPE_SNOC) &&
  698. !ce_srng_based(hif_sc);
  699. }
  700. /**
  701. * hif_get_bus_type() - return the bus type
  702. *
  703. * Return: enum qdf_bus_type
  704. */
  705. enum qdf_bus_type hif_get_bus_type(struct hif_opaque_softc *hif_hdl)
  706. {
  707. struct hif_softc *scn = HIF_GET_SOFTC(hif_hdl);
  708. return scn->bus_type;
  709. }
  710. /**
  711. * Target info and ini parameters are global to the driver
  712. * Hence these structures are exposed to all the modules in
  713. * the driver and they don't need to maintains multiple copies
  714. * of the same info, instead get the handle from hif and
  715. * modify them in hif
  716. */
  717. /**
  718. * hif_get_ini_handle() - API to get hif_config_param handle
  719. * @hif_ctx: HIF Context
  720. *
  721. * Return: pointer to hif_config_info
  722. */
  723. struct hif_config_info *hif_get_ini_handle(struct hif_opaque_softc *hif_ctx)
  724. {
  725. struct hif_softc *sc = HIF_GET_SOFTC(hif_ctx);
  726. return &sc->hif_config;
  727. }
  728. /**
  729. * hif_get_target_info_handle() - API to get hif_target_info handle
  730. * @hif_ctx: HIF context
  731. *
  732. * Return: Pointer to hif_target_info
  733. */
  734. struct hif_target_info *hif_get_target_info_handle(
  735. struct hif_opaque_softc *hif_ctx)
  736. {
  737. struct hif_softc *sc = HIF_GET_SOFTC(hif_ctx);
  738. return &sc->target_info;
  739. }
  740. #if defined(FEATURE_LRO)
  741. /**
  742. * hif_lro_flush_cb_register - API to register for LRO Flush Callback
  743. * @scn: HIF Context
  744. * @handler: Function pointer to be called by HIF
  745. * @data: Private data to be used by the module registering to HIF
  746. *
  747. * Return: void
  748. */
  749. void hif_lro_flush_cb_register(struct hif_opaque_softc *scn,
  750. void (lro_flush_handler)(void *),
  751. void *(lro_init_handler)(void))
  752. {
  753. if (hif_napi_enabled(scn, -1))
  754. hif_napi_lro_flush_cb_register(scn, lro_flush_handler,
  755. lro_init_handler);
  756. else
  757. ce_lro_flush_cb_register(scn, lro_flush_handler,
  758. lro_init_handler);
  759. }
  760. /**
  761. * hif_get_lro_info - Returns LRO instance for instance ID
  762. * @ctx_id: LRO instance ID
  763. * @hif_hdl: HIF Context
  764. *
  765. * Return: Pointer to LRO instance.
  766. */
  767. void *hif_get_lro_info(int ctx_id, struct hif_opaque_softc *hif_hdl)
  768. {
  769. void *data;
  770. if (hif_napi_enabled(hif_hdl, -1))
  771. data = hif_napi_get_lro_info(hif_hdl, ctx_id);
  772. else
  773. data = hif_ce_get_lro_ctx(hif_hdl, ctx_id);
  774. return data;
  775. }
  776. /**
  777. * hif_get_rx_ctx_id - Returns LRO instance ID based on underlying LRO instance
  778. * @ctx_id: LRO context ID
  779. * @hif_hdl: HIF Context
  780. *
  781. * Return: LRO instance ID
  782. */
  783. int hif_get_rx_ctx_id(int ctx_id, struct hif_opaque_softc *hif_hdl)
  784. {
  785. if (hif_napi_enabled(hif_hdl, -1))
  786. return NAPI_PIPE2ID(ctx_id);
  787. else
  788. return ctx_id;
  789. }
  790. /**
  791. * hif_lro_flush_cb_deregister - API to deregister for LRO Flush Callbacks
  792. * @hif_hdl: HIF Context
  793. * @lro_deinit_cb: LRO deinit callback
  794. *
  795. * Return: void
  796. */
  797. void hif_lro_flush_cb_deregister(struct hif_opaque_softc *hif_hdl,
  798. void (lro_deinit_cb)(void *))
  799. {
  800. if (hif_napi_enabled(hif_hdl, -1))
  801. hif_napi_lro_flush_cb_deregister(hif_hdl, lro_deinit_cb);
  802. else
  803. ce_lro_flush_cb_deregister(hif_hdl, lro_deinit_cb);
  804. }
  805. #else /* !defined(FEATURE_LRO) */
  806. int hif_get_rx_ctx_id(int ctx_id, struct hif_opaque_softc *hif_hdl)
  807. {
  808. return 0;
  809. }
  810. #endif
  811. /**
  812. * hif_get_target_status - API to get target status
  813. * @hif_ctx: HIF Context
  814. *
  815. * Return: enum hif_target_status
  816. */
  817. enum hif_target_status hif_get_target_status(struct hif_opaque_softc *hif_ctx)
  818. {
  819. struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
  820. return scn->target_status;
  821. }
  822. /**
  823. * hif_set_target_status() - API to set target status
  824. * @hif_ctx: HIF Context
  825. * @status: Target Status
  826. *
  827. * Return: void
  828. */
  829. void hif_set_target_status(struct hif_opaque_softc *hif_ctx, enum
  830. hif_target_status status)
  831. {
  832. struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
  833. scn->target_status = status;
  834. }
  835. /**
  836. * hif_init_ini_config() - API to initialize HIF configuration parameters
  837. * @hif_ctx: HIF Context
  838. * @cfg: HIF Configuration
  839. *
  840. * Return: void
  841. */
  842. void hif_init_ini_config(struct hif_opaque_softc *hif_ctx,
  843. struct hif_config_info *cfg)
  844. {
  845. struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
  846. qdf_mem_copy(&scn->hif_config, cfg, sizeof(struct hif_config_info));
  847. }
  848. /**
  849. * hif_get_conparam() - API to get driver mode in HIF
  850. * @scn: HIF Context
  851. *
  852. * Return: driver mode of operation
  853. */
  854. uint32_t hif_get_conparam(struct hif_softc *scn)
  855. {
  856. if (!scn)
  857. return 0;
  858. return scn->hif_con_param;
  859. }
  860. /**
  861. * hif_get_callbacks_handle() - API to get callbacks Handle
  862. * @scn: HIF Context
  863. *
  864. * Return: pointer to HIF Callbacks
  865. */
  866. struct hif_driver_state_callbacks *hif_get_callbacks_handle(struct hif_softc *scn)
  867. {
  868. return &scn->callbacks;
  869. }
  870. /**
  871. * hif_is_driver_unloading() - API to query upper layers if driver is unloading
  872. * @scn: HIF Context
  873. *
  874. * Return: True/False
  875. */
  876. bool hif_is_driver_unloading(struct hif_softc *scn)
  877. {
  878. struct hif_driver_state_callbacks *cbk = hif_get_callbacks_handle(scn);
  879. if (cbk && cbk->is_driver_unloading)
  880. return cbk->is_driver_unloading(cbk->context);
  881. return false;
  882. }
  883. /**
  884. * hif_is_load_or_unload_in_progress() - API to query upper layers if
  885. * load/unload in progress
  886. * @scn: HIF Context
  887. *
  888. * Return: True/False
  889. */
  890. bool hif_is_load_or_unload_in_progress(struct hif_softc *scn)
  891. {
  892. struct hif_driver_state_callbacks *cbk = hif_get_callbacks_handle(scn);
  893. if (cbk && cbk->is_load_unload_in_progress)
  894. return cbk->is_load_unload_in_progress(cbk->context);
  895. return false;
  896. }
  897. /**
  898. * hif_update_pipe_callback() - API to register pipe specific callbacks
  899. * @osc: Opaque softc
  900. * @pipeid: pipe id
  901. * @callbacks: callbacks to register
  902. *
  903. * Return: void
  904. */
  905. void hif_update_pipe_callback(struct hif_opaque_softc *osc,
  906. u_int8_t pipeid,
  907. struct hif_msg_callbacks *callbacks)
  908. {
  909. struct hif_softc *scn = HIF_GET_SOFTC(osc);
  910. struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn);
  911. struct HIF_CE_pipe_info *pipe_info;
  912. QDF_BUG(pipeid < CE_COUNT_MAX);
  913. HIF_INFO_LO("+%s pipeid %d\n", __func__, pipeid);
  914. pipe_info = &hif_state->pipe_info[pipeid];
  915. qdf_mem_copy(&pipe_info->pipe_callbacks,
  916. callbacks, sizeof(pipe_info->pipe_callbacks));
  917. HIF_INFO_LO("-%s\n", __func__);
  918. }
  919. /**
  920. * hif_is_recovery_in_progress() - API to query upper layers if recovery in
  921. * progress
  922. * @scn: HIF Context
  923. *
  924. * Return: True/False
  925. */
  926. bool hif_is_recovery_in_progress(struct hif_softc *scn)
  927. {
  928. struct hif_driver_state_callbacks *cbk = hif_get_callbacks_handle(scn);
  929. if (cbk && cbk->is_recovery_in_progress)
  930. return cbk->is_recovery_in_progress(cbk->context);
  931. return false;
  932. }
  933. #if defined(HIF_PCI) || defined(SNOC) || defined(HIF_AHB)
  934. /**
  935. * hif_batch_send() - API to access hif specific function
  936. * ce_batch_send.
  937. * @osc: HIF Context
  938. * @msdu : list of msdus to be sent
  939. * @transfer_id : transfer id
  940. * @len : donwloaded length
  941. *
  942. * Return: list of msds not sent
  943. */
  944. qdf_nbuf_t hif_batch_send(struct hif_opaque_softc *osc, qdf_nbuf_t msdu,
  945. uint32_t transfer_id, u_int32_t len, uint32_t sendhead)
  946. {
  947. void *ce_tx_hdl = hif_get_ce_handle(osc, CE_HTT_TX_CE);
  948. return ce_batch_send((struct CE_handle *)ce_tx_hdl, msdu, transfer_id,
  949. len, sendhead);
  950. }
  951. /**
  952. * hif_update_tx_ring() - API to access hif specific function
  953. * ce_update_tx_ring.
  954. * @osc: HIF Context
  955. * @num_htt_cmpls : number of htt compl received.
  956. *
  957. * Return: void
  958. */
  959. void hif_update_tx_ring(struct hif_opaque_softc *osc, u_int32_t num_htt_cmpls)
  960. {
  961. void *ce_tx_hdl = hif_get_ce_handle(osc, CE_HTT_TX_CE);
  962. ce_update_tx_ring(ce_tx_hdl, num_htt_cmpls);
  963. }
  964. /**
  965. * hif_send_single() - API to access hif specific function
  966. * ce_send_single.
  967. * @osc: HIF Context
  968. * @msdu : msdu to be sent
  969. * @transfer_id: transfer id
  970. * @len : downloaded length
  971. *
  972. * Return: msdu sent status
  973. */
  974. int hif_send_single(struct hif_opaque_softc *osc, qdf_nbuf_t msdu, uint32_t
  975. transfer_id, u_int32_t len)
  976. {
  977. void *ce_tx_hdl = hif_get_ce_handle(osc, CE_HTT_TX_CE);
  978. return ce_send_single((struct CE_handle *)ce_tx_hdl, msdu, transfer_id,
  979. len);
  980. }
  981. /**
  982. * hif_send_fast() - API to access hif specific function
  983. * ce_send_fast.
  984. * @osc: HIF Context
  985. * @msdu : array of msdus to be sent
  986. * @num_msdus : number of msdus in an array
  987. * @transfer_id: transfer id
  988. * @download_len: download length
  989. *
  990. * Return: No. of packets that could be sent
  991. */
  992. int hif_send_fast(struct hif_opaque_softc *osc, qdf_nbuf_t nbuf,
  993. uint32_t transfer_id, uint32_t download_len)
  994. {
  995. void *ce_tx_hdl = hif_get_ce_handle(osc, CE_HTT_TX_CE);
  996. return ce_send_fast((struct CE_handle *)ce_tx_hdl, nbuf,
  997. transfer_id, download_len);
  998. }
  999. #endif
  1000. /**
  1001. * hif_reg_write() - API to access hif specific function
  1002. * hif_write32_mb.
  1003. * @hif_ctx : HIF Context
  1004. * @offset : offset on which value has to be written
  1005. * @value : value to be written
  1006. *
  1007. * Return: None
  1008. */
  1009. void hif_reg_write(struct hif_opaque_softc *hif_ctx, uint32_t offset,
  1010. uint32_t value)
  1011. {
  1012. struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
  1013. hif_write32_mb(scn->mem + offset, value);
  1014. }
  1015. /**
  1016. * hif_reg_read() - API to access hif specific function
  1017. * hif_read32_mb.
  1018. * @hif_ctx : HIF Context
  1019. * @offset : offset from which value has to be read
  1020. *
  1021. * Return: Read value
  1022. */
  1023. uint32_t hif_reg_read(struct hif_opaque_softc *hif_ctx, uint32_t offset)
  1024. {
  1025. struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
  1026. return hif_read32_mb(scn->mem + offset);
  1027. }
  1028. #if defined(HIF_USB)
  1029. /**
  1030. * hif_ramdump_handler(): generic ramdump handler
  1031. * @scn: struct hif_opaque_softc
  1032. *
  1033. * Return: None
  1034. */
  1035. void hif_ramdump_handler(struct hif_opaque_softc *scn)
  1036. {
  1037. if (hif_get_bus_type == QDF_BUS_TYPE_USB)
  1038. hif_usb_ramdump_handler();
  1039. }
  1040. #endif
  1041. /**
  1042. * hif_register_ext_group_int_handler() - API to register external group
  1043. * interrupt handler.
  1044. * @hif_ctx : HIF Context
  1045. * @numirq: number of irq's in the group
  1046. * @irq: array of irq values
  1047. * @ext_intr_handler: callback interrupt handler function
  1048. * @context: context to passed in callback
  1049. *
  1050. * Return: status
  1051. */
  1052. uint32_t hif_register_ext_group_int_handler(struct hif_opaque_softc *hif_ctx,
  1053. uint32_t numirq, uint32_t irq[], ext_intr_handler handler,
  1054. void *context)
  1055. {
  1056. struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
  1057. struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn);
  1058. struct hif_ext_group_entry *hif_ext_group;
  1059. if (scn->hif_init_done) {
  1060. HIF_ERROR("%s Called after HIF initialization \n", __func__);
  1061. return QDF_STATUS_E_FAILURE;
  1062. }
  1063. if (hif_state->hif_num_extgroup >= HIF_MAX_GROUP) {
  1064. HIF_ERROR("%s Max groups reached\n", __func__);
  1065. return QDF_STATUS_E_FAILURE;
  1066. }
  1067. if (numirq >= HIF_MAX_GRP_IRQ) {
  1068. HIF_ERROR("%s invalid numirq\n", __func__);
  1069. return QDF_STATUS_E_FAILURE;
  1070. }
  1071. hif_ext_group = &hif_state->hif_ext_group[hif_state->hif_num_extgroup];
  1072. hif_ext_group->numirq = numirq;
  1073. qdf_mem_copy(&hif_ext_group->irq[0], irq, numirq * sizeof(irq[0]));
  1074. hif_ext_group->context = context;
  1075. hif_ext_group->handler = handler;
  1076. hif_ext_group->configured = true;
  1077. hif_ext_group->grp_id = hif_state->hif_num_extgroup;
  1078. hif_ext_group->hif_state = hif_state;
  1079. hif_state->hif_num_extgroup++;
  1080. return QDF_STATUS_SUCCESS;
  1081. }
  1082. /**
  1083. * hif_ext_grp_tasklet() - grp tasklet
  1084. * data: context
  1085. *
  1086. * return: void
  1087. */
  1088. void hif_ext_grp_tasklet(unsigned long data)
  1089. {
  1090. struct hif_ext_group_entry *hif_ext_group =
  1091. (struct hif_ext_group_entry *)data;
  1092. struct HIF_CE_state *hif_state = hif_ext_group->hif_state;
  1093. struct hif_softc *scn = HIF_GET_SOFTC(hif_state);
  1094. if (hif_ext_group->grp_id < HIF_MAX_GROUP) {
  1095. hif_ext_group->handler(hif_ext_group->context, HIF_MAX_BUDGET);
  1096. hif_grp_irq_enable(scn, hif_ext_group->grp_id);
  1097. } else {
  1098. HIF_ERROR("%s: ERROR - invalid grp_id = %d",
  1099. __func__, hif_ext_group->grp_id);
  1100. }
  1101. qdf_atomic_dec(&scn->active_grp_tasklet_cnt);
  1102. }
  1103. /**
  1104. * hif_grp_tasklet_kill() - grp tasklet kill
  1105. * scn: hif_softc
  1106. *
  1107. * return: void
  1108. */
  1109. void hif_grp_tasklet_kill(struct hif_softc *scn)
  1110. {
  1111. int i;
  1112. struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn);
  1113. for (i = 0; i < HIF_MAX_GROUP; i++)
  1114. if (hif_state->hif_ext_group[i].inited) {
  1115. tasklet_kill(&hif_state->hif_ext_group[i].intr_tq);
  1116. hif_state->hif_ext_group[i].inited = false;
  1117. }
  1118. qdf_atomic_set(&scn->active_grp_tasklet_cnt, 0);
  1119. }