cam_ope_subdev.c 7.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/io.h>
  8. #include <linux/of.h>
  9. #include <linux/module.h>
  10. #include <linux/kernel.h>
  11. #include <linux/iommu.h>
  12. #include <linux/timer.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/videodev2.h>
  15. #include <media/v4l2-fh.h>
  16. #include <media/v4l2-device.h>
  17. #include <media/v4l2-event.h>
  18. #include <media/v4l2-ioctl.h>
  19. #include <media/v4l2-subdev.h>
  20. #include <media/cam_req_mgr.h>
  21. #include <media/cam_defs.h>
  22. #include <media/cam_ope.h>
  23. #include "cam_req_mgr_dev.h"
  24. #include "cam_subdev.h"
  25. #include "cam_node.h"
  26. #include "cam_context.h"
  27. #include "cam_ope_context.h"
  28. #include "cam_ope_hw_mgr_intf.h"
  29. #include "cam_hw_mgr_intf.h"
  30. #include "cam_debug_util.h"
  31. #include "cam_smmu_api.h"
  32. #include "camera_main.h"
  33. #include "cam_context_utils.h"
  34. #define OPE_DEV_NAME "cam-ope"
  35. struct cam_ope_subdev {
  36. struct cam_subdev sd;
  37. struct cam_node *node;
  38. struct cam_context ctx[OPE_CTX_MAX];
  39. struct cam_ope_context ctx_ope[OPE_CTX_MAX];
  40. struct mutex ope_lock;
  41. int32_t open_cnt;
  42. int32_t reserved;
  43. };
  44. static struct cam_ope_subdev g_ope_dev;
  45. static void cam_ope_dev_iommu_fault_handler(
  46. struct cam_smmu_pf_info *pf_smmu_info)
  47. {
  48. int i, rc;
  49. struct cam_node *node = NULL;
  50. struct cam_hw_dump_pf_args pf_args = {0};
  51. if (!pf_smmu_info || !pf_smmu_info->token) {
  52. CAM_ERR(CAM_OPE, "invalid token in page handler cb");
  53. return;
  54. }
  55. node = (struct cam_node *)pf_smmu_info->token;
  56. pf_args.pf_smmu_info = pf_smmu_info;
  57. for (i = 0; i < node->ctx_size; i++) {
  58. cam_context_dump_pf_info(&(node->ctx_list[i]), &pf_args);
  59. if (pf_args.pf_context_info.ctx_found)
  60. /* found ctx and packet of the faulted address */
  61. break;
  62. }
  63. if (i == node->ctx_size) {
  64. /* Faulted ctx not found. But report PF to UMD anyway*/
  65. rc = cam_context_send_pf_evt(NULL, &pf_args);
  66. if (rc)
  67. CAM_ERR(CAM_OPE,
  68. "Failed to notify PF event to userspace rc: %d", rc);
  69. }
  70. }
  71. static int cam_ope_subdev_open(struct v4l2_subdev *sd,
  72. struct v4l2_subdev_fh *fh)
  73. {
  74. struct cam_hw_mgr_intf *hw_mgr_intf = NULL;
  75. struct cam_node *node = v4l2_get_subdevdata(sd);
  76. int rc = 0;
  77. cam_req_mgr_rwsem_read_op(CAM_SUBDEV_LOCK);
  78. mutex_lock(&g_ope_dev.ope_lock);
  79. if (g_ope_dev.open_cnt >= 1) {
  80. CAM_ERR(CAM_OPE, "OPE subdev is already opened");
  81. rc = -EALREADY;
  82. goto end;
  83. }
  84. if (!node) {
  85. CAM_ERR(CAM_OPE, "Invalid args");
  86. rc = -EINVAL;
  87. goto end;
  88. }
  89. hw_mgr_intf = &node->hw_mgr_intf;
  90. rc = hw_mgr_intf->hw_open(hw_mgr_intf->hw_mgr_priv, NULL);
  91. if (rc < 0) {
  92. CAM_ERR(CAM_OPE, "OPE HW open failed: %d", rc);
  93. goto end;
  94. }
  95. g_ope_dev.open_cnt++;
  96. CAM_DBG(CAM_OPE, "OPE HW open success: %d", rc);
  97. end:
  98. mutex_unlock(&g_ope_dev.ope_lock);
  99. cam_req_mgr_rwsem_read_op(CAM_SUBDEV_UNLOCK);
  100. return rc;
  101. }
  102. static int cam_ope_subdev_close_internal(struct v4l2_subdev *sd,
  103. struct v4l2_subdev_fh *fh)
  104. {
  105. int rc = 0;
  106. struct cam_hw_mgr_intf *hw_mgr_intf = NULL;
  107. struct cam_node *node = v4l2_get_subdevdata(sd);
  108. mutex_lock(&g_ope_dev.ope_lock);
  109. if (g_ope_dev.open_cnt <= 0) {
  110. CAM_DBG(CAM_OPE, "OPE subdev is already closed");
  111. rc = -EINVAL;
  112. goto end;
  113. }
  114. g_ope_dev.open_cnt--;
  115. if (!node) {
  116. CAM_ERR(CAM_OPE, "Invalid args");
  117. rc = -EINVAL;
  118. goto end;
  119. }
  120. hw_mgr_intf = &node->hw_mgr_intf;
  121. if (!hw_mgr_intf) {
  122. CAM_ERR(CAM_OPE, "hw_mgr_intf is not initialized");
  123. rc = -EINVAL;
  124. goto end;
  125. }
  126. rc = cam_node_shutdown(node);
  127. if (rc < 0) {
  128. CAM_ERR(CAM_OPE, "HW close failed");
  129. goto end;
  130. }
  131. CAM_DBG(CAM_OPE, "OPE HW close success: %d", rc);
  132. end:
  133. mutex_unlock(&g_ope_dev.ope_lock);
  134. return rc;
  135. }
  136. static int cam_ope_subdev_close(struct v4l2_subdev *sd,
  137. struct v4l2_subdev_fh *fh)
  138. {
  139. bool crm_active = cam_req_mgr_is_open();
  140. if (crm_active) {
  141. CAM_DBG(CAM_OPE, "CRM is ACTIVE, close should be from CRM");
  142. return 0;
  143. }
  144. return cam_ope_subdev_close_internal(sd, fh);
  145. }
  146. const struct v4l2_subdev_internal_ops cam_ope_subdev_internal_ops = {
  147. .open = cam_ope_subdev_open,
  148. .close = cam_ope_subdev_close,
  149. };
  150. static int cam_ope_subdev_component_bind(struct device *dev,
  151. struct device *master_dev, void *data)
  152. {
  153. int rc = 0, i = 0;
  154. struct cam_node *node;
  155. struct cam_hw_mgr_intf *hw_mgr_intf;
  156. int iommu_hdl = -1;
  157. struct platform_device *pdev = to_platform_device(dev);
  158. CAM_DBG(CAM_OPE, "Binding OPE subdev component");
  159. if (!pdev) {
  160. CAM_ERR(CAM_OPE, "pdev is NULL");
  161. return -EINVAL;
  162. }
  163. g_ope_dev.sd.pdev = pdev;
  164. g_ope_dev.sd.internal_ops = &cam_ope_subdev_internal_ops;
  165. g_ope_dev.sd.close_seq_prior = CAM_SD_CLOSE_MEDIUM_PRIORITY;
  166. rc = cam_subdev_probe(&g_ope_dev.sd, pdev, OPE_DEV_NAME,
  167. CAM_OPE_DEVICE_TYPE);
  168. if (rc) {
  169. CAM_ERR(CAM_OPE, "OPE cam_subdev_probe failed:%d", rc);
  170. return rc;
  171. }
  172. node = (struct cam_node *) g_ope_dev.sd.token;
  173. hw_mgr_intf = kzalloc(sizeof(*hw_mgr_intf), GFP_KERNEL);
  174. if (!hw_mgr_intf) {
  175. rc = -EINVAL;
  176. goto hw_alloc_fail;
  177. }
  178. rc = cam_ope_hw_mgr_init(pdev->dev.of_node, (uint64_t *)hw_mgr_intf,
  179. &iommu_hdl);
  180. if (rc) {
  181. CAM_ERR(CAM_OPE, "OPE HW manager init failed: %d", rc);
  182. goto hw_init_fail;
  183. }
  184. for (i = 0; i < OPE_CTX_MAX; i++) {
  185. g_ope_dev.ctx_ope[i].base = &g_ope_dev.ctx[i];
  186. rc = cam_ope_context_init(&g_ope_dev.ctx_ope[i],
  187. hw_mgr_intf, i, iommu_hdl);
  188. if (rc) {
  189. CAM_ERR(CAM_OPE, "OPE context init failed");
  190. goto ctx_fail;
  191. }
  192. }
  193. rc = cam_node_init(node, hw_mgr_intf, g_ope_dev.ctx,
  194. OPE_CTX_MAX, OPE_DEV_NAME);
  195. if (rc) {
  196. CAM_ERR(CAM_OPE, "OPE node init failed");
  197. goto ctx_fail;
  198. }
  199. cam_smmu_set_client_page_fault_handler(iommu_hdl,
  200. cam_ope_dev_iommu_fault_handler, node);
  201. g_ope_dev.open_cnt = 0;
  202. mutex_init(&g_ope_dev.ope_lock);
  203. node->sd_handler = cam_ope_subdev_close_internal;
  204. CAM_DBG(CAM_OPE, "Subdev component bound successfully");
  205. return rc;
  206. ctx_fail:
  207. for (--i; i >= 0; i--)
  208. cam_ope_context_deinit(&g_ope_dev.ctx_ope[i]);
  209. hw_init_fail:
  210. kfree(hw_mgr_intf);
  211. hw_alloc_fail:
  212. cam_subdev_remove(&g_ope_dev.sd);
  213. return rc;
  214. }
  215. static void cam_ope_subdev_component_unbind(struct device *dev,
  216. struct device *master_dev, void *data)
  217. {
  218. int i;
  219. struct v4l2_subdev *sd;
  220. struct cam_subdev *subdev;
  221. struct platform_device *pdev = to_platform_device(dev);
  222. if (!pdev) {
  223. CAM_ERR(CAM_OPE, "pdev is NULL");
  224. return;
  225. }
  226. sd = platform_get_drvdata(pdev);
  227. if (!sd) {
  228. CAM_ERR(CAM_OPE, "V4l2 subdev is NULL");
  229. return;
  230. }
  231. subdev = v4l2_get_subdevdata(sd);
  232. if (!subdev) {
  233. CAM_ERR(CAM_OPE, "cam subdev is NULL");
  234. return;
  235. }
  236. for (i = 0; i < OPE_CTX_MAX; i++)
  237. cam_ope_context_deinit(&g_ope_dev.ctx_ope[i]);
  238. cam_node_deinit(g_ope_dev.node);
  239. cam_subdev_remove(&g_ope_dev.sd);
  240. mutex_destroy(&g_ope_dev.ope_lock);
  241. }
  242. const static struct component_ops cam_ope_subdev_component_ops = {
  243. .bind = cam_ope_subdev_component_bind,
  244. .unbind = cam_ope_subdev_component_unbind,
  245. };
  246. static int cam_ope_subdev_probe(struct platform_device *pdev)
  247. {
  248. int rc = 0;
  249. CAM_DBG(CAM_OPE, "Adding OPE subdev component");
  250. rc = component_add(&pdev->dev, &cam_ope_subdev_component_ops);
  251. if (rc)
  252. CAM_ERR(CAM_OPE, "failed to add component rc: %d", rc);
  253. return rc;
  254. }
  255. static int cam_ope_subdev_remove(struct platform_device *pdev)
  256. {
  257. component_del(&pdev->dev, &cam_ope_subdev_component_ops);
  258. return 0;
  259. }
  260. static const struct of_device_id cam_ope_dt_match[] = {
  261. {.compatible = "qcom,cam-ope"},
  262. {}
  263. };
  264. struct platform_driver cam_ope_subdev_driver = {
  265. .probe = cam_ope_subdev_probe,
  266. .remove = cam_ope_subdev_remove,
  267. .driver = {
  268. .name = "cam_ope",
  269. .of_match_table = cam_ope_dt_match,
  270. .suppress_bind_attrs = true,
  271. },
  272. };
  273. int cam_ope_subdev_init_module(void)
  274. {
  275. return platform_driver_register(&cam_ope_subdev_driver);
  276. }
  277. void cam_ope_subdev_exit_module(void)
  278. {
  279. platform_driver_unregister(&cam_ope_subdev_driver);
  280. }
  281. MODULE_DESCRIPTION("MSM OPE driver");
  282. MODULE_LICENSE("GPL v2");