dsi_panel.c 120 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dbg.h"
  15. #include "sde_dsc_helper.h"
  16. #include "sde_vdc_helper.h"
  17. /**
  18. * topology is currently defined by a set of following 3 values:
  19. * 1. num of layer mixers
  20. * 2. num of compression encoders
  21. * 3. num of interfaces
  22. */
  23. #define TOPOLOGY_SET_LEN 3
  24. #define MAX_TOPOLOGY 5
  25. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  26. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  27. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  28. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  29. #define MAX_PANEL_JITTER 10
  30. #define DEFAULT_PANEL_PREFILL_LINES 25
  31. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  32. #define MIN_PREFILL_LINES 40
  33. #define RSCC_MODE_THRESHOLD_TIME_US 40
  34. #define DCS_COMMAND_THRESHOLD_TIME_US 40
  35. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  36. {
  37. char *bp;
  38. bp = buf;
  39. /* First 7 bytes are cmd header */
  40. *bp++ = 0x0A;
  41. *bp++ = 1;
  42. *bp++ = 0;
  43. *bp++ = 0;
  44. *bp++ = pps_delay_ms;
  45. *bp++ = 0;
  46. *bp++ = 128;
  47. }
  48. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  49. char *buf, int pps_id, u32 size)
  50. {
  51. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  52. buf += DSI_CMD_PPS_HDR_SIZE;
  53. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  54. size);
  55. }
  56. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  57. char *buf, int pps_id, u32 size)
  58. {
  59. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  60. buf += DSI_CMD_PPS_HDR_SIZE;
  61. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  62. size);
  63. }
  64. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  65. {
  66. int rc = 0;
  67. int i;
  68. struct regulator *vreg = NULL;
  69. for (i = 0; i < panel->power_info.count; i++) {
  70. vreg = devm_regulator_get(panel->parent,
  71. panel->power_info.vregs[i].vreg_name);
  72. rc = PTR_ERR_OR_ZERO(vreg);
  73. if (rc) {
  74. DSI_ERR("failed to get %s regulator\n",
  75. panel->power_info.vregs[i].vreg_name);
  76. goto error_put;
  77. }
  78. panel->power_info.vregs[i].vreg = vreg;
  79. }
  80. return rc;
  81. error_put:
  82. for (i = i - 1; i >= 0; i--) {
  83. devm_regulator_put(panel->power_info.vregs[i].vreg);
  84. panel->power_info.vregs[i].vreg = NULL;
  85. }
  86. return rc;
  87. }
  88. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  89. {
  90. int rc = 0;
  91. int i;
  92. for (i = panel->power_info.count - 1; i >= 0; i--)
  93. devm_regulator_put(panel->power_info.vregs[i].vreg);
  94. return rc;
  95. }
  96. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  97. {
  98. int rc = 0;
  99. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  100. if (gpio_is_valid(r_config->reset_gpio)) {
  101. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  102. if (rc) {
  103. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  104. goto error;
  105. }
  106. }
  107. if (gpio_is_valid(r_config->disp_en_gpio)) {
  108. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  109. if (rc) {
  110. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  111. goto error_release_reset;
  112. }
  113. }
  114. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  115. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  116. if (rc) {
  117. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  118. goto error_release_disp_en;
  119. }
  120. }
  121. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  122. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  123. if (rc) {
  124. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  125. goto error_release_mode_sel;
  126. }
  127. }
  128. if (gpio_is_valid(panel->panel_test_gpio)) {
  129. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  130. if (rc) {
  131. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  132. rc);
  133. panel->panel_test_gpio = -1;
  134. rc = 0;
  135. }
  136. }
  137. goto error;
  138. error_release_mode_sel:
  139. if (gpio_is_valid(panel->bl_config.en_gpio))
  140. gpio_free(panel->bl_config.en_gpio);
  141. error_release_disp_en:
  142. if (gpio_is_valid(r_config->disp_en_gpio))
  143. gpio_free(r_config->disp_en_gpio);
  144. error_release_reset:
  145. if (gpio_is_valid(r_config->reset_gpio))
  146. gpio_free(r_config->reset_gpio);
  147. error:
  148. return rc;
  149. }
  150. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  151. {
  152. int rc = 0;
  153. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  154. if (gpio_is_valid(r_config->reset_gpio))
  155. gpio_free(r_config->reset_gpio);
  156. if (gpio_is_valid(r_config->disp_en_gpio))
  157. gpio_free(r_config->disp_en_gpio);
  158. if (gpio_is_valid(panel->bl_config.en_gpio))
  159. gpio_free(panel->bl_config.en_gpio);
  160. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  161. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  162. if (gpio_is_valid(panel->panel_test_gpio))
  163. gpio_free(panel->panel_test_gpio);
  164. return rc;
  165. }
  166. static int dsi_panel_trigger_esd_attack_sub(int reset_gpio)
  167. {
  168. if (!gpio_is_valid(reset_gpio)) {
  169. DSI_INFO("failed to pull down the reset gpio\n");
  170. return -EINVAL;
  171. }
  172. gpio_set_value(reset_gpio, 0);
  173. SDE_EVT32(SDE_EVTLOG_FUNC_CASE1);
  174. DSI_INFO("GPIO pulled low to simulate ESD\n");
  175. return 0;
  176. }
  177. static int dsi_panel_vm_trigger_esd_attack(struct dsi_panel *panel)
  178. {
  179. struct dsi_parser_utils *utils = &panel->utils;
  180. int reset_gpio;
  181. int rc = 0;
  182. reset_gpio = utils->get_named_gpio(utils->data,
  183. "qcom,platform-reset-gpio", 0);
  184. if (!gpio_is_valid(reset_gpio)) {
  185. DSI_ERR("[%s] reset gpio not provided\n", panel->name);
  186. return -EINVAL;
  187. }
  188. rc = gpio_request(reset_gpio, "reset_gpio");
  189. if (rc) {
  190. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  191. return rc;
  192. }
  193. rc = dsi_panel_trigger_esd_attack_sub(reset_gpio);
  194. gpio_free(reset_gpio);
  195. return rc;
  196. }
  197. static int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  198. {
  199. struct dsi_panel_reset_config *r_config;
  200. if (!panel) {
  201. DSI_ERR("Invalid panel param\n");
  202. return -EINVAL;
  203. }
  204. r_config = &panel->reset_config;
  205. if (!r_config) {
  206. DSI_ERR("Invalid panel reset configuration\n");
  207. return -EINVAL;
  208. }
  209. return dsi_panel_trigger_esd_attack_sub(r_config->reset_gpio);
  210. }
  211. static int dsi_panel_reset(struct dsi_panel *panel)
  212. {
  213. int rc = 0;
  214. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  215. int i;
  216. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  217. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  218. if (rc) {
  219. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  220. goto exit;
  221. }
  222. }
  223. if (r_config->count) {
  224. rc = gpio_direction_output(r_config->reset_gpio,
  225. r_config->sequence[0].level);
  226. if (rc) {
  227. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  228. goto exit;
  229. }
  230. }
  231. for (i = 0; i < r_config->count; i++) {
  232. gpio_set_value(r_config->reset_gpio,
  233. r_config->sequence[i].level);
  234. if (r_config->sequence[i].sleep_ms)
  235. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  236. (r_config->sequence[i].sleep_ms * 1000) + 100);
  237. }
  238. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  239. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  240. if (rc)
  241. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  242. }
  243. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  244. bool out = true;
  245. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  246. || (panel->reset_config.mode_sel_state
  247. == MODE_GPIO_LOW))
  248. out = false;
  249. else if ((panel->reset_config.mode_sel_state
  250. == MODE_SEL_SINGLE_PORT) ||
  251. (panel->reset_config.mode_sel_state
  252. == MODE_GPIO_HIGH))
  253. out = true;
  254. rc = gpio_direction_output(
  255. panel->reset_config.lcd_mode_sel_gpio, out);
  256. if (rc)
  257. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  258. }
  259. if (gpio_is_valid(panel->panel_test_gpio)) {
  260. rc = gpio_direction_input(panel->panel_test_gpio);
  261. if (rc)
  262. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  263. rc);
  264. }
  265. exit:
  266. return rc;
  267. }
  268. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  269. {
  270. int rc = 0;
  271. struct pinctrl_state *state;
  272. if (panel->host_config.ext_bridge_mode)
  273. return 0;
  274. if (!panel->pinctrl.pinctrl)
  275. return 0;
  276. if (enable)
  277. state = panel->pinctrl.active;
  278. else
  279. state = panel->pinctrl.suspend;
  280. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  281. if (rc)
  282. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  283. panel->name, rc);
  284. return rc;
  285. }
  286. static int dsi_panel_power_on(struct dsi_panel *panel)
  287. {
  288. int rc = 0;
  289. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  290. if (rc) {
  291. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  292. panel->name, rc);
  293. goto exit;
  294. }
  295. rc = dsi_panel_set_pinctrl_state(panel, true);
  296. if (rc) {
  297. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  298. goto error_disable_vregs;
  299. }
  300. rc = dsi_panel_reset(panel);
  301. if (rc) {
  302. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  303. goto error_disable_gpio;
  304. }
  305. goto exit;
  306. error_disable_gpio:
  307. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  308. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  309. if (gpio_is_valid(panel->bl_config.en_gpio))
  310. gpio_set_value(panel->bl_config.en_gpio, 0);
  311. (void)dsi_panel_set_pinctrl_state(panel, false);
  312. error_disable_vregs:
  313. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  314. exit:
  315. return rc;
  316. }
  317. static int dsi_panel_power_off(struct dsi_panel *panel)
  318. {
  319. int rc = 0;
  320. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  321. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  322. if (gpio_is_valid(panel->reset_config.reset_gpio) &&
  323. !panel->reset_gpio_always_on)
  324. gpio_set_value(panel->reset_config.reset_gpio, 0);
  325. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  326. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  327. if (gpio_is_valid(panel->panel_test_gpio)) {
  328. rc = gpio_direction_input(panel->panel_test_gpio);
  329. if (rc)
  330. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  331. rc);
  332. }
  333. rc = dsi_panel_set_pinctrl_state(panel, false);
  334. if (rc) {
  335. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  336. rc);
  337. }
  338. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  339. if (rc)
  340. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  341. panel->name, rc);
  342. return rc;
  343. }
  344. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  345. enum dsi_cmd_set_type type)
  346. {
  347. int rc = 0, i = 0;
  348. ssize_t len;
  349. struct dsi_cmd_desc *cmds;
  350. u32 count;
  351. enum dsi_cmd_set_state state;
  352. struct dsi_display_mode *mode;
  353. if (!panel || !panel->cur_mode)
  354. return -EINVAL;
  355. mode = panel->cur_mode;
  356. cmds = mode->priv_info->cmd_sets[type].cmds;
  357. count = mode->priv_info->cmd_sets[type].count;
  358. state = mode->priv_info->cmd_sets[type].state;
  359. SDE_EVT32(type, state, count);
  360. if (count == 0) {
  361. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  362. panel->name, type);
  363. goto error;
  364. }
  365. for (i = 0; i < count; i++) {
  366. if (state == DSI_CMD_SET_STATE_LP)
  367. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  368. if (type == DSI_CMD_SET_VID_SWITCH_OUT)
  369. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  370. len = dsi_host_transfer_sub(panel->host, cmds);
  371. if (len < 0) {
  372. rc = len;
  373. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  374. goto error;
  375. }
  376. if (cmds->post_wait_ms)
  377. usleep_range(cmds->post_wait_ms*1000,
  378. ((cmds->post_wait_ms*1000)+10));
  379. cmds++;
  380. }
  381. error:
  382. return rc;
  383. }
  384. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  385. {
  386. int rc = 0;
  387. if (panel->host_config.ext_bridge_mode)
  388. return 0;
  389. devm_pinctrl_put(panel->pinctrl.pinctrl);
  390. return rc;
  391. }
  392. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  393. {
  394. int rc = 0;
  395. if (panel->host_config.ext_bridge_mode)
  396. return 0;
  397. /* TODO: pinctrl is defined in dsi dt node */
  398. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  399. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  400. rc = PTR_ERR(panel->pinctrl.pinctrl);
  401. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  402. goto error;
  403. }
  404. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  405. "panel_active");
  406. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  407. rc = PTR_ERR(panel->pinctrl.active);
  408. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  409. goto error;
  410. }
  411. panel->pinctrl.suspend =
  412. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  413. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  414. rc = PTR_ERR(panel->pinctrl.suspend);
  415. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  416. goto error;
  417. }
  418. panel->pinctrl.pwm_pin =
  419. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  420. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  421. panel->pinctrl.pwm_pin = NULL;
  422. DSI_DEBUG("failed to get pinctrl pwm_pin");
  423. }
  424. error:
  425. return rc;
  426. }
  427. static int dsi_panel_wled_register(struct dsi_panel *panel,
  428. struct dsi_backlight_config *bl)
  429. {
  430. struct backlight_device *bd;
  431. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  432. if (!bd) {
  433. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  434. panel->name, -EPROBE_DEFER);
  435. return -EPROBE_DEFER;
  436. }
  437. bl->raw_bd = bd;
  438. return 0;
  439. }
  440. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  441. u32 bl_lvl)
  442. {
  443. int rc = 0;
  444. unsigned long mode_flags = 0;
  445. struct mipi_dsi_device *dsi = NULL;
  446. if (!panel || (bl_lvl > 0xffff)) {
  447. DSI_ERR("invalid params\n");
  448. return -EINVAL;
  449. }
  450. dsi = &panel->mipi_device;
  451. if (unlikely(panel->bl_config.lp_mode)) {
  452. mode_flags = dsi->mode_flags;
  453. dsi->mode_flags |= MIPI_DSI_MODE_LPM;
  454. }
  455. if (panel->bl_config.bl_inverted_dbv)
  456. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  457. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  458. if (rc < 0)
  459. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  460. if (unlikely(panel->bl_config.lp_mode))
  461. dsi->mode_flags = mode_flags;
  462. return rc;
  463. }
  464. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  465. u32 bl_lvl)
  466. {
  467. int rc = 0;
  468. u32 duty = 0;
  469. u32 period_ns = 0;
  470. struct dsi_backlight_config *bl;
  471. if (!panel) {
  472. DSI_ERR("Invalid Params\n");
  473. return -EINVAL;
  474. }
  475. bl = &panel->bl_config;
  476. if (!bl->pwm_bl) {
  477. DSI_ERR("pwm device not found\n");
  478. return -EINVAL;
  479. }
  480. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  481. duty = bl_lvl * period_ns;
  482. duty /= bl->bl_max_level;
  483. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  484. if (rc) {
  485. DSI_ERR("[%s] failed to change pwm config, rc=%d\n", panel->name,
  486. rc);
  487. goto error;
  488. }
  489. if (bl_lvl == 0 && bl->pwm_enabled) {
  490. pwm_disable(bl->pwm_bl);
  491. bl->pwm_enabled = false;
  492. return 0;
  493. }
  494. if (bl_lvl != 0 && !bl->pwm_enabled) {
  495. rc = pwm_enable(bl->pwm_bl);
  496. if (rc) {
  497. DSI_ERR("[%s] failed to enable pwm, rc=%d\n", panel->name,
  498. rc);
  499. goto error;
  500. }
  501. bl->pwm_enabled = true;
  502. }
  503. error:
  504. return rc;
  505. }
  506. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  507. {
  508. int rc = 0;
  509. struct dsi_backlight_config *bl = &panel->bl_config;
  510. if (panel->host_config.ext_bridge_mode)
  511. return 0;
  512. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  513. switch (bl->type) {
  514. case DSI_BACKLIGHT_WLED:
  515. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  516. break;
  517. case DSI_BACKLIGHT_DCS:
  518. rc = dsi_panel_update_backlight(panel, bl_lvl);
  519. break;
  520. case DSI_BACKLIGHT_EXTERNAL:
  521. break;
  522. case DSI_BACKLIGHT_PWM:
  523. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  524. break;
  525. default:
  526. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  527. rc = -ENOTSUPP;
  528. }
  529. return rc;
  530. }
  531. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  532. {
  533. u32 cur_bl_level;
  534. struct backlight_device *bd = bl->raw_bd;
  535. /* default the brightness level to 50% */
  536. cur_bl_level = bl->bl_max_level >> 1;
  537. switch (bl->type) {
  538. case DSI_BACKLIGHT_WLED:
  539. /* Try to query the backlight level from the backlight device */
  540. if (bd->ops && bd->ops->get_brightness)
  541. cur_bl_level = bd->ops->get_brightness(bd);
  542. break;
  543. case DSI_BACKLIGHT_DCS:
  544. case DSI_BACKLIGHT_EXTERNAL:
  545. case DSI_BACKLIGHT_PWM:
  546. default:
  547. /*
  548. * Ideally, we should read the backlight level from the
  549. * panel. For now, just set it default value.
  550. */
  551. break;
  552. }
  553. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  554. return cur_bl_level;
  555. }
  556. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  557. {
  558. struct dsi_backlight_config *bl = &panel->bl_config;
  559. bl->bl_level = dsi_panel_get_brightness(bl);
  560. }
  561. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  562. {
  563. int rc = 0;
  564. struct dsi_backlight_config *bl = &panel->bl_config;
  565. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  566. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  567. rc = PTR_ERR(bl->pwm_bl);
  568. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  569. rc);
  570. return rc;
  571. }
  572. if (panel->pinctrl.pwm_pin) {
  573. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  574. panel->pinctrl.pwm_pin);
  575. if (rc)
  576. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  577. panel->name, rc);
  578. }
  579. return 0;
  580. }
  581. static int dsi_panel_bl_register(struct dsi_panel *panel)
  582. {
  583. int rc = 0;
  584. struct dsi_backlight_config *bl = &panel->bl_config;
  585. if (panel->host_config.ext_bridge_mode)
  586. return 0;
  587. switch (bl->type) {
  588. case DSI_BACKLIGHT_WLED:
  589. rc = dsi_panel_wled_register(panel, bl);
  590. break;
  591. case DSI_BACKLIGHT_DCS:
  592. break;
  593. case DSI_BACKLIGHT_EXTERNAL:
  594. break;
  595. case DSI_BACKLIGHT_PWM:
  596. rc = dsi_panel_pwm_register(panel);
  597. break;
  598. default:
  599. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  600. rc = -ENOTSUPP;
  601. goto error;
  602. }
  603. error:
  604. return rc;
  605. }
  606. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  607. {
  608. struct dsi_backlight_config *bl = &panel->bl_config;
  609. devm_pwm_put(panel->parent, bl->pwm_bl);
  610. }
  611. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  612. {
  613. int rc = 0;
  614. struct dsi_backlight_config *bl = &panel->bl_config;
  615. if (panel->host_config.ext_bridge_mode)
  616. return 0;
  617. switch (bl->type) {
  618. case DSI_BACKLIGHT_WLED:
  619. break;
  620. case DSI_BACKLIGHT_DCS:
  621. break;
  622. case DSI_BACKLIGHT_EXTERNAL:
  623. break;
  624. case DSI_BACKLIGHT_PWM:
  625. dsi_panel_pwm_unregister(panel);
  626. break;
  627. default:
  628. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  629. rc = -ENOTSUPP;
  630. goto error;
  631. }
  632. error:
  633. return rc;
  634. }
  635. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  636. struct dsi_parser_utils *utils)
  637. {
  638. int rc = 0;
  639. u64 tmp64 = 0;
  640. struct dsi_display_mode *display_mode;
  641. struct dsi_display_mode_priv_info *priv_info;
  642. display_mode = container_of(mode, struct dsi_display_mode, timing);
  643. priv_info = display_mode->priv_info;
  644. rc = utils->read_u64(utils->data,
  645. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  646. if (rc == -EOVERFLOW) {
  647. tmp64 = 0;
  648. rc = utils->read_u32(utils->data,
  649. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  650. }
  651. mode->clk_rate_hz = !rc ? tmp64 : 0;
  652. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  653. mode->pclk_scale.numer = 1;
  654. mode->pclk_scale.denom = 1;
  655. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  656. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  657. &mode->mdp_transfer_time_us);
  658. if (!rc)
  659. display_mode->priv_info->mdp_transfer_time_us =
  660. mode->mdp_transfer_time_us;
  661. else
  662. display_mode->priv_info->mdp_transfer_time_us = 0;
  663. priv_info->disable_rsc_solver = utils->read_bool(utils->data, "qcom,disable-rsc-solver");
  664. rc = utils->read_u32(utils->data,
  665. "qcom,mdss-dsi-panel-framerate",
  666. &mode->refresh_rate);
  667. if (rc) {
  668. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  669. rc);
  670. goto error;
  671. }
  672. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  673. &mode->h_active);
  674. if (rc) {
  675. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  676. rc);
  677. goto error;
  678. }
  679. rc = utils->read_u32(utils->data,
  680. "qcom,mdss-dsi-h-front-porch",
  681. &mode->h_front_porch);
  682. if (rc) {
  683. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  684. rc);
  685. goto error;
  686. }
  687. rc = utils->read_u32(utils->data,
  688. "qcom,mdss-dsi-h-back-porch",
  689. &mode->h_back_porch);
  690. if (rc) {
  691. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  692. rc);
  693. goto error;
  694. }
  695. rc = utils->read_u32(utils->data,
  696. "qcom,mdss-dsi-h-pulse-width",
  697. &mode->h_sync_width);
  698. if (rc) {
  699. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  700. rc);
  701. goto error;
  702. }
  703. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  704. &mode->h_skew);
  705. if (rc)
  706. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  707. rc);
  708. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  709. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  710. mode->h_sync_width);
  711. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  712. &mode->v_active);
  713. if (rc) {
  714. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  715. rc);
  716. goto error;
  717. }
  718. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  719. &mode->v_back_porch);
  720. if (rc) {
  721. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  722. rc);
  723. goto error;
  724. }
  725. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  726. &mode->v_front_porch);
  727. if (rc) {
  728. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  729. rc);
  730. goto error;
  731. }
  732. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  733. &mode->v_sync_width);
  734. if (rc) {
  735. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  736. rc);
  737. goto error;
  738. }
  739. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  740. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  741. mode->v_sync_width);
  742. error:
  743. return rc;
  744. }
  745. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  746. struct dsi_parser_utils *utils,
  747. const char *name)
  748. {
  749. int rc = 0;
  750. u32 bpp = 0;
  751. enum dsi_pixel_format fmt;
  752. const char *packing;
  753. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  754. if (rc) {
  755. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  756. name, rc);
  757. return rc;
  758. }
  759. host->bpp = bpp;
  760. switch (bpp) {
  761. case 3:
  762. fmt = DSI_PIXEL_FORMAT_RGB111;
  763. break;
  764. case 8:
  765. fmt = DSI_PIXEL_FORMAT_RGB332;
  766. break;
  767. case 12:
  768. fmt = DSI_PIXEL_FORMAT_RGB444;
  769. break;
  770. case 16:
  771. fmt = DSI_PIXEL_FORMAT_RGB565;
  772. break;
  773. case 18:
  774. fmt = DSI_PIXEL_FORMAT_RGB666;
  775. break;
  776. case 24:
  777. default:
  778. fmt = DSI_PIXEL_FORMAT_RGB888;
  779. break;
  780. }
  781. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  782. packing = utils->get_property(utils->data,
  783. "qcom,mdss-dsi-pixel-packing",
  784. NULL);
  785. if (packing && !strcmp(packing, "loose"))
  786. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  787. }
  788. host->dst_format = fmt;
  789. return rc;
  790. }
  791. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  792. struct dsi_parser_utils *utils,
  793. const char *name)
  794. {
  795. int rc = 0;
  796. bool lane_enabled;
  797. u32 num_of_lanes = 0;
  798. lane_enabled = utils->read_bool(utils->data,
  799. "qcom,mdss-dsi-lane-0-state");
  800. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  801. lane_enabled = utils->read_bool(utils->data,
  802. "qcom,mdss-dsi-lane-1-state");
  803. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  804. lane_enabled = utils->read_bool(utils->data,
  805. "qcom,mdss-dsi-lane-2-state");
  806. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  807. lane_enabled = utils->read_bool(utils->data,
  808. "qcom,mdss-dsi-lane-3-state");
  809. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  810. if (host->data_lanes & DSI_DATA_LANE_0)
  811. num_of_lanes++;
  812. if (host->data_lanes & DSI_DATA_LANE_1)
  813. num_of_lanes++;
  814. if (host->data_lanes & DSI_DATA_LANE_2)
  815. num_of_lanes++;
  816. if (host->data_lanes & DSI_DATA_LANE_3)
  817. num_of_lanes++;
  818. host->num_data_lanes = num_of_lanes;
  819. if (host->data_lanes == 0) {
  820. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  821. rc = -EINVAL;
  822. }
  823. return rc;
  824. }
  825. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  826. struct dsi_parser_utils *utils,
  827. const char *name)
  828. {
  829. int rc = 0;
  830. const char *swap_mode;
  831. swap_mode = utils->get_property(utils->data,
  832. "qcom,mdss-dsi-color-order", NULL);
  833. if (swap_mode) {
  834. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  835. host->swap_mode = DSI_COLOR_SWAP_RGB;
  836. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  837. host->swap_mode = DSI_COLOR_SWAP_RBG;
  838. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  839. host->swap_mode = DSI_COLOR_SWAP_BRG;
  840. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  841. host->swap_mode = DSI_COLOR_SWAP_GRB;
  842. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  843. host->swap_mode = DSI_COLOR_SWAP_GBR;
  844. } else {
  845. DSI_ERR("[%s] Unrecognized color order-%s\n",
  846. name, swap_mode);
  847. rc = -EINVAL;
  848. }
  849. } else {
  850. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  851. host->swap_mode = DSI_COLOR_SWAP_RGB;
  852. }
  853. /* bit swap on color channel is not defined in dt */
  854. host->bit_swap_red = false;
  855. host->bit_swap_green = false;
  856. host->bit_swap_blue = false;
  857. return rc;
  858. }
  859. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  860. struct dsi_parser_utils *utils,
  861. const char *name)
  862. {
  863. const char *trig;
  864. int rc = 0;
  865. trig = utils->get_property(utils->data,
  866. "qcom,mdss-dsi-mdp-trigger", NULL);
  867. if (trig) {
  868. if (!strcmp(trig, "none")) {
  869. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  870. } else if (!strcmp(trig, "trigger_te")) {
  871. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  872. } else if (!strcmp(trig, "trigger_sw")) {
  873. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  874. } else if (!strcmp(trig, "trigger_sw_te")) {
  875. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  876. } else {
  877. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  878. name, trig);
  879. rc = -EINVAL;
  880. }
  881. } else {
  882. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  883. name);
  884. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  885. }
  886. trig = utils->get_property(utils->data,
  887. "qcom,mdss-dsi-dma-trigger", NULL);
  888. if (trig) {
  889. if (!strcmp(trig, "none")) {
  890. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  891. } else if (!strcmp(trig, "trigger_te")) {
  892. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  893. } else if (!strcmp(trig, "trigger_sw")) {
  894. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  895. } else if (!strcmp(trig, "trigger_sw_seof")) {
  896. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  897. } else if (!strcmp(trig, "trigger_sw_te")) {
  898. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  899. } else {
  900. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  901. name, trig);
  902. rc = -EINVAL;
  903. }
  904. } else {
  905. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  906. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  907. }
  908. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  909. &host->te_mode);
  910. if (rc) {
  911. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  912. host->te_mode = 1;
  913. rc = 0;
  914. }
  915. return rc;
  916. }
  917. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  918. struct dsi_parser_utils *utils,
  919. const char *name)
  920. {
  921. u32 val = 0, line_no = 0, window = 0;
  922. int rc = 0;
  923. bool panel_cphy_mode = false;
  924. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  925. if (!rc) {
  926. host->t_clk_post = val;
  927. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  928. }
  929. val = 0;
  930. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  931. if (!rc) {
  932. host->t_clk_pre = val;
  933. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  934. }
  935. host->ignore_rx_eot = utils->read_bool(utils->data,
  936. "qcom,mdss-dsi-rx-eot-ignore");
  937. host->append_tx_eot = utils->read_bool(utils->data,
  938. "qcom,mdss-dsi-tx-eot-append");
  939. host->ext_bridge_mode = utils->read_bool(utils->data,
  940. "qcom,mdss-dsi-ext-bridge-mode");
  941. host->force_hs_clk_lane = utils->read_bool(utils->data,
  942. "qcom,mdss-dsi-force-clock-lane-hs");
  943. panel_cphy_mode = utils->read_bool(utils->data,
  944. "qcom,panel-cphy-mode");
  945. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  946. : DSI_PHY_TYPE_DPHY;
  947. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  948. &line_no);
  949. if (rc)
  950. host->dma_sched_line = 0;
  951. else
  952. host->dma_sched_line = line_no;
  953. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-window",
  954. &window);
  955. if (rc)
  956. host->dma_sched_window = 0;
  957. else
  958. host->dma_sched_window = window;
  959. DSI_DEBUG("[%s] DMA scheduling parameters Line: %d Window: %d\n", name,
  960. host->dma_sched_line, host->dma_sched_window);
  961. return 0;
  962. }
  963. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  964. struct dsi_parser_utils *utils,
  965. const char *name)
  966. {
  967. int rc = 0;
  968. u32 val = 0;
  969. bool supported = false;
  970. struct dsi_split_link_config *split_link = &host->split_link;
  971. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  972. if (!supported) {
  973. DSI_DEBUG("[%s] Split link is not supported\n", name);
  974. split_link->enabled = false;
  975. return;
  976. }
  977. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  978. if (rc || val < 1) {
  979. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  980. split_link->num_sublinks = 2;
  981. } else {
  982. split_link->num_sublinks = val;
  983. }
  984. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  985. if (rc || val < 1) {
  986. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  987. split_link->lanes_per_sublink = 2;
  988. } else {
  989. split_link->lanes_per_sublink = val;
  990. }
  991. supported = utils->read_bool(utils->data, "qcom,split-link-sublink-swap");
  992. if (!supported)
  993. split_link->sublink_swap = false;
  994. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  995. split_link->num_sublinks, split_link->lanes_per_sublink);
  996. split_link->enabled = true;
  997. }
  998. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  999. {
  1000. int rc = 0;
  1001. struct dsi_parser_utils *utils = &panel->utils;
  1002. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  1003. panel->name);
  1004. if (rc) {
  1005. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  1006. panel->name, rc);
  1007. goto error;
  1008. }
  1009. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  1010. panel->name);
  1011. if (rc) {
  1012. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  1013. panel->name, rc);
  1014. goto error;
  1015. }
  1016. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1017. panel->name);
  1018. if (rc) {
  1019. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  1020. panel->name, rc);
  1021. goto error;
  1022. }
  1023. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1024. panel->name);
  1025. if (rc) {
  1026. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1027. panel->name, rc);
  1028. goto error;
  1029. }
  1030. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1031. panel->name);
  1032. if (rc) {
  1033. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1034. panel->name, rc);
  1035. goto error;
  1036. }
  1037. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1038. panel->name);
  1039. error:
  1040. return rc;
  1041. }
  1042. static int dsi_panel_parse_avr_caps(struct dsi_panel *panel,
  1043. struct device_node *of_node)
  1044. {
  1045. struct dsi_avr_capabilities *avr_caps = &panel->avr_caps;
  1046. struct dsi_parser_utils *utils = &panel->utils;
  1047. int val, rc = 0;
  1048. val = utils->count_u32_elems(utils->data, "qcom,dsi-qsync-avr-step-list");
  1049. if (val <= 0) {
  1050. DSI_DEBUG("[%s] optional avr step list not defined, val:%d\n", panel->name, val);
  1051. return rc;
  1052. } else if (val > 1 && val != panel->dfps_caps.dfps_list_len) {
  1053. DSI_ERR("[%s] avr step list size %d not same as dfps list %d\n",
  1054. val, panel->dfps_caps.dfps_list_len);
  1055. return -EINVAL;
  1056. }
  1057. avr_caps->avr_step_fps_list = kcalloc(val, sizeof(u32), GFP_KERNEL);
  1058. if (!avr_caps->avr_step_fps_list)
  1059. return -ENOMEM;
  1060. rc = utils->read_u32_array(utils->data, "qcom,dsi-qsync-avr-step-list",
  1061. avr_caps->avr_step_fps_list, val);
  1062. if (rc) {
  1063. kfree(avr_caps->avr_step_fps_list);
  1064. return rc;
  1065. }
  1066. avr_caps->avr_step_fps_list_len = val;
  1067. return rc;
  1068. }
  1069. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1070. struct device_node *of_node)
  1071. {
  1072. int rc = 0;
  1073. u32 val = 0, i;
  1074. struct dsi_qsync_capabilities *qsync_caps = &panel->qsync_caps;
  1075. struct dsi_parser_utils *utils = &panel->utils;
  1076. const char *name = panel->name;
  1077. /**
  1078. * "mdss-dsi-qsync-min-refresh-rate" is defined in cmd mode and
  1079. * video mode when there is only one qsync min fps present.
  1080. */
  1081. rc = of_property_read_u32(of_node,
  1082. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1083. &val);
  1084. if (rc)
  1085. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1086. panel->name, rc);
  1087. qsync_caps->qsync_min_fps = val;
  1088. /**
  1089. * "dsi-supported-qsync-min-fps-list" may be defined in video
  1090. * mode, only in dfps case when "qcom,dsi-supported-dfps-list"
  1091. * is defined.
  1092. */
  1093. qsync_caps->qsync_min_fps_list_len = utils->count_u32_elems(utils->data,
  1094. "qcom,dsi-supported-qsync-min-fps-list");
  1095. if (qsync_caps->qsync_min_fps_list_len < 1)
  1096. goto qsync_support;
  1097. /**
  1098. * qcom,dsi-supported-qsync-min-fps-list cannot be defined
  1099. * along with qcom,mdss-dsi-qsync-min-refresh-rate.
  1100. */
  1101. if (qsync_caps->qsync_min_fps_list_len >= 1 &&
  1102. qsync_caps->qsync_min_fps) {
  1103. DSI_ERR("[%s] Both qsync nodes are defined\n",
  1104. name);
  1105. rc = -EINVAL;
  1106. goto error;
  1107. }
  1108. if (panel->dfps_caps.dfps_list_len !=
  1109. qsync_caps->qsync_min_fps_list_len) {
  1110. DSI_ERR("[%s] Qsync min fps list mismatch with dfps\n", name);
  1111. rc = -EINVAL;
  1112. goto error;
  1113. }
  1114. qsync_caps->qsync_min_fps_list =
  1115. kcalloc(qsync_caps->qsync_min_fps_list_len, sizeof(u32),
  1116. GFP_KERNEL);
  1117. if (!qsync_caps->qsync_min_fps_list) {
  1118. rc = -ENOMEM;
  1119. goto error;
  1120. }
  1121. rc = utils->read_u32_array(utils->data,
  1122. "qcom,dsi-supported-qsync-min-fps-list",
  1123. qsync_caps->qsync_min_fps_list,
  1124. qsync_caps->qsync_min_fps_list_len);
  1125. if (rc) {
  1126. DSI_ERR("[%s] Qsync min fps list parse failed\n", name);
  1127. rc = -EINVAL;
  1128. goto error;
  1129. }
  1130. qsync_caps->qsync_min_fps = qsync_caps->qsync_min_fps_list[0];
  1131. for (i = 1; i < qsync_caps->qsync_min_fps_list_len; i++) {
  1132. if (qsync_caps->qsync_min_fps_list[i] <
  1133. qsync_caps->qsync_min_fps)
  1134. qsync_caps->qsync_min_fps =
  1135. qsync_caps->qsync_min_fps_list[i];
  1136. }
  1137. qsync_support:
  1138. /* allow qsync support only if DFPS is with VFP approach */
  1139. if ((panel->dfps_caps.dfps_support) &&
  1140. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  1141. panel->qsync_caps.qsync_min_fps = 0;
  1142. error:
  1143. if (rc < 0) {
  1144. qsync_caps->qsync_min_fps = 0;
  1145. qsync_caps->qsync_min_fps_list_len = 0;
  1146. }
  1147. return rc;
  1148. }
  1149. static int dsi_panel_parse_dyn_clk_list(struct dsi_display_mode *mode,
  1150. struct dsi_parser_utils *utils)
  1151. {
  1152. int i, rc = 0;
  1153. struct dyn_clk_list *bit_clk_list;
  1154. if (!mode || !mode->priv_info) {
  1155. DSI_ERR("invalid arguments\n");
  1156. return -EINVAL;
  1157. }
  1158. bit_clk_list = &mode->priv_info->bit_clk_list;
  1159. bit_clk_list->count = utils->count_u32_elems(utils->data, "qcom,dsi-dyn-clk-list");
  1160. if (bit_clk_list->count < 1)
  1161. return 0;
  1162. bit_clk_list->rates = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1163. if (!bit_clk_list->rates) {
  1164. DSI_ERR("failed to allocate space for bit clock list\n");
  1165. return -ENOMEM;
  1166. }
  1167. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1168. bit_clk_list->rates, bit_clk_list->count);
  1169. if (rc) {
  1170. DSI_ERR("failed to parse supported bit clk list, rc=%d\n", rc);
  1171. return -EINVAL;
  1172. }
  1173. for (i = 0; i < bit_clk_list->count; i++)
  1174. DSI_DEBUG("bit clk rate[%d]:%d\n", i, bit_clk_list->rates[i]);
  1175. return 0;
  1176. }
  1177. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1178. {
  1179. int rc = 0;
  1180. bool supported = false;
  1181. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1182. struct dsi_parser_utils *utils = &panel->utils;
  1183. const char *type;
  1184. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1185. if (!supported) {
  1186. dyn_clk_caps->dyn_clk_support = false;
  1187. return rc;
  1188. }
  1189. dyn_clk_caps->dyn_clk_support = true;
  1190. type = utils->get_property(utils->data,
  1191. "qcom,dsi-dyn-clk-type", NULL);
  1192. if (!type) {
  1193. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1194. dyn_clk_caps->maintain_const_fps = false;
  1195. return 0;
  1196. }
  1197. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1198. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1199. dyn_clk_caps->maintain_const_fps = true;
  1200. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1201. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1202. dyn_clk_caps->maintain_const_fps = true;
  1203. } else {
  1204. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1205. dyn_clk_caps->maintain_const_fps = false;
  1206. }
  1207. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1208. return 0;
  1209. }
  1210. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1211. {
  1212. int rc = 0;
  1213. bool supported = false;
  1214. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1215. struct dsi_parser_utils *utils = &panel->utils;
  1216. const char *name = panel->name;
  1217. const char *type;
  1218. u32 i;
  1219. supported = utils->read_bool(utils->data,
  1220. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1221. if (!supported) {
  1222. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1223. dfps_caps->dfps_support = false;
  1224. return rc;
  1225. }
  1226. type = utils->get_property(utils->data,
  1227. "qcom,mdss-dsi-pan-fps-update", NULL);
  1228. if (!type) {
  1229. DSI_ERR("[%s] dfps type not defined\n", name);
  1230. rc = -EINVAL;
  1231. goto error;
  1232. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1233. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1234. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1235. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1236. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1237. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1238. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1239. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1240. } else {
  1241. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1242. rc = -EINVAL;
  1243. goto error;
  1244. }
  1245. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1246. "qcom,dsi-supported-dfps-list");
  1247. if (dfps_caps->dfps_list_len < 1) {
  1248. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1249. rc = -EINVAL;
  1250. goto error;
  1251. }
  1252. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1253. GFP_KERNEL);
  1254. if (!dfps_caps->dfps_list) {
  1255. rc = -ENOMEM;
  1256. goto error;
  1257. }
  1258. rc = utils->read_u32_array(utils->data,
  1259. "qcom,dsi-supported-dfps-list",
  1260. dfps_caps->dfps_list,
  1261. dfps_caps->dfps_list_len);
  1262. if (rc) {
  1263. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1264. rc = -EINVAL;
  1265. goto error;
  1266. }
  1267. dfps_caps->dfps_support = true;
  1268. /* calculate max and min fps */
  1269. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1270. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1271. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1272. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1273. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1274. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1275. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1276. }
  1277. error:
  1278. return rc;
  1279. }
  1280. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1281. struct dsi_parser_utils *utils,
  1282. const char *name)
  1283. {
  1284. int rc = 0;
  1285. const char *traffic_mode;
  1286. u32 vc_id = 0;
  1287. u32 val = 0;
  1288. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1289. if (rc) {
  1290. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1291. cfg->pulse_mode_hsa_he = false;
  1292. } else if (val == 1) {
  1293. cfg->pulse_mode_hsa_he = true;
  1294. } else if (val == 0) {
  1295. cfg->pulse_mode_hsa_he = false;
  1296. } else {
  1297. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1298. name);
  1299. rc = -EINVAL;
  1300. goto error;
  1301. }
  1302. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1303. "qcom,mdss-dsi-hfp-power-mode");
  1304. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1305. "qcom,mdss-dsi-hbp-power-mode");
  1306. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1307. "qcom,mdss-dsi-hsa-power-mode");
  1308. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1309. "qcom,mdss-dsi-last-line-interleave");
  1310. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1311. "qcom,mdss-dsi-bllp-eof-power-mode");
  1312. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1313. "qcom,mdss-dsi-bllp-power-mode");
  1314. traffic_mode = utils->get_property(utils->data,
  1315. "qcom,mdss-dsi-traffic-mode",
  1316. NULL);
  1317. if (!traffic_mode) {
  1318. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1319. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1320. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1321. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1322. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1323. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1324. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1325. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1326. } else {
  1327. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1328. traffic_mode);
  1329. rc = -EINVAL;
  1330. goto error;
  1331. }
  1332. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1333. &vc_id);
  1334. if (rc) {
  1335. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1336. cfg->vc_id = 0;
  1337. } else {
  1338. cfg->vc_id = vc_id;
  1339. }
  1340. error:
  1341. return rc;
  1342. }
  1343. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1344. struct dsi_parser_utils *utils,
  1345. const char *name)
  1346. {
  1347. u32 val = 0;
  1348. int rc = 0;
  1349. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1350. if (rc) {
  1351. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1352. cfg->wr_mem_start = 0x2C;
  1353. } else {
  1354. cfg->wr_mem_start = val;
  1355. }
  1356. val = 0;
  1357. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1358. &val);
  1359. if (rc) {
  1360. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1361. cfg->wr_mem_continue = 0x3C;
  1362. } else {
  1363. cfg->wr_mem_continue = val;
  1364. }
  1365. /* TODO: fix following */
  1366. cfg->max_cmd_packets_interleave = 0;
  1367. val = 0;
  1368. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1369. &val);
  1370. if (rc) {
  1371. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1372. cfg->insert_dcs_command = true;
  1373. } else if (val == 1) {
  1374. cfg->insert_dcs_command = true;
  1375. } else if (val == 0) {
  1376. cfg->insert_dcs_command = false;
  1377. } else {
  1378. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1379. name);
  1380. rc = -EINVAL;
  1381. goto error;
  1382. }
  1383. error:
  1384. return rc;
  1385. }
  1386. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1387. {
  1388. int rc = 0;
  1389. struct dsi_parser_utils *utils = &panel->utils;
  1390. bool panel_mode_switch_enabled;
  1391. enum dsi_op_mode panel_mode;
  1392. const char *mode;
  1393. mode = utils->get_property(utils->data,
  1394. "qcom,mdss-dsi-panel-type", NULL);
  1395. if (!mode) {
  1396. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1397. panel_mode = DSI_OP_VIDEO_MODE;
  1398. } else if (!strcmp(mode, "dsi_video_mode")) {
  1399. panel_mode = DSI_OP_VIDEO_MODE;
  1400. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1401. panel_mode = DSI_OP_CMD_MODE;
  1402. } else {
  1403. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1404. rc = -EINVAL;
  1405. goto error;
  1406. }
  1407. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1408. "qcom,mdss-dsi-panel-mode-switch");
  1409. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1410. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1411. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1412. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1413. utils,
  1414. panel->name);
  1415. if (rc) {
  1416. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1417. panel->name, rc);
  1418. goto error;
  1419. }
  1420. }
  1421. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1422. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1423. utils,
  1424. panel->name);
  1425. if (rc) {
  1426. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1427. panel->name, rc);
  1428. goto error;
  1429. }
  1430. }
  1431. panel->poms_align_vsync = utils->read_bool(utils->data,
  1432. "qcom,poms-align-panel-vsync");
  1433. panel->panel_mode = panel_mode;
  1434. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1435. error:
  1436. return rc;
  1437. }
  1438. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1439. {
  1440. int rc = 0;
  1441. u32 val = 0;
  1442. const char *str;
  1443. struct dsi_panel_phy_props *props = &panel->phy_props;
  1444. struct dsi_parser_utils *utils = &panel->utils;
  1445. const char *name = panel->name;
  1446. rc = utils->read_u32(utils->data,
  1447. "qcom,mdss-pan-physical-width-dimension", &val);
  1448. if (rc) {
  1449. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1450. props->panel_width_mm = 0;
  1451. rc = 0;
  1452. } else {
  1453. props->panel_width_mm = val;
  1454. }
  1455. rc = utils->read_u32(utils->data,
  1456. "qcom,mdss-pan-physical-height-dimension",
  1457. &val);
  1458. if (rc) {
  1459. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1460. props->panel_height_mm = 0;
  1461. rc = 0;
  1462. } else {
  1463. props->panel_height_mm = val;
  1464. }
  1465. str = utils->get_property(utils->data,
  1466. "qcom,mdss-dsi-panel-orientation", NULL);
  1467. if (!str) {
  1468. props->rotation = DSI_PANEL_ROTATE_NONE;
  1469. } else if (!strcmp(str, "180")) {
  1470. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1471. } else if (!strcmp(str, "hflip")) {
  1472. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1473. } else if (!strcmp(str, "vflip")) {
  1474. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1475. } else {
  1476. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1477. rc = -EINVAL;
  1478. goto error;
  1479. }
  1480. error:
  1481. return rc;
  1482. }
  1483. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1484. "qcom,mdss-dsi-pre-on-command",
  1485. "qcom,mdss-dsi-on-command",
  1486. "qcom,vid-on-commands",
  1487. "qcom,cmd-on-commands",
  1488. "qcom,mdss-dsi-post-panel-on-command",
  1489. "qcom,mdss-dsi-pre-off-command",
  1490. "qcom,mdss-dsi-off-command",
  1491. "qcom,mdss-dsi-post-off-command",
  1492. "qcom,mdss-dsi-pre-res-switch",
  1493. "qcom,mdss-dsi-res-switch",
  1494. "qcom,mdss-dsi-post-res-switch",
  1495. "qcom,video-mode-switch-in-commands",
  1496. "qcom,video-mode-switch-out-commands",
  1497. "qcom,cmd-mode-switch-in-commands",
  1498. "qcom,cmd-mode-switch-out-commands",
  1499. "qcom,mdss-dsi-panel-status-command",
  1500. "qcom,mdss-dsi-lp1-command",
  1501. "qcom,mdss-dsi-lp2-command",
  1502. "qcom,mdss-dsi-nolp-command",
  1503. "PPS not parsed from DTSI, generated dynamically",
  1504. "ROI not parsed from DTSI, generated dynamically",
  1505. "qcom,mdss-dsi-timing-switch-command",
  1506. "qcom,mdss-dsi-post-mode-switch-on-command",
  1507. "qcom,mdss-dsi-qsync-on-commands",
  1508. "qcom,mdss-dsi-qsync-off-commands",
  1509. };
  1510. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1511. "qcom,mdss-dsi-pre-on-command-state",
  1512. "qcom,mdss-dsi-on-command-state",
  1513. "qcom,vid-on-commands-state",
  1514. "qcom,cmd-on-commands-state",
  1515. "qcom,mdss-dsi-post-on-command-state",
  1516. "qcom,mdss-dsi-pre-off-command-state",
  1517. "qcom,mdss-dsi-off-command-state",
  1518. "qcom,mdss-dsi-post-off-command-state",
  1519. "qcom,mdss-dsi-pre-res-switch-state",
  1520. "qcom,mdss-dsi-res-switch-state",
  1521. "qcom,mdss-dsi-post-res-switch-state",
  1522. "qcom,video-mode-switch-in-commands-state",
  1523. "qcom,video-mode-switch-out-commands-state",
  1524. "qcom,cmd-mode-switch-in-commands-state",
  1525. "qcom,cmd-mode-switch-out-commands-state",
  1526. "qcom,mdss-dsi-panel-status-command-state",
  1527. "qcom,mdss-dsi-lp1-command-state",
  1528. "qcom,mdss-dsi-lp2-command-state",
  1529. "qcom,mdss-dsi-nolp-command-state",
  1530. "PPS not parsed from DTSI, generated dynamically",
  1531. "ROI not parsed from DTSI, generated dynamically",
  1532. "qcom,mdss-dsi-timing-switch-command-state",
  1533. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1534. "qcom,mdss-dsi-qsync-on-commands-state",
  1535. "qcom,mdss-dsi-qsync-off-commands-state",
  1536. };
  1537. int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1538. {
  1539. const u32 cmd_set_min_size = 7;
  1540. u32 count = 0;
  1541. u32 packet_length;
  1542. u32 tmp;
  1543. while (length >= cmd_set_min_size) {
  1544. packet_length = cmd_set_min_size;
  1545. tmp = ((data[5] << 8) | (data[6]));
  1546. packet_length += tmp;
  1547. if (packet_length > length) {
  1548. DSI_ERR("format error\n");
  1549. return -EINVAL;
  1550. }
  1551. length -= packet_length;
  1552. data += packet_length;
  1553. count++;
  1554. }
  1555. *cnt = count;
  1556. return 0;
  1557. }
  1558. int dsi_panel_create_cmd_packets(const char *data,
  1559. u32 length,
  1560. u32 count,
  1561. struct dsi_cmd_desc *cmd)
  1562. {
  1563. int rc = 0;
  1564. int i, j;
  1565. u8 *payload;
  1566. for (i = 0; i < count; i++) {
  1567. u32 size;
  1568. cmd[i].msg.type = data[0];
  1569. cmd[i].msg.channel = data[2];
  1570. cmd[i].msg.flags |= data[3];
  1571. cmd[i].ctrl = 0;
  1572. cmd[i].post_wait_ms = data[4];
  1573. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1574. if (cmd[i].msg.flags & MIPI_DSI_MSG_BATCH_COMMAND)
  1575. cmd[i].last_command = false;
  1576. else
  1577. cmd[i].last_command = true;
  1578. size = cmd[i].msg.tx_len * sizeof(u8);
  1579. payload = kzalloc(size, GFP_KERNEL);
  1580. if (!payload) {
  1581. rc = -ENOMEM;
  1582. goto error_free_payloads;
  1583. }
  1584. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1585. payload[j] = data[7 + j];
  1586. cmd[i].msg.tx_buf = payload;
  1587. data += (7 + cmd[i].msg.tx_len);
  1588. }
  1589. return rc;
  1590. error_free_payloads:
  1591. for (i = i - 1; i >= 0; i--) {
  1592. cmd--;
  1593. kfree(cmd->msg.tx_buf);
  1594. }
  1595. return rc;
  1596. }
  1597. void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1598. {
  1599. u32 i = 0;
  1600. struct dsi_cmd_desc *cmd;
  1601. for (i = 0; i < set->count; i++) {
  1602. cmd = &set->cmds[i];
  1603. kfree(cmd->msg.tx_buf);
  1604. }
  1605. }
  1606. void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1607. {
  1608. kfree(set->cmds);
  1609. }
  1610. int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1611. u32 packet_count)
  1612. {
  1613. u32 size;
  1614. size = packet_count * sizeof(*cmd->cmds);
  1615. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1616. if (!cmd->cmds)
  1617. return -ENOMEM;
  1618. cmd->count = packet_count;
  1619. return 0;
  1620. }
  1621. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1622. enum dsi_cmd_set_type type,
  1623. struct dsi_parser_utils *utils)
  1624. {
  1625. int rc = 0;
  1626. u32 length = 0;
  1627. const char *data;
  1628. const char *state;
  1629. u32 packet_count = 0;
  1630. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1631. &length);
  1632. if (!data) {
  1633. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1634. rc = -ENOTSUPP;
  1635. goto error;
  1636. }
  1637. DSI_DEBUG("type=%d, name=%s, length=%d\n", type, cmd_set_prop_map[type], length);
  1638. print_hex_dump_debug("", DUMP_PREFIX_NONE, 8, 1, data, length, false);
  1639. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1640. if (rc) {
  1641. DSI_ERR("commands failed, rc=%d\n", rc);
  1642. goto error;
  1643. }
  1644. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1645. packet_count, length);
  1646. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1647. if (rc) {
  1648. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1649. goto error;
  1650. }
  1651. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1652. cmd->cmds);
  1653. if (rc) {
  1654. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1655. goto error_free_mem;
  1656. }
  1657. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1658. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1659. cmd->state = DSI_CMD_SET_STATE_LP;
  1660. } else if (!strcmp(state, "dsi_hs_mode")) {
  1661. cmd->state = DSI_CMD_SET_STATE_HS;
  1662. } else {
  1663. DSI_ERR("[%s] command state unrecognized-%s\n",
  1664. cmd_set_state_map[type], state);
  1665. goto error_free_mem;
  1666. }
  1667. return rc;
  1668. error_free_mem:
  1669. kfree(cmd->cmds);
  1670. cmd->cmds = NULL;
  1671. error:
  1672. return rc;
  1673. }
  1674. static int dsi_panel_parse_cmd_sets(
  1675. struct dsi_display_mode_priv_info *priv_info,
  1676. struct dsi_parser_utils *utils)
  1677. {
  1678. int rc = 0;
  1679. struct dsi_panel_cmd_set *set;
  1680. u32 i;
  1681. if (!priv_info) {
  1682. DSI_ERR("invalid mode priv info\n");
  1683. return -EINVAL;
  1684. }
  1685. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1686. set = &priv_info->cmd_sets[i];
  1687. set->type = i;
  1688. set->count = 0;
  1689. if (i == DSI_CMD_SET_PPS) {
  1690. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1691. if (rc)
  1692. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1693. i, rc);
  1694. set->state = DSI_CMD_SET_STATE_LP;
  1695. } else {
  1696. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1697. if (rc)
  1698. DSI_DEBUG("failed to parse set %d\n", i);
  1699. }
  1700. }
  1701. rc = 0;
  1702. return rc;
  1703. }
  1704. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1705. {
  1706. int rc = 0;
  1707. int i;
  1708. u32 length = 0;
  1709. u32 count = 0;
  1710. u32 size = 0;
  1711. u32 *arr_32 = NULL;
  1712. const u32 *arr;
  1713. struct dsi_parser_utils *utils = &panel->utils;
  1714. struct dsi_reset_seq *seq;
  1715. if (panel->host_config.ext_bridge_mode)
  1716. return 0;
  1717. arr = utils->get_property(utils->data,
  1718. "qcom,mdss-dsi-reset-sequence", &length);
  1719. if (!arr) {
  1720. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1721. rc = -EINVAL;
  1722. goto error;
  1723. }
  1724. if (length & 0x1) {
  1725. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1726. panel->name);
  1727. rc = -EINVAL;
  1728. goto error;
  1729. }
  1730. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1731. length = length / sizeof(u32);
  1732. size = length * sizeof(u32);
  1733. arr_32 = kzalloc(size, GFP_KERNEL);
  1734. if (!arr_32) {
  1735. rc = -ENOMEM;
  1736. goto error;
  1737. }
  1738. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1739. arr_32, length);
  1740. if (rc) {
  1741. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1742. goto error_free_arr_32;
  1743. }
  1744. count = length / 2;
  1745. size = count * sizeof(*seq);
  1746. seq = kzalloc(size, GFP_KERNEL);
  1747. if (!seq) {
  1748. rc = -ENOMEM;
  1749. goto error_free_arr_32;
  1750. }
  1751. panel->reset_config.sequence = seq;
  1752. panel->reset_config.count = count;
  1753. for (i = 0; i < length; i += 2) {
  1754. seq->level = arr_32[i];
  1755. seq->sleep_ms = arr_32[i + 1];
  1756. seq++;
  1757. }
  1758. error_free_arr_32:
  1759. kfree(arr_32);
  1760. error:
  1761. return rc;
  1762. }
  1763. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1764. {
  1765. struct dsi_parser_utils *utils = &panel->utils;
  1766. const char *string;
  1767. int i, rc = 0;
  1768. panel->ulps_feature_enabled =
  1769. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1770. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1771. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1772. panel->ulps_suspend_enabled =
  1773. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1774. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1775. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1776. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1777. "qcom,mdss-dsi-te-using-wd");
  1778. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1779. "qcom,cmd-sync-wait-broadcast");
  1780. panel->lp11_init = utils->read_bool(utils->data,
  1781. "qcom,mdss-dsi-lp11-init");
  1782. panel->reset_gpio_always_on = utils->read_bool(utils->data,
  1783. "qcom,platform-reset-gpio-always-on");
  1784. panel->spr_info.enable = false;
  1785. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1786. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1787. if (!rc) {
  1788. // find match for pack-type string
  1789. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1790. if (msm_spr_pack_type_str[i] &&
  1791. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1792. panel->spr_info.enable = true;
  1793. panel->spr_info.pack_type = i;
  1794. break;
  1795. }
  1796. }
  1797. }
  1798. pr_debug("%s source side spr packing, pack-type %s\n",
  1799. panel->spr_info.enable ? "enable" : "disable",
  1800. panel->spr_info.enable ?
  1801. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1802. return 0;
  1803. }
  1804. static int dsi_panel_parse_jitter_config(
  1805. struct dsi_display_mode *mode,
  1806. struct dsi_parser_utils *utils)
  1807. {
  1808. int rc;
  1809. struct dsi_display_mode_priv_info *priv_info;
  1810. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1811. u64 jitter_val = 0;
  1812. priv_info = mode->priv_info;
  1813. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1814. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1815. if (rc) {
  1816. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1817. } else {
  1818. jitter_val = jitter[0];
  1819. jitter_val = div_u64(jitter_val, jitter[1]);
  1820. }
  1821. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1822. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1823. priv_info->panel_jitter_denom =
  1824. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1825. } else {
  1826. priv_info->panel_jitter_numer = jitter[0];
  1827. priv_info->panel_jitter_denom = jitter[1];
  1828. }
  1829. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1830. &priv_info->panel_prefill_lines);
  1831. if (rc) {
  1832. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1833. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1834. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1835. } else if (priv_info->panel_prefill_lines >=
  1836. DSI_V_TOTAL(&mode->timing)) {
  1837. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1838. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1839. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1840. }
  1841. return 0;
  1842. }
  1843. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1844. {
  1845. int rc = 0;
  1846. char *supply_name;
  1847. if (panel->host_config.ext_bridge_mode)
  1848. return 0;
  1849. if (!strcmp(panel->type, "primary"))
  1850. supply_name = "qcom,panel-supply-entries";
  1851. else
  1852. supply_name = "qcom,panel-sec-supply-entries";
  1853. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1854. &panel->power_info, supply_name);
  1855. if (rc) {
  1856. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1857. goto error;
  1858. }
  1859. error:
  1860. return rc;
  1861. }
  1862. int dsi_panel_get_io_resources(struct dsi_panel *panel,
  1863. struct msm_io_res *io_res)
  1864. {
  1865. struct list_head temp_head;
  1866. struct msm_io_mem_entry *io_mem, *pos, *tmp;
  1867. struct list_head *mem_list = &io_res->mem;
  1868. int i, rc = 0;
  1869. INIT_LIST_HEAD(&temp_head);
  1870. for (i = 0; i < panel->tlmm_gpio_count; i++) {
  1871. io_mem = kzalloc(sizeof(*io_mem), GFP_KERNEL);
  1872. if (!io_mem) {
  1873. rc = -ENOMEM;
  1874. goto parse_fail;
  1875. }
  1876. io_mem->base = panel->tlmm_gpio[i].addr;
  1877. io_mem->size = panel->tlmm_gpio[i].size;
  1878. list_add(&io_mem->list, &temp_head);
  1879. }
  1880. list_splice(&temp_head, mem_list);
  1881. goto end;
  1882. parse_fail:
  1883. list_for_each_entry_safe(pos, tmp, &temp_head, list) {
  1884. list_del(&pos->list);
  1885. kfree(pos);
  1886. }
  1887. end:
  1888. return rc;
  1889. }
  1890. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1891. {
  1892. int rc = 0;
  1893. const char *data;
  1894. struct dsi_parser_utils *utils = &panel->utils;
  1895. char *reset_gpio_name, *mode_set_gpio_name;
  1896. if (!strcmp(panel->type, "primary")) {
  1897. reset_gpio_name = "qcom,platform-reset-gpio";
  1898. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1899. } else {
  1900. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1901. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1902. }
  1903. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1904. reset_gpio_name, 0);
  1905. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1906. !panel->host_config.ext_bridge_mode) {
  1907. DSI_DEBUG("[%s] reset gpio not set, rc=%d\n", panel->name,
  1908. panel->reset_config.reset_gpio);
  1909. }
  1910. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1911. "qcom,5v-boost-gpio",
  1912. 0);
  1913. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1914. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1915. panel->name, rc);
  1916. panel->reset_config.disp_en_gpio =
  1917. utils->get_named_gpio(utils->data,
  1918. "qcom,platform-en-gpio", 0);
  1919. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1920. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1921. panel->name, rc);
  1922. }
  1923. }
  1924. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1925. utils->data, mode_set_gpio_name, 0);
  1926. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1927. DSI_DEBUG("mode gpio not specified\n");
  1928. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1929. data = utils->get_property(utils->data,
  1930. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1931. if (data) {
  1932. if (!strcmp(data, "single_port"))
  1933. panel->reset_config.mode_sel_state =
  1934. MODE_SEL_SINGLE_PORT;
  1935. else if (!strcmp(data, "dual_port"))
  1936. panel->reset_config.mode_sel_state =
  1937. MODE_SEL_DUAL_PORT;
  1938. else if (!strcmp(data, "high"))
  1939. panel->reset_config.mode_sel_state =
  1940. MODE_GPIO_HIGH;
  1941. else if (!strcmp(data, "low"))
  1942. panel->reset_config.mode_sel_state =
  1943. MODE_GPIO_LOW;
  1944. } else {
  1945. /* Set default mode as SPLIT mode */
  1946. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1947. }
  1948. /* TODO: release memory */
  1949. rc = dsi_panel_parse_reset_sequence(panel);
  1950. if (rc) {
  1951. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1952. panel->name, rc);
  1953. goto error;
  1954. }
  1955. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1956. "qcom,mdss-dsi-panel-test-pin",
  1957. 0);
  1958. if (!gpio_is_valid(panel->panel_test_gpio))
  1959. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1960. __LINE__);
  1961. error:
  1962. return rc;
  1963. }
  1964. static int dsi_panel_parse_tlmm_gpio(struct dsi_panel *panel)
  1965. {
  1966. struct dsi_parser_utils *utils = &panel->utils;
  1967. u32 base, size, pin;
  1968. int pin_count, address_count, name_count, i;
  1969. address_count = utils->count_u32_elems(utils->data,
  1970. "qcom,dsi-panel-gpio-address");
  1971. if (address_count != 2) {
  1972. DSI_DEBUG("panel gpio address not defined\n");
  1973. return 0;
  1974. }
  1975. utils->read_u32_index(utils->data,
  1976. "qcom,dsi-panel-gpio-address", 0, &base);
  1977. utils->read_u32_index(utils->data,
  1978. "qcom,dsi-panel-gpio-address", 1, &size);
  1979. pin_count = utils->count_u32_elems(utils->data,
  1980. "qcom,dsi-panel-gpio-pins");
  1981. name_count = utils->count_strings(utils->data,
  1982. "qcom,dsi-panel-gpio-names");
  1983. if ((pin_count < 0) || (name_count < 0) || (pin_count != name_count)) {
  1984. DSI_ERR("invalid gpio pins/names\n");
  1985. return -EINVAL;
  1986. }
  1987. panel->tlmm_gpio = kcalloc(pin_count,
  1988. sizeof(struct dsi_tlmm_gpio), GFP_KERNEL);
  1989. if (!panel->tlmm_gpio)
  1990. return -ENOMEM;
  1991. panel->tlmm_gpio_count = pin_count;
  1992. for (i = 0; i < pin_count; i++) {
  1993. utils->read_u32_index(utils->data,
  1994. "qcom,dsi-panel-gpio-pins", i, &pin);
  1995. panel->tlmm_gpio[i].num = pin;
  1996. panel->tlmm_gpio[i].addr = base + (pin * size);
  1997. panel->tlmm_gpio[i].size = size;
  1998. utils->read_string_index(utils->data,
  1999. "qcom,dsi-panel-gpio-names", i,
  2000. &(panel->tlmm_gpio[i].name));
  2001. }
  2002. return 0;
  2003. }
  2004. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  2005. {
  2006. int rc = 0;
  2007. u32 val;
  2008. struct dsi_backlight_config *config = &panel->bl_config;
  2009. struct dsi_parser_utils *utils = &panel->utils;
  2010. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  2011. &val);
  2012. if (rc) {
  2013. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  2014. goto error;
  2015. }
  2016. config->pwm_period_usecs = val;
  2017. error:
  2018. return rc;
  2019. }
  2020. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  2021. {
  2022. int rc = 0;
  2023. u32 val = 0;
  2024. const char *bl_type = NULL;
  2025. const char *data = NULL;
  2026. const char *state = NULL;
  2027. struct dsi_parser_utils *utils = &panel->utils;
  2028. char *bl_name = NULL;
  2029. if (!strcmp(panel->type, "primary"))
  2030. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  2031. else
  2032. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  2033. bl_type = utils->get_property(utils->data, bl_name, NULL);
  2034. if (!bl_type) {
  2035. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2036. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  2037. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  2038. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  2039. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  2040. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  2041. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  2042. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  2043. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  2044. } else {
  2045. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  2046. panel->name, bl_type);
  2047. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2048. }
  2049. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  2050. if (!data) {
  2051. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2052. } else if (!strcmp(data, "delay_until_first_frame")) {
  2053. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  2054. } else {
  2055. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  2056. panel->name, data);
  2057. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2058. }
  2059. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  2060. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  2061. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  2062. if (rc) {
  2063. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  2064. panel->name);
  2065. panel->bl_config.bl_min_level = 0;
  2066. } else {
  2067. panel->bl_config.bl_min_level = val;
  2068. }
  2069. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  2070. if (rc) {
  2071. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  2072. panel->name);
  2073. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  2074. } else {
  2075. panel->bl_config.bl_max_level = val;
  2076. }
  2077. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  2078. &val);
  2079. if (rc) {
  2080. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  2081. panel->name);
  2082. panel->bl_config.brightness_max_level = 255;
  2083. rc = 0;
  2084. } else {
  2085. panel->bl_config.brightness_max_level = val;
  2086. }
  2087. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  2088. "qcom,mdss-dsi-bl-inverted-dbv");
  2089. state = utils->get_property(utils->data, "qcom,bl-dsc-cmd-state", NULL);
  2090. if (!state || !strcmp(state, "dsi_hs_mode"))
  2091. panel->bl_config.lp_mode = false;
  2092. else if (!strcmp(state, "dsi_lp_mode"))
  2093. panel->bl_config.lp_mode = true;
  2094. else
  2095. DSI_ERR("bl-dsc-cmd-state command state unrecognized-%s\n",
  2096. state);
  2097. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  2098. rc = dsi_panel_parse_bl_pwm_config(panel);
  2099. if (rc) {
  2100. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  2101. panel->name, rc);
  2102. goto error;
  2103. }
  2104. }
  2105. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  2106. "qcom,platform-bklight-en-gpio",
  2107. 0);
  2108. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  2109. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  2110. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2111. panel->name, rc);
  2112. rc = -EPROBE_DEFER;
  2113. goto error;
  2114. } else {
  2115. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2116. panel->name, rc);
  2117. rc = 0;
  2118. goto error;
  2119. }
  2120. }
  2121. error:
  2122. return rc;
  2123. }
  2124. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2125. struct dsi_parser_utils *utils)
  2126. {
  2127. const char *data;
  2128. u32 len, i;
  2129. int rc = 0;
  2130. struct dsi_display_mode_priv_info *priv_info;
  2131. u64 pixel_clk_khz;
  2132. if (!mode || !mode->priv_info)
  2133. return -EINVAL;
  2134. priv_info = mode->priv_info;
  2135. data = utils->get_property(utils->data,
  2136. "qcom,mdss-dsi-panel-phy-timings", &len);
  2137. if (!data) {
  2138. DSI_DEBUG("Unable to read Phy timing settings\n");
  2139. } else {
  2140. priv_info->phy_timing_val =
  2141. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2142. if (!priv_info->phy_timing_val)
  2143. return -EINVAL;
  2144. for (i = 0; i < len; i++)
  2145. priv_info->phy_timing_val[i] = data[i];
  2146. priv_info->phy_timing_len = len;
  2147. }
  2148. if (mode->panel_mode_caps & DSI_OP_VIDEO_MODE) {
  2149. /*
  2150. * For command mode we update the pclk as part of
  2151. * function dsi_panel_calc_dsi_transfer_time( )
  2152. * as we set it based on dsi clock or mdp transfer time.
  2153. */
  2154. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  2155. DSI_V_TOTAL(&mode->timing) *
  2156. mode->timing.refresh_rate);
  2157. do_div(pixel_clk_khz, 1000);
  2158. mode->pixel_clk_khz = pixel_clk_khz;
  2159. }
  2160. return rc;
  2161. }
  2162. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2163. struct dsi_parser_utils *utils)
  2164. {
  2165. u32 data;
  2166. int rc = -EINVAL;
  2167. int intf_width;
  2168. const char *compression;
  2169. struct dsi_display_mode_priv_info *priv_info;
  2170. if (!mode || !mode->priv_info)
  2171. return -EINVAL;
  2172. priv_info = mode->priv_info;
  2173. priv_info->dsc_enabled = false;
  2174. compression = utils->get_property(utils->data,
  2175. "qcom,compression-mode", NULL);
  2176. if (compression && !strcmp(compression, "dsc"))
  2177. priv_info->dsc_enabled = true;
  2178. if (!priv_info->dsc_enabled) {
  2179. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2180. return 0;
  2181. }
  2182. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2183. if (rc) {
  2184. priv_info->dsc.config.dsc_version_major = 0x1;
  2185. priv_info->dsc.config.dsc_version_minor = 0x1;
  2186. rc = 0;
  2187. } else {
  2188. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2189. * major version information
  2190. */
  2191. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  2192. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  2193. if ((priv_info->dsc.config.dsc_version_major != 0x1) ||
  2194. ((priv_info->dsc.config.dsc_version_minor
  2195. != 0x1) &&
  2196. (priv_info->dsc.config.dsc_version_minor
  2197. != 0x2))) {
  2198. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2199. __func__,
  2200. priv_info->dsc.config.dsc_version_major,
  2201. priv_info->dsc.config.dsc_version_minor
  2202. );
  2203. rc = -EINVAL;
  2204. goto error;
  2205. }
  2206. }
  2207. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2208. if (rc) {
  2209. priv_info->dsc.scr_rev = 0x0;
  2210. rc = 0;
  2211. } else {
  2212. priv_info->dsc.scr_rev = data & 0xff;
  2213. /* only one scr rev supported */
  2214. if (priv_info->dsc.scr_rev > 0x1) {
  2215. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2216. __func__, priv_info->dsc.scr_rev);
  2217. rc = -EINVAL;
  2218. goto error;
  2219. }
  2220. }
  2221. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2222. if (rc) {
  2223. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2224. goto error;
  2225. }
  2226. priv_info->dsc.config.slice_height = data;
  2227. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2228. if (rc) {
  2229. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2230. goto error;
  2231. }
  2232. priv_info->dsc.config.slice_width = data;
  2233. intf_width = mode->timing.h_active;
  2234. if (intf_width % priv_info->dsc.config.slice_width) {
  2235. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2236. intf_width, priv_info->dsc.config.slice_width);
  2237. rc = -EINVAL;
  2238. goto error;
  2239. }
  2240. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2241. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2242. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2243. if (rc) {
  2244. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2245. goto error;
  2246. } else if (!data || (data > 2)) {
  2247. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2248. goto error;
  2249. }
  2250. priv_info->dsc.slice_per_pkt = data;
  2251. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2252. &data);
  2253. if (rc) {
  2254. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2255. goto error;
  2256. }
  2257. priv_info->dsc.config.bits_per_component = data;
  2258. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2259. if (rc) {
  2260. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2261. data = 0;
  2262. }
  2263. priv_info->dsc.pps_delay_ms = data;
  2264. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2265. &data);
  2266. if (rc) {
  2267. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2268. goto error;
  2269. }
  2270. priv_info->dsc.config.bits_per_pixel = data << 4;
  2271. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2272. &data);
  2273. if (rc) {
  2274. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2275. rc = 0;
  2276. data = MSM_CHROMA_444;
  2277. }
  2278. priv_info->dsc.chroma_format = data;
  2279. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2280. &data);
  2281. if (rc) {
  2282. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2283. rc = 0;
  2284. data = MSM_RGB;
  2285. }
  2286. priv_info->dsc.source_color_space = data;
  2287. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2288. "qcom,mdss-dsc-block-prediction-enable");
  2289. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2290. priv_info->dsc.config.slice_width);
  2291. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2292. priv_info->dsc.scr_rev);
  2293. if (rc) {
  2294. DSI_DEBUG("failed populating dsc params\n");
  2295. rc = -EINVAL;
  2296. goto error;
  2297. }
  2298. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2299. if (rc) {
  2300. DSI_DEBUG("failed populating other dsc params\n");
  2301. rc = -EINVAL;
  2302. goto error;
  2303. }
  2304. priv_info->pclk_scale.numer =
  2305. priv_info->dsc.config.bits_per_pixel >> 4;
  2306. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2307. priv_info->dsc.chroma_format,
  2308. priv_info->dsc.config.bits_per_component);
  2309. mode->timing.dsc_enabled = true;
  2310. mode->timing.dsc = &priv_info->dsc;
  2311. mode->timing.pclk_scale = priv_info->pclk_scale;
  2312. error:
  2313. return rc;
  2314. }
  2315. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2316. struct dsi_parser_utils *utils, int traffic_mode)
  2317. {
  2318. u32 data;
  2319. int rc = -EINVAL;
  2320. const char *compression;
  2321. struct dsi_display_mode_priv_info *priv_info;
  2322. int intf_width;
  2323. if (!mode || !mode->priv_info)
  2324. return -EINVAL;
  2325. priv_info = mode->priv_info;
  2326. priv_info->vdc_enabled = false;
  2327. compression = utils->get_property(utils->data,
  2328. "qcom,compression-mode", NULL);
  2329. if (compression && !strcmp(compression, "vdc"))
  2330. priv_info->vdc_enabled = true;
  2331. if (!priv_info->vdc_enabled) {
  2332. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2333. return 0;
  2334. }
  2335. priv_info->vdc.traffic_mode = traffic_mode;
  2336. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2337. if (rc) {
  2338. priv_info->vdc.version_major = 0x1;
  2339. priv_info->vdc.version_minor = 0x2;
  2340. priv_info->vdc.version_release = 0x0;
  2341. rc = 0;
  2342. } else {
  2343. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2344. * major version information
  2345. */
  2346. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2347. priv_info->vdc.version_minor = data & 0x0F;
  2348. if ((priv_info->vdc.version_major != 0x1) &&
  2349. ((priv_info->vdc.version_minor
  2350. != 0x2))) {
  2351. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2352. __func__,
  2353. priv_info->vdc.version_major,
  2354. priv_info->vdc.version_minor
  2355. );
  2356. rc = -EINVAL;
  2357. goto error;
  2358. }
  2359. }
  2360. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2361. if (rc) {
  2362. priv_info->vdc.version_release = 0x0;
  2363. rc = 0;
  2364. } else {
  2365. priv_info->vdc.version_release = data & 0xff;
  2366. /* only one release version is supported */
  2367. if (priv_info->vdc.version_release != 0x0) {
  2368. DSI_ERR("unsupported vdc release version %d\n",
  2369. priv_info->vdc.version_release);
  2370. rc = -EINVAL;
  2371. goto error;
  2372. }
  2373. }
  2374. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2375. priv_info->vdc.version_major,
  2376. priv_info->vdc.version_minor,
  2377. priv_info->vdc.version_release);
  2378. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2379. if (rc) {
  2380. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2381. goto error;
  2382. }
  2383. priv_info->vdc.slice_height = data;
  2384. /* slice height should be atleast 16 lines */
  2385. if (priv_info->vdc.slice_height < 16) {
  2386. DSI_ERR("invalid slice height %d\n",
  2387. priv_info->vdc.slice_height);
  2388. rc = -EINVAL;
  2389. goto error;
  2390. }
  2391. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2392. if (rc) {
  2393. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2394. goto error;
  2395. }
  2396. priv_info->vdc.slice_width = data;
  2397. /*
  2398. * slide-width should be multiple of 8
  2399. * slice-width should be atlease 64 pixels
  2400. */
  2401. if ((priv_info->vdc.slice_width & 7) ||
  2402. (priv_info->vdc.slice_width < 64)) {
  2403. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2404. rc = -EINVAL;
  2405. goto error;
  2406. }
  2407. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2408. if (rc) {
  2409. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2410. goto error;
  2411. } else if (!data || (data > 2)) {
  2412. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2413. rc = -EINVAL;
  2414. goto error;
  2415. }
  2416. intf_width = mode->timing.h_active;
  2417. priv_info->vdc.slice_per_pkt = data;
  2418. priv_info->vdc.frame_width = mode->timing.h_active;
  2419. priv_info->vdc.frame_height = mode->timing.v_active;
  2420. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2421. &data);
  2422. if (rc) {
  2423. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2424. goto error;
  2425. }
  2426. priv_info->vdc.bits_per_component = data;
  2427. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2428. if (rc) {
  2429. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2430. data = 0;
  2431. }
  2432. priv_info->vdc.pps_delay_ms = data;
  2433. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2434. &data);
  2435. if (rc) {
  2436. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2437. goto error;
  2438. }
  2439. priv_info->vdc.bits_per_pixel = data << 4;
  2440. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2441. &data);
  2442. if (rc) {
  2443. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2444. rc = 0;
  2445. data = MSM_CHROMA_444;
  2446. }
  2447. priv_info->vdc.chroma_format = data;
  2448. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2449. &data);
  2450. if (rc) {
  2451. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2452. rc = 0;
  2453. data = MSM_RGB;
  2454. }
  2455. priv_info->vdc.source_color_space = data;
  2456. rc = sde_vdc_populate_config(&priv_info->vdc,
  2457. intf_width, traffic_mode);
  2458. if (rc) {
  2459. DSI_DEBUG("failed populating vdc config\n");
  2460. rc = -EINVAL;
  2461. goto error;
  2462. }
  2463. priv_info->pclk_scale.numer =
  2464. priv_info->vdc.bits_per_pixel >> 4;
  2465. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2466. priv_info->vdc.chroma_format,
  2467. priv_info->vdc.bits_per_component);
  2468. mode->timing.vdc_enabled = true;
  2469. mode->timing.vdc = &priv_info->vdc;
  2470. mode->timing.pclk_scale = priv_info->pclk_scale;
  2471. error:
  2472. return rc;
  2473. }
  2474. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2475. {
  2476. int rc = 0;
  2477. struct drm_panel_hdr_properties *hdr_prop;
  2478. struct dsi_parser_utils *utils = &panel->utils;
  2479. hdr_prop = &panel->hdr_props;
  2480. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2481. "qcom,mdss-dsi-panel-hdr-enabled");
  2482. if (hdr_prop->hdr_enabled) {
  2483. rc = utils->read_u32_array(utils->data,
  2484. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2485. hdr_prop->display_primaries,
  2486. DISPLAY_PRIMARIES_MAX);
  2487. if (rc) {
  2488. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2489. __func__, __LINE__, rc);
  2490. hdr_prop->hdr_enabled = false;
  2491. return rc;
  2492. }
  2493. rc = utils->read_u32(utils->data,
  2494. "qcom,mdss-dsi-panel-peak-brightness",
  2495. &(hdr_prop->peak_brightness));
  2496. if (rc) {
  2497. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2498. __func__, __LINE__, rc);
  2499. hdr_prop->hdr_enabled = false;
  2500. return rc;
  2501. }
  2502. rc = utils->read_u32(utils->data,
  2503. "qcom,mdss-dsi-panel-blackness-level",
  2504. &(hdr_prop->blackness_level));
  2505. if (rc) {
  2506. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2507. __func__, __LINE__, rc);
  2508. hdr_prop->hdr_enabled = false;
  2509. return rc;
  2510. }
  2511. }
  2512. return 0;
  2513. }
  2514. static int dsi_panel_parse_topology(
  2515. struct dsi_display_mode_priv_info *priv_info,
  2516. struct dsi_parser_utils *utils,
  2517. int topology_override)
  2518. {
  2519. struct msm_display_topology *topology;
  2520. u32 top_count, top_sel, *array = NULL;
  2521. int i, len = 0;
  2522. int rc = -EINVAL;
  2523. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2524. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2525. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2526. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2527. return rc;
  2528. }
  2529. top_count = len / TOPOLOGY_SET_LEN;
  2530. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2531. if (!array)
  2532. return -ENOMEM;
  2533. rc = utils->read_u32_array(utils->data,
  2534. "qcom,display-topology", array, len);
  2535. if (rc) {
  2536. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2537. goto read_fail;
  2538. }
  2539. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2540. if (!topology) {
  2541. rc = -ENOMEM;
  2542. goto read_fail;
  2543. }
  2544. for (i = 0; i < top_count; i++) {
  2545. struct msm_display_topology *top = &topology[i];
  2546. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2547. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2548. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2549. }
  2550. if (topology_override >= 0 && topology_override < top_count) {
  2551. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2552. topology_override,
  2553. topology[topology_override].num_lm,
  2554. topology[topology_override].num_enc,
  2555. topology[topology_override].num_intf);
  2556. top_sel = topology_override;
  2557. goto parse_done;
  2558. }
  2559. rc = utils->read_u32(utils->data,
  2560. "qcom,default-topology-index", &top_sel);
  2561. if (rc) {
  2562. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2563. goto parse_fail;
  2564. }
  2565. if (top_sel >= top_count) {
  2566. rc = -EINVAL;
  2567. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2568. rc);
  2569. goto parse_fail;
  2570. }
  2571. if (!(priv_info->dsc_enabled || priv_info->vdc_enabled) !=
  2572. !topology[top_sel].num_enc) {
  2573. DSI_ERR("topology and compression info mismatch dsc:%d vdc:%d num_enc:%d\n",
  2574. priv_info->dsc_enabled, priv_info->vdc_enabled,
  2575. topology[top_sel].num_enc);
  2576. goto parse_fail;
  2577. }
  2578. if (priv_info->dsc_enabled)
  2579. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_DSC;
  2580. else if (priv_info->vdc_enabled)
  2581. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_VDC;
  2582. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2583. topology[top_sel].num_lm,
  2584. topology[top_sel].num_enc,
  2585. topology[top_sel].num_intf);
  2586. parse_done:
  2587. memcpy(&priv_info->topology, &topology[top_sel],
  2588. sizeof(struct msm_display_topology));
  2589. parse_fail:
  2590. kfree(topology);
  2591. read_fail:
  2592. kfree(array);
  2593. return rc;
  2594. }
  2595. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2596. struct msm_roi_alignment *align)
  2597. {
  2598. int len = 0, rc = 0;
  2599. u32 value[6];
  2600. struct property *data;
  2601. if (!align)
  2602. return -EINVAL;
  2603. memset(align, 0, sizeof(*align));
  2604. data = utils->find_property(utils->data,
  2605. "qcom,panel-roi-alignment", &len);
  2606. len /= sizeof(u32);
  2607. if (!data) {
  2608. DSI_ERR("panel roi alignment not found\n");
  2609. rc = -EINVAL;
  2610. } else if (len != 6) {
  2611. DSI_ERR("incorrect roi alignment len %d\n", len);
  2612. rc = -EINVAL;
  2613. } else {
  2614. rc = utils->read_u32_array(utils->data,
  2615. "qcom,panel-roi-alignment", value, len);
  2616. if (rc)
  2617. DSI_DEBUG("error reading panel roi alignment values\n");
  2618. else {
  2619. align->xstart_pix_align = value[0];
  2620. align->ystart_pix_align = value[1];
  2621. align->width_pix_align = value[2];
  2622. align->height_pix_align = value[3];
  2623. align->min_width = value[4];
  2624. align->min_height = value[5];
  2625. }
  2626. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2627. align->xstart_pix_align,
  2628. align->width_pix_align,
  2629. align->ystart_pix_align,
  2630. align->height_pix_align,
  2631. align->min_width,
  2632. align->min_height);
  2633. }
  2634. return rc;
  2635. }
  2636. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2637. struct dsi_parser_utils *utils)
  2638. {
  2639. struct msm_roi_caps *roi_caps = NULL;
  2640. const char *data;
  2641. int rc = 0;
  2642. if (!mode || !mode->priv_info) {
  2643. DSI_ERR("invalid arguments\n");
  2644. return -EINVAL;
  2645. }
  2646. roi_caps = &mode->priv_info->roi_caps;
  2647. memset(roi_caps, 0, sizeof(*roi_caps));
  2648. data = utils->get_property(utils->data,
  2649. "qcom,partial-update-enabled", NULL);
  2650. if (data) {
  2651. if (!strcmp(data, "dual_roi"))
  2652. roi_caps->num_roi = 2;
  2653. else if (!strcmp(data, "single_roi"))
  2654. roi_caps->num_roi = 1;
  2655. else {
  2656. DSI_INFO(
  2657. "invalid value for qcom,partial-update-enabled: %s\n",
  2658. data);
  2659. return 0;
  2660. }
  2661. } else {
  2662. DSI_DEBUG("partial update disabled as the property is not set\n");
  2663. return 0;
  2664. }
  2665. roi_caps->merge_rois = utils->read_bool(utils->data,
  2666. "qcom,partial-update-roi-merge");
  2667. roi_caps->enabled = roi_caps->num_roi > 0;
  2668. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2669. roi_caps->enabled);
  2670. if (roi_caps->enabled)
  2671. rc = dsi_panel_parse_roi_alignment(utils,
  2672. &roi_caps->align);
  2673. if (rc)
  2674. memset(roi_caps, 0, sizeof(*roi_caps));
  2675. return rc;
  2676. }
  2677. static bool dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2678. struct dsi_parser_utils *utils)
  2679. {
  2680. if (!mode || !mode->priv_info) {
  2681. DSI_ERR("invalid arguments\n");
  2682. return false;
  2683. }
  2684. if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
  2685. mode->panel_mode_caps |= DSI_OP_VIDEO_MODE;
  2686. if (utils->read_bool(utils->data, "qcom,mdss-dsi-cmd-mode"))
  2687. mode->panel_mode_caps |= DSI_OP_CMD_MODE;
  2688. if (!mode->panel_mode_caps)
  2689. return false;
  2690. return true;
  2691. };
  2692. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2693. {
  2694. int dms_enabled;
  2695. const char *data;
  2696. struct dsi_parser_utils *utils = &panel->utils;
  2697. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2698. dms_enabled = utils->read_bool(utils->data,
  2699. "qcom,dynamic-mode-switch-enabled");
  2700. if (!dms_enabled)
  2701. return 0;
  2702. data = utils->get_property(utils->data,
  2703. "qcom,dynamic-mode-switch-type", NULL);
  2704. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2705. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2706. } else {
  2707. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2708. panel->name, data);
  2709. return -EINVAL;
  2710. }
  2711. return 0;
  2712. };
  2713. /*
  2714. * The length of all the valid values to be checked should not be greater
  2715. * than the length of returned data from read command.
  2716. */
  2717. static bool
  2718. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2719. {
  2720. int i;
  2721. struct drm_panel_esd_config *config = &panel->esd_config;
  2722. for (i = 0; i < count; ++i) {
  2723. if (config->status_valid_params[i] >
  2724. config->status_cmds_rlen[i]) {
  2725. DSI_DEBUG("ignore valid params\n");
  2726. return false;
  2727. }
  2728. }
  2729. return true;
  2730. }
  2731. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2732. char *prop_key, u32 **target, u32 cmd_cnt)
  2733. {
  2734. int tmp;
  2735. if (!utils->find_property(utils->data, prop_key, &tmp))
  2736. return false;
  2737. tmp /= sizeof(u32);
  2738. if (tmp != cmd_cnt) {
  2739. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2740. tmp, cmd_cnt);
  2741. return false;
  2742. }
  2743. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2744. if (IS_ERR_OR_NULL(*target)) {
  2745. DSI_ERR("Error allocating memory for property\n");
  2746. return false;
  2747. }
  2748. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2749. DSI_ERR("cannot get values from dts\n");
  2750. kfree(*target);
  2751. *target = NULL;
  2752. return false;
  2753. }
  2754. return true;
  2755. }
  2756. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2757. {
  2758. kfree(esd_config->status_buf);
  2759. kfree(esd_config->return_buf);
  2760. kfree(esd_config->status_value);
  2761. kfree(esd_config->status_valid_params);
  2762. kfree(esd_config->status_cmds_rlen);
  2763. kfree(esd_config->status_cmd.cmds);
  2764. }
  2765. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2766. {
  2767. struct drm_panel_esd_config *esd_config;
  2768. int rc = 0;
  2769. u32 tmp;
  2770. u32 i, status_len, *lenp;
  2771. struct property *data;
  2772. struct dsi_parser_utils *utils = &panel->utils;
  2773. if (!panel) {
  2774. DSI_ERR("Invalid Params\n");
  2775. return -EINVAL;
  2776. }
  2777. esd_config = &panel->esd_config;
  2778. if (!esd_config)
  2779. return -EINVAL;
  2780. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2781. DSI_CMD_SET_PANEL_STATUS, utils);
  2782. if (!esd_config->status_cmd.count) {
  2783. DSI_ERR("panel status command parsing failed\n");
  2784. rc = -EINVAL;
  2785. goto error;
  2786. }
  2787. if (!dsi_panel_parse_esd_status_len(utils,
  2788. "qcom,mdss-dsi-panel-status-read-length",
  2789. &panel->esd_config.status_cmds_rlen,
  2790. esd_config->status_cmd.count)) {
  2791. DSI_ERR("Invalid status read length\n");
  2792. rc = -EINVAL;
  2793. goto error1;
  2794. }
  2795. if (dsi_panel_parse_esd_status_len(utils,
  2796. "qcom,mdss-dsi-panel-status-valid-params",
  2797. &panel->esd_config.status_valid_params,
  2798. esd_config->status_cmd.count)) {
  2799. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2800. esd_config->status_cmd.count)) {
  2801. rc = -EINVAL;
  2802. goto error2;
  2803. }
  2804. }
  2805. status_len = 0;
  2806. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2807. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2808. status_len += lenp[i];
  2809. if (!status_len) {
  2810. rc = -EINVAL;
  2811. goto error2;
  2812. }
  2813. /*
  2814. * Some panel may need multiple read commands to properly
  2815. * check panel status. Do a sanity check for proper status
  2816. * value which will be compared with the value read by dsi
  2817. * controller during ESD check. Also check if multiple read
  2818. * commands are there then, there should be corresponding
  2819. * status check values for each read command.
  2820. */
  2821. data = utils->find_property(utils->data,
  2822. "qcom,mdss-dsi-panel-status-value", &tmp);
  2823. tmp /= sizeof(u32);
  2824. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2825. esd_config->groups = tmp / status_len;
  2826. } else {
  2827. DSI_ERR("error parse panel-status-value\n");
  2828. rc = -EINVAL;
  2829. goto error2;
  2830. }
  2831. esd_config->status_value =
  2832. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2833. GFP_KERNEL);
  2834. if (!esd_config->status_value) {
  2835. rc = -ENOMEM;
  2836. goto error2;
  2837. }
  2838. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2839. sizeof(unsigned char), GFP_KERNEL);
  2840. if (!esd_config->return_buf) {
  2841. rc = -ENOMEM;
  2842. goto error3;
  2843. }
  2844. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2845. if (!esd_config->status_buf) {
  2846. rc = -ENOMEM;
  2847. goto error4;
  2848. }
  2849. rc = utils->read_u32_array(utils->data,
  2850. "qcom,mdss-dsi-panel-status-value",
  2851. esd_config->status_value, esd_config->groups * status_len);
  2852. if (rc) {
  2853. DSI_DEBUG("error reading panel status values\n");
  2854. memset(esd_config->status_value, 0,
  2855. esd_config->groups * status_len);
  2856. }
  2857. return 0;
  2858. error4:
  2859. kfree(esd_config->return_buf);
  2860. error3:
  2861. kfree(esd_config->status_value);
  2862. error2:
  2863. kfree(esd_config->status_valid_params);
  2864. kfree(esd_config->status_cmds_rlen);
  2865. error1:
  2866. kfree(esd_config->status_cmd.cmds);
  2867. error:
  2868. return rc;
  2869. }
  2870. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2871. {
  2872. int rc = 0;
  2873. const char *string;
  2874. struct drm_panel_esd_config *esd_config;
  2875. struct dsi_parser_utils *utils = &panel->utils;
  2876. u8 *esd_mode = NULL;
  2877. esd_config = &panel->esd_config;
  2878. esd_config->status_mode = ESD_MODE_MAX;
  2879. esd_config->esd_enabled = utils->read_bool(utils->data,
  2880. "qcom,esd-check-enabled");
  2881. if (!esd_config->esd_enabled)
  2882. return 0;
  2883. rc = utils->read_string(utils->data,
  2884. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2885. if (!rc) {
  2886. if (!strcmp(string, "bta_check")) {
  2887. esd_config->status_mode = ESD_MODE_SW_BTA;
  2888. } else if (!strcmp(string, "reg_read")) {
  2889. esd_config->status_mode = ESD_MODE_REG_READ;
  2890. } else if (!strcmp(string, "te_signal_check")) {
  2891. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2892. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2893. } else {
  2894. DSI_ERR("TE-ESD not valid for video mode\n");
  2895. rc = -EINVAL;
  2896. goto error;
  2897. }
  2898. } else {
  2899. DSI_ERR("No valid panel-status-check-mode string\n");
  2900. rc = -EINVAL;
  2901. goto error;
  2902. }
  2903. } else {
  2904. DSI_DEBUG("status check method not defined!\n");
  2905. rc = -EINVAL;
  2906. goto error;
  2907. }
  2908. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2909. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2910. if (rc) {
  2911. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2912. rc);
  2913. goto error;
  2914. }
  2915. esd_mode = "register_read";
  2916. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2917. esd_mode = "bta_trigger";
  2918. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2919. esd_mode = "te_check";
  2920. }
  2921. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2922. return 0;
  2923. error:
  2924. panel->esd_config.esd_enabled = false;
  2925. return rc;
  2926. }
  2927. static void dsi_panel_update_util(struct dsi_panel *panel,
  2928. struct device_node *parser_node)
  2929. {
  2930. struct dsi_parser_utils *utils = &panel->utils;
  2931. if (parser_node) {
  2932. *utils = *dsi_parser_get_parser_utils();
  2933. utils->data = parser_node;
  2934. DSI_DEBUG("switching to parser APIs\n");
  2935. goto end;
  2936. }
  2937. *utils = *dsi_parser_get_of_utils();
  2938. utils->data = panel->panel_of_node;
  2939. end:
  2940. utils->node = panel->panel_of_node;
  2941. }
  2942. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  2943. {
  2944. return 0;
  2945. }
  2946. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  2947. {
  2948. if (trusted_vm_env) {
  2949. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  2950. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  2951. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  2952. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  2953. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  2954. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  2955. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  2956. panel->panel_ops.parse_power_cfg = dsi_panel_vm_stub;
  2957. panel->panel_ops.trigger_esd_attack = dsi_panel_vm_trigger_esd_attack;
  2958. } else {
  2959. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  2960. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  2961. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  2962. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  2963. panel->panel_ops.bl_register = dsi_panel_bl_register;
  2964. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  2965. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  2966. panel->panel_ops.parse_power_cfg = dsi_panel_parse_power_cfg;
  2967. panel->panel_ops.trigger_esd_attack = dsi_panel_trigger_esd_attack;
  2968. }
  2969. }
  2970. struct dsi_panel *dsi_panel_get(struct device *parent,
  2971. struct device_node *of_node,
  2972. struct device_node *parser_node,
  2973. const char *type,
  2974. int topology_override,
  2975. bool trusted_vm_env)
  2976. {
  2977. struct dsi_panel *panel;
  2978. struct dsi_parser_utils *utils;
  2979. const char *panel_physical_type;
  2980. int rc = 0;
  2981. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2982. if (!panel)
  2983. return ERR_PTR(-ENOMEM);
  2984. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  2985. panel->panel_of_node = of_node;
  2986. panel->parent = parent;
  2987. panel->type = type;
  2988. dsi_panel_update_util(panel, parser_node);
  2989. utils = &panel->utils;
  2990. panel->name = utils->get_property(utils->data,
  2991. "qcom,mdss-dsi-panel-name", NULL);
  2992. if (!panel->name)
  2993. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2994. /*
  2995. * Set panel type to LCD as default.
  2996. */
  2997. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2998. panel_physical_type = utils->get_property(utils->data,
  2999. "qcom,mdss-dsi-panel-physical-type", NULL);
  3000. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  3001. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  3002. rc = dsi_panel_parse_host_config(panel);
  3003. if (rc) {
  3004. DSI_ERR("failed to parse host configuration, rc=%d\n",
  3005. rc);
  3006. goto error;
  3007. }
  3008. rc = dsi_panel_parse_panel_mode(panel);
  3009. if (rc) {
  3010. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  3011. rc);
  3012. goto error;
  3013. }
  3014. rc = dsi_panel_parse_dfps_caps(panel);
  3015. if (rc)
  3016. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  3017. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  3018. if (rc)
  3019. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  3020. rc = dsi_panel_parse_avr_caps(panel, of_node);
  3021. if (rc)
  3022. DSI_ERR("failed to parse AVR features, rc=%d\n", rc);
  3023. rc = dsi_panel_parse_dyn_clk_caps(panel);
  3024. if (rc)
  3025. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  3026. rc = dsi_panel_parse_phy_props(panel);
  3027. if (rc) {
  3028. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  3029. rc);
  3030. goto error;
  3031. }
  3032. rc = panel->panel_ops.parse_gpios(panel);
  3033. if (rc) {
  3034. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  3035. goto error;
  3036. }
  3037. rc = dsi_panel_parse_tlmm_gpio(panel);
  3038. if (rc) {
  3039. DSI_ERR("failed to parse panel tlmm gpios, rc=%d\n", rc);
  3040. goto error;
  3041. }
  3042. rc = panel->panel_ops.parse_power_cfg(panel);
  3043. if (rc)
  3044. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  3045. rc = dsi_panel_parse_bl_config(panel);
  3046. if (rc) {
  3047. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  3048. if (rc == -EPROBE_DEFER)
  3049. goto error;
  3050. }
  3051. rc = dsi_panel_parse_misc_features(panel);
  3052. if (rc)
  3053. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  3054. rc = dsi_panel_parse_hdr_config(panel);
  3055. if (rc)
  3056. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  3057. rc = dsi_panel_get_mode_count(panel);
  3058. if (rc) {
  3059. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  3060. goto error;
  3061. }
  3062. rc = dsi_panel_parse_dms_info(panel);
  3063. if (rc)
  3064. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  3065. rc = dsi_panel_parse_esd_config(panel);
  3066. if (rc)
  3067. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  3068. rc = dsi_panel_vreg_get(panel);
  3069. if (rc) {
  3070. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  3071. panel->name, rc);
  3072. goto error;
  3073. }
  3074. panel->power_mode = SDE_MODE_DPMS_OFF;
  3075. drm_panel_init(&panel->drm_panel, &panel->mipi_device.dev,
  3076. NULL, DRM_MODE_CONNECTOR_DSI);
  3077. panel->mipi_device.dev.of_node = of_node;
  3078. drm_panel_add(&panel->drm_panel);
  3079. mutex_init(&panel->panel_lock);
  3080. return panel;
  3081. error:
  3082. kfree(panel);
  3083. return ERR_PTR(rc);
  3084. }
  3085. void dsi_panel_put(struct dsi_panel *panel)
  3086. {
  3087. drm_panel_remove(&panel->drm_panel);
  3088. /* free resources allocated for ESD check */
  3089. dsi_panel_esd_config_deinit(&panel->esd_config);
  3090. kfree(panel->avr_caps.avr_step_fps_list);
  3091. kfree(panel);
  3092. }
  3093. int dsi_panel_drv_init(struct dsi_panel *panel,
  3094. struct mipi_dsi_host *host)
  3095. {
  3096. int rc = 0;
  3097. struct mipi_dsi_device *dev;
  3098. if (!panel || !host) {
  3099. DSI_ERR("invalid params\n");
  3100. return -EINVAL;
  3101. }
  3102. mutex_lock(&panel->panel_lock);
  3103. dev = &panel->mipi_device;
  3104. dev->host = host;
  3105. /*
  3106. * We dont have device structure since panel is not a device node.
  3107. * When using drm panel framework, the device is probed when the host is
  3108. * create.
  3109. */
  3110. dev->channel = 0;
  3111. dev->lanes = 4;
  3112. panel->host = host;
  3113. rc = panel->panel_ops.pinctrl_init(panel);
  3114. if (rc) {
  3115. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  3116. panel->name, rc);
  3117. goto exit;
  3118. }
  3119. rc = panel->panel_ops.gpio_request(panel);
  3120. if (rc) {
  3121. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  3122. rc);
  3123. goto error_pinctrl_deinit;
  3124. }
  3125. rc = panel->panel_ops.bl_register(panel);
  3126. if (rc) {
  3127. if (rc != -EPROBE_DEFER)
  3128. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  3129. panel->name, rc);
  3130. goto error_gpio_release;
  3131. }
  3132. goto exit;
  3133. error_gpio_release:
  3134. (void)dsi_panel_gpio_release(panel);
  3135. error_pinctrl_deinit:
  3136. (void)dsi_panel_pinctrl_deinit(panel);
  3137. exit:
  3138. mutex_unlock(&panel->panel_lock);
  3139. return rc;
  3140. }
  3141. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  3142. {
  3143. int rc = 0;
  3144. if (!panel) {
  3145. DSI_ERR("invalid params\n");
  3146. return -EINVAL;
  3147. }
  3148. mutex_lock(&panel->panel_lock);
  3149. rc = panel->panel_ops.bl_unregister(panel);
  3150. if (rc)
  3151. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  3152. panel->name, rc);
  3153. rc = panel->panel_ops.gpio_release(panel);
  3154. if (rc)
  3155. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  3156. rc);
  3157. rc = panel->panel_ops.pinctrl_deinit(panel);
  3158. if (rc)
  3159. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  3160. rc);
  3161. rc = dsi_panel_vreg_put(panel);
  3162. if (rc)
  3163. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  3164. kfree(panel->tlmm_gpio);
  3165. panel->host = NULL;
  3166. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  3167. mutex_unlock(&panel->panel_lock);
  3168. return rc;
  3169. }
  3170. int dsi_panel_validate_mode(struct dsi_panel *panel,
  3171. struct dsi_display_mode *mode)
  3172. {
  3173. return 0;
  3174. }
  3175. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  3176. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  3177. {
  3178. const char *compression;
  3179. u32 *array = NULL, top_count, len, i;
  3180. int rc = -EINVAL;
  3181. bool dsc_enable = false;
  3182. *dsc_count = 0;
  3183. *lm_count = 0;
  3184. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  3185. if (compression && !strcmp(compression, "dsc"))
  3186. dsc_enable = true;
  3187. len = utils->count_u32_elems(node, "qcom,display-topology");
  3188. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  3189. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  3190. return rc;
  3191. top_count = len / TOPOLOGY_SET_LEN;
  3192. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  3193. if (!array)
  3194. return -ENOMEM;
  3195. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  3196. if (rc) {
  3197. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  3198. goto read_fail;
  3199. }
  3200. for (i = 0; i < top_count; i++) {
  3201. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  3202. if (dsc_enable)
  3203. *dsc_count = max(*dsc_count,
  3204. array[i * TOPOLOGY_SET_LEN + 1]);
  3205. }
  3206. read_fail:
  3207. kfree(array);
  3208. return 0;
  3209. }
  3210. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  3211. {
  3212. const u32 SINGLE_MODE_SUPPORT = 1;
  3213. struct dsi_parser_utils *utils;
  3214. struct device_node *timings_np, *child_np;
  3215. int num_dfps_rates;
  3216. int num_video_modes = 0, num_cmd_modes = 0;
  3217. int count, rc = 0;
  3218. u32 dsc_count = 0, lm_count = 0;
  3219. if (!panel) {
  3220. DSI_ERR("invalid params\n");
  3221. return -EINVAL;
  3222. }
  3223. utils = &panel->utils;
  3224. panel->num_timing_nodes = 0;
  3225. timings_np = utils->get_child_by_name(utils->data,
  3226. "qcom,mdss-dsi-display-timings");
  3227. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  3228. DSI_ERR("no display timing nodes defined\n");
  3229. rc = -EINVAL;
  3230. goto error;
  3231. }
  3232. count = utils->get_child_count(timings_np);
  3233. if ((!count && !panel->host_config.ext_bridge_mode) ||
  3234. count > DSI_MODE_MAX) {
  3235. DSI_ERR("invalid count of timing nodes: %d\n", count);
  3236. rc = -EINVAL;
  3237. goto error;
  3238. }
  3239. /* No multiresolution support is available for video mode panels.
  3240. * Multi-mode is supported for video mode during POMS is enabled.
  3241. */
  3242. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3243. !panel->host_config.ext_bridge_mode &&
  3244. !panel->panel_mode_switch_enabled)
  3245. count = SINGLE_MODE_SUPPORT;
  3246. panel->num_timing_nodes = count;
  3247. dsi_for_each_child_node(timings_np, child_np) {
  3248. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3249. num_video_modes++;
  3250. else if (utils->read_bool(child_np,
  3251. "qcom,mdss-dsi-cmd-mode"))
  3252. num_cmd_modes++;
  3253. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3254. num_video_modes++;
  3255. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3256. num_cmd_modes++;
  3257. dsi_panel_get_max_res_count(utils, child_np,
  3258. &dsc_count, &lm_count);
  3259. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3260. panel->lm_count = max(lm_count, panel->lm_count);
  3261. }
  3262. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3263. panel->dfps_caps.dfps_list_len;
  3264. /*
  3265. * Inflate num_of_modes by fps in dfps.
  3266. * Single command mode for video mode panels supporting
  3267. * panel operating mode switch.
  3268. */
  3269. num_video_modes = num_video_modes * num_dfps_rates;
  3270. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  3271. (panel->panel_mode_switch_enabled))
  3272. num_cmd_modes = 1;
  3273. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3274. error:
  3275. return rc;
  3276. }
  3277. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3278. struct dsi_panel_phy_props *phy_props)
  3279. {
  3280. int rc = 0;
  3281. if (!panel || !phy_props) {
  3282. DSI_ERR("invalid params\n");
  3283. return -EINVAL;
  3284. }
  3285. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3286. return rc;
  3287. }
  3288. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3289. struct dsi_dfps_capabilities *dfps_caps)
  3290. {
  3291. int rc = 0;
  3292. if (!panel || !dfps_caps) {
  3293. DSI_ERR("invalid params\n");
  3294. return -EINVAL;
  3295. }
  3296. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3297. return rc;
  3298. }
  3299. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3300. {
  3301. int i;
  3302. if (!mode->priv_info)
  3303. return;
  3304. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3305. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3306. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3307. }
  3308. kfree(mode->priv_info);
  3309. }
  3310. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3311. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3312. {
  3313. u32 frame_time_us, nslices;
  3314. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3315. dsi_transfer_time_us, pixel_clk_khz;
  3316. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3317. struct dsi_mode_info *timing = &mode->timing;
  3318. struct dsi_display_mode *display_mode;
  3319. u32 jitter_numer, jitter_denom, prefill_lines;
  3320. u32 min_threshold_us, prefill_time_us, max_transfer_us, packet_overhead;
  3321. u16 bpp;
  3322. /* Packet overhead in bits,
  3323. * DPHY: 4 bytes header + 2 bytes checksum + 1 byte dcs data command.
  3324. * CPHY: 8 bytes header + 4 bytes checksum + 2 bytes SYNC +
  3325. * 1 byte dcs data command.
  3326. */
  3327. if (config->phy_type & DSI_PHY_TYPE_CPHY)
  3328. packet_overhead = 120;
  3329. else
  3330. packet_overhead = 56;
  3331. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3332. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3333. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3334. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3335. if (timing->refresh_rate >= 120)
  3336. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3337. if (timing->dsc_enabled) {
  3338. nslices = (timing->h_active)/(dsc->config.slice_width);
  3339. /* (slice width x bit-per-pixel + packet overhead) x
  3340. * number of slices x height x fps / lane
  3341. */
  3342. bpp = DSC_BPP(dsc->config);
  3343. bits_per_line = ((dsc->config.slice_width * bpp) +
  3344. packet_overhead) * nslices;
  3345. bits_per_line = bits_per_line / (config->num_data_lanes);
  3346. min_bitclk_hz = (bits_per_line * timing->v_active *
  3347. timing->refresh_rate);
  3348. } else {
  3349. total_active_pixels = ((dsi_h_active_dce(timing)
  3350. * timing->v_active));
  3351. /* calculate the actual bitclk needed to transfer the frame */
  3352. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3353. (config->bpp));
  3354. do_div(min_bitclk_hz, config->num_data_lanes);
  3355. }
  3356. timing->min_dsi_clk_hz = min_bitclk_hz;
  3357. /*
  3358. * Apart from prefill line time, we need to take into account RSCC mode threshold time. In
  3359. * cases where RSC is disabled, as jitter is no longer considered we need to make sure we
  3360. * have enough time for DCS command transfer. As of now, the RSC threshold time and DCS
  3361. * threshold time are configured to 40us.
  3362. */
  3363. if (mode->priv_info->disable_rsc_solver) {
  3364. min_threshold_us = DCS_COMMAND_THRESHOLD_TIME_US;
  3365. } else {
  3366. min_threshold_us = mult_frac(frame_time_us, jitter_numer, (jitter_denom * 100));
  3367. min_threshold_us += RSCC_MODE_THRESHOLD_TIME_US;
  3368. }
  3369. /*
  3370. * Increase the prefill_lines proportionately as recommended
  3371. * 40lines for 60fps, 60 for 90fps, 120lines for 120fps, and so on.
  3372. */
  3373. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3374. timing->refresh_rate, 60);
  3375. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3376. (timing->v_active));
  3377. min_threshold_us = min_threshold_us + prefill_time_us;
  3378. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3379. if (timing->clk_rate_hz) {
  3380. /* adjust the transfer time proportionately for bit clk*/
  3381. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3382. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3383. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3384. } else if (mode->priv_info->mdp_transfer_time_us) {
  3385. max_transfer_us = frame_time_us - min_threshold_us;
  3386. mode->priv_info->mdp_transfer_time_us = min(
  3387. mode->priv_info->mdp_transfer_time_us,
  3388. max_transfer_us);
  3389. timing->dsi_transfer_time_us =
  3390. mode->priv_info->mdp_transfer_time_us;
  3391. } else {
  3392. if ((min_threshold_us > frame_threshold_us) ||
  3393. (mode->priv_info->disable_rsc_solver))
  3394. frame_threshold_us = min_threshold_us;
  3395. timing->dsi_transfer_time_us = frame_time_us -
  3396. frame_threshold_us;
  3397. }
  3398. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3399. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3400. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3401. timing->mdp_transfer_time_us =
  3402. mode->priv_info->mdp_transfer_time_us;
  3403. }
  3404. /* Calculate pclk_khz to update modeinfo */
  3405. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3406. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3407. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3408. do_div(pixel_clk_khz, config->bpp);
  3409. display_mode->pixel_clk_khz = pixel_clk_khz;
  3410. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3411. }
  3412. int dsi_panel_get_mode(struct dsi_panel *panel,
  3413. u32 index, struct dsi_display_mode *mode,
  3414. int topology_override)
  3415. {
  3416. struct device_node *timings_np, *child_np;
  3417. struct dsi_parser_utils *utils;
  3418. struct dsi_display_mode_priv_info *prv_info;
  3419. u32 child_idx = 0;
  3420. int rc = 0, num_timings;
  3421. int traffic_mode;
  3422. void *utils_data = NULL;
  3423. if (!panel || !mode) {
  3424. DSI_ERR("invalid params\n");
  3425. return -EINVAL;
  3426. }
  3427. mutex_lock(&panel->panel_lock);
  3428. utils = &panel->utils;
  3429. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3430. if (!mode->priv_info) {
  3431. rc = -ENOMEM;
  3432. goto done;
  3433. }
  3434. prv_info = mode->priv_info;
  3435. timings_np = utils->get_child_by_name(utils->data,
  3436. "qcom,mdss-dsi-display-timings");
  3437. if (!timings_np) {
  3438. DSI_ERR("no display timing nodes defined\n");
  3439. rc = -EINVAL;
  3440. goto parse_fail;
  3441. }
  3442. num_timings = utils->get_child_count(timings_np);
  3443. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3444. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3445. rc = -EINVAL;
  3446. goto parse_fail;
  3447. }
  3448. utils_data = utils->data;
  3449. traffic_mode = panel->video_config.traffic_mode;
  3450. dsi_for_each_child_node(timings_np, child_np) {
  3451. if (index != child_idx++)
  3452. continue;
  3453. utils->data = child_np;
  3454. if (panel->panel_mode_switch_enabled) {
  3455. if (!dsi_panel_parse_panel_mode_caps(mode, utils)) {
  3456. mode->panel_mode_caps = panel->panel_mode;
  3457. DSI_INFO("panel mode isn't specified in timing[%d]\n",
  3458. child_idx);
  3459. }
  3460. } else {
  3461. mode->panel_mode_caps = panel->panel_mode;
  3462. }
  3463. rc = utils->read_u32(utils->data, "cell-index", &mode->mode_idx);
  3464. if (rc)
  3465. mode->mode_idx = index;
  3466. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3467. if (rc) {
  3468. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3469. goto parse_fail;
  3470. }
  3471. if (panel->dyn_clk_caps.dyn_clk_support) {
  3472. rc = dsi_panel_parse_dyn_clk_list(mode, utils);
  3473. if (rc)
  3474. DSI_ERR("failed to parse dynamic clk rates, rc=%d\n", rc);
  3475. }
  3476. rc = dsi_panel_parse_dsc_params(mode, utils);
  3477. if (rc) {
  3478. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3479. goto parse_fail;
  3480. }
  3481. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode);
  3482. if (rc) {
  3483. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3484. goto parse_fail;
  3485. }
  3486. rc = dsi_panel_parse_topology(prv_info, utils,
  3487. topology_override);
  3488. if (rc) {
  3489. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3490. goto parse_fail;
  3491. }
  3492. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3493. if (rc) {
  3494. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3495. goto parse_fail;
  3496. }
  3497. rc = dsi_panel_parse_jitter_config(mode, utils);
  3498. if (rc)
  3499. DSI_ERR(
  3500. "failed to parse panel jitter config, rc=%d\n", rc);
  3501. rc = dsi_panel_parse_phy_timing(mode, utils);
  3502. if (rc) {
  3503. DSI_ERR(
  3504. "failed to parse panel phy timings, rc=%d\n", rc);
  3505. goto parse_fail;
  3506. }
  3507. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3508. if (rc)
  3509. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3510. }
  3511. goto done;
  3512. parse_fail:
  3513. kfree(mode->priv_info);
  3514. mode->priv_info = NULL;
  3515. done:
  3516. utils->data = utils_data;
  3517. mutex_unlock(&panel->panel_lock);
  3518. return rc;
  3519. }
  3520. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3521. struct dsi_display_mode *mode,
  3522. struct dsi_host_config *config)
  3523. {
  3524. int rc = 0;
  3525. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3526. if (!panel || !mode || !config) {
  3527. DSI_ERR("invalid params\n");
  3528. return -EINVAL;
  3529. }
  3530. mutex_lock(&panel->panel_lock);
  3531. config->panel_mode = panel->panel_mode;
  3532. memcpy(&config->common_config, &panel->host_config,
  3533. sizeof(config->common_config));
  3534. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3535. memcpy(&config->u.video_engine, &panel->video_config,
  3536. sizeof(config->u.video_engine));
  3537. } else {
  3538. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3539. sizeof(config->u.cmd_engine));
  3540. }
  3541. memcpy(&config->video_timing, &mode->timing,
  3542. sizeof(config->video_timing));
  3543. config->video_timing.mdp_transfer_time_us =
  3544. mode->priv_info->mdp_transfer_time_us;
  3545. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3546. config->video_timing.dsc = &mode->priv_info->dsc;
  3547. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3548. config->video_timing.vdc = &mode->priv_info->vdc;
  3549. if (dyn_clk_caps->dyn_clk_support)
  3550. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3551. else
  3552. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3553. config->esc_clk_rate_hz = 19200000;
  3554. mutex_unlock(&panel->panel_lock);
  3555. return rc;
  3556. }
  3557. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3558. {
  3559. int rc = 0;
  3560. if (!panel) {
  3561. DSI_ERR("invalid params\n");
  3562. return -EINVAL;
  3563. }
  3564. mutex_lock(&panel->panel_lock);
  3565. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3566. if (panel->lp11_init)
  3567. goto error;
  3568. rc = dsi_panel_power_on(panel);
  3569. if (rc) {
  3570. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3571. goto error;
  3572. }
  3573. error:
  3574. mutex_unlock(&panel->panel_lock);
  3575. return rc;
  3576. }
  3577. int dsi_panel_update_pps(struct dsi_panel *panel)
  3578. {
  3579. int rc = 0;
  3580. struct dsi_panel_cmd_set *set = NULL;
  3581. struct dsi_display_mode_priv_info *priv_info = NULL;
  3582. if (!panel || !panel->cur_mode) {
  3583. DSI_ERR("invalid params\n");
  3584. return -EINVAL;
  3585. }
  3586. mutex_lock(&panel->panel_lock);
  3587. priv_info = panel->cur_mode->priv_info;
  3588. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3589. if (priv_info->dsc_enabled)
  3590. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3591. panel->dce_pps_cmd, 0,
  3592. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3593. else if (priv_info->vdc_enabled)
  3594. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3595. panel->dce_pps_cmd, 0,
  3596. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3597. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3598. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3599. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3600. if (rc) {
  3601. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3602. goto error;
  3603. }
  3604. }
  3605. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3606. if (rc) {
  3607. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3608. panel->name, rc);
  3609. }
  3610. dsi_panel_destroy_cmd_packets(set);
  3611. error:
  3612. mutex_unlock(&panel->panel_lock);
  3613. return rc;
  3614. }
  3615. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3616. {
  3617. int rc = 0;
  3618. if (!panel) {
  3619. DSI_ERR("invalid params\n");
  3620. return -EINVAL;
  3621. }
  3622. mutex_lock(&panel->panel_lock);
  3623. if (!panel->panel_initialized)
  3624. goto exit;
  3625. /*
  3626. * Consider LP1->LP2->LP1.
  3627. * If the panel is already in LP mode, do not need to
  3628. * set the regulator.
  3629. * IBB and AB power mode would be set at the same time
  3630. * in PMIC driver, so we only call ibb setting that is enough.
  3631. */
  3632. if (dsi_panel_is_type_oled(panel) &&
  3633. panel->power_mode != SDE_MODE_DPMS_LP2)
  3634. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3635. "ibb", REGULATOR_MODE_IDLE);
  3636. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3637. if (rc)
  3638. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3639. panel->name, rc);
  3640. exit:
  3641. mutex_unlock(&panel->panel_lock);
  3642. return rc;
  3643. }
  3644. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3645. {
  3646. int rc = 0;
  3647. if (!panel) {
  3648. DSI_ERR("invalid params\n");
  3649. return -EINVAL;
  3650. }
  3651. mutex_lock(&panel->panel_lock);
  3652. if (!panel->panel_initialized)
  3653. goto exit;
  3654. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3655. if (rc)
  3656. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3657. panel->name, rc);
  3658. exit:
  3659. mutex_unlock(&panel->panel_lock);
  3660. return rc;
  3661. }
  3662. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3663. {
  3664. int rc = 0;
  3665. if (!panel) {
  3666. DSI_ERR("invalid params\n");
  3667. return -EINVAL;
  3668. }
  3669. mutex_lock(&panel->panel_lock);
  3670. if (!panel->panel_initialized)
  3671. goto exit;
  3672. /*
  3673. * Consider about LP1->LP2->NOLP.
  3674. */
  3675. if (dsi_panel_is_type_oled(panel) &&
  3676. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3677. panel->power_mode == SDE_MODE_DPMS_LP2))
  3678. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3679. "ibb", REGULATOR_MODE_NORMAL);
  3680. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3681. if (rc)
  3682. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3683. panel->name, rc);
  3684. exit:
  3685. mutex_unlock(&panel->panel_lock);
  3686. return rc;
  3687. }
  3688. int dsi_panel_prepare(struct dsi_panel *panel)
  3689. {
  3690. int rc = 0;
  3691. if (!panel) {
  3692. DSI_ERR("invalid params\n");
  3693. return -EINVAL;
  3694. }
  3695. mutex_lock(&panel->panel_lock);
  3696. if (panel->lp11_init) {
  3697. rc = dsi_panel_power_on(panel);
  3698. if (rc) {
  3699. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3700. panel->name, rc);
  3701. goto error;
  3702. }
  3703. }
  3704. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3705. if (rc) {
  3706. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3707. panel->name, rc);
  3708. goto error;
  3709. }
  3710. error:
  3711. mutex_unlock(&panel->panel_lock);
  3712. return rc;
  3713. }
  3714. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3715. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3716. {
  3717. static const int ROI_CMD_LEN = 5;
  3718. int rc = 0;
  3719. /* DTYPE_DCS_LWRITE */
  3720. char *caset, *paset;
  3721. set->cmds = NULL;
  3722. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3723. if (!caset) {
  3724. rc = -ENOMEM;
  3725. goto exit;
  3726. }
  3727. caset[0] = 0x2a;
  3728. caset[1] = (roi->x & 0xFF00) >> 8;
  3729. caset[2] = roi->x & 0xFF;
  3730. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3731. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3732. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3733. if (!paset) {
  3734. rc = -ENOMEM;
  3735. goto error_free_mem;
  3736. }
  3737. paset[0] = 0x2b;
  3738. paset[1] = (roi->y & 0xFF00) >> 8;
  3739. paset[2] = roi->y & 0xFF;
  3740. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3741. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3742. set->type = DSI_CMD_SET_ROI;
  3743. set->state = DSI_CMD_SET_STATE_LP;
  3744. set->count = 2; /* send caset + paset together */
  3745. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3746. if (!set->cmds) {
  3747. rc = -ENOMEM;
  3748. goto error_free_mem;
  3749. }
  3750. set->cmds[0].msg.channel = 0;
  3751. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3752. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3753. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3754. set->cmds[0].msg.tx_buf = caset;
  3755. set->cmds[0].msg.rx_len = 0;
  3756. set->cmds[0].msg.rx_buf = 0;
  3757. set->cmds[0].last_command = 0;
  3758. set->cmds[0].post_wait_ms = 0;
  3759. set->cmds[0].ctrl = unicast ? ctrl_idx : 0;
  3760. set->cmds[1].msg.channel = 0;
  3761. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3762. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3763. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3764. set->cmds[1].msg.tx_buf = paset;
  3765. set->cmds[1].msg.rx_len = 0;
  3766. set->cmds[1].msg.rx_buf = 0;
  3767. set->cmds[1].last_command = 1;
  3768. set->cmds[1].post_wait_ms = 0;
  3769. set->cmds[1].ctrl = unicast ? ctrl_idx : 0;
  3770. goto exit;
  3771. error_free_mem:
  3772. kfree(caset);
  3773. kfree(paset);
  3774. kfree(set->cmds);
  3775. exit:
  3776. return rc;
  3777. }
  3778. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3779. int ctrl_idx)
  3780. {
  3781. int rc = 0;
  3782. if (!panel) {
  3783. DSI_ERR("invalid params\n");
  3784. return -EINVAL;
  3785. }
  3786. mutex_lock(&panel->panel_lock);
  3787. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3788. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3789. if (rc)
  3790. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3791. panel->name, rc);
  3792. mutex_unlock(&panel->panel_lock);
  3793. return rc;
  3794. }
  3795. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3796. int ctrl_idx)
  3797. {
  3798. int rc = 0;
  3799. if (!panel) {
  3800. DSI_ERR("invalid params\n");
  3801. return -EINVAL;
  3802. }
  3803. mutex_lock(&panel->panel_lock);
  3804. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3805. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3806. if (rc)
  3807. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3808. panel->name, rc);
  3809. mutex_unlock(&panel->panel_lock);
  3810. return rc;
  3811. }
  3812. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3813. struct dsi_rect *roi)
  3814. {
  3815. int rc = 0;
  3816. struct dsi_panel_cmd_set *set;
  3817. struct dsi_display_mode_priv_info *priv_info;
  3818. if (!panel || !panel->cur_mode) {
  3819. DSI_ERR("Invalid params\n");
  3820. return -EINVAL;
  3821. }
  3822. priv_info = panel->cur_mode->priv_info;
  3823. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3824. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3825. if (rc) {
  3826. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3827. panel->name, rc);
  3828. return rc;
  3829. }
  3830. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3831. roi->x, roi->y, roi->w, roi->h);
  3832. SDE_EVT32(roi->x, roi->y, roi->w, roi->h);
  3833. mutex_lock(&panel->panel_lock);
  3834. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3835. if (rc)
  3836. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3837. panel->name, rc);
  3838. mutex_unlock(&panel->panel_lock);
  3839. dsi_panel_destroy_cmd_packets(set);
  3840. dsi_panel_dealloc_cmd_packets(set);
  3841. return rc;
  3842. }
  3843. int dsi_panel_switch_cmd_mode_out(struct dsi_panel *panel)
  3844. {
  3845. int rc = 0;
  3846. if (!panel) {
  3847. DSI_ERR("Invalid params\n");
  3848. return -EINVAL;
  3849. }
  3850. mutex_lock(&panel->panel_lock);
  3851. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_OUT);
  3852. if (rc)
  3853. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_OUT cmds, rc=%d\n",
  3854. panel->name, rc);
  3855. mutex_unlock(&panel->panel_lock);
  3856. return rc;
  3857. }
  3858. int dsi_panel_switch_video_mode_out(struct dsi_panel *panel)
  3859. {
  3860. int rc = 0;
  3861. if (!panel) {
  3862. DSI_ERR("Invalid params\n");
  3863. return -EINVAL;
  3864. }
  3865. mutex_lock(&panel->panel_lock);
  3866. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_OUT);
  3867. if (rc)
  3868. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_OUT cmds, rc=%d\n",
  3869. panel->name, rc);
  3870. mutex_unlock(&panel->panel_lock);
  3871. return rc;
  3872. }
  3873. int dsi_panel_switch_video_mode_in(struct dsi_panel *panel)
  3874. {
  3875. int rc = 0;
  3876. if (!panel) {
  3877. DSI_ERR("Invalid params\n");
  3878. return -EINVAL;
  3879. }
  3880. mutex_lock(&panel->panel_lock);
  3881. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_IN);
  3882. if (rc)
  3883. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_IN cmds, rc=%d\n",
  3884. panel->name, rc);
  3885. mutex_unlock(&panel->panel_lock);
  3886. return rc;
  3887. }
  3888. int dsi_panel_switch_cmd_mode_in(struct dsi_panel *panel)
  3889. {
  3890. int rc = 0;
  3891. if (!panel) {
  3892. DSI_ERR("Invalid params\n");
  3893. return -EINVAL;
  3894. }
  3895. mutex_lock(&panel->panel_lock);
  3896. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_IN);
  3897. if (rc)
  3898. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_IN cmds, rc=%d\n",
  3899. panel->name, rc);
  3900. mutex_unlock(&panel->panel_lock);
  3901. return rc;
  3902. }
  3903. int dsi_panel_switch(struct dsi_panel *panel)
  3904. {
  3905. int rc = 0;
  3906. if (!panel) {
  3907. DSI_ERR("Invalid params\n");
  3908. return -EINVAL;
  3909. }
  3910. mutex_lock(&panel->panel_lock);
  3911. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3912. if (rc)
  3913. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3914. panel->name, rc);
  3915. mutex_unlock(&panel->panel_lock);
  3916. return rc;
  3917. }
  3918. int dsi_panel_post_switch(struct dsi_panel *panel)
  3919. {
  3920. int rc = 0;
  3921. if (!panel) {
  3922. DSI_ERR("Invalid params\n");
  3923. return -EINVAL;
  3924. }
  3925. mutex_lock(&panel->panel_lock);
  3926. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3927. if (rc)
  3928. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3929. panel->name, rc);
  3930. mutex_unlock(&panel->panel_lock);
  3931. return rc;
  3932. }
  3933. int dsi_panel_enable(struct dsi_panel *panel)
  3934. {
  3935. int rc = 0;
  3936. if (!panel) {
  3937. DSI_ERR("Invalid params\n");
  3938. return -EINVAL;
  3939. }
  3940. mutex_lock(&panel->panel_lock);
  3941. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3942. if (rc) {
  3943. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3944. panel->name, rc);
  3945. goto error;
  3946. }
  3947. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  3948. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_ON);
  3949. if (rc) {
  3950. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_ON cmds, rc=%d\n",
  3951. panel->name, rc);
  3952. goto error;
  3953. }
  3954. } else if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3955. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_ON);
  3956. if (rc) {
  3957. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_ON cmds, rc=%d\n",
  3958. panel->name, rc);
  3959. goto error;
  3960. }
  3961. }
  3962. panel->panel_initialized = true;
  3963. error:
  3964. mutex_unlock(&panel->panel_lock);
  3965. return rc;
  3966. }
  3967. int dsi_panel_post_enable(struct dsi_panel *panel)
  3968. {
  3969. int rc = 0;
  3970. if (!panel) {
  3971. DSI_ERR("invalid params\n");
  3972. return -EINVAL;
  3973. }
  3974. mutex_lock(&panel->panel_lock);
  3975. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3976. if (rc) {
  3977. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3978. panel->name, rc);
  3979. goto error;
  3980. }
  3981. error:
  3982. mutex_unlock(&panel->panel_lock);
  3983. return rc;
  3984. }
  3985. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3986. {
  3987. int rc = 0;
  3988. if (!panel) {
  3989. DSI_ERR("invalid params\n");
  3990. return -EINVAL;
  3991. }
  3992. mutex_lock(&panel->panel_lock);
  3993. if (gpio_is_valid(panel->bl_config.en_gpio))
  3994. gpio_set_value(panel->bl_config.en_gpio, 0);
  3995. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3996. if (rc) {
  3997. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3998. panel->name, rc);
  3999. goto error;
  4000. }
  4001. error:
  4002. mutex_unlock(&panel->panel_lock);
  4003. return rc;
  4004. }
  4005. int dsi_panel_disable(struct dsi_panel *panel)
  4006. {
  4007. int rc = 0;
  4008. if (!panel) {
  4009. DSI_ERR("invalid params\n");
  4010. return -EINVAL;
  4011. }
  4012. mutex_lock(&panel->panel_lock);
  4013. /* Avoid sending panel off commands when ESD recovery is underway */
  4014. if (!atomic_read(&panel->esd_recovery_pending)) {
  4015. /*
  4016. * Need to set IBB/AB regulator mode to STANDBY,
  4017. * if panel is going off from AOD mode.
  4018. */
  4019. if (dsi_panel_is_type_oled(panel) &&
  4020. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  4021. panel->power_mode == SDE_MODE_DPMS_LP2))
  4022. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  4023. "ibb", REGULATOR_MODE_STANDBY);
  4024. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  4025. if (rc) {
  4026. /*
  4027. * Sending panel off commands may fail when DSI
  4028. * controller is in a bad state. These failures can be
  4029. * ignored since controller will go for full reset on
  4030. * subsequent display enable anyway.
  4031. */
  4032. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  4033. panel->name, rc);
  4034. rc = 0;
  4035. }
  4036. }
  4037. panel->panel_initialized = false;
  4038. panel->power_mode = SDE_MODE_DPMS_OFF;
  4039. mutex_unlock(&panel->panel_lock);
  4040. return rc;
  4041. }
  4042. int dsi_panel_unprepare(struct dsi_panel *panel)
  4043. {
  4044. int rc = 0;
  4045. if (!panel) {
  4046. DSI_ERR("invalid params\n");
  4047. return -EINVAL;
  4048. }
  4049. mutex_lock(&panel->panel_lock);
  4050. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  4051. if (rc) {
  4052. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  4053. panel->name, rc);
  4054. goto error;
  4055. }
  4056. error:
  4057. mutex_unlock(&panel->panel_lock);
  4058. return rc;
  4059. }
  4060. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  4061. {
  4062. int rc = 0;
  4063. if (!panel) {
  4064. DSI_ERR("invalid params\n");
  4065. return -EINVAL;
  4066. }
  4067. mutex_lock(&panel->panel_lock);
  4068. rc = dsi_panel_power_off(panel);
  4069. if (rc) {
  4070. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  4071. panel->name, rc);
  4072. goto error;
  4073. }
  4074. error:
  4075. mutex_unlock(&panel->panel_lock);
  4076. return rc;
  4077. }