hal_be_generic_api.h 49 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622
  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef _HAL_BE_GENERIC_API_H_
  20. #define _HAL_BE_GENERIC_API_H_
  21. #include <hal_be_hw_headers.h>
  22. #include "hal_be_tx.h"
  23. #include "hal_be_reo.h"
  24. #include <hal_api_mon.h>
  25. #include <hal_generic_api.h>
  26. /**
  27. * hal_tx_comp_get_status() - TQM Release reason
  28. * @hal_desc: completion ring Tx status
  29. *
  30. * This function will parse the WBM completion descriptor and populate in
  31. * HAL structure
  32. *
  33. * Return: none
  34. */
  35. static inline void
  36. hal_tx_comp_get_status_generic_be(void *desc, void *ts1,
  37. struct hal_soc *hal)
  38. {
  39. uint8_t rate_stats_valid = 0;
  40. uint32_t rate_stats = 0;
  41. struct hal_tx_completion_status *ts =
  42. (struct hal_tx_completion_status *)ts1;
  43. ts->ppdu_id = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  44. TQM_STATUS_NUMBER);
  45. ts->ack_frame_rssi = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  46. ACK_FRAME_RSSI);
  47. ts->first_msdu = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  48. FIRST_MSDU);
  49. ts->last_msdu = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  50. LAST_MSDU);
  51. #if 0
  52. // TODO - This has to be calculated form first and last msdu
  53. ts->msdu_part_of_amsdu = HAL_TX_DESC_GET(desc,
  54. WBM2SW_COMPLETION_RING_TX,
  55. MSDU_PART_OF_AMSDU);
  56. #endif
  57. ts->peer_id = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  58. SW_PEER_ID);
  59. ts->tid = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX, TID);
  60. ts->transmit_cnt = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  61. TRANSMIT_COUNT);
  62. rate_stats = HAL_TX_DESC_GET(desc, HAL_TX_COMP, TX_RATE_STATS);
  63. rate_stats_valid = HAL_TX_MS(TX_RATE_STATS_INFO,
  64. TX_RATE_STATS_INFO_VALID, rate_stats);
  65. ts->valid = rate_stats_valid;
  66. if (rate_stats_valid) {
  67. ts->bw = HAL_TX_MS(TX_RATE_STATS_INFO, TRANSMIT_BW,
  68. rate_stats);
  69. ts->pkt_type = HAL_TX_MS(TX_RATE_STATS_INFO,
  70. TRANSMIT_PKT_TYPE, rate_stats);
  71. ts->stbc = HAL_TX_MS(TX_RATE_STATS_INFO,
  72. TRANSMIT_STBC, rate_stats);
  73. ts->ldpc = HAL_TX_MS(TX_RATE_STATS_INFO, TRANSMIT_LDPC,
  74. rate_stats);
  75. ts->sgi = HAL_TX_MS(TX_RATE_STATS_INFO, TRANSMIT_SGI,
  76. rate_stats);
  77. ts->mcs = HAL_TX_MS(TX_RATE_STATS_INFO, TRANSMIT_MCS,
  78. rate_stats);
  79. ts->ofdma = HAL_TX_MS(TX_RATE_STATS_INFO, OFDMA_TRANSMISSION,
  80. rate_stats);
  81. ts->tones_in_ru = HAL_TX_MS(TX_RATE_STATS_INFO, TONES_IN_RU,
  82. rate_stats);
  83. }
  84. ts->release_src = hal_tx_comp_get_buffer_source_generic_be(desc);
  85. ts->status = hal_tx_comp_get_release_reason(
  86. desc,
  87. hal_soc_to_hal_soc_handle(hal));
  88. ts->tsf = HAL_TX_DESC_GET(desc, UNIFIED_WBM_RELEASE_RING_6,
  89. TX_RATE_STATS_INFO_TX_RATE_STATS);
  90. }
  91. #if defined(QCA_WIFI_QCA6290_11AX_MU_UL) && defined(QCA_WIFI_QCA6290_11AX)
  92. /**
  93. * hal_rx_handle_other_tlvs() - handle special TLVs like MU_UL
  94. * tlv_tag: Taf of the TLVs
  95. * rx_tlv: the pointer to the TLVs
  96. * @ppdu_info: pointer to ppdu_info
  97. *
  98. * Return: true if the tlv is handled, false if not
  99. */
  100. static inline bool
  101. hal_rx_handle_other_tlvs(uint32_t tlv_tag, void *rx_tlv,
  102. struct hal_rx_ppdu_info *ppdu_info)
  103. {
  104. uint32_t value;
  105. switch (tlv_tag) {
  106. case WIFIPHYRX_HE_SIG_A_MU_UL_E:
  107. {
  108. uint8_t *he_sig_a_mu_ul_info =
  109. (uint8_t *)rx_tlv +
  110. HAL_RX_OFFSET(PHYRX_HE_SIG_A_MU_UL,
  111. HE_SIG_A_MU_UL_INFO_PHYRX_HE_SIG_A_MU_UL_INFO_DETAILS);
  112. ppdu_info->rx_status.he_flags = 1;
  113. value = HAL_RX_GET(he_sig_a_mu_ul_info, HE_SIG_A_MU_UL_INFO,
  114. FORMAT_INDICATION);
  115. if (value == 0) {
  116. ppdu_info->rx_status.he_data1 =
  117. QDF_MON_STATUS_HE_TRIG_FORMAT_TYPE;
  118. } else {
  119. ppdu_info->rx_status.he_data1 =
  120. QDF_MON_STATUS_HE_SU_FORMAT_TYPE;
  121. }
  122. /* data1 */
  123. ppdu_info->rx_status.he_data1 |=
  124. QDF_MON_STATUS_HE_BSS_COLOR_KNOWN |
  125. QDF_MON_STATUS_HE_DL_UL_KNOWN |
  126. QDF_MON_STATUS_HE_DATA_BW_RU_KNOWN;
  127. /* data2 */
  128. ppdu_info->rx_status.he_data2 |=
  129. QDF_MON_STATUS_TXOP_KNOWN;
  130. /*data3*/
  131. value = HAL_RX_GET(he_sig_a_mu_ul_info,
  132. HE_SIG_A_MU_UL_INFO, BSS_COLOR_ID);
  133. ppdu_info->rx_status.he_data3 = value;
  134. /* 1 for UL and 0 for DL */
  135. value = 1;
  136. value = value << QDF_MON_STATUS_DL_UL_SHIFT;
  137. ppdu_info->rx_status.he_data3 |= value;
  138. /*data4*/
  139. value = HAL_RX_GET(he_sig_a_mu_ul_info, HE_SIG_A_MU_UL_INFO,
  140. SPATIAL_REUSE);
  141. ppdu_info->rx_status.he_data4 = value;
  142. /*data5*/
  143. value = HAL_RX_GET(he_sig_a_mu_ul_info,
  144. HE_SIG_A_MU_UL_INFO, TRANSMIT_BW);
  145. ppdu_info->rx_status.he_data5 = value;
  146. ppdu_info->rx_status.bw = value;
  147. /*data6*/
  148. value = HAL_RX_GET(he_sig_a_mu_ul_info, HE_SIG_A_MU_UL_INFO,
  149. TXOP_DURATION);
  150. value = value << QDF_MON_STATUS_TXOP_SHIFT;
  151. ppdu_info->rx_status.he_data6 |= value;
  152. return true;
  153. }
  154. default:
  155. return false;
  156. }
  157. }
  158. #else
  159. static inline bool
  160. hal_rx_handle_other_tlvs(uint32_t tlv_tag, void *rx_tlv,
  161. struct hal_rx_ppdu_info *ppdu_info)
  162. {
  163. return false;
  164. }
  165. #endif /* QCA_WIFI_QCA6290_11AX_MU_UL && QCA_WIFI_QCA6290_11AX */
  166. #if defined(RX_PPDU_END_USER_STATS_OFDMA_INFO_VALID_OFFSET) && \
  167. defined(RX_PPDU_END_USER_STATS_SW_RESPONSE_REFERENCE_PTR_EXT_OFFSET)
  168. static inline void
  169. hal_rx_handle_mu_ul_info(void *rx_tlv,
  170. struct mon_rx_user_status *mon_rx_user_status)
  171. {
  172. mon_rx_user_status->mu_ul_user_v0_word0 =
  173. HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS,
  174. SW_RESPONSE_REFERENCE_PTR);
  175. mon_rx_user_status->mu_ul_user_v0_word1 =
  176. HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS,
  177. SW_RESPONSE_REFERENCE_PTR_EXT);
  178. }
  179. static inline void
  180. hal_rx_populate_byte_count(void *rx_tlv, void *ppduinfo,
  181. struct mon_rx_user_status *mon_rx_user_status)
  182. {
  183. uint32_t mpdu_ok_byte_count;
  184. uint32_t mpdu_err_byte_count;
  185. mpdu_ok_byte_count = HAL_RX_GET(rx_tlv,
  186. RX_PPDU_END_USER_STATS,
  187. MPDU_OK_BYTE_COUNT);
  188. mpdu_err_byte_count = HAL_RX_GET(rx_tlv,
  189. RX_PPDU_END_USER_STATS,
  190. MPDU_ERR_BYTE_COUNT);
  191. mon_rx_user_status->mpdu_ok_byte_count = mpdu_ok_byte_count;
  192. mon_rx_user_status->mpdu_err_byte_count = mpdu_err_byte_count;
  193. }
  194. #else
  195. static inline void
  196. hal_rx_handle_mu_ul_info(void *rx_tlv,
  197. struct mon_rx_user_status *mon_rx_user_status)
  198. {
  199. }
  200. static inline void
  201. hal_rx_populate_byte_count(void *rx_tlv, void *ppduinfo,
  202. struct mon_rx_user_status *mon_rx_user_status)
  203. {
  204. struct hal_rx_ppdu_info *ppdu_info =
  205. (struct hal_rx_ppdu_info *)ppduinfo;
  206. /* HKV1: doesn't support mpdu byte count */
  207. mon_rx_user_status->mpdu_ok_byte_count = ppdu_info->rx_status.ppdu_len;
  208. mon_rx_user_status->mpdu_err_byte_count = 0;
  209. }
  210. #endif
  211. static inline void
  212. hal_rx_populate_mu_user_info(void *rx_tlv, void *ppduinfo, uint32_t user_id,
  213. struct mon_rx_user_status *mon_rx_user_status)
  214. {
  215. struct mon_rx_info *mon_rx_info;
  216. struct mon_rx_user_info *mon_rx_user_info;
  217. struct hal_rx_ppdu_info *ppdu_info =
  218. (struct hal_rx_ppdu_info *)ppduinfo;
  219. mon_rx_info = &ppdu_info->rx_info;
  220. mon_rx_user_info = &ppdu_info->rx_user_info[user_id];
  221. mon_rx_user_info->qos_control_info_valid =
  222. mon_rx_info->qos_control_info_valid;
  223. mon_rx_user_info->qos_control = mon_rx_info->qos_control;
  224. mon_rx_user_status->ast_index = ppdu_info->rx_status.ast_index;
  225. mon_rx_user_status->tid = ppdu_info->rx_status.tid;
  226. mon_rx_user_status->tcp_msdu_count =
  227. ppdu_info->rx_status.tcp_msdu_count;
  228. mon_rx_user_status->udp_msdu_count =
  229. ppdu_info->rx_status.udp_msdu_count;
  230. mon_rx_user_status->other_msdu_count =
  231. ppdu_info->rx_status.other_msdu_count;
  232. mon_rx_user_status->frame_control = ppdu_info->rx_status.frame_control;
  233. mon_rx_user_status->frame_control_info_valid =
  234. ppdu_info->rx_status.frame_control_info_valid;
  235. mon_rx_user_status->data_sequence_control_info_valid =
  236. ppdu_info->rx_status.data_sequence_control_info_valid;
  237. mon_rx_user_status->first_data_seq_ctrl =
  238. ppdu_info->rx_status.first_data_seq_ctrl;
  239. mon_rx_user_status->preamble_type = ppdu_info->rx_status.preamble_type;
  240. mon_rx_user_status->ht_flags = ppdu_info->rx_status.ht_flags;
  241. mon_rx_user_status->rtap_flags = ppdu_info->rx_status.rtap_flags;
  242. mon_rx_user_status->vht_flags = ppdu_info->rx_status.vht_flags;
  243. mon_rx_user_status->he_flags = ppdu_info->rx_status.he_flags;
  244. mon_rx_user_status->rs_flags = ppdu_info->rx_status.rs_flags;
  245. mon_rx_user_status->mpdu_cnt_fcs_ok =
  246. ppdu_info->com_info.mpdu_cnt_fcs_ok;
  247. mon_rx_user_status->mpdu_cnt_fcs_err =
  248. ppdu_info->com_info.mpdu_cnt_fcs_err;
  249. qdf_mem_copy(&mon_rx_user_status->mpdu_fcs_ok_bitmap,
  250. &ppdu_info->com_info.mpdu_fcs_ok_bitmap,
  251. HAL_RX_NUM_WORDS_PER_PPDU_BITMAP *
  252. sizeof(ppdu_info->com_info.mpdu_fcs_ok_bitmap[0]));
  253. hal_rx_populate_byte_count(rx_tlv, ppdu_info, mon_rx_user_status);
  254. }
  255. #define HAL_RX_UPDATE_RSSI_PER_CHAIN_BW(chain, \
  256. ppdu_info, rssi_info_tlv) \
  257. { \
  258. ppdu_info->rx_status.rssi_chain[chain][0] = \
  259. HAL_RX_GET(rssi_info_tlv, RECEIVE_RSSI_INFO,\
  260. RSSI_PRI20_CHAIN##chain); \
  261. ppdu_info->rx_status.rssi_chain[chain][1] = \
  262. HAL_RX_GET(rssi_info_tlv, RECEIVE_RSSI_INFO,\
  263. RSSI_EXT20_CHAIN##chain); \
  264. ppdu_info->rx_status.rssi_chain[chain][2] = \
  265. HAL_RX_GET(rssi_info_tlv, RECEIVE_RSSI_INFO,\
  266. RSSI_EXT40_LOW20_CHAIN##chain); \
  267. ppdu_info->rx_status.rssi_chain[chain][3] = \
  268. HAL_RX_GET(rssi_info_tlv, RECEIVE_RSSI_INFO,\
  269. RSSI_EXT40_HIGH20_CHAIN##chain); \
  270. ppdu_info->rx_status.rssi_chain[chain][4] = \
  271. HAL_RX_GET(rssi_info_tlv, RECEIVE_RSSI_INFO,\
  272. RSSI_EXT80_LOW20_CHAIN##chain); \
  273. ppdu_info->rx_status.rssi_chain[chain][5] = \
  274. HAL_RX_GET(rssi_info_tlv, RECEIVE_RSSI_INFO,\
  275. RSSI_EXT80_LOW_HIGH20_CHAIN##chain); \
  276. ppdu_info->rx_status.rssi_chain[chain][6] = \
  277. HAL_RX_GET(rssi_info_tlv, RECEIVE_RSSI_INFO,\
  278. RSSI_EXT80_HIGH_LOW20_CHAIN##chain); \
  279. ppdu_info->rx_status.rssi_chain[chain][7] = \
  280. HAL_RX_GET(rssi_info_tlv, RECEIVE_RSSI_INFO,\
  281. RSSI_EXT80_HIGH20_CHAIN##chain); \
  282. } \
  283. #define HAL_RX_PPDU_UPDATE_RSSI(ppdu_info, rssi_info_tlv) \
  284. {HAL_RX_UPDATE_RSSI_PER_CHAIN_BW(0, ppdu_info, rssi_info_tlv) \
  285. HAL_RX_UPDATE_RSSI_PER_CHAIN_BW(1, ppdu_info, rssi_info_tlv) \
  286. HAL_RX_UPDATE_RSSI_PER_CHAIN_BW(2, ppdu_info, rssi_info_tlv) \
  287. HAL_RX_UPDATE_RSSI_PER_CHAIN_BW(3, ppdu_info, rssi_info_tlv) \
  288. HAL_RX_UPDATE_RSSI_PER_CHAIN_BW(4, ppdu_info, rssi_info_tlv) \
  289. HAL_RX_UPDATE_RSSI_PER_CHAIN_BW(5, ppdu_info, rssi_info_tlv) \
  290. HAL_RX_UPDATE_RSSI_PER_CHAIN_BW(6, ppdu_info, rssi_info_tlv) \
  291. HAL_RX_UPDATE_RSSI_PER_CHAIN_BW(7, ppdu_info, rssi_info_tlv)} \
  292. static inline uint32_t
  293. hal_rx_update_rssi_chain(struct hal_rx_ppdu_info *ppdu_info,
  294. uint8_t *rssi_info_tlv)
  295. {
  296. // TODO - Find all these registers for wcn7850
  297. #if 0
  298. HAL_RX_PPDU_UPDATE_RSSI(ppdu_info, rssi_info_tlv)
  299. #endif
  300. return 0;
  301. }
  302. #ifdef WLAN_TX_PKT_CAPTURE_ENH
  303. static inline void
  304. hal_get_qos_control(void *rx_tlv,
  305. struct hal_rx_ppdu_info *ppdu_info)
  306. {
  307. ppdu_info->rx_info.qos_control_info_valid =
  308. HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS,
  309. QOS_CONTROL_INFO_VALID);
  310. if (ppdu_info->rx_info.qos_control_info_valid)
  311. ppdu_info->rx_info.qos_control =
  312. HAL_RX_GET(rx_tlv,
  313. RX_PPDU_END_USER_STATS,
  314. QOS_CONTROL_FIELD);
  315. }
  316. static inline void
  317. hal_get_mac_addr1(uint8_t *rx_mpdu_start,
  318. struct hal_rx_ppdu_info *ppdu_info)
  319. {
  320. if ((ppdu_info->sw_frame_group_id
  321. == HAL_MPDU_SW_FRAME_GROUP_MGMT_PROBE_REQ) ||
  322. (ppdu_info->sw_frame_group_id ==
  323. HAL_MPDU_SW_FRAME_GROUP_CTRL_RTS)) {
  324. ppdu_info->rx_info.mac_addr1_valid =
  325. HAL_RX_GET_MAC_ADDR1_VALID(rx_mpdu_start);
  326. *(uint32_t *)&ppdu_info->rx_info.mac_addr1[0] =
  327. HAL_RX_GET(rx_mpdu_start,
  328. RX_MPDU_INFO,
  329. MAC_ADDR_AD1_31_0);
  330. if (ppdu_info->sw_frame_group_id ==
  331. HAL_MPDU_SW_FRAME_GROUP_CTRL_RTS) {
  332. *(uint32_t *)&ppdu_info->rx_info.mac_addr1[4] =
  333. HAL_RX_GET(rx_mpdu_start,
  334. RX_MPDU_INFO,
  335. MAC_ADDR_AD1_47_32);
  336. }
  337. }
  338. }
  339. #else
  340. static inline void
  341. hal_get_qos_control(void *rx_tlv,
  342. struct hal_rx_ppdu_info *ppdu_info)
  343. {
  344. }
  345. static inline void
  346. hal_get_mac_addr1(uint8_t *rx_mpdu_start,
  347. struct hal_rx_ppdu_info *ppdu_info)
  348. {
  349. }
  350. #endif
  351. /**
  352. * hal_rx_status_get_tlv_info() - process receive info TLV
  353. * @rx_tlv_hdr: pointer to TLV header
  354. * @ppdu_info: pointer to ppdu_info
  355. *
  356. * Return: HAL_TLV_STATUS_PPDU_NOT_DONE or HAL_TLV_STATUS_PPDU_DONE from tlv
  357. */
  358. static inline uint32_t
  359. hal_rx_status_get_tlv_info_generic_be(void *rx_tlv_hdr, void *ppduinfo,
  360. hal_soc_handle_t hal_soc_hdl,
  361. qdf_nbuf_t nbuf)
  362. {
  363. struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl;
  364. uint32_t tlv_tag, user_id, tlv_len, value;
  365. uint8_t group_id = 0;
  366. uint8_t he_dcm = 0;
  367. uint8_t he_stbc = 0;
  368. uint16_t he_gi = 0;
  369. uint16_t he_ltf = 0;
  370. void *rx_tlv;
  371. bool unhandled = false;
  372. struct mon_rx_user_status *mon_rx_user_status;
  373. struct hal_rx_ppdu_info *ppdu_info =
  374. (struct hal_rx_ppdu_info *)ppduinfo;
  375. tlv_tag = HAL_RX_GET_USER_TLV32_TYPE(rx_tlv_hdr);
  376. user_id = HAL_RX_GET_USER_TLV32_USERID(rx_tlv_hdr);
  377. tlv_len = HAL_RX_GET_USER_TLV32_LEN(rx_tlv_hdr);
  378. rx_tlv = (uint8_t *)rx_tlv_hdr + HAL_RX_TLV32_HDR_SIZE;
  379. qdf_trace_hex_dump(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  380. rx_tlv, tlv_len);
  381. switch (tlv_tag) {
  382. case WIFIRX_PPDU_START_E:
  383. {
  384. if (qdf_unlikely(ppdu_info->com_info.last_ppdu_id ==
  385. HAL_RX_GET(rx_tlv, RX_PPDU_START, PHY_PPDU_ID)))
  386. hal_err("Matching ppdu_id(%u) detected",
  387. ppdu_info->com_info.last_ppdu_id);
  388. /* Reset ppdu_info before processing the ppdu */
  389. qdf_mem_zero(ppdu_info,
  390. sizeof(struct hal_rx_ppdu_info));
  391. ppdu_info->com_info.last_ppdu_id =
  392. ppdu_info->com_info.ppdu_id =
  393. HAL_RX_GET(rx_tlv, RX_PPDU_START,
  394. PHY_PPDU_ID);
  395. /* channel number is set in PHY meta data */
  396. ppdu_info->rx_status.chan_num =
  397. (HAL_RX_GET(rx_tlv, RX_PPDU_START,
  398. SW_PHY_META_DATA) & 0x0000FFFF);
  399. ppdu_info->rx_status.chan_freq =
  400. (HAL_RX_GET(rx_tlv, RX_PPDU_START,
  401. SW_PHY_META_DATA) & 0xFFFF0000) >> 16;
  402. if (ppdu_info->rx_status.chan_num &&
  403. ppdu_info->rx_status.chan_freq) {
  404. ppdu_info->rx_status.chan_freq =
  405. hal_rx_radiotap_num_to_freq(
  406. ppdu_info->rx_status.chan_num,
  407. ppdu_info->rx_status.chan_freq);
  408. }
  409. #ifdef DP_BE_NOTYET_WAR
  410. // TODO - timestamp is changed to 64-bit for wcn7850
  411. ppdu_info->com_info.ppdu_timestamp =
  412. HAL_RX_GET(rx_tlv, RX_PPDU_START,
  413. PPDU_START_TIMESTAMP);
  414. #endif
  415. ppdu_info->rx_status.ppdu_timestamp =
  416. ppdu_info->com_info.ppdu_timestamp;
  417. ppdu_info->rx_state = HAL_RX_MON_PPDU_START;
  418. break;
  419. }
  420. case WIFIRX_PPDU_START_USER_INFO_E:
  421. break;
  422. case WIFIRX_PPDU_END_E:
  423. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  424. "[%s][%d] ppdu_end_e len=%d",
  425. __func__, __LINE__, tlv_len);
  426. /* This is followed by sub-TLVs of PPDU_END */
  427. ppdu_info->rx_state = HAL_RX_MON_PPDU_END;
  428. break;
  429. case WIFIPHYRX_LOCATION_E:
  430. hal_rx_get_rtt_info(hal_soc_hdl, rx_tlv, ppdu_info);
  431. break;
  432. case WIFIRXPCU_PPDU_END_INFO_E:
  433. ppdu_info->rx_status.rx_antenna =
  434. HAL_RX_GET(rx_tlv, RXPCU_PPDU_END_INFO, RX_ANTENNA);
  435. ppdu_info->rx_status.tsft =
  436. HAL_RX_GET(rx_tlv, RXPCU_PPDU_END_INFO,
  437. WB_TIMESTAMP_UPPER_32);
  438. ppdu_info->rx_status.tsft = (ppdu_info->rx_status.tsft << 32) |
  439. HAL_RX_GET(rx_tlv, RXPCU_PPDU_END_INFO,
  440. WB_TIMESTAMP_LOWER_32);
  441. ppdu_info->rx_status.duration =
  442. HAL_RX_GET(rx_tlv, UNIFIED_RXPCU_PPDU_END_INFO_8,
  443. RX_PPDU_DURATION);
  444. hal_rx_get_bb_info(hal_soc_hdl, rx_tlv, ppdu_info);
  445. break;
  446. /*
  447. * WIFIRX_PPDU_END_USER_STATS_E comes for each user received.
  448. * for MU, based on num users we see this tlv that many times.
  449. */
  450. case WIFIRX_PPDU_END_USER_STATS_E:
  451. {
  452. unsigned long tid = 0;
  453. uint16_t seq = 0;
  454. ppdu_info->rx_status.ast_index =
  455. HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS,
  456. AST_INDEX);
  457. tid = HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS,
  458. RECEIVED_QOS_DATA_TID_BITMAP);
  459. ppdu_info->rx_status.tid = qdf_find_first_bit(&tid,
  460. sizeof(tid) * 8);
  461. if (ppdu_info->rx_status.tid == (sizeof(tid) * 8))
  462. ppdu_info->rx_status.tid = HAL_TID_INVALID;
  463. ppdu_info->rx_status.tcp_msdu_count =
  464. HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS,
  465. TCP_MSDU_COUNT) +
  466. HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS,
  467. TCP_ACK_MSDU_COUNT);
  468. ppdu_info->rx_status.udp_msdu_count =
  469. HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS,
  470. UDP_MSDU_COUNT);
  471. ppdu_info->rx_status.other_msdu_count =
  472. HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS,
  473. OTHER_MSDU_COUNT);
  474. if (ppdu_info->sw_frame_group_id
  475. != HAL_MPDU_SW_FRAME_GROUP_NULL_DATA) {
  476. ppdu_info->rx_status.frame_control_info_valid =
  477. HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS,
  478. FRAME_CONTROL_INFO_VALID);
  479. if (ppdu_info->rx_status.frame_control_info_valid)
  480. ppdu_info->rx_status.frame_control =
  481. HAL_RX_GET(rx_tlv,
  482. RX_PPDU_END_USER_STATS,
  483. FRAME_CONTROL_FIELD);
  484. hal_get_qos_control(rx_tlv, ppdu_info);
  485. }
  486. ppdu_info->rx_status.data_sequence_control_info_valid =
  487. HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS,
  488. DATA_SEQUENCE_CONTROL_INFO_VALID);
  489. seq = HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS,
  490. FIRST_DATA_SEQ_CTRL);
  491. if (ppdu_info->rx_status.data_sequence_control_info_valid)
  492. ppdu_info->rx_status.first_data_seq_ctrl = seq;
  493. ppdu_info->rx_status.preamble_type =
  494. HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS,
  495. HT_CONTROL_FIELD_PKT_TYPE);
  496. switch (ppdu_info->rx_status.preamble_type) {
  497. case HAL_RX_PKT_TYPE_11N:
  498. ppdu_info->rx_status.ht_flags = 1;
  499. ppdu_info->rx_status.rtap_flags |= HT_SGI_PRESENT;
  500. break;
  501. case HAL_RX_PKT_TYPE_11AC:
  502. ppdu_info->rx_status.vht_flags = 1;
  503. break;
  504. case HAL_RX_PKT_TYPE_11AX:
  505. ppdu_info->rx_status.he_flags = 1;
  506. break;
  507. default:
  508. break;
  509. }
  510. ppdu_info->com_info.mpdu_cnt_fcs_ok =
  511. HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS,
  512. MPDU_CNT_FCS_OK);
  513. ppdu_info->com_info.mpdu_cnt_fcs_err =
  514. HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS,
  515. MPDU_CNT_FCS_ERR);
  516. if ((ppdu_info->com_info.mpdu_cnt_fcs_ok |
  517. ppdu_info->com_info.mpdu_cnt_fcs_err) > 1)
  518. ppdu_info->rx_status.rs_flags |= IEEE80211_AMPDU_FLAG;
  519. else
  520. ppdu_info->rx_status.rs_flags &=
  521. (~IEEE80211_AMPDU_FLAG);
  522. ppdu_info->com_info.mpdu_fcs_ok_bitmap[0] =
  523. HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS,
  524. FCS_OK_BITMAP_31_0);
  525. ppdu_info->com_info.mpdu_fcs_ok_bitmap[1] =
  526. HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS,
  527. FCS_OK_BITMAP_63_32);
  528. if (user_id < HAL_MAX_UL_MU_USERS) {
  529. mon_rx_user_status =
  530. &ppdu_info->rx_user_status[user_id];
  531. hal_rx_handle_mu_ul_info(rx_tlv, mon_rx_user_status);
  532. ppdu_info->com_info.num_users++;
  533. hal_rx_populate_mu_user_info(rx_tlv, ppdu_info,
  534. user_id,
  535. mon_rx_user_status);
  536. }
  537. break;
  538. }
  539. case WIFIRX_PPDU_END_USER_STATS_EXT_E:
  540. ppdu_info->com_info.mpdu_fcs_ok_bitmap[2] =
  541. HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS_EXT,
  542. FCS_OK_BITMAP_95_64);
  543. ppdu_info->com_info.mpdu_fcs_ok_bitmap[3] =
  544. HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS_EXT,
  545. FCS_OK_BITMAP_127_96);
  546. ppdu_info->com_info.mpdu_fcs_ok_bitmap[4] =
  547. HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS_EXT,
  548. FCS_OK_BITMAP_159_128);
  549. ppdu_info->com_info.mpdu_fcs_ok_bitmap[5] =
  550. HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS_EXT,
  551. FCS_OK_BITMAP_191_160);
  552. ppdu_info->com_info.mpdu_fcs_ok_bitmap[6] =
  553. HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS_EXT,
  554. FCS_OK_BITMAP_223_192);
  555. ppdu_info->com_info.mpdu_fcs_ok_bitmap[7] =
  556. HAL_RX_GET(rx_tlv, RX_PPDU_END_USER_STATS_EXT,
  557. FCS_OK_BITMAP_255_224);
  558. break;
  559. case WIFIRX_PPDU_END_STATUS_DONE_E:
  560. return HAL_TLV_STATUS_PPDU_DONE;
  561. case WIFIDUMMY_E:
  562. return HAL_TLV_STATUS_BUF_DONE;
  563. case WIFIPHYRX_HT_SIG_E:
  564. {
  565. uint8_t *ht_sig_info = (uint8_t *)rx_tlv +
  566. HAL_RX_OFFSET(UNIFIED_PHYRX_HT_SIG_0,
  567. HT_SIG_INFO_PHYRX_HT_SIG_INFO_DETAILS);
  568. value = HAL_RX_GET(ht_sig_info, HT_SIG_INFO,
  569. FEC_CODING);
  570. ppdu_info->rx_status.ldpc = (value == HAL_SU_MU_CODING_LDPC) ?
  571. 1 : 0;
  572. ppdu_info->rx_status.mcs = HAL_RX_GET(ht_sig_info,
  573. HT_SIG_INFO, MCS);
  574. ppdu_info->rx_status.ht_mcs = ppdu_info->rx_status.mcs;
  575. ppdu_info->rx_status.bw = HAL_RX_GET(ht_sig_info,
  576. HT_SIG_INFO, CBW);
  577. ppdu_info->rx_status.sgi = HAL_RX_GET(ht_sig_info,
  578. HT_SIG_INFO, SHORT_GI);
  579. ppdu_info->rx_status.reception_type = HAL_RX_TYPE_SU;
  580. ppdu_info->rx_status.nss = ((ppdu_info->rx_status.mcs) >>
  581. HT_SIG_SU_NSS_SHIFT) + 1;
  582. ppdu_info->rx_status.mcs &= ((1 << HT_SIG_SU_NSS_SHIFT) - 1);
  583. break;
  584. }
  585. case WIFIPHYRX_L_SIG_B_E:
  586. {
  587. uint8_t *l_sig_b_info = (uint8_t *)rx_tlv +
  588. HAL_RX_OFFSET(UNIFIED_PHYRX_L_SIG_B_0,
  589. L_SIG_B_INFO_PHYRX_L_SIG_B_INFO_DETAILS);
  590. value = HAL_RX_GET(l_sig_b_info, L_SIG_B_INFO, RATE);
  591. ppdu_info->rx_status.l_sig_b_info = *((uint32_t *)l_sig_b_info);
  592. switch (value) {
  593. case 1:
  594. ppdu_info->rx_status.rate = HAL_11B_RATE_3MCS;
  595. ppdu_info->rx_status.mcs = HAL_LEGACY_MCS3;
  596. break;
  597. case 2:
  598. ppdu_info->rx_status.rate = HAL_11B_RATE_2MCS;
  599. ppdu_info->rx_status.mcs = HAL_LEGACY_MCS2;
  600. break;
  601. case 3:
  602. ppdu_info->rx_status.rate = HAL_11B_RATE_1MCS;
  603. ppdu_info->rx_status.mcs = HAL_LEGACY_MCS1;
  604. break;
  605. case 4:
  606. ppdu_info->rx_status.rate = HAL_11B_RATE_0MCS;
  607. ppdu_info->rx_status.mcs = HAL_LEGACY_MCS0;
  608. break;
  609. case 5:
  610. ppdu_info->rx_status.rate = HAL_11B_RATE_6MCS;
  611. ppdu_info->rx_status.mcs = HAL_LEGACY_MCS6;
  612. break;
  613. case 6:
  614. ppdu_info->rx_status.rate = HAL_11B_RATE_5MCS;
  615. ppdu_info->rx_status.mcs = HAL_LEGACY_MCS5;
  616. break;
  617. case 7:
  618. ppdu_info->rx_status.rate = HAL_11B_RATE_4MCS;
  619. ppdu_info->rx_status.mcs = HAL_LEGACY_MCS4;
  620. break;
  621. default:
  622. break;
  623. }
  624. ppdu_info->rx_status.cck_flag = 1;
  625. ppdu_info->rx_status.reception_type = HAL_RX_TYPE_SU;
  626. break;
  627. }
  628. case WIFIPHYRX_L_SIG_A_E:
  629. {
  630. uint8_t *l_sig_a_info = (uint8_t *)rx_tlv +
  631. HAL_RX_OFFSET(UNIFIED_PHYRX_L_SIG_A_0,
  632. L_SIG_A_INFO_PHYRX_L_SIG_A_INFO_DETAILS);
  633. value = HAL_RX_GET(l_sig_a_info, L_SIG_A_INFO, RATE);
  634. ppdu_info->rx_status.l_sig_a_info = *((uint32_t *)l_sig_a_info);
  635. switch (value) {
  636. case 8:
  637. ppdu_info->rx_status.rate = HAL_11A_RATE_0MCS;
  638. ppdu_info->rx_status.mcs = HAL_LEGACY_MCS0;
  639. break;
  640. case 9:
  641. ppdu_info->rx_status.rate = HAL_11A_RATE_1MCS;
  642. ppdu_info->rx_status.mcs = HAL_LEGACY_MCS1;
  643. break;
  644. case 10:
  645. ppdu_info->rx_status.rate = HAL_11A_RATE_2MCS;
  646. ppdu_info->rx_status.mcs = HAL_LEGACY_MCS2;
  647. break;
  648. case 11:
  649. ppdu_info->rx_status.rate = HAL_11A_RATE_3MCS;
  650. ppdu_info->rx_status.mcs = HAL_LEGACY_MCS3;
  651. break;
  652. case 12:
  653. ppdu_info->rx_status.rate = HAL_11A_RATE_4MCS;
  654. ppdu_info->rx_status.mcs = HAL_LEGACY_MCS4;
  655. break;
  656. case 13:
  657. ppdu_info->rx_status.rate = HAL_11A_RATE_5MCS;
  658. ppdu_info->rx_status.mcs = HAL_LEGACY_MCS5;
  659. break;
  660. case 14:
  661. ppdu_info->rx_status.rate = HAL_11A_RATE_6MCS;
  662. ppdu_info->rx_status.mcs = HAL_LEGACY_MCS6;
  663. break;
  664. case 15:
  665. ppdu_info->rx_status.rate = HAL_11A_RATE_7MCS;
  666. ppdu_info->rx_status.mcs = HAL_LEGACY_MCS7;
  667. break;
  668. default:
  669. break;
  670. }
  671. ppdu_info->rx_status.ofdm_flag = 1;
  672. ppdu_info->rx_status.reception_type = HAL_RX_TYPE_SU;
  673. break;
  674. }
  675. case WIFIPHYRX_VHT_SIG_A_E:
  676. {
  677. uint8_t *vht_sig_a_info = (uint8_t *)rx_tlv +
  678. HAL_RX_OFFSET(UNIFIED_PHYRX_VHT_SIG_A_0,
  679. VHT_SIG_A_INFO_PHYRX_VHT_SIG_A_INFO_DETAILS);
  680. value = HAL_RX_GET(vht_sig_a_info, VHT_SIG_A_INFO,
  681. SU_MU_CODING);
  682. ppdu_info->rx_status.ldpc = (value == HAL_SU_MU_CODING_LDPC) ?
  683. 1 : 0;
  684. group_id = HAL_RX_GET(vht_sig_a_info, VHT_SIG_A_INFO, GROUP_ID);
  685. ppdu_info->rx_status.vht_flag_values5 = group_id;
  686. ppdu_info->rx_status.mcs = HAL_RX_GET(vht_sig_a_info,
  687. VHT_SIG_A_INFO, MCS);
  688. ppdu_info->rx_status.sgi = HAL_RX_GET(vht_sig_a_info,
  689. VHT_SIG_A_INFO, GI_SETTING);
  690. switch (hal->target_type) {
  691. case TARGET_TYPE_QCA8074:
  692. case TARGET_TYPE_QCA8074V2:
  693. case TARGET_TYPE_QCA6018:
  694. case TARGET_TYPE_QCA5018:
  695. case TARGET_TYPE_QCN9000:
  696. case TARGET_TYPE_QCN6122:
  697. #ifdef QCA_WIFI_QCA6390
  698. case TARGET_TYPE_QCA6390:
  699. #endif
  700. ppdu_info->rx_status.is_stbc =
  701. HAL_RX_GET(vht_sig_a_info,
  702. VHT_SIG_A_INFO, STBC);
  703. value = HAL_RX_GET(vht_sig_a_info,
  704. VHT_SIG_A_INFO, N_STS);
  705. value = value & VHT_SIG_SU_NSS_MASK;
  706. if (ppdu_info->rx_status.is_stbc && (value > 0))
  707. value = ((value + 1) >> 1) - 1;
  708. ppdu_info->rx_status.nss =
  709. ((value & VHT_SIG_SU_NSS_MASK) + 1);
  710. break;
  711. case TARGET_TYPE_QCA6290:
  712. #if !defined(QCA_WIFI_QCA6290_11AX)
  713. ppdu_info->rx_status.is_stbc =
  714. HAL_RX_GET(vht_sig_a_info,
  715. VHT_SIG_A_INFO, STBC);
  716. value = HAL_RX_GET(vht_sig_a_info,
  717. VHT_SIG_A_INFO, N_STS);
  718. value = value & VHT_SIG_SU_NSS_MASK;
  719. if (ppdu_info->rx_status.is_stbc && (value > 0))
  720. value = ((value + 1) >> 1) - 1;
  721. ppdu_info->rx_status.nss =
  722. ((value & VHT_SIG_SU_NSS_MASK) + 1);
  723. #else
  724. ppdu_info->rx_status.nss = 0;
  725. #endif
  726. break;
  727. case TARGET_TYPE_QCA6490:
  728. case TARGET_TYPE_QCA6750:
  729. case TARGET_TYPE_WCN7850:
  730. ppdu_info->rx_status.nss = 0;
  731. break;
  732. default:
  733. break;
  734. }
  735. ppdu_info->rx_status.vht_flag_values3[0] =
  736. (((ppdu_info->rx_status.mcs) << 4)
  737. | ppdu_info->rx_status.nss);
  738. ppdu_info->rx_status.bw = HAL_RX_GET(vht_sig_a_info,
  739. VHT_SIG_A_INFO, BANDWIDTH);
  740. ppdu_info->rx_status.vht_flag_values2 =
  741. ppdu_info->rx_status.bw;
  742. ppdu_info->rx_status.vht_flag_values4 =
  743. HAL_RX_GET(vht_sig_a_info,
  744. VHT_SIG_A_INFO, SU_MU_CODING);
  745. ppdu_info->rx_status.beamformed = HAL_RX_GET(vht_sig_a_info,
  746. VHT_SIG_A_INFO, BEAMFORMED);
  747. if (group_id == 0 || group_id == 63)
  748. ppdu_info->rx_status.reception_type = HAL_RX_TYPE_SU;
  749. else
  750. ppdu_info->rx_status.reception_type =
  751. HAL_RX_TYPE_MU_MIMO;
  752. break;
  753. }
  754. case WIFIPHYRX_HE_SIG_A_SU_E:
  755. {
  756. uint8_t *he_sig_a_su_info = (uint8_t *)rx_tlv +
  757. HAL_RX_OFFSET(UNIFIED_PHYRX_HE_SIG_A_SU_0,
  758. HE_SIG_A_SU_INFO_PHYRX_HE_SIG_A_SU_INFO_DETAILS);
  759. ppdu_info->rx_status.he_flags = 1;
  760. value = HAL_RX_GET(he_sig_a_su_info, HE_SIG_A_SU_INFO,
  761. FORMAT_INDICATION);
  762. if (value == 0) {
  763. ppdu_info->rx_status.he_data1 =
  764. QDF_MON_STATUS_HE_TRIG_FORMAT_TYPE;
  765. } else {
  766. ppdu_info->rx_status.he_data1 =
  767. QDF_MON_STATUS_HE_SU_FORMAT_TYPE;
  768. }
  769. /* data1 */
  770. ppdu_info->rx_status.he_data1 |=
  771. QDF_MON_STATUS_HE_BSS_COLOR_KNOWN |
  772. QDF_MON_STATUS_HE_BEAM_CHANGE_KNOWN |
  773. QDF_MON_STATUS_HE_DL_UL_KNOWN |
  774. QDF_MON_STATUS_HE_MCS_KNOWN |
  775. QDF_MON_STATUS_HE_DCM_KNOWN |
  776. QDF_MON_STATUS_HE_CODING_KNOWN |
  777. QDF_MON_STATUS_HE_LDPC_EXTRA_SYMBOL_KNOWN |
  778. QDF_MON_STATUS_HE_STBC_KNOWN |
  779. QDF_MON_STATUS_HE_DATA_BW_RU_KNOWN |
  780. QDF_MON_STATUS_HE_DOPPLER_KNOWN;
  781. /* data2 */
  782. ppdu_info->rx_status.he_data2 =
  783. QDF_MON_STATUS_HE_GI_KNOWN;
  784. ppdu_info->rx_status.he_data2 |=
  785. QDF_MON_STATUS_TXBF_KNOWN |
  786. QDF_MON_STATUS_PE_DISAMBIGUITY_KNOWN |
  787. QDF_MON_STATUS_TXOP_KNOWN |
  788. QDF_MON_STATUS_LTF_SYMBOLS_KNOWN |
  789. QDF_MON_STATUS_PRE_FEC_PADDING_KNOWN |
  790. QDF_MON_STATUS_MIDABLE_PERIODICITY_KNOWN;
  791. /* data3 */
  792. value = HAL_RX_GET(he_sig_a_su_info,
  793. HE_SIG_A_SU_INFO, BSS_COLOR_ID);
  794. ppdu_info->rx_status.he_data3 = value;
  795. value = HAL_RX_GET(he_sig_a_su_info,
  796. HE_SIG_A_SU_INFO, BEAM_CHANGE);
  797. value = value << QDF_MON_STATUS_BEAM_CHANGE_SHIFT;
  798. ppdu_info->rx_status.he_data3 |= value;
  799. value = HAL_RX_GET(he_sig_a_su_info,
  800. HE_SIG_A_SU_INFO, DL_UL_FLAG);
  801. value = value << QDF_MON_STATUS_DL_UL_SHIFT;
  802. ppdu_info->rx_status.he_data3 |= value;
  803. value = HAL_RX_GET(he_sig_a_su_info,
  804. HE_SIG_A_SU_INFO, TRANSMIT_MCS);
  805. ppdu_info->rx_status.mcs = value;
  806. value = value << QDF_MON_STATUS_TRANSMIT_MCS_SHIFT;
  807. ppdu_info->rx_status.he_data3 |= value;
  808. value = HAL_RX_GET(he_sig_a_su_info,
  809. HE_SIG_A_SU_INFO, DCM);
  810. he_dcm = value;
  811. value = value << QDF_MON_STATUS_DCM_SHIFT;
  812. ppdu_info->rx_status.he_data3 |= value;
  813. value = HAL_RX_GET(he_sig_a_su_info,
  814. HE_SIG_A_SU_INFO, CODING);
  815. ppdu_info->rx_status.ldpc = (value == HAL_SU_MU_CODING_LDPC) ?
  816. 1 : 0;
  817. value = value << QDF_MON_STATUS_CODING_SHIFT;
  818. ppdu_info->rx_status.he_data3 |= value;
  819. value = HAL_RX_GET(he_sig_a_su_info,
  820. HE_SIG_A_SU_INFO,
  821. LDPC_EXTRA_SYMBOL);
  822. value = value << QDF_MON_STATUS_LDPC_EXTRA_SYMBOL_SHIFT;
  823. ppdu_info->rx_status.he_data3 |= value;
  824. value = HAL_RX_GET(he_sig_a_su_info,
  825. HE_SIG_A_SU_INFO, STBC);
  826. he_stbc = value;
  827. value = value << QDF_MON_STATUS_STBC_SHIFT;
  828. ppdu_info->rx_status.he_data3 |= value;
  829. /* data4 */
  830. value = HAL_RX_GET(he_sig_a_su_info, HE_SIG_A_SU_INFO,
  831. SPATIAL_REUSE);
  832. ppdu_info->rx_status.he_data4 = value;
  833. /* data5 */
  834. value = HAL_RX_GET(he_sig_a_su_info,
  835. HE_SIG_A_SU_INFO, TRANSMIT_BW);
  836. ppdu_info->rx_status.he_data5 = value;
  837. ppdu_info->rx_status.bw = value;
  838. value = HAL_RX_GET(he_sig_a_su_info,
  839. HE_SIG_A_SU_INFO, CP_LTF_SIZE);
  840. switch (value) {
  841. case 0:
  842. he_gi = HE_GI_0_8;
  843. he_ltf = HE_LTF_1_X;
  844. break;
  845. case 1:
  846. he_gi = HE_GI_0_8;
  847. he_ltf = HE_LTF_2_X;
  848. break;
  849. case 2:
  850. he_gi = HE_GI_1_6;
  851. he_ltf = HE_LTF_2_X;
  852. break;
  853. case 3:
  854. if (he_dcm && he_stbc) {
  855. he_gi = HE_GI_0_8;
  856. he_ltf = HE_LTF_4_X;
  857. } else {
  858. he_gi = HE_GI_3_2;
  859. he_ltf = HE_LTF_4_X;
  860. }
  861. break;
  862. }
  863. ppdu_info->rx_status.sgi = he_gi;
  864. ppdu_info->rx_status.ltf_size = he_ltf;
  865. hal_get_radiotap_he_gi_ltf(&he_gi, &he_ltf);
  866. value = he_gi << QDF_MON_STATUS_GI_SHIFT;
  867. ppdu_info->rx_status.he_data5 |= value;
  868. value = he_ltf << QDF_MON_STATUS_HE_LTF_SIZE_SHIFT;
  869. ppdu_info->rx_status.he_data5 |= value;
  870. value = HAL_RX_GET(he_sig_a_su_info, HE_SIG_A_SU_INFO, NSTS);
  871. value = (value << QDF_MON_STATUS_HE_LTF_SYM_SHIFT);
  872. ppdu_info->rx_status.he_data5 |= value;
  873. value = HAL_RX_GET(he_sig_a_su_info, HE_SIG_A_SU_INFO,
  874. PACKET_EXTENSION_A_FACTOR);
  875. value = value << QDF_MON_STATUS_PRE_FEC_PAD_SHIFT;
  876. ppdu_info->rx_status.he_data5 |= value;
  877. value = HAL_RX_GET(he_sig_a_su_info, HE_SIG_A_SU_INFO, TXBF);
  878. value = value << QDF_MON_STATUS_TXBF_SHIFT;
  879. ppdu_info->rx_status.he_data5 |= value;
  880. value = HAL_RX_GET(he_sig_a_su_info, HE_SIG_A_SU_INFO,
  881. PACKET_EXTENSION_PE_DISAMBIGUITY);
  882. value = value << QDF_MON_STATUS_PE_DISAMBIGUITY_SHIFT;
  883. ppdu_info->rx_status.he_data5 |= value;
  884. /* data6 */
  885. value = HAL_RX_GET(he_sig_a_su_info, HE_SIG_A_SU_INFO, NSTS);
  886. value++;
  887. ppdu_info->rx_status.nss = value;
  888. ppdu_info->rx_status.he_data6 = value;
  889. value = HAL_RX_GET(he_sig_a_su_info, HE_SIG_A_SU_INFO,
  890. DOPPLER_INDICATION);
  891. value = value << QDF_MON_STATUS_DOPPLER_SHIFT;
  892. ppdu_info->rx_status.he_data6 |= value;
  893. value = HAL_RX_GET(he_sig_a_su_info, HE_SIG_A_SU_INFO,
  894. TXOP_DURATION);
  895. value = value << QDF_MON_STATUS_TXOP_SHIFT;
  896. ppdu_info->rx_status.he_data6 |= value;
  897. ppdu_info->rx_status.beamformed = HAL_RX_GET(he_sig_a_su_info,
  898. HE_SIG_A_SU_INFO, TXBF);
  899. ppdu_info->rx_status.reception_type = HAL_RX_TYPE_SU;
  900. break;
  901. }
  902. case WIFIPHYRX_HE_SIG_A_MU_DL_E:
  903. {
  904. uint8_t *he_sig_a_mu_dl_info = (uint8_t *)rx_tlv +
  905. HAL_RX_OFFSET(UNIFIED_PHYRX_HE_SIG_A_MU_DL_0,
  906. HE_SIG_A_MU_DL_INFO_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS);
  907. ppdu_info->rx_status.he_mu_flags = 1;
  908. /* HE Flags */
  909. /*data1*/
  910. ppdu_info->rx_status.he_data1 =
  911. QDF_MON_STATUS_HE_MU_FORMAT_TYPE;
  912. ppdu_info->rx_status.he_data1 |=
  913. QDF_MON_STATUS_HE_BSS_COLOR_KNOWN |
  914. QDF_MON_STATUS_HE_DL_UL_KNOWN |
  915. QDF_MON_STATUS_HE_LDPC_EXTRA_SYMBOL_KNOWN |
  916. QDF_MON_STATUS_HE_STBC_KNOWN |
  917. QDF_MON_STATUS_HE_DATA_BW_RU_KNOWN |
  918. QDF_MON_STATUS_HE_DOPPLER_KNOWN;
  919. /* data2 */
  920. ppdu_info->rx_status.he_data2 =
  921. QDF_MON_STATUS_HE_GI_KNOWN;
  922. ppdu_info->rx_status.he_data2 |=
  923. QDF_MON_STATUS_LTF_SYMBOLS_KNOWN |
  924. QDF_MON_STATUS_PRE_FEC_PADDING_KNOWN |
  925. QDF_MON_STATUS_PE_DISAMBIGUITY_KNOWN |
  926. QDF_MON_STATUS_TXOP_KNOWN |
  927. QDF_MON_STATUS_MIDABLE_PERIODICITY_KNOWN;
  928. /*data3*/
  929. value = HAL_RX_GET(he_sig_a_mu_dl_info,
  930. HE_SIG_A_MU_DL_INFO, BSS_COLOR_ID);
  931. ppdu_info->rx_status.he_data3 = value;
  932. value = HAL_RX_GET(he_sig_a_mu_dl_info,
  933. HE_SIG_A_MU_DL_INFO, DL_UL_FLAG);
  934. value = value << QDF_MON_STATUS_DL_UL_SHIFT;
  935. ppdu_info->rx_status.he_data3 |= value;
  936. value = HAL_RX_GET(he_sig_a_mu_dl_info,
  937. HE_SIG_A_MU_DL_INFO,
  938. LDPC_EXTRA_SYMBOL);
  939. value = value << QDF_MON_STATUS_LDPC_EXTRA_SYMBOL_SHIFT;
  940. ppdu_info->rx_status.he_data3 |= value;
  941. value = HAL_RX_GET(he_sig_a_mu_dl_info,
  942. HE_SIG_A_MU_DL_INFO, STBC);
  943. he_stbc = value;
  944. value = value << QDF_MON_STATUS_STBC_SHIFT;
  945. ppdu_info->rx_status.he_data3 |= value;
  946. /*data4*/
  947. value = HAL_RX_GET(he_sig_a_mu_dl_info, HE_SIG_A_MU_DL_INFO,
  948. SPATIAL_REUSE);
  949. ppdu_info->rx_status.he_data4 = value;
  950. /*data5*/
  951. value = HAL_RX_GET(he_sig_a_mu_dl_info,
  952. HE_SIG_A_MU_DL_INFO, TRANSMIT_BW);
  953. ppdu_info->rx_status.he_data5 = value;
  954. ppdu_info->rx_status.bw = value;
  955. value = HAL_RX_GET(he_sig_a_mu_dl_info,
  956. HE_SIG_A_MU_DL_INFO, CP_LTF_SIZE);
  957. switch (value) {
  958. case 0:
  959. he_gi = HE_GI_0_8;
  960. he_ltf = HE_LTF_4_X;
  961. break;
  962. case 1:
  963. he_gi = HE_GI_0_8;
  964. he_ltf = HE_LTF_2_X;
  965. break;
  966. case 2:
  967. he_gi = HE_GI_1_6;
  968. he_ltf = HE_LTF_2_X;
  969. break;
  970. case 3:
  971. he_gi = HE_GI_3_2;
  972. he_ltf = HE_LTF_4_X;
  973. break;
  974. }
  975. ppdu_info->rx_status.sgi = he_gi;
  976. ppdu_info->rx_status.ltf_size = he_ltf;
  977. hal_get_radiotap_he_gi_ltf(&he_gi, &he_ltf);
  978. value = he_gi << QDF_MON_STATUS_GI_SHIFT;
  979. ppdu_info->rx_status.he_data5 |= value;
  980. value = he_ltf << QDF_MON_STATUS_HE_LTF_SIZE_SHIFT;
  981. ppdu_info->rx_status.he_data5 |= value;
  982. value = HAL_RX_GET(he_sig_a_mu_dl_info,
  983. HE_SIG_A_MU_DL_INFO, NUM_LTF_SYMBOLS);
  984. value = (value << QDF_MON_STATUS_HE_LTF_SYM_SHIFT);
  985. ppdu_info->rx_status.he_data5 |= value;
  986. value = HAL_RX_GET(he_sig_a_mu_dl_info, HE_SIG_A_MU_DL_INFO,
  987. PACKET_EXTENSION_A_FACTOR);
  988. value = value << QDF_MON_STATUS_PRE_FEC_PAD_SHIFT;
  989. ppdu_info->rx_status.he_data5 |= value;
  990. value = HAL_RX_GET(he_sig_a_mu_dl_info, HE_SIG_A_MU_DL_INFO,
  991. PACKET_EXTENSION_PE_DISAMBIGUITY);
  992. value = value << QDF_MON_STATUS_PE_DISAMBIGUITY_SHIFT;
  993. ppdu_info->rx_status.he_data5 |= value;
  994. /*data6*/
  995. value = HAL_RX_GET(he_sig_a_mu_dl_info, HE_SIG_A_MU_DL_INFO,
  996. DOPPLER_INDICATION);
  997. value = value << QDF_MON_STATUS_DOPPLER_SHIFT;
  998. ppdu_info->rx_status.he_data6 |= value;
  999. value = HAL_RX_GET(he_sig_a_mu_dl_info, HE_SIG_A_MU_DL_INFO,
  1000. TXOP_DURATION);
  1001. value = value << QDF_MON_STATUS_TXOP_SHIFT;
  1002. ppdu_info->rx_status.he_data6 |= value;
  1003. /* HE-MU Flags */
  1004. /* HE-MU-flags1 */
  1005. ppdu_info->rx_status.he_flags1 =
  1006. QDF_MON_STATUS_SIG_B_MCS_KNOWN |
  1007. QDF_MON_STATUS_SIG_B_DCM_KNOWN |
  1008. QDF_MON_STATUS_SIG_B_COMPRESSION_FLAG_1_KNOWN |
  1009. QDF_MON_STATUS_SIG_B_SYM_NUM_KNOWN |
  1010. QDF_MON_STATUS_RU_0_KNOWN;
  1011. value = HAL_RX_GET(he_sig_a_mu_dl_info,
  1012. HE_SIG_A_MU_DL_INFO, MCS_OF_SIG_B);
  1013. ppdu_info->rx_status.he_flags1 |= value;
  1014. value = HAL_RX_GET(he_sig_a_mu_dl_info,
  1015. HE_SIG_A_MU_DL_INFO, DCM_OF_SIG_B);
  1016. value = value << QDF_MON_STATUS_DCM_FLAG_1_SHIFT;
  1017. ppdu_info->rx_status.he_flags1 |= value;
  1018. /* HE-MU-flags2 */
  1019. ppdu_info->rx_status.he_flags2 =
  1020. QDF_MON_STATUS_BW_KNOWN;
  1021. value = HAL_RX_GET(he_sig_a_mu_dl_info,
  1022. HE_SIG_A_MU_DL_INFO, TRANSMIT_BW);
  1023. ppdu_info->rx_status.he_flags2 |= value;
  1024. value = HAL_RX_GET(he_sig_a_mu_dl_info,
  1025. HE_SIG_A_MU_DL_INFO, COMP_MODE_SIG_B);
  1026. value = value << QDF_MON_STATUS_SIG_B_COMPRESSION_FLAG_2_SHIFT;
  1027. ppdu_info->rx_status.he_flags2 |= value;
  1028. value = HAL_RX_GET(he_sig_a_mu_dl_info,
  1029. HE_SIG_A_MU_DL_INFO, NUM_SIG_B_SYMBOLS);
  1030. value = value - 1;
  1031. value = value << QDF_MON_STATUS_NUM_SIG_B_SYMBOLS_SHIFT;
  1032. ppdu_info->rx_status.he_flags2 |= value;
  1033. ppdu_info->rx_status.reception_type = HAL_RX_TYPE_MU_MIMO;
  1034. break;
  1035. }
  1036. case WIFIPHYRX_HE_SIG_B1_MU_E:
  1037. {
  1038. uint8_t *he_sig_b1_mu_info = (uint8_t *)rx_tlv +
  1039. HAL_RX_OFFSET(UNIFIED_PHYRX_HE_SIG_B1_MU_0,
  1040. HE_SIG_B1_MU_INFO_PHYRX_HE_SIG_B1_MU_INFO_DETAILS);
  1041. ppdu_info->rx_status.he_sig_b_common_known |=
  1042. QDF_MON_STATUS_HE_SIG_B_COMMON_KNOWN_RU0;
  1043. /* TODO: Check on the availability of other fields in
  1044. * sig_b_common
  1045. */
  1046. value = HAL_RX_GET(he_sig_b1_mu_info,
  1047. HE_SIG_B1_MU_INFO, RU_ALLOCATION);
  1048. ppdu_info->rx_status.he_RU[0] = value;
  1049. ppdu_info->rx_status.reception_type = HAL_RX_TYPE_MU_MIMO;
  1050. break;
  1051. }
  1052. case WIFIPHYRX_HE_SIG_B2_MU_E:
  1053. {
  1054. uint8_t *he_sig_b2_mu_info = (uint8_t *)rx_tlv +
  1055. HAL_RX_OFFSET(UNIFIED_PHYRX_HE_SIG_B2_MU_0,
  1056. HE_SIG_B2_MU_INFO_PHYRX_HE_SIG_B2_MU_INFO_DETAILS);
  1057. /*
  1058. * Not all "HE" fields can be updated from
  1059. * WIFIPHYRX_HE_SIG_A_MU_DL_E TLV. Use WIFIPHYRX_HE_SIG_B2_MU_E
  1060. * to populate rest of the "HE" fields for MU scenarios.
  1061. */
  1062. /* HE-data1 */
  1063. ppdu_info->rx_status.he_data1 |=
  1064. QDF_MON_STATUS_HE_MCS_KNOWN |
  1065. QDF_MON_STATUS_HE_CODING_KNOWN;
  1066. /* HE-data2 */
  1067. /* HE-data3 */
  1068. value = HAL_RX_GET(he_sig_b2_mu_info,
  1069. HE_SIG_B2_MU_INFO, STA_MCS);
  1070. ppdu_info->rx_status.mcs = value;
  1071. value = value << QDF_MON_STATUS_TRANSMIT_MCS_SHIFT;
  1072. ppdu_info->rx_status.he_data3 |= value;
  1073. value = HAL_RX_GET(he_sig_b2_mu_info,
  1074. HE_SIG_B2_MU_INFO, STA_CODING);
  1075. value = value << QDF_MON_STATUS_CODING_SHIFT;
  1076. ppdu_info->rx_status.he_data3 |= value;
  1077. /* HE-data4 */
  1078. value = HAL_RX_GET(he_sig_b2_mu_info,
  1079. HE_SIG_B2_MU_INFO, STA_ID);
  1080. value = value << QDF_MON_STATUS_STA_ID_SHIFT;
  1081. ppdu_info->rx_status.he_data4 |= value;
  1082. /* HE-data5 */
  1083. /* HE-data6 */
  1084. value = HAL_RX_GET(he_sig_b2_mu_info,
  1085. HE_SIG_B2_MU_INFO, NSTS);
  1086. /* value n indicates n+1 spatial streams */
  1087. value++;
  1088. ppdu_info->rx_status.nss = value;
  1089. ppdu_info->rx_status.he_data6 |= value;
  1090. break;
  1091. }
  1092. case WIFIPHYRX_HE_SIG_B2_OFDMA_E:
  1093. {
  1094. uint8_t *he_sig_b2_ofdma_info =
  1095. (uint8_t *)rx_tlv +
  1096. HAL_RX_OFFSET(UNIFIED_PHYRX_HE_SIG_B2_OFDMA_0,
  1097. HE_SIG_B2_OFDMA_INFO_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS);
  1098. /*
  1099. * Not all "HE" fields can be updated from
  1100. * WIFIPHYRX_HE_SIG_A_MU_DL_E TLV. Use WIFIPHYRX_HE_SIG_B2_MU_E
  1101. * to populate rest of "HE" fields for MU OFDMA scenarios.
  1102. */
  1103. /* HE-data1 */
  1104. ppdu_info->rx_status.he_data1 |=
  1105. QDF_MON_STATUS_HE_MCS_KNOWN |
  1106. QDF_MON_STATUS_HE_DCM_KNOWN |
  1107. QDF_MON_STATUS_HE_CODING_KNOWN;
  1108. /* HE-data2 */
  1109. ppdu_info->rx_status.he_data2 |=
  1110. QDF_MON_STATUS_TXBF_KNOWN;
  1111. /* HE-data3 */
  1112. value = HAL_RX_GET(he_sig_b2_ofdma_info,
  1113. HE_SIG_B2_OFDMA_INFO, STA_MCS);
  1114. ppdu_info->rx_status.mcs = value;
  1115. value = value << QDF_MON_STATUS_TRANSMIT_MCS_SHIFT;
  1116. ppdu_info->rx_status.he_data3 |= value;
  1117. value = HAL_RX_GET(he_sig_b2_ofdma_info,
  1118. HE_SIG_B2_OFDMA_INFO, STA_DCM);
  1119. he_dcm = value;
  1120. value = value << QDF_MON_STATUS_DCM_SHIFT;
  1121. ppdu_info->rx_status.he_data3 |= value;
  1122. value = HAL_RX_GET(he_sig_b2_ofdma_info,
  1123. HE_SIG_B2_OFDMA_INFO, STA_CODING);
  1124. value = value << QDF_MON_STATUS_CODING_SHIFT;
  1125. ppdu_info->rx_status.he_data3 |= value;
  1126. /* HE-data4 */
  1127. value = HAL_RX_GET(he_sig_b2_ofdma_info,
  1128. HE_SIG_B2_OFDMA_INFO, STA_ID);
  1129. value = value << QDF_MON_STATUS_STA_ID_SHIFT;
  1130. ppdu_info->rx_status.he_data4 |= value;
  1131. /* HE-data5 */
  1132. value = HAL_RX_GET(he_sig_b2_ofdma_info,
  1133. HE_SIG_B2_OFDMA_INFO, TXBF);
  1134. value = value << QDF_MON_STATUS_TXBF_SHIFT;
  1135. ppdu_info->rx_status.he_data5 |= value;
  1136. /* HE-data6 */
  1137. value = HAL_RX_GET(he_sig_b2_ofdma_info,
  1138. HE_SIG_B2_OFDMA_INFO, NSTS);
  1139. /* value n indicates n+1 spatial streams */
  1140. value++;
  1141. ppdu_info->rx_status.nss = value;
  1142. ppdu_info->rx_status.he_data6 |= value;
  1143. ppdu_info->rx_status.reception_type = HAL_RX_TYPE_MU_OFDMA;
  1144. break;
  1145. }
  1146. case WIFIPHYRX_RSSI_LEGACY_E:
  1147. {
  1148. uint8_t reception_type;
  1149. int8_t rssi_value;
  1150. uint8_t *rssi_info_tlv = (uint8_t *)rx_tlv +
  1151. HAL_RX_OFFSET(UNIFIED_PHYRX_RSSI_LEGACY_19,
  1152. RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS);
  1153. ppdu_info->rx_status.rssi_comb = HAL_RX_GET(rx_tlv,
  1154. PHYRX_RSSI_LEGACY, RSSI_COMB);
  1155. ppdu_info->rx_status.bw = hal->ops->hal_rx_get_tlv(rx_tlv);
  1156. ppdu_info->rx_status.he_re = 0;
  1157. reception_type = HAL_RX_GET(rx_tlv,
  1158. PHYRX_RSSI_LEGACY,
  1159. RECEPTION_TYPE);
  1160. switch (reception_type) {
  1161. case QDF_RECEPTION_TYPE_ULOFMDA:
  1162. ppdu_info->rx_status.reception_type =
  1163. HAL_RX_TYPE_MU_OFDMA;
  1164. ppdu_info->rx_status.ulofdma_flag = 1;
  1165. ppdu_info->rx_status.he_data1 =
  1166. QDF_MON_STATUS_HE_TRIG_FORMAT_TYPE;
  1167. break;
  1168. case QDF_RECEPTION_TYPE_ULMIMO:
  1169. ppdu_info->rx_status.reception_type =
  1170. HAL_RX_TYPE_MU_MIMO;
  1171. ppdu_info->rx_status.he_data1 =
  1172. QDF_MON_STATUS_HE_MU_FORMAT_TYPE;
  1173. break;
  1174. default:
  1175. ppdu_info->rx_status.reception_type =
  1176. HAL_RX_TYPE_SU;
  1177. break;
  1178. }
  1179. hal_rx_update_rssi_chain(ppdu_info, rssi_info_tlv);
  1180. rssi_value = HAL_RX_GET(rssi_info_tlv,
  1181. RECEIVE_RSSI_INFO, RSSI_PRI20_CHAIN0);
  1182. ppdu_info->rx_status.rssi[0] = rssi_value;
  1183. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1184. "RSSI_PRI20_CHAIN0: %d\n", rssi_value);
  1185. rssi_value = HAL_RX_GET(rssi_info_tlv,
  1186. RECEIVE_RSSI_INFO, RSSI_PRI20_CHAIN1);
  1187. ppdu_info->rx_status.rssi[1] = rssi_value;
  1188. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1189. "RSSI_PRI20_CHAIN1: %d\n", rssi_value);
  1190. rssi_value = HAL_RX_GET(rssi_info_tlv,
  1191. RECEIVE_RSSI_INFO, RSSI_PRI20_CHAIN2);
  1192. ppdu_info->rx_status.rssi[2] = rssi_value;
  1193. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1194. "RSSI_PRI20_CHAIN2: %d\n", rssi_value);
  1195. rssi_value = HAL_RX_GET(rssi_info_tlv,
  1196. RECEIVE_RSSI_INFO, RSSI_PRI20_CHAIN3);
  1197. ppdu_info->rx_status.rssi[3] = rssi_value;
  1198. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1199. "RSSI_PRI20_CHAIN3: %d\n", rssi_value);
  1200. #ifdef DP_BE_NOTYET_WAR
  1201. // TODO - this is not preset for wcn7850
  1202. rssi_value = HAL_RX_GET(rssi_info_tlv,
  1203. RECEIVE_RSSI_INFO, RSSI_PRI20_CHAIN4);
  1204. ppdu_info->rx_status.rssi[4] = rssi_value;
  1205. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1206. "RSSI_PRI20_CHAIN4: %d\n", rssi_value);
  1207. rssi_value = HAL_RX_GET(rssi_info_tlv,
  1208. RECEIVE_RSSI_INFO,
  1209. RSSI_PRI20_CHAIN5);
  1210. ppdu_info->rx_status.rssi[5] = rssi_value;
  1211. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1212. "RSSI_PRI20_CHAIN5: %d\n", rssi_value);
  1213. rssi_value = HAL_RX_GET(rssi_info_tlv,
  1214. RECEIVE_RSSI_INFO,
  1215. RSSI_PRI20_CHAIN6);
  1216. ppdu_info->rx_status.rssi[6] = rssi_value;
  1217. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1218. "RSSI_PRI20_CHAIN6: %d\n", rssi_value);
  1219. rssi_value = HAL_RX_GET(rssi_info_tlv,
  1220. RECEIVE_RSSI_INFO,
  1221. RSSI_PRI20_CHAIN7);
  1222. ppdu_info->rx_status.rssi[7] = rssi_value;
  1223. #endif
  1224. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1225. "RSSI_PRI20_CHAIN7: %d\n", rssi_value);
  1226. break;
  1227. }
  1228. case WIFIPHYRX_OTHER_RECEIVE_INFO_E:
  1229. hal_rx_proc_phyrx_other_receive_info_tlv(hal, rx_tlv_hdr,
  1230. ppdu_info);
  1231. break;
  1232. case WIFIRX_HEADER_E:
  1233. {
  1234. struct hal_rx_ppdu_common_info *com_info = &ppdu_info->com_info;
  1235. if (ppdu_info->fcs_ok_cnt >=
  1236. HAL_RX_MAX_MPDU_H_PER_STATUS_BUFFER) {
  1237. hal_err("Number of MPDUs(%d) per status buff exceeded",
  1238. ppdu_info->fcs_ok_cnt);
  1239. break;
  1240. }
  1241. /* Update first_msdu_payload for every mpdu and increment
  1242. * com_info->mpdu_cnt for every WIFIRX_HEADER_E TLV
  1243. */
  1244. ppdu_info->ppdu_msdu_info[ppdu_info->fcs_ok_cnt].first_msdu_payload =
  1245. rx_tlv;
  1246. ppdu_info->ppdu_msdu_info[ppdu_info->fcs_ok_cnt].payload_len = tlv_len;
  1247. ppdu_info->msdu_info.first_msdu_payload = rx_tlv;
  1248. ppdu_info->msdu_info.payload_len = tlv_len;
  1249. ppdu_info->user_id = user_id;
  1250. ppdu_info->hdr_len = tlv_len;
  1251. ppdu_info->data = rx_tlv;
  1252. ppdu_info->data += 4;
  1253. /* for every RX_HEADER TLV increment mpdu_cnt */
  1254. com_info->mpdu_cnt++;
  1255. return HAL_TLV_STATUS_HEADER;
  1256. }
  1257. case WIFIRX_MPDU_START_E:
  1258. {
  1259. uint8_t *rx_mpdu_start = (uint8_t *)rx_tlv;
  1260. uint32_t ppdu_id = HAL_RX_GET_PPDU_ID(rx_tlv);
  1261. uint8_t filter_category = 0;
  1262. ppdu_info->nac_info.fc_valid =
  1263. HAL_RX_MON_GET_FC_VALID(rx_tlv);
  1264. ppdu_info->nac_info.to_ds_flag =
  1265. HAL_RX_MON_GET_TO_DS_FLAG(rx_tlv);
  1266. ppdu_info->nac_info.frame_control =
  1267. HAL_RX_GET(rx_mpdu_start,
  1268. RX_MPDU_INFO,
  1269. MPDU_FRAME_CONTROL_FIELD);
  1270. ppdu_info->sw_frame_group_id =
  1271. HAL_RX_GET_SW_FRAME_GROUP_ID(rx_tlv);
  1272. ppdu_info->rx_user_status[user_id].sw_peer_id =
  1273. HAL_RX_GET(rx_mpdu_start,
  1274. RX_MPDU_INFO,
  1275. SW_PEER_ID);
  1276. if (ppdu_info->sw_frame_group_id ==
  1277. HAL_MPDU_SW_FRAME_GROUP_NULL_DATA) {
  1278. ppdu_info->rx_status.frame_control_info_valid =
  1279. ppdu_info->nac_info.fc_valid;
  1280. ppdu_info->rx_status.frame_control =
  1281. ppdu_info->nac_info.frame_control;
  1282. }
  1283. hal_get_mac_addr1(rx_mpdu_start,
  1284. ppdu_info);
  1285. ppdu_info->nac_info.mac_addr2_valid =
  1286. HAL_RX_MON_GET_MAC_ADDR2_VALID(rx_mpdu_start);
  1287. *(uint16_t *)&ppdu_info->nac_info.mac_addr2[0] =
  1288. HAL_RX_GET(rx_mpdu_start,
  1289. RX_MPDU_INFO,
  1290. MAC_ADDR_AD2_15_0);
  1291. *(uint32_t *)&ppdu_info->nac_info.mac_addr2[2] =
  1292. HAL_RX_GET(rx_mpdu_start,
  1293. RX_MPDU_INFO,
  1294. MAC_ADDR_AD2_47_16);
  1295. if (ppdu_info->rx_status.prev_ppdu_id != ppdu_id) {
  1296. ppdu_info->rx_status.prev_ppdu_id = ppdu_id;
  1297. ppdu_info->rx_status.ppdu_len =
  1298. HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO,
  1299. MPDU_LENGTH);
  1300. } else {
  1301. ppdu_info->rx_status.ppdu_len +=
  1302. HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO,
  1303. MPDU_LENGTH);
  1304. }
  1305. filter_category =
  1306. HAL_RX_GET_FILTER_CATEGORY(rx_tlv);
  1307. if (filter_category == 0)
  1308. ppdu_info->rx_status.rxpcu_filter_pass = 1;
  1309. else if (filter_category == 1)
  1310. ppdu_info->rx_status.monitor_direct_used = 1;
  1311. ppdu_info->nac_info.mcast_bcast =
  1312. HAL_RX_GET(rx_mpdu_start,
  1313. RX_MPDU_INFO,
  1314. MCAST_BCAST);
  1315. break;
  1316. }
  1317. case WIFIRX_MPDU_END_E:
  1318. ppdu_info->user_id = user_id;
  1319. ppdu_info->fcs_err =
  1320. HAL_RX_GET(rx_tlv, RX_MPDU_END,
  1321. FCS_ERR);
  1322. return HAL_TLV_STATUS_MPDU_END;
  1323. case WIFIRX_MSDU_END_E:
  1324. if (user_id < HAL_MAX_UL_MU_USERS) {
  1325. ppdu_info->rx_msdu_info[user_id].cce_metadata =
  1326. HAL_RX_TLV_CCE_METADATA_GET(rx_tlv);
  1327. ppdu_info->rx_msdu_info[user_id].fse_metadata =
  1328. HAL_RX_TLV_FSE_METADATA_GET(rx_tlv);
  1329. ppdu_info->rx_msdu_info[user_id].is_flow_idx_timeout =
  1330. HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(rx_tlv);
  1331. ppdu_info->rx_msdu_info[user_id].is_flow_idx_invalid =
  1332. HAL_RX_TLV_FLOW_IDX_INVALID_GET(rx_tlv);
  1333. ppdu_info->rx_msdu_info[user_id].flow_idx =
  1334. HAL_RX_TLV_FLOW_IDX_GET(rx_tlv);
  1335. }
  1336. return HAL_TLV_STATUS_MSDU_END;
  1337. case 0:
  1338. return HAL_TLV_STATUS_PPDU_DONE;
  1339. default:
  1340. if (hal_rx_handle_other_tlvs(tlv_tag, rx_tlv, ppdu_info))
  1341. unhandled = false;
  1342. else
  1343. unhandled = true;
  1344. break;
  1345. }
  1346. if (!unhandled)
  1347. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1348. "%s TLV type: %d, TLV len:%d %s",
  1349. __func__, tlv_tag, tlv_len,
  1350. unhandled == true ? "unhandled" : "");
  1351. qdf_trace_hex_dump(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1352. rx_tlv, tlv_len);
  1353. return HAL_TLV_STATUS_PPDU_NOT_DONE;
  1354. }
  1355. /**
  1356. * hal_tx_set_pcp_tid_map_generic_be() - Configure default PCP to TID map table
  1357. * @soc: HAL SoC context
  1358. * @map: PCP-TID mapping table
  1359. *
  1360. * PCP are mapped to 8 TID values using TID values programmed
  1361. * in one set of mapping registers PCP_TID_MAP_<0 to 6>
  1362. * The mapping register has TID mapping for 8 PCP values
  1363. *
  1364. * Return: none
  1365. */
  1366. static void hal_tx_set_pcp_tid_map_generic_be(struct hal_soc *soc, uint8_t *map)
  1367. {
  1368. uint32_t addr, value;
  1369. addr = HWIO_TCL_R0_PCP_TID_MAP_ADDR(
  1370. MAC_TCL_REG_REG_BASE);
  1371. value = (map[0] |
  1372. (map[1] << HWIO_TCL_R0_PCP_TID_MAP_PCP_1_SHFT) |
  1373. (map[2] << HWIO_TCL_R0_PCP_TID_MAP_PCP_2_SHFT) |
  1374. (map[3] << HWIO_TCL_R0_PCP_TID_MAP_PCP_3_SHFT) |
  1375. (map[4] << HWIO_TCL_R0_PCP_TID_MAP_PCP_4_SHFT) |
  1376. (map[5] << HWIO_TCL_R0_PCP_TID_MAP_PCP_5_SHFT) |
  1377. (map[6] << HWIO_TCL_R0_PCP_TID_MAP_PCP_6_SHFT) |
  1378. (map[7] << HWIO_TCL_R0_PCP_TID_MAP_PCP_7_SHFT));
  1379. HAL_REG_WRITE(soc, addr, (value & HWIO_TCL_R0_PCP_TID_MAP_RMSK));
  1380. }
  1381. /**
  1382. * hal_tx_update_pcp_tid_generic_be() - Update the pcp tid map table with
  1383. * value received from user-space
  1384. * @soc: HAL SoC context
  1385. * @pcp: pcp value
  1386. * @tid : tid value
  1387. *
  1388. * Return: void
  1389. */
  1390. static void
  1391. hal_tx_update_pcp_tid_generic_be(struct hal_soc *soc,
  1392. uint8_t pcp, uint8_t tid)
  1393. {
  1394. uint32_t addr, value, regval;
  1395. addr = HWIO_TCL_R0_PCP_TID_MAP_ADDR(
  1396. MAC_TCL_REG_REG_BASE);
  1397. value = (uint32_t)tid << (HAL_TX_BITS_PER_TID * pcp);
  1398. /* Read back previous PCP TID config and update
  1399. * with new config.
  1400. */
  1401. regval = HAL_REG_READ(soc, addr);
  1402. regval &= ~(HAL_TX_TID_BITS_MASK << (HAL_TX_BITS_PER_TID * pcp));
  1403. regval |= value;
  1404. HAL_REG_WRITE(soc, addr,
  1405. (regval & HWIO_TCL_R0_PCP_TID_MAP_RMSK));
  1406. }
  1407. /**
  1408. * hal_tx_update_tidmap_prty_generic_be() - Update the tid map priority
  1409. * @soc: HAL SoC context
  1410. * @val: priority value
  1411. *
  1412. * Return: void
  1413. */
  1414. static
  1415. void hal_tx_update_tidmap_prty_generic_be(struct hal_soc *soc, uint8_t value)
  1416. {
  1417. uint32_t addr;
  1418. addr = HWIO_TCL_R0_TID_MAP_PRTY_ADDR(
  1419. MAC_TCL_REG_REG_BASE);
  1420. HAL_REG_WRITE(soc, addr,
  1421. (value & HWIO_TCL_R0_TID_MAP_PRTY_RMSK));
  1422. }
  1423. /**
  1424. * hal_rx_get_tlv_size_generic_be() - Get rx packet tlv size
  1425. * @rx_pkt_tlv_size: TLV size for regular RX packets
  1426. * @rx_mon_pkt_tlv_size: TLV size for monitor mode packets
  1427. *
  1428. * Return: size of rx pkt tlv before the actual data
  1429. */
  1430. static void hal_rx_get_tlv_size_generic_be(uint16_t *rx_pkt_tlv_size,
  1431. uint16_t *rx_mon_pkt_tlv_size)
  1432. {
  1433. *rx_pkt_tlv_size = RX_PKT_TLVS_LEN;
  1434. /* For now mon pkt tlv is same as rx pkt tlv */
  1435. *rx_mon_pkt_tlv_size = RX_PKT_TLVS_LEN;
  1436. }
  1437. #endif /* _HAL_BE_GENERIC_API_H_ */