sde_rotator_base.c 24 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2012, 2015-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #define pr_fmt(fmt) "%s: " fmt, __func__
  6. #include <linux/errno.h>
  7. #include <linux/file.h>
  8. #include <linux/spinlock.h>
  9. #include <linux/types.h>
  10. #include <linux/major.h>
  11. #include <linux/debugfs.h>
  12. #include <linux/clk.h>
  13. #include <linux/slab.h>
  14. #include <linux/io.h>
  15. #include <linux/iopoll.h>
  16. #include <linux/regulator/consumer.h>
  17. #define CREATE_TRACE_POINTS
  18. #include "sde_rotator_base.h"
  19. #include "sde_rotator_util.h"
  20. #include "sde_rotator_trace.h"
  21. #include "sde_rotator_debug.h"
  22. #include "sde_rotator_dev.h"
  23. #include "sde_rotator_vbif.h"
  24. static const struct sde_rot_bus_data sde_rot_reg_bus_table[] = {
  25. {0, 0},
  26. {0, 76800},
  27. {0, 150000},
  28. {0, 300000},
  29. };
  30. static inline u64 fudge_factor(u64 val, u32 numer, u32 denom)
  31. {
  32. u64 result = (val * (u64)numer);
  33. do_div(result, denom);
  34. return result;
  35. }
  36. static inline u64 apply_fudge_factor(u64 val,
  37. struct sde_mult_factor *factor)
  38. {
  39. return fudge_factor(val, factor->numer, factor->denom);
  40. }
  41. static inline u64 apply_inverse_fudge_factor(u64 val,
  42. struct sde_mult_factor *factor)
  43. {
  44. return fudge_factor(val, factor->denom, factor->numer);
  45. }
  46. static inline bool validate_comp_ratio(struct sde_mult_factor *factor)
  47. {
  48. return factor->numer && factor->denom;
  49. }
  50. const struct sde_rot_bus_data *sde_get_rot_reg_bus_value(u32 usecase_ndx)
  51. {
  52. return &sde_rot_reg_bus_table[usecase_ndx];
  53. }
  54. u32 sde_apply_comp_ratio_factor(u32 quota,
  55. struct sde_mdp_format_params *fmt,
  56. struct sde_mult_factor *factor)
  57. {
  58. struct sde_rot_data_type *mdata = sde_rot_get_mdata();
  59. if (!mdata || !test_bit(SDE_QOS_OVERHEAD_FACTOR,
  60. mdata->sde_qos_map))
  61. return quota;
  62. /* apply compression ratio, only for compressed formats */
  63. if (sde_mdp_is_ubwc_format(fmt) &&
  64. validate_comp_ratio(factor))
  65. quota = apply_inverse_fudge_factor(quota, factor);
  66. return quota;
  67. }
  68. #define RES_1080p (1088*1920)
  69. #define RES_UHD (3840*2160)
  70. #define RES_WQXGA (2560*1600)
  71. #define XIN_HALT_TIMEOUT_US 0x4000
  72. static int sde_mdp_wait_for_xin_halt(u32 xin_id)
  73. {
  74. void __iomem *vbif_base;
  75. u32 status;
  76. struct sde_rot_data_type *mdata = sde_rot_get_mdata();
  77. u32 idle_mask = BIT(xin_id);
  78. int rc;
  79. vbif_base = mdata->vbif_nrt_io.base;
  80. rc = readl_poll_timeout(vbif_base + MMSS_VBIF_XIN_HALT_CTRL1,
  81. status, (status & idle_mask),
  82. 1000, XIN_HALT_TIMEOUT_US);
  83. if (rc == -ETIMEDOUT) {
  84. SDEROT_ERR("VBIF client %d not halting. TIMEDOUT.\n",
  85. xin_id);
  86. } else {
  87. SDEROT_DBG("VBIF client %d is halted\n", xin_id);
  88. }
  89. return rc;
  90. }
  91. /**
  92. * force_on_xin_clk() - enable/disable the force-on for the pipe clock
  93. * @bit_off: offset of the bit to enable/disable the force-on.
  94. * @reg_off: register offset for the clock control.
  95. * @enable: boolean to indicate if the force-on of the clock needs to be
  96. * enabled or disabled.
  97. *
  98. * This function returns:
  99. * true - if the clock is forced-on by this function
  100. * false - if the clock was already forced on
  101. * It is the caller responsibility to check if this function is forcing
  102. * the clock on; if so, it will need to remove the force of the clock,
  103. * otherwise it should avoid to remove the force-on.
  104. * Clocks must be on when calling this function.
  105. */
  106. static bool force_on_xin_clk(u32 bit_off, u32 clk_ctl_reg_off, bool enable)
  107. {
  108. u32 val;
  109. u32 force_on_mask;
  110. struct sde_rot_data_type *mdata = sde_rot_get_mdata();
  111. bool clk_forced_on = false;
  112. force_on_mask = BIT(bit_off);
  113. val = readl_relaxed(mdata->mdp_base + clk_ctl_reg_off);
  114. clk_forced_on = !(force_on_mask & val);
  115. if (enable)
  116. val |= force_on_mask;
  117. else
  118. val &= ~force_on_mask;
  119. writel_relaxed(val, mdata->mdp_base + clk_ctl_reg_off);
  120. return clk_forced_on;
  121. }
  122. void vbif_lock(struct platform_device *parent_pdev)
  123. {
  124. if (!parent_pdev)
  125. return;
  126. mdp_vbif_lock(parent_pdev, true);
  127. }
  128. void vbif_unlock(struct platform_device *parent_pdev)
  129. {
  130. if (!parent_pdev)
  131. return;
  132. mdp_vbif_lock(parent_pdev, false);
  133. }
  134. void sde_mdp_halt_vbif_xin(struct sde_mdp_vbif_halt_params *params)
  135. {
  136. struct sde_rot_data_type *mdata = sde_rot_get_mdata();
  137. u32 reg_val;
  138. bool forced_on;
  139. int rc = 0;
  140. if (!mdata || !params || !params->reg_off_mdp_clk_ctrl) {
  141. SDEROT_ERR("null input parameter\n");
  142. return;
  143. }
  144. if (!mdata->parent_pdev &&
  145. params->xin_id > MMSS_VBIF_NRT_VBIF_CLK_FORCE_CTRL0_XIN1) {
  146. SDEROT_ERR("xin_id:%d exceed max limit\n", params->xin_id);
  147. return;
  148. }
  149. forced_on = force_on_xin_clk(params->bit_off_mdp_clk_ctrl,
  150. params->reg_off_mdp_clk_ctrl, true);
  151. vbif_lock(mdata->parent_pdev);
  152. SDEROT_EVTLOG(forced_on, params->xin_id);
  153. reg_val = SDE_VBIF_READ(mdata, MMSS_VBIF_XIN_HALT_CTRL0);
  154. SDE_VBIF_WRITE(mdata, MMSS_VBIF_XIN_HALT_CTRL0,
  155. reg_val | BIT(params->xin_id));
  156. /* this is a polling operation */
  157. rc = sde_mdp_wait_for_xin_halt(params->xin_id);
  158. if (rc == -ETIMEDOUT)
  159. params->xin_timeout = BIT(params->xin_id);
  160. reg_val = SDE_VBIF_READ(mdata, MMSS_VBIF_XIN_HALT_CTRL0);
  161. SDE_VBIF_WRITE(mdata, MMSS_VBIF_XIN_HALT_CTRL0,
  162. reg_val & ~BIT(params->xin_id));
  163. vbif_unlock(mdata->parent_pdev);
  164. if (forced_on)
  165. force_on_xin_clk(params->bit_off_mdp_clk_ctrl,
  166. params->reg_off_mdp_clk_ctrl, false);
  167. }
  168. u32 sde_mdp_get_ot_limit(u32 width, u32 height, u32 pixfmt, u32 fps, u32 is_rd)
  169. {
  170. struct sde_rot_data_type *mdata = sde_rot_get_mdata();
  171. struct sde_mdp_format_params *fmt;
  172. u32 ot_lim;
  173. u32 is_yuv;
  174. u64 res;
  175. ot_lim = (is_rd) ? mdata->default_ot_rd_limit :
  176. mdata->default_ot_wr_limit;
  177. /*
  178. * If default ot is not set from dt,
  179. * then do not configure it.
  180. */
  181. if (ot_lim == 0)
  182. goto exit;
  183. /* Modify the limits if the target and the use case requires it */
  184. if (false == test_bit(SDE_QOS_OTLIM, mdata->sde_qos_map))
  185. goto exit;
  186. width = min_t(u32, width, SDE_ROT_MAX_IMG_WIDTH);
  187. height = min_t(u32, height, SDE_ROT_MAX_IMG_HEIGHT);
  188. res = width * height;
  189. res = res * fps;
  190. fmt = sde_get_format_params(pixfmt);
  191. if (!fmt) {
  192. SDEROT_WARN("invalid format %8.8x\n", pixfmt);
  193. goto exit;
  194. }
  195. is_yuv = sde_mdp_is_yuv_format(fmt);
  196. SDEROT_DBG("w:%d h:%d fps:%d pixfmt:%8.8x yuv:%d res:%llu rd:%d\n",
  197. width, height, fps, pixfmt, is_yuv, res, is_rd);
  198. /*
  199. * If (total_source_pixels <= 62208000 && YUV) -> RD/WROT=2 //1080p30
  200. * If (total_source_pixels <= 124416000 && YUV) -> RD/WROT=4 //1080p60
  201. * If (total_source_pixels <= 2160p && YUV && FPS <= 30) -> RD/WROT = 32
  202. */
  203. if (IS_SDE_MAJOR_MINOR_SAME(mdata->mdss_version,
  204. SDE_MDP_HW_REV_540)) {
  205. if (is_yuv) {
  206. if (res <= (RES_1080p * 30))
  207. ot_lim = 2;
  208. else if (res <= (RES_1080p * 60))
  209. ot_lim = 4;
  210. else if (res <= (RES_WQXGA * 60))
  211. ot_lim = 4;
  212. else if (res <= (RES_UHD * 30))
  213. ot_lim = 8;
  214. } else if (fmt->bpp == 4 && res <= (RES_WQXGA * 60)) {
  215. ot_lim = 16;
  216. }
  217. } else if (IS_SDE_MAJOR_SAME(mdata->mdss_version,
  218. SDE_MDP_HW_REV_600) || is_yuv) {
  219. if (res <= (RES_1080p * 30))
  220. ot_lim = 2;
  221. else if (res <= (RES_1080p * 60))
  222. ot_lim = 4;
  223. }
  224. exit:
  225. SDEROT_DBG("ot_lim=%d\n", ot_lim);
  226. return ot_lim;
  227. }
  228. static u32 get_ot_limit(u32 reg_off, u32 bit_off,
  229. struct sde_mdp_set_ot_params *params)
  230. {
  231. struct sde_rot_data_type *mdata = sde_rot_get_mdata();
  232. u32 ot_lim;
  233. u32 val;
  234. ot_lim = sde_mdp_get_ot_limit(
  235. params->width, params->height,
  236. params->fmt, params->fps,
  237. params->reg_off_vbif_lim_conf == MMSS_VBIF_RD_LIM_CONF);
  238. /*
  239. * If default ot is not set from dt,
  240. * then do not configure it.
  241. */
  242. if (ot_lim == 0)
  243. goto exit;
  244. val = SDE_VBIF_READ(mdata, reg_off);
  245. val &= (0xFF << bit_off);
  246. val = val >> bit_off;
  247. SDEROT_EVTLOG(val, ot_lim);
  248. if (val == ot_lim)
  249. ot_lim = 0;
  250. exit:
  251. SDEROT_DBG("ot_lim=%d\n", ot_lim);
  252. SDEROT_EVTLOG(params->width, params->height, params->fmt, params->fps,
  253. ot_lim);
  254. return ot_lim;
  255. }
  256. void sde_mdp_set_ot_limit(struct sde_mdp_set_ot_params *params)
  257. {
  258. struct sde_rot_data_type *mdata = sde_rot_get_mdata();
  259. u32 ot_lim;
  260. u32 reg_off_vbif_lim_conf = ((params->xin_id / mdata->npriority_lvl)
  261. * mdata->npriority_lvl)
  262. + params->reg_off_vbif_lim_conf;
  263. u32 bit_off_vbif_lim_conf = (params->xin_id % mdata->npriority_lvl) * 8;
  264. u32 reg_val;
  265. u32 sts;
  266. bool forced_on;
  267. vbif_lock(mdata->parent_pdev);
  268. ot_lim = get_ot_limit(
  269. reg_off_vbif_lim_conf,
  270. bit_off_vbif_lim_conf,
  271. params) & 0xFF;
  272. if (ot_lim == 0)
  273. goto exit;
  274. if (params->rotsts_base && params->rotsts_busy_mask) {
  275. sts = readl_relaxed(params->rotsts_base);
  276. if (sts & params->rotsts_busy_mask) {
  277. SDEROT_ERR(
  278. "Rotator still busy, should not modify VBIF\n");
  279. SDEROT_EVTLOG_TOUT_HANDLER(
  280. "rot", "vbif_dbg_bus", "panic");
  281. }
  282. }
  283. trace_rot_perf_set_ot(params->num, params->xin_id, ot_lim);
  284. forced_on = force_on_xin_clk(params->bit_off_mdp_clk_ctrl,
  285. params->reg_off_mdp_clk_ctrl, true);
  286. reg_val = SDE_VBIF_READ(mdata, reg_off_vbif_lim_conf);
  287. reg_val &= ~(0xFF << bit_off_vbif_lim_conf);
  288. reg_val |= (ot_lim) << bit_off_vbif_lim_conf;
  289. SDE_VBIF_WRITE(mdata, reg_off_vbif_lim_conf, reg_val);
  290. reg_val = SDE_VBIF_READ(mdata, MMSS_VBIF_XIN_HALT_CTRL0);
  291. SDE_VBIF_WRITE(mdata, MMSS_VBIF_XIN_HALT_CTRL0,
  292. reg_val | BIT(params->xin_id));
  293. /* this is a polling operation */
  294. sde_mdp_wait_for_xin_halt(params->xin_id);
  295. reg_val = SDE_VBIF_READ(mdata, MMSS_VBIF_XIN_HALT_CTRL0);
  296. SDE_VBIF_WRITE(mdata, MMSS_VBIF_XIN_HALT_CTRL0,
  297. reg_val & ~BIT(params->xin_id));
  298. if (forced_on)
  299. force_on_xin_clk(params->bit_off_mdp_clk_ctrl,
  300. params->reg_off_mdp_clk_ctrl, false);
  301. SDEROT_EVTLOG(params->num, params->xin_id, ot_lim);
  302. exit:
  303. vbif_unlock(mdata->parent_pdev);
  304. return;
  305. }
  306. /*
  307. * sde_mdp_set_vbif_memtype - set memtype output for the given xin port
  308. * @mdata: pointer to global rotator data
  309. * @xin_id: xin identifier
  310. * @memtype: memtype output configuration
  311. * return: none
  312. */
  313. static void sde_mdp_set_vbif_memtype(struct sde_rot_data_type *mdata,
  314. u32 xin_id, u32 memtype)
  315. {
  316. u32 reg_off;
  317. u32 bit_off;
  318. u32 reg_val;
  319. /*
  320. * Assume 4 bits per bit field, 8 fields per 32-bit register.
  321. */
  322. if (xin_id >= 8)
  323. return;
  324. reg_off = MMSS_VBIF_NRT_VBIF_OUT_AXI_AMEMTYPE_CONF0;
  325. bit_off = (xin_id & 0x7) * 4;
  326. reg_val = SDE_VBIF_READ(mdata, reg_off);
  327. reg_val &= ~(0x7 << bit_off);
  328. reg_val |= (memtype & 0x7) << bit_off;
  329. SDE_VBIF_WRITE(mdata, reg_off, reg_val);
  330. }
  331. /*
  332. * sde_mdp_init_vbif - initialize static vbif configuration
  333. * return: 0 if success; error code otherwise
  334. */
  335. int sde_mdp_init_vbif(void)
  336. {
  337. struct sde_rot_data_type *mdata = sde_rot_get_mdata();
  338. int i;
  339. if (!mdata)
  340. return -EINVAL;
  341. if (mdata->vbif_memtype_count && mdata->vbif_memtype) {
  342. for (i = 0; i < mdata->vbif_memtype_count; i++)
  343. sde_mdp_set_vbif_memtype(mdata, i,
  344. mdata->vbif_memtype[i]);
  345. SDEROT_DBG("amemtype=0x%x\n", SDE_VBIF_READ(mdata,
  346. MMSS_VBIF_NRT_VBIF_OUT_AXI_AMEMTYPE_CONF0));
  347. }
  348. return 0;
  349. }
  350. struct reg_bus_client *sde_reg_bus_vote_client_create(char *client_name)
  351. {
  352. struct reg_bus_client *client;
  353. struct sde_rot_data_type *sde_res = sde_rot_get_mdata();
  354. static u32 id;
  355. if (client_name == NULL) {
  356. SDEROT_ERR("client name is null\n");
  357. return ERR_PTR(-EINVAL);
  358. }
  359. client = kzalloc(sizeof(struct reg_bus_client), GFP_KERNEL);
  360. if (!client)
  361. return ERR_PTR(-ENOMEM);
  362. mutex_lock(&sde_res->reg_bus_lock);
  363. strlcpy(client->name, client_name, MAX_CLIENT_NAME_LEN);
  364. client->usecase_ndx = VOTE_INDEX_DISABLE;
  365. client->id = id;
  366. SDEROT_DBG("bus vote client %s created:%pK id :%d\n", client_name,
  367. client, id);
  368. id++;
  369. list_add(&client->list, &sde_res->reg_bus_clist);
  370. mutex_unlock(&sde_res->reg_bus_lock);
  371. return client;
  372. }
  373. void sde_reg_bus_vote_client_destroy(struct reg_bus_client *client)
  374. {
  375. struct sde_rot_data_type *sde_res = sde_rot_get_mdata();
  376. if (!client) {
  377. SDEROT_ERR("reg bus vote: invalid client handle\n");
  378. } else {
  379. SDEROT_DBG("bus vote client %s destroyed:%pK id:%u\n",
  380. client->name, client, client->id);
  381. mutex_lock(&sde_res->reg_bus_lock);
  382. list_del_init(&client->list);
  383. mutex_unlock(&sde_res->reg_bus_lock);
  384. kfree(client);
  385. }
  386. }
  387. int sde_update_reg_bus_vote(struct reg_bus_client *bus_client, u32 usecase_ndx)
  388. {
  389. int ret = 0;
  390. bool changed = false;
  391. u32 max_usecase_ndx = VOTE_INDEX_DISABLE;
  392. const struct sde_rot_bus_data *reg_bus_value = NULL;
  393. struct reg_bus_client *client, *temp_client;
  394. struct sde_rot_data_type *sde_res = sde_rot_get_mdata();
  395. if (!sde_res || !sde_res->reg_bus_hdl || !bus_client)
  396. return 0;
  397. mutex_lock(&sde_res->reg_bus_lock);
  398. bus_client->usecase_ndx = usecase_ndx;
  399. list_for_each_entry_safe(client, temp_client, &sde_res->reg_bus_clist,
  400. list) {
  401. if (client->usecase_ndx < VOTE_INDEX_MAX &&
  402. client->usecase_ndx > max_usecase_ndx)
  403. max_usecase_ndx = client->usecase_ndx;
  404. }
  405. if (sde_res->reg_bus_usecase_ndx != max_usecase_ndx)
  406. changed = true;
  407. SDEROT_DBG(
  408. "%pS: changed=%d current idx=%d request client %s id:%u idx:%d\n",
  409. __builtin_return_address(0), changed, max_usecase_ndx,
  410. bus_client->name, bus_client->id, usecase_ndx);
  411. if (changed) {
  412. reg_bus_value = sde_get_rot_reg_bus_value(max_usecase_ndx);
  413. ret = icc_set_bw(sde_res->reg_bus_hdl, reg_bus_value->ab,
  414. reg_bus_value->ib);
  415. }
  416. if (ret) {
  417. pr_err("rotator: reg_bus_hdl set failed ab=%llu, ib=%llu\n",
  418. reg_bus_value->ab, reg_bus_value->ib);
  419. if (sde_res->reg_bus_usecase_ndx == VOTE_INDEX_DISABLE)
  420. pr_err("rotator: reg_bus_hdl was disabled\n");
  421. } else {
  422. sde_res->reg_bus_usecase_ndx = max_usecase_ndx;
  423. }
  424. mutex_unlock(&sde_res->reg_bus_lock);
  425. return ret;
  426. }
  427. static int sde_mdp_parse_dt_handler(struct platform_device *pdev,
  428. char *prop_name, u32 *offsets, int len)
  429. {
  430. int rc;
  431. rc = of_property_read_u32_array(pdev->dev.of_node, prop_name,
  432. offsets, len);
  433. if (rc) {
  434. SDEROT_DBG("Error from prop %s : u32 array read\n", prop_name);
  435. return -EINVAL;
  436. }
  437. return 0;
  438. }
  439. static int sde_mdp_parse_dt_prop_len(struct platform_device *pdev,
  440. char *prop_name)
  441. {
  442. int len = 0;
  443. of_find_property(pdev->dev.of_node, prop_name, &len);
  444. if (len < 1) {
  445. SDEROT_INFO("prop %s : doesn't exist in device tree\n",
  446. prop_name);
  447. return 0;
  448. }
  449. len = len/sizeof(u32);
  450. return len;
  451. }
  452. static void sde_mdp_parse_vbif_memtype(struct platform_device *pdev,
  453. struct sde_rot_data_type *mdata)
  454. {
  455. int rc;
  456. mdata->vbif_memtype_count = sde_mdp_parse_dt_prop_len(pdev,
  457. "qcom,mdss-rot-vbif-memtype");
  458. mdata->vbif_memtype = kcalloc(mdata->vbif_memtype_count,
  459. sizeof(u32), GFP_KERNEL);
  460. if (!mdata->vbif_memtype || !mdata->vbif_memtype_count) {
  461. mdata->vbif_memtype_count = 0;
  462. return;
  463. }
  464. rc = sde_mdp_parse_dt_handler(pdev,
  465. "qcom,mdss-rot-vbif-memtype", mdata->vbif_memtype,
  466. mdata->vbif_memtype_count);
  467. if (rc) {
  468. SDEROT_DBG("vbif memtype not found\n");
  469. kfree(mdata->vbif_memtype);
  470. mdata->vbif_memtype = NULL;
  471. mdata->vbif_memtype_count = 0;
  472. return;
  473. }
  474. }
  475. static void sde_mdp_parse_vbif_qos(struct platform_device *pdev,
  476. struct sde_rot_data_type *mdata)
  477. {
  478. int rc;
  479. mdata->vbif_rt_qos = NULL;
  480. mdata->npriority_lvl = sde_mdp_parse_dt_prop_len(pdev,
  481. "qcom,mdss-rot-vbif-qos-setting");
  482. mdata->vbif_nrt_qos = kcalloc(mdata->npriority_lvl,
  483. sizeof(u32), GFP_KERNEL);
  484. if (!mdata->vbif_nrt_qos || !mdata->npriority_lvl) {
  485. mdata->npriority_lvl = 0;
  486. return;
  487. }
  488. rc = sde_mdp_parse_dt_handler(pdev,
  489. "qcom,mdss-rot-vbif-qos-setting", mdata->vbif_nrt_qos,
  490. mdata->npriority_lvl);
  491. if (rc) {
  492. SDEROT_DBG("vbif setting not found\n");
  493. kfree(mdata->vbif_nrt_qos);
  494. mdata->vbif_nrt_qos = NULL;
  495. mdata->npriority_lvl = 0;
  496. return;
  497. }
  498. }
  499. static void sde_mdp_parse_vbif_xin_id(struct platform_device *pdev,
  500. struct sde_rot_data_type *mdata)
  501. {
  502. mdata->vbif_xin_id[XIN_SSPP] = XIN_SSPP;
  503. mdata->vbif_xin_id[XIN_WRITEBACK] = XIN_WRITEBACK;
  504. sde_mdp_parse_dt_handler(pdev, "qcom,mdss-rot-xin-id",
  505. mdata->vbif_xin_id, MAX_XIN);
  506. }
  507. static void sde_mdp_parse_cdp_setting(struct platform_device *pdev,
  508. struct sde_rot_data_type *mdata)
  509. {
  510. int rc;
  511. u32 len, data[SDE_ROT_OP_MAX] = {0};
  512. len = sde_mdp_parse_dt_prop_len(pdev,
  513. "qcom,mdss-rot-cdp-setting");
  514. if (len == SDE_ROT_OP_MAX) {
  515. rc = sde_mdp_parse_dt_handler(pdev,
  516. "qcom,mdss-rot-cdp-setting", data, len);
  517. if (rc) {
  518. SDEROT_ERR("invalid CDP setting\n");
  519. goto end;
  520. }
  521. set_bit(SDE_QOS_CDP, mdata->sde_qos_map);
  522. mdata->enable_cdp[SDE_ROT_RD] = data[SDE_ROT_RD];
  523. mdata->enable_cdp[SDE_ROT_WR] = data[SDE_ROT_WR];
  524. return;
  525. }
  526. end:
  527. clear_bit(SDE_QOS_CDP, mdata->sde_qos_map);
  528. }
  529. static void sde_mdp_parse_rot_lut_setting(struct platform_device *pdev,
  530. struct sde_rot_data_type *mdata)
  531. {
  532. int rc;
  533. u32 len, data[4];
  534. len = sde_mdp_parse_dt_prop_len(pdev, "qcom,mdss-rot-qos-lut");
  535. if (len == 4) {
  536. rc = sde_mdp_parse_dt_handler(pdev,
  537. "qcom,mdss-rot-qos-lut", data, len);
  538. if (!rc) {
  539. mdata->lut_cfg[SDE_ROT_RD].creq_lut_0 = data[0];
  540. mdata->lut_cfg[SDE_ROT_RD].creq_lut_1 = data[1];
  541. mdata->lut_cfg[SDE_ROT_WR].creq_lut_0 = data[2];
  542. mdata->lut_cfg[SDE_ROT_WR].creq_lut_1 = data[3];
  543. set_bit(SDE_QOS_LUT, mdata->sde_qos_map);
  544. } else {
  545. SDEROT_DBG("qos lut setting not found\n");
  546. }
  547. }
  548. len = sde_mdp_parse_dt_prop_len(pdev, "qcom,mdss-rot-danger-lut");
  549. if (len == SDE_ROT_OP_MAX) {
  550. rc = sde_mdp_parse_dt_handler(pdev,
  551. "qcom,mdss-rot-danger-lut", data, len);
  552. if (!rc) {
  553. mdata->lut_cfg[SDE_ROT_RD].danger_lut
  554. = data[SDE_ROT_RD];
  555. mdata->lut_cfg[SDE_ROT_WR].danger_lut
  556. = data[SDE_ROT_WR];
  557. set_bit(SDE_QOS_DANGER_LUT, mdata->sde_qos_map);
  558. } else {
  559. SDEROT_DBG("danger lut setting not found\n");
  560. }
  561. }
  562. len = sde_mdp_parse_dt_prop_len(pdev, "qcom,mdss-rot-safe-lut");
  563. if (len == SDE_ROT_OP_MAX) {
  564. rc = sde_mdp_parse_dt_handler(pdev,
  565. "qcom,mdss-rot-safe-lut", data, len);
  566. if (!rc) {
  567. mdata->lut_cfg[SDE_ROT_RD].safe_lut = data[SDE_ROT_RD];
  568. mdata->lut_cfg[SDE_ROT_WR].safe_lut = data[SDE_ROT_WR];
  569. set_bit(SDE_QOS_SAFE_LUT, mdata->sde_qos_map);
  570. } else {
  571. SDEROT_DBG("safe lut setting not found\n");
  572. }
  573. }
  574. }
  575. static void sde_mdp_parse_inline_rot_lut_setting(struct platform_device *pdev,
  576. struct sde_rot_data_type *mdata)
  577. {
  578. int rc;
  579. u32 len, data[4];
  580. len = sde_mdp_parse_dt_prop_len(pdev, "qcom,mdss-inline-rot-qos-lut");
  581. if (len == 4) {
  582. rc = sde_mdp_parse_dt_handler(pdev,
  583. "qcom,mdss-inline-rot-qos-lut", data, len);
  584. if (!rc) {
  585. mdata->inline_lut_cfg[SDE_ROT_RD].creq_lut_0 = data[0];
  586. mdata->inline_lut_cfg[SDE_ROT_RD].creq_lut_1 = data[1];
  587. mdata->inline_lut_cfg[SDE_ROT_WR].creq_lut_0 = data[2];
  588. mdata->inline_lut_cfg[SDE_ROT_WR].creq_lut_1 = data[3];
  589. set_bit(SDE_INLINE_QOS_LUT, mdata->sde_inline_qos_map);
  590. } else {
  591. SDEROT_DBG("inline qos lut setting not found\n");
  592. }
  593. }
  594. len = sde_mdp_parse_dt_prop_len(pdev,
  595. "qcom,mdss-inline-rot-danger-lut");
  596. if (len == SDE_ROT_OP_MAX) {
  597. rc = sde_mdp_parse_dt_handler(pdev,
  598. "qcom,mdss-inline-rot-danger-lut", data, len);
  599. if (!rc) {
  600. mdata->inline_lut_cfg[SDE_ROT_RD].danger_lut
  601. = data[SDE_ROT_RD];
  602. mdata->inline_lut_cfg[SDE_ROT_WR].danger_lut
  603. = data[SDE_ROT_WR];
  604. set_bit(SDE_INLINE_QOS_DANGER_LUT,
  605. mdata->sde_inline_qos_map);
  606. } else {
  607. SDEROT_DBG("inline danger lut setting not found\n");
  608. }
  609. }
  610. len = sde_mdp_parse_dt_prop_len(pdev, "qcom,mdss-inline-rot-safe-lut");
  611. if (len == SDE_ROT_OP_MAX) {
  612. rc = sde_mdp_parse_dt_handler(pdev,
  613. "qcom,mdss-inline-rot-safe-lut", data, len);
  614. if (!rc) {
  615. mdata->inline_lut_cfg[SDE_ROT_RD].safe_lut
  616. = data[SDE_ROT_RD];
  617. mdata->inline_lut_cfg[SDE_ROT_WR].safe_lut
  618. = data[SDE_ROT_WR];
  619. set_bit(SDE_INLINE_QOS_SAFE_LUT,
  620. mdata->sde_inline_qos_map);
  621. } else {
  622. SDEROT_DBG("inline safe lut setting not found\n");
  623. }
  624. }
  625. }
  626. static void sde_mdp_parse_rt_rotator(struct device_node *np)
  627. {
  628. struct sde_rot_data_type *mdata = sde_rot_get_mdata();
  629. struct platform_device *pdev;
  630. struct of_phandle_args phargs;
  631. int rc = 0;
  632. rc = of_parse_phandle_with_args(np,
  633. "qcom,mdss-rot-parent", "#list-cells", 0, &phargs);
  634. if (rc)
  635. return;
  636. if (!phargs.np || !phargs.args_count) {
  637. SDEROT_ERR("invalid args\n");
  638. return;
  639. }
  640. pdev = of_find_device_by_node(phargs.np);
  641. if (pdev) {
  642. mdata->parent_pdev = pdev;
  643. } else {
  644. mdata->parent_pdev = NULL;
  645. SDEROT_ERR("Parent mdp node not available\n");
  646. }
  647. of_node_put(phargs.np);
  648. }
  649. static int sde_mdp_parse_dt_misc(struct platform_device *pdev,
  650. struct sde_rot_data_type *mdata)
  651. {
  652. int rc;
  653. u32 data;
  654. rc = of_property_read_u32(pdev->dev.of_node, "qcom,mdss-rot-block-size",
  655. &data);
  656. mdata->rot_block_size = (!rc ? data : 128);
  657. rc = of_property_read_u32(pdev->dev.of_node,
  658. "qcom,mdss-default-ot-rd-limit", &data);
  659. mdata->default_ot_rd_limit = (!rc ? data : 0);
  660. rc = of_property_read_u32(pdev->dev.of_node,
  661. "qcom,mdss-default-ot-wr-limit", &data);
  662. mdata->default_ot_wr_limit = (!rc ? data : 0);
  663. rc = of_property_read_u32(pdev->dev.of_node,
  664. "qcom,mdss-highest-bank-bit", &(mdata->highest_bank_bit));
  665. if (rc)
  666. SDEROT_DBG(
  667. "Could not read optional property: highest bank bit\n");
  668. sde_mdp_parse_cdp_setting(pdev, mdata);
  669. sde_mdp_parse_vbif_qos(pdev, mdata);
  670. sde_mdp_parse_vbif_xin_id(pdev, mdata);
  671. sde_mdp_parse_vbif_memtype(pdev, mdata);
  672. sde_mdp_parse_rot_lut_setting(pdev, mdata);
  673. sde_mdp_parse_inline_rot_lut_setting(pdev, mdata);
  674. rc = of_property_read_u32(pdev->dev.of_node,
  675. "qcom,mdss-rot-qos-cpu-mask", &data);
  676. mdata->rot_pm_qos_cpu_mask = (!rc ? data : 0);
  677. rc = of_property_read_u32(pdev->dev.of_node,
  678. "qcom,mdss-rot-qos-cpu-dma-latency", &data);
  679. mdata->rot_pm_qos_cpu_dma_latency = (!rc ? data : 0);
  680. mdata->mdp_base = mdata->sde_io.base + SDE_MDP_OFFSET;
  681. return 0;
  682. }
  683. static void sde_mdp_destroy_dt_misc(struct platform_device *pdev,
  684. struct sde_rot_data_type *mdata)
  685. {
  686. kfree(mdata->vbif_memtype);
  687. mdata->vbif_memtype = NULL;
  688. kfree(mdata->vbif_rt_qos);
  689. mdata->vbif_rt_qos = NULL;
  690. kfree(mdata->vbif_nrt_qos);
  691. mdata->vbif_nrt_qos = NULL;
  692. }
  693. static int sde_mdp_bus_scale_register(struct sde_rot_data_type *mdata)
  694. {
  695. int rc = 0;
  696. mdata->reg_bus_hdl = of_icc_get(&mdata->pdev->dev, "qcom,sde-reg-bus");
  697. if (mdata->reg_bus_hdl == NULL) {
  698. pr_err("rotator: reg bus dt node missing\n");
  699. return 0;
  700. } else if (IS_ERR(mdata->reg_bus_hdl)) {
  701. SDEROT_ERR("reg bus handle parsing failed\n");
  702. mdata->reg_bus_hdl = NULL;
  703. rc = -EINVAL;
  704. } else {
  705. SDEROT_DBG("rotator reg_bus_hdl parsing success\n");
  706. }
  707. return rc;
  708. }
  709. static void sde_mdp_bus_scale_unregister(struct sde_rot_data_type *mdata)
  710. {
  711. SDEROT_DBG("unregister reg_bus_hdl\n");
  712. if (mdata->reg_bus_hdl) {
  713. icc_put(mdata->reg_bus_hdl);
  714. mdata->reg_bus_hdl = NULL;
  715. }
  716. }
  717. static struct sde_rot_data_type *sde_rot_res;
  718. struct sde_rot_data_type *sde_rot_get_mdata(void)
  719. {
  720. return sde_rot_res;
  721. }
  722. /*
  723. * sde_rotator_base_init - initialize base rotator data/resource
  724. */
  725. int sde_rotator_base_init(struct sde_rot_data_type **pmdata,
  726. struct platform_device *pdev,
  727. const void *drvdata)
  728. {
  729. int rc;
  730. struct sde_rot_data_type *mdata;
  731. /* if probe deferral happened, return early*/
  732. if (sde_rot_res) {
  733. SDEROT_ERR("Rotator data already initialized, skip init\n");
  734. return 0;
  735. }
  736. mdata = devm_kzalloc(&pdev->dev, sizeof(*mdata), GFP_KERNEL);
  737. if (mdata == NULL)
  738. return -ENOMEM;
  739. mdata->pdev = pdev;
  740. sde_rot_res = mdata;
  741. mutex_init(&mdata->reg_bus_lock);
  742. INIT_LIST_HEAD(&mdata->reg_bus_clist);
  743. rc = sde_rot_ioremap_byname(pdev, &mdata->sde_io, "mdp_phys");
  744. if (rc) {
  745. SDEROT_ERR("unable to map SDE base\n");
  746. goto probe_done;
  747. }
  748. SDEROT_DBG("SDE ROT HW Base addr=0x%x len=0x%x\n",
  749. (int) (unsigned long) mdata->sde_io.base,
  750. mdata->sde_io.len);
  751. rc = sde_rot_ioremap_byname(pdev, &mdata->vbif_nrt_io, "rot_vbif_phys");
  752. if (rc) {
  753. SDEROT_ERR("unable to map SDE ROT VBIF base\n");
  754. goto probe_done;
  755. }
  756. SDEROT_DBG("SDE ROT VBIF HW Base addr=%pK len=0x%x\n",
  757. mdata->vbif_nrt_io.base, mdata->vbif_nrt_io.len);
  758. sde_mdp_parse_rt_rotator(pdev->dev.of_node);
  759. rc = sde_mdp_parse_dt_misc(pdev, mdata);
  760. if (rc) {
  761. SDEROT_ERR("Error in device tree : misc\n");
  762. goto probe_done;
  763. }
  764. rc = sde_mdp_bus_scale_register(mdata);
  765. if (rc) {
  766. SDEROT_ERR("unable to register bus scaling\n");
  767. goto probe_done;
  768. }
  769. rc = sde_smmu_init(&pdev->dev);
  770. if (rc) {
  771. SDEROT_ERR("sde smmu init failed %d\n", rc);
  772. goto probe_done;
  773. }
  774. *pmdata = mdata;
  775. return 0;
  776. probe_done:
  777. return rc;
  778. }
  779. /*
  780. * sde_rotator_base_destroy - clean up base rotator data/resource
  781. */
  782. void sde_rotator_base_destroy(struct sde_rot_data_type *mdata)
  783. {
  784. struct platform_device *pdev;
  785. if (!mdata || !mdata->pdev)
  786. return;
  787. pdev = mdata->pdev;
  788. sde_rot_res = NULL;
  789. sde_mdp_bus_scale_unregister(mdata);
  790. sde_mdp_destroy_dt_misc(pdev, mdata);
  791. sde_rot_iounmap(&mdata->vbif_nrt_io);
  792. sde_rot_iounmap(&mdata->sde_io);
  793. devm_kfree(&pdev->dev, mdata);
  794. }