sde_encoder.h 27 KB

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  1. /*
  2. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (C) 2013 Red Hat
  5. * Author: Rob Clark <[email protected]>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #ifndef __SDE_ENCODER_H__
  20. #define __SDE_ENCODER_H__
  21. #include <drm/drm_crtc.h>
  22. #include <drm/drm_bridge.h>
  23. #include <linux/sde_rsc.h>
  24. #include "msm_prop.h"
  25. #include "sde_hw_mdss.h"
  26. #include "sde_kms.h"
  27. #include "sde_connector.h"
  28. #include "sde_power_handle.h"
  29. /*
  30. * Two to anticipate panels that can do cmd/vid dynamic switching
  31. * plan is to create all possible physical encoder types, and switch between
  32. * them at runtime
  33. */
  34. #define NUM_PHYS_ENCODER_TYPES 2
  35. #define MAX_PHYS_ENCODERS_PER_VIRTUAL \
  36. (MAX_H_TILES_PER_DISPLAY * NUM_PHYS_ENCODER_TYPES)
  37. #define MAX_CHANNELS_PER_ENC 4
  38. #define SDE_ENCODER_FRAME_EVENT_DONE BIT(0)
  39. #define SDE_ENCODER_FRAME_EVENT_ERROR BIT(1)
  40. #define SDE_ENCODER_FRAME_EVENT_PANEL_DEAD BIT(2)
  41. #define SDE_ENCODER_FRAME_EVENT_SIGNAL_RELEASE_FENCE BIT(3)
  42. #define SDE_ENCODER_FRAME_EVENT_SIGNAL_RETIRE_FENCE BIT(4)
  43. #define SDE_ENCODER_FRAME_EVENT_CWB_DONE BIT(5)
  44. #define IDLE_POWERCOLLAPSE_DURATION (66 - 16/2)
  45. #define IDLE_POWERCOLLAPSE_IN_EARLY_WAKEUP (200 - 16/2)
  46. /* below this fps limit, timeouts are adjusted based on fps */
  47. #define DEFAULT_TIMEOUT_FPS_THRESHOLD 24
  48. #define SDE_ENC_IRQ_REGISTERED(phys_enc, idx) \
  49. ((!(phys_enc) || ((idx) < 0) || ((idx) >= INTR_IDX_MAX)) ? \
  50. 0 : ((phys_enc)->irq[(idx)].irq_idx >= 0))
  51. #define DEFAULT_MIN_FPS 10
  52. /**
  53. * Encoder functions and data types
  54. * @intfs: Interfaces this encoder is using, INTF_MODE_NONE if unused
  55. * @wbs: Writebacks this encoder is using, INTF_MODE_NONE if unused
  56. * @needs_cdm: Encoder requests a CDM based on pixel format conversion needs
  57. * @display_num_of_h_tiles: Number of horizontal tiles in case of split
  58. * interface
  59. * @display_type: Type of the display
  60. * @topology: Topology of the display
  61. * @comp_info: Compression parameters information
  62. */
  63. struct sde_encoder_hw_resources {
  64. enum sde_intf_mode intfs[INTF_MAX];
  65. enum sde_intf_mode wbs[WB_MAX];
  66. bool needs_cdm;
  67. u32 display_num_of_h_tiles;
  68. enum sde_connector_display display_type;
  69. struct msm_display_topology topology;
  70. struct msm_compression_info *comp_info;
  71. };
  72. /**
  73. * sde_encoder_kickoff_params - info encoder requires at kickoff
  74. * @affected_displays: bitmask, bit set means the ROI of the commit lies within
  75. * the bounds of the physical display at the bit index
  76. * @recovery_events_enabled: indicates status of client for recoovery events
  77. * @frame_trigger_mode: indicates frame trigger mode
  78. */
  79. struct sde_encoder_kickoff_params {
  80. unsigned long affected_displays;
  81. bool recovery_events_enabled;
  82. enum frame_trigger_mode_type frame_trigger_mode;
  83. };
  84. /*
  85. * enum sde_enc_rc_states - states that the resource control maintains
  86. * @SDE_ENC_RC_STATE_OFF: Resource is in OFF state
  87. * @SDE_ENC_RC_STATE_PRE_OFF: Resource is transitioning to OFF state
  88. * @SDE_ENC_RC_STATE_ON: Resource is in ON state
  89. * @SDE_ENC_RC_STATE_MODESET: Resource is in modeset state
  90. * @SDE_ENC_RC_STATE_IDLE: Resource is in IDLE state
  91. */
  92. enum sde_enc_rc_states {
  93. SDE_ENC_RC_STATE_OFF,
  94. SDE_ENC_RC_STATE_PRE_OFF,
  95. SDE_ENC_RC_STATE_ON,
  96. SDE_ENC_RC_STATE_MODESET,
  97. SDE_ENC_RC_STATE_IDLE
  98. };
  99. /**
  100. * struct sde_encoder_virt - virtual encoder. Container of one or more physical
  101. * encoders. Virtual encoder manages one "logical" display. Physical
  102. * encoders manage one intf block, tied to a specific panel/sub-panel.
  103. * Virtual encoder defers as much as possible to the physical encoders.
  104. * Virtual encoder registers itself with the DRM Framework as the encoder.
  105. * @base: drm_encoder base class for registration with DRM
  106. * @enc_spin_lock: Virtual-Encoder-Wide Spin Lock for IRQ purposes
  107. * @bus_scaling_client: Client handle to the bus scaling interface
  108. * @te_source: vsync source pin information
  109. * @num_phys_encs: Actual number of physical encoders contained.
  110. * @phys_encs: Container of physical encoders managed.
  111. * @phys_vid_encs: Video physical encoders for panel mode switch.
  112. * @phys_cmd_encs: Command physical encoders for panel mode switch.
  113. * @cur_master: Pointer to the current master in this mode. Optimization
  114. * Only valid after enable. Cleared as disable.
  115. * @hw_pp Handle to the pingpong blocks used for the display. No.
  116. * pingpong blocks can be different than num_phys_encs.
  117. * @hw_dsc: Array of DSC block handles used for the display.
  118. * @hw_vdc: Array of VDC block handles used for the display.
  119. * @dirty_dsc_ids: Cached dsc indexes for dirty DSC blocks needing flush
  120. * @intfs_swapped Whether or not the phys_enc interfaces have been swapped
  121. * for partial update right-only cases, such as pingpong
  122. * split where virtual pingpong does not generate IRQs
  123. * @qdss_status: indicate if qdss is modified since last update
  124. * @crtc_vblank_cb: Callback into the upper layer / CRTC for
  125. * notification of the VBLANK
  126. * @crtc_vblank_cb_data: Data from upper layer for VBLANK notification
  127. * @crtc_kickoff_cb: Callback into CRTC that will flush & start
  128. * all CTL paths
  129. * @crtc_kickoff_cb_data: Opaque user data given to crtc_kickoff_cb
  130. * @debugfs_root: Debug file system root file node
  131. * @enc_lock: Lock around physical encoder create/destroy and
  132. access.
  133. * @frame_done_cnt: Atomic counter for tracking which phys_enc is
  134. * done with frame processing
  135. * @crtc_frame_event_cb: callback handler for frame event
  136. * @crtc_frame_event_cb_data: callback handler private data
  137. * @rsc_client: rsc client pointer
  138. * @rsc_state_init: boolean to indicate rsc config init
  139. * @disp_info: local copy of msm_display_info struct
  140. * @misr_enable: misr enable/disable status
  141. * @misr_reconfigure: boolean entry indicates misr reconfigure status
  142. * @misr_frame_count: misr frame count before start capturing the data
  143. * @idle_pc_enabled: indicate if idle power collapse is enabled
  144. * currently. This can be controlled by user-mode
  145. * @restore_te_rd_ptr: flag to indicate that te read pointer value must
  146. * be restored after idle power collapse
  147. * @rc_lock: resource control mutex lock to protect
  148. * virt encoder over various state changes
  149. * @rc_state: resource controller state
  150. * @delayed_off_work: delayed worker to schedule disabling of
  151. * clks and resources after IDLE_TIMEOUT time.
  152. * @early_wakeup_work: worker to handle early wakeup event
  153. * @input_event_work: worker to handle input device touch events
  154. * @esd_trigger_work: worker to handle esd trigger events
  155. * @input_handler: handler for input device events
  156. * @topology: topology of the display
  157. * @vblank_enabled: boolean to track userspace vblank vote
  158. * @idle_pc_restore: flag to indicate idle_pc_restore happened
  159. * @frame_trigger_mode: frame trigger mode indication for command mode
  160. * display
  161. * @dynamic_hdr_updated: flag to indicate if mempool was unchanged
  162. * @rsc_config: rsc configuration for display vtotal, fps, etc.
  163. * @cur_conn_roi: current connector roi
  164. * @prv_conn_roi: previous connector roi to optimize if unchanged
  165. * @crtc pointer to drm_crtc
  166. * @fal10_veto_override: software override for micro idle fal10 veto
  167. * @recovery_events_enabled: status of hw recovery feature enable by client
  168. * @elevated_ahb_vote: increase AHB bus speed for the first frame
  169. * after power collapse
  170. * @pm_qos_cpu_req: qos request for all cpu core frequency
  171. * @valid_cpu_mask: actual voted cpu core mask
  172. * @mode_info: stores the current mode and should be used
  173. * only in commit phase
  174. * @delay_kickoff boolean to delay the kickoff, used in case
  175. * of esd attack to ensure esd workqueue detects
  176. * the previous frame transfer completion before
  177. * next update is triggered.
  178. * @autorefresh_solver_disable It tracks if solver state is disabled from this
  179. * encoder due to autorefresh concurrency.
  180. * @ctl_done_supported boolean flag to indicate the availability of
  181. * ctl done irq support for the hardware
  182. * @dynamic_irqs_config bitmask config to enable encoder dynamic irqs
  183. */
  184. struct sde_encoder_virt {
  185. struct drm_encoder base;
  186. spinlock_t enc_spinlock;
  187. struct mutex vblank_ctl_lock;
  188. uint32_t bus_scaling_client;
  189. uint32_t display_num_of_h_tiles;
  190. uint32_t te_source;
  191. unsigned int num_phys_encs;
  192. struct sde_encoder_phys *phys_encs[MAX_PHYS_ENCODERS_PER_VIRTUAL];
  193. struct sde_encoder_phys *phys_vid_encs[MAX_PHYS_ENCODERS_PER_VIRTUAL];
  194. struct sde_encoder_phys *phys_cmd_encs[MAX_PHYS_ENCODERS_PER_VIRTUAL];
  195. struct sde_encoder_phys *cur_master;
  196. struct sde_hw_pingpong *hw_pp[MAX_CHANNELS_PER_ENC];
  197. struct sde_hw_dsc *hw_dsc[MAX_CHANNELS_PER_ENC];
  198. struct sde_hw_vdc *hw_vdc[MAX_CHANNELS_PER_ENC];
  199. struct sde_hw_pingpong *hw_dsc_pp[MAX_CHANNELS_PER_ENC];
  200. enum sde_dsc dirty_dsc_ids[MAX_CHANNELS_PER_ENC];
  201. enum sde_vdc dirty_vdc_ids[MAX_CHANNELS_PER_ENC];
  202. bool intfs_swapped;
  203. bool qdss_status;
  204. void (*crtc_vblank_cb)(void *data, ktime_t ts);
  205. void *crtc_vblank_cb_data;
  206. struct dentry *debugfs_root;
  207. struct mutex enc_lock;
  208. atomic_t frame_done_cnt[MAX_PHYS_ENCODERS_PER_VIRTUAL];
  209. void (*crtc_frame_event_cb)(void *data, u32 event, ktime_t ts);
  210. struct sde_kms_frame_event_cb_data crtc_frame_event_cb_data;
  211. struct sde_rsc_client *rsc_client;
  212. bool rsc_state_init;
  213. struct msm_display_info disp_info;
  214. atomic_t misr_enable;
  215. bool misr_reconfigure;
  216. u32 misr_frame_count;
  217. bool idle_pc_enabled;
  218. bool input_event_enabled;
  219. struct mutex rc_lock;
  220. enum sde_enc_rc_states rc_state;
  221. struct kthread_delayed_work delayed_off_work;
  222. struct kthread_work early_wakeup_work;
  223. struct kthread_work input_event_work;
  224. struct kthread_work esd_trigger_work;
  225. struct input_handler *input_handler;
  226. bool vblank_enabled;
  227. bool idle_pc_restore;
  228. bool restore_te_rd_ptr;
  229. enum frame_trigger_mode_type frame_trigger_mode;
  230. bool dynamic_hdr_updated;
  231. struct sde_rsc_cmd_config rsc_config;
  232. struct sde_rect cur_conn_roi;
  233. struct sde_rect prv_conn_roi;
  234. struct drm_crtc *crtc;
  235. bool fal10_veto_override;
  236. bool recovery_events_enabled;
  237. bool elevated_ahb_vote;
  238. struct dev_pm_qos_request pm_qos_cpu_req[NR_CPUS];
  239. struct cpumask valid_cpu_mask;
  240. struct msm_mode_info mode_info;
  241. bool delay_kickoff;
  242. bool autorefresh_solver_disable;
  243. bool ctl_done_supported;
  244. unsigned long dynamic_irqs_config;
  245. };
  246. #define to_sde_encoder_virt(x) container_of(x, struct sde_encoder_virt, base)
  247. /**
  248. * sde_encoder_get_hw_resources - Populate table of required hardware resources
  249. * @encoder: encoder pointer
  250. * @hw_res: resource table to populate with encoder required resources
  251. * @conn_state: report hw reqs based on this proposed connector state
  252. */
  253. void sde_encoder_get_hw_resources(struct drm_encoder *encoder,
  254. struct sde_encoder_hw_resources *hw_res,
  255. struct drm_connector_state *conn_state);
  256. /**
  257. * sde_encoder_early_wakeup - early wake up display
  258. * @encoder: encoder pointer
  259. */
  260. void sde_encoder_early_wakeup(struct drm_encoder *drm_enc);
  261. /**
  262. * sde_encoder_register_vblank_callback - provide callback to encoder that
  263. * will be called on the next vblank.
  264. * @encoder: encoder pointer
  265. * @cb: callback pointer, provide NULL to deregister and disable IRQs
  266. * @data: user data provided to callback
  267. */
  268. void sde_encoder_register_vblank_callback(struct drm_encoder *encoder,
  269. void (*cb)(void *, ktime_t), void *data);
  270. /**
  271. * sde_encoder_register_frame_event_callback - provide callback to encoder that
  272. * will be called after the request is complete, or other events.
  273. * @encoder: encoder pointer
  274. * @cb: callback pointer, provide NULL to deregister
  275. * @crtc: pointer to drm_crtc object interested in frame events
  276. */
  277. void sde_encoder_register_frame_event_callback(struct drm_encoder *encoder,
  278. void (*cb)(void *, u32, ktime_t), struct drm_crtc *crtc);
  279. /**
  280. * sde_encoder_get_rsc_client - gets the rsc client state for primary
  281. * for primary display.
  282. * @encoder: encoder pointer
  283. */
  284. struct sde_rsc_client *sde_encoder_get_rsc_client(struct drm_encoder *encoder);
  285. /**
  286. * sde_encoder_poll_line_counts - poll encoder line counts for start of frame
  287. * @encoder: encoder pointer
  288. * @Returns: zero on success
  289. */
  290. int sde_encoder_poll_line_counts(struct drm_encoder *encoder);
  291. /**
  292. * sde_encoder_prepare_for_kickoff - schedule double buffer flip of the ctl
  293. * path (i.e. ctl flush and start) at next appropriate time.
  294. * Immediately: if no previous commit is outstanding.
  295. * Delayed: Block until next trigger can be issued.
  296. * @encoder: encoder pointer
  297. * @params: kickoff time parameters
  298. * @Returns: Zero on success, last detected error otherwise
  299. */
  300. int sde_encoder_prepare_for_kickoff(struct drm_encoder *encoder,
  301. struct sde_encoder_kickoff_params *params);
  302. /**
  303. * sde_encoder_trigger_kickoff_pending - Clear the flush bits from previous
  304. * kickoff and trigger the ctl prepare progress for command mode display.
  305. * @encoder: encoder pointer
  306. */
  307. void sde_encoder_trigger_kickoff_pending(struct drm_encoder *encoder);
  308. /**
  309. * sde_encoder_kickoff - trigger a double buffer flip of the ctl path
  310. * (i.e. ctl flush and start) immediately.
  311. * @encoder: encoder pointer
  312. * @config_changed: if true new configuration is applied on the control path
  313. */
  314. void sde_encoder_kickoff(struct drm_encoder *encoder, bool config_changed);
  315. /**
  316. * sde_encoder_wait_for_event - Waits for encoder events
  317. * @encoder: encoder pointer
  318. * @event: event to wait for
  319. * MSM_ENC_COMMIT_DONE - Wait for hardware to have flushed the current pending
  320. * frames to hardware at a vblank or wr_ptr_start
  321. * Encoders will map this differently depending on the
  322. * panel type.
  323. * vid mode -> vsync_irq
  324. * cmd mode -> wr_ptr_start_irq
  325. * MSM_ENC_TX_COMPLETE - Wait for the hardware to transfer all the pixels to
  326. * the panel. Encoders will map this differently
  327. * depending on the panel type.
  328. * vid mode -> vsync_irq
  329. * cmd mode -> pp_done
  330. * Returns: 0 on success, -EWOULDBLOCK if already signaled, error otherwise
  331. */
  332. int sde_encoder_wait_for_event(struct drm_encoder *drm_encoder,
  333. enum msm_event_wait event);
  334. /**
  335. * sde_encoder_idle_request - request for idle request to avoid 4 vsync cycle
  336. * to turn off the clocks.
  337. * @encoder: encoder pointer
  338. * Returns: 0 on success, errorcode otherwise
  339. */
  340. int sde_encoder_idle_request(struct drm_encoder *drm_enc);
  341. /*
  342. * sde_encoder_get_fps - get interface frame rate of the given encoder
  343. * @encoder: Pointer to drm encoder object
  344. */
  345. u32 sde_encoder_get_fps(struct drm_encoder *encoder);
  346. /*
  347. * sde_encoder_get_intf_mode - get interface mode of the given encoder
  348. * @encoder: Pointer to drm encoder object
  349. */
  350. enum sde_intf_mode sde_encoder_get_intf_mode(struct drm_encoder *encoder);
  351. /*
  352. * sde_encoder_get_frame_count - get hardware frame count of the given encoder
  353. * @encoder: Pointer to drm encoder object
  354. */
  355. u32 sde_encoder_get_frame_count(struct drm_encoder *encoder);
  356. /**
  357. * sde_encoder_get_avr_status - get combined avr_status from all intfs for given virt encoder
  358. * @drm_enc: Pointer to drm encoder structure
  359. */
  360. int sde_encoder_get_avr_status(struct drm_encoder *drm_enc);
  361. /*
  362. * sde_encoder_get_vblank_timestamp - get the last vsync timestamp
  363. * @encoder: Pointer to drm encoder object
  364. * @tvblank: vblank timestamp
  365. */
  366. bool sde_encoder_get_vblank_timestamp(struct drm_encoder *encoder,
  367. ktime_t *tvblank);
  368. /**
  369. * sde_encoder_idle_pc_enter - control enable/disable VSYNC_IN_EN & cache display status at ipc
  370. * @encoder: encoder pointer
  371. */
  372. void sde_encoder_idle_pc_enter(struct drm_encoder *encoder);
  373. /**
  374. * sde_encoder_virt_restore - restore the encoder configs
  375. * @encoder: encoder pointer
  376. */
  377. void sde_encoder_virt_restore(struct drm_encoder *encoder);
  378. /**
  379. * sde_encoder_is_dsc_merge - check if encoder is in DSC merge mode
  380. * @drm_enc: Pointer to drm encoder object
  381. * @Return: true if encoder is in DSC merge mode
  382. */
  383. bool sde_encoder_is_dsc_merge(struct drm_encoder *drm_enc);
  384. /**
  385. * sde_encoder_check_curr_mode - check if given mode is supported or not
  386. * @drm_enc: Pointer to drm encoder object
  387. * @mode: Mode to be checked
  388. * @Return: true if it is cmd mode
  389. */
  390. bool sde_encoder_check_curr_mode(struct drm_encoder *drm_enc, u32 mode);
  391. /**
  392. * sde_encoder_init - initialize virtual encoder object
  393. * @dev: Pointer to drm device structure
  394. * @disp_info: Pointer to display information structure
  395. * Returns: Pointer to newly created drm encoder
  396. */
  397. struct drm_encoder *sde_encoder_init(
  398. struct drm_device *dev,
  399. struct msm_display_info *disp_info);
  400. /**
  401. * sde_encoder_destroy - destroy previously initialized virtual encoder
  402. * @drm_enc: Pointer to previously created drm encoder structure
  403. */
  404. void sde_encoder_destroy(struct drm_encoder *drm_enc);
  405. /**
  406. * sde_encoder_prepare_commit - prepare encoder at the very beginning of an
  407. * atomic commit, before any registers are written
  408. * @drm_enc: Pointer to previously created drm encoder structure
  409. */
  410. int sde_encoder_prepare_commit(struct drm_encoder *drm_enc);
  411. /**
  412. * sde_encoder_update_caps_for_cont_splash - update encoder settings during
  413. * device bootup when cont_splash is enabled
  414. * @drm_enc: Pointer to drm encoder structure
  415. * @splash_display: Pointer to sde_splash_display corresponding to this encoder
  416. * @enable: boolean indicates enable or displae state of splash
  417. * @Return: true if successful in updating the encoder structure
  418. */
  419. int sde_encoder_update_caps_for_cont_splash(struct drm_encoder *encoder,
  420. struct sde_splash_display *splash_display, bool enable);
  421. /**
  422. * sde_encoder_display_failure_notification - update sde encoder state for
  423. * esd timeout or other display failure notification. This event flows from
  424. * dsi, sde_connector to sde_encoder.
  425. *
  426. * This api must not be called from crtc_commit (display) thread because it
  427. * requests the flush work on same thread. It is called from esd check thread
  428. * based on current design.
  429. *
  430. * TODO: manage the event at sde_kms level for forward processing.
  431. * @drm_enc: Pointer to drm encoder structure
  432. * @skip_pre_kickoff: Caller can avoid pre_kickoff if it is triggering this
  433. * event only to switch the panel TE to watchdog mode.
  434. * @Return: true if successful in updating the encoder structure
  435. */
  436. int sde_encoder_display_failure_notification(struct drm_encoder *enc,
  437. bool skip_pre_kickoff);
  438. /**
  439. * sde_encoder_recovery_events_enabled - checks if client has enabled
  440. * sw recovery mechanism for this connector
  441. * @drm_enc: Pointer to drm encoder structure
  442. * @Return: true if enabled
  443. */
  444. bool sde_encoder_recovery_events_enabled(struct drm_encoder *encoder);
  445. /**
  446. * sde_encoder_enable_recovery_event - handler to enable the sw recovery
  447. * for this connector
  448. * @drm_enc: Pointer to drm encoder structure
  449. */
  450. void sde_encoder_enable_recovery_event(struct drm_encoder *encoder);
  451. /**
  452. * sde_encoder_in_clone_mode - checks if underlying phys encoder is in clone
  453. * mode or independent display mode. ref@ WB in Concurrent writeback mode.
  454. * @drm_enc: Pointer to drm encoder structure
  455. * @Return: true if successful in updating the encoder structure
  456. */
  457. bool sde_encoder_in_clone_mode(struct drm_encoder *enc);
  458. /**
  459. * sde_encoder_set_clone_mode - cwb in wb phys enc is enabled.
  460. * drm_enc: Pointer to drm encoder structure
  461. * drm_crtc_state: Pointer to drm_crtc_state
  462. */
  463. void sde_encoder_set_clone_mode(struct drm_encoder *drm_enc,
  464. struct drm_crtc_state *crtc_state);
  465. /*
  466. * sde_encoder_is_cwb_disabling - check if cwb encoder disable is pending
  467. * @drm_enc: Pointer to drm encoder structure
  468. * @drm_crtc: Pointer to drm crtc structure
  469. * @Return: true if cwb encoder disable is pending
  470. */
  471. bool sde_encoder_is_cwb_disabling(struct drm_encoder *drm_enc,
  472. struct drm_crtc *drm_crtc);
  473. /**
  474. * sde_encoder_is_primary_display - checks if underlying display is primary
  475. * display or not.
  476. * @drm_enc: Pointer to drm encoder structure
  477. * @Return: true if it is primary display. false otherwise
  478. */
  479. bool sde_encoder_is_primary_display(struct drm_encoder *enc);
  480. /**
  481. * sde_encoder_is_built_in_display - checks if underlying display is built in
  482. * display or not.
  483. * @drm_enc: Pointer to drm encoder structure
  484. * @Return: true if it is a built in display. false otherwise
  485. */
  486. bool sde_encoder_is_built_in_display(struct drm_encoder *enc);
  487. /**
  488. * sde_encoder_check_ctl_done_support - checks if ctl_done irq is available
  489. * for the display
  490. * @drm_enc: Pointer to drm encoder structure
  491. * @Return: true if scheduler update is enabled
  492. */
  493. static inline bool sde_encoder_check_ctl_done_support(struct drm_encoder *drm_enc)
  494. {
  495. struct sde_encoder_virt *sde_enc = to_sde_encoder_virt(drm_enc);
  496. return sde_enc && sde_enc->ctl_done_supported;
  497. }
  498. /**
  499. * sde_encoder_is_dsi_display - checks if underlying display is DSI
  500. * display or not.
  501. * @drm_enc: Pointer to drm encoder structure
  502. * @Return: true if it is a dsi display. false otherwise
  503. */
  504. bool sde_encoder_is_dsi_display(struct drm_encoder *enc);
  505. /**
  506. * sde_encoder_control_idle_pc - control enable/disable of idle power collapse
  507. * @drm_enc: Pointer to drm encoder structure
  508. * @enable: enable/disable flag
  509. */
  510. void sde_encoder_control_idle_pc(struct drm_encoder *enc, bool enable);
  511. /**
  512. * sde_encoder_in_cont_splash - checks if display is in continuous splash
  513. * @drm_enc: Pointer to drm encoder structure
  514. * @Return: true if display in continuous splash
  515. */
  516. int sde_encoder_in_cont_splash(struct drm_encoder *enc);
  517. /**
  518. * sde_encoder_helper_hw_reset - hw reset helper function
  519. * @drm_enc: Pointer to drm encoder structure
  520. */
  521. void sde_encoder_needs_hw_reset(struct drm_encoder *enc);
  522. /**
  523. * sde_encoder_uidle_enable - control enable/disable of uidle
  524. * @drm_enc: Pointer to drm encoder structure
  525. * @enable: enable/disable flag
  526. */
  527. void sde_encoder_uidle_enable(struct drm_encoder *drm_enc, bool enable);
  528. /**
  529. * sde_encoder_irq_control - control enable/disable of IRQ's
  530. * @drm_enc: Pointer to drm encoder structure
  531. * @enable: enable/disable flag
  532. */
  533. void sde_encoder_irq_control(struct drm_encoder *drm_enc, bool enable);
  534. /**sde_encoder_get_connector - get connector corresponding to encoder
  535. * @dev: Pointer to drm device structure
  536. * @drm_enc: Pointer to drm encoder structure
  537. * Returns: drm connector if found, null if not found
  538. */
  539. struct drm_connector *sde_encoder_get_connector(struct drm_device *dev,
  540. struct drm_encoder *drm_enc);
  541. /**sde_encoder_needs_dsc_disable - indicates if dsc should be disabled
  542. * based on previous topology
  543. * @drm_enc: Pointer to drm encoder structure
  544. */
  545. bool sde_encoder_needs_dsc_disable(struct drm_encoder *drm_enc);
  546. /**
  547. * sde_encoder_get_transfer_time - get the mdp transfer time in usecs
  548. * @drm_enc: Pointer to drm encoder structure
  549. * @transfer_time_us: Pointer to store the output value
  550. */
  551. void sde_encoder_get_transfer_time(struct drm_encoder *drm_enc,
  552. u32 *transfer_time_us);
  553. /**
  554. * sde_encoder_helper_update_out_fence_txq - updates hw-fence tx queue
  555. * @sde_enc: Pointer to sde encoder structure
  556. * @is_vid: Boolean to indicate if is video-mode
  557. */
  558. void sde_encoder_helper_update_out_fence_txq(struct sde_encoder_virt *sde_enc, bool is_vid);
  559. /*
  560. * sde_encoder_get_dfps_maxfps - get dynamic FPS max frame rate of
  561. the given encoder
  562. * @encoder: Pointer to drm encoder object
  563. */
  564. static inline u32 sde_encoder_get_dfps_maxfps(struct drm_encoder *drm_enc)
  565. {
  566. struct sde_encoder_virt *sde_enc;
  567. if (!drm_enc) {
  568. SDE_ERROR("invalid encoder\n");
  569. return 0;
  570. }
  571. sde_enc = to_sde_encoder_virt(drm_enc);
  572. return sde_enc->mode_info.dfps_maxfps;
  573. }
  574. /**
  575. * sde_encoder_virt_reset - delay encoder virt reset
  576. * @drm_enc: Pointer to drm encoder structure
  577. */
  578. void sde_encoder_virt_reset(struct drm_encoder *drm_enc);
  579. /**
  580. * sde_encoder_calc_last_vsync_timestamp - read last HW vsync timestamp counter
  581. * and calculate the corresponding vsync ktime. Return ktime_get
  582. * when HW support is not available
  583. * @drm_enc: Pointer to drm encoder structure
  584. */
  585. ktime_t sde_encoder_calc_last_vsync_timestamp(struct drm_encoder *drm_enc);
  586. /**
  587. * sde_encoder_cancel_delayed_work - cancel delayed off work for encoder
  588. * @drm_enc: Pointer to drm encoder structure
  589. */
  590. void sde_encoder_cancel_delayed_work(struct drm_encoder *encoder);
  591. /**
  592. * sde_encoder_get_kms - retrieve the kms from encoder
  593. * @drm_enc: Pointer to drm encoder structure
  594. */
  595. static inline struct sde_kms *sde_encoder_get_kms(struct drm_encoder *drm_enc)
  596. {
  597. struct msm_drm_private *priv;
  598. if (!drm_enc || !drm_enc->dev) {
  599. SDE_ERROR("invalid encoder\n");
  600. return NULL;
  601. }
  602. priv = drm_enc->dev->dev_private;
  603. if (!priv || !priv->kms) {
  604. SDE_ERROR("invalid kms\n");
  605. return NULL;
  606. }
  607. return to_sde_kms(priv->kms);
  608. }
  609. /*
  610. * sde_encoder_is_widebus_enabled - check if widebus is enabled for current mode
  611. * @drm_enc: Pointer to drm encoder structure
  612. * @Return: true if widebus is enabled for current mode
  613. */
  614. static inline bool sde_encoder_is_widebus_enabled(struct drm_encoder *drm_enc)
  615. {
  616. struct sde_encoder_virt *sde_enc;
  617. if (!drm_enc)
  618. return false;
  619. sde_enc = to_sde_encoder_virt(drm_enc);
  620. return sde_enc->mode_info.wide_bus_en;
  621. }
  622. /*
  623. * sde_encoder_is_line_insertion_supported - get line insertion
  624. * feature bit value from panel
  625. * @drm_enc: Pointer to drm encoder structure
  626. * @Return: line insertion support status
  627. */
  628. bool sde_encoder_is_line_insertion_supported(struct drm_encoder *drm_enc);
  629. /**
  630. * sde_encoder_get_hw_ctl - gets hw ctl from the connector
  631. * @c_conn: sde connector
  632. * @Return: pointer to the hw ctl from the encoder upon success, otherwise null
  633. */
  634. struct sde_hw_ctl *sde_encoder_get_hw_ctl(struct sde_connector *c_conn);
  635. /*
  636. * sde_encoder_get_programmed_fetch_time - gets the programmable fetch time for video encoders
  637. * @drm_enc: Pointer to drm encoder structure
  638. * @Return: programmable fetch time in microseconds
  639. */
  640. u32 sde_encoder_get_programmed_fetch_time(struct drm_encoder *encoder);
  641. void sde_encoder_add_data_to_minidump_va(struct drm_encoder *drm_enc);
  642. /**
  643. * sde_encoder_misr_sign_event_notify - collect MISR, check with previous value
  644. * if change then notify to client with custom event
  645. * @drm_enc: pointer to drm encoder
  646. */
  647. void sde_encoder_misr_sign_event_notify(struct drm_encoder *drm_enc);
  648. /**
  649. * sde_encoder_register_misr_event - register or deregister MISR event
  650. * @drm_enc: pointer to drm encoder
  651. * @val: indicates register or deregister
  652. */
  653. static inline int sde_encoder_register_misr_event(struct drm_encoder *drm_enc, bool val)
  654. {
  655. struct sde_encoder_virt *sde_enc = NULL;
  656. if (!drm_enc)
  657. return -EINVAL;
  658. sde_enc = to_sde_encoder_virt(drm_enc);
  659. atomic_set(&sde_enc->misr_enable, val);
  660. /*
  661. * To setup MISR ctl reg, set misr_reconfigure as true.
  662. * MISR is calculated for the specific number of frames.
  663. */
  664. if (atomic_read(&sde_enc->misr_enable)) {
  665. sde_enc->misr_reconfigure = true;
  666. sde_enc->misr_frame_count = 1;
  667. }
  668. return 0;
  669. }
  670. #endif /* __SDE_ENCODER_H__ */