dsi_panel.c 124 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/slab.h>
  8. #include <linux/gpio.h>
  9. #include <linux/of_gpio.h>
  10. #include <linux/pwm.h>
  11. #include <video/mipi_display.h>
  12. #include "dsi_panel.h"
  13. #include "dsi_ctrl_hw.h"
  14. #include "dsi_parser.h"
  15. #include "sde_dbg.h"
  16. #include "sde_dsc_helper.h"
  17. #include "sde_vdc_helper.h"
  18. /**
  19. * topology is currently defined by a set of following 3 values:
  20. * 1. num of layer mixers
  21. * 2. num of compression encoders
  22. * 3. num of interfaces
  23. */
  24. #define TOPOLOGY_SET_LEN 3
  25. #define MAX_TOPOLOGY 5
  26. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  27. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  28. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  29. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  30. #define MAX_PANEL_JITTER 10
  31. #define DEFAULT_PANEL_PREFILL_LINES 25
  32. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  33. #define MIN_PREFILL_LINES 40
  34. #define RSCC_MODE_THRESHOLD_TIME_US 40
  35. #define DCS_COMMAND_THRESHOLD_TIME_US 40
  36. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  37. {
  38. char *bp;
  39. bp = buf;
  40. /* First 7 bytes are cmd header */
  41. *bp++ = 0x0A;
  42. *bp++ = 1;
  43. *bp++ = 0;
  44. *bp++ = 0;
  45. *bp++ = pps_delay_ms;
  46. *bp++ = 0;
  47. *bp++ = 128;
  48. }
  49. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  50. char *buf, int pps_id, u32 size)
  51. {
  52. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  53. buf += DSI_CMD_PPS_HDR_SIZE;
  54. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  55. size);
  56. }
  57. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  58. char *buf, int pps_id, u32 size)
  59. {
  60. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  61. buf += DSI_CMD_PPS_HDR_SIZE;
  62. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  63. size);
  64. }
  65. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  66. {
  67. int rc = 0;
  68. int i;
  69. struct regulator *vreg = NULL;
  70. for (i = 0; i < panel->power_info.count; i++) {
  71. vreg = devm_regulator_get(panel->parent,
  72. panel->power_info.vregs[i].vreg_name);
  73. rc = PTR_ERR_OR_ZERO(vreg);
  74. if (rc) {
  75. DSI_ERR("failed to get %s regulator\n",
  76. panel->power_info.vregs[i].vreg_name);
  77. goto error_put;
  78. }
  79. panel->power_info.vregs[i].vreg = vreg;
  80. }
  81. return rc;
  82. error_put:
  83. for (i = i - 1; i >= 0; i--) {
  84. devm_regulator_put(panel->power_info.vregs[i].vreg);
  85. panel->power_info.vregs[i].vreg = NULL;
  86. }
  87. return rc;
  88. }
  89. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  90. {
  91. int rc = 0;
  92. int i;
  93. for (i = panel->power_info.count - 1; i >= 0; i--)
  94. devm_regulator_put(panel->power_info.vregs[i].vreg);
  95. return rc;
  96. }
  97. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  98. {
  99. int rc = 0;
  100. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  101. if (gpio_is_valid(r_config->reset_gpio)) {
  102. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  103. if (rc) {
  104. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  105. goto error;
  106. }
  107. }
  108. if (gpio_is_valid(r_config->disp_en_gpio)) {
  109. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  110. if (rc) {
  111. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  112. goto error_release_reset;
  113. }
  114. }
  115. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  116. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  117. if (rc) {
  118. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  119. goto error_release_disp_en;
  120. }
  121. }
  122. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  123. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  124. if (rc) {
  125. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  126. goto error_release_mode_sel;
  127. }
  128. }
  129. if (gpio_is_valid(panel->panel_test_gpio)) {
  130. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  131. if (rc) {
  132. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  133. rc);
  134. panel->panel_test_gpio = -1;
  135. rc = 0;
  136. }
  137. }
  138. goto error;
  139. error_release_mode_sel:
  140. if (gpio_is_valid(panel->bl_config.en_gpio))
  141. gpio_free(panel->bl_config.en_gpio);
  142. error_release_disp_en:
  143. if (gpio_is_valid(r_config->disp_en_gpio))
  144. gpio_free(r_config->disp_en_gpio);
  145. error_release_reset:
  146. if (gpio_is_valid(r_config->reset_gpio))
  147. gpio_free(r_config->reset_gpio);
  148. error:
  149. return rc;
  150. }
  151. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  152. {
  153. int rc = 0;
  154. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  155. if (gpio_is_valid(r_config->reset_gpio))
  156. gpio_free(r_config->reset_gpio);
  157. if (gpio_is_valid(r_config->disp_en_gpio))
  158. gpio_free(r_config->disp_en_gpio);
  159. if (gpio_is_valid(panel->bl_config.en_gpio))
  160. gpio_free(panel->bl_config.en_gpio);
  161. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  162. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  163. if (gpio_is_valid(panel->panel_test_gpio))
  164. gpio_free(panel->panel_test_gpio);
  165. return rc;
  166. }
  167. static int dsi_panel_trigger_esd_attack_sub(int reset_gpio)
  168. {
  169. if (!gpio_is_valid(reset_gpio)) {
  170. DSI_INFO("failed to pull down the reset gpio\n");
  171. return -EINVAL;
  172. }
  173. gpio_set_value(reset_gpio, 0);
  174. SDE_EVT32(SDE_EVTLOG_FUNC_CASE1);
  175. DSI_INFO("GPIO pulled low to simulate ESD\n");
  176. return 0;
  177. }
  178. static int dsi_panel_vm_trigger_esd_attack(struct dsi_panel *panel)
  179. {
  180. struct dsi_parser_utils *utils = &panel->utils;
  181. int reset_gpio;
  182. int rc = 0;
  183. reset_gpio = utils->get_named_gpio(utils->data,
  184. "qcom,platform-reset-gpio", 0);
  185. if (!gpio_is_valid(reset_gpio)) {
  186. DSI_ERR("[%s] reset gpio not provided\n", panel->name);
  187. return -EINVAL;
  188. }
  189. rc = gpio_request(reset_gpio, "reset_gpio");
  190. if (rc) {
  191. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  192. return rc;
  193. }
  194. rc = dsi_panel_trigger_esd_attack_sub(reset_gpio);
  195. gpio_free(reset_gpio);
  196. return rc;
  197. }
  198. static int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  199. {
  200. struct dsi_panel_reset_config *r_config;
  201. if (!panel) {
  202. DSI_ERR("Invalid panel param\n");
  203. return -EINVAL;
  204. }
  205. r_config = &panel->reset_config;
  206. if (!r_config) {
  207. DSI_ERR("Invalid panel reset configuration\n");
  208. return -EINVAL;
  209. }
  210. return dsi_panel_trigger_esd_attack_sub(r_config->reset_gpio);
  211. }
  212. static int dsi_panel_reset(struct dsi_panel *panel)
  213. {
  214. int rc = 0;
  215. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  216. int i;
  217. if (!gpio_is_valid(r_config->reset_gpio))
  218. goto skip_reset_gpio;
  219. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  220. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  221. if (rc) {
  222. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  223. goto exit;
  224. }
  225. }
  226. if (r_config->count) {
  227. rc = gpio_direction_output(r_config->reset_gpio,
  228. r_config->sequence[0].level);
  229. if (rc) {
  230. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  231. goto exit;
  232. }
  233. }
  234. for (i = 0; i < r_config->count; i++) {
  235. gpio_set_value(r_config->reset_gpio,
  236. r_config->sequence[i].level);
  237. if (r_config->sequence[i].sleep_ms)
  238. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  239. (r_config->sequence[i].sleep_ms * 1000) + 100);
  240. }
  241. skip_reset_gpio:
  242. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  243. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  244. if (rc)
  245. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  246. }
  247. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  248. bool out = true;
  249. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  250. || (panel->reset_config.mode_sel_state
  251. == MODE_GPIO_LOW))
  252. out = false;
  253. else if ((panel->reset_config.mode_sel_state
  254. == MODE_SEL_SINGLE_PORT) ||
  255. (panel->reset_config.mode_sel_state
  256. == MODE_GPIO_HIGH))
  257. out = true;
  258. rc = gpio_direction_output(
  259. panel->reset_config.lcd_mode_sel_gpio, out);
  260. if (rc)
  261. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  262. }
  263. if (gpio_is_valid(panel->panel_test_gpio)) {
  264. rc = gpio_direction_input(panel->panel_test_gpio);
  265. if (rc)
  266. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  267. rc);
  268. }
  269. exit:
  270. return rc;
  271. }
  272. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  273. {
  274. int rc = 0;
  275. struct pinctrl_state *state;
  276. if (panel->host_config.ext_bridge_mode)
  277. return 0;
  278. if (!panel->pinctrl.pinctrl)
  279. return 0;
  280. if (enable)
  281. state = panel->pinctrl.active;
  282. else
  283. state = panel->pinctrl.suspend;
  284. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  285. if (rc)
  286. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  287. panel->name, rc);
  288. return rc;
  289. }
  290. static int dsi_panel_power_on(struct dsi_panel *panel)
  291. {
  292. int rc = 0;
  293. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  294. if (rc) {
  295. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  296. panel->name, rc);
  297. goto exit;
  298. }
  299. rc = dsi_panel_set_pinctrl_state(panel, true);
  300. if (rc) {
  301. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  302. goto error_disable_vregs;
  303. }
  304. rc = dsi_panel_reset(panel);
  305. if (rc) {
  306. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  307. goto error_disable_gpio;
  308. }
  309. goto exit;
  310. error_disable_gpio:
  311. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  312. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  313. if (gpio_is_valid(panel->bl_config.en_gpio))
  314. gpio_set_value(panel->bl_config.en_gpio, 0);
  315. (void)dsi_panel_set_pinctrl_state(panel, false);
  316. error_disable_vregs:
  317. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  318. exit:
  319. return rc;
  320. }
  321. static int dsi_panel_power_off(struct dsi_panel *panel)
  322. {
  323. int rc = 0;
  324. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  325. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  326. if (gpio_is_valid(panel->reset_config.reset_gpio) &&
  327. !panel->reset_gpio_always_on)
  328. gpio_set_value(panel->reset_config.reset_gpio, 0);
  329. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  330. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  331. if (gpio_is_valid(panel->panel_test_gpio)) {
  332. rc = gpio_direction_input(panel->panel_test_gpio);
  333. if (rc)
  334. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  335. rc);
  336. }
  337. rc = dsi_panel_set_pinctrl_state(panel, false);
  338. if (rc) {
  339. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  340. rc);
  341. }
  342. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  343. if (rc)
  344. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  345. panel->name, rc);
  346. return rc;
  347. }
  348. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  349. enum dsi_cmd_set_type type)
  350. {
  351. int rc = 0, i = 0;
  352. ssize_t len;
  353. struct dsi_cmd_desc *cmds;
  354. u32 count;
  355. enum dsi_cmd_set_state state;
  356. struct dsi_display_mode *mode;
  357. if (!panel || !panel->cur_mode)
  358. return -EINVAL;
  359. mode = panel->cur_mode;
  360. cmds = mode->priv_info->cmd_sets[type].cmds;
  361. count = mode->priv_info->cmd_sets[type].count;
  362. state = mode->priv_info->cmd_sets[type].state;
  363. SDE_EVT32(type, state, count);
  364. if (count == 0) {
  365. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  366. panel->name, type);
  367. goto error;
  368. }
  369. for (i = 0; i < count; i++) {
  370. cmds->ctrl_flags = 0;
  371. if (state == DSI_CMD_SET_STATE_LP)
  372. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  373. if (type == DSI_CMD_SET_VID_SWITCH_OUT)
  374. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  375. len = dsi_host_transfer_sub(panel->host, cmds);
  376. if (len < 0) {
  377. rc = len;
  378. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  379. goto error;
  380. }
  381. if (cmds->post_wait_ms)
  382. usleep_range(cmds->post_wait_ms*1000,
  383. ((cmds->post_wait_ms*1000)+10));
  384. cmds++;
  385. }
  386. error:
  387. return rc;
  388. }
  389. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  390. {
  391. int rc = 0;
  392. if (panel->host_config.ext_bridge_mode)
  393. return 0;
  394. devm_pinctrl_put(panel->pinctrl.pinctrl);
  395. return rc;
  396. }
  397. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  398. {
  399. int rc = 0;
  400. if (panel->host_config.ext_bridge_mode)
  401. return 0;
  402. /* TODO: pinctrl is defined in dsi dt node */
  403. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  404. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  405. rc = PTR_ERR(panel->pinctrl.pinctrl);
  406. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  407. goto error;
  408. }
  409. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  410. "panel_active");
  411. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  412. rc = PTR_ERR(panel->pinctrl.active);
  413. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  414. goto error;
  415. }
  416. panel->pinctrl.suspend =
  417. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  418. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  419. rc = PTR_ERR(panel->pinctrl.suspend);
  420. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  421. goto error;
  422. }
  423. panel->pinctrl.pwm_pin =
  424. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  425. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  426. panel->pinctrl.pwm_pin = NULL;
  427. DSI_DEBUG("failed to get pinctrl pwm_pin");
  428. }
  429. error:
  430. return rc;
  431. }
  432. static int dsi_panel_wled_register(struct dsi_panel *panel,
  433. struct dsi_backlight_config *bl)
  434. {
  435. struct backlight_device *bd;
  436. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  437. if (!bd) {
  438. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  439. panel->name, -EPROBE_DEFER);
  440. return -EPROBE_DEFER;
  441. }
  442. bl->raw_bd = bd;
  443. return 0;
  444. }
  445. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  446. u32 bl_lvl)
  447. {
  448. int rc = 0;
  449. unsigned long mode_flags = 0;
  450. struct mipi_dsi_device *dsi = NULL;
  451. if (!panel || (bl_lvl > 0xffff)) {
  452. DSI_ERR("invalid params\n");
  453. return -EINVAL;
  454. }
  455. dsi = &panel->mipi_device;
  456. if (unlikely(panel->bl_config.lp_mode)) {
  457. mode_flags = dsi->mode_flags;
  458. dsi->mode_flags |= MIPI_DSI_MODE_LPM;
  459. }
  460. if (panel->bl_config.bl_inverted_dbv)
  461. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  462. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  463. if (rc < 0)
  464. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  465. if (unlikely(panel->bl_config.lp_mode))
  466. dsi->mode_flags = mode_flags;
  467. return rc;
  468. }
  469. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  470. u32 bl_lvl)
  471. {
  472. int rc = 0;
  473. u32 duty = 0;
  474. u32 period_ns = 0;
  475. struct dsi_backlight_config *bl;
  476. if (!panel) {
  477. DSI_ERR("Invalid Params\n");
  478. return -EINVAL;
  479. }
  480. bl = &panel->bl_config;
  481. if (!bl->pwm_bl) {
  482. DSI_ERR("pwm device not found\n");
  483. return -EINVAL;
  484. }
  485. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  486. duty = bl_lvl * period_ns;
  487. duty /= bl->bl_max_level;
  488. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  489. if (rc) {
  490. DSI_ERR("[%s] failed to change pwm config, rc=%d\n", panel->name,
  491. rc);
  492. goto error;
  493. }
  494. if (bl_lvl == 0 && bl->pwm_enabled) {
  495. pwm_disable(bl->pwm_bl);
  496. bl->pwm_enabled = false;
  497. return 0;
  498. }
  499. if (bl_lvl != 0 && !bl->pwm_enabled) {
  500. rc = pwm_enable(bl->pwm_bl);
  501. if (rc) {
  502. DSI_ERR("[%s] failed to enable pwm, rc=%d\n", panel->name,
  503. rc);
  504. goto error;
  505. }
  506. bl->pwm_enabled = true;
  507. }
  508. error:
  509. return rc;
  510. }
  511. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  512. {
  513. int rc = 0;
  514. struct dsi_backlight_config *bl = &panel->bl_config;
  515. if (panel->host_config.ext_bridge_mode)
  516. return 0;
  517. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  518. switch (bl->type) {
  519. case DSI_BACKLIGHT_WLED:
  520. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  521. break;
  522. case DSI_BACKLIGHT_DCS:
  523. rc = dsi_panel_update_backlight(panel, bl_lvl);
  524. break;
  525. case DSI_BACKLIGHT_EXTERNAL:
  526. break;
  527. case DSI_BACKLIGHT_PWM:
  528. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  529. break;
  530. default:
  531. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  532. rc = -ENOTSUPP;
  533. }
  534. return rc;
  535. }
  536. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  537. {
  538. u32 cur_bl_level;
  539. struct backlight_device *bd = bl->raw_bd;
  540. /* default the brightness level to 50% */
  541. cur_bl_level = bl->bl_max_level >> 1;
  542. switch (bl->type) {
  543. case DSI_BACKLIGHT_WLED:
  544. /* Try to query the backlight level from the backlight device */
  545. if (bd->ops && bd->ops->get_brightness)
  546. cur_bl_level = bd->ops->get_brightness(bd);
  547. break;
  548. case DSI_BACKLIGHT_DCS:
  549. case DSI_BACKLIGHT_EXTERNAL:
  550. case DSI_BACKLIGHT_PWM:
  551. default:
  552. /*
  553. * Ideally, we should read the backlight level from the
  554. * panel. For now, just set it default value.
  555. */
  556. break;
  557. }
  558. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  559. return cur_bl_level;
  560. }
  561. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  562. {
  563. struct dsi_backlight_config *bl = &panel->bl_config;
  564. bl->bl_level = dsi_panel_get_brightness(bl);
  565. }
  566. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  567. {
  568. int rc = 0;
  569. struct dsi_backlight_config *bl = &panel->bl_config;
  570. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0))
  571. bl->pwm_bl = devm_pwm_get(panel->parent, NULL);
  572. #else
  573. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  574. #endif
  575. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  576. rc = PTR_ERR(bl->pwm_bl);
  577. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  578. rc);
  579. return rc;
  580. }
  581. if (panel->pinctrl.pwm_pin) {
  582. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  583. panel->pinctrl.pwm_pin);
  584. if (rc)
  585. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  586. panel->name, rc);
  587. }
  588. return 0;
  589. }
  590. static int dsi_panel_bl_register(struct dsi_panel *panel)
  591. {
  592. int rc = 0;
  593. struct dsi_backlight_config *bl = &panel->bl_config;
  594. if (panel->host_config.ext_bridge_mode)
  595. return 0;
  596. switch (bl->type) {
  597. case DSI_BACKLIGHT_WLED:
  598. rc = dsi_panel_wled_register(panel, bl);
  599. break;
  600. case DSI_BACKLIGHT_DCS:
  601. break;
  602. case DSI_BACKLIGHT_EXTERNAL:
  603. break;
  604. case DSI_BACKLIGHT_PWM:
  605. rc = dsi_panel_pwm_register(panel);
  606. break;
  607. default:
  608. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  609. rc = -ENOTSUPP;
  610. goto error;
  611. }
  612. error:
  613. return rc;
  614. }
  615. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  616. {
  617. int rc = 0;
  618. struct dsi_backlight_config *bl = &panel->bl_config;
  619. if (panel->host_config.ext_bridge_mode)
  620. return 0;
  621. switch (bl->type) {
  622. case DSI_BACKLIGHT_WLED:
  623. break;
  624. case DSI_BACKLIGHT_DCS:
  625. break;
  626. case DSI_BACKLIGHT_EXTERNAL:
  627. break;
  628. case DSI_BACKLIGHT_PWM:
  629. break;
  630. default:
  631. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  632. rc = -ENOTSUPP;
  633. goto error;
  634. }
  635. error:
  636. return rc;
  637. }
  638. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  639. struct dsi_parser_utils *utils)
  640. {
  641. int rc = 0;
  642. u64 tmp64 = 0;
  643. struct dsi_display_mode *display_mode;
  644. struct dsi_display_mode_priv_info *priv_info;
  645. u32 usecs_fps = 0;
  646. display_mode = container_of(mode, struct dsi_display_mode, timing);
  647. priv_info = display_mode->priv_info;
  648. rc = utils->read_u64(utils->data,
  649. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  650. if (rc == -EOVERFLOW) {
  651. tmp64 = 0;
  652. rc = utils->read_u32(utils->data,
  653. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  654. }
  655. mode->clk_rate_hz = !rc ? tmp64 : 0;
  656. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  657. mode->pclk_scale.numer = 1;
  658. mode->pclk_scale.denom = 1;
  659. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  660. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  661. &mode->mdp_transfer_time_us);
  662. if (rc)
  663. mode->mdp_transfer_time_us = 0;
  664. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us-min",
  665. &priv_info->mdp_transfer_time_us_min);
  666. if (rc)
  667. priv_info->mdp_transfer_time_us_min = 0;
  668. else if (!rc && mode->mdp_transfer_time_us < priv_info->mdp_transfer_time_us_min)
  669. mode->mdp_transfer_time_us = priv_info->mdp_transfer_time_us_min;
  670. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us-max",
  671. &priv_info->mdp_transfer_time_us_max);
  672. if (rc)
  673. priv_info->mdp_transfer_time_us_max = 0;
  674. else if (!rc && mode->mdp_transfer_time_us > priv_info->mdp_transfer_time_us_max)
  675. mode->mdp_transfer_time_us = priv_info->mdp_transfer_time_us_max;
  676. priv_info->disable_rsc_solver = utils->read_bool(utils->data, "qcom,disable-rsc-solver");
  677. rc = utils->read_u32(utils->data,
  678. "qcom,mdss-dsi-panel-framerate",
  679. &mode->refresh_rate);
  680. if (rc) {
  681. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  682. rc);
  683. goto error;
  684. }
  685. usecs_fps = DIV_ROUND_UP((1 * 1000 * 1000), mode->refresh_rate);
  686. if (mode->mdp_transfer_time_us > usecs_fps)
  687. mode->mdp_transfer_time_us = 0;
  688. priv_info->mdp_transfer_time_us = mode->mdp_transfer_time_us;
  689. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  690. &mode->h_active);
  691. if (rc) {
  692. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  693. rc);
  694. goto error;
  695. }
  696. rc = utils->read_u32(utils->data,
  697. "qcom,mdss-dsi-h-front-porch",
  698. &mode->h_front_porch);
  699. if (rc) {
  700. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  701. rc);
  702. goto error;
  703. }
  704. rc = utils->read_u32(utils->data,
  705. "qcom,mdss-dsi-h-back-porch",
  706. &mode->h_back_porch);
  707. if (rc) {
  708. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  709. rc);
  710. goto error;
  711. }
  712. rc = utils->read_u32(utils->data,
  713. "qcom,mdss-dsi-h-pulse-width",
  714. &mode->h_sync_width);
  715. if (rc) {
  716. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  717. rc);
  718. goto error;
  719. }
  720. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  721. &mode->h_skew);
  722. if (rc)
  723. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  724. rc);
  725. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  726. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  727. mode->h_sync_width);
  728. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  729. &mode->v_active);
  730. if (rc) {
  731. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  732. rc);
  733. goto error;
  734. }
  735. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  736. &mode->v_back_porch);
  737. if (rc) {
  738. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  739. rc);
  740. goto error;
  741. }
  742. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  743. &mode->v_front_porch);
  744. if (rc) {
  745. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  746. rc);
  747. goto error;
  748. }
  749. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  750. &mode->v_sync_width);
  751. if (rc) {
  752. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  753. rc);
  754. goto error;
  755. }
  756. rc = utils->read_u32(utils->data, "qcom,qsync-mode-min-refresh-rate", &mode->qsync_min_fps);
  757. if (rc) {
  758. DSI_DEBUG("qsync min fps not defined in timing node\n");
  759. rc = 0;
  760. }
  761. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  762. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  763. mode->v_sync_width);
  764. error:
  765. return rc;
  766. }
  767. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  768. struct dsi_parser_utils *utils,
  769. const char *name)
  770. {
  771. int rc = 0;
  772. u32 bpp = 0;
  773. enum dsi_pixel_format fmt;
  774. const char *packing;
  775. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  776. if (rc) {
  777. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  778. name, rc);
  779. return rc;
  780. }
  781. host->bpp = bpp;
  782. switch (bpp) {
  783. case 3:
  784. fmt = DSI_PIXEL_FORMAT_RGB111;
  785. break;
  786. case 8:
  787. fmt = DSI_PIXEL_FORMAT_RGB332;
  788. break;
  789. case 12:
  790. fmt = DSI_PIXEL_FORMAT_RGB444;
  791. break;
  792. case 16:
  793. fmt = DSI_PIXEL_FORMAT_RGB565;
  794. break;
  795. case 18:
  796. fmt = DSI_PIXEL_FORMAT_RGB666;
  797. break;
  798. case 30:
  799. fmt = DSI_PIXEL_FORMAT_RGB101010;
  800. break;
  801. case 24:
  802. default:
  803. fmt = DSI_PIXEL_FORMAT_RGB888;
  804. break;
  805. }
  806. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  807. packing = utils->get_property(utils->data,
  808. "qcom,mdss-dsi-pixel-packing",
  809. NULL);
  810. if (packing && !strcmp(packing, "loose"))
  811. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  812. }
  813. host->dst_format = fmt;
  814. return rc;
  815. }
  816. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  817. struct dsi_parser_utils *utils,
  818. const char *name)
  819. {
  820. int rc = 0;
  821. bool lane_enabled;
  822. u32 num_of_lanes = 0;
  823. lane_enabled = utils->read_bool(utils->data,
  824. "qcom,mdss-dsi-lane-0-state");
  825. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  826. lane_enabled = utils->read_bool(utils->data,
  827. "qcom,mdss-dsi-lane-1-state");
  828. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  829. lane_enabled = utils->read_bool(utils->data,
  830. "qcom,mdss-dsi-lane-2-state");
  831. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  832. lane_enabled = utils->read_bool(utils->data,
  833. "qcom,mdss-dsi-lane-3-state");
  834. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  835. if (host->data_lanes & DSI_DATA_LANE_0)
  836. num_of_lanes++;
  837. if (host->data_lanes & DSI_DATA_LANE_1)
  838. num_of_lanes++;
  839. if (host->data_lanes & DSI_DATA_LANE_2)
  840. num_of_lanes++;
  841. if (host->data_lanes & DSI_DATA_LANE_3)
  842. num_of_lanes++;
  843. host->num_data_lanes = num_of_lanes;
  844. if (host->data_lanes == 0) {
  845. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  846. rc = -EINVAL;
  847. }
  848. return rc;
  849. }
  850. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  851. struct dsi_parser_utils *utils,
  852. const char *name)
  853. {
  854. int rc = 0;
  855. const char *swap_mode;
  856. swap_mode = utils->get_property(utils->data,
  857. "qcom,mdss-dsi-color-order", NULL);
  858. if (swap_mode) {
  859. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  860. host->swap_mode = DSI_COLOR_SWAP_RGB;
  861. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  862. host->swap_mode = DSI_COLOR_SWAP_RBG;
  863. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  864. host->swap_mode = DSI_COLOR_SWAP_BRG;
  865. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  866. host->swap_mode = DSI_COLOR_SWAP_GRB;
  867. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  868. host->swap_mode = DSI_COLOR_SWAP_GBR;
  869. } else {
  870. DSI_ERR("[%s] Unrecognized color order-%s\n",
  871. name, swap_mode);
  872. rc = -EINVAL;
  873. }
  874. } else {
  875. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  876. host->swap_mode = DSI_COLOR_SWAP_RGB;
  877. }
  878. /* bit swap on color channel is not defined in dt */
  879. host->bit_swap_red = false;
  880. host->bit_swap_green = false;
  881. host->bit_swap_blue = false;
  882. return rc;
  883. }
  884. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  885. struct dsi_parser_utils *utils,
  886. const char *name)
  887. {
  888. const char *trig;
  889. int rc = 0;
  890. trig = utils->get_property(utils->data,
  891. "qcom,mdss-dsi-mdp-trigger", NULL);
  892. if (trig) {
  893. if (!strcmp(trig, "none")) {
  894. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  895. } else if (!strcmp(trig, "trigger_te")) {
  896. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  897. } else if (!strcmp(trig, "trigger_sw")) {
  898. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  899. } else if (!strcmp(trig, "trigger_sw_te")) {
  900. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  901. } else {
  902. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  903. name, trig);
  904. rc = -EINVAL;
  905. }
  906. } else {
  907. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  908. name);
  909. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  910. }
  911. trig = utils->get_property(utils->data,
  912. "qcom,mdss-dsi-dma-trigger", NULL);
  913. if (trig) {
  914. if (!strcmp(trig, "none")) {
  915. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  916. } else if (!strcmp(trig, "trigger_te")) {
  917. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  918. } else if (!strcmp(trig, "trigger_sw")) {
  919. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  920. } else if (!strcmp(trig, "trigger_sw_seof")) {
  921. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  922. } else if (!strcmp(trig, "trigger_sw_te")) {
  923. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  924. } else {
  925. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  926. name, trig);
  927. rc = -EINVAL;
  928. }
  929. } else {
  930. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  931. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  932. }
  933. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  934. &host->te_mode);
  935. if (rc) {
  936. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  937. host->te_mode = 1;
  938. rc = 0;
  939. }
  940. return rc;
  941. }
  942. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  943. struct dsi_parser_utils *utils,
  944. const char *name)
  945. {
  946. u32 val = 0, line_no = 0, window = 0;
  947. int rc = 0;
  948. bool panel_cphy_mode = false;
  949. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  950. if (!rc) {
  951. host->t_clk_post = val;
  952. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  953. }
  954. val = 0;
  955. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  956. if (!rc) {
  957. host->t_clk_pre = val;
  958. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  959. }
  960. host->ignore_rx_eot = utils->read_bool(utils->data,
  961. "qcom,mdss-dsi-rx-eot-ignore");
  962. host->append_tx_eot = utils->read_bool(utils->data,
  963. "qcom,mdss-dsi-tx-eot-append");
  964. host->ext_bridge_mode = utils->read_bool(utils->data,
  965. "qcom,mdss-dsi-ext-bridge-mode");
  966. host->force_hs_clk_lane = utils->read_bool(utils->data,
  967. "qcom,mdss-dsi-force-clock-lane-hs");
  968. panel_cphy_mode = utils->read_bool(utils->data,
  969. "qcom,panel-cphy-mode");
  970. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  971. : DSI_PHY_TYPE_DPHY;
  972. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  973. &line_no);
  974. if (rc)
  975. host->dma_sched_line = 0;
  976. else
  977. host->dma_sched_line = line_no;
  978. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-window",
  979. &window);
  980. if (rc)
  981. host->dma_sched_window = 0;
  982. else
  983. host->dma_sched_window = window;
  984. rc = utils->read_u32(utils->data, "qcom,vert-padding-value", &host->vpadding);
  985. host->line_insertion_enable = (rc || host->vpadding <= 0) ? false : true;
  986. DSI_DEBUG("[%s] DMA scheduling parameters Line: %d Window: %d\n", name,
  987. host->dma_sched_line, host->dma_sched_window);
  988. return 0;
  989. }
  990. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  991. struct dsi_parser_utils *utils,
  992. const char *name)
  993. {
  994. int rc = 0;
  995. u32 val = 0;
  996. bool supported = false;
  997. struct dsi_split_link_config *split_link = &host->split_link;
  998. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  999. if (!supported) {
  1000. DSI_DEBUG("[%s] Split link is not supported\n", name);
  1001. split_link->enabled = false;
  1002. return;
  1003. }
  1004. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  1005. if (rc || val < 1) {
  1006. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  1007. split_link->num_sublinks = 2;
  1008. } else {
  1009. split_link->num_sublinks = val;
  1010. }
  1011. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  1012. if (rc || val < 1) {
  1013. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  1014. split_link->lanes_per_sublink = 2;
  1015. } else {
  1016. split_link->lanes_per_sublink = val;
  1017. }
  1018. supported = utils->read_bool(utils->data, "qcom,split-link-sublink-swap");
  1019. if (!supported)
  1020. split_link->sublink_swap = false;
  1021. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  1022. split_link->num_sublinks, split_link->lanes_per_sublink);
  1023. split_link->enabled = true;
  1024. }
  1025. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  1026. {
  1027. int rc = 0;
  1028. struct dsi_parser_utils *utils = &panel->utils;
  1029. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  1030. panel->name);
  1031. if (rc) {
  1032. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  1033. panel->name, rc);
  1034. goto error;
  1035. }
  1036. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  1037. panel->name);
  1038. if (rc) {
  1039. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  1040. panel->name, rc);
  1041. goto error;
  1042. }
  1043. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1044. panel->name);
  1045. if (rc) {
  1046. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  1047. panel->name, rc);
  1048. goto error;
  1049. }
  1050. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1051. panel->name);
  1052. if (rc) {
  1053. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1054. panel->name, rc);
  1055. goto error;
  1056. }
  1057. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1058. panel->name);
  1059. if (rc) {
  1060. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1061. panel->name, rc);
  1062. goto error;
  1063. }
  1064. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1065. panel->name);
  1066. error:
  1067. return rc;
  1068. }
  1069. static int dsi_panel_parse_avr_caps(struct dsi_panel *panel,
  1070. struct device_node *of_node)
  1071. {
  1072. struct dsi_avr_capabilities *avr_caps = &panel->avr_caps;
  1073. struct dsi_parser_utils *utils = &panel->utils;
  1074. int val, rc = 0;
  1075. val = utils->count_u32_elems(utils->data, "qcom,dsi-qsync-avr-step-list");
  1076. if (val <= 0) {
  1077. DSI_DEBUG("[%s] optional avr step list not defined, val:%d\n", panel->name, val);
  1078. return rc;
  1079. } else if (val > 1 && val != panel->dfps_caps.dfps_list_len) {
  1080. DSI_ERR("[%s] avr step list size %d not same as dfps list %d\n",
  1081. panel->name, val, panel->dfps_caps.dfps_list_len);
  1082. return -EINVAL;
  1083. }
  1084. avr_caps->avr_step_fps_list = kcalloc(val, sizeof(u32), GFP_KERNEL);
  1085. if (!avr_caps->avr_step_fps_list)
  1086. return -ENOMEM;
  1087. rc = utils->read_u32_array(utils->data, "qcom,dsi-qsync-avr-step-list",
  1088. avr_caps->avr_step_fps_list, val);
  1089. if (rc) {
  1090. kfree(avr_caps->avr_step_fps_list);
  1091. return rc;
  1092. }
  1093. avr_caps->avr_step_fps_list_len = val;
  1094. return rc;
  1095. }
  1096. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1097. struct device_node *of_node)
  1098. {
  1099. int rc = 0;
  1100. u32 val = 0, i;
  1101. struct dsi_qsync_capabilities *qsync_caps = &panel->qsync_caps;
  1102. struct dsi_parser_utils *utils = &panel->utils;
  1103. const char *name = panel->name;
  1104. qsync_caps->qsync_support = utils->read_bool(utils->data, "qcom,qsync-enable");
  1105. if (!qsync_caps->qsync_support) {
  1106. DSI_DEBUG("qsync feature not enabled\n");
  1107. goto error;
  1108. }
  1109. /**
  1110. * "mdss-dsi-qsync-min-refresh-rate" is defined in cmd mode and
  1111. * video mode when there is only one qsync min fps present.
  1112. */
  1113. rc = of_property_read_u32(of_node,
  1114. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1115. &val);
  1116. if (rc)
  1117. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1118. panel->name, rc);
  1119. qsync_caps->qsync_min_fps = val;
  1120. /**
  1121. * "dsi-supported-qsync-min-fps-list" may be defined in video
  1122. * mode, only in dfps case when "qcom,dsi-supported-dfps-list"
  1123. * is defined.
  1124. */
  1125. qsync_caps->qsync_min_fps_list_len = utils->count_u32_elems(utils->data,
  1126. "qcom,dsi-supported-qsync-min-fps-list");
  1127. if (qsync_caps->qsync_min_fps_list_len < 1) {
  1128. qsync_caps->qsync_min_fps_list_len = 0;
  1129. goto qsync_support;
  1130. }
  1131. /**
  1132. * qcom,dsi-supported-qsync-min-fps-list cannot be defined
  1133. * along with qcom,mdss-dsi-qsync-min-refresh-rate.
  1134. */
  1135. if (qsync_caps->qsync_min_fps_list_len >= 1 &&
  1136. qsync_caps->qsync_min_fps) {
  1137. DSI_ERR("[%s] Both qsync nodes are defined\n",
  1138. name);
  1139. rc = -EINVAL;
  1140. goto error;
  1141. }
  1142. if (panel->dfps_caps.dfps_list_len !=
  1143. qsync_caps->qsync_min_fps_list_len) {
  1144. DSI_ERR("[%s] Qsync min fps list mismatch with dfps\n", name);
  1145. rc = -EINVAL;
  1146. goto error;
  1147. }
  1148. qsync_caps->qsync_min_fps_list =
  1149. kcalloc(qsync_caps->qsync_min_fps_list_len, sizeof(u32),
  1150. GFP_KERNEL);
  1151. if (!qsync_caps->qsync_min_fps_list) {
  1152. rc = -ENOMEM;
  1153. goto error;
  1154. }
  1155. rc = utils->read_u32_array(utils->data,
  1156. "qcom,dsi-supported-qsync-min-fps-list",
  1157. qsync_caps->qsync_min_fps_list,
  1158. qsync_caps->qsync_min_fps_list_len);
  1159. if (rc) {
  1160. DSI_ERR("[%s] Qsync min fps list parse failed\n", name);
  1161. rc = -EINVAL;
  1162. goto error;
  1163. }
  1164. qsync_caps->qsync_min_fps = qsync_caps->qsync_min_fps_list[0];
  1165. for (i = 1; i < qsync_caps->qsync_min_fps_list_len; i++) {
  1166. if (qsync_caps->qsync_min_fps_list[i] <
  1167. qsync_caps->qsync_min_fps)
  1168. qsync_caps->qsync_min_fps =
  1169. qsync_caps->qsync_min_fps_list[i];
  1170. }
  1171. qsync_support:
  1172. /* allow qsync support only if DFPS is with VFP approach */
  1173. if ((panel->dfps_caps.dfps_support) &&
  1174. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP)) {
  1175. qsync_caps->qsync_support = false;
  1176. qsync_caps->qsync_min_fps = 0;
  1177. }
  1178. error:
  1179. if (rc < 0) {
  1180. qsync_caps->qsync_min_fps = 0;
  1181. qsync_caps->qsync_min_fps_list_len = 0;
  1182. }
  1183. return rc;
  1184. }
  1185. static int dsi_panel_parse_dyn_clk_list(struct dsi_display_mode *mode,
  1186. struct dsi_parser_utils *utils)
  1187. {
  1188. int i, rc = 0;
  1189. struct msm_dyn_clk_list *bit_clk_list;
  1190. if (!mode || !mode->priv_info) {
  1191. DSI_ERR("invalid arguments\n");
  1192. return -EINVAL;
  1193. }
  1194. bit_clk_list = &mode->priv_info->bit_clk_list;
  1195. bit_clk_list->count = utils->count_u32_elems(utils->data, "qcom,dsi-dyn-clk-list");
  1196. if (bit_clk_list->count < 1 || bit_clk_list->count > 100) {
  1197. DSI_ERR("invalid number of bit clock values, must be between 1 and 100\n");
  1198. return -EINVAL;
  1199. }
  1200. bit_clk_list->rates = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1201. if (!bit_clk_list->rates) {
  1202. DSI_ERR("failed to allocate space for bit clock list\n");
  1203. rc = -ENOMEM;
  1204. goto error;
  1205. }
  1206. bit_clk_list->front_porches = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1207. if (!bit_clk_list->front_porches) {
  1208. DSI_ERR("failed to allocate space for front porch list\n");
  1209. rc = -ENOMEM;
  1210. goto error;
  1211. }
  1212. bit_clk_list->pixel_clks_khz = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1213. if (!bit_clk_list->pixel_clks_khz) {
  1214. DSI_ERR("failed to allocate space for pclk list\n");
  1215. rc = -ENOMEM;
  1216. goto error;
  1217. }
  1218. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1219. bit_clk_list->rates, bit_clk_list->count);
  1220. if (rc) {
  1221. DSI_ERR("failed to parse supported bit clk list values, rc=%d\n", rc);
  1222. goto error;
  1223. }
  1224. for (i = 0; i < bit_clk_list->count; i++)
  1225. DSI_DEBUG("bit clk rate[%d]:%d\n", i, bit_clk_list->rates[i]);
  1226. return 0;
  1227. error:
  1228. bit_clk_list->count = 0;
  1229. kfree(bit_clk_list->rates);
  1230. kfree(bit_clk_list->front_porches);
  1231. kfree(bit_clk_list->pixel_clks_khz);
  1232. return rc;
  1233. }
  1234. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1235. {
  1236. int rc = 0;
  1237. bool supported = false;
  1238. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1239. struct dsi_parser_utils *utils = &panel->utils;
  1240. const char *type;
  1241. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1242. if (!supported) {
  1243. dyn_clk_caps->dyn_clk_support = false;
  1244. return rc;
  1245. }
  1246. dyn_clk_caps->dyn_clk_support = true;
  1247. type = utils->get_property(utils->data,
  1248. "qcom,dsi-dyn-clk-type", NULL);
  1249. if (!type) {
  1250. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1251. dyn_clk_caps->maintain_const_fps = false;
  1252. return 0;
  1253. }
  1254. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1255. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1256. dyn_clk_caps->maintain_const_fps = true;
  1257. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1258. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1259. dyn_clk_caps->maintain_const_fps = true;
  1260. } else {
  1261. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1262. dyn_clk_caps->maintain_const_fps = false;
  1263. }
  1264. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1265. return 0;
  1266. }
  1267. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1268. {
  1269. int rc = 0;
  1270. bool supported = false;
  1271. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1272. struct dsi_parser_utils *utils = &panel->utils;
  1273. const char *name = panel->name;
  1274. const char *type;
  1275. u32 i;
  1276. supported = utils->read_bool(utils->data,
  1277. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1278. if (!supported) {
  1279. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1280. dfps_caps->dfps_support = false;
  1281. return rc;
  1282. }
  1283. type = utils->get_property(utils->data,
  1284. "qcom,mdss-dsi-pan-fps-update", NULL);
  1285. if (!type) {
  1286. DSI_ERR("[%s] dfps type not defined\n", name);
  1287. rc = -EINVAL;
  1288. goto error;
  1289. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1290. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1291. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1292. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1293. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1294. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1295. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1296. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1297. } else {
  1298. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1299. rc = -EINVAL;
  1300. goto error;
  1301. }
  1302. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1303. "qcom,dsi-supported-dfps-list");
  1304. if (dfps_caps->dfps_list_len < 1) {
  1305. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1306. rc = -EINVAL;
  1307. goto error;
  1308. }
  1309. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1310. GFP_KERNEL);
  1311. if (!dfps_caps->dfps_list) {
  1312. rc = -ENOMEM;
  1313. goto error;
  1314. }
  1315. rc = utils->read_u32_array(utils->data,
  1316. "qcom,dsi-supported-dfps-list",
  1317. dfps_caps->dfps_list,
  1318. dfps_caps->dfps_list_len);
  1319. if (rc) {
  1320. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1321. rc = -EINVAL;
  1322. goto error;
  1323. }
  1324. dfps_caps->dfps_support = true;
  1325. /* calculate max and min fps */
  1326. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1327. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1328. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1329. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1330. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1331. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1332. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1333. }
  1334. error:
  1335. return rc;
  1336. }
  1337. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1338. struct dsi_parser_utils *utils,
  1339. const char *name)
  1340. {
  1341. int rc = 0;
  1342. const char *traffic_mode;
  1343. u32 vc_id = 0;
  1344. u32 val = 0;
  1345. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1346. if (rc) {
  1347. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1348. cfg->pulse_mode_hsa_he = false;
  1349. } else if (val == 1) {
  1350. cfg->pulse_mode_hsa_he = true;
  1351. } else if (val == 0) {
  1352. cfg->pulse_mode_hsa_he = false;
  1353. } else {
  1354. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1355. name);
  1356. rc = -EINVAL;
  1357. goto error;
  1358. }
  1359. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1360. "qcom,mdss-dsi-hfp-power-mode");
  1361. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1362. "qcom,mdss-dsi-hbp-power-mode");
  1363. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1364. "qcom,mdss-dsi-hsa-power-mode");
  1365. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1366. "qcom,mdss-dsi-last-line-interleave");
  1367. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1368. "qcom,mdss-dsi-bllp-eof-power-mode");
  1369. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1370. "qcom,mdss-dsi-bllp-power-mode");
  1371. traffic_mode = utils->get_property(utils->data,
  1372. "qcom,mdss-dsi-traffic-mode",
  1373. NULL);
  1374. if (!traffic_mode) {
  1375. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1376. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1377. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1378. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1379. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1380. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1381. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1382. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1383. } else {
  1384. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1385. traffic_mode);
  1386. rc = -EINVAL;
  1387. goto error;
  1388. }
  1389. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1390. &vc_id);
  1391. if (rc) {
  1392. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1393. cfg->vc_id = 0;
  1394. } else {
  1395. cfg->vc_id = vc_id;
  1396. }
  1397. error:
  1398. return rc;
  1399. }
  1400. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1401. struct dsi_parser_utils *utils,
  1402. const char *name)
  1403. {
  1404. u32 val = 0;
  1405. int rc = 0;
  1406. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1407. if (rc) {
  1408. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1409. cfg->wr_mem_start = 0x2C;
  1410. } else {
  1411. cfg->wr_mem_start = val;
  1412. }
  1413. val = 0;
  1414. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1415. &val);
  1416. if (rc) {
  1417. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1418. cfg->wr_mem_continue = 0x3C;
  1419. } else {
  1420. cfg->wr_mem_continue = val;
  1421. }
  1422. /* TODO: fix following */
  1423. cfg->max_cmd_packets_interleave = 0;
  1424. val = 0;
  1425. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1426. &val);
  1427. if (rc) {
  1428. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1429. cfg->insert_dcs_command = true;
  1430. } else if (val == 1) {
  1431. cfg->insert_dcs_command = true;
  1432. } else if (val == 0) {
  1433. cfg->insert_dcs_command = false;
  1434. } else {
  1435. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1436. name);
  1437. rc = -EINVAL;
  1438. goto error;
  1439. }
  1440. cfg->mdp_idle_ctrl_en =
  1441. utils->read_bool(utils->data, "qcom,mdss-dsi-mdp-idle-ctrl-en");
  1442. if (cfg->mdp_idle_ctrl_en) {
  1443. val = 0;
  1444. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-mdp-idle-ctrl-len", &val);
  1445. if (rc) {
  1446. DSI_DEBUG("[%s] mdp idle ctrl len is not defined\n", name);
  1447. cfg->mdp_idle_ctrl_len = 0;
  1448. cfg->mdp_idle_ctrl_en = false;
  1449. rc = 0;
  1450. } else {
  1451. cfg->mdp_idle_ctrl_len = val;
  1452. }
  1453. }
  1454. error:
  1455. return rc;
  1456. }
  1457. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1458. {
  1459. int rc = 0;
  1460. struct dsi_parser_utils *utils = &panel->utils;
  1461. bool panel_mode_switch_enabled;
  1462. enum dsi_op_mode panel_mode;
  1463. const char *mode;
  1464. mode = utils->get_property(utils->data,
  1465. "qcom,mdss-dsi-panel-type", NULL);
  1466. if (!mode) {
  1467. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1468. panel_mode = DSI_OP_VIDEO_MODE;
  1469. } else if (!strcmp(mode, "dsi_video_mode")) {
  1470. panel_mode = DSI_OP_VIDEO_MODE;
  1471. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1472. panel_mode = DSI_OP_CMD_MODE;
  1473. } else {
  1474. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1475. rc = -EINVAL;
  1476. goto error;
  1477. }
  1478. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1479. "qcom,mdss-dsi-panel-mode-switch");
  1480. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1481. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1482. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1483. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1484. utils,
  1485. panel->name);
  1486. if (rc) {
  1487. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1488. panel->name, rc);
  1489. goto error;
  1490. }
  1491. }
  1492. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1493. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1494. utils,
  1495. panel->name);
  1496. if (rc) {
  1497. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1498. panel->name, rc);
  1499. goto error;
  1500. }
  1501. }
  1502. panel->poms_align_vsync = utils->read_bool(utils->data,
  1503. "qcom,poms-align-panel-vsync");
  1504. panel->panel_mode = panel_mode;
  1505. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1506. panel->panel_ack_disabled = utils->read_bool(utils->data,
  1507. "qcom,panel-ack-disabled");
  1508. error:
  1509. return rc;
  1510. }
  1511. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1512. {
  1513. int rc = 0;
  1514. u32 val = 0;
  1515. const char *str;
  1516. struct dsi_panel_phy_props *props = &panel->phy_props;
  1517. struct dsi_parser_utils *utils = &panel->utils;
  1518. const char *name = panel->name;
  1519. rc = utils->read_u32(utils->data,
  1520. "qcom,mdss-pan-physical-width-dimension", &val);
  1521. if (rc) {
  1522. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1523. props->panel_width_mm = 0;
  1524. rc = 0;
  1525. } else {
  1526. props->panel_width_mm = val;
  1527. }
  1528. rc = utils->read_u32(utils->data,
  1529. "qcom,mdss-pan-physical-height-dimension",
  1530. &val);
  1531. if (rc) {
  1532. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1533. props->panel_height_mm = 0;
  1534. rc = 0;
  1535. } else {
  1536. props->panel_height_mm = val;
  1537. }
  1538. str = utils->get_property(utils->data,
  1539. "qcom,mdss-dsi-panel-orientation", NULL);
  1540. if (!str) {
  1541. props->rotation = DSI_PANEL_ROTATE_NONE;
  1542. } else if (!strcmp(str, "180")) {
  1543. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1544. } else if (!strcmp(str, "hflip")) {
  1545. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1546. } else if (!strcmp(str, "vflip")) {
  1547. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1548. } else {
  1549. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1550. rc = -EINVAL;
  1551. goto error;
  1552. }
  1553. error:
  1554. return rc;
  1555. }
  1556. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1557. "qcom,mdss-dsi-pre-on-command",
  1558. "qcom,mdss-dsi-on-command",
  1559. "qcom,vid-on-commands",
  1560. "qcom,cmd-on-commands",
  1561. "qcom,mdss-dsi-post-panel-on-command",
  1562. "qcom,mdss-dsi-pre-off-command",
  1563. "qcom,mdss-dsi-off-command",
  1564. "qcom,mdss-dsi-post-off-command",
  1565. "qcom,mdss-dsi-pre-res-switch",
  1566. "qcom,mdss-dsi-res-switch",
  1567. "qcom,mdss-dsi-post-res-switch",
  1568. "qcom,video-mode-switch-in-commands",
  1569. "qcom,video-mode-switch-out-commands",
  1570. "qcom,cmd-mode-switch-in-commands",
  1571. "qcom,cmd-mode-switch-out-commands",
  1572. "qcom,mdss-dsi-panel-status-command",
  1573. "qcom,mdss-dsi-lp1-command",
  1574. "qcom,mdss-dsi-lp2-command",
  1575. "qcom,mdss-dsi-nolp-command",
  1576. "PPS not parsed from DTSI, generated dynamically",
  1577. "ROI not parsed from DTSI, generated dynamically",
  1578. "qcom,mdss-dsi-timing-switch-command",
  1579. "qcom,mdss-dsi-post-mode-switch-on-command",
  1580. "qcom,mdss-dsi-qsync-on-commands",
  1581. "qcom,mdss-dsi-qsync-off-commands",
  1582. };
  1583. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1584. "qcom,mdss-dsi-pre-on-command-state",
  1585. "qcom,mdss-dsi-on-command-state",
  1586. "qcom,vid-on-commands-state",
  1587. "qcom,cmd-on-commands-state",
  1588. "qcom,mdss-dsi-post-on-command-state",
  1589. "qcom,mdss-dsi-pre-off-command-state",
  1590. "qcom,mdss-dsi-off-command-state",
  1591. "qcom,mdss-dsi-post-off-command-state",
  1592. "qcom,mdss-dsi-pre-res-switch-state",
  1593. "qcom,mdss-dsi-res-switch-state",
  1594. "qcom,mdss-dsi-post-res-switch-state",
  1595. "qcom,video-mode-switch-in-commands-state",
  1596. "qcom,video-mode-switch-out-commands-state",
  1597. "qcom,cmd-mode-switch-in-commands-state",
  1598. "qcom,cmd-mode-switch-out-commands-state",
  1599. "qcom,mdss-dsi-panel-status-command-state",
  1600. "qcom,mdss-dsi-lp1-command-state",
  1601. "qcom,mdss-dsi-lp2-command-state",
  1602. "qcom,mdss-dsi-nolp-command-state",
  1603. "PPS not parsed from DTSI, generated dynamically",
  1604. "ROI not parsed from DTSI, generated dynamically",
  1605. "qcom,mdss-dsi-timing-switch-command-state",
  1606. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1607. "qcom,mdss-dsi-qsync-on-commands-state",
  1608. "qcom,mdss-dsi-qsync-off-commands-state",
  1609. };
  1610. int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1611. {
  1612. const u32 cmd_set_min_size = 7;
  1613. u32 count = 0;
  1614. u32 packet_length;
  1615. u32 tmp;
  1616. while (length >= cmd_set_min_size) {
  1617. packet_length = cmd_set_min_size;
  1618. tmp = ((data[5] << 8) | (data[6]));
  1619. packet_length += tmp;
  1620. if (packet_length > length) {
  1621. DSI_ERR("format error\n");
  1622. return -EINVAL;
  1623. }
  1624. length -= packet_length;
  1625. data += packet_length;
  1626. count++;
  1627. }
  1628. *cnt = count;
  1629. return 0;
  1630. }
  1631. int dsi_panel_create_cmd_packets(const char *data,
  1632. u32 length,
  1633. u32 count,
  1634. struct dsi_cmd_desc *cmd)
  1635. {
  1636. int rc = 0;
  1637. int i, j;
  1638. u8 *payload;
  1639. for (i = 0; i < count; i++) {
  1640. u32 size;
  1641. cmd[i].msg.type = data[0];
  1642. cmd[i].msg.channel = data[2];
  1643. cmd[i].msg.flags |= data[3];
  1644. cmd[i].ctrl = 0;
  1645. cmd[i].post_wait_ms = data[4];
  1646. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1647. if (cmd[i].msg.flags & MIPI_DSI_MSG_BATCH_COMMAND)
  1648. cmd[i].last_command = false;
  1649. else
  1650. cmd[i].last_command = true;
  1651. size = cmd[i].msg.tx_len * sizeof(u8);
  1652. payload = kzalloc(size, GFP_KERNEL);
  1653. if (!payload) {
  1654. rc = -ENOMEM;
  1655. goto error_free_payloads;
  1656. }
  1657. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1658. payload[j] = data[7 + j];
  1659. cmd[i].msg.tx_buf = payload;
  1660. data += (7 + cmd[i].msg.tx_len);
  1661. }
  1662. return rc;
  1663. error_free_payloads:
  1664. for (i = i - 1; i >= 0; i--) {
  1665. cmd--;
  1666. kfree(cmd->msg.tx_buf);
  1667. }
  1668. return rc;
  1669. }
  1670. void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1671. {
  1672. u32 i = 0;
  1673. struct dsi_cmd_desc *cmd;
  1674. for (i = 0; i < set->count; i++) {
  1675. cmd = &set->cmds[i];
  1676. kfree(cmd->msg.tx_buf);
  1677. }
  1678. }
  1679. void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1680. {
  1681. kfree(set->cmds);
  1682. }
  1683. int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1684. u32 packet_count)
  1685. {
  1686. u32 size;
  1687. size = packet_count * sizeof(*cmd->cmds);
  1688. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1689. if (!cmd->cmds)
  1690. return -ENOMEM;
  1691. cmd->count = packet_count;
  1692. return 0;
  1693. }
  1694. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1695. enum dsi_cmd_set_type type,
  1696. struct dsi_parser_utils *utils)
  1697. {
  1698. int rc = 0;
  1699. u32 length = 0;
  1700. const char *data;
  1701. const char *state;
  1702. u32 packet_count = 0;
  1703. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1704. &length);
  1705. if (!data) {
  1706. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1707. rc = -ENOTSUPP;
  1708. goto error;
  1709. }
  1710. DSI_DEBUG("type=%d, name=%s, length=%d\n", type, cmd_set_prop_map[type], length);
  1711. print_hex_dump_debug("", DUMP_PREFIX_NONE, 8, 1, data, length, false);
  1712. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1713. if (rc) {
  1714. DSI_ERR("commands failed, rc=%d\n", rc);
  1715. goto error;
  1716. }
  1717. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1718. packet_count, length);
  1719. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1720. if (rc) {
  1721. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1722. goto error;
  1723. }
  1724. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1725. cmd->cmds);
  1726. if (rc) {
  1727. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1728. goto error_free_mem;
  1729. }
  1730. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1731. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1732. cmd->state = DSI_CMD_SET_STATE_LP;
  1733. } else if (!strcmp(state, "dsi_hs_mode")) {
  1734. cmd->state = DSI_CMD_SET_STATE_HS;
  1735. } else {
  1736. DSI_ERR("[%s] command state unrecognized-%s\n",
  1737. cmd_set_state_map[type], state);
  1738. goto error_free_mem;
  1739. }
  1740. return rc;
  1741. error_free_mem:
  1742. kfree(cmd->cmds);
  1743. cmd->cmds = NULL;
  1744. error:
  1745. return rc;
  1746. }
  1747. static int dsi_panel_parse_cmd_sets(
  1748. struct dsi_display_mode_priv_info *priv_info,
  1749. struct dsi_parser_utils *utils)
  1750. {
  1751. int rc = 0;
  1752. struct dsi_panel_cmd_set *set;
  1753. u32 i;
  1754. if (!priv_info) {
  1755. DSI_ERR("invalid mode priv info\n");
  1756. return -EINVAL;
  1757. }
  1758. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1759. set = &priv_info->cmd_sets[i];
  1760. set->type = i;
  1761. set->count = 0;
  1762. if (i == DSI_CMD_SET_PPS) {
  1763. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1764. if (rc)
  1765. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1766. i, rc);
  1767. set->state = DSI_CMD_SET_STATE_LP;
  1768. } else {
  1769. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1770. if (rc)
  1771. DSI_DEBUG("failed to parse set %d\n", i);
  1772. }
  1773. }
  1774. rc = 0;
  1775. return rc;
  1776. }
  1777. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1778. {
  1779. int rc = 0;
  1780. int i;
  1781. u32 length = 0;
  1782. u32 count = 0;
  1783. u32 size = 0;
  1784. u32 *arr_32 = NULL;
  1785. const u32 *arr;
  1786. struct dsi_parser_utils *utils = &panel->utils;
  1787. struct dsi_reset_seq *seq;
  1788. if (panel->host_config.ext_bridge_mode)
  1789. return 0;
  1790. arr = utils->get_property(utils->data,
  1791. "qcom,mdss-dsi-reset-sequence", &length);
  1792. if (!arr) {
  1793. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1794. rc = -EINVAL;
  1795. goto error;
  1796. }
  1797. if (length & 0x1) {
  1798. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1799. panel->name);
  1800. rc = -EINVAL;
  1801. goto error;
  1802. }
  1803. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1804. length = length / sizeof(u32);
  1805. size = length * sizeof(u32);
  1806. arr_32 = kzalloc(size, GFP_KERNEL);
  1807. if (!arr_32) {
  1808. rc = -ENOMEM;
  1809. goto error;
  1810. }
  1811. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1812. arr_32, length);
  1813. if (rc) {
  1814. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1815. goto error_free_arr_32;
  1816. }
  1817. count = length / 2;
  1818. size = count * sizeof(*seq);
  1819. seq = kzalloc(size, GFP_KERNEL);
  1820. if (!seq) {
  1821. rc = -ENOMEM;
  1822. goto error_free_arr_32;
  1823. }
  1824. panel->reset_config.sequence = seq;
  1825. panel->reset_config.count = count;
  1826. for (i = 0; i < length; i += 2) {
  1827. seq->level = arr_32[i];
  1828. seq->sleep_ms = arr_32[i + 1];
  1829. seq++;
  1830. }
  1831. error_free_arr_32:
  1832. kfree(arr_32);
  1833. error:
  1834. return rc;
  1835. }
  1836. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1837. {
  1838. struct dsi_parser_utils *utils = &panel->utils;
  1839. const char *string;
  1840. int i, rc = 0;
  1841. panel->ulps_feature_enabled =
  1842. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1843. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1844. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1845. panel->ulps_suspend_enabled =
  1846. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1847. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1848. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1849. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1850. "qcom,mdss-dsi-te-using-wd");
  1851. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1852. "qcom,cmd-sync-wait-broadcast");
  1853. panel->lp11_init = utils->read_bool(utils->data,
  1854. "qcom,mdss-dsi-lp11-init");
  1855. panel->reset_gpio_always_on = utils->read_bool(utils->data,
  1856. "qcom,platform-reset-gpio-always-on");
  1857. panel->spr_info.enable = false;
  1858. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1859. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1860. if (!rc) {
  1861. // find match for pack-type string
  1862. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1863. if (msm_spr_pack_type_str[i] &&
  1864. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1865. panel->spr_info.enable = true;
  1866. panel->spr_info.pack_type = i;
  1867. break;
  1868. }
  1869. }
  1870. }
  1871. pr_debug("%s source side spr packing, pack-type %s\n",
  1872. panel->spr_info.enable ? "enable" : "disable",
  1873. panel->spr_info.enable ?
  1874. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1875. return 0;
  1876. }
  1877. static int dsi_panel_parse_wd_jitter_config(struct dsi_display_mode_priv_info *priv_info,
  1878. struct dsi_parser_utils *utils, u32 *jitter)
  1879. {
  1880. int rc = 0;
  1881. struct msm_display_wd_jitter_config *wd_jitter = &priv_info->wd_jitter;
  1882. u32 ltj[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 1};
  1883. u32 ltj_time = 0;
  1884. const u32 max_ltj = 10;
  1885. if (!(utils->read_bool(utils->data, "qcom,dsi-wd-jitter-enable"))) {
  1886. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1887. priv_info->panel_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1888. return 0;
  1889. }
  1890. rc = utils->read_u32_array(utils->data, "qcom,dsi-wd-ltj-max-jitter", ltj,
  1891. DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1892. rc |= utils->read_u32(utils->data, "qcom,dsi-wd-ltj-time-sec", &ltj_time);
  1893. if (rc || !ltj[1] || !ltj_time || (ltj[0] / ltj[1] >= max_ltj)) {
  1894. DSI_DEBUG("No valid long term jitter defined\n");
  1895. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1896. priv_info->panel_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1897. rc = -EINVAL;
  1898. } else {
  1899. wd_jitter->ltj_max_numer = ltj[0];
  1900. wd_jitter->ltj_max_denom = ltj[1];
  1901. wd_jitter->ltj_time_sec = ltj_time;
  1902. wd_jitter->jitter_type = MSM_DISPLAY_WD_LTJ_JITTER;
  1903. }
  1904. if (jitter[0] && jitter[1]) {
  1905. if (jitter[0] / jitter[1] > MAX_PANEL_JITTER) {
  1906. wd_jitter->inst_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1907. wd_jitter->inst_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1908. } else {
  1909. wd_jitter->inst_jitter_numer = jitter[0];
  1910. wd_jitter->inst_jitter_denom = jitter[1];
  1911. }
  1912. wd_jitter->jitter_type |= MSM_DISPLAY_WD_INSTANTANEOUS_JITTER;
  1913. } else if (rc) {
  1914. wd_jitter->inst_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1915. wd_jitter->inst_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1916. wd_jitter->jitter_type |= MSM_DISPLAY_WD_INSTANTANEOUS_JITTER;
  1917. }
  1918. priv_info->panel_jitter_numer = rc ?
  1919. wd_jitter->inst_jitter_numer : wd_jitter->ltj_max_numer;
  1920. priv_info->panel_jitter_denom = rc ?
  1921. wd_jitter->inst_jitter_denom : wd_jitter->ltj_max_denom;
  1922. return 0;
  1923. }
  1924. static int dsi_panel_parse_jitter_config(
  1925. struct dsi_display_mode *mode,
  1926. struct dsi_parser_utils *utils)
  1927. {
  1928. int rc;
  1929. struct dsi_display_mode_priv_info *priv_info;
  1930. struct dsi_panel *panel;
  1931. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1932. u64 jitter_val = 0;
  1933. priv_info = mode->priv_info;
  1934. panel = container_of(utils, struct dsi_panel, utils);
  1935. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1936. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1937. if (rc) {
  1938. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1939. } else {
  1940. jitter_val = jitter[0];
  1941. jitter_val = div_u64(jitter_val, jitter[1]);
  1942. }
  1943. if (panel->te_using_watchdog_timer) {
  1944. dsi_panel_parse_wd_jitter_config(priv_info, utils, jitter);
  1945. } else if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1946. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1947. priv_info->panel_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  1948. } else {
  1949. priv_info->panel_jitter_numer = jitter[0];
  1950. priv_info->panel_jitter_denom = jitter[1];
  1951. }
  1952. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1953. &priv_info->panel_prefill_lines);
  1954. if (rc) {
  1955. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1956. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1957. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1958. } else if (priv_info->panel_prefill_lines >=
  1959. DSI_V_TOTAL(&mode->timing)) {
  1960. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1961. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1962. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1963. }
  1964. return 0;
  1965. }
  1966. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1967. {
  1968. int rc = 0;
  1969. char *supply_name;
  1970. if (panel->host_config.ext_bridge_mode)
  1971. return 0;
  1972. if (!strcmp(panel->type, "primary"))
  1973. supply_name = "qcom,panel-supply-entries";
  1974. else
  1975. supply_name = "qcom,panel-sec-supply-entries";
  1976. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1977. &panel->power_info, supply_name);
  1978. if (rc) {
  1979. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1980. goto error;
  1981. }
  1982. error:
  1983. return rc;
  1984. }
  1985. int dsi_panel_get_io_resources(struct dsi_panel *panel,
  1986. struct msm_io_res *io_res)
  1987. {
  1988. struct dsi_parser_utils *utils = &panel->utils;
  1989. struct list_head *mem_list = &io_res->mem;
  1990. int reset_gpio;
  1991. int rc = 0;
  1992. reset_gpio = utils->get_named_gpio(utils->data,
  1993. "qcom,platform-reset-gpio", 0);
  1994. if (gpio_is_valid(reset_gpio)) {
  1995. rc = msm_dss_get_gpio_io_mem(reset_gpio, mem_list);
  1996. if (rc) {
  1997. DSI_ERR("[%s] failed to retrieve the reset gpio address\n", panel->name);
  1998. goto end;
  1999. }
  2000. }
  2001. end:
  2002. return rc;
  2003. }
  2004. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  2005. {
  2006. int rc = 0;
  2007. const char *data;
  2008. struct dsi_parser_utils *utils = &panel->utils;
  2009. char *reset_gpio_name, *mode_set_gpio_name;
  2010. if (!strcmp(panel->type, "primary")) {
  2011. reset_gpio_name = "qcom,platform-reset-gpio";
  2012. mode_set_gpio_name = "qcom,panel-mode-gpio";
  2013. } else {
  2014. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  2015. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  2016. }
  2017. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  2018. reset_gpio_name, 0);
  2019. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  2020. !panel->host_config.ext_bridge_mode) {
  2021. DSI_DEBUG("[%s] reset gpio not set, rc=%d\n", panel->name,
  2022. panel->reset_config.reset_gpio);
  2023. }
  2024. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  2025. "qcom,5v-boost-gpio",
  2026. 0);
  2027. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  2028. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  2029. panel->name, rc);
  2030. panel->reset_config.disp_en_gpio =
  2031. utils->get_named_gpio(utils->data,
  2032. "qcom,platform-en-gpio", 0);
  2033. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  2034. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  2035. panel->name, rc);
  2036. }
  2037. }
  2038. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  2039. utils->data, mode_set_gpio_name, 0);
  2040. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  2041. DSI_DEBUG("mode gpio not specified\n");
  2042. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  2043. data = utils->get_property(utils->data,
  2044. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  2045. if (data) {
  2046. if (!strcmp(data, "single_port"))
  2047. panel->reset_config.mode_sel_state =
  2048. MODE_SEL_SINGLE_PORT;
  2049. else if (!strcmp(data, "dual_port"))
  2050. panel->reset_config.mode_sel_state =
  2051. MODE_SEL_DUAL_PORT;
  2052. else if (!strcmp(data, "high"))
  2053. panel->reset_config.mode_sel_state =
  2054. MODE_GPIO_HIGH;
  2055. else if (!strcmp(data, "low"))
  2056. panel->reset_config.mode_sel_state =
  2057. MODE_GPIO_LOW;
  2058. } else {
  2059. /* Set default mode as SPLIT mode */
  2060. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  2061. }
  2062. /* TODO: release memory */
  2063. rc = dsi_panel_parse_reset_sequence(panel);
  2064. if (rc) {
  2065. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  2066. panel->name, rc);
  2067. goto error;
  2068. }
  2069. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  2070. "qcom,mdss-dsi-panel-test-pin",
  2071. 0);
  2072. if (!gpio_is_valid(panel->panel_test_gpio))
  2073. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  2074. __LINE__);
  2075. error:
  2076. return rc;
  2077. }
  2078. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  2079. {
  2080. int rc = 0;
  2081. u32 val;
  2082. struct dsi_backlight_config *config = &panel->bl_config;
  2083. struct dsi_parser_utils *utils = &panel->utils;
  2084. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  2085. &val);
  2086. if (rc) {
  2087. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  2088. goto error;
  2089. }
  2090. config->pwm_period_usecs = val;
  2091. error:
  2092. return rc;
  2093. }
  2094. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  2095. {
  2096. int rc = 0;
  2097. u32 val = 0;
  2098. const char *bl_type = NULL;
  2099. const char *data = NULL;
  2100. const char *state = NULL;
  2101. struct dsi_parser_utils *utils = &panel->utils;
  2102. char *bl_name = NULL;
  2103. if (!strcmp(panel->type, "primary"))
  2104. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  2105. else
  2106. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  2107. bl_type = utils->get_property(utils->data, bl_name, NULL);
  2108. if (!bl_type) {
  2109. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2110. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  2111. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  2112. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  2113. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  2114. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  2115. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  2116. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  2117. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  2118. } else {
  2119. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  2120. panel->name, bl_type);
  2121. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2122. }
  2123. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  2124. if (!data) {
  2125. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2126. } else if (!strcmp(data, "delay_until_first_frame")) {
  2127. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  2128. } else {
  2129. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  2130. panel->name, data);
  2131. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2132. }
  2133. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  2134. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  2135. panel->bl_config.dimming_min_bl = 0;
  2136. panel->bl_config.dimming_status = DIMMING_ENABLE;
  2137. panel->bl_config.user_disable_notification = false;
  2138. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  2139. if (rc) {
  2140. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  2141. panel->name);
  2142. panel->bl_config.bl_min_level = 0;
  2143. } else {
  2144. panel->bl_config.bl_min_level = val;
  2145. }
  2146. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  2147. if (rc) {
  2148. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  2149. panel->name);
  2150. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  2151. } else {
  2152. panel->bl_config.bl_max_level = val;
  2153. }
  2154. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  2155. &val);
  2156. if (rc) {
  2157. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  2158. panel->name);
  2159. panel->bl_config.brightness_max_level = 255;
  2160. rc = 0;
  2161. } else {
  2162. panel->bl_config.brightness_max_level = val;
  2163. }
  2164. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  2165. "qcom,mdss-dsi-bl-inverted-dbv");
  2166. state = utils->get_property(utils->data, "qcom,bl-dsc-cmd-state", NULL);
  2167. if (!state || !strcmp(state, "dsi_hs_mode"))
  2168. panel->bl_config.lp_mode = false;
  2169. else if (!strcmp(state, "dsi_lp_mode"))
  2170. panel->bl_config.lp_mode = true;
  2171. else
  2172. DSI_ERR("bl-dsc-cmd-state command state unrecognized-%s\n",
  2173. state);
  2174. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  2175. rc = dsi_panel_parse_bl_pwm_config(panel);
  2176. if (rc) {
  2177. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  2178. panel->name, rc);
  2179. goto error;
  2180. }
  2181. }
  2182. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  2183. "qcom,platform-bklight-en-gpio",
  2184. 0);
  2185. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  2186. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  2187. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2188. panel->name, rc);
  2189. rc = -EPROBE_DEFER;
  2190. goto error;
  2191. } else {
  2192. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2193. panel->name, rc);
  2194. rc = 0;
  2195. goto error;
  2196. }
  2197. }
  2198. error:
  2199. return rc;
  2200. }
  2201. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2202. struct dsi_parser_utils *utils)
  2203. {
  2204. const char *data;
  2205. u32 len, i;
  2206. int rc = 0;
  2207. struct dsi_display_mode_priv_info *priv_info;
  2208. u64 pixel_clk_khz;
  2209. if (!mode || !mode->priv_info)
  2210. return -EINVAL;
  2211. priv_info = mode->priv_info;
  2212. data = utils->get_property(utils->data,
  2213. "qcom,mdss-dsi-panel-phy-timings", &len);
  2214. if (!data) {
  2215. DSI_DEBUG("Unable to read Phy timing settings\n");
  2216. } else {
  2217. priv_info->phy_timing_val =
  2218. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2219. if (!priv_info->phy_timing_val)
  2220. return -EINVAL;
  2221. for (i = 0; i < len; i++)
  2222. priv_info->phy_timing_val[i] = data[i];
  2223. priv_info->phy_timing_len = len;
  2224. }
  2225. if (mode->panel_mode_caps & DSI_OP_VIDEO_MODE) {
  2226. /*
  2227. * For command mode we update the pclk as part of
  2228. * function dsi_panel_calc_dsi_transfer_time( )
  2229. * as we set it based on dsi clock or mdp transfer time.
  2230. */
  2231. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  2232. DSI_V_TOTAL(&mode->timing) *
  2233. mode->timing.refresh_rate);
  2234. do_div(pixel_clk_khz, 1000);
  2235. mode->pixel_clk_khz = pixel_clk_khz;
  2236. }
  2237. return rc;
  2238. }
  2239. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2240. struct dsi_parser_utils *utils)
  2241. {
  2242. u32 data;
  2243. int rc = -EINVAL;
  2244. int intf_width;
  2245. const char *compression;
  2246. struct dsi_display_mode_priv_info *priv_info;
  2247. if (!mode || !mode->priv_info)
  2248. return -EINVAL;
  2249. priv_info = mode->priv_info;
  2250. priv_info->dsc_enabled = false;
  2251. compression = utils->get_property(utils->data,
  2252. "qcom,compression-mode", NULL);
  2253. if (compression && !strcmp(compression, "dsc"))
  2254. priv_info->dsc_enabled = true;
  2255. if (!priv_info->dsc_enabled) {
  2256. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2257. return 0;
  2258. }
  2259. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2260. if (rc) {
  2261. priv_info->dsc.config.dsc_version_major = 0x1;
  2262. priv_info->dsc.config.dsc_version_minor = 0x1;
  2263. rc = 0;
  2264. } else {
  2265. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2266. * major version information
  2267. */
  2268. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  2269. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  2270. if ((priv_info->dsc.config.dsc_version_major != 0x1) ||
  2271. ((priv_info->dsc.config.dsc_version_minor
  2272. != 0x1) &&
  2273. (priv_info->dsc.config.dsc_version_minor
  2274. != 0x2))) {
  2275. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2276. __func__,
  2277. priv_info->dsc.config.dsc_version_major,
  2278. priv_info->dsc.config.dsc_version_minor
  2279. );
  2280. rc = -EINVAL;
  2281. goto error;
  2282. }
  2283. }
  2284. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2285. if (rc) {
  2286. priv_info->dsc.scr_rev = 0x0;
  2287. rc = 0;
  2288. } else {
  2289. priv_info->dsc.scr_rev = data & 0xff;
  2290. /* only one scr rev supported */
  2291. if (priv_info->dsc.scr_rev > 0x1) {
  2292. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2293. __func__, priv_info->dsc.scr_rev);
  2294. rc = -EINVAL;
  2295. goto error;
  2296. }
  2297. }
  2298. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2299. if (rc) {
  2300. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2301. goto error;
  2302. }
  2303. priv_info->dsc.config.slice_height = data;
  2304. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2305. if (rc) {
  2306. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2307. goto error;
  2308. }
  2309. priv_info->dsc.config.slice_width = data;
  2310. intf_width = mode->timing.h_active;
  2311. if (intf_width % priv_info->dsc.config.slice_width) {
  2312. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2313. intf_width, priv_info->dsc.config.slice_width);
  2314. rc = -EINVAL;
  2315. goto error;
  2316. }
  2317. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2318. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2319. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2320. if (rc) {
  2321. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2322. goto error;
  2323. } else if (!data || (data > 2)) {
  2324. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2325. goto error;
  2326. }
  2327. priv_info->dsc.slice_per_pkt = data;
  2328. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2329. &data);
  2330. if (rc) {
  2331. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2332. goto error;
  2333. }
  2334. priv_info->dsc.config.bits_per_component = data;
  2335. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2336. if (rc) {
  2337. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2338. data = 0;
  2339. }
  2340. priv_info->dsc.pps_delay_ms = data;
  2341. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2342. &data);
  2343. if (rc) {
  2344. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2345. goto error;
  2346. }
  2347. priv_info->dsc.config.bits_per_pixel = data << 4;
  2348. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2349. &data);
  2350. if (rc) {
  2351. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2352. rc = 0;
  2353. data = MSM_CHROMA_444;
  2354. } else if (data == MSM_CHROMA_422) {
  2355. priv_info->dsc.config.native_422 = 1;
  2356. } else if (data == MSM_CHROMA_420) {
  2357. priv_info->dsc.config.native_420 = 1;
  2358. }
  2359. priv_info->dsc.chroma_format = data;
  2360. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2361. &data);
  2362. if (rc) {
  2363. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2364. rc = 0;
  2365. data = MSM_RGB;
  2366. }
  2367. priv_info->dsc.source_color_space = data;
  2368. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2369. "qcom,mdss-dsc-block-prediction-enable");
  2370. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2371. priv_info->dsc.config.slice_width);
  2372. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2373. priv_info->dsc.scr_rev);
  2374. if (rc) {
  2375. DSI_DEBUG("failed populating dsc params\n");
  2376. rc = -EINVAL;
  2377. goto error;
  2378. }
  2379. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2380. if (rc) {
  2381. DSI_DEBUG("failed populating other dsc params\n");
  2382. rc = -EINVAL;
  2383. goto error;
  2384. }
  2385. priv_info->pclk_scale.numer =
  2386. priv_info->dsc.config.bits_per_pixel >> 4;
  2387. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2388. priv_info->dsc.chroma_format,
  2389. priv_info->dsc.config.bits_per_component);
  2390. mode->timing.dsc_enabled = true;
  2391. mode->timing.dsc = &priv_info->dsc;
  2392. mode->timing.pclk_scale = priv_info->pclk_scale;
  2393. error:
  2394. return rc;
  2395. }
  2396. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2397. struct dsi_parser_utils *utils, int traffic_mode)
  2398. {
  2399. u32 data;
  2400. int rc = -EINVAL;
  2401. const char *compression;
  2402. struct dsi_display_mode_priv_info *priv_info;
  2403. int intf_width;
  2404. if (!mode || !mode->priv_info)
  2405. return -EINVAL;
  2406. priv_info = mode->priv_info;
  2407. priv_info->vdc_enabled = false;
  2408. compression = utils->get_property(utils->data,
  2409. "qcom,compression-mode", NULL);
  2410. if (compression && !strcmp(compression, "vdc"))
  2411. priv_info->vdc_enabled = true;
  2412. if (!priv_info->vdc_enabled) {
  2413. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2414. return 0;
  2415. }
  2416. priv_info->vdc.traffic_mode = traffic_mode;
  2417. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2418. if (rc) {
  2419. priv_info->vdc.version_major = 0x1;
  2420. priv_info->vdc.version_minor = 0x2;
  2421. priv_info->vdc.version_release = 0x0;
  2422. rc = 0;
  2423. } else {
  2424. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2425. * major version information
  2426. */
  2427. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2428. priv_info->vdc.version_minor = data & 0x0F;
  2429. if ((priv_info->vdc.version_major != 0x1) &&
  2430. ((priv_info->vdc.version_minor
  2431. != 0x2))) {
  2432. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2433. __func__,
  2434. priv_info->vdc.version_major,
  2435. priv_info->vdc.version_minor
  2436. );
  2437. rc = -EINVAL;
  2438. goto error;
  2439. }
  2440. }
  2441. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2442. if (rc) {
  2443. priv_info->vdc.version_release = 0x0;
  2444. rc = 0;
  2445. } else {
  2446. priv_info->vdc.version_release = data & 0xff;
  2447. /* only one release version is supported */
  2448. if (priv_info->vdc.version_release != 0x0) {
  2449. DSI_ERR("unsupported vdc release version %d\n",
  2450. priv_info->vdc.version_release);
  2451. rc = -EINVAL;
  2452. goto error;
  2453. }
  2454. }
  2455. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2456. priv_info->vdc.version_major,
  2457. priv_info->vdc.version_minor,
  2458. priv_info->vdc.version_release);
  2459. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2460. if (rc) {
  2461. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2462. goto error;
  2463. }
  2464. priv_info->vdc.slice_height = data;
  2465. /* slice height should be atleast 16 lines */
  2466. if (priv_info->vdc.slice_height < 16) {
  2467. DSI_ERR("invalid slice height %d\n",
  2468. priv_info->vdc.slice_height);
  2469. rc = -EINVAL;
  2470. goto error;
  2471. }
  2472. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2473. if (rc) {
  2474. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2475. goto error;
  2476. }
  2477. priv_info->vdc.slice_width = data;
  2478. /*
  2479. * slide-width should be multiple of 8
  2480. * slice-width should be atlease 64 pixels
  2481. */
  2482. if ((priv_info->vdc.slice_width & 7) ||
  2483. (priv_info->vdc.slice_width < 64)) {
  2484. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2485. rc = -EINVAL;
  2486. goto error;
  2487. }
  2488. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2489. if (rc) {
  2490. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2491. goto error;
  2492. } else if (!data || (data > 2)) {
  2493. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2494. rc = -EINVAL;
  2495. goto error;
  2496. }
  2497. intf_width = mode->timing.h_active;
  2498. priv_info->vdc.slice_per_pkt = data;
  2499. priv_info->vdc.frame_width = mode->timing.h_active;
  2500. priv_info->vdc.frame_height = mode->timing.v_active;
  2501. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2502. &data);
  2503. if (rc) {
  2504. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2505. goto error;
  2506. }
  2507. priv_info->vdc.bits_per_component = data;
  2508. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2509. if (rc) {
  2510. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2511. data = 0;
  2512. }
  2513. priv_info->vdc.pps_delay_ms = data;
  2514. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2515. &data);
  2516. if (rc) {
  2517. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2518. goto error;
  2519. }
  2520. priv_info->vdc.bits_per_pixel = data << 4;
  2521. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2522. &data);
  2523. if (rc) {
  2524. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2525. rc = 0;
  2526. data = MSM_CHROMA_444;
  2527. }
  2528. priv_info->vdc.chroma_format = data;
  2529. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2530. &data);
  2531. if (rc) {
  2532. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2533. rc = 0;
  2534. data = MSM_RGB;
  2535. }
  2536. priv_info->vdc.source_color_space = data;
  2537. rc = sde_vdc_populate_config(&priv_info->vdc,
  2538. intf_width, traffic_mode);
  2539. if (rc) {
  2540. DSI_DEBUG("failed populating vdc config\n");
  2541. rc = -EINVAL;
  2542. goto error;
  2543. }
  2544. priv_info->pclk_scale.numer =
  2545. priv_info->vdc.bits_per_pixel >> 4;
  2546. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2547. priv_info->vdc.chroma_format,
  2548. priv_info->vdc.bits_per_component);
  2549. mode->timing.vdc_enabled = true;
  2550. mode->timing.vdc = &priv_info->vdc;
  2551. mode->timing.pclk_scale = priv_info->pclk_scale;
  2552. error:
  2553. return rc;
  2554. }
  2555. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2556. {
  2557. int rc = 0;
  2558. struct drm_panel_hdr_properties *hdr_prop;
  2559. struct dsi_parser_utils *utils = &panel->utils;
  2560. hdr_prop = &panel->hdr_props;
  2561. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2562. "qcom,mdss-dsi-panel-hdr-enabled");
  2563. if (hdr_prop->hdr_enabled) {
  2564. rc = utils->read_u32_array(utils->data,
  2565. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2566. hdr_prop->display_primaries,
  2567. DISPLAY_PRIMARIES_MAX);
  2568. if (rc) {
  2569. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2570. __func__, __LINE__, rc);
  2571. hdr_prop->hdr_enabled = false;
  2572. return rc;
  2573. }
  2574. rc = utils->read_u32(utils->data,
  2575. "qcom,mdss-dsi-panel-peak-brightness",
  2576. &(hdr_prop->peak_brightness));
  2577. if (rc) {
  2578. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2579. __func__, __LINE__, rc);
  2580. hdr_prop->hdr_enabled = false;
  2581. return rc;
  2582. }
  2583. rc = utils->read_u32(utils->data,
  2584. "qcom,mdss-dsi-panel-blackness-level",
  2585. &(hdr_prop->blackness_level));
  2586. if (rc) {
  2587. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2588. __func__, __LINE__, rc);
  2589. hdr_prop->hdr_enabled = false;
  2590. return rc;
  2591. }
  2592. }
  2593. return 0;
  2594. }
  2595. static int dsi_panel_parse_topology(
  2596. struct dsi_display_mode_priv_info *priv_info,
  2597. struct dsi_parser_utils *utils,
  2598. int topology_override)
  2599. {
  2600. struct msm_display_topology *topology;
  2601. u32 top_count, top_sel, *array = NULL;
  2602. int i, len = 0;
  2603. int rc = -EINVAL;
  2604. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2605. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2606. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2607. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2608. return rc;
  2609. }
  2610. top_count = len / TOPOLOGY_SET_LEN;
  2611. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2612. if (!array)
  2613. return -ENOMEM;
  2614. rc = utils->read_u32_array(utils->data,
  2615. "qcom,display-topology", array, len);
  2616. if (rc) {
  2617. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2618. goto read_fail;
  2619. }
  2620. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2621. if (!topology) {
  2622. rc = -ENOMEM;
  2623. goto read_fail;
  2624. }
  2625. for (i = 0; i < top_count; i++) {
  2626. struct msm_display_topology *top = &topology[i];
  2627. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2628. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2629. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2630. }
  2631. if (topology_override >= 0 && topology_override < top_count) {
  2632. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2633. topology_override,
  2634. topology[topology_override].num_lm,
  2635. topology[topology_override].num_enc,
  2636. topology[topology_override].num_intf);
  2637. top_sel = topology_override;
  2638. goto parse_done;
  2639. }
  2640. rc = utils->read_u32(utils->data,
  2641. "qcom,default-topology-index", &top_sel);
  2642. if (rc) {
  2643. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2644. goto parse_fail;
  2645. }
  2646. if (top_sel >= top_count) {
  2647. rc = -EINVAL;
  2648. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2649. rc);
  2650. goto parse_fail;
  2651. }
  2652. if (!(priv_info->dsc_enabled || priv_info->vdc_enabled) !=
  2653. !topology[top_sel].num_enc) {
  2654. DSI_ERR("topology and compression info mismatch dsc:%d vdc:%d num_enc:%d\n",
  2655. priv_info->dsc_enabled, priv_info->vdc_enabled,
  2656. topology[top_sel].num_enc);
  2657. goto parse_fail;
  2658. }
  2659. if (priv_info->dsc_enabled)
  2660. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_DSC;
  2661. else if (priv_info->vdc_enabled)
  2662. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_VDC;
  2663. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2664. topology[top_sel].num_lm,
  2665. topology[top_sel].num_enc,
  2666. topology[top_sel].num_intf);
  2667. parse_done:
  2668. memcpy(&priv_info->topology, &topology[top_sel],
  2669. sizeof(struct msm_display_topology));
  2670. parse_fail:
  2671. kfree(topology);
  2672. read_fail:
  2673. kfree(array);
  2674. return rc;
  2675. }
  2676. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2677. struct msm_roi_alignment *align)
  2678. {
  2679. int len = 0, rc = 0;
  2680. u32 value[6];
  2681. struct property *data;
  2682. if (!align)
  2683. return -EINVAL;
  2684. memset(align, 0, sizeof(*align));
  2685. data = utils->find_property(utils->data,
  2686. "qcom,panel-roi-alignment", &len);
  2687. len /= sizeof(u32);
  2688. if (!data) {
  2689. DSI_ERR("panel roi alignment not found\n");
  2690. rc = -EINVAL;
  2691. } else if (len != 6) {
  2692. DSI_ERR("incorrect roi alignment len %d\n", len);
  2693. rc = -EINVAL;
  2694. } else {
  2695. rc = utils->read_u32_array(utils->data,
  2696. "qcom,panel-roi-alignment", value, len);
  2697. if (rc)
  2698. DSI_DEBUG("error reading panel roi alignment values\n");
  2699. else {
  2700. align->xstart_pix_align = value[0];
  2701. align->ystart_pix_align = value[1];
  2702. align->width_pix_align = value[2];
  2703. align->height_pix_align = value[3];
  2704. align->min_width = value[4];
  2705. align->min_height = value[5];
  2706. }
  2707. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2708. align->xstart_pix_align,
  2709. align->width_pix_align,
  2710. align->ystart_pix_align,
  2711. align->height_pix_align,
  2712. align->min_width,
  2713. align->min_height);
  2714. }
  2715. return rc;
  2716. }
  2717. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2718. struct dsi_parser_utils *utils)
  2719. {
  2720. struct msm_roi_caps *roi_caps = NULL;
  2721. const char *data;
  2722. int rc = 0;
  2723. if (!mode || !mode->priv_info) {
  2724. DSI_ERR("invalid arguments\n");
  2725. return -EINVAL;
  2726. }
  2727. roi_caps = &mode->priv_info->roi_caps;
  2728. memset(roi_caps, 0, sizeof(*roi_caps));
  2729. data = utils->get_property(utils->data,
  2730. "qcom,partial-update-enabled", NULL);
  2731. if (data) {
  2732. if (!strcmp(data, "dual_roi"))
  2733. roi_caps->num_roi = 2;
  2734. else if (!strcmp(data, "single_roi"))
  2735. roi_caps->num_roi = 1;
  2736. else {
  2737. DSI_INFO(
  2738. "invalid value for qcom,partial-update-enabled: %s\n",
  2739. data);
  2740. return 0;
  2741. }
  2742. } else {
  2743. DSI_DEBUG("partial update disabled as the property is not set\n");
  2744. return 0;
  2745. }
  2746. roi_caps->merge_rois = utils->read_bool(utils->data,
  2747. "qcom,partial-update-roi-merge");
  2748. roi_caps->enabled = roi_caps->num_roi > 0;
  2749. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2750. roi_caps->enabled);
  2751. if (roi_caps->enabled)
  2752. rc = dsi_panel_parse_roi_alignment(utils,
  2753. &roi_caps->align);
  2754. if (rc)
  2755. memset(roi_caps, 0, sizeof(*roi_caps));
  2756. return rc;
  2757. }
  2758. static bool dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2759. struct dsi_parser_utils *utils)
  2760. {
  2761. if (!mode || !mode->priv_info) {
  2762. DSI_ERR("invalid arguments\n");
  2763. return false;
  2764. }
  2765. if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
  2766. mode->panel_mode_caps |= DSI_OP_VIDEO_MODE;
  2767. if (utils->read_bool(utils->data, "qcom,mdss-dsi-cmd-mode"))
  2768. mode->panel_mode_caps |= DSI_OP_CMD_MODE;
  2769. if (!mode->panel_mode_caps)
  2770. return false;
  2771. return true;
  2772. };
  2773. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2774. {
  2775. int dms_enabled;
  2776. const char *data;
  2777. struct dsi_parser_utils *utils = &panel->utils;
  2778. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2779. dms_enabled = utils->read_bool(utils->data,
  2780. "qcom,dynamic-mode-switch-enabled");
  2781. if (!dms_enabled)
  2782. return 0;
  2783. data = utils->get_property(utils->data,
  2784. "qcom,dynamic-mode-switch-type", NULL);
  2785. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2786. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2787. } else {
  2788. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2789. panel->name, data);
  2790. return -EINVAL;
  2791. }
  2792. return 0;
  2793. };
  2794. /*
  2795. * The length of all the valid values to be checked should not be greater
  2796. * than the length of returned data from read command.
  2797. */
  2798. static bool
  2799. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2800. {
  2801. int i;
  2802. struct drm_panel_esd_config *config = &panel->esd_config;
  2803. for (i = 0; i < count; ++i) {
  2804. if (config->status_valid_params[i] >
  2805. config->status_cmds_rlen[i]) {
  2806. DSI_DEBUG("ignore valid params\n");
  2807. return false;
  2808. }
  2809. }
  2810. return true;
  2811. }
  2812. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2813. char *prop_key, u32 **target, u32 cmd_cnt)
  2814. {
  2815. int tmp;
  2816. if (!utils->find_property(utils->data, prop_key, &tmp))
  2817. return false;
  2818. tmp /= sizeof(u32);
  2819. if (tmp != cmd_cnt) {
  2820. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2821. tmp, cmd_cnt);
  2822. return false;
  2823. }
  2824. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2825. if (IS_ERR_OR_NULL(*target)) {
  2826. DSI_ERR("Error allocating memory for property\n");
  2827. return false;
  2828. }
  2829. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2830. DSI_ERR("cannot get values from dts\n");
  2831. kfree(*target);
  2832. *target = NULL;
  2833. return false;
  2834. }
  2835. return true;
  2836. }
  2837. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2838. {
  2839. kfree(esd_config->status_buf);
  2840. kfree(esd_config->return_buf);
  2841. kfree(esd_config->status_value);
  2842. kfree(esd_config->status_valid_params);
  2843. kfree(esd_config->status_cmds_rlen);
  2844. kfree(esd_config->status_cmd.cmds);
  2845. }
  2846. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2847. {
  2848. struct drm_panel_esd_config *esd_config;
  2849. int rc = 0;
  2850. u32 tmp;
  2851. u32 i, status_len, *lenp;
  2852. struct property *data;
  2853. struct dsi_parser_utils *utils = &panel->utils;
  2854. if (!panel) {
  2855. DSI_ERR("Invalid Params\n");
  2856. return -EINVAL;
  2857. }
  2858. esd_config = &panel->esd_config;
  2859. if (!esd_config)
  2860. return -EINVAL;
  2861. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2862. DSI_CMD_SET_PANEL_STATUS, utils);
  2863. if (!esd_config->status_cmd.count) {
  2864. DSI_ERR("panel status command parsing failed\n");
  2865. rc = -EINVAL;
  2866. goto error;
  2867. }
  2868. if (!dsi_panel_parse_esd_status_len(utils,
  2869. "qcom,mdss-dsi-panel-status-read-length",
  2870. &panel->esd_config.status_cmds_rlen,
  2871. esd_config->status_cmd.count)) {
  2872. DSI_ERR("Invalid status read length\n");
  2873. rc = -EINVAL;
  2874. goto error1;
  2875. }
  2876. if (dsi_panel_parse_esd_status_len(utils,
  2877. "qcom,mdss-dsi-panel-status-valid-params",
  2878. &panel->esd_config.status_valid_params,
  2879. esd_config->status_cmd.count)) {
  2880. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2881. esd_config->status_cmd.count)) {
  2882. rc = -EINVAL;
  2883. goto error2;
  2884. }
  2885. }
  2886. status_len = 0;
  2887. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2888. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2889. status_len += lenp[i];
  2890. if (!status_len) {
  2891. rc = -EINVAL;
  2892. goto error2;
  2893. }
  2894. /*
  2895. * Some panel may need multiple read commands to properly
  2896. * check panel status. Do a sanity check for proper status
  2897. * value which will be compared with the value read by dsi
  2898. * controller during ESD check. Also check if multiple read
  2899. * commands are there then, there should be corresponding
  2900. * status check values for each read command.
  2901. */
  2902. data = utils->find_property(utils->data,
  2903. "qcom,mdss-dsi-panel-status-value", &tmp);
  2904. tmp /= sizeof(u32);
  2905. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2906. esd_config->groups = tmp / status_len;
  2907. } else {
  2908. DSI_ERR("error parse panel-status-value\n");
  2909. rc = -EINVAL;
  2910. goto error2;
  2911. }
  2912. esd_config->status_value =
  2913. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2914. GFP_KERNEL);
  2915. if (!esd_config->status_value) {
  2916. rc = -ENOMEM;
  2917. goto error2;
  2918. }
  2919. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2920. sizeof(unsigned char), GFP_KERNEL);
  2921. if (!esd_config->return_buf) {
  2922. rc = -ENOMEM;
  2923. goto error3;
  2924. }
  2925. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2926. if (!esd_config->status_buf) {
  2927. rc = -ENOMEM;
  2928. goto error4;
  2929. }
  2930. rc = utils->read_u32_array(utils->data,
  2931. "qcom,mdss-dsi-panel-status-value",
  2932. esd_config->status_value, esd_config->groups * status_len);
  2933. if (rc) {
  2934. DSI_DEBUG("error reading panel status values\n");
  2935. memset(esd_config->status_value, 0,
  2936. esd_config->groups * status_len);
  2937. }
  2938. return 0;
  2939. error4:
  2940. kfree(esd_config->return_buf);
  2941. error3:
  2942. kfree(esd_config->status_value);
  2943. error2:
  2944. kfree(esd_config->status_valid_params);
  2945. kfree(esd_config->status_cmds_rlen);
  2946. error1:
  2947. kfree(esd_config->status_cmd.cmds);
  2948. error:
  2949. return rc;
  2950. }
  2951. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2952. {
  2953. int rc = 0;
  2954. const char *string;
  2955. struct drm_panel_esd_config *esd_config;
  2956. struct dsi_parser_utils *utils = &panel->utils;
  2957. u8 *esd_mode = NULL;
  2958. esd_config = &panel->esd_config;
  2959. esd_config->status_mode = ESD_MODE_MAX;
  2960. esd_config->esd_enabled = utils->read_bool(utils->data,
  2961. "qcom,esd-check-enabled");
  2962. if (!esd_config->esd_enabled)
  2963. return 0;
  2964. rc = utils->read_string(utils->data,
  2965. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2966. if (!rc) {
  2967. if (!strcmp(string, "bta_check")) {
  2968. esd_config->status_mode = ESD_MODE_SW_BTA;
  2969. } else if (!strcmp(string, "reg_read")) {
  2970. esd_config->status_mode = ESD_MODE_REG_READ;
  2971. } else if (!strcmp(string, "te_signal_check")) {
  2972. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2973. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2974. } else {
  2975. DSI_ERR("TE-ESD not valid for video mode\n");
  2976. rc = -EINVAL;
  2977. goto error;
  2978. }
  2979. } else {
  2980. DSI_ERR("No valid panel-status-check-mode string\n");
  2981. rc = -EINVAL;
  2982. goto error;
  2983. }
  2984. } else {
  2985. DSI_DEBUG("status check method not defined!\n");
  2986. rc = -EINVAL;
  2987. goto error;
  2988. }
  2989. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2990. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2991. if (rc) {
  2992. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2993. rc);
  2994. goto error;
  2995. }
  2996. esd_mode = "register_read";
  2997. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2998. esd_mode = "bta_trigger";
  2999. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  3000. esd_mode = "te_check";
  3001. }
  3002. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  3003. return 0;
  3004. error:
  3005. panel->esd_config.esd_enabled = false;
  3006. return rc;
  3007. }
  3008. static void dsi_panel_update_util(struct dsi_panel *panel,
  3009. struct device_node *parser_node)
  3010. {
  3011. struct dsi_parser_utils *utils = &panel->utils;
  3012. if (parser_node) {
  3013. *utils = *dsi_parser_get_parser_utils();
  3014. utils->data = parser_node;
  3015. DSI_DEBUG("switching to parser APIs\n");
  3016. goto end;
  3017. }
  3018. *utils = *dsi_parser_get_of_utils();
  3019. utils->data = panel->panel_of_node;
  3020. end:
  3021. utils->node = panel->panel_of_node;
  3022. }
  3023. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  3024. {
  3025. return 0;
  3026. }
  3027. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  3028. {
  3029. if (trusted_vm_env) {
  3030. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  3031. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  3032. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  3033. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  3034. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  3035. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  3036. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  3037. panel->panel_ops.parse_power_cfg = dsi_panel_vm_stub;
  3038. panel->panel_ops.trigger_esd_attack = dsi_panel_vm_trigger_esd_attack;
  3039. } else {
  3040. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  3041. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  3042. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  3043. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  3044. panel->panel_ops.bl_register = dsi_panel_bl_register;
  3045. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  3046. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  3047. panel->panel_ops.parse_power_cfg = dsi_panel_parse_power_cfg;
  3048. panel->panel_ops.trigger_esd_attack = dsi_panel_trigger_esd_attack;
  3049. }
  3050. }
  3051. struct dsi_panel *dsi_panel_get(struct device *parent,
  3052. struct device_node *of_node,
  3053. struct device_node *parser_node,
  3054. const char *type,
  3055. int topology_override,
  3056. bool trusted_vm_env)
  3057. {
  3058. struct dsi_panel *panel;
  3059. struct dsi_parser_utils *utils;
  3060. const char *panel_physical_type;
  3061. int rc = 0;
  3062. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  3063. if (!panel)
  3064. return ERR_PTR(-ENOMEM);
  3065. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  3066. panel->panel_of_node = of_node;
  3067. panel->parent = parent;
  3068. panel->type = type;
  3069. dsi_panel_update_util(panel, parser_node);
  3070. utils = &panel->utils;
  3071. panel->name = utils->get_property(utils->data,
  3072. "qcom,mdss-dsi-panel-name", NULL);
  3073. if (!panel->name)
  3074. panel->name = DSI_PANEL_DEFAULT_LABEL;
  3075. /*
  3076. * Set panel type to LCD as default.
  3077. */
  3078. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  3079. panel_physical_type = utils->get_property(utils->data,
  3080. "qcom,mdss-dsi-panel-physical-type", NULL);
  3081. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  3082. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  3083. rc = dsi_panel_parse_host_config(panel);
  3084. if (rc) {
  3085. DSI_ERR("failed to parse host configuration, rc=%d\n",
  3086. rc);
  3087. goto error;
  3088. }
  3089. rc = dsi_panel_parse_panel_mode(panel);
  3090. if (rc) {
  3091. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  3092. rc);
  3093. goto error;
  3094. }
  3095. rc = dsi_panel_parse_dfps_caps(panel);
  3096. if (rc)
  3097. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  3098. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  3099. if (rc)
  3100. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  3101. rc = dsi_panel_parse_avr_caps(panel, of_node);
  3102. if (rc)
  3103. DSI_ERR("failed to parse AVR features, rc=%d\n", rc);
  3104. rc = dsi_panel_parse_dyn_clk_caps(panel);
  3105. if (rc)
  3106. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  3107. rc = dsi_panel_parse_phy_props(panel);
  3108. if (rc) {
  3109. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  3110. rc);
  3111. goto error;
  3112. }
  3113. rc = panel->panel_ops.parse_gpios(panel);
  3114. if (rc) {
  3115. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  3116. goto error;
  3117. }
  3118. rc = panel->panel_ops.parse_power_cfg(panel);
  3119. if (rc)
  3120. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  3121. rc = dsi_panel_parse_bl_config(panel);
  3122. if (rc) {
  3123. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  3124. if (rc == -EPROBE_DEFER)
  3125. goto error;
  3126. }
  3127. rc = dsi_panel_parse_misc_features(panel);
  3128. if (rc)
  3129. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  3130. rc = dsi_panel_parse_hdr_config(panel);
  3131. if (rc)
  3132. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  3133. rc = dsi_panel_get_mode_count(panel);
  3134. if (rc) {
  3135. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  3136. goto error;
  3137. }
  3138. rc = dsi_panel_parse_dms_info(panel);
  3139. if (rc)
  3140. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  3141. rc = dsi_panel_parse_esd_config(panel);
  3142. if (rc)
  3143. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  3144. rc = dsi_panel_vreg_get(panel);
  3145. if (rc) {
  3146. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  3147. panel->name, rc);
  3148. goto error;
  3149. }
  3150. panel->power_mode = SDE_MODE_DPMS_OFF;
  3151. drm_panel_init(&panel->drm_panel, &panel->mipi_device.dev,
  3152. NULL, DRM_MODE_CONNECTOR_DSI);
  3153. panel->mipi_device.dev.of_node = of_node;
  3154. drm_panel_add(&panel->drm_panel);
  3155. mutex_init(&panel->panel_lock);
  3156. return panel;
  3157. error:
  3158. kfree(panel);
  3159. return ERR_PTR(rc);
  3160. }
  3161. void dsi_panel_put(struct dsi_panel *panel)
  3162. {
  3163. drm_panel_remove(&panel->drm_panel);
  3164. /* free resources allocated for ESD check */
  3165. dsi_panel_esd_config_deinit(&panel->esd_config);
  3166. kfree(panel->avr_caps.avr_step_fps_list);
  3167. kfree(panel);
  3168. }
  3169. int dsi_panel_drv_init(struct dsi_panel *panel,
  3170. struct mipi_dsi_host *host)
  3171. {
  3172. int rc = 0;
  3173. struct mipi_dsi_device *dev;
  3174. if (!panel || !host) {
  3175. DSI_ERR("invalid params\n");
  3176. return -EINVAL;
  3177. }
  3178. mutex_lock(&panel->panel_lock);
  3179. dev = &panel->mipi_device;
  3180. dev->host = host;
  3181. /*
  3182. * We dont have device structure since panel is not a device node.
  3183. * When using drm panel framework, the device is probed when the host is
  3184. * create.
  3185. */
  3186. dev->channel = 0;
  3187. dev->lanes = 4;
  3188. panel->host = host;
  3189. rc = panel->panel_ops.pinctrl_init(panel);
  3190. if (rc) {
  3191. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  3192. panel->name, rc);
  3193. goto exit;
  3194. }
  3195. rc = panel->panel_ops.gpio_request(panel);
  3196. if (rc) {
  3197. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  3198. rc);
  3199. goto error_pinctrl_deinit;
  3200. }
  3201. rc = panel->panel_ops.bl_register(panel);
  3202. if (rc) {
  3203. if (rc != -EPROBE_DEFER)
  3204. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  3205. panel->name, rc);
  3206. goto error_gpio_release;
  3207. }
  3208. goto exit;
  3209. error_gpio_release:
  3210. (void)dsi_panel_gpio_release(panel);
  3211. error_pinctrl_deinit:
  3212. (void)dsi_panel_pinctrl_deinit(panel);
  3213. exit:
  3214. mutex_unlock(&panel->panel_lock);
  3215. return rc;
  3216. }
  3217. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  3218. {
  3219. int rc = 0;
  3220. if (!panel) {
  3221. DSI_ERR("invalid params\n");
  3222. return -EINVAL;
  3223. }
  3224. mutex_lock(&panel->panel_lock);
  3225. rc = panel->panel_ops.bl_unregister(panel);
  3226. if (rc)
  3227. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  3228. panel->name, rc);
  3229. rc = panel->panel_ops.gpio_release(panel);
  3230. if (rc)
  3231. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  3232. rc);
  3233. rc = panel->panel_ops.pinctrl_deinit(panel);
  3234. if (rc)
  3235. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  3236. rc);
  3237. rc = dsi_panel_vreg_put(panel);
  3238. if (rc)
  3239. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  3240. panel->host = NULL;
  3241. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  3242. mutex_unlock(&panel->panel_lock);
  3243. return rc;
  3244. }
  3245. int dsi_panel_validate_mode(struct dsi_panel *panel,
  3246. struct dsi_display_mode *mode)
  3247. {
  3248. return 0;
  3249. }
  3250. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  3251. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  3252. {
  3253. const char *compression;
  3254. u32 *array = NULL, top_count, len, i;
  3255. int rc = -EINVAL;
  3256. bool dsc_enable = false;
  3257. *dsc_count = 0;
  3258. *lm_count = 0;
  3259. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  3260. if (compression && !strcmp(compression, "dsc"))
  3261. dsc_enable = true;
  3262. len = utils->count_u32_elems(node, "qcom,display-topology");
  3263. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  3264. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  3265. return rc;
  3266. top_count = len / TOPOLOGY_SET_LEN;
  3267. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  3268. if (!array)
  3269. return -ENOMEM;
  3270. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  3271. if (rc) {
  3272. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  3273. goto read_fail;
  3274. }
  3275. for (i = 0; i < top_count; i++) {
  3276. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  3277. if (dsc_enable)
  3278. *dsc_count = max(*dsc_count,
  3279. array[i * TOPOLOGY_SET_LEN + 1]);
  3280. }
  3281. read_fail:
  3282. kfree(array);
  3283. return 0;
  3284. }
  3285. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  3286. {
  3287. const u32 SINGLE_MODE_SUPPORT = 1;
  3288. struct dsi_parser_utils *utils;
  3289. struct device_node *timings_np, *child_np;
  3290. int num_dfps_rates;
  3291. int num_video_modes = 0, num_cmd_modes = 0;
  3292. int count, rc = 0;
  3293. u32 dsc_count = 0, lm_count = 0;
  3294. if (!panel) {
  3295. DSI_ERR("invalid params\n");
  3296. return -EINVAL;
  3297. }
  3298. utils = &panel->utils;
  3299. panel->num_timing_nodes = 0;
  3300. timings_np = utils->get_child_by_name(utils->data,
  3301. "qcom,mdss-dsi-display-timings");
  3302. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  3303. DSI_ERR("no display timing nodes defined\n");
  3304. rc = -EINVAL;
  3305. goto error;
  3306. }
  3307. count = utils->get_child_count(timings_np);
  3308. if ((!count && !panel->host_config.ext_bridge_mode) ||
  3309. count > DSI_MODE_MAX) {
  3310. DSI_ERR("invalid count of timing nodes: %d\n", count);
  3311. rc = -EINVAL;
  3312. goto error;
  3313. }
  3314. /* No multiresolution support is available for video mode panels.
  3315. * Multi-mode is supported for video mode during POMS is enabled.
  3316. */
  3317. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3318. !panel->host_config.ext_bridge_mode &&
  3319. !panel->panel_mode_switch_enabled)
  3320. count = SINGLE_MODE_SUPPORT;
  3321. panel->num_timing_nodes = count;
  3322. dsi_for_each_child_node(timings_np, child_np) {
  3323. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3324. num_video_modes++;
  3325. else if (utils->read_bool(child_np,
  3326. "qcom,mdss-dsi-cmd-mode"))
  3327. num_cmd_modes++;
  3328. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3329. num_video_modes++;
  3330. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3331. num_cmd_modes++;
  3332. dsi_panel_get_max_res_count(utils, child_np,
  3333. &dsc_count, &lm_count);
  3334. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3335. panel->lm_count = max(lm_count, panel->lm_count);
  3336. }
  3337. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3338. panel->dfps_caps.dfps_list_len;
  3339. /*
  3340. * Inflate num_of_modes by fps in dfps.
  3341. * Single command mode for video mode panels supporting
  3342. * panel operating mode switch.
  3343. */
  3344. num_video_modes = num_video_modes * num_dfps_rates;
  3345. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  3346. (panel->panel_mode_switch_enabled))
  3347. num_cmd_modes = 1;
  3348. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3349. error:
  3350. return rc;
  3351. }
  3352. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3353. struct dsi_panel_phy_props *phy_props)
  3354. {
  3355. int rc = 0;
  3356. if (!panel || !phy_props) {
  3357. DSI_ERR("invalid params\n");
  3358. return -EINVAL;
  3359. }
  3360. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3361. return rc;
  3362. }
  3363. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3364. struct dsi_dfps_capabilities *dfps_caps)
  3365. {
  3366. int rc = 0;
  3367. if (!panel || !dfps_caps) {
  3368. DSI_ERR("invalid params\n");
  3369. return -EINVAL;
  3370. }
  3371. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3372. return rc;
  3373. }
  3374. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3375. {
  3376. int i;
  3377. if (!mode->priv_info)
  3378. return;
  3379. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3380. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3381. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3382. }
  3383. kfree(mode->priv_info);
  3384. }
  3385. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3386. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3387. {
  3388. u32 frame_time_us, nslices;
  3389. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3390. dsi_transfer_time_us, pixel_clk_khz;
  3391. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3392. struct dsi_mode_info *timing = &mode->timing;
  3393. struct dsi_display_mode *display_mode;
  3394. u32 jitter_numer, jitter_denom, prefill_lines;
  3395. u32 default_prefill_lines, actual_prefill_lines, vtotal;
  3396. u32 min_threshold_us, prefill_time_us, max_transfer_us, packet_overhead;
  3397. u32 bits_per_symbol = 16, num_of_symbols = 7; /* For Cphy */
  3398. u16 bpp;
  3399. /* Packet overhead in bits,
  3400. * DPHY: 4 bytes header + 2 bytes checksum + 1 byte dcs data command.
  3401. * CPHY: 8 bytes header + 4 bytes checksum + 2 bytes SYNC +
  3402. * 1 byte dcs data command.
  3403. */
  3404. if (config->phy_type & DSI_PHY_TYPE_CPHY)
  3405. packet_overhead = 120;
  3406. else
  3407. packet_overhead = 56;
  3408. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3409. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3410. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3411. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3412. if (timing->refresh_rate >= 120)
  3413. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3414. if (timing->dsc_enabled) {
  3415. nslices = (timing->h_active)/(dsc->config.slice_width);
  3416. /* (slice width x bit-per-pixel + packet overhead) x
  3417. * number of slices x height x fps / lane
  3418. */
  3419. bpp = DSC_BPP(dsc->config);
  3420. bits_per_line = ((dsc->config.slice_width * bpp) +
  3421. packet_overhead) * nslices;
  3422. bits_per_line = bits_per_line / (config->num_data_lanes);
  3423. min_bitclk_hz = (bits_per_line * timing->v_active *
  3424. timing->refresh_rate);
  3425. } else {
  3426. total_active_pixels = ((dsi_h_active_dce(timing)
  3427. * timing->v_active));
  3428. /* calculate the actual bitclk needed to transfer the frame */
  3429. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3430. (config->bpp));
  3431. do_div(min_bitclk_hz, config->num_data_lanes);
  3432. }
  3433. timing->min_dsi_clk_hz = min_bitclk_hz;
  3434. if (config->phy_type == DSI_PHY_TYPE_CPHY) {
  3435. do_div(timing->min_dsi_clk_hz, bits_per_symbol);
  3436. timing->min_dsi_clk_hz *= num_of_symbols;
  3437. }
  3438. /*
  3439. * Apart from prefill line time, we need to take into account RSCC mode threshold time. In
  3440. * cases where RSC is disabled, as jitter is no longer considered we need to make sure we
  3441. * have enough time for DCS command transfer. As of now, the RSC threshold time and DCS
  3442. * threshold time are configured to 40us.
  3443. */
  3444. if (mode->priv_info->disable_rsc_solver) {
  3445. min_threshold_us = DCS_COMMAND_THRESHOLD_TIME_US;
  3446. } else {
  3447. min_threshold_us = mult_frac(frame_time_us, jitter_numer, (jitter_denom * 100));
  3448. min_threshold_us += RSCC_MODE_THRESHOLD_TIME_US;
  3449. }
  3450. /*
  3451. * Increase the prefill_lines proportionately as recommended
  3452. * 40lines for 60fps, 60 for 90fps, 120lines for 120fps, and so on.
  3453. */
  3454. default_prefill_lines = mult_frac(MIN_PREFILL_LINES, timing->refresh_rate, 60);
  3455. actual_prefill_lines = timing->v_back_porch + timing->v_front_porch + timing->v_sync_width;
  3456. vtotal = actual_prefill_lines + timing->v_active;
  3457. /* consider the max of default prefill lines and actual prefill lines */
  3458. prefill_lines = max(actual_prefill_lines, default_prefill_lines);
  3459. prefill_time_us = mult_frac(frame_time_us, prefill_lines, vtotal);
  3460. min_threshold_us = min_threshold_us + prefill_time_us;
  3461. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3462. if (timing->clk_rate_hz) {
  3463. /* adjust the transfer time proportionately for bit clk*/
  3464. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3465. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3466. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3467. } else if (mode->priv_info->mdp_transfer_time_us) {
  3468. max_transfer_us = frame_time_us - min_threshold_us;
  3469. mode->priv_info->mdp_transfer_time_us = min(
  3470. mode->priv_info->mdp_transfer_time_us,
  3471. max_transfer_us);
  3472. timing->dsi_transfer_time_us =
  3473. mode->priv_info->mdp_transfer_time_us;
  3474. } else {
  3475. if ((min_threshold_us > frame_threshold_us) ||
  3476. (mode->priv_info->disable_rsc_solver))
  3477. frame_threshold_us = min_threshold_us;
  3478. timing->dsi_transfer_time_us = frame_time_us -
  3479. frame_threshold_us;
  3480. }
  3481. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3482. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3483. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3484. timing->mdp_transfer_time_us =
  3485. mode->priv_info->mdp_transfer_time_us;
  3486. }
  3487. /* Calculate pclk_khz to update modeinfo */
  3488. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3489. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3490. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3491. do_div(pixel_clk_khz, config->bpp);
  3492. display_mode->pixel_clk_khz = pixel_clk_khz;
  3493. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3494. }
  3495. int dsi_panel_get_mode(struct dsi_panel *panel,
  3496. u32 index, struct dsi_display_mode *mode,
  3497. int topology_override)
  3498. {
  3499. struct device_node *timings_np, *child_np;
  3500. struct dsi_parser_utils *utils;
  3501. struct dsi_display_mode_priv_info *prv_info;
  3502. u32 child_idx = 0;
  3503. int rc = 0, num_timings;
  3504. int traffic_mode;
  3505. void *utils_data = NULL;
  3506. if (!panel || !mode) {
  3507. DSI_ERR("invalid params\n");
  3508. return -EINVAL;
  3509. }
  3510. mutex_lock(&panel->panel_lock);
  3511. utils = &panel->utils;
  3512. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3513. if (!mode->priv_info) {
  3514. rc = -ENOMEM;
  3515. goto done;
  3516. }
  3517. prv_info = mode->priv_info;
  3518. timings_np = utils->get_child_by_name(utils->data,
  3519. "qcom,mdss-dsi-display-timings");
  3520. if (!timings_np) {
  3521. DSI_ERR("no display timing nodes defined\n");
  3522. rc = -EINVAL;
  3523. goto parse_fail;
  3524. }
  3525. num_timings = utils->get_child_count(timings_np);
  3526. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3527. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3528. rc = -EINVAL;
  3529. goto parse_fail;
  3530. }
  3531. utils_data = utils->data;
  3532. traffic_mode = panel->video_config.traffic_mode;
  3533. dsi_for_each_child_node(timings_np, child_np) {
  3534. if (index != child_idx++)
  3535. continue;
  3536. utils->data = child_np;
  3537. if (panel->panel_mode_switch_enabled) {
  3538. if (!dsi_panel_parse_panel_mode_caps(mode, utils)) {
  3539. mode->panel_mode_caps = panel->panel_mode;
  3540. DSI_INFO("panel mode isn't specified in timing[%d]\n",
  3541. child_idx);
  3542. }
  3543. } else {
  3544. mode->panel_mode_caps = panel->panel_mode;
  3545. }
  3546. rc = utils->read_u32(utils->data, "cell-index", &mode->mode_idx);
  3547. if (rc)
  3548. mode->mode_idx = index;
  3549. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3550. if (rc) {
  3551. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3552. goto parse_fail;
  3553. }
  3554. if (panel->dyn_clk_caps.dyn_clk_support) {
  3555. rc = dsi_panel_parse_dyn_clk_list(mode, utils);
  3556. if (rc)
  3557. DSI_ERR("failed to parse dynamic clk rates, rc=%d\n", rc);
  3558. }
  3559. rc = dsi_panel_parse_dsc_params(mode, utils);
  3560. if (rc) {
  3561. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3562. goto parse_fail;
  3563. }
  3564. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode);
  3565. if (rc) {
  3566. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3567. goto parse_fail;
  3568. }
  3569. rc = dsi_panel_parse_topology(prv_info, utils,
  3570. topology_override);
  3571. if (rc) {
  3572. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3573. goto parse_fail;
  3574. }
  3575. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3576. if (rc) {
  3577. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3578. goto parse_fail;
  3579. }
  3580. rc = dsi_panel_parse_jitter_config(mode, utils);
  3581. if (rc)
  3582. DSI_ERR(
  3583. "failed to parse panel jitter config, rc=%d\n", rc);
  3584. rc = dsi_panel_parse_phy_timing(mode, utils);
  3585. if (rc) {
  3586. DSI_ERR(
  3587. "failed to parse panel phy timings, rc=%d\n", rc);
  3588. goto parse_fail;
  3589. }
  3590. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3591. if (rc)
  3592. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3593. }
  3594. goto done;
  3595. parse_fail:
  3596. kfree(mode->priv_info);
  3597. mode->priv_info = NULL;
  3598. done:
  3599. utils->data = utils_data;
  3600. mutex_unlock(&panel->panel_lock);
  3601. return rc;
  3602. }
  3603. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3604. struct dsi_display_mode *mode,
  3605. struct dsi_host_config *config)
  3606. {
  3607. int rc = 0;
  3608. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3609. if (!panel || !mode || !config) {
  3610. DSI_ERR("invalid params\n");
  3611. return -EINVAL;
  3612. }
  3613. mutex_lock(&panel->panel_lock);
  3614. config->panel_mode = panel->panel_mode;
  3615. memcpy(&config->common_config, &panel->host_config,
  3616. sizeof(config->common_config));
  3617. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3618. memcpy(&config->u.video_engine, &panel->video_config,
  3619. sizeof(config->u.video_engine));
  3620. } else {
  3621. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3622. sizeof(config->u.cmd_engine));
  3623. }
  3624. memcpy(&config->video_timing, &mode->timing,
  3625. sizeof(config->video_timing));
  3626. config->video_timing.mdp_transfer_time_us =
  3627. mode->priv_info->mdp_transfer_time_us;
  3628. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3629. config->video_timing.dsc = &mode->priv_info->dsc;
  3630. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3631. config->video_timing.vdc = &mode->priv_info->vdc;
  3632. if (dyn_clk_caps->dyn_clk_support)
  3633. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3634. else
  3635. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3636. config->esc_clk_rate_hz = 19200000;
  3637. mutex_unlock(&panel->panel_lock);
  3638. return rc;
  3639. }
  3640. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3641. {
  3642. int rc = 0;
  3643. if (!panel) {
  3644. DSI_ERR("invalid params\n");
  3645. return -EINVAL;
  3646. }
  3647. mutex_lock(&panel->panel_lock);
  3648. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3649. if (panel->lp11_init)
  3650. goto error;
  3651. rc = dsi_panel_power_on(panel);
  3652. if (rc) {
  3653. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3654. goto error;
  3655. }
  3656. error:
  3657. mutex_unlock(&panel->panel_lock);
  3658. return rc;
  3659. }
  3660. int dsi_panel_update_pps(struct dsi_panel *panel)
  3661. {
  3662. int rc = 0;
  3663. struct dsi_panel_cmd_set *set = NULL;
  3664. struct dsi_display_mode_priv_info *priv_info = NULL;
  3665. if (!panel || !panel->cur_mode) {
  3666. DSI_ERR("invalid params\n");
  3667. return -EINVAL;
  3668. }
  3669. mutex_lock(&panel->panel_lock);
  3670. priv_info = panel->cur_mode->priv_info;
  3671. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3672. if (priv_info->dsc_enabled)
  3673. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3674. panel->dce_pps_cmd, 0,
  3675. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3676. else if (priv_info->vdc_enabled)
  3677. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3678. panel->dce_pps_cmd, 0,
  3679. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3680. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3681. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3682. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3683. if (rc) {
  3684. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3685. goto error;
  3686. }
  3687. }
  3688. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3689. if (rc) {
  3690. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3691. panel->name, rc);
  3692. }
  3693. dsi_panel_destroy_cmd_packets(set);
  3694. error:
  3695. mutex_unlock(&panel->panel_lock);
  3696. return rc;
  3697. }
  3698. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3699. {
  3700. int rc = 0;
  3701. if (!panel) {
  3702. DSI_ERR("invalid params\n");
  3703. return -EINVAL;
  3704. }
  3705. mutex_lock(&panel->panel_lock);
  3706. if (!panel->panel_initialized)
  3707. goto exit;
  3708. /*
  3709. * Consider LP1->LP2->LP1.
  3710. * If the panel is already in LP mode, do not need to
  3711. * set the regulator.
  3712. * IBB and AB power mode would be set at the same time
  3713. * in PMIC driver, so we only call ibb setting that is enough.
  3714. */
  3715. if (dsi_panel_is_type_oled(panel) &&
  3716. panel->power_mode != SDE_MODE_DPMS_LP2)
  3717. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3718. "ibb", REGULATOR_MODE_IDLE);
  3719. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3720. if (rc)
  3721. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3722. panel->name, rc);
  3723. exit:
  3724. mutex_unlock(&panel->panel_lock);
  3725. return rc;
  3726. }
  3727. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3728. {
  3729. int rc = 0;
  3730. if (!panel) {
  3731. DSI_ERR("invalid params\n");
  3732. return -EINVAL;
  3733. }
  3734. mutex_lock(&panel->panel_lock);
  3735. if (!panel->panel_initialized)
  3736. goto exit;
  3737. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3738. if (rc)
  3739. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3740. panel->name, rc);
  3741. exit:
  3742. mutex_unlock(&panel->panel_lock);
  3743. return rc;
  3744. }
  3745. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3746. {
  3747. int rc = 0;
  3748. if (!panel) {
  3749. DSI_ERR("invalid params\n");
  3750. return -EINVAL;
  3751. }
  3752. mutex_lock(&panel->panel_lock);
  3753. if (!panel->panel_initialized)
  3754. goto exit;
  3755. /*
  3756. * Consider about LP1->LP2->NOLP.
  3757. */
  3758. if (dsi_panel_is_type_oled(panel) &&
  3759. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3760. panel->power_mode == SDE_MODE_DPMS_LP2))
  3761. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3762. "ibb", REGULATOR_MODE_NORMAL);
  3763. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3764. if (rc)
  3765. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3766. panel->name, rc);
  3767. exit:
  3768. mutex_unlock(&panel->panel_lock);
  3769. return rc;
  3770. }
  3771. int dsi_panel_prepare(struct dsi_panel *panel)
  3772. {
  3773. int rc = 0;
  3774. if (!panel) {
  3775. DSI_ERR("invalid params\n");
  3776. return -EINVAL;
  3777. }
  3778. mutex_lock(&panel->panel_lock);
  3779. if (panel->lp11_init) {
  3780. rc = dsi_panel_power_on(panel);
  3781. if (rc) {
  3782. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3783. panel->name, rc);
  3784. goto error;
  3785. }
  3786. }
  3787. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3788. if (rc) {
  3789. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3790. panel->name, rc);
  3791. goto error;
  3792. }
  3793. error:
  3794. mutex_unlock(&panel->panel_lock);
  3795. return rc;
  3796. }
  3797. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3798. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3799. {
  3800. static const int ROI_CMD_LEN = 5;
  3801. int rc = 0;
  3802. /* DTYPE_DCS_LWRITE */
  3803. char *caset, *paset;
  3804. set->cmds = NULL;
  3805. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3806. if (!caset) {
  3807. rc = -ENOMEM;
  3808. goto exit;
  3809. }
  3810. caset[0] = 0x2a;
  3811. caset[1] = (roi->x & 0xFF00) >> 8;
  3812. caset[2] = roi->x & 0xFF;
  3813. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3814. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3815. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3816. if (!paset) {
  3817. rc = -ENOMEM;
  3818. goto error_free_mem;
  3819. }
  3820. paset[0] = 0x2b;
  3821. paset[1] = (roi->y & 0xFF00) >> 8;
  3822. paset[2] = roi->y & 0xFF;
  3823. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3824. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3825. set->type = DSI_CMD_SET_ROI;
  3826. set->state = DSI_CMD_SET_STATE_LP;
  3827. set->count = 2; /* send caset + paset together */
  3828. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3829. if (!set->cmds) {
  3830. rc = -ENOMEM;
  3831. goto error_free_mem;
  3832. }
  3833. set->cmds[0].msg.channel = 0;
  3834. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3835. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3836. set->cmds[0].msg.flags |= MIPI_DSI_MSG_BATCH_COMMAND;
  3837. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3838. set->cmds[0].msg.tx_buf = caset;
  3839. set->cmds[0].msg.rx_len = 0;
  3840. set->cmds[0].msg.rx_buf = 0;
  3841. set->cmds[0].last_command = 0;
  3842. set->cmds[0].post_wait_ms = 0;
  3843. set->cmds[0].ctrl = unicast ? ctrl_idx : 0;
  3844. set->cmds[1].msg.channel = 0;
  3845. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3846. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3847. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3848. set->cmds[1].msg.tx_buf = paset;
  3849. set->cmds[1].msg.rx_len = 0;
  3850. set->cmds[1].msg.rx_buf = 0;
  3851. set->cmds[1].last_command = 1;
  3852. set->cmds[1].post_wait_ms = 0;
  3853. set->cmds[1].ctrl = unicast ? ctrl_idx : 0;
  3854. goto exit;
  3855. error_free_mem:
  3856. kfree(caset);
  3857. kfree(paset);
  3858. kfree(set->cmds);
  3859. exit:
  3860. return rc;
  3861. }
  3862. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3863. int ctrl_idx)
  3864. {
  3865. int rc = 0;
  3866. if (!panel) {
  3867. DSI_ERR("invalid params\n");
  3868. return -EINVAL;
  3869. }
  3870. mutex_lock(&panel->panel_lock);
  3871. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3872. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3873. if (rc)
  3874. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3875. panel->name, rc);
  3876. mutex_unlock(&panel->panel_lock);
  3877. return rc;
  3878. }
  3879. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3880. int ctrl_idx)
  3881. {
  3882. int rc = 0;
  3883. if (!panel) {
  3884. DSI_ERR("invalid params\n");
  3885. return -EINVAL;
  3886. }
  3887. mutex_lock(&panel->panel_lock);
  3888. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3889. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3890. if (rc)
  3891. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3892. panel->name, rc);
  3893. mutex_unlock(&panel->panel_lock);
  3894. return rc;
  3895. }
  3896. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3897. struct dsi_rect *roi)
  3898. {
  3899. int rc = 0;
  3900. struct dsi_panel_cmd_set *set;
  3901. struct dsi_display_mode_priv_info *priv_info;
  3902. if (!panel || !panel->cur_mode) {
  3903. DSI_ERR("Invalid params\n");
  3904. return -EINVAL;
  3905. }
  3906. priv_info = panel->cur_mode->priv_info;
  3907. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3908. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3909. if (rc) {
  3910. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3911. panel->name, rc);
  3912. return rc;
  3913. }
  3914. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3915. roi->x, roi->y, roi->w, roi->h);
  3916. SDE_EVT32(roi->x, roi->y, roi->w, roi->h);
  3917. mutex_lock(&panel->panel_lock);
  3918. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3919. if (rc)
  3920. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3921. panel->name, rc);
  3922. mutex_unlock(&panel->panel_lock);
  3923. dsi_panel_destroy_cmd_packets(set);
  3924. dsi_panel_dealloc_cmd_packets(set);
  3925. return rc;
  3926. }
  3927. int dsi_panel_switch_cmd_mode_out(struct dsi_panel *panel)
  3928. {
  3929. int rc = 0;
  3930. if (!panel) {
  3931. DSI_ERR("Invalid params\n");
  3932. return -EINVAL;
  3933. }
  3934. mutex_lock(&panel->panel_lock);
  3935. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_OUT);
  3936. if (rc)
  3937. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_OUT cmds, rc=%d\n",
  3938. panel->name, rc);
  3939. mutex_unlock(&panel->panel_lock);
  3940. return rc;
  3941. }
  3942. int dsi_panel_switch_video_mode_out(struct dsi_panel *panel)
  3943. {
  3944. int rc = 0;
  3945. if (!panel) {
  3946. DSI_ERR("Invalid params\n");
  3947. return -EINVAL;
  3948. }
  3949. mutex_lock(&panel->panel_lock);
  3950. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_OUT);
  3951. if (rc)
  3952. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_OUT cmds, rc=%d\n",
  3953. panel->name, rc);
  3954. mutex_unlock(&panel->panel_lock);
  3955. return rc;
  3956. }
  3957. int dsi_panel_switch_video_mode_in(struct dsi_panel *panel)
  3958. {
  3959. int rc = 0;
  3960. if (!panel) {
  3961. DSI_ERR("Invalid params\n");
  3962. return -EINVAL;
  3963. }
  3964. mutex_lock(&panel->panel_lock);
  3965. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_IN);
  3966. if (rc)
  3967. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_IN cmds, rc=%d\n",
  3968. panel->name, rc);
  3969. mutex_unlock(&panel->panel_lock);
  3970. return rc;
  3971. }
  3972. int dsi_panel_switch_cmd_mode_in(struct dsi_panel *panel)
  3973. {
  3974. int rc = 0;
  3975. if (!panel) {
  3976. DSI_ERR("Invalid params\n");
  3977. return -EINVAL;
  3978. }
  3979. mutex_lock(&panel->panel_lock);
  3980. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_IN);
  3981. if (rc)
  3982. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_IN cmds, rc=%d\n",
  3983. panel->name, rc);
  3984. mutex_unlock(&panel->panel_lock);
  3985. return rc;
  3986. }
  3987. int dsi_panel_switch(struct dsi_panel *panel)
  3988. {
  3989. int rc = 0;
  3990. if (!panel) {
  3991. DSI_ERR("Invalid params\n");
  3992. return -EINVAL;
  3993. }
  3994. mutex_lock(&panel->panel_lock);
  3995. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3996. if (rc)
  3997. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3998. panel->name, rc);
  3999. mutex_unlock(&panel->panel_lock);
  4000. return rc;
  4001. }
  4002. int dsi_panel_post_switch(struct dsi_panel *panel)
  4003. {
  4004. int rc = 0;
  4005. if (!panel) {
  4006. DSI_ERR("Invalid params\n");
  4007. return -EINVAL;
  4008. }
  4009. mutex_lock(&panel->panel_lock);
  4010. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  4011. if (rc)
  4012. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  4013. panel->name, rc);
  4014. mutex_unlock(&panel->panel_lock);
  4015. return rc;
  4016. }
  4017. int dsi_panel_enable(struct dsi_panel *panel)
  4018. {
  4019. int rc = 0;
  4020. if (!panel) {
  4021. DSI_ERR("Invalid params\n");
  4022. return -EINVAL;
  4023. }
  4024. mutex_lock(&panel->panel_lock);
  4025. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  4026. if (rc) {
  4027. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  4028. panel->name, rc);
  4029. goto error;
  4030. }
  4031. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  4032. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_ON);
  4033. if (rc) {
  4034. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_ON cmds, rc=%d\n",
  4035. panel->name, rc);
  4036. goto error;
  4037. }
  4038. } else if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  4039. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_ON);
  4040. if (rc) {
  4041. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_ON cmds, rc=%d\n",
  4042. panel->name, rc);
  4043. goto error;
  4044. }
  4045. }
  4046. panel->panel_initialized = true;
  4047. error:
  4048. mutex_unlock(&panel->panel_lock);
  4049. return rc;
  4050. }
  4051. int dsi_panel_post_enable(struct dsi_panel *panel)
  4052. {
  4053. int rc = 0;
  4054. if (!panel) {
  4055. DSI_ERR("invalid params\n");
  4056. return -EINVAL;
  4057. }
  4058. mutex_lock(&panel->panel_lock);
  4059. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  4060. if (rc) {
  4061. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  4062. panel->name, rc);
  4063. goto error;
  4064. }
  4065. error:
  4066. mutex_unlock(&panel->panel_lock);
  4067. return rc;
  4068. }
  4069. int dsi_panel_pre_disable(struct dsi_panel *panel)
  4070. {
  4071. int rc = 0;
  4072. if (!panel) {
  4073. DSI_ERR("invalid params\n");
  4074. return -EINVAL;
  4075. }
  4076. mutex_lock(&panel->panel_lock);
  4077. if (gpio_is_valid(panel->bl_config.en_gpio))
  4078. gpio_set_value(panel->bl_config.en_gpio, 0);
  4079. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  4080. if (rc) {
  4081. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  4082. panel->name, rc);
  4083. goto error;
  4084. }
  4085. error:
  4086. mutex_unlock(&panel->panel_lock);
  4087. return rc;
  4088. }
  4089. int dsi_panel_disable(struct dsi_panel *panel)
  4090. {
  4091. int rc = 0;
  4092. if (!panel) {
  4093. DSI_ERR("invalid params\n");
  4094. return -EINVAL;
  4095. }
  4096. mutex_lock(&panel->panel_lock);
  4097. /* Avoid sending panel off commands when ESD recovery is underway */
  4098. if (!atomic_read(&panel->esd_recovery_pending)) {
  4099. /*
  4100. * Need to set IBB/AB regulator mode to STANDBY,
  4101. * if panel is going off from AOD mode.
  4102. */
  4103. if (dsi_panel_is_type_oled(panel) &&
  4104. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  4105. panel->power_mode == SDE_MODE_DPMS_LP2))
  4106. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  4107. "ibb", REGULATOR_MODE_STANDBY);
  4108. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  4109. if (rc) {
  4110. /*
  4111. * Sending panel off commands may fail when DSI
  4112. * controller is in a bad state. These failures can be
  4113. * ignored since controller will go for full reset on
  4114. * subsequent display enable anyway.
  4115. */
  4116. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  4117. panel->name, rc);
  4118. rc = 0;
  4119. }
  4120. }
  4121. panel->panel_initialized = false;
  4122. panel->power_mode = SDE_MODE_DPMS_OFF;
  4123. mutex_unlock(&panel->panel_lock);
  4124. return rc;
  4125. }
  4126. int dsi_panel_unprepare(struct dsi_panel *panel)
  4127. {
  4128. int rc = 0;
  4129. if (!panel) {
  4130. DSI_ERR("invalid params\n");
  4131. return -EINVAL;
  4132. }
  4133. mutex_lock(&panel->panel_lock);
  4134. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  4135. if (rc) {
  4136. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  4137. panel->name, rc);
  4138. goto error;
  4139. }
  4140. error:
  4141. mutex_unlock(&panel->panel_lock);
  4142. return rc;
  4143. }
  4144. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  4145. {
  4146. int rc = 0;
  4147. if (!panel) {
  4148. DSI_ERR("invalid params\n");
  4149. return -EINVAL;
  4150. }
  4151. mutex_lock(&panel->panel_lock);
  4152. rc = dsi_panel_power_off(panel);
  4153. if (rc) {
  4154. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  4155. panel->name, rc);
  4156. goto error;
  4157. }
  4158. error:
  4159. mutex_unlock(&panel->panel_lock);
  4160. return rc;
  4161. }