hal_li_rx.h 32 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef _HAL_LI_RX_H_
  20. #define _HAL_LI_RX_H_
  21. #include <hal_rx.h>
  22. /*
  23. * macro to set the cookie into the rxdma ring entry
  24. */
  25. #define HAL_RXDMA_COOKIE_SET(buff_addr_info, cookie) \
  26. ((*(((unsigned int *)buff_addr_info) + \
  27. (BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET >> 2))) &= \
  28. ~BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK); \
  29. ((*(((unsigned int *)buff_addr_info) + \
  30. (BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET >> 2))) |= \
  31. ((cookie) << BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_LSB) & \
  32. BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK)
  33. /*
  34. * macro to set the manager into the rxdma ring entry
  35. */
  36. #define HAL_RXDMA_MANAGER_SET(buff_addr_info, manager) \
  37. ((*(((unsigned int *)buff_addr_info) + \
  38. (BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET >> 2))) &= \
  39. ~BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK); \
  40. ((*(((unsigned int *)buff_addr_info) + \
  41. (BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET >> 2))) |= \
  42. ((manager) << BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_LSB) & \
  43. BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK)
  44. #define HAL_RX_ERROR_STATUS_GET(reo_desc) \
  45. (_HAL_MS((*_OFFSET_TO_WORD_PTR(reo_desc, \
  46. REO_DESTINATION_RING_7_REO_PUSH_REASON_OFFSET)),\
  47. REO_DESTINATION_RING_7_REO_PUSH_REASON_MASK, \
  48. REO_DESTINATION_RING_7_REO_PUSH_REASON_LSB))
  49. #define HAL_RX_BUF_COOKIE_GET(buff_addr_info) \
  50. (_HAL_MS((*_OFFSET_TO_WORD_PTR(buff_addr_info, \
  51. BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET)), \
  52. BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK, \
  53. BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_LSB))
  54. #define HAL_RX_BUF_RBM_GET(buff_addr_info) \
  55. (_HAL_MS((*_OFFSET_TO_WORD_PTR(buff_addr_info, \
  56. BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET)),\
  57. BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK, \
  58. BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_LSB))
  59. /* TODO: Convert the following structure fields accesseses to offsets */
  60. #define HAL_RX_REO_BUF_COOKIE_GET(reo_desc) \
  61. (HAL_RX_BUF_COOKIE_GET(& \
  62. (((struct reo_destination_ring *) \
  63. reo_desc)->buf_or_link_desc_addr_info)))
  64. #define HAL_RX_MPDU_SEQUENCE_NUMBER_GET(mpdu_info_ptr) \
  65. ((mpdu_info_ptr \
  66. [RX_MPDU_DESC_INFO_0_MPDU_SEQUENCE_NUMBER_OFFSET >> 2] & \
  67. RX_MPDU_DESC_INFO_0_MPDU_SEQUENCE_NUMBER_MASK) >> \
  68. RX_MPDU_DESC_INFO_0_MPDU_SEQUENCE_NUMBER_LSB)
  69. #define HAL_RX_MPDU_DESC_PEER_META_DATA_GET(mpdu_info_ptr) \
  70. ((mpdu_info_ptr \
  71. [RX_MPDU_DESC_INFO_1_PEER_META_DATA_OFFSET >> 2] & \
  72. RX_MPDU_DESC_INFO_1_PEER_META_DATA_MASK) >> \
  73. RX_MPDU_DESC_INFO_1_PEER_META_DATA_LSB)
  74. #define HAL_RX_MPDU_MSDU_COUNT_GET(mpdu_info_ptr) \
  75. ((mpdu_info_ptr[RX_MPDU_DESC_INFO_0_MSDU_COUNT_OFFSET >> 2] & \
  76. RX_MPDU_DESC_INFO_0_MSDU_COUNT_MASK) >> \
  77. RX_MPDU_DESC_INFO_0_MSDU_COUNT_LSB)
  78. #define HAL_RX_MPDU_FRAGMENT_FLAG_GET(mpdu_info_ptr) \
  79. (mpdu_info_ptr[RX_MPDU_DESC_INFO_0_FRAGMENT_FLAG_OFFSET >> 2] & \
  80. RX_MPDU_DESC_INFO_0_FRAGMENT_FLAG_MASK)
  81. #define HAL_RX_MPDU_RETRY_BIT_GET(mpdu_info_ptr) \
  82. (mpdu_info_ptr[RX_MPDU_DESC_INFO_0_MPDU_RETRY_BIT_OFFSET >> 2] & \
  83. RX_MPDU_DESC_INFO_0_MPDU_RETRY_BIT_MASK)
  84. #define HAL_RX_MPDU_AMPDU_FLAG_GET(mpdu_info_ptr) \
  85. (mpdu_info_ptr[RX_MPDU_DESC_INFO_0_AMPDU_FLAG_OFFSET >> 2] & \
  86. RX_MPDU_DESC_INFO_0_AMPDU_FLAG_MASK)
  87. #define HAL_RX_MPDU_RAW_MPDU_GET(mpdu_info_ptr) \
  88. (mpdu_info_ptr[RX_MPDU_DESC_INFO_0_RAW_MPDU_OFFSET >> 2] & \
  89. RX_MPDU_DESC_INFO_0_RAW_MPDU_MASK)
  90. #define HAL_RX_MPDU_FLAGS_GET(mpdu_info_ptr) \
  91. (HAL_RX_MPDU_FRAGMENT_FLAG_GET(mpdu_info_ptr) | \
  92. HAL_RX_MPDU_RETRY_BIT_GET(mpdu_info_ptr) | \
  93. HAL_RX_MPDU_AMPDU_FLAG_GET(mpdu_info_ptr) | \
  94. HAL_RX_MPDU_RAW_MPDU_GET(mpdu_info_ptr))
  95. #define HAL_RX_MPDU_BAR_FRAME_GET(mpdu_info_ptr) \
  96. ((mpdu_info_ptr[RX_MPDU_DESC_INFO_0_BAR_FRAME_OFFSET >> 2] & \
  97. RX_MPDU_DESC_INFO_0_BAR_FRAME_MASK) >> \
  98. RX_MPDU_DESC_INFO_0_BAR_FRAME_LSB)
  99. /*
  100. * NOTE: None of the following _GET macros need a right
  101. * shift by the corresponding _LSB. This is because, they are
  102. * finally taken and "OR'ed" into a single word again.
  103. */
  104. #define HAL_RX_MSDU_CONTINUATION_FLAG_SET(msdu_info_ptr, val) \
  105. ((*(((uint32_t *)msdu_info_ptr) + \
  106. (RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_OFFSET >> 2))) |= \
  107. ((val) << RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_LSB) & \
  108. RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_MASK)
  109. #define HAL_RX_MSDU_CONTINUATION_FLAG_GET(msdu_info_ptr) \
  110. ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \
  111. RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_OFFSET)) & \
  112. RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_MASK)
  113. #define HAL_RX_MSDU_REO_DST_IND_GET(msdu_info_ptr) \
  114. (_HAL_MS((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \
  115. RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_OFFSET)), \
  116. RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_MASK, \
  117. RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_LSB))
  118. #define HAL_RX_MSDU_SA_IS_VALID_FLAG_GET(msdu_info_ptr) \
  119. ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \
  120. RX_MSDU_DESC_INFO_0_SA_IS_VALID_OFFSET)) & \
  121. RX_MSDU_DESC_INFO_0_SA_IS_VALID_MASK)
  122. #define HAL_RX_MSDU_SA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr) \
  123. ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \
  124. RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_OFFSET)) & \
  125. RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_MASK)
  126. #define HAL_RX_MSDU_DA_IS_VALID_FLAG_GET(msdu_info_ptr) \
  127. ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \
  128. RX_MSDU_DESC_INFO_0_DA_IS_VALID_OFFSET)) & \
  129. RX_MSDU_DESC_INFO_0_DA_IS_VALID_MASK)
  130. #define HAL_RX_MSDU_DA_IS_MCBC_FLAG_GET(msdu_info_ptr) \
  131. ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \
  132. RX_MSDU_DESC_INFO_0_DA_IS_MCBC_OFFSET)) & \
  133. RX_MSDU_DESC_INFO_0_DA_IS_MCBC_MASK)
  134. #define HAL_RX_MSDU_DA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr) \
  135. ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \
  136. RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_OFFSET)) & \
  137. RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_MASK)
  138. #define HAL_RX_REO_MSDU_REO_DST_IND_GET(reo_desc) \
  139. (HAL_RX_MSDU_REO_DST_IND_GET(& \
  140. (((struct reo_destination_ring *) \
  141. reo_desc)->rx_msdu_desc_info_details)))
  142. #define HAL_RX_MPDU_ENCRYPT_TYPE_GET(_rx_mpdu_info) \
  143. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
  144. RX_MPDU_INFO_3_ENCRYPT_TYPE_OFFSET)), \
  145. RX_MPDU_INFO_3_ENCRYPT_TYPE_MASK, \
  146. RX_MPDU_INFO_3_ENCRYPT_TYPE_LSB))
  147. #define HAL_RX_MSDU_DESC_INFO_SET(_msdu_info_ptr, _field, _val) \
  148. HAL_RX_FLD_SET(_msdu_info_ptr, RX_MSDU_DESC_INFO_0, \
  149. _field, _val)
  150. #define HAL_RX_MPDU_DESC_INFO_SET(_mpdu_info_ptr, _field, _val) \
  151. HAL_RX_FLD_SET(_mpdu_info_ptr, RX_MPDU_DESC_INFO_0, \
  152. _field, _val)
  153. /*
  154. * Structures & Macros to obtain fields from the TLV's in the Rx packet
  155. * pre-header.
  156. */
  157. /*
  158. * Every Rx packet starts at an offset from the top of the buffer.
  159. * If the host hasn't subscribed to any specific TLV, there is
  160. * still space reserved for the following TLV's from the start of
  161. * the buffer:
  162. * -- RX ATTENTION
  163. * -- RX MPDU START
  164. * -- RX MSDU START
  165. * -- RX MSDU END
  166. * -- RX MPDU END
  167. * -- RX PACKET HEADER (802.11)
  168. * If the host subscribes to any of the TLV's above, that TLV
  169. * if populated by the HW
  170. */
  171. #define NUM_DWORDS_TAG 1
  172. /* By default the packet header TLV is 128 bytes */
  173. #define NUM_OF_BYTES_RX_802_11_HDR_TLV 128
  174. #define NUM_OF_DWORDS_RX_802_11_HDR_TLV \
  175. (NUM_OF_BYTES_RX_802_11_HDR_TLV >> 2)
  176. #define RX_PKT_OFFSET_WORDS \
  177. ( \
  178. NUM_OF_DWORDS_RX_ATTENTION + NUM_DWORDS_TAG \
  179. NUM_OF_DWORDS_RX_MPDU_START + NUM_DWORDS_TAG \
  180. NUM_OF_DWORDS_RX_MSDU_START + NUM_DWORDS_TAG \
  181. NUM_OF_DWORDS_RX_MSDU_END + NUM_DWORDS_TAG \
  182. NUM_OF_DWORDS_RX_MPDU_END + NUM_DWORDS_TAG \
  183. NUM_OF_DWORDS_RX_802_11_HDR_TLV + NUM_DWORDS_TAG \
  184. )
  185. #define RX_PKT_OFFSET_BYTES \
  186. (RX_PKT_OFFSET_WORDS << 2)
  187. #define RX_PKT_HDR_TLV_LEN 120
  188. /*
  189. * Each RX descriptor TLV is preceded by 1 DWORD "tag"
  190. */
  191. struct rx_attention_tlv {
  192. uint32_t tag;
  193. struct rx_attention rx_attn;
  194. };
  195. struct rx_mpdu_start_tlv {
  196. uint32_t tag;
  197. struct rx_mpdu_start rx_mpdu_start;
  198. };
  199. struct rx_msdu_start_tlv {
  200. uint32_t tag;
  201. struct rx_msdu_start rx_msdu_start;
  202. };
  203. struct rx_msdu_end_tlv {
  204. uint32_t tag;
  205. struct rx_msdu_end rx_msdu_end;
  206. };
  207. struct rx_mpdu_end_tlv {
  208. uint32_t tag;
  209. struct rx_mpdu_end rx_mpdu_end;
  210. };
  211. struct rx_pkt_hdr_tlv {
  212. uint32_t tag; /* 4 B */
  213. uint32_t phy_ppdu_id; /* 4 B */
  214. char rx_pkt_hdr[RX_PKT_HDR_TLV_LEN]; /* 120 B */
  215. };
  216. /* rx_pkt_tlvs structure should be used to process Data buffers, monitor status
  217. * buffers, monitor destination buffers and monitor descriptor buffers.
  218. */
  219. #ifdef RXDMA_OPTIMIZATION
  220. /*
  221. * The RX_PADDING_BYTES is required so that the TLV's don't
  222. * spread across the 128 byte boundary
  223. * RXDMA optimization requires:
  224. * 1) MSDU_END & ATTENTION TLV's follow in that order
  225. * 2) TLV's don't span across 128 byte lines
  226. * 3) Rx Buffer is nicely aligned on the 128 byte boundary
  227. */
  228. #define RX_PADDING0_BYTES 4
  229. #define RX_PADDING1_BYTES 16
  230. #if defined(IPA_OFFLOAD) && defined(IPA_WDS_EASYMESH_FEATURE)
  231. struct rx_pkt_tlvs {
  232. struct rx_msdu_end_tlv msdu_end_tlv; /* 72 bytes */
  233. struct rx_attention_tlv attn_tlv; /* 16 bytes */
  234. struct rx_mpdu_start_tlv mpdu_start_tlv;/* 96 bytes */
  235. struct rx_msdu_start_tlv msdu_start_tlv;/* 40 bytes */
  236. uint8_t rx_padding0[RX_PADDING0_BYTES]; /* 4 bytes */
  237. struct rx_mpdu_end_tlv mpdu_end_tlv; /* 12 bytes */
  238. uint8_t rx_padding1[RX_PADDING1_BYTES]; /* 16 bytes */
  239. #ifndef NO_RX_PKT_HDR_TLV
  240. struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */
  241. #endif
  242. };
  243. #else
  244. struct rx_pkt_tlvs {
  245. struct rx_msdu_end_tlv msdu_end_tlv; /* 72 bytes */
  246. struct rx_attention_tlv attn_tlv; /* 16 bytes */
  247. struct rx_msdu_start_tlv msdu_start_tlv;/* 40 bytes */
  248. uint8_t rx_padding0[RX_PADDING0_BYTES]; /* 4 bytes */
  249. struct rx_mpdu_start_tlv mpdu_start_tlv;/* 96 bytes */
  250. struct rx_mpdu_end_tlv mpdu_end_tlv; /* 12 bytes */
  251. uint8_t rx_padding1[RX_PADDING1_BYTES]; /* 16 bytes */
  252. #ifndef NO_RX_PKT_HDR_TLV
  253. struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */
  254. #endif
  255. };
  256. #endif
  257. #else /* RXDMA_OPTIMIZATION */
  258. struct rx_pkt_tlvs {
  259. struct rx_attention_tlv attn_tlv;
  260. struct rx_mpdu_start_tlv mpdu_start_tlv;
  261. struct rx_msdu_start_tlv msdu_start_tlv;
  262. struct rx_msdu_end_tlv msdu_end_tlv;
  263. struct rx_mpdu_end_tlv mpdu_end_tlv;
  264. struct rx_pkt_hdr_tlv pkt_hdr_tlv;
  265. };
  266. #endif /* RXDMA_OPTIMIZATION */
  267. /* rx_mon_pkt_tlvs structure should be used to process monitor data buffers */
  268. #ifdef RXDMA_OPTIMIZATION
  269. struct rx_mon_pkt_tlvs {
  270. struct rx_msdu_end_tlv msdu_end_tlv; /* 72 bytes */
  271. struct rx_attention_tlv attn_tlv; /* 16 bytes */
  272. struct rx_msdu_start_tlv msdu_start_tlv;/* 40 bytes */
  273. uint8_t rx_padding0[RX_PADDING0_BYTES]; /* 4 bytes */
  274. struct rx_mpdu_start_tlv mpdu_start_tlv;/* 96 bytes */
  275. struct rx_mpdu_end_tlv mpdu_end_tlv; /* 12 bytes */
  276. uint8_t rx_padding1[RX_PADDING1_BYTES]; /* 16 bytes */
  277. struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */
  278. };
  279. #else /* RXDMA_OPTIMIZATION */
  280. struct rx_mon_pkt_tlvs {
  281. struct rx_attention_tlv attn_tlv;
  282. struct rx_mpdu_start_tlv mpdu_start_tlv;
  283. struct rx_msdu_start_tlv msdu_start_tlv;
  284. struct rx_msdu_end_tlv msdu_end_tlv;
  285. struct rx_mpdu_end_tlv mpdu_end_tlv;
  286. struct rx_pkt_hdr_tlv pkt_hdr_tlv;
  287. };
  288. #endif
  289. #define SIZE_OF_MONITOR_TLV sizeof(struct rx_mon_pkt_tlvs)
  290. #define SIZE_OF_DATA_RX_TLV sizeof(struct rx_pkt_tlvs)
  291. #define RX_PKT_TLVS_LEN SIZE_OF_DATA_RX_TLV
  292. #define RX_PKT_TLV_OFFSET(field) qdf_offsetof(struct rx_pkt_tlvs, field)
  293. #define HAL_RX_PKT_TLV_MPDU_START_OFFSET(hal_soc) \
  294. RX_PKT_TLV_OFFSET(mpdu_start_tlv)
  295. #define HAL_RX_PKT_TLV_MPDU_END_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(mpdu_end_tlv)
  296. #define HAL_RX_PKT_TLV_MSDU_START_OFFSET(hal_soc) \
  297. RX_PKT_TLV_OFFSET(msdu_start_tlv)
  298. #define HAL_RX_PKT_TLV_MSDU_END_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(msdu_end_tlv)
  299. #define HAL_RX_PKT_TLV_ATTN_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(attn_tlv)
  300. #define HAL_RX_PKT_TLV_PKT_HDR_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(pkt_hdr_tlv)
  301. /**
  302. * hal_rx_get_pkt_tlvs(): Function to retrieve pkt tlvs from nbuf
  303. * @rx_buf_start: Pointer to data buffer field
  304. *
  305. * Return: pointer to rx_pkt_tlvs
  306. */
  307. static inline
  308. struct rx_pkt_tlvs *hal_rx_get_pkt_tlvs(uint8_t *rx_buf_start)
  309. {
  310. return (struct rx_pkt_tlvs *)rx_buf_start;
  311. }
  312. /**
  313. * hal_rx_get_mpdu_info(): Function to retrieve mpdu info from pkt tlvs
  314. * @pkt_tlvs: Pointer to pkt_tlvs
  315. *
  316. * Return: pointer to rx_mpdu_info structure
  317. */
  318. static inline
  319. struct rx_mpdu_info *hal_rx_get_mpdu_info(struct rx_pkt_tlvs *pkt_tlvs)
  320. {
  321. return &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start.rx_mpdu_info_details;
  322. }
  323. /**
  324. * hal_rx_mon_dest_get_buffer_info_from_tlv(): Retrieve mon dest frame info
  325. * from the reserved bytes of rx_tlv_hdr.
  326. * @buf: start of rx_tlv_hdr
  327. * @buf_info: hal_rx_mon_dest_buf_info structure
  328. *
  329. * Return: void
  330. */
  331. static inline void hal_rx_mon_dest_get_buffer_info_from_tlv(
  332. uint8_t *buf,
  333. struct hal_rx_mon_dest_buf_info *buf_info)
  334. {
  335. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  336. qdf_mem_copy(buf_info, pkt_tlvs->rx_padding0,
  337. sizeof(struct hal_rx_mon_dest_buf_info));
  338. }
  339. /*
  340. * Get msdu_done bit from the RX_ATTENTION TLV
  341. */
  342. #define HAL_RX_ATTN_MSDU_DONE_GET(_rx_attn) \
  343. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
  344. RX_ATTENTION_2_MSDU_DONE_OFFSET)), \
  345. RX_ATTENTION_2_MSDU_DONE_MASK, \
  346. RX_ATTENTION_2_MSDU_DONE_LSB))
  347. #define HAL_RX_ATTN_FIRST_MPDU_GET(_rx_attn) \
  348. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
  349. RX_ATTENTION_1_FIRST_MPDU_OFFSET)), \
  350. RX_ATTENTION_1_FIRST_MPDU_MASK, \
  351. RX_ATTENTION_1_FIRST_MPDU_LSB))
  352. #define HAL_RX_ATTN_TCP_UDP_CKSUM_FAIL_GET(_rx_attn) \
  353. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
  354. RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_OFFSET)), \
  355. RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_MASK, \
  356. RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_LSB))
  357. /**
  358. * hal_rx_attn_tcp_udp_cksum_fail_get() - get tcp_udp cksum fail bit
  359. * from rx attention
  360. * @buf: pointer to rx_pkt_tlvs
  361. *
  362. * Return: tcp_udp_cksum_fail
  363. */
  364. static inline bool
  365. hal_rx_attn_tcp_udp_cksum_fail_get(uint8_t *buf)
  366. {
  367. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  368. struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
  369. uint8_t tcp_udp_cksum_fail;
  370. tcp_udp_cksum_fail = HAL_RX_ATTN_TCP_UDP_CKSUM_FAIL_GET(rx_attn);
  371. return !!tcp_udp_cksum_fail;
  372. }
  373. #define HAL_RX_ATTN_IP_CKSUM_FAIL_GET(_rx_attn) \
  374. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
  375. RX_ATTENTION_1_IP_CHKSUM_FAIL_OFFSET)), \
  376. RX_ATTENTION_1_IP_CHKSUM_FAIL_MASK, \
  377. RX_ATTENTION_1_IP_CHKSUM_FAIL_LSB))
  378. /**
  379. * hal_rx_attn_ip_cksum_fail_get() - get ip cksum fail bit
  380. * from rx attention
  381. * @buf: pointer to rx_pkt_tlvs
  382. *
  383. * Return: ip_cksum_fail
  384. */
  385. static inline bool
  386. hal_rx_attn_ip_cksum_fail_get(uint8_t *buf)
  387. {
  388. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  389. struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
  390. uint8_t ip_cksum_fail;
  391. ip_cksum_fail = HAL_RX_ATTN_IP_CKSUM_FAIL_GET(rx_attn);
  392. return !!ip_cksum_fail;
  393. }
  394. #define HAL_RX_ATTN_PHY_PPDU_ID_GET(_rx_attn) \
  395. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
  396. RX_ATTENTION_0_PHY_PPDU_ID_OFFSET)), \
  397. RX_ATTENTION_0_PHY_PPDU_ID_MASK, \
  398. RX_ATTENTION_0_PHY_PPDU_ID_LSB))
  399. #define HAL_RX_ATTN_CCE_MATCH_GET(_rx_attn) \
  400. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
  401. RX_ATTENTION_1_CCE_MATCH_OFFSET)), \
  402. RX_ATTENTION_1_CCE_MATCH_MASK, \
  403. RX_ATTENTION_1_CCE_MATCH_LSB))
  404. /**
  405. * hal_rx_msdu_cce_match_get_li() - get CCE match bit
  406. * from rx attention
  407. * @buf: pointer to rx_pkt_tlvs
  408. *
  409. * Return: CCE match value
  410. */
  411. static inline bool
  412. hal_rx_msdu_cce_match_get_li(uint8_t *buf)
  413. {
  414. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  415. struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
  416. uint8_t cce_match_val;
  417. cce_match_val = HAL_RX_ATTN_CCE_MATCH_GET(rx_attn);
  418. return !!cce_match_val;
  419. }
  420. /*
  421. * Get peer_meta_data from RX_MPDU_INFO within RX_MPDU_START
  422. */
  423. #define HAL_RX_MPDU_PEER_META_DATA_GET(_rx_mpdu_info) \
  424. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
  425. RX_MPDU_INFO_8_PEER_META_DATA_OFFSET)), \
  426. RX_MPDU_INFO_8_PEER_META_DATA_MASK, \
  427. RX_MPDU_INFO_8_PEER_META_DATA_LSB))
  428. static inline uint32_t
  429. hal_rx_mpdu_peer_meta_data_get_li(uint8_t *buf)
  430. {
  431. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  432. struct rx_mpdu_start *mpdu_start =
  433. &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
  434. struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details;
  435. uint32_t peer_meta_data;
  436. peer_meta_data = HAL_RX_MPDU_PEER_META_DATA_GET(mpdu_info);
  437. return peer_meta_data;
  438. }
  439. #define HAL_RX_MPDU_INFO_AMPDU_FLAG_GET(_rx_mpdu_info) \
  440. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
  441. RX_MPDU_INFO_12_AMPDU_FLAG_OFFSET)), \
  442. RX_MPDU_INFO_12_AMPDU_FLAG_MASK, \
  443. RX_MPDU_INFO_12_AMPDU_FLAG_LSB))
  444. #define HAL_RX_MPDU_PEER_META_DATA_SET(_rx_mpdu_info, peer_mdata) \
  445. ((*(((uint32_t *)_rx_mpdu_info) + \
  446. (RX_MPDU_INFO_8_PEER_META_DATA_OFFSET >> 2))) = \
  447. ((peer_mdata) << RX_MPDU_INFO_8_PEER_META_DATA_LSB) & \
  448. RX_MPDU_INFO_8_PEER_META_DATA_MASK)
  449. /**
  450. * hal_rx_mpdu_peer_meta_data_set() - set peer meta data in RX mpdu
  451. * start tlv
  452. * @buf: rx_tlv_hdr of the received packet
  453. * @peer_mdata: peer meta data to be set.
  454. *
  455. * Return: void
  456. */
  457. static inline void
  458. hal_rx_mpdu_peer_meta_data_set(uint8_t *buf, uint32_t peer_mdata)
  459. {
  460. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  461. struct rx_mpdu_start *mpdu_start =
  462. &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
  463. struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details;
  464. HAL_RX_MPDU_PEER_META_DATA_SET(mpdu_info, peer_mdata);
  465. }
  466. /*
  467. * LRO information needed from the TLVs
  468. */
  469. #define HAL_RX_TLV_GET_LRO_ELIGIBLE(buf) \
  470. (_HAL_MS( \
  471. (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
  472. msdu_end_tlv.rx_msdu_end), \
  473. RX_MSDU_END_9_LRO_ELIGIBLE_OFFSET)), \
  474. RX_MSDU_END_9_LRO_ELIGIBLE_MASK, \
  475. RX_MSDU_END_9_LRO_ELIGIBLE_LSB))
  476. #define HAL_RX_TLV_GET_TCP_ACK(buf) \
  477. (_HAL_MS( \
  478. (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
  479. msdu_end_tlv.rx_msdu_end), \
  480. RX_MSDU_END_8_TCP_ACK_NUMBER_OFFSET)), \
  481. RX_MSDU_END_8_TCP_ACK_NUMBER_MASK, \
  482. RX_MSDU_END_8_TCP_ACK_NUMBER_LSB))
  483. #define HAL_RX_TLV_GET_TCP_SEQ(buf) \
  484. (_HAL_MS( \
  485. (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
  486. msdu_end_tlv.rx_msdu_end), \
  487. RX_MSDU_END_7_TCP_SEQ_NUMBER_OFFSET)), \
  488. RX_MSDU_END_7_TCP_SEQ_NUMBER_MASK, \
  489. RX_MSDU_END_7_TCP_SEQ_NUMBER_LSB))
  490. #define HAL_RX_TLV_GET_TCP_WIN(buf) \
  491. (_HAL_MS( \
  492. (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
  493. msdu_end_tlv.rx_msdu_end), \
  494. RX_MSDU_END_9_WINDOW_SIZE_OFFSET)), \
  495. RX_MSDU_END_9_WINDOW_SIZE_MASK, \
  496. RX_MSDU_END_9_WINDOW_SIZE_LSB))
  497. #define HAL_RX_TLV_GET_TCP_PURE_ACK(buf) \
  498. (_HAL_MS( \
  499. (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
  500. msdu_start_tlv.rx_msdu_start), \
  501. RX_MSDU_START_2_TCP_ONLY_ACK_OFFSET)), \
  502. RX_MSDU_START_2_TCP_ONLY_ACK_MASK, \
  503. RX_MSDU_START_2_TCP_ONLY_ACK_LSB))
  504. #define HAL_RX_TLV_GET_TCP_PROTO(buf) \
  505. (_HAL_MS( \
  506. (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
  507. msdu_start_tlv.rx_msdu_start), \
  508. RX_MSDU_START_2_TCP_PROTO_OFFSET)), \
  509. RX_MSDU_START_2_TCP_PROTO_MASK, \
  510. RX_MSDU_START_2_TCP_PROTO_LSB))
  511. #define HAL_RX_TLV_GET_UDP_PROTO(buf) \
  512. (_HAL_MS( \
  513. (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
  514. msdu_start_tlv.rx_msdu_start), \
  515. RX_MSDU_START_2_UDP_PROTO_OFFSET)), \
  516. RX_MSDU_START_2_UDP_PROTO_MASK, \
  517. RX_MSDU_START_2_UDP_PROTO_LSB))
  518. #define HAL_RX_TLV_GET_IPV6(buf) \
  519. (_HAL_MS( \
  520. (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
  521. msdu_start_tlv.rx_msdu_start), \
  522. RX_MSDU_START_2_IPV6_PROTO_OFFSET)), \
  523. RX_MSDU_START_2_IPV6_PROTO_MASK, \
  524. RX_MSDU_START_2_IPV6_PROTO_LSB))
  525. #define HAL_RX_TLV_GET_IP_OFFSET(buf) \
  526. (_HAL_MS( \
  527. (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
  528. msdu_start_tlv.rx_msdu_start), \
  529. RX_MSDU_START_1_L3_OFFSET_OFFSET)), \
  530. RX_MSDU_START_1_L3_OFFSET_MASK, \
  531. RX_MSDU_START_1_L3_OFFSET_LSB))
  532. #define HAL_RX_TLV_GET_TCP_OFFSET(buf) \
  533. (_HAL_MS( \
  534. (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
  535. msdu_start_tlv.rx_msdu_start), \
  536. RX_MSDU_START_1_L4_OFFSET_OFFSET)), \
  537. RX_MSDU_START_1_L4_OFFSET_MASK, \
  538. RX_MSDU_START_1_L4_OFFSET_LSB))
  539. #define HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(buf) \
  540. (_HAL_MS( \
  541. (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
  542. msdu_start_tlv.rx_msdu_start), \
  543. RX_MSDU_START_4_FLOW_ID_TOEPLITZ_OFFSET)), \
  544. RX_MSDU_START_4_FLOW_ID_TOEPLITZ_MASK, \
  545. RX_MSDU_START_4_FLOW_ID_TOEPLITZ_LSB))
  546. #define HAL_RX_MSDU_START_MSDU_LEN_GET(_rx_msdu_start) \
  547. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \
  548. RX_MSDU_START_1_MSDU_LENGTH_OFFSET)), \
  549. RX_MSDU_START_1_MSDU_LENGTH_MASK, \
  550. RX_MSDU_START_1_MSDU_LENGTH_LSB))
  551. #define HAL_RX_MSDU_START_BW_GET(_rx_msdu_start) \
  552. (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
  553. RX_MSDU_START_5_RECEIVE_BANDWIDTH_OFFSET)), \
  554. RX_MSDU_START_5_RECEIVE_BANDWIDTH_MASK, \
  555. RX_MSDU_START_5_RECEIVE_BANDWIDTH_LSB))
  556. #define HAL_RX_MSDU_START_FLOWID_TOEPLITZ_GET(_rx_msdu_start) \
  557. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \
  558. RX_MSDU_START_4_FLOW_ID_TOEPLITZ_OFFSET)), \
  559. RX_MSDU_START_4_FLOW_ID_TOEPLITZ_MASK, \
  560. RX_MSDU_START_4_FLOW_ID_TOEPLITZ_LSB))
  561. /**
  562. * hal_rx_msdu_start_toeplitz_get() - API to get the toeplitz hash
  563. * from rx_msdu_start TLV
  564. * @buf: pointer to the start of RX PKT TLV headers
  565. *
  566. * Return: toeplitz hash
  567. */
  568. static inline uint32_t
  569. hal_rx_msdu_start_toeplitz_get(uint8_t *buf)
  570. {
  571. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  572. struct rx_msdu_start *msdu_start =
  573. &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
  574. return HAL_RX_MSDU_START_FLOWID_TOEPLITZ_GET(msdu_start);
  575. }
  576. #define HAL_RX_MSDU_START_SGI_GET(_rx_msdu_start) \
  577. (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
  578. RX_MSDU_START_5_SGI_OFFSET)), \
  579. RX_MSDU_START_5_SGI_MASK, \
  580. RX_MSDU_START_5_SGI_LSB))
  581. #define HAL_RX_MSDU_START_RATE_MCS_GET(_rx_msdu_start) \
  582. (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
  583. RX_MSDU_START_5_RATE_MCS_OFFSET)), \
  584. RX_MSDU_START_5_RATE_MCS_MASK, \
  585. RX_MSDU_START_5_RATE_MCS_LSB))
  586. #define HAL_RX_ATTN_DECRYPT_STATUS_GET(_rx_attn) \
  587. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
  588. RX_ATTENTION_2_DECRYPT_STATUS_CODE_OFFSET)), \
  589. RX_ATTENTION_2_DECRYPT_STATUS_CODE_MASK, \
  590. RX_ATTENTION_2_DECRYPT_STATUS_CODE_LSB))
  591. /*
  592. * Get key index from RX_MSDU_END
  593. */
  594. #define HAL_RX_MSDU_END_KEYID_OCTET_GET(_rx_msdu_end) \
  595. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
  596. RX_MSDU_END_2_KEY_ID_OCTET_OFFSET)), \
  597. RX_MSDU_END_2_KEY_ID_OCTET_MASK, \
  598. RX_MSDU_END_2_KEY_ID_OCTET_LSB))
  599. #define HAL_RX_MSDU_START_RSSI_GET(_rx_msdu_start) \
  600. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \
  601. RX_MSDU_START_5_USER_RSSI_OFFSET)), \
  602. RX_MSDU_START_5_USER_RSSI_MASK, \
  603. RX_MSDU_START_5_USER_RSSI_LSB))
  604. /**
  605. * hal_rx_msdu_start_get_rssi() - API to get the rssi of received pkt
  606. * from rx_msdu_start
  607. *
  608. * @buf: pointer to the start of RX PKT TLV header
  609. *
  610. * Return: uint32_t(rssi)
  611. */
  612. static inline uint32_t
  613. hal_rx_msdu_start_get_rssi(uint8_t *buf)
  614. {
  615. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  616. struct rx_msdu_start *msdu_start =
  617. &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
  618. uint32_t rssi;
  619. rssi = HAL_RX_MSDU_START_RSSI_GET(msdu_start);
  620. return rssi;
  621. }
  622. #define HAL_RX_MSDU_START_FREQ_GET(_rx_msdu_start) \
  623. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \
  624. RX_MSDU_START_7_SW_PHY_META_DATA_OFFSET)), \
  625. RX_MSDU_START_7_SW_PHY_META_DATA_MASK, \
  626. RX_MSDU_START_7_SW_PHY_META_DATA_LSB))
  627. #define HAL_RX_MSDU_START_PKT_TYPE_GET(_rx_msdu_start) \
  628. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \
  629. RX_MSDU_START_5_PKT_TYPE_OFFSET)), \
  630. RX_MSDU_START_5_PKT_TYPE_MASK, \
  631. RX_MSDU_START_5_PKT_TYPE_LSB))
  632. #define HAL_RX_MPDU_AD4_31_0_GET(_rx_mpdu_info) \
  633. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
  634. RX_MPDU_INFO_20_MAC_ADDR_AD4_31_0_OFFSET)), \
  635. RX_MPDU_INFO_20_MAC_ADDR_AD4_31_0_MASK, \
  636. RX_MPDU_INFO_20_MAC_ADDR_AD4_31_0_LSB))
  637. #define HAL_RX_MPDU_AD4_47_32_GET(_rx_mpdu_info) \
  638. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
  639. RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_OFFSET)), \
  640. RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_MASK, \
  641. RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_LSB))
  642. /*******************************************************************************
  643. * RX ERROR APIS
  644. ******************************************************************************/
  645. #define HAL_RX_MPDU_END_DECRYPT_ERR_GET(_rx_mpdu_end) \
  646. (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_mpdu_end),\
  647. RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_OFFSET)), \
  648. RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_MASK, \
  649. RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_LSB))
  650. #define HAL_RX_MPDU_END_MIC_ERR_GET(_rx_mpdu_end) \
  651. (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_mpdu_end),\
  652. RX_MPDU_END_1_TKIP_MIC_ERR_OFFSET)), \
  653. RX_MPDU_END_1_TKIP_MIC_ERR_MASK, \
  654. RX_MPDU_END_1_TKIP_MIC_ERR_LSB))
  655. /*******************************************************************************
  656. * RX REO ERROR APIS
  657. ******************************************************************************/
  658. #define HAL_RX_REO_BUF_TYPE_GET(reo_desc) (((*(((uint32_t *)reo_desc) + \
  659. (REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_OFFSET >> 2))) & \
  660. REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_MASK) >> \
  661. REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_LSB)
  662. #define HAL_RX_REO_QUEUE_NUMBER_GET(reo_desc) (((*(((uint32_t *)reo_desc) + \
  663. (REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_OFFSET >> 2))) & \
  664. REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_MASK) >> \
  665. REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_LSB)
  666. #define HAL_RX_REO_ERROR_GET(reo_desc) (((*(((uint32_t *)reo_desc) + \
  667. (REO_DESTINATION_RING_7_REO_ERROR_CODE_OFFSET >> 2))) & \
  668. REO_DESTINATION_RING_7_REO_ERROR_CODE_MASK) >> \
  669. REO_DESTINATION_RING_7_REO_ERROR_CODE_LSB)
  670. /**
  671. * hal_rx_msdu_link_desc_reinject() - Re-injects the MSDU link
  672. * descriptor to REO entrance ring
  673. *
  674. * @soc: HAL version of the SOC pointer
  675. * @pa: Physical address of the MSDU Link Descriptor
  676. * @cookie: SW cookie to get to the virtual address
  677. * @error_enabled_reo_q: Argument to determine whether this needs to go
  678. * to the error enabled REO queue
  679. *
  680. * Return: void
  681. */
  682. static inline
  683. void hal_rx_msdu_link_desc_reinject(struct hal_soc *soc,
  684. uint64_t pa,
  685. uint32_t cookie,
  686. bool error_enabled_reo_q)
  687. {
  688. /* TODO */
  689. }
  690. #define HAL_RX_WBM_FIRST_MSDU_GET(wbm_desc) \
  691. (((*(((uint32_t *)wbm_desc) + \
  692. (WBM_RELEASE_RING_4_FIRST_MSDU_OFFSET >> 2))) & \
  693. WBM_RELEASE_RING_4_FIRST_MSDU_MASK) >> \
  694. WBM_RELEASE_RING_4_FIRST_MSDU_LSB)
  695. #define HAL_RX_WBM_LAST_MSDU_GET(wbm_desc) \
  696. (((*(((uint32_t *)wbm_desc) + \
  697. (WBM_RELEASE_RING_4_LAST_MSDU_OFFSET >> 2))) & \
  698. WBM_RELEASE_RING_4_LAST_MSDU_MASK) >> \
  699. WBM_RELEASE_RING_4_LAST_MSDU_LSB)
  700. #define HAL_RX_WBM_BUF_COOKIE_GET(wbm_desc) \
  701. HAL_RX_BUF_COOKIE_GET(&((struct wbm_release_ring *) \
  702. wbm_desc)->released_buff_or_desc_addr_info)
  703. #define HAL_RX_WBM_BUF_ADDR_39_32_GET(wbm_desc) \
  704. (HAL_RX_BUFFER_ADDR_39_32_GET(& \
  705. (((struct wbm_release_ring *) \
  706. wbm_desc)->released_buff_or_desc_addr_info)))
  707. #define HAL_RX_WBM_BUF_ADDR_31_0_GET(wbm_desc) \
  708. (HAL_RX_BUFFER_ADDR_31_0_GET(& \
  709. (((struct wbm_release_ring *) \
  710. wbm_desc)->released_buff_or_desc_addr_info)))
  711. static inline
  712. uint32_t
  713. HAL_RX_DESC_GET_DECAP_FORMAT(void *hw_desc_addr) {
  714. struct rx_msdu_start *rx_msdu_start;
  715. struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)hw_desc_addr;
  716. rx_msdu_start = &rx_desc->msdu_start_tlv.rx_msdu_start;
  717. return HAL_RX_GET(rx_msdu_start, RX_MSDU_START_2, DECAP_FORMAT);
  718. }
  719. #define HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(_rx_mpdu_info) \
  720. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
  721. RX_MPDU_INFO_14_MPDU_FRAME_CONTROL_FIELD_OFFSET)), \
  722. RX_MPDU_INFO_14_MPDU_FRAME_CONTROL_FIELD_MASK, \
  723. RX_MPDU_INFO_14_MPDU_FRAME_CONTROL_FIELD_LSB))
  724. /**
  725. * hal_rx_get_rx_more_frag_bit(): Function to retrieve more fragment bit
  726. * @buf: Network buffer
  727. *
  728. * Return: rx more fragment bit
  729. */
  730. static inline
  731. uint8_t hal_rx_get_rx_more_frag_bit(uint8_t *buf)
  732. {
  733. struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf);
  734. struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs);
  735. uint16_t frame_ctrl = 0;
  736. frame_ctrl = HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(rx_mpdu_info) >>
  737. DOT11_FC1_MORE_FRAG_OFFSET;
  738. /* more fragment bit if at offset bit 4 */
  739. return frame_ctrl;
  740. }
  741. static inline
  742. void hal_rx_mpdu_desc_info_get_li(void *desc_addr,
  743. void *mpdu_desc_info_hdl)
  744. {
  745. struct reo_destination_ring *reo_dst_ring;
  746. struct hal_rx_mpdu_desc_info *mpdu_desc_info =
  747. (struct hal_rx_mpdu_desc_info *)mpdu_desc_info_hdl;
  748. uint32_t *mpdu_info;
  749. reo_dst_ring = (struct reo_destination_ring *)desc_addr;
  750. mpdu_info = (uint32_t *)&reo_dst_ring->rx_mpdu_desc_info_details;
  751. mpdu_desc_info->msdu_count = HAL_RX_MPDU_MSDU_COUNT_GET(mpdu_info);
  752. mpdu_desc_info->mpdu_seq = HAL_RX_MPDU_SEQUENCE_NUMBER_GET(mpdu_info);
  753. mpdu_desc_info->mpdu_flags = HAL_RX_MPDU_FLAGS_GET(mpdu_info);
  754. mpdu_desc_info->peer_meta_data =
  755. HAL_RX_MPDU_DESC_PEER_META_DATA_GET(mpdu_info);
  756. mpdu_desc_info->bar_frame = HAL_RX_MPDU_BAR_FRAME_GET(mpdu_info);
  757. }
  758. /**
  759. * hal_rx_attn_msdu_done_get_li() - Get msdi done flag from RX TLV
  760. * @buf: RX tlv address
  761. *
  762. * Return: msdu done flag
  763. */
  764. static inline uint32_t hal_rx_attn_msdu_done_get_li(uint8_t *buf)
  765. {
  766. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  767. struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
  768. uint32_t msdu_done;
  769. msdu_done = HAL_RX_ATTN_MSDU_DONE_GET(rx_attn);
  770. return msdu_done;
  771. }
  772. #define HAL_RX_MSDU_FLAGS_GET(msdu_info_ptr) \
  773. (HAL_RX_FIRST_MSDU_IN_MPDU_FLAG_GET(msdu_info_ptr) | \
  774. HAL_RX_LAST_MSDU_IN_MPDU_FLAG_GET(msdu_info_ptr) | \
  775. HAL_RX_MSDU_CONTINUATION_FLAG_GET(msdu_info_ptr) | \
  776. HAL_RX_MSDU_SA_IS_VALID_FLAG_GET(msdu_info_ptr) | \
  777. HAL_RX_MSDU_SA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr) | \
  778. HAL_RX_MSDU_DA_IS_VALID_FLAG_GET(msdu_info_ptr) | \
  779. HAL_RX_MSDU_DA_IS_MCBC_FLAG_GET(msdu_info_ptr) | \
  780. HAL_RX_MSDU_DA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr))
  781. /**
  782. * hal_rx_msdu_flags_get_li() - Get msdu flags from ring desc
  783. * @msdu_desc_info_hdl: msdu desc info handle
  784. *
  785. * Return: msdu flags
  786. */
  787. static inline
  788. uint32_t hal_rx_msdu_flags_get_li(rx_msdu_desc_info_t msdu_desc_info_hdl)
  789. {
  790. struct rx_msdu_desc_info *msdu_desc_info =
  791. (struct rx_msdu_desc_info *)msdu_desc_info_hdl;
  792. return HAL_RX_MSDU_FLAGS_GET(msdu_desc_info);
  793. }
  794. /**
  795. * hal_rx_msdu_desc_info_get_li() - Gets the flags related to MSDU descriptor.
  796. * @desc_addr: REO ring descriptor addr
  797. * @msdu_desc_info: Holds MSDU descriptor info from HAL Rx descriptor
  798. *
  799. * Specifically flags needed are: first_msdu_in_mpdu,
  800. * last_msdu_in_mpdu, msdu_continuation, sa_is_valid,
  801. * sa_idx_timeout, da_is_valid, da_idx_timeout, da_is_MCBC
  802. *
  803. * Return: void
  804. */
  805. static inline void
  806. hal_rx_msdu_desc_info_get_li(void *desc_addr,
  807. struct hal_rx_msdu_desc_info *msdu_desc_info)
  808. {
  809. struct reo_destination_ring *reo_dst_ring;
  810. uint32_t *msdu_info;
  811. reo_dst_ring = (struct reo_destination_ring *)desc_addr;
  812. msdu_info = (uint32_t *)&reo_dst_ring->rx_msdu_desc_info_details;
  813. msdu_desc_info->msdu_flags =
  814. hal_rx_msdu_flags_get_li((struct rx_msdu_desc_info *)msdu_info);
  815. msdu_desc_info->msdu_len = HAL_RX_MSDU_PKT_LENGTH_GET(msdu_info);
  816. }
  817. #define HAL_RX_MSDU_START_NSS_GET(_rx_msdu_start) \
  818. (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start), \
  819. RX_MSDU_START_5_NSS_OFFSET)), \
  820. RX_MSDU_START_5_NSS_MASK, \
  821. RX_MSDU_START_5_NSS_LSB))
  822. #define HAL_RX_ATTN_MSDU_LEN_ERR_GET(_rx_attn) \
  823. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
  824. RX_ATTENTION_1_MSDU_LENGTH_ERR_OFFSET)), \
  825. RX_ATTENTION_1_MSDU_LENGTH_ERR_MASK, \
  826. RX_ATTENTION_1_MSDU_LENGTH_ERR_LSB))
  827. /**
  828. * hal_rx_attn_msdu_len_err_get_li() - Get msdu_len_err value from rx
  829. * attention tlvs
  830. * @buf: pointer to rx pkt tlvs hdr
  831. *
  832. * Return: msdu_len_err value
  833. */
  834. static inline uint32_t
  835. hal_rx_attn_msdu_len_err_get_li(uint8_t *buf)
  836. {
  837. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  838. struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
  839. return HAL_RX_ATTN_MSDU_LEN_ERR_GET(rx_attn);
  840. }
  841. #endif /* _HAL_LI_RX_H_ */