cvp_hfi.c 114 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <asm/memory.h>
  6. #include <linux/coresight-stm.h>
  7. #include <linux/delay.h>
  8. #include <linux/devfreq.h>
  9. #include <linux/hash.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/io.h>
  12. #include <linux/iommu.h>
  13. #include <linux/iopoll.h>
  14. #include <linux/of.h>
  15. #include <linux/pm_qos.h>
  16. #include <linux/regulator/consumer.h>
  17. #include <linux/slab.h>
  18. #include <linux/workqueue.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/soc/qcom/llcc-qcom.h>
  21. #include <linux/qcom_scm.h>
  22. #include <linux/soc/qcom/smem.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/reset.h>
  25. #include "hfi_packetization.h"
  26. #include "msm_cvp_debug.h"
  27. #include "cvp_core_hfi.h"
  28. #include "cvp_hfi_helper.h"
  29. #include "cvp_hfi_io.h"
  30. #include "msm_cvp_dsp.h"
  31. #include "msm_cvp_clocks.h"
  32. #define FIRMWARE_SIZE 0X00A00000
  33. #define REG_ADDR_OFFSET_BITMASK 0x000FFFFF
  34. #define QDSS_IOVA_START 0x80001000
  35. #define MIN_PAYLOAD_SIZE 3
  36. struct cvp_tzbsp_memprot {
  37. u32 cp_start;
  38. u32 cp_size;
  39. u32 cp_nonpixel_start;
  40. u32 cp_nonpixel_size;
  41. };
  42. #define TZBSP_PIL_SET_STATE 0xA
  43. #define TZBSP_CVP_PAS_ID 26
  44. /* Poll interval in uS */
  45. #define POLL_INTERVAL_US 50
  46. enum tzbsp_subsys_state {
  47. TZ_SUBSYS_STATE_SUSPEND = 0,
  48. TZ_SUBSYS_STATE_RESUME = 1,
  49. TZ_SUBSYS_STATE_RESTORE_THRESHOLD = 2,
  50. };
  51. const struct msm_cvp_gov_data CVP_DEFAULT_BUS_VOTE = {
  52. .data = NULL,
  53. .data_count = 0,
  54. };
  55. const int cvp_max_packets = 32;
  56. static void iris_hfi_pm_handler(struct work_struct *work);
  57. static DECLARE_DELAYED_WORK(iris_hfi_pm_work, iris_hfi_pm_handler);
  58. static inline int __resume(struct iris_hfi_device *device);
  59. static inline int __suspend(struct iris_hfi_device *device);
  60. static int __disable_regulator(struct iris_hfi_device *device,
  61. const char *name);
  62. static int __enable_regulator(struct iris_hfi_device *device,
  63. const char *name);
  64. static void __flush_debug_queue(struct iris_hfi_device *device, u8 *packet);
  65. static int __initialize_packetization(struct iris_hfi_device *device);
  66. static struct cvp_hal_session *__get_session(struct iris_hfi_device *device,
  67. u32 session_id);
  68. static bool __is_session_valid(struct iris_hfi_device *device,
  69. struct cvp_hal_session *session, const char *func);
  70. static int __iface_cmdq_write(struct iris_hfi_device *device,
  71. void *pkt);
  72. static int __load_fw(struct iris_hfi_device *device);
  73. static void __unload_fw(struct iris_hfi_device *device);
  74. static int __tzbsp_set_cvp_state(enum tzbsp_subsys_state state);
  75. static int __enable_subcaches(struct iris_hfi_device *device);
  76. static int __set_subcaches(struct iris_hfi_device *device);
  77. static int __release_subcaches(struct iris_hfi_device *device);
  78. static int __disable_subcaches(struct iris_hfi_device *device);
  79. static int __power_collapse(struct iris_hfi_device *device, bool force);
  80. static int iris_hfi_noc_error_info(void *dev);
  81. static void interrupt_init_iris2(struct iris_hfi_device *device);
  82. static void setup_dsp_uc_memmap_vpu5(struct iris_hfi_device *device);
  83. static void clock_config_on_enable_vpu5(struct iris_hfi_device *device);
  84. static int reset_ahb2axi_bridge(struct iris_hfi_device *device);
  85. static void power_off_iris2(struct iris_hfi_device *device);
  86. static int __set_ubwc_config(struct iris_hfi_device *device);
  87. static void __noc_error_info_iris2(struct iris_hfi_device *device);
  88. static int __enable_hw_power_collapse(struct iris_hfi_device *device);
  89. static int __power_off_controller(struct iris_hfi_device *device);
  90. static struct iris_hfi_vpu_ops iris2_ops = {
  91. .interrupt_init = interrupt_init_iris2,
  92. .setup_dsp_uc_memmap = setup_dsp_uc_memmap_vpu5,
  93. .clock_config_on_enable = clock_config_on_enable_vpu5,
  94. .reset_ahb2axi_bridge = reset_ahb2axi_bridge,
  95. .power_off = power_off_iris2,
  96. .noc_error_info = __noc_error_info_iris2,
  97. };
  98. /**
  99. * Utility function to enforce some of our assumptions. Spam calls to this
  100. * in hotspots in code to double check some of the assumptions that we hold.
  101. */
  102. static inline void __strict_check(struct iris_hfi_device *device)
  103. {
  104. msm_cvp_res_handle_fatal_hw_error(device->res,
  105. !mutex_is_locked(&device->lock));
  106. }
  107. static inline void __set_state(struct iris_hfi_device *device,
  108. enum iris_hfi_state state)
  109. {
  110. device->state = state;
  111. }
  112. static inline bool __core_in_valid_state(struct iris_hfi_device *device)
  113. {
  114. return device->state != IRIS_STATE_DEINIT;
  115. }
  116. static inline bool is_sys_cache_present(struct iris_hfi_device *device)
  117. {
  118. return device->res->sys_cache_present;
  119. }
  120. #define ROW_SIZE 32
  121. int get_hfi_version(void)
  122. {
  123. struct msm_cvp_core *core;
  124. struct iris_hfi_device *hfi;
  125. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  126. hfi = (struct iris_hfi_device *)core->device->hfi_device_data;
  127. return hfi->version;
  128. }
  129. unsigned int get_msg_size(struct cvp_hfi_msg_session_hdr *hdr)
  130. {
  131. struct msm_cvp_core *core;
  132. struct iris_hfi_device *device;
  133. u32 minor_ver;
  134. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  135. if (core)
  136. device = core->device->hfi_device_data;
  137. else
  138. return 0;
  139. if (!device) {
  140. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  141. return 0;
  142. }
  143. minor_ver = (device->version & HFI_VERSION_MINOR_MASK) >>
  144. HFI_VERSION_MINOR_SHIFT;
  145. if (minor_ver < 2)
  146. return sizeof(struct cvp_hfi_msg_session_hdr);
  147. if (hdr->packet_type == HFI_MSG_SESSION_CVP_FD)
  148. return sizeof(struct cvp_hfi_msg_session_hdr_ext);
  149. else
  150. return sizeof(struct cvp_hfi_msg_session_hdr);
  151. }
  152. unsigned int get_msg_session_id(void *msg)
  153. {
  154. struct cvp_hfi_msg_session_hdr *hdr =
  155. (struct cvp_hfi_msg_session_hdr *)msg;
  156. return hdr->session_id;
  157. }
  158. unsigned int get_msg_errorcode(void *msg)
  159. {
  160. struct cvp_hfi_msg_session_hdr *hdr =
  161. (struct cvp_hfi_msg_session_hdr *)msg;
  162. return hdr->error_type;
  163. }
  164. int get_msg_opconfigs(void *msg, unsigned int *session_id,
  165. unsigned int *error_type, unsigned int *config_id)
  166. {
  167. struct cvp_hfi_msg_session_op_cfg_packet *cfg =
  168. (struct cvp_hfi_msg_session_op_cfg_packet *)msg;
  169. *session_id = cfg->session_id;
  170. *error_type = cfg->error_type;
  171. *config_id = cfg->op_conf_id;
  172. return 0;
  173. }
  174. static void __dump_packet(u8 *packet, enum cvp_msg_prio log_level)
  175. {
  176. u32 c = 0, packet_size = *(u32 *)packet;
  177. /*
  178. * row must contain enough for 0xdeadbaad * 8 to be converted into
  179. * "de ad ba ab " * 8 + '\0'
  180. */
  181. char row[3 * ROW_SIZE];
  182. for (c = 0; c * ROW_SIZE < packet_size; ++c) {
  183. int bytes_to_read = ((c + 1) * ROW_SIZE > packet_size) ?
  184. packet_size % ROW_SIZE : ROW_SIZE;
  185. hex_dump_to_buffer(packet + c * ROW_SIZE, bytes_to_read,
  186. ROW_SIZE, 4, row, sizeof(row), false);
  187. dprintk(log_level, "%s\n", row);
  188. }
  189. }
  190. static int __dsp_suspend(struct iris_hfi_device *device, bool force, u32 flags)
  191. {
  192. int rc;
  193. struct cvp_hal_session *temp;
  194. if (msm_cvp_dsp_disable)
  195. return 0;
  196. list_for_each_entry(temp, &device->sess_head, list) {
  197. /* if forceful suspend, don't check session pause info */
  198. if (force)
  199. continue;
  200. /* don't suspend if cvp session is not paused */
  201. if (!(temp->flags & SESSION_PAUSE)) {
  202. dprintk(CVP_DSP,
  203. "%s: cvp session %x not paused\n",
  204. __func__, hash32_ptr(temp));
  205. return -EBUSY;
  206. }
  207. }
  208. dprintk(CVP_DSP, "%s: suspend dsp\n", __func__);
  209. rc = cvp_dsp_suspend(flags);
  210. if (rc) {
  211. dprintk(CVP_ERR, "%s: dsp suspend failed with error %d\n",
  212. __func__, rc);
  213. return -EINVAL;
  214. }
  215. dprintk(CVP_DSP, "%s: dsp suspended\n", __func__);
  216. return 0;
  217. }
  218. static int __dsp_resume(struct iris_hfi_device *device, u32 flags)
  219. {
  220. int rc;
  221. if (msm_cvp_dsp_disable)
  222. return 0;
  223. dprintk(CVP_DSP, "%s: resume dsp\n", __func__);
  224. rc = cvp_dsp_resume(flags);
  225. if (rc) {
  226. dprintk(CVP_ERR,
  227. "%s: dsp resume failed with error %d\n",
  228. __func__, rc);
  229. return rc;
  230. }
  231. dprintk(CVP_DSP, "%s: dsp resumed\n", __func__);
  232. return rc;
  233. }
  234. static int __dsp_shutdown(struct iris_hfi_device *device, u32 flags)
  235. {
  236. int rc;
  237. if (msm_cvp_dsp_disable)
  238. return 0;
  239. dprintk(CVP_DSP, "%s: shutdown dsp\n", __func__);
  240. rc = cvp_dsp_shutdown(flags);
  241. if (rc) {
  242. dprintk(CVP_ERR,
  243. "%s: dsp shutdown failed with error %d\n",
  244. __func__, rc);
  245. WARN_ON(1);
  246. }
  247. dprintk(CVP_DSP, "%s: dsp shutdown successful\n", __func__);
  248. return rc;
  249. }
  250. static int __acquire_regulator(struct regulator_info *rinfo,
  251. struct iris_hfi_device *device)
  252. {
  253. int rc = 0;
  254. if (rinfo->has_hw_power_collapse) {
  255. rc = regulator_set_mode(rinfo->regulator,
  256. REGULATOR_MODE_NORMAL);
  257. if (rc) {
  258. /*
  259. * This is somewhat fatal, but nothing we can do
  260. * about it. We can't disable the regulator w/o
  261. * getting it back under s/w control
  262. */
  263. dprintk(CVP_WARN,
  264. "Failed to acquire regulator control: %s\n",
  265. rinfo->name);
  266. } else {
  267. dprintk(CVP_PWR,
  268. "Acquire regulator control from HW: %s\n",
  269. rinfo->name);
  270. }
  271. }
  272. if (!regulator_is_enabled(rinfo->regulator)) {
  273. dprintk(CVP_WARN, "Regulator is not enabled %s\n",
  274. rinfo->name);
  275. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  276. }
  277. return rc;
  278. }
  279. static int __hand_off_regulator(struct regulator_info *rinfo)
  280. {
  281. int rc = 0;
  282. if (rinfo->has_hw_power_collapse) {
  283. rc = regulator_set_mode(rinfo->regulator,
  284. REGULATOR_MODE_FAST);
  285. if (rc) {
  286. dprintk(CVP_WARN,
  287. "Failed to hand off regulator control: %s\n",
  288. rinfo->name);
  289. } else {
  290. dprintk(CVP_PWR,
  291. "Hand off regulator control to HW: %s\n",
  292. rinfo->name);
  293. }
  294. }
  295. return rc;
  296. }
  297. static int __hand_off_regulators(struct iris_hfi_device *device)
  298. {
  299. struct regulator_info *rinfo;
  300. int rc = 0, c = 0;
  301. iris_hfi_for_each_regulator(device, rinfo) {
  302. rc = __hand_off_regulator(rinfo);
  303. /*
  304. * If one regulator hand off failed, driver should take
  305. * the control for other regulators back.
  306. */
  307. if (rc)
  308. goto err_reg_handoff_failed;
  309. c++;
  310. }
  311. return rc;
  312. err_reg_handoff_failed:
  313. iris_hfi_for_each_regulator_reverse_continue(device, rinfo, c)
  314. __acquire_regulator(rinfo, device);
  315. return rc;
  316. }
  317. static int __write_queue(struct cvp_iface_q_info *qinfo, u8 *packet,
  318. bool *rx_req_is_set)
  319. {
  320. struct cvp_hfi_queue_header *queue;
  321. u32 packet_size_in_words, new_write_idx;
  322. u32 empty_space, read_idx, write_idx;
  323. u32 *write_ptr;
  324. if (!qinfo || !packet) {
  325. dprintk(CVP_ERR, "Invalid Params\n");
  326. return -EINVAL;
  327. } else if (!qinfo->q_array.align_virtual_addr) {
  328. dprintk(CVP_WARN, "Queues have already been freed\n");
  329. return -EINVAL;
  330. }
  331. queue = (struct cvp_hfi_queue_header *) qinfo->q_hdr;
  332. if (!queue) {
  333. dprintk(CVP_ERR, "queue not present\n");
  334. return -ENOENT;
  335. }
  336. if (msm_cvp_debug & CVP_PKT) {
  337. dprintk(CVP_PKT, "%s: %pK\n", __func__, qinfo);
  338. __dump_packet(packet, CVP_PKT);
  339. }
  340. packet_size_in_words = (*(u32 *)packet) >> 2;
  341. if (!packet_size_in_words || packet_size_in_words >
  342. qinfo->q_array.mem_size>>2) {
  343. dprintk(CVP_ERR, "Invalid packet size\n");
  344. return -ENODATA;
  345. }
  346. spin_lock(&qinfo->hfi_lock);
  347. read_idx = queue->qhdr_read_idx;
  348. write_idx = queue->qhdr_write_idx;
  349. empty_space = (write_idx >= read_idx) ?
  350. ((qinfo->q_array.mem_size>>2) - (write_idx - read_idx)) :
  351. (read_idx - write_idx);
  352. if (empty_space <= packet_size_in_words) {
  353. queue->qhdr_tx_req = 1;
  354. spin_unlock(&qinfo->hfi_lock);
  355. dprintk(CVP_ERR, "Insufficient size (%d) to write (%d)\n",
  356. empty_space, packet_size_in_words);
  357. return -ENOTEMPTY;
  358. }
  359. queue->qhdr_tx_req = 0;
  360. new_write_idx = write_idx + packet_size_in_words;
  361. write_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) +
  362. (write_idx << 2));
  363. if (write_ptr < (u32 *)qinfo->q_array.align_virtual_addr ||
  364. write_ptr > (u32 *)(qinfo->q_array.align_virtual_addr +
  365. qinfo->q_array.mem_size)) {
  366. spin_unlock(&qinfo->hfi_lock);
  367. dprintk(CVP_ERR, "Invalid write index\n");
  368. return -ENODATA;
  369. }
  370. if (new_write_idx < (qinfo->q_array.mem_size >> 2)) {
  371. memcpy(write_ptr, packet, packet_size_in_words << 2);
  372. } else {
  373. new_write_idx -= qinfo->q_array.mem_size >> 2;
  374. memcpy(write_ptr, packet, (packet_size_in_words -
  375. new_write_idx) << 2);
  376. memcpy((void *)qinfo->q_array.align_virtual_addr,
  377. packet + ((packet_size_in_words - new_write_idx) << 2),
  378. new_write_idx << 2);
  379. }
  380. /*
  381. * Memory barrier to make sure packet is written before updating the
  382. * write index
  383. */
  384. mb();
  385. queue->qhdr_write_idx = new_write_idx;
  386. if (rx_req_is_set)
  387. *rx_req_is_set = queue->qhdr_rx_req == 1;
  388. /*
  389. * Memory barrier to make sure write index is updated before an
  390. * interrupt is raised.
  391. */
  392. mb();
  393. spin_unlock(&qinfo->hfi_lock);
  394. return 0;
  395. }
  396. static int __read_queue(struct cvp_iface_q_info *qinfo, u8 *packet,
  397. u32 *pb_tx_req_is_set)
  398. {
  399. struct cvp_hfi_queue_header *queue;
  400. u32 packet_size_in_words, new_read_idx;
  401. u32 *read_ptr;
  402. u32 receive_request = 0;
  403. u32 read_idx, write_idx;
  404. int rc = 0;
  405. if (!qinfo || !packet || !pb_tx_req_is_set) {
  406. dprintk(CVP_ERR, "Invalid Params\n");
  407. return -EINVAL;
  408. } else if (!qinfo->q_array.align_virtual_addr) {
  409. dprintk(CVP_WARN, "Queues have already been freed\n");
  410. return -EINVAL;
  411. }
  412. /*
  413. * Memory barrier to make sure data is valid before
  414. *reading it
  415. */
  416. mb();
  417. queue = (struct cvp_hfi_queue_header *) qinfo->q_hdr;
  418. if (!queue) {
  419. dprintk(CVP_ERR, "Queue memory is not allocated\n");
  420. return -ENOMEM;
  421. }
  422. /*
  423. * Do not set receive request for debug queue, if set,
  424. * Iris generates interrupt for debug messages even
  425. * when there is no response message available.
  426. * In general debug queue will not become full as it
  427. * is being emptied out for every interrupt from Iris.
  428. * Iris will anyway generates interrupt if it is full.
  429. */
  430. spin_lock(&qinfo->hfi_lock);
  431. if (queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_MSG_Q)
  432. receive_request = 1;
  433. read_idx = queue->qhdr_read_idx;
  434. write_idx = queue->qhdr_write_idx;
  435. if (read_idx == write_idx) {
  436. queue->qhdr_rx_req = receive_request;
  437. /*
  438. * mb() to ensure qhdr is updated in main memory
  439. * so that iris reads the updated header values
  440. */
  441. mb();
  442. *pb_tx_req_is_set = 0;
  443. if (write_idx != queue->qhdr_write_idx) {
  444. queue->qhdr_rx_req = 0;
  445. } else {
  446. spin_unlock(&qinfo->hfi_lock);
  447. dprintk(CVP_HFI,
  448. "%s queue is empty, rx_req = %u, tx_req = %u, read_idx = %u\n",
  449. receive_request ? "message" : "debug",
  450. queue->qhdr_rx_req, queue->qhdr_tx_req,
  451. queue->qhdr_read_idx);
  452. return -ENODATA;
  453. }
  454. }
  455. read_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) +
  456. (read_idx << 2));
  457. if (read_ptr < (u32 *)qinfo->q_array.align_virtual_addr ||
  458. read_ptr > (u32 *)(qinfo->q_array.align_virtual_addr +
  459. qinfo->q_array.mem_size - sizeof(*read_ptr))) {
  460. spin_unlock(&qinfo->hfi_lock);
  461. dprintk(CVP_ERR, "Invalid read index\n");
  462. return -ENODATA;
  463. }
  464. packet_size_in_words = (*read_ptr) >> 2;
  465. if (!packet_size_in_words) {
  466. spin_unlock(&qinfo->hfi_lock);
  467. dprintk(CVP_ERR, "Zero packet size\n");
  468. return -ENODATA;
  469. }
  470. new_read_idx = read_idx + packet_size_in_words;
  471. if (((packet_size_in_words << 2) <= CVP_IFACEQ_VAR_HUGE_PKT_SIZE)
  472. && read_idx <= (qinfo->q_array.mem_size >> 2)) {
  473. if (new_read_idx < (qinfo->q_array.mem_size >> 2)) {
  474. memcpy(packet, read_ptr,
  475. packet_size_in_words << 2);
  476. } else {
  477. new_read_idx -= (qinfo->q_array.mem_size >> 2);
  478. memcpy(packet, read_ptr,
  479. (packet_size_in_words - new_read_idx) << 2);
  480. memcpy(packet + ((packet_size_in_words -
  481. new_read_idx) << 2),
  482. (u8 *)qinfo->q_array.align_virtual_addr,
  483. new_read_idx << 2);
  484. }
  485. } else {
  486. dprintk(CVP_WARN,
  487. "BAD packet received, read_idx: %#x, pkt_size: %d\n",
  488. read_idx, packet_size_in_words << 2);
  489. dprintk(CVP_WARN, "Dropping this packet\n");
  490. new_read_idx = write_idx;
  491. rc = -ENODATA;
  492. }
  493. if (new_read_idx != queue->qhdr_write_idx)
  494. queue->qhdr_rx_req = 0;
  495. else
  496. queue->qhdr_rx_req = receive_request;
  497. queue->qhdr_read_idx = new_read_idx;
  498. /*
  499. * mb() to ensure qhdr is updated in main memory
  500. * so that iris reads the updated header values
  501. */
  502. mb();
  503. *pb_tx_req_is_set = (queue->qhdr_tx_req == 1) ? 1 : 0;
  504. spin_unlock(&qinfo->hfi_lock);
  505. if ((msm_cvp_debug & CVP_PKT) &&
  506. !(queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q)) {
  507. dprintk(CVP_PKT, "%s: %pK\n", __func__, qinfo);
  508. __dump_packet(packet, CVP_PKT);
  509. }
  510. return rc;
  511. }
  512. static int __smem_alloc(struct iris_hfi_device *dev, struct cvp_mem_addr *mem,
  513. u32 size, u32 align, u32 flags)
  514. {
  515. struct msm_cvp_smem *alloc = &mem->mem_data;
  516. int rc = 0;
  517. if (!dev || !mem || !size) {
  518. dprintk(CVP_ERR, "Invalid Params\n");
  519. return -EINVAL;
  520. }
  521. dprintk(CVP_INFO, "start to alloc size: %d, flags: %d\n", size, flags);
  522. alloc->flags = flags;
  523. rc = msm_cvp_smem_alloc(size, align, 1, (void *)dev->res, alloc);
  524. if (rc) {
  525. dprintk(CVP_ERR, "Alloc failed\n");
  526. rc = -ENOMEM;
  527. goto fail_smem_alloc;
  528. }
  529. dprintk(CVP_MEM, "%s: ptr = %pK, size = %d\n", __func__,
  530. alloc->kvaddr, size);
  531. mem->mem_size = alloc->size;
  532. mem->align_virtual_addr = alloc->kvaddr;
  533. mem->align_device_addr = alloc->device_addr;
  534. return rc;
  535. fail_smem_alloc:
  536. return rc;
  537. }
  538. static void __smem_free(struct iris_hfi_device *dev, struct msm_cvp_smem *mem)
  539. {
  540. if (!dev || !mem) {
  541. dprintk(CVP_ERR, "invalid param %pK %pK\n", dev, mem);
  542. return;
  543. }
  544. msm_cvp_smem_free(mem);
  545. }
  546. static void __write_register(struct iris_hfi_device *device,
  547. u32 reg, u32 value)
  548. {
  549. u32 hwiosymaddr = reg;
  550. u8 *base_addr;
  551. if (!device) {
  552. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  553. return;
  554. }
  555. __strict_check(device);
  556. if (!device->power_enabled) {
  557. dprintk(CVP_WARN,
  558. "HFI Write register failed : Power is OFF\n");
  559. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  560. return;
  561. }
  562. base_addr = device->cvp_hal_data->register_base;
  563. dprintk(CVP_REG, "Base addr: %pK, written to: %#x, Value: %#x...\n",
  564. base_addr, hwiosymaddr, value);
  565. base_addr += hwiosymaddr;
  566. writel_relaxed(value, base_addr);
  567. /*
  568. * Memory barrier to make sure value is written into the register.
  569. */
  570. wmb();
  571. }
  572. static int __read_gcc_register(struct iris_hfi_device *device, u32 reg)
  573. {
  574. int rc = 0;
  575. u8 *base_addr;
  576. if (!device) {
  577. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  578. return -EINVAL;
  579. }
  580. __strict_check(device);
  581. if (!device->power_enabled) {
  582. dprintk(CVP_WARN,
  583. "%s HFI Read register failed : Power is OFF\n",
  584. __func__);
  585. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  586. return -EINVAL;
  587. }
  588. base_addr = device->cvp_hal_data->gcc_reg_base;
  589. rc = readl_relaxed(base_addr + reg);
  590. /*
  591. * Memory barrier to make sure value is read correctly from the
  592. * register.
  593. */
  594. rmb();
  595. dprintk(CVP_REG,
  596. "GCC Base addr: %pK, read from: %#x, value: %#x...\n",
  597. base_addr, reg, rc);
  598. return rc;
  599. }
  600. static int __read_register(struct iris_hfi_device *device, u32 reg)
  601. {
  602. int rc = 0;
  603. u8 *base_addr;
  604. if (!device) {
  605. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  606. return -EINVAL;
  607. }
  608. __strict_check(device);
  609. if (!device->power_enabled) {
  610. dprintk(CVP_WARN,
  611. "HFI Read register failed : Power is OFF\n");
  612. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  613. return -EINVAL;
  614. }
  615. base_addr = device->cvp_hal_data->register_base;
  616. rc = readl_relaxed(base_addr + reg);
  617. /*
  618. * Memory barrier to make sure value is read correctly from the
  619. * register.
  620. */
  621. rmb();
  622. dprintk(CVP_REG, "Base addr: %pK, read from: %#x, value: %#x...\n",
  623. base_addr, reg, rc);
  624. return rc;
  625. }
  626. static void __set_registers(struct iris_hfi_device *device)
  627. {
  628. struct reg_set *reg_set;
  629. int i;
  630. if (!device->res) {
  631. dprintk(CVP_ERR,
  632. "device resources null, cannot set registers\n");
  633. return;
  634. }
  635. reg_set = &device->res->reg_set;
  636. for (i = 0; i < reg_set->count; i++) {
  637. __write_register(device, reg_set->reg_tbl[i].reg,
  638. reg_set->reg_tbl[i].value);
  639. dprintk(CVP_REG, "write_reg offset=%x, val=%x\n",
  640. reg_set->reg_tbl[i].reg,
  641. reg_set->reg_tbl[i].value);
  642. }
  643. }
  644. /*
  645. * The existence of this function is a hack for 8996 (or certain Iris versions)
  646. * to overcome a hardware bug. Whenever the GDSCs momentarily power collapse
  647. * (after calling __hand_off_regulators()), the values of the threshold
  648. * registers (typically programmed by TZ) are incorrectly reset. As a result
  649. * reprogram these registers at certain agreed upon points.
  650. */
  651. static void __set_threshold_registers(struct iris_hfi_device *device)
  652. {
  653. u32 version = __read_register(device, CVP_WRAPPER_HW_VERSION);
  654. version &= ~GENMASK(15, 0);
  655. if (version != (0x3 << 28 | 0x43 << 16))
  656. return;
  657. if (__tzbsp_set_cvp_state(TZ_SUBSYS_STATE_RESTORE_THRESHOLD))
  658. dprintk(CVP_ERR, "Failed to restore threshold values\n");
  659. }
  660. static int __unvote_buses(struct iris_hfi_device *device)
  661. {
  662. int rc = 0;
  663. struct bus_info *bus = NULL;
  664. kfree(device->bus_vote.data);
  665. device->bus_vote.data = NULL;
  666. device->bus_vote.data_count = 0;
  667. iris_hfi_for_each_bus(device, bus) {
  668. rc = icc_set_bw(bus->client, 0, 0);
  669. if (rc) {
  670. dprintk(CVP_ERR,
  671. "%s: Failed unvoting bus\n", __func__);
  672. goto err_unknown_device;
  673. }
  674. }
  675. err_unknown_device:
  676. return rc;
  677. }
  678. static int __vote_buses(struct iris_hfi_device *device,
  679. struct cvp_bus_vote_data *data, int num_data)
  680. {
  681. int rc = 0;
  682. struct bus_info *bus = NULL;
  683. struct cvp_bus_vote_data *new_data = NULL;
  684. if (!num_data) {
  685. dprintk(CVP_PWR, "No vote data available\n");
  686. goto no_data_count;
  687. } else if (!data) {
  688. dprintk(CVP_ERR, "Invalid voting data\n");
  689. return -EINVAL;
  690. }
  691. new_data = kmemdup(data, num_data * sizeof(*new_data), GFP_KERNEL);
  692. if (!new_data) {
  693. dprintk(CVP_ERR, "Can't alloc memory to cache bus votes\n");
  694. rc = -ENOMEM;
  695. goto err_no_mem;
  696. }
  697. no_data_count:
  698. kfree(device->bus_vote.data);
  699. device->bus_vote.data = new_data;
  700. device->bus_vote.data_count = num_data;
  701. iris_hfi_for_each_bus(device, bus) {
  702. if (bus) {
  703. rc = icc_set_bw(bus->client, bus->range[1], 0);
  704. if (rc)
  705. dprintk(CVP_ERR,
  706. "Failed voting bus %s to ab %u\n",
  707. bus->name, bus->range[1]*1000);
  708. }
  709. }
  710. err_no_mem:
  711. return rc;
  712. }
  713. static int iris_hfi_vote_buses(void *dev, struct cvp_bus_vote_data *d, int n)
  714. {
  715. int rc = 0;
  716. struct iris_hfi_device *device = dev;
  717. if (!device)
  718. return -EINVAL;
  719. mutex_lock(&device->lock);
  720. rc = __vote_buses(device, d, n);
  721. mutex_unlock(&device->lock);
  722. return rc;
  723. }
  724. static int __core_set_resource(struct iris_hfi_device *device,
  725. struct cvp_resource_hdr *resource_hdr, void *resource_value)
  726. {
  727. struct cvp_hfi_cmd_sys_set_resource_packet *pkt;
  728. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  729. int rc = 0;
  730. if (!device || !resource_hdr || !resource_value) {
  731. dprintk(CVP_ERR, "set_res: Invalid Params\n");
  732. return -EINVAL;
  733. }
  734. pkt = (struct cvp_hfi_cmd_sys_set_resource_packet *) packet;
  735. rc = call_hfi_pkt_op(device, sys_set_resource,
  736. pkt, resource_hdr, resource_value);
  737. if (rc) {
  738. dprintk(CVP_ERR, "set_res: failed to create packet\n");
  739. goto err_create_pkt;
  740. }
  741. rc = __iface_cmdq_write(device, pkt);
  742. if (rc)
  743. rc = -ENOTEMPTY;
  744. err_create_pkt:
  745. return rc;
  746. }
  747. static int __core_release_resource(struct iris_hfi_device *device,
  748. struct cvp_resource_hdr *resource_hdr)
  749. {
  750. struct cvp_hfi_cmd_sys_release_resource_packet *pkt;
  751. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  752. int rc = 0;
  753. if (!device || !resource_hdr) {
  754. dprintk(CVP_ERR, "release_res: Invalid Params\n");
  755. return -EINVAL;
  756. }
  757. pkt = (struct cvp_hfi_cmd_sys_release_resource_packet *) packet;
  758. rc = call_hfi_pkt_op(device, sys_release_resource,
  759. pkt, resource_hdr);
  760. if (rc) {
  761. dprintk(CVP_ERR, "release_res: failed to create packet\n");
  762. goto err_create_pkt;
  763. }
  764. rc = __iface_cmdq_write(device, pkt);
  765. if (rc)
  766. rc = -ENOTEMPTY;
  767. err_create_pkt:
  768. return rc;
  769. }
  770. static int __tzbsp_set_cvp_state(enum tzbsp_subsys_state state)
  771. {
  772. int rc = 0;
  773. rc = qcom_scm_set_remote_state(state, TZBSP_CVP_PAS_ID);
  774. dprintk(CVP_CORE, "Set state %d, resp %d\n", state, rc);
  775. if (rc) {
  776. dprintk(CVP_ERR, "Failed qcom_scm_set_remote_state %d\n", rc);
  777. return rc;
  778. }
  779. return 0;
  780. }
  781. static inline int __boot_firmware(struct iris_hfi_device *device)
  782. {
  783. int rc = 0, loop = 10;
  784. u32 ctrl_init_val = 0, ctrl_status = 0, count = 0, max_tries = 1000;
  785. u32 reg_gdsc;
  786. /*
  787. * Hand off control of regulators to h/w _after_ enabling clocks.
  788. * Note that the GDSC will turn off when switching from normal
  789. * (s/w triggered) to fast (HW triggered) unless the h/w vote is
  790. * present. Since Iris isn't up yet, the GDSC will be off briefly.
  791. */
  792. if (__enable_hw_power_collapse(device))
  793. dprintk(CVP_ERR, "Failed to enabled inter-frame PC\n");
  794. while (loop) {
  795. reg_gdsc = __read_register(device, CVP_CC_MVS1_GDSCR);
  796. if (reg_gdsc & 0x80000000) {
  797. usleep_range(100, 200);
  798. loop--;
  799. } else {
  800. break;
  801. }
  802. }
  803. if (!loop)
  804. dprintk(CVP_ERR, "fail to power off CORE during resume\n");
  805. ctrl_init_val = BIT(0);
  806. __write_register(device, CVP_CTRL_INIT, ctrl_init_val);
  807. while (!ctrl_status && count < max_tries) {
  808. ctrl_status = __read_register(device, CVP_CTRL_STATUS);
  809. if ((ctrl_status & CVP_CTRL_ERROR_STATUS__M) == 0x4) {
  810. dprintk(CVP_ERR, "invalid setting for UC_REGION\n");
  811. rc = -ENODATA;
  812. break;
  813. }
  814. /* Reduce to 1/100th and x100 of max_tries */
  815. usleep_range(500, 1000);
  816. count++;
  817. }
  818. if (!(ctrl_status & CVP_CTRL_INIT_STATUS__M)) {
  819. dprintk(CVP_ERR, "Failed to boot FW status: %x\n",
  820. ctrl_status);
  821. rc = -ENODEV;
  822. }
  823. /* Enable interrupt before sending commands to tensilica */
  824. __write_register(device, CVP_CPU_CS_H2XSOFTINTEN, 0x1);
  825. __write_register(device, CVP_CPU_CS_X2RPMh, 0x0);
  826. return rc;
  827. }
  828. static int iris_hfi_resume(void *dev)
  829. {
  830. int rc = 0;
  831. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  832. if (!device) {
  833. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  834. return -EINVAL;
  835. }
  836. dprintk(CVP_CORE, "Resuming Iris\n");
  837. mutex_lock(&device->lock);
  838. rc = __resume(device);
  839. mutex_unlock(&device->lock);
  840. return rc;
  841. }
  842. static int iris_hfi_suspend(void *dev)
  843. {
  844. int rc = 0;
  845. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  846. if (!device) {
  847. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  848. return -EINVAL;
  849. } else if (!device->res->sw_power_collapsible) {
  850. return -ENOTSUPP;
  851. }
  852. dprintk(CVP_CORE, "Suspending Iris\n");
  853. mutex_lock(&device->lock);
  854. rc = __power_collapse(device, true);
  855. if (rc) {
  856. dprintk(CVP_WARN, "%s: Iris is busy\n", __func__);
  857. rc = -EBUSY;
  858. }
  859. mutex_unlock(&device->lock);
  860. /* Cancel pending delayed works if any */
  861. if (!rc)
  862. cancel_delayed_work(&iris_hfi_pm_work);
  863. return rc;
  864. }
  865. static void cvp_dump_csr(struct iris_hfi_device *dev)
  866. {
  867. u32 reg;
  868. if (!dev)
  869. return;
  870. if (!dev->power_enabled || dev->reg_dumped)
  871. return;
  872. reg = __read_register(dev, CVP_WRAPPER_CPU_STATUS);
  873. dprintk(CVP_ERR, "CVP_WRAPPER_CPU_STATUS: %x\n", reg);
  874. reg = __read_register(dev, CVP_CPU_CS_SCIACMDARG0);
  875. dprintk(CVP_ERR, "CVP_CPU_CS_SCIACMDARG0: %x\n", reg);
  876. reg = __read_register(dev, CVP_WRAPPER_CPU_CLOCK_CONFIG);
  877. dprintk(CVP_ERR, "CVP_WRAPPER_CPU_CLOCK_CONFIG: %x\n", reg);
  878. reg = __read_register(dev, CVP_WRAPPER_CORE_CLOCK_CONFIG);
  879. dprintk(CVP_ERR, "CVP_WRAPPER_CORE_CLOCK_CONFIG: %x\n", reg);
  880. reg = __read_register(dev, CVP_WRAPPER_INTR_STATUS);
  881. dprintk(CVP_ERR, "CVP_WRAPPER_INTR_STATUS: %x\n", reg);
  882. reg = __read_register(dev, CVP_CPU_CS_H2ASOFTINT);
  883. dprintk(CVP_ERR, "CVP_CPU_CS_H2ASOFTINT: %x\n", reg);
  884. reg = __read_register(dev, CVP_CPU_CS_A2HSOFTINT);
  885. dprintk(CVP_ERR, "CVP_CPU_CS_A2HSOFTINT: %x\n", reg);
  886. reg = __read_register(dev, CVP_CC_MVS1C_GDSCR);
  887. dprintk(CVP_ERR, "CVP_CC_MVS1C_GDSCR: %x\n", reg);
  888. reg = __read_register(dev, CVP_CC_MVS1C_CBCR);
  889. dprintk(CVP_ERR, "CVP_CC_MVS1C_CBCR: %x\n", reg);
  890. dev->reg_dumped = true;
  891. }
  892. static int iris_hfi_flush_debug_queue(void *dev)
  893. {
  894. int rc = 0;
  895. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  896. if (!device) {
  897. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  898. return -EINVAL;
  899. }
  900. cvp_dump_csr(device);
  901. mutex_lock(&device->lock);
  902. if (!device->power_enabled) {
  903. dprintk(CVP_WARN, "%s: iris power off\n", __func__);
  904. rc = -EINVAL;
  905. goto exit;
  906. }
  907. __flush_debug_queue(device, NULL);
  908. exit:
  909. mutex_unlock(&device->lock);
  910. return rc;
  911. }
  912. static int iris_hfi_scale_clocks(void *dev, u32 freq)
  913. {
  914. int rc = 0;
  915. struct iris_hfi_device *device = dev;
  916. if (!device) {
  917. dprintk(CVP_ERR, "Invalid args: %pK\n", device);
  918. return -EINVAL;
  919. }
  920. mutex_lock(&device->lock);
  921. if (__resume(device)) {
  922. dprintk(CVP_ERR, "Resume from power collapse failed\n");
  923. rc = -ENODEV;
  924. goto exit;
  925. }
  926. rc = msm_cvp_set_clocks_impl(device, freq);
  927. exit:
  928. mutex_unlock(&device->lock);
  929. return rc;
  930. }
  931. /* Writes into cmdq without raising an interrupt */
  932. static int __iface_cmdq_write_relaxed(struct iris_hfi_device *device,
  933. void *pkt, bool *requires_interrupt)
  934. {
  935. struct cvp_iface_q_info *q_info;
  936. struct cvp_hal_cmd_pkt_hdr *cmd_packet;
  937. int result = -E2BIG;
  938. if (!device || !pkt) {
  939. dprintk(CVP_ERR, "Invalid Params\n");
  940. return -EINVAL;
  941. }
  942. __strict_check(device);
  943. if (!__core_in_valid_state(device)) {
  944. dprintk(CVP_ERR, "%s - fw not in init state\n", __func__);
  945. result = -EINVAL;
  946. goto err_q_null;
  947. }
  948. cmd_packet = (struct cvp_hal_cmd_pkt_hdr *)pkt;
  949. device->last_packet_type = cmd_packet->packet_type;
  950. q_info = &device->iface_queues[CVP_IFACEQ_CMDQ_IDX];
  951. if (!q_info) {
  952. dprintk(CVP_ERR, "cannot write to shared Q's\n");
  953. goto err_q_null;
  954. }
  955. if (!q_info->q_array.align_virtual_addr) {
  956. dprintk(CVP_ERR, "cannot write to shared CMD Q's\n");
  957. result = -ENODATA;
  958. goto err_q_null;
  959. }
  960. if (__resume(device)) {
  961. dprintk(CVP_ERR, "%s: Power on failed\n", __func__);
  962. goto err_q_write;
  963. }
  964. if (!__write_queue(q_info, (u8 *)pkt, requires_interrupt)) {
  965. if (device->res->sw_power_collapsible) {
  966. cancel_delayed_work(&iris_hfi_pm_work);
  967. if (!queue_delayed_work(device->iris_pm_workq,
  968. &iris_hfi_pm_work,
  969. msecs_to_jiffies(
  970. device->res->msm_cvp_pwr_collapse_delay))) {
  971. dprintk(CVP_PWR,
  972. "PM work already scheduled\n");
  973. }
  974. }
  975. result = 0;
  976. } else {
  977. dprintk(CVP_ERR, "__iface_cmdq_write: queue full\n");
  978. }
  979. err_q_write:
  980. err_q_null:
  981. return result;
  982. }
  983. static int __iface_cmdq_write(struct iris_hfi_device *device, void *pkt)
  984. {
  985. bool needs_interrupt = false;
  986. int rc = __iface_cmdq_write_relaxed(device, pkt, &needs_interrupt);
  987. if (!rc && needs_interrupt) {
  988. /* Consumer of cmdq prefers that we raise an interrupt */
  989. rc = 0;
  990. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  991. }
  992. return rc;
  993. }
  994. static int __iface_msgq_read(struct iris_hfi_device *device, void *pkt)
  995. {
  996. u32 tx_req_is_set = 0;
  997. int rc = 0;
  998. struct cvp_iface_q_info *q_info;
  999. if (!pkt) {
  1000. dprintk(CVP_ERR, "Invalid Params\n");
  1001. return -EINVAL;
  1002. }
  1003. __strict_check(device);
  1004. if (!__core_in_valid_state(device)) {
  1005. dprintk(CVP_WARN, "%s - fw not in init state\n", __func__);
  1006. rc = -EINVAL;
  1007. goto read_error_null;
  1008. }
  1009. q_info = &device->iface_queues[CVP_IFACEQ_MSGQ_IDX];
  1010. if (q_info->q_array.align_virtual_addr == NULL) {
  1011. dprintk(CVP_ERR, "cannot read from shared MSG Q's\n");
  1012. rc = -ENODATA;
  1013. goto read_error_null;
  1014. }
  1015. if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) {
  1016. if (tx_req_is_set)
  1017. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1018. rc = 0;
  1019. } else
  1020. rc = -ENODATA;
  1021. read_error_null:
  1022. return rc;
  1023. }
  1024. static int __iface_dbgq_read(struct iris_hfi_device *device, void *pkt)
  1025. {
  1026. u32 tx_req_is_set = 0;
  1027. int rc = 0;
  1028. struct cvp_iface_q_info *q_info;
  1029. if (!pkt) {
  1030. dprintk(CVP_ERR, "Invalid Params\n");
  1031. return -EINVAL;
  1032. }
  1033. __strict_check(device);
  1034. q_info = &device->iface_queues[CVP_IFACEQ_DBGQ_IDX];
  1035. if (q_info->q_array.align_virtual_addr == NULL) {
  1036. dprintk(CVP_ERR, "cannot read from shared DBG Q's\n");
  1037. rc = -ENODATA;
  1038. goto dbg_error_null;
  1039. }
  1040. if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) {
  1041. if (tx_req_is_set)
  1042. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1043. rc = 0;
  1044. } else
  1045. rc = -ENODATA;
  1046. dbg_error_null:
  1047. return rc;
  1048. }
  1049. static void __set_queue_hdr_defaults(struct cvp_hfi_queue_header *q_hdr)
  1050. {
  1051. q_hdr->qhdr_status = 0x1;
  1052. q_hdr->qhdr_type = CVP_IFACEQ_DFLT_QHDR;
  1053. q_hdr->qhdr_q_size = CVP_IFACEQ_QUEUE_SIZE / 4;
  1054. q_hdr->qhdr_pkt_size = 0;
  1055. q_hdr->qhdr_rx_wm = 0x1;
  1056. q_hdr->qhdr_tx_wm = 0x1;
  1057. q_hdr->qhdr_rx_req = 0x1;
  1058. q_hdr->qhdr_tx_req = 0x0;
  1059. q_hdr->qhdr_rx_irq_status = 0x0;
  1060. q_hdr->qhdr_tx_irq_status = 0x0;
  1061. q_hdr->qhdr_read_idx = 0x0;
  1062. q_hdr->qhdr_write_idx = 0x0;
  1063. }
  1064. static void __interface_dsp_queues_release(struct iris_hfi_device *device)
  1065. {
  1066. int i;
  1067. struct msm_cvp_smem *mem_data = &device->dsp_iface_q_table.mem_data;
  1068. struct context_bank_info *cb = mem_data->mapping_info.cb_info;
  1069. if (!device->dsp_iface_q_table.align_virtual_addr) {
  1070. dprintk(CVP_ERR, "%s: already released\n", __func__);
  1071. return;
  1072. }
  1073. dma_unmap_single_attrs(cb->dev, mem_data->device_addr,
  1074. mem_data->size, DMA_BIDIRECTIONAL, 0);
  1075. dma_free_coherent(device->res->mem_cdsp.dev, mem_data->size,
  1076. mem_data->kvaddr, mem_data->dma_handle);
  1077. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1078. device->dsp_iface_queues[i].q_hdr = NULL;
  1079. device->dsp_iface_queues[i].q_array.align_virtual_addr = NULL;
  1080. device->dsp_iface_queues[i].q_array.align_device_addr = 0;
  1081. }
  1082. device->dsp_iface_q_table.align_virtual_addr = NULL;
  1083. device->dsp_iface_q_table.align_device_addr = 0;
  1084. }
  1085. static int __interface_dsp_queues_init(struct iris_hfi_device *dev)
  1086. {
  1087. int rc = 0;
  1088. u32 i;
  1089. struct cvp_iface_q_info *iface_q;
  1090. int offset = 0;
  1091. phys_addr_t fw_bias = 0;
  1092. size_t q_size;
  1093. struct msm_cvp_smem *mem_data;
  1094. void *kvaddr;
  1095. dma_addr_t dma_handle;
  1096. dma_addr_t iova;
  1097. struct context_bank_info *cb;
  1098. q_size = ALIGN(QUEUE_SIZE, SZ_1M);
  1099. mem_data = &dev->dsp_iface_q_table.mem_data;
  1100. /* Allocate dsp queues from CDSP device memory */
  1101. kvaddr = dma_alloc_coherent(dev->res->mem_cdsp.dev, q_size,
  1102. &dma_handle, GFP_KERNEL);
  1103. if (IS_ERR_OR_NULL(kvaddr)) {
  1104. dprintk(CVP_ERR, "%s: failed dma allocation\n", __func__);
  1105. goto fail_dma_alloc;
  1106. }
  1107. cb = msm_cvp_smem_get_context_bank(dev->res, 0);
  1108. if (!cb) {
  1109. dprintk(CVP_ERR,
  1110. "%s: failed to get context bank\n", __func__);
  1111. goto fail_dma_map;
  1112. }
  1113. iova = dma_map_single_attrs(cb->dev, phys_to_virt(dma_handle),
  1114. q_size, DMA_BIDIRECTIONAL, 0);
  1115. if (dma_mapping_error(cb->dev, iova)) {
  1116. dprintk(CVP_ERR, "%s: failed dma mapping\n", __func__);
  1117. goto fail_dma_map;
  1118. }
  1119. dprintk(CVP_DSP,
  1120. "%s: kvaddr %pK dma_handle %#llx iova %#llx size %zd\n",
  1121. __func__, kvaddr, dma_handle, iova, q_size);
  1122. memset(mem_data, 0, sizeof(struct msm_cvp_smem));
  1123. mem_data->kvaddr = kvaddr;
  1124. mem_data->device_addr = iova;
  1125. mem_data->dma_handle = dma_handle;
  1126. mem_data->size = q_size;
  1127. mem_data->mapping_info.cb_info = cb;
  1128. if (!is_iommu_present(dev->res))
  1129. fw_bias = dev->cvp_hal_data->firmware_base;
  1130. dev->dsp_iface_q_table.align_virtual_addr = kvaddr;
  1131. dev->dsp_iface_q_table.align_device_addr = iova - fw_bias;
  1132. dev->dsp_iface_q_table.mem_size = CVP_IFACEQ_TABLE_SIZE;
  1133. offset = dev->dsp_iface_q_table.mem_size;
  1134. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1135. iface_q = &dev->dsp_iface_queues[i];
  1136. iface_q->q_array.align_device_addr = iova + offset - fw_bias;
  1137. iface_q->q_array.align_virtual_addr = kvaddr + offset;
  1138. iface_q->q_array.mem_size = CVP_IFACEQ_QUEUE_SIZE;
  1139. offset += iface_q->q_array.mem_size;
  1140. spin_lock_init(&iface_q->hfi_lock);
  1141. }
  1142. cvp_dsp_init_hfi_queue_hdr(dev);
  1143. return rc;
  1144. fail_dma_map:
  1145. dma_free_coherent(dev->res->mem_cdsp.dev, q_size, kvaddr, dma_handle);
  1146. fail_dma_alloc:
  1147. return -ENOMEM;
  1148. }
  1149. static void __interface_queues_release(struct iris_hfi_device *device)
  1150. {
  1151. int i;
  1152. struct cvp_hfi_mem_map_table *qdss;
  1153. struct cvp_hfi_mem_map *mem_map;
  1154. int num_entries = device->res->qdss_addr_set.count;
  1155. unsigned long mem_map_table_base_addr;
  1156. struct context_bank_info *cb;
  1157. if (device->qdss.align_virtual_addr) {
  1158. qdss = (struct cvp_hfi_mem_map_table *)
  1159. device->qdss.align_virtual_addr;
  1160. qdss->mem_map_num_entries = num_entries;
  1161. mem_map_table_base_addr =
  1162. device->qdss.align_device_addr +
  1163. sizeof(struct cvp_hfi_mem_map_table);
  1164. qdss->mem_map_table_base_addr =
  1165. (u32)mem_map_table_base_addr;
  1166. if ((unsigned long)qdss->mem_map_table_base_addr !=
  1167. mem_map_table_base_addr) {
  1168. dprintk(CVP_ERR,
  1169. "Invalid mem_map_table_base_addr %#lx",
  1170. mem_map_table_base_addr);
  1171. }
  1172. mem_map = (struct cvp_hfi_mem_map *)(qdss + 1);
  1173. cb = msm_cvp_smem_get_context_bank(device->res, 0);
  1174. for (i = 0; cb && i < num_entries; i++) {
  1175. iommu_unmap(cb->domain,
  1176. mem_map[i].virtual_addr,
  1177. mem_map[i].size);
  1178. }
  1179. __smem_free(device, &device->qdss.mem_data);
  1180. }
  1181. __smem_free(device, &device->iface_q_table.mem_data);
  1182. __smem_free(device, &device->sfr.mem_data);
  1183. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1184. device->iface_queues[i].q_hdr = NULL;
  1185. device->iface_queues[i].q_array.align_virtual_addr = NULL;
  1186. device->iface_queues[i].q_array.align_device_addr = 0;
  1187. }
  1188. device->iface_q_table.align_virtual_addr = NULL;
  1189. device->iface_q_table.align_device_addr = 0;
  1190. device->qdss.align_virtual_addr = NULL;
  1191. device->qdss.align_device_addr = 0;
  1192. device->sfr.align_virtual_addr = NULL;
  1193. device->sfr.align_device_addr = 0;
  1194. device->mem_addr.align_virtual_addr = NULL;
  1195. device->mem_addr.align_device_addr = 0;
  1196. __interface_dsp_queues_release(device);
  1197. }
  1198. static int __get_qdss_iommu_virtual_addr(struct iris_hfi_device *dev,
  1199. struct cvp_hfi_mem_map *mem_map,
  1200. struct iommu_domain *domain)
  1201. {
  1202. int i;
  1203. int rc = 0;
  1204. dma_addr_t iova = QDSS_IOVA_START;
  1205. int num_entries = dev->res->qdss_addr_set.count;
  1206. struct addr_range *qdss_addr_tbl = dev->res->qdss_addr_set.addr_tbl;
  1207. if (!num_entries)
  1208. return -ENODATA;
  1209. for (i = 0; i < num_entries; i++) {
  1210. if (domain) {
  1211. rc = iommu_map(domain, iova,
  1212. qdss_addr_tbl[i].start,
  1213. qdss_addr_tbl[i].size,
  1214. IOMMU_READ | IOMMU_WRITE);
  1215. if (rc) {
  1216. dprintk(CVP_ERR,
  1217. "IOMMU QDSS mapping failed for addr %#x\n",
  1218. qdss_addr_tbl[i].start);
  1219. rc = -ENOMEM;
  1220. break;
  1221. }
  1222. } else {
  1223. iova = qdss_addr_tbl[i].start;
  1224. }
  1225. mem_map[i].virtual_addr = (u32)iova;
  1226. mem_map[i].physical_addr = qdss_addr_tbl[i].start;
  1227. mem_map[i].size = qdss_addr_tbl[i].size;
  1228. mem_map[i].attr = 0x0;
  1229. iova += mem_map[i].size;
  1230. }
  1231. if (i < num_entries) {
  1232. dprintk(CVP_ERR,
  1233. "QDSS mapping failed, Freeing other entries %d\n", i);
  1234. for (--i; domain && i >= 0; i--) {
  1235. iommu_unmap(domain,
  1236. mem_map[i].virtual_addr,
  1237. mem_map[i].size);
  1238. }
  1239. }
  1240. return rc;
  1241. }
  1242. static void __setup_ucregion_memory_map(struct iris_hfi_device *device)
  1243. {
  1244. __write_register(device, CVP_UC_REGION_ADDR,
  1245. (u32)device->iface_q_table.align_device_addr);
  1246. __write_register(device, CVP_UC_REGION_SIZE, SHARED_QSIZE);
  1247. __write_register(device, CVP_QTBL_ADDR,
  1248. (u32)device->iface_q_table.align_device_addr);
  1249. __write_register(device, CVP_QTBL_INFO, 0x01);
  1250. if (device->sfr.align_device_addr)
  1251. __write_register(device, CVP_SFR_ADDR,
  1252. (u32)device->sfr.align_device_addr);
  1253. if (device->qdss.align_device_addr)
  1254. __write_register(device, CVP_MMAP_ADDR,
  1255. (u32)device->qdss.align_device_addr);
  1256. call_iris_op(device, setup_dsp_uc_memmap, device);
  1257. }
  1258. static int __interface_queues_init(struct iris_hfi_device *dev)
  1259. {
  1260. struct cvp_hfi_queue_table_header *q_tbl_hdr;
  1261. struct cvp_hfi_queue_header *q_hdr;
  1262. u32 i;
  1263. int rc = 0;
  1264. struct cvp_hfi_mem_map_table *qdss;
  1265. struct cvp_hfi_mem_map *mem_map;
  1266. struct cvp_iface_q_info *iface_q;
  1267. struct cvp_hfi_sfr_struct *vsfr;
  1268. struct cvp_mem_addr *mem_addr;
  1269. int offset = 0;
  1270. int num_entries = dev->res->qdss_addr_set.count;
  1271. phys_addr_t fw_bias = 0;
  1272. size_t q_size;
  1273. unsigned long mem_map_table_base_addr;
  1274. struct context_bank_info *cb;
  1275. q_size = SHARED_QSIZE - ALIGNED_SFR_SIZE - ALIGNED_QDSS_SIZE;
  1276. mem_addr = &dev->mem_addr;
  1277. if (!is_iommu_present(dev->res))
  1278. fw_bias = dev->cvp_hal_data->firmware_base;
  1279. rc = __smem_alloc(dev, mem_addr, q_size, 1, SMEM_UNCACHED);
  1280. if (rc) {
  1281. dprintk(CVP_ERR, "iface_q_table_alloc_fail\n");
  1282. goto fail_alloc_queue;
  1283. }
  1284. dev->iface_q_table.align_virtual_addr = mem_addr->align_virtual_addr;
  1285. dev->iface_q_table.align_device_addr = mem_addr->align_device_addr -
  1286. fw_bias;
  1287. dev->iface_q_table.mem_size = CVP_IFACEQ_TABLE_SIZE;
  1288. dev->iface_q_table.mem_data = mem_addr->mem_data;
  1289. offset += dev->iface_q_table.mem_size;
  1290. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1291. iface_q = &dev->iface_queues[i];
  1292. iface_q->q_array.align_device_addr = mem_addr->align_device_addr
  1293. + offset - fw_bias;
  1294. iface_q->q_array.align_virtual_addr =
  1295. mem_addr->align_virtual_addr + offset;
  1296. iface_q->q_array.mem_size = CVP_IFACEQ_QUEUE_SIZE;
  1297. offset += iface_q->q_array.mem_size;
  1298. iface_q->q_hdr = CVP_IFACEQ_GET_QHDR_START_ADDR(
  1299. dev->iface_q_table.align_virtual_addr, i);
  1300. __set_queue_hdr_defaults(iface_q->q_hdr);
  1301. spin_lock_init(&iface_q->hfi_lock);
  1302. }
  1303. if ((msm_cvp_fw_debug_mode & HFI_DEBUG_MODE_QDSS) && num_entries) {
  1304. rc = __smem_alloc(dev, mem_addr, ALIGNED_QDSS_SIZE, 1,
  1305. SMEM_UNCACHED);
  1306. if (rc) {
  1307. dprintk(CVP_WARN,
  1308. "qdss_alloc_fail: QDSS messages logging will not work\n");
  1309. dev->qdss.align_device_addr = 0;
  1310. } else {
  1311. dev->qdss.align_device_addr =
  1312. mem_addr->align_device_addr - fw_bias;
  1313. dev->qdss.align_virtual_addr =
  1314. mem_addr->align_virtual_addr;
  1315. dev->qdss.mem_size = ALIGNED_QDSS_SIZE;
  1316. dev->qdss.mem_data = mem_addr->mem_data;
  1317. }
  1318. }
  1319. rc = __smem_alloc(dev, mem_addr, ALIGNED_SFR_SIZE, 1, SMEM_UNCACHED);
  1320. if (rc) {
  1321. dprintk(CVP_WARN, "sfr_alloc_fail: SFR not will work\n");
  1322. dev->sfr.align_device_addr = 0;
  1323. } else {
  1324. dev->sfr.align_device_addr = mem_addr->align_device_addr -
  1325. fw_bias;
  1326. dev->sfr.align_virtual_addr = mem_addr->align_virtual_addr;
  1327. dev->sfr.mem_size = ALIGNED_SFR_SIZE;
  1328. dev->sfr.mem_data = mem_addr->mem_data;
  1329. }
  1330. q_tbl_hdr = (struct cvp_hfi_queue_table_header *)
  1331. dev->iface_q_table.align_virtual_addr;
  1332. q_tbl_hdr->qtbl_version = 0;
  1333. q_tbl_hdr->device_addr = (void *)dev;
  1334. strlcpy(q_tbl_hdr->name, "msm_cvp", sizeof(q_tbl_hdr->name));
  1335. q_tbl_hdr->qtbl_size = CVP_IFACEQ_TABLE_SIZE;
  1336. q_tbl_hdr->qtbl_qhdr0_offset =
  1337. sizeof(struct cvp_hfi_queue_table_header);
  1338. q_tbl_hdr->qtbl_qhdr_size = sizeof(struct cvp_hfi_queue_header);
  1339. q_tbl_hdr->qtbl_num_q = CVP_IFACEQ_NUMQ;
  1340. q_tbl_hdr->qtbl_num_active_q = CVP_IFACEQ_NUMQ;
  1341. iface_q = &dev->iface_queues[CVP_IFACEQ_CMDQ_IDX];
  1342. q_hdr = iface_q->q_hdr;
  1343. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1344. q_hdr->qhdr_type |= HFI_Q_ID_HOST_TO_CTRL_CMD_Q;
  1345. iface_q = &dev->iface_queues[CVP_IFACEQ_MSGQ_IDX];
  1346. q_hdr = iface_q->q_hdr;
  1347. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1348. q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_MSG_Q;
  1349. iface_q = &dev->iface_queues[CVP_IFACEQ_DBGQ_IDX];
  1350. q_hdr = iface_q->q_hdr;
  1351. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1352. q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q;
  1353. /*
  1354. * Set receive request to zero on debug queue as there is no
  1355. * need of interrupt from cvp hardware for debug messages
  1356. */
  1357. q_hdr->qhdr_rx_req = 0;
  1358. if (dev->qdss.align_virtual_addr) {
  1359. qdss =
  1360. (struct cvp_hfi_mem_map_table *)dev->qdss.align_virtual_addr;
  1361. qdss->mem_map_num_entries = num_entries;
  1362. mem_map_table_base_addr = dev->qdss.align_device_addr +
  1363. sizeof(struct cvp_hfi_mem_map_table);
  1364. qdss->mem_map_table_base_addr = mem_map_table_base_addr;
  1365. mem_map = (struct cvp_hfi_mem_map *)(qdss + 1);
  1366. cb = msm_cvp_smem_get_context_bank(dev->res, 0);
  1367. if (!cb) {
  1368. dprintk(CVP_ERR,
  1369. "%s: failed to get context bank\n", __func__);
  1370. return -EINVAL;
  1371. }
  1372. rc = __get_qdss_iommu_virtual_addr(dev, mem_map, cb->domain);
  1373. if (rc) {
  1374. dprintk(CVP_ERR,
  1375. "IOMMU mapping failed, Freeing qdss memdata\n");
  1376. __smem_free(dev, &dev->qdss.mem_data);
  1377. dev->qdss.align_virtual_addr = NULL;
  1378. dev->qdss.align_device_addr = 0;
  1379. }
  1380. }
  1381. vsfr = (struct cvp_hfi_sfr_struct *) dev->sfr.align_virtual_addr;
  1382. if (vsfr)
  1383. vsfr->bufSize = ALIGNED_SFR_SIZE;
  1384. rc = __interface_dsp_queues_init(dev);
  1385. if (rc) {
  1386. dprintk(CVP_ERR, "dsp_queues_init failed\n");
  1387. goto fail_alloc_queue;
  1388. }
  1389. __setup_ucregion_memory_map(dev);
  1390. return 0;
  1391. fail_alloc_queue:
  1392. return -ENOMEM;
  1393. }
  1394. static int __sys_set_debug(struct iris_hfi_device *device, u32 debug)
  1395. {
  1396. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1397. int rc = 0;
  1398. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1399. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1400. rc = call_hfi_pkt_op(device, sys_debug_config, pkt, debug);
  1401. if (rc) {
  1402. dprintk(CVP_WARN,
  1403. "Debug mode setting to FW failed\n");
  1404. return -ENOTEMPTY;
  1405. }
  1406. if (__iface_cmdq_write(device, pkt))
  1407. return -ENOTEMPTY;
  1408. return 0;
  1409. }
  1410. static int __sys_set_idle_indicator(struct iris_hfi_device *device,
  1411. bool enable)
  1412. {
  1413. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1414. int rc = 0;
  1415. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1416. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1417. rc = call_hfi_pkt_op(device, sys_set_idle_indicator, pkt, enable);
  1418. if (__iface_cmdq_write(device, pkt))
  1419. return -ENOTEMPTY;
  1420. return 0;
  1421. }
  1422. static int __sys_set_coverage(struct iris_hfi_device *device, u32 mode)
  1423. {
  1424. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1425. int rc = 0;
  1426. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1427. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1428. rc = call_hfi_pkt_op(device, sys_coverage_config,
  1429. pkt, mode);
  1430. if (rc) {
  1431. dprintk(CVP_WARN,
  1432. "Coverage mode setting to FW failed\n");
  1433. return -ENOTEMPTY;
  1434. }
  1435. if (__iface_cmdq_write(device, pkt)) {
  1436. dprintk(CVP_WARN, "Failed to send coverage pkt to f/w\n");
  1437. return -ENOTEMPTY;
  1438. }
  1439. return 0;
  1440. }
  1441. static int __sys_set_power_control(struct iris_hfi_device *device,
  1442. bool enable)
  1443. {
  1444. struct regulator_info *rinfo;
  1445. bool supported = false;
  1446. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1447. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1448. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1449. iris_hfi_for_each_regulator(device, rinfo) {
  1450. if (rinfo->has_hw_power_collapse) {
  1451. supported = true;
  1452. break;
  1453. }
  1454. }
  1455. if (!supported)
  1456. return 0;
  1457. call_hfi_pkt_op(device, sys_power_control, pkt, enable);
  1458. if (__iface_cmdq_write(device, pkt))
  1459. return -ENOTEMPTY;
  1460. return 0;
  1461. }
  1462. static int iris_hfi_core_init(void *device)
  1463. {
  1464. int rc = 0;
  1465. u32 ipcc_iova;
  1466. struct cvp_hfi_cmd_sys_init_packet pkt;
  1467. struct cvp_hfi_cmd_sys_get_property_packet version_pkt;
  1468. struct iris_hfi_device *dev;
  1469. if (!device) {
  1470. dprintk(CVP_ERR, "Invalid device\n");
  1471. return -ENODEV;
  1472. }
  1473. dev = device;
  1474. dprintk(CVP_CORE, "Core initializing\n");
  1475. mutex_lock(&dev->lock);
  1476. dev->bus_vote.data =
  1477. kzalloc(sizeof(struct cvp_bus_vote_data), GFP_KERNEL);
  1478. if (!dev->bus_vote.data) {
  1479. dprintk(CVP_ERR, "Bus vote data memory is not allocated\n");
  1480. rc = -ENOMEM;
  1481. goto err_no_mem;
  1482. }
  1483. dev->bus_vote.data_count = 1;
  1484. dev->bus_vote.data->power_mode = CVP_POWER_TURBO;
  1485. rc = __load_fw(dev);
  1486. if (rc) {
  1487. dprintk(CVP_ERR, "Failed to load Iris FW\n");
  1488. goto err_load_fw;
  1489. }
  1490. __set_state(dev, IRIS_STATE_INIT);
  1491. dev->reg_dumped = false;
  1492. dprintk(CVP_CORE, "Dev_Virt: %pa, Reg_Virt: %pK\n",
  1493. &dev->cvp_hal_data->firmware_base,
  1494. dev->cvp_hal_data->register_base);
  1495. rc = __interface_queues_init(dev);
  1496. if (rc) {
  1497. dprintk(CVP_ERR, "failed to init queues\n");
  1498. rc = -ENOMEM;
  1499. goto err_core_init;
  1500. }
  1501. rc = msm_cvp_map_ipcc_regs(&ipcc_iova);
  1502. if (!rc) {
  1503. dprintk(CVP_CORE, "IPCC iova 0x%x\n", ipcc_iova);
  1504. __write_register(dev, CVP_MMAP_ADDR, ipcc_iova);
  1505. }
  1506. rc = __boot_firmware(dev);
  1507. if (rc) {
  1508. dprintk(CVP_ERR, "Failed to start core\n");
  1509. rc = -ENODEV;
  1510. goto err_core_init;
  1511. }
  1512. dev->version = __read_register(dev, CVP_VERSION_INFO);
  1513. rc = call_hfi_pkt_op(dev, sys_init, &pkt, 0);
  1514. if (rc) {
  1515. dprintk(CVP_ERR, "Failed to create sys init pkt\n");
  1516. goto err_core_init;
  1517. }
  1518. if (__iface_cmdq_write(dev, &pkt)) {
  1519. rc = -ENOTEMPTY;
  1520. goto err_core_init;
  1521. }
  1522. rc = call_hfi_pkt_op(dev, sys_image_version, &version_pkt);
  1523. if (rc || __iface_cmdq_write(dev, &version_pkt))
  1524. dprintk(CVP_WARN, "Failed to send image version pkt to f/w\n");
  1525. __sys_set_debug(device, msm_cvp_fw_debug);
  1526. __enable_subcaches(device);
  1527. __set_subcaches(device);
  1528. __set_ubwc_config(device);
  1529. __sys_set_idle_indicator(device, true);
  1530. if (dev->res->pm_qos_latency_us)
  1531. cpu_latency_qos_add_request(&dev->qos,
  1532. dev->res->pm_qos_latency_us);
  1533. /* mmrm registration */
  1534. if (msm_cvp_mmrm_enabled) {
  1535. rc = msm_cvp_mmrm_register(device);
  1536. if (rc) {
  1537. dprintk(CVP_ERR, "Failed to register mmrm client\n");
  1538. goto err_core_init;
  1539. }
  1540. }
  1541. mutex_unlock(&dev->lock);
  1542. cvp_dsp_send_hfi_queue();
  1543. dprintk(CVP_CORE, "Core inited successfully\n");
  1544. return 0;
  1545. err_core_init:
  1546. __set_state(dev, IRIS_STATE_DEINIT);
  1547. __unload_fw(dev);
  1548. err_load_fw:
  1549. err_no_mem:
  1550. dprintk(CVP_ERR, "Core init failed\n");
  1551. mutex_unlock(&dev->lock);
  1552. return rc;
  1553. }
  1554. static int iris_hfi_core_release(void *dev)
  1555. {
  1556. int rc = 0;
  1557. struct iris_hfi_device *device = dev;
  1558. struct cvp_hal_session *session, *next;
  1559. if (!device) {
  1560. dprintk(CVP_ERR, "invalid device\n");
  1561. return -ENODEV;
  1562. }
  1563. mutex_lock(&device->lock);
  1564. dprintk(CVP_WARN, "Core releasing\n");
  1565. if (device->res->pm_qos_latency_us &&
  1566. cpu_latency_qos_request_active(&device->qos))
  1567. cpu_latency_qos_remove_request(&device->qos);
  1568. __resume(device);
  1569. __set_state(device, IRIS_STATE_DEINIT);
  1570. __dsp_shutdown(device, 0);
  1571. if (msm_cvp_mmrm_enabled) {
  1572. rc = mmrm_client_deregister(device->mmrm_cvp);
  1573. if (rc) {
  1574. dprintk(CVP_ERR,
  1575. "%s: Failed mmrm_client_deregister with rc: %d\n",
  1576. __func__, rc);
  1577. } else {
  1578. dprintk(CVP_PWR,
  1579. "%s: Succeed mmrm_client_deregister for mmrm_cvp:%pK, type:%d, uid:%ld\n",
  1580. __func__, device->mmrm_cvp, device->mmrm_cvp->client_type,
  1581. device->mmrm_cvp->client_uid);
  1582. device->mmrm_cvp = NULL;
  1583. }
  1584. }
  1585. __unload_fw(device);
  1586. /* unlink all sessions from device */
  1587. list_for_each_entry_safe(session, next, &device->sess_head, list) {
  1588. list_del(&session->list);
  1589. session->device = NULL;
  1590. }
  1591. dprintk(CVP_CORE, "Core released successfully\n");
  1592. mutex_unlock(&device->lock);
  1593. return rc;
  1594. }
  1595. static void __core_clear_interrupt(struct iris_hfi_device *device)
  1596. {
  1597. u32 intr_status = 0, mask = 0;
  1598. if (!device) {
  1599. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  1600. return;
  1601. }
  1602. intr_status = __read_register(device, CVP_WRAPPER_INTR_STATUS);
  1603. mask = (CVP_WRAPPER_INTR_MASK_A2HCPU_BMSK | CVP_FATAL_INTR_BMSK);
  1604. if (intr_status & mask) {
  1605. device->intr_status |= intr_status;
  1606. device->reg_count++;
  1607. dprintk(CVP_CORE,
  1608. "INTERRUPT for device: %pK: times: %d status: %d\n",
  1609. device, device->reg_count, intr_status);
  1610. } else {
  1611. device->spur_count++;
  1612. }
  1613. __write_register(device, CVP_CPU_CS_A2HSOFTINTCLR, 1);
  1614. }
  1615. static int iris_hfi_core_trigger_ssr(void *device,
  1616. enum hal_ssr_trigger_type type)
  1617. {
  1618. struct cvp_hfi_cmd_sys_test_ssr_packet pkt;
  1619. int rc = 0;
  1620. struct iris_hfi_device *dev;
  1621. if (!device) {
  1622. dprintk(CVP_ERR, "invalid device\n");
  1623. return -ENODEV;
  1624. }
  1625. dev = device;
  1626. if (mutex_trylock(&dev->lock)) {
  1627. rc = call_hfi_pkt_op(dev, ssr_cmd, type, &pkt);
  1628. if (rc) {
  1629. dprintk(CVP_ERR, "%s: failed to create packet\n",
  1630. __func__);
  1631. goto err_create_pkt;
  1632. }
  1633. if (__iface_cmdq_write(dev, &pkt))
  1634. rc = -ENOTEMPTY;
  1635. } else {
  1636. return -EAGAIN;
  1637. }
  1638. err_create_pkt:
  1639. mutex_unlock(&dev->lock);
  1640. return rc;
  1641. }
  1642. static void __set_default_sys_properties(struct iris_hfi_device *device)
  1643. {
  1644. if (__sys_set_debug(device, msm_cvp_fw_debug))
  1645. dprintk(CVP_WARN, "Setting fw_debug msg ON failed\n");
  1646. if (__sys_set_power_control(device, msm_cvp_fw_low_power_mode))
  1647. dprintk(CVP_WARN, "Setting h/w power collapse ON failed\n");
  1648. }
  1649. static void __session_clean(struct cvp_hal_session *session)
  1650. {
  1651. struct cvp_hal_session *temp, *next;
  1652. struct iris_hfi_device *device;
  1653. if (!session || !session->device) {
  1654. dprintk(CVP_WARN, "%s: invalid params\n", __func__);
  1655. return;
  1656. }
  1657. device = session->device;
  1658. dprintk(CVP_SESS, "deleted the session: %pK\n", session);
  1659. /*
  1660. * session might have been removed from the device list in
  1661. * core_release, so check and remove if it is in the list
  1662. */
  1663. list_for_each_entry_safe(temp, next, &device->sess_head, list) {
  1664. if (session == temp) {
  1665. list_del(&session->list);
  1666. break;
  1667. }
  1668. }
  1669. /* Poison the session handle with zeros */
  1670. *session = (struct cvp_hal_session){ {0} };
  1671. kfree(session);
  1672. }
  1673. static int iris_hfi_session_clean(void *session)
  1674. {
  1675. struct cvp_hal_session *sess_close;
  1676. struct iris_hfi_device *device;
  1677. if (!session) {
  1678. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1679. return -EINVAL;
  1680. }
  1681. sess_close = session;
  1682. device = sess_close->device;
  1683. if (!device) {
  1684. dprintk(CVP_ERR, "Invalid device handle %s\n", __func__);
  1685. return -EINVAL;
  1686. }
  1687. mutex_lock(&device->lock);
  1688. __session_clean(sess_close);
  1689. mutex_unlock(&device->lock);
  1690. return 0;
  1691. }
  1692. static int iris_hfi_session_init(void *device, void *session_id,
  1693. void **new_session)
  1694. {
  1695. struct cvp_hfi_cmd_sys_session_init_packet pkt;
  1696. struct iris_hfi_device *dev;
  1697. struct cvp_hal_session *s;
  1698. if (!device || !new_session) {
  1699. dprintk(CVP_ERR, "%s - invalid input\n", __func__);
  1700. return -EINVAL;
  1701. }
  1702. dev = device;
  1703. mutex_lock(&dev->lock);
  1704. s = kzalloc(sizeof(*s), GFP_KERNEL);
  1705. if (!s) {
  1706. dprintk(CVP_ERR, "new session fail: Out of memory\n");
  1707. goto err_session_init_fail;
  1708. }
  1709. s->session_id = session_id;
  1710. s->device = dev;
  1711. dprintk(CVP_SESS,
  1712. "%s: inst %pK, session %pK\n", __func__, session_id, s);
  1713. list_add_tail(&s->list, &dev->sess_head);
  1714. __set_default_sys_properties(device);
  1715. if (call_hfi_pkt_op(dev, session_init, &pkt, s)) {
  1716. dprintk(CVP_ERR, "session_init: failed to create packet\n");
  1717. goto err_session_init_fail;
  1718. }
  1719. *new_session = s;
  1720. if (__iface_cmdq_write(dev, &pkt))
  1721. goto err_session_init_fail;
  1722. mutex_unlock(&dev->lock);
  1723. return 0;
  1724. err_session_init_fail:
  1725. if (s)
  1726. __session_clean(s);
  1727. *new_session = NULL;
  1728. mutex_unlock(&dev->lock);
  1729. return -EINVAL;
  1730. }
  1731. static int __send_session_cmd(struct cvp_hal_session *session, int pkt_type)
  1732. {
  1733. struct cvp_hal_session_cmd_pkt pkt;
  1734. int rc = 0;
  1735. struct iris_hfi_device *device = session->device;
  1736. if (!__is_session_valid(device, session, __func__))
  1737. return -ECONNRESET;
  1738. rc = call_hfi_pkt_op(device, session_cmd,
  1739. &pkt, pkt_type, session);
  1740. if (rc == -EPERM)
  1741. return 0;
  1742. if (rc) {
  1743. dprintk(CVP_ERR, "send session cmd: create pkt failed\n");
  1744. goto err_create_pkt;
  1745. }
  1746. if (__iface_cmdq_write(session->device, &pkt))
  1747. rc = -ENOTEMPTY;
  1748. err_create_pkt:
  1749. return rc;
  1750. }
  1751. static int iris_hfi_session_end(void *session)
  1752. {
  1753. struct cvp_hal_session *sess;
  1754. struct iris_hfi_device *device;
  1755. int rc = 0;
  1756. if (!session) {
  1757. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1758. return -EINVAL;
  1759. }
  1760. sess = session;
  1761. device = sess->device;
  1762. if (!device) {
  1763. dprintk(CVP_ERR, "Invalid session %s\n", __func__);
  1764. return -EINVAL;
  1765. }
  1766. mutex_lock(&device->lock);
  1767. if (msm_cvp_fw_coverage) {
  1768. if (__sys_set_coverage(sess->device, msm_cvp_fw_coverage))
  1769. dprintk(CVP_WARN, "Fw_coverage msg ON failed\n");
  1770. }
  1771. rc = __send_session_cmd(session, HFI_CMD_SYS_SESSION_END);
  1772. mutex_unlock(&device->lock);
  1773. return rc;
  1774. }
  1775. static int iris_hfi_session_abort(void *sess)
  1776. {
  1777. struct cvp_hal_session *session = sess;
  1778. struct iris_hfi_device *device;
  1779. int rc = 0;
  1780. if (!session || !session->device) {
  1781. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1782. return -EINVAL;
  1783. }
  1784. device = session->device;
  1785. mutex_lock(&device->lock);
  1786. rc = __send_session_cmd(session, HFI_CMD_SYS_SESSION_ABORT);
  1787. mutex_unlock(&device->lock);
  1788. return rc;
  1789. }
  1790. static int iris_hfi_session_set_buffers(void *sess, u32 iova, u32 size)
  1791. {
  1792. struct cvp_hfi_cmd_session_set_buffers_packet pkt;
  1793. int rc = 0;
  1794. struct cvp_hal_session *session = sess;
  1795. struct iris_hfi_device *device;
  1796. if (!session || !session->device || !iova || !size) {
  1797. dprintk(CVP_ERR, "Invalid Params\n");
  1798. return -EINVAL;
  1799. }
  1800. device = session->device;
  1801. mutex_lock(&device->lock);
  1802. if (!__is_session_valid(device, session, __func__)) {
  1803. rc = -ECONNRESET;
  1804. goto err_create_pkt;
  1805. }
  1806. rc = call_hfi_pkt_op(device, session_set_buffers,
  1807. &pkt, session, iova, size);
  1808. if (rc) {
  1809. dprintk(CVP_ERR, "set buffers: failed to create packet\n");
  1810. goto err_create_pkt;
  1811. }
  1812. if (__iface_cmdq_write(session->device, &pkt))
  1813. rc = -ENOTEMPTY;
  1814. err_create_pkt:
  1815. mutex_unlock(&device->lock);
  1816. return rc;
  1817. }
  1818. static int iris_hfi_session_release_buffers(void *sess)
  1819. {
  1820. struct cvp_session_release_buffers_packet pkt;
  1821. int rc = 0;
  1822. struct cvp_hal_session *session = sess;
  1823. struct iris_hfi_device *device;
  1824. if (!session || !session->device) {
  1825. dprintk(CVP_ERR, "Invalid Params\n");
  1826. return -EINVAL;
  1827. }
  1828. device = session->device;
  1829. mutex_lock(&device->lock);
  1830. if (!__is_session_valid(device, session, __func__)) {
  1831. rc = -ECONNRESET;
  1832. goto err_create_pkt;
  1833. }
  1834. rc = call_hfi_pkt_op(device, session_release_buffers, &pkt, session);
  1835. if (rc) {
  1836. dprintk(CVP_ERR, "release buffers: failed to create packet\n");
  1837. goto err_create_pkt;
  1838. }
  1839. if (__iface_cmdq_write(session->device, &pkt))
  1840. rc = -ENOTEMPTY;
  1841. err_create_pkt:
  1842. mutex_unlock(&device->lock);
  1843. return rc;
  1844. }
  1845. static int iris_hfi_session_send(void *sess,
  1846. struct eva_kmd_hfi_packet *in_pkt)
  1847. {
  1848. int rc = 0;
  1849. struct eva_kmd_hfi_packet pkt;
  1850. struct cvp_hal_session *session = sess;
  1851. struct iris_hfi_device *device;
  1852. if (!session || !session->device) {
  1853. dprintk(CVP_ERR, "invalid session");
  1854. return -ENODEV;
  1855. }
  1856. device = session->device;
  1857. mutex_lock(&device->lock);
  1858. if (!__is_session_valid(device, session, __func__)) {
  1859. rc = -ECONNRESET;
  1860. goto err_send_pkt;
  1861. }
  1862. rc = call_hfi_pkt_op(device, session_send,
  1863. &pkt, session, in_pkt);
  1864. if (rc) {
  1865. dprintk(CVP_ERR,
  1866. "failed to create pkt\n");
  1867. goto err_send_pkt;
  1868. }
  1869. if (__iface_cmdq_write(session->device, &pkt))
  1870. rc = -ENOTEMPTY;
  1871. err_send_pkt:
  1872. mutex_unlock(&device->lock);
  1873. return rc;
  1874. return rc;
  1875. }
  1876. static int iris_hfi_session_flush(void *sess)
  1877. {
  1878. struct cvp_hal_session *session = sess;
  1879. struct iris_hfi_device *device;
  1880. int rc = 0;
  1881. if (!session || !session->device) {
  1882. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1883. return -EINVAL;
  1884. }
  1885. device = session->device;
  1886. mutex_lock(&device->lock);
  1887. rc = __send_session_cmd(session, HFI_CMD_SESSION_CVP_FLUSH);
  1888. mutex_unlock(&device->lock);
  1889. return rc;
  1890. }
  1891. static int __check_core_registered(struct iris_hfi_device *device,
  1892. phys_addr_t fw_addr, u8 *reg_addr, u32 reg_size,
  1893. phys_addr_t irq)
  1894. {
  1895. struct cvp_hal_data *cvp_hal_data;
  1896. if (!device) {
  1897. dprintk(CVP_INFO, "no device Registered\n");
  1898. return -EINVAL;
  1899. }
  1900. cvp_hal_data = device->cvp_hal_data;
  1901. if (!cvp_hal_data)
  1902. return -EINVAL;
  1903. if (cvp_hal_data->irq == irq &&
  1904. (CONTAINS(cvp_hal_data->firmware_base,
  1905. FIRMWARE_SIZE, fw_addr) ||
  1906. CONTAINS(fw_addr, FIRMWARE_SIZE,
  1907. cvp_hal_data->firmware_base) ||
  1908. CONTAINS(cvp_hal_data->register_base,
  1909. reg_size, reg_addr) ||
  1910. CONTAINS(reg_addr, reg_size,
  1911. cvp_hal_data->register_base) ||
  1912. OVERLAPS(cvp_hal_data->register_base,
  1913. reg_size, reg_addr, reg_size) ||
  1914. OVERLAPS(reg_addr, reg_size,
  1915. cvp_hal_data->register_base,
  1916. reg_size) ||
  1917. OVERLAPS(cvp_hal_data->firmware_base,
  1918. FIRMWARE_SIZE, fw_addr,
  1919. FIRMWARE_SIZE) ||
  1920. OVERLAPS(fw_addr, FIRMWARE_SIZE,
  1921. cvp_hal_data->firmware_base,
  1922. FIRMWARE_SIZE))) {
  1923. return 0;
  1924. }
  1925. dprintk(CVP_INFO, "Device not registered\n");
  1926. return -EINVAL;
  1927. }
  1928. static void __process_fatal_error(
  1929. struct iris_hfi_device *device)
  1930. {
  1931. struct msm_cvp_cb_cmd_done cmd_done = {0};
  1932. cmd_done.device_id = device->device_id;
  1933. device->callback(HAL_SYS_ERROR, &cmd_done);
  1934. }
  1935. static int __prepare_pc(struct iris_hfi_device *device)
  1936. {
  1937. int rc = 0;
  1938. struct cvp_hfi_cmd_sys_pc_prep_packet pkt;
  1939. rc = call_hfi_pkt_op(device, sys_pc_prep, &pkt);
  1940. if (rc) {
  1941. dprintk(CVP_ERR, "Failed to create sys pc prep pkt\n");
  1942. goto err_pc_prep;
  1943. }
  1944. if (__iface_cmdq_write(device, &pkt))
  1945. rc = -ENOTEMPTY;
  1946. if (rc)
  1947. dprintk(CVP_ERR, "Failed to prepare iris for power off");
  1948. err_pc_prep:
  1949. return rc;
  1950. }
  1951. static void iris_hfi_pm_handler(struct work_struct *work)
  1952. {
  1953. int rc = 0;
  1954. struct msm_cvp_core *core;
  1955. struct iris_hfi_device *device;
  1956. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  1957. if (core)
  1958. device = core->device->hfi_device_data;
  1959. else
  1960. return;
  1961. if (!device) {
  1962. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  1963. return;
  1964. }
  1965. dprintk(CVP_PWR,
  1966. "Entering %s\n", __func__);
  1967. /*
  1968. * It is ok to check this variable outside the lock since
  1969. * it is being updated in this context only
  1970. */
  1971. if (device->skip_pc_count >= CVP_MAX_PC_SKIP_COUNT) {
  1972. dprintk(CVP_WARN, "Failed to PC for %d times\n",
  1973. device->skip_pc_count);
  1974. device->skip_pc_count = 0;
  1975. __process_fatal_error(device);
  1976. return;
  1977. }
  1978. mutex_lock(&device->lock);
  1979. if (gfa_cv.state == DSP_SUSPEND)
  1980. rc = __power_collapse(device, true);
  1981. else
  1982. rc = __power_collapse(device, false);
  1983. mutex_unlock(&device->lock);
  1984. switch (rc) {
  1985. case 0:
  1986. device->skip_pc_count = 0;
  1987. /* Cancel pending delayed works if any */
  1988. cancel_delayed_work(&iris_hfi_pm_work);
  1989. dprintk(CVP_PWR, "%s: power collapse successful!\n",
  1990. __func__);
  1991. break;
  1992. case -EBUSY:
  1993. device->skip_pc_count = 0;
  1994. dprintk(CVP_PWR, "%s: retry PC as cvp is busy\n", __func__);
  1995. queue_delayed_work(device->iris_pm_workq,
  1996. &iris_hfi_pm_work, msecs_to_jiffies(
  1997. device->res->msm_cvp_pwr_collapse_delay));
  1998. break;
  1999. case -EAGAIN:
  2000. device->skip_pc_count++;
  2001. dprintk(CVP_WARN, "%s: retry power collapse (count %d)\n",
  2002. __func__, device->skip_pc_count);
  2003. queue_delayed_work(device->iris_pm_workq,
  2004. &iris_hfi_pm_work, msecs_to_jiffies(
  2005. device->res->msm_cvp_pwr_collapse_delay));
  2006. break;
  2007. default:
  2008. dprintk(CVP_ERR, "%s: power collapse failed\n", __func__);
  2009. break;
  2010. }
  2011. }
  2012. static int __power_collapse(struct iris_hfi_device *device, bool force)
  2013. {
  2014. int rc = 0;
  2015. u32 wfi_status = 0, idle_status = 0, pc_ready = 0;
  2016. u32 flags = 0;
  2017. int count = 0;
  2018. const int max_tries = 150;
  2019. if (!device) {
  2020. dprintk(CVP_ERR, "%s: invalid params\n", __func__);
  2021. return -EINVAL;
  2022. }
  2023. if (!device->power_enabled) {
  2024. dprintk(CVP_PWR, "%s: Power already disabled\n",
  2025. __func__);
  2026. goto exit;
  2027. }
  2028. rc = __core_in_valid_state(device);
  2029. if (!rc) {
  2030. dprintk(CVP_WARN,
  2031. "Core is in bad state, Skipping power collapse\n");
  2032. return -EINVAL;
  2033. }
  2034. rc = __dsp_suspend(device, force, flags);
  2035. if (rc == -EBUSY)
  2036. goto exit;
  2037. else if (rc)
  2038. goto skip_power_off;
  2039. pc_ready = __read_register(device, CVP_CTRL_STATUS) &
  2040. CVP_CTRL_STATUS_PC_READY;
  2041. if (!pc_ready) {
  2042. wfi_status = __read_register(device,
  2043. CVP_WRAPPER_CPU_STATUS);
  2044. idle_status = __read_register(device,
  2045. CVP_CTRL_STATUS);
  2046. if (!(wfi_status & BIT(0))) {
  2047. dprintk(CVP_WARN,
  2048. "Skipping PC as wfi_status (%#x) bit not set\n",
  2049. wfi_status);
  2050. goto skip_power_off;
  2051. }
  2052. if (!(idle_status & BIT(30))) {
  2053. dprintk(CVP_WARN,
  2054. "Skipping PC as idle_status (%#x) bit not set\n",
  2055. idle_status);
  2056. goto skip_power_off;
  2057. }
  2058. rc = __prepare_pc(device);
  2059. if (rc) {
  2060. dprintk(CVP_WARN, "Failed PC %d\n", rc);
  2061. goto skip_power_off;
  2062. }
  2063. while (count < max_tries) {
  2064. wfi_status = __read_register(device,
  2065. CVP_WRAPPER_CPU_STATUS);
  2066. pc_ready = __read_register(device,
  2067. CVP_CTRL_STATUS);
  2068. if ((wfi_status & BIT(0)) && (pc_ready &
  2069. CVP_CTRL_STATUS_PC_READY))
  2070. break;
  2071. usleep_range(150, 250);
  2072. count++;
  2073. }
  2074. if (count == max_tries) {
  2075. dprintk(CVP_ERR,
  2076. "Skip PC. Core is not in right state (%#x, %#x)\n",
  2077. wfi_status, pc_ready);
  2078. goto skip_power_off;
  2079. }
  2080. }
  2081. __flush_debug_queue(device, device->raw_packet);
  2082. rc = __suspend(device);
  2083. if (rc)
  2084. dprintk(CVP_ERR, "Failed __suspend\n");
  2085. exit:
  2086. return rc;
  2087. skip_power_off:
  2088. dprintk(CVP_PWR, "Skip PC(%#x, %#x, %#x)\n",
  2089. wfi_status, idle_status, pc_ready);
  2090. __flush_debug_queue(device, device->raw_packet);
  2091. return -EAGAIN;
  2092. }
  2093. static void __process_sys_error(struct iris_hfi_device *device)
  2094. {
  2095. struct cvp_hfi_sfr_struct *vsfr = NULL;
  2096. vsfr = (struct cvp_hfi_sfr_struct *)device->sfr.align_virtual_addr;
  2097. if (vsfr) {
  2098. void *p = memchr(vsfr->rg_data, '\0', vsfr->bufSize);
  2099. /*
  2100. * SFR isn't guaranteed to be NULL terminated
  2101. * since SYS_ERROR indicates that Iris is in the
  2102. * process of crashing.
  2103. */
  2104. if (p == NULL)
  2105. vsfr->rg_data[vsfr->bufSize - 1] = '\0';
  2106. dprintk(CVP_ERR, "SFR Message from FW: %s\n",
  2107. vsfr->rg_data);
  2108. }
  2109. }
  2110. static void __flush_debug_queue(struct iris_hfi_device *device, u8 *packet)
  2111. {
  2112. bool local_packet = false;
  2113. enum cvp_msg_prio log_level = CVP_FW;
  2114. if (!device) {
  2115. dprintk(CVP_ERR, "%s: Invalid params\n", __func__);
  2116. return;
  2117. }
  2118. if (!packet) {
  2119. packet = kzalloc(CVP_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL);
  2120. if (!packet) {
  2121. dprintk(CVP_ERR, "In %s() Fail to allocate mem\n",
  2122. __func__);
  2123. return;
  2124. }
  2125. local_packet = true;
  2126. /*
  2127. * Local packek is used when something FATAL occurred.
  2128. * It is good to print these logs by default.
  2129. */
  2130. log_level = CVP_ERR;
  2131. }
  2132. #define SKIP_INVALID_PKT(pkt_size, payload_size, pkt_hdr_size) ({ \
  2133. if (pkt_size < pkt_hdr_size || \
  2134. payload_size < MIN_PAYLOAD_SIZE || \
  2135. payload_size > \
  2136. (pkt_size - pkt_hdr_size + sizeof(u8))) { \
  2137. dprintk(CVP_ERR, \
  2138. "%s: invalid msg size - %d\n", \
  2139. __func__, pkt->msg_size); \
  2140. continue; \
  2141. } \
  2142. })
  2143. while (!__iface_dbgq_read(device, packet)) {
  2144. struct cvp_hfi_packet_header *pkt =
  2145. (struct cvp_hfi_packet_header *) packet;
  2146. if (pkt->size < sizeof(struct cvp_hfi_packet_header)) {
  2147. dprintk(CVP_ERR, "Invalid pkt size - %s\n",
  2148. __func__);
  2149. continue;
  2150. }
  2151. if (pkt->packet_type == HFI_MSG_SYS_DEBUG) {
  2152. struct cvp_hfi_msg_sys_debug_packet *pkt =
  2153. (struct cvp_hfi_msg_sys_debug_packet *) packet;
  2154. SKIP_INVALID_PKT(pkt->size,
  2155. pkt->msg_size, sizeof(*pkt));
  2156. /*
  2157. * All fw messages starts with new line character. This
  2158. * causes dprintk to print this message in two lines
  2159. * in the kernel log. Ignoring the first character
  2160. * from the message fixes this to print it in a single
  2161. * line.
  2162. */
  2163. pkt->rg_msg_data[pkt->msg_size-1] = '\0';
  2164. dprintk(log_level, "%s", &pkt->rg_msg_data[1]);
  2165. }
  2166. }
  2167. #undef SKIP_INVALID_PKT
  2168. if (local_packet)
  2169. kfree(packet);
  2170. }
  2171. static bool __is_session_valid(struct iris_hfi_device *device,
  2172. struct cvp_hal_session *session, const char *func)
  2173. {
  2174. struct cvp_hal_session *temp = NULL;
  2175. if (!device || !session)
  2176. goto invalid;
  2177. list_for_each_entry(temp, &device->sess_head, list)
  2178. if (session == temp)
  2179. return true;
  2180. invalid:
  2181. dprintk(CVP_WARN, "%s: device %pK, invalid session %pK\n",
  2182. func, device, session);
  2183. return false;
  2184. }
  2185. static struct cvp_hal_session *__get_session(struct iris_hfi_device *device,
  2186. u32 session_id)
  2187. {
  2188. struct cvp_hal_session *temp = NULL;
  2189. list_for_each_entry(temp, &device->sess_head, list) {
  2190. if (session_id == hash32_ptr(temp))
  2191. return temp;
  2192. }
  2193. return NULL;
  2194. }
  2195. #define _INVALID_MSG_ "Unrecognized MSG (%#x) session (%pK), discarding\n"
  2196. #define _INVALID_STATE_ "Ignore responses from %d to %d invalid state\n"
  2197. #define _DEVFREQ_FAIL_ "Failed to add devfreq device bus %s governor %s: %d\n"
  2198. static void process_system_msg(struct msm_cvp_cb_info *info,
  2199. struct iris_hfi_device *device,
  2200. void *raw_packet)
  2201. {
  2202. struct cvp_hal_sys_init_done sys_init_done = {0};
  2203. switch (info->response_type) {
  2204. case HAL_SYS_ERROR:
  2205. __process_sys_error(device);
  2206. break;
  2207. case HAL_SYS_RELEASE_RESOURCE_DONE:
  2208. dprintk(CVP_CORE, "Received SYS_RELEASE_RESOURCE\n");
  2209. break;
  2210. case HAL_SYS_INIT_DONE:
  2211. dprintk(CVP_CORE, "Received SYS_INIT_DONE\n");
  2212. sys_init_done.capabilities =
  2213. device->sys_init_capabilities;
  2214. cvp_hfi_process_sys_init_done_prop_read(
  2215. (struct cvp_hfi_msg_sys_init_done_packet *)
  2216. raw_packet, &sys_init_done);
  2217. info->response.cmd.data.sys_init_done = sys_init_done;
  2218. break;
  2219. default:
  2220. break;
  2221. }
  2222. }
  2223. static void **get_session_id(struct msm_cvp_cb_info *info)
  2224. {
  2225. void **session_id = NULL;
  2226. /* For session-related packets, validate session */
  2227. switch (info->response_type) {
  2228. case HAL_SESSION_INIT_DONE:
  2229. case HAL_SESSION_END_DONE:
  2230. case HAL_SESSION_ABORT_DONE:
  2231. case HAL_SESSION_STOP_DONE:
  2232. case HAL_SESSION_FLUSH_DONE:
  2233. case HAL_SESSION_SET_BUFFER_DONE:
  2234. case HAL_SESSION_SUSPEND_DONE:
  2235. case HAL_SESSION_RESUME_DONE:
  2236. case HAL_SESSION_SET_PROP_DONE:
  2237. case HAL_SESSION_GET_PROP_DONE:
  2238. case HAL_SESSION_RELEASE_BUFFER_DONE:
  2239. case HAL_SESSION_REGISTER_BUFFER_DONE:
  2240. case HAL_SESSION_UNREGISTER_BUFFER_DONE:
  2241. case HAL_SESSION_PROPERTY_INFO:
  2242. case HAL_SESSION_EVENT_CHANGE:
  2243. case HAL_SESSION_DUMP_NOTIFY:
  2244. session_id = &info->response.cmd.session_id;
  2245. break;
  2246. case HAL_SESSION_ERROR:
  2247. session_id = &info->response.data.session_id;
  2248. break;
  2249. case HAL_RESPONSE_UNUSED:
  2250. default:
  2251. session_id = NULL;
  2252. break;
  2253. }
  2254. return session_id;
  2255. }
  2256. static void print_msg_hdr(void *hdr)
  2257. {
  2258. struct cvp_hfi_msg_session_hdr *new_hdr =
  2259. (struct cvp_hfi_msg_session_hdr *)hdr;
  2260. dprintk(CVP_HFI, "HFI MSG received: %x %x %x %x %x %x %x\n",
  2261. new_hdr->size, new_hdr->packet_type,
  2262. new_hdr->session_id,
  2263. new_hdr->client_data.transaction_id,
  2264. new_hdr->client_data.data1,
  2265. new_hdr->client_data.data2,
  2266. new_hdr->error_type);
  2267. }
  2268. static int __response_handler(struct iris_hfi_device *device)
  2269. {
  2270. struct msm_cvp_cb_info *packets;
  2271. int packet_count = 0;
  2272. u8 *raw_packet = NULL;
  2273. bool requeue_pm_work = true;
  2274. if (!device || device->state != IRIS_STATE_INIT)
  2275. return 0;
  2276. packets = device->response_pkt;
  2277. raw_packet = device->raw_packet;
  2278. if (!raw_packet || !packets) {
  2279. dprintk(CVP_ERR,
  2280. "%s: Invalid args : Res pkt = %pK, Raw pkt = %pK\n",
  2281. __func__, packets, raw_packet);
  2282. return 0;
  2283. }
  2284. if (device->intr_status & CVP_FATAL_INTR_BMSK) {
  2285. struct cvp_hfi_sfr_struct *vsfr = (struct cvp_hfi_sfr_struct *)
  2286. device->sfr.align_virtual_addr;
  2287. struct msm_cvp_cb_info info = {
  2288. .response_type = HAL_SYS_WATCHDOG_TIMEOUT,
  2289. .response.cmd = {
  2290. .device_id = device->device_id,
  2291. }
  2292. };
  2293. if (vsfr)
  2294. dprintk(CVP_ERR, "SFR Message from FW: %s\n",
  2295. vsfr->rg_data);
  2296. if (device->intr_status & CVP_WRAPPER_INTR_MASK_CPU_NOC_BMSK)
  2297. dprintk(CVP_ERR, "Received Xtensa NOC error\n");
  2298. if (device->intr_status & CVP_WRAPPER_INTR_MASK_CORE_NOC_BMSK)
  2299. dprintk(CVP_ERR, "Received CVP core NOC error\n");
  2300. if (device->intr_status & CVP_WRAPPER_INTR_MASK_A2HWD_BMSK)
  2301. dprintk(CVP_ERR, "Received CVP watchdog timeout\n");
  2302. packets[packet_count++] = info;
  2303. goto exit;
  2304. }
  2305. /* Bleed the msg queue dry of packets */
  2306. while (!__iface_msgq_read(device, raw_packet)) {
  2307. void **session_id = NULL;
  2308. struct msm_cvp_cb_info *info = &packets[packet_count++];
  2309. struct cvp_hfi_msg_session_hdr *hdr =
  2310. (struct cvp_hfi_msg_session_hdr *)raw_packet;
  2311. int rc = 0;
  2312. print_msg_hdr(hdr);
  2313. rc = cvp_hfi_process_msg_packet(device->device_id,
  2314. raw_packet, info);
  2315. if (rc) {
  2316. dprintk(CVP_WARN,
  2317. "Corrupt/unknown packet found, discarding\n");
  2318. --packet_count;
  2319. continue;
  2320. } else if (info->response_type == HAL_NO_RESP) {
  2321. --packet_count;
  2322. continue;
  2323. }
  2324. /* Process the packet types that we're interested in */
  2325. process_system_msg(info, device, raw_packet);
  2326. session_id = get_session_id(info);
  2327. /*
  2328. * hfi_process_msg_packet provides a session_id that's a hashed
  2329. * value of struct cvp_hal_session, we need to coerce the hashed
  2330. * value back to pointer that we can use. Ideally, hfi_process\
  2331. * _msg_packet should take care of this, but it doesn't have
  2332. * required information for it
  2333. */
  2334. if (session_id) {
  2335. struct cvp_hal_session *session = NULL;
  2336. if (upper_32_bits((uintptr_t)*session_id) != 0) {
  2337. dprintk(CVP_ERR,
  2338. "Upper 32-bits != 0 for sess_id=%pK\n",
  2339. *session_id);
  2340. }
  2341. session = __get_session(device,
  2342. (u32)(uintptr_t)*session_id);
  2343. if (!session) {
  2344. dprintk(CVP_ERR, _INVALID_MSG_,
  2345. info->response_type,
  2346. *session_id);
  2347. --packet_count;
  2348. continue;
  2349. }
  2350. *session_id = session->session_id;
  2351. }
  2352. if (packet_count >= cvp_max_packets) {
  2353. dprintk(CVP_WARN,
  2354. "Too many packets in message queue!\n");
  2355. break;
  2356. }
  2357. /* do not read packets after sys error packet */
  2358. if (info->response_type == HAL_SYS_ERROR)
  2359. break;
  2360. }
  2361. if (requeue_pm_work && device->res->sw_power_collapsible) {
  2362. cancel_delayed_work(&iris_hfi_pm_work);
  2363. if (!queue_delayed_work(device->iris_pm_workq,
  2364. &iris_hfi_pm_work,
  2365. msecs_to_jiffies(
  2366. device->res->msm_cvp_pwr_collapse_delay))) {
  2367. dprintk(CVP_ERR, "PM work already scheduled\n");
  2368. }
  2369. }
  2370. exit:
  2371. __flush_debug_queue(device, raw_packet);
  2372. return packet_count;
  2373. }
  2374. static void iris_hfi_core_work_handler(struct work_struct *work)
  2375. {
  2376. struct msm_cvp_core *core;
  2377. struct iris_hfi_device *device;
  2378. int num_responses = 0, i = 0;
  2379. u32 intr_status;
  2380. static bool warning_on = true;
  2381. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  2382. if (core)
  2383. device = core->device->hfi_device_data;
  2384. else
  2385. return;
  2386. mutex_lock(&device->lock);
  2387. if (!__core_in_valid_state(device)) {
  2388. if (warning_on) {
  2389. dprintk(CVP_WARN, "%s Core not in init state\n",
  2390. __func__);
  2391. warning_on = false;
  2392. }
  2393. goto err_no_work;
  2394. }
  2395. warning_on = true;
  2396. if (!device->callback) {
  2397. dprintk(CVP_ERR, "No interrupt callback function: %pK\n",
  2398. device);
  2399. goto err_no_work;
  2400. }
  2401. if (__resume(device)) {
  2402. dprintk(CVP_ERR, "%s: Power enable failed\n", __func__);
  2403. goto err_no_work;
  2404. }
  2405. __core_clear_interrupt(device);
  2406. num_responses = __response_handler(device);
  2407. dprintk(CVP_HFI, "%s:: cvp_driver_debug num_responses = %d ",
  2408. __func__, num_responses);
  2409. err_no_work:
  2410. /* Keep the interrupt status before releasing device lock */
  2411. intr_status = device->intr_status;
  2412. mutex_unlock(&device->lock);
  2413. /*
  2414. * Issue the callbacks outside of the locked contex to preserve
  2415. * re-entrancy.
  2416. */
  2417. for (i = 0; !IS_ERR_OR_NULL(device->response_pkt) &&
  2418. i < num_responses; ++i) {
  2419. struct msm_cvp_cb_info *r = &device->response_pkt[i];
  2420. void *rsp = (void *)&r->response;
  2421. if (!__core_in_valid_state(device)) {
  2422. dprintk(CVP_ERR,
  2423. _INVALID_STATE_, (i + 1), num_responses);
  2424. break;
  2425. }
  2426. dprintk(CVP_HFI, "Processing response %d of %d, type %d\n",
  2427. (i + 1), num_responses, r->response_type);
  2428. device->callback(r->response_type, rsp);
  2429. }
  2430. /* We need re-enable the irq which was disabled in ISR handler */
  2431. if (!(intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  2432. enable_irq(device->cvp_hal_data->irq);
  2433. /*
  2434. * XXX: Don't add any code beyond here. Reacquiring locks after release
  2435. * it above doesn't guarantee the atomicity that we're aiming for.
  2436. */
  2437. }
  2438. static DECLARE_WORK(iris_hfi_work, iris_hfi_core_work_handler);
  2439. static irqreturn_t iris_hfi_isr(int irq, void *dev)
  2440. {
  2441. struct iris_hfi_device *device = dev;
  2442. disable_irq_nosync(irq);
  2443. queue_work(device->cvp_workq, &iris_hfi_work);
  2444. return IRQ_HANDLED;
  2445. }
  2446. static int __init_regs_and_interrupts(struct iris_hfi_device *device,
  2447. struct msm_cvp_platform_resources *res)
  2448. {
  2449. struct cvp_hal_data *hal = NULL;
  2450. int rc = 0;
  2451. rc = __check_core_registered(device, res->firmware_base,
  2452. (u8 *)(uintptr_t)res->register_base,
  2453. res->register_size, res->irq);
  2454. if (!rc) {
  2455. dprintk(CVP_ERR, "Core present/Already added\n");
  2456. rc = -EEXIST;
  2457. goto err_core_init;
  2458. }
  2459. hal = kzalloc(sizeof(*hal), GFP_KERNEL);
  2460. if (!hal) {
  2461. dprintk(CVP_ERR, "Failed to alloc\n");
  2462. rc = -ENOMEM;
  2463. goto err_core_init;
  2464. }
  2465. hal->irq = res->irq;
  2466. hal->firmware_base = res->firmware_base;
  2467. hal->register_base = devm_ioremap(&res->pdev->dev,
  2468. res->register_base, res->register_size);
  2469. hal->register_size = res->register_size;
  2470. if (!hal->register_base) {
  2471. dprintk(CVP_ERR,
  2472. "could not map reg addr %pa of size %d\n",
  2473. &res->register_base, res->register_size);
  2474. goto error_irq_fail;
  2475. }
  2476. if (res->gcc_reg_base) {
  2477. hal->gcc_reg_base = devm_ioremap(&res->pdev->dev,
  2478. res->gcc_reg_base, res->gcc_reg_size);
  2479. hal->gcc_reg_size = res->gcc_reg_size;
  2480. if (!hal->gcc_reg_base)
  2481. dprintk(CVP_ERR,
  2482. "could not map gcc reg addr %pa of size %d\n",
  2483. &res->gcc_reg_base, res->gcc_reg_size);
  2484. }
  2485. device->cvp_hal_data = hal;
  2486. rc = request_irq(res->irq, iris_hfi_isr, IRQF_TRIGGER_HIGH,
  2487. "msm_cvp", device);
  2488. if (unlikely(rc)) {
  2489. dprintk(CVP_ERR, "() :request_irq failed\n");
  2490. goto error_irq_fail;
  2491. }
  2492. disable_irq_nosync(res->irq);
  2493. dprintk(CVP_INFO,
  2494. "firmware_base = %pa, register_base = %pa, register_size = %d\n",
  2495. &res->firmware_base, &res->register_base,
  2496. res->register_size);
  2497. return rc;
  2498. error_irq_fail:
  2499. kfree(hal);
  2500. err_core_init:
  2501. return rc;
  2502. }
  2503. static int __handle_reset_clk(struct msm_cvp_platform_resources *res,
  2504. int reset_index, enum reset_state state,
  2505. enum power_state pwr_state)
  2506. {
  2507. int rc = 0;
  2508. struct reset_control *rst;
  2509. struct reset_info rst_info;
  2510. struct reset_set *rst_set = &res->reset_set;
  2511. if (!rst_set->reset_tbl)
  2512. return 0;
  2513. rst_info = rst_set->reset_tbl[reset_index];
  2514. rst = rst_info.rst;
  2515. dprintk(CVP_PWR, "reset_clk: name %s reset_state %d rst %pK ps=%d\n",
  2516. rst_set->reset_tbl[reset_index].name, state, rst, pwr_state);
  2517. switch (state) {
  2518. case INIT:
  2519. if (rst)
  2520. goto skip_reset_init;
  2521. rst = devm_reset_control_get(&res->pdev->dev,
  2522. rst_set->reset_tbl[reset_index].name);
  2523. if (IS_ERR(rst))
  2524. rc = PTR_ERR(rst);
  2525. rst_set->reset_tbl[reset_index].rst = rst;
  2526. break;
  2527. case ASSERT:
  2528. if (!rst) {
  2529. rc = PTR_ERR(rst);
  2530. goto failed_to_reset;
  2531. }
  2532. if (pwr_state != rst_info.required_state)
  2533. break;
  2534. rc = reset_control_assert(rst);
  2535. break;
  2536. case DEASSERT:
  2537. if (!rst) {
  2538. rc = PTR_ERR(rst);
  2539. goto failed_to_reset;
  2540. }
  2541. if (pwr_state != rst_info.required_state)
  2542. break;
  2543. rc = reset_control_deassert(rst);
  2544. break;
  2545. default:
  2546. dprintk(CVP_ERR, "Invalid reset request\n");
  2547. if (rc)
  2548. goto failed_to_reset;
  2549. }
  2550. return 0;
  2551. skip_reset_init:
  2552. failed_to_reset:
  2553. return rc;
  2554. }
  2555. static int reset_ahb2axi_bridge(struct iris_hfi_device *device)
  2556. {
  2557. int rc, i;
  2558. enum power_state s;
  2559. if (!device) {
  2560. dprintk(CVP_ERR, "NULL device\n");
  2561. rc = -EINVAL;
  2562. goto failed_to_reset;
  2563. }
  2564. if (device->power_enabled)
  2565. s = CVP_POWER_ON;
  2566. else
  2567. s = CVP_POWER_OFF;
  2568. for (i = 0; i < device->res->reset_set.count; i++) {
  2569. rc = __handle_reset_clk(device->res, i, ASSERT, s);
  2570. if (rc) {
  2571. dprintk(CVP_ERR,
  2572. "failed to assert reset clocks\n");
  2573. goto failed_to_reset;
  2574. }
  2575. /* wait for deassert */
  2576. usleep_range(1000, 1050);
  2577. rc = __handle_reset_clk(device->res, i, DEASSERT, s);
  2578. if (rc) {
  2579. dprintk(CVP_ERR,
  2580. "failed to deassert reset clocks\n");
  2581. goto failed_to_reset;
  2582. }
  2583. }
  2584. return 0;
  2585. failed_to_reset:
  2586. return rc;
  2587. }
  2588. static void __deinit_bus(struct iris_hfi_device *device)
  2589. {
  2590. struct bus_info *bus = NULL;
  2591. if (!device)
  2592. return;
  2593. kfree(device->bus_vote.data);
  2594. device->bus_vote = CVP_DEFAULT_BUS_VOTE;
  2595. iris_hfi_for_each_bus_reverse(device, bus) {
  2596. dev_set_drvdata(bus->dev, NULL);
  2597. icc_put(bus->client);
  2598. bus->client = NULL;
  2599. }
  2600. }
  2601. static int __init_bus(struct iris_hfi_device *device)
  2602. {
  2603. struct bus_info *bus = NULL;
  2604. int rc = 0;
  2605. if (!device)
  2606. return -EINVAL;
  2607. iris_hfi_for_each_bus(device, bus) {
  2608. /*
  2609. * This is stupid, but there's no other easy way to ahold
  2610. * of struct bus_info in iris_hfi_devfreq_*()
  2611. */
  2612. WARN(dev_get_drvdata(bus->dev), "%s's drvdata already set\n",
  2613. dev_name(bus->dev));
  2614. dev_set_drvdata(bus->dev, device);
  2615. bus->client = icc_get(&device->res->pdev->dev,
  2616. bus->master, bus->slave);
  2617. if (IS_ERR_OR_NULL(bus->client)) {
  2618. rc = PTR_ERR(bus->client) ?: -EBADHANDLE;
  2619. dprintk(CVP_ERR, "Failed to register bus %s: %d\n",
  2620. bus->name, rc);
  2621. bus->client = NULL;
  2622. goto err_add_dev;
  2623. }
  2624. }
  2625. return 0;
  2626. err_add_dev:
  2627. __deinit_bus(device);
  2628. return rc;
  2629. }
  2630. static void __deinit_regulators(struct iris_hfi_device *device)
  2631. {
  2632. struct regulator_info *rinfo = NULL;
  2633. iris_hfi_for_each_regulator_reverse(device, rinfo) {
  2634. if (rinfo->regulator) {
  2635. regulator_put(rinfo->regulator);
  2636. rinfo->regulator = NULL;
  2637. }
  2638. }
  2639. }
  2640. static int __init_regulators(struct iris_hfi_device *device)
  2641. {
  2642. int rc = 0;
  2643. struct regulator_info *rinfo = NULL;
  2644. iris_hfi_for_each_regulator(device, rinfo) {
  2645. rinfo->regulator = regulator_get(&device->res->pdev->dev,
  2646. rinfo->name);
  2647. if (IS_ERR_OR_NULL(rinfo->regulator)) {
  2648. rc = PTR_ERR(rinfo->regulator) ?: -EBADHANDLE;
  2649. dprintk(CVP_ERR, "Failed to get regulator: %s\n",
  2650. rinfo->name);
  2651. rinfo->regulator = NULL;
  2652. goto err_reg_get;
  2653. }
  2654. }
  2655. return 0;
  2656. err_reg_get:
  2657. __deinit_regulators(device);
  2658. return rc;
  2659. }
  2660. static void __deinit_subcaches(struct iris_hfi_device *device)
  2661. {
  2662. struct subcache_info *sinfo = NULL;
  2663. if (!device) {
  2664. dprintk(CVP_ERR, "deinit_subcaches: invalid device %pK\n",
  2665. device);
  2666. goto exit;
  2667. }
  2668. if (!is_sys_cache_present(device))
  2669. goto exit;
  2670. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  2671. if (sinfo->subcache) {
  2672. dprintk(CVP_CORE, "deinit_subcaches: %s\n",
  2673. sinfo->name);
  2674. llcc_slice_putd(sinfo->subcache);
  2675. sinfo->subcache = NULL;
  2676. }
  2677. }
  2678. exit:
  2679. return;
  2680. }
  2681. static int __init_subcaches(struct iris_hfi_device *device)
  2682. {
  2683. int rc = 0;
  2684. struct subcache_info *sinfo = NULL;
  2685. if (!device) {
  2686. dprintk(CVP_ERR, "init_subcaches: invalid device %pK\n",
  2687. device);
  2688. return -EINVAL;
  2689. }
  2690. if (!is_sys_cache_present(device))
  2691. return 0;
  2692. iris_hfi_for_each_subcache(device, sinfo) {
  2693. if (!strcmp("cvp", sinfo->name)) {
  2694. sinfo->subcache = llcc_slice_getd(LLCC_CVP);
  2695. } else if (!strcmp("cvpfw", sinfo->name)) {
  2696. sinfo->subcache = llcc_slice_getd(LLCC_CVPFW);
  2697. } else {
  2698. dprintk(CVP_ERR, "Invalid subcache name %s\n",
  2699. sinfo->name);
  2700. }
  2701. if (IS_ERR_OR_NULL(sinfo->subcache)) {
  2702. rc = PTR_ERR(sinfo->subcache) ?
  2703. PTR_ERR(sinfo->subcache) : -EBADHANDLE;
  2704. dprintk(CVP_ERR,
  2705. "init_subcaches: invalid subcache: %s rc %d\n",
  2706. sinfo->name, rc);
  2707. sinfo->subcache = NULL;
  2708. goto err_subcache_get;
  2709. }
  2710. dprintk(CVP_CORE, "init_subcaches: %s\n",
  2711. sinfo->name);
  2712. }
  2713. return 0;
  2714. err_subcache_get:
  2715. __deinit_subcaches(device);
  2716. return rc;
  2717. }
  2718. static int __init_resources(struct iris_hfi_device *device,
  2719. struct msm_cvp_platform_resources *res)
  2720. {
  2721. int i, rc = 0;
  2722. rc = __init_regulators(device);
  2723. if (rc) {
  2724. dprintk(CVP_ERR, "Failed to get all regulators\n");
  2725. return -ENODEV;
  2726. }
  2727. rc = msm_cvp_init_clocks(device);
  2728. if (rc) {
  2729. dprintk(CVP_ERR, "Failed to init clocks\n");
  2730. rc = -ENODEV;
  2731. goto err_init_clocks;
  2732. }
  2733. for (i = 0; i < device->res->reset_set.count; i++) {
  2734. rc = __handle_reset_clk(res, i, INIT, 0);
  2735. if (rc) {
  2736. dprintk(CVP_ERR, "Failed to init reset clocks\n");
  2737. rc = -ENODEV;
  2738. goto err_init_reset_clk;
  2739. }
  2740. }
  2741. rc = __init_bus(device);
  2742. if (rc) {
  2743. dprintk(CVP_ERR, "Failed to init bus: %d\n", rc);
  2744. goto err_init_bus;
  2745. }
  2746. rc = __init_subcaches(device);
  2747. if (rc)
  2748. dprintk(CVP_WARN, "Failed to init subcaches: %d\n", rc);
  2749. device->sys_init_capabilities =
  2750. kzalloc(sizeof(struct msm_cvp_capability)
  2751. * CVP_MAX_SESSIONS, GFP_KERNEL);
  2752. return rc;
  2753. err_init_reset_clk:
  2754. err_init_bus:
  2755. msm_cvp_deinit_clocks(device);
  2756. err_init_clocks:
  2757. __deinit_regulators(device);
  2758. return rc;
  2759. }
  2760. static void __deinit_resources(struct iris_hfi_device *device)
  2761. {
  2762. __deinit_subcaches(device);
  2763. __deinit_bus(device);
  2764. msm_cvp_deinit_clocks(device);
  2765. __deinit_regulators(device);
  2766. kfree(device->sys_init_capabilities);
  2767. device->sys_init_capabilities = NULL;
  2768. }
  2769. static int __disable_regulator_impl(struct regulator_info *rinfo,
  2770. struct iris_hfi_device *device)
  2771. {
  2772. int rc = 0;
  2773. dprintk(CVP_PWR, "Disabling regulator %s\n", rinfo->name);
  2774. /*
  2775. * This call is needed. Driver needs to acquire the control back
  2776. * from HW in order to disable the regualtor. Else the behavior
  2777. * is unknown.
  2778. */
  2779. rc = __acquire_regulator(rinfo, device);
  2780. if (rc) {
  2781. /*
  2782. * This is somewhat fatal, but nothing we can do
  2783. * about it. We can't disable the regulator w/o
  2784. * getting it back under s/w control
  2785. */
  2786. dprintk(CVP_WARN,
  2787. "Failed to acquire control on %s\n",
  2788. rinfo->name);
  2789. goto disable_regulator_failed;
  2790. }
  2791. rc = regulator_disable(rinfo->regulator);
  2792. if (rc) {
  2793. dprintk(CVP_WARN,
  2794. "Failed to disable %s: %d\n",
  2795. rinfo->name, rc);
  2796. goto disable_regulator_failed;
  2797. }
  2798. return 0;
  2799. disable_regulator_failed:
  2800. /* Bring attention to this issue */
  2801. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  2802. return rc;
  2803. }
  2804. static int __enable_hw_power_collapse(struct iris_hfi_device *device)
  2805. {
  2806. int rc = 0;
  2807. if (!msm_cvp_fw_low_power_mode) {
  2808. dprintk(CVP_PWR, "Not enabling hardware power collapse\n");
  2809. return 0;
  2810. }
  2811. rc = __hand_off_regulators(device);
  2812. if (rc)
  2813. dprintk(CVP_WARN,
  2814. "%s : Failed to enable HW power collapse %d\n",
  2815. __func__, rc);
  2816. return rc;
  2817. }
  2818. static int __enable_regulator(struct iris_hfi_device *device,
  2819. const char *name)
  2820. {
  2821. int rc = 0;
  2822. struct regulator_info *rinfo;
  2823. iris_hfi_for_each_regulator(device, rinfo) {
  2824. if (strcmp(rinfo->name, name))
  2825. continue;
  2826. rc = regulator_enable(rinfo->regulator);
  2827. if (rc) {
  2828. dprintk(CVP_ERR, "Failed to enable %s: %d\n",
  2829. rinfo->name, rc);
  2830. return rc;
  2831. }
  2832. if (!regulator_is_enabled(rinfo->regulator)) {
  2833. dprintk(CVP_ERR,"%s: regulator %s not enabled\n",
  2834. __func__, rinfo->name);
  2835. regulator_disable(rinfo->regulator);
  2836. return -EINVAL;
  2837. }
  2838. dprintk(CVP_PWR, "Enabled regulator %s\n", rinfo->name);
  2839. return 0;
  2840. }
  2841. dprintk(CVP_ERR, "regulator %s not found\n");
  2842. return -EINVAL;
  2843. }
  2844. static int __disable_regulator(struct iris_hfi_device *device,
  2845. const char *name)
  2846. {
  2847. struct regulator_info *rinfo;
  2848. iris_hfi_for_each_regulator_reverse(device, rinfo) {
  2849. if (strcmp(rinfo->name, name))
  2850. continue;
  2851. __disable_regulator_impl(rinfo, device);
  2852. dprintk(CVP_PWR, "%s Disabled regulator %s\n", __func__, name);
  2853. return 0;
  2854. }
  2855. dprintk(CVP_ERR, "%s regulator %s not found\n", __func__, name);
  2856. return -EINVAL;
  2857. }
  2858. static int __enable_subcaches(struct iris_hfi_device *device)
  2859. {
  2860. int rc = 0;
  2861. u32 c = 0;
  2862. struct subcache_info *sinfo;
  2863. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  2864. return 0;
  2865. /* Activate subcaches */
  2866. iris_hfi_for_each_subcache(device, sinfo) {
  2867. rc = llcc_slice_activate(sinfo->subcache);
  2868. if (rc) {
  2869. dprintk(CVP_WARN, "Failed to activate %s: %d\n",
  2870. sinfo->name, rc);
  2871. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  2872. goto err_activate_fail;
  2873. }
  2874. sinfo->isactive = true;
  2875. dprintk(CVP_CORE, "Activated subcache %s\n", sinfo->name);
  2876. c++;
  2877. }
  2878. dprintk(CVP_CORE, "Activated %d Subcaches to CVP\n", c);
  2879. return 0;
  2880. err_activate_fail:
  2881. __release_subcaches(device);
  2882. __disable_subcaches(device);
  2883. return 0;
  2884. }
  2885. static int __set_subcaches(struct iris_hfi_device *device)
  2886. {
  2887. int rc = 0;
  2888. u32 c = 0;
  2889. struct subcache_info *sinfo;
  2890. u32 resource[CVP_MAX_SUBCACHE_SIZE];
  2891. struct cvp_hfi_resource_syscache_info_type *sc_res_info;
  2892. struct cvp_hfi_resource_subcache_type *sc_res;
  2893. struct cvp_resource_hdr rhdr;
  2894. if (device->res->sys_cache_res_set || msm_cvp_syscache_disable) {
  2895. dprintk(CVP_CORE, "Subcaches already set or disabled\n");
  2896. return 0;
  2897. }
  2898. memset((void *)resource, 0x0, (sizeof(u32) * CVP_MAX_SUBCACHE_SIZE));
  2899. sc_res_info = (struct cvp_hfi_resource_syscache_info_type *)resource;
  2900. sc_res = &(sc_res_info->rg_subcache_entries[0]);
  2901. iris_hfi_for_each_subcache(device, sinfo) {
  2902. if (sinfo->isactive) {
  2903. sc_res[c].size = sinfo->subcache->slice_size;
  2904. sc_res[c].sc_id = sinfo->subcache->slice_id;
  2905. c++;
  2906. }
  2907. }
  2908. /* Set resource to CVP for activated subcaches */
  2909. if (c) {
  2910. dprintk(CVP_CORE, "Setting %d Subcaches\n", c);
  2911. rhdr.resource_handle = sc_res_info; /* cookie */
  2912. rhdr.resource_id = CVP_RESOURCE_SYSCACHE;
  2913. sc_res_info->num_entries = c;
  2914. rc = __core_set_resource(device, &rhdr, (void *)sc_res_info);
  2915. if (rc) {
  2916. dprintk(CVP_WARN, "Failed to set subcaches %d\n", rc);
  2917. goto err_fail_set_subacaches;
  2918. }
  2919. iris_hfi_for_each_subcache(device, sinfo) {
  2920. if (sinfo->isactive)
  2921. sinfo->isset = true;
  2922. }
  2923. dprintk(CVP_CORE, "Set Subcaches done to CVP\n");
  2924. device->res->sys_cache_res_set = true;
  2925. }
  2926. return 0;
  2927. err_fail_set_subacaches:
  2928. __disable_subcaches(device);
  2929. return 0;
  2930. }
  2931. static int __release_subcaches(struct iris_hfi_device *device)
  2932. {
  2933. struct subcache_info *sinfo;
  2934. int rc = 0;
  2935. u32 c = 0;
  2936. u32 resource[CVP_MAX_SUBCACHE_SIZE];
  2937. struct cvp_hfi_resource_syscache_info_type *sc_res_info;
  2938. struct cvp_hfi_resource_subcache_type *sc_res;
  2939. struct cvp_resource_hdr rhdr;
  2940. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  2941. return 0;
  2942. memset((void *)resource, 0x0, (sizeof(u32) * CVP_MAX_SUBCACHE_SIZE));
  2943. sc_res_info = (struct cvp_hfi_resource_syscache_info_type *)resource;
  2944. sc_res = &(sc_res_info->rg_subcache_entries[0]);
  2945. /* Release resource command to Iris */
  2946. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  2947. if (sinfo->isset) {
  2948. /* Update the entry */
  2949. sc_res[c].size = sinfo->subcache->slice_size;
  2950. sc_res[c].sc_id = sinfo->subcache->slice_id;
  2951. c++;
  2952. sinfo->isset = false;
  2953. }
  2954. }
  2955. if (c > 0) {
  2956. dprintk(CVP_CORE, "Releasing %d subcaches\n", c);
  2957. rhdr.resource_handle = sc_res_info; /* cookie */
  2958. rhdr.resource_id = CVP_RESOURCE_SYSCACHE;
  2959. rc = __core_release_resource(device, &rhdr);
  2960. if (rc)
  2961. dprintk(CVP_WARN,
  2962. "Failed to release %d subcaches\n", c);
  2963. }
  2964. device->res->sys_cache_res_set = false;
  2965. return 0;
  2966. }
  2967. static int __disable_subcaches(struct iris_hfi_device *device)
  2968. {
  2969. struct subcache_info *sinfo;
  2970. int rc = 0;
  2971. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  2972. return 0;
  2973. /* De-activate subcaches */
  2974. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  2975. if (sinfo->isactive) {
  2976. dprintk(CVP_CORE, "De-activate subcache %s\n",
  2977. sinfo->name);
  2978. rc = llcc_slice_deactivate(sinfo->subcache);
  2979. if (rc) {
  2980. dprintk(CVP_WARN,
  2981. "Failed to de-activate %s: %d\n",
  2982. sinfo->name, rc);
  2983. }
  2984. sinfo->isactive = false;
  2985. }
  2986. }
  2987. return 0;
  2988. }
  2989. static void interrupt_init_iris2(struct iris_hfi_device *device)
  2990. {
  2991. u32 mask_val = 0;
  2992. /* All interrupts should be disabled initially 0x1F6 : Reset value */
  2993. mask_val = __read_register(device, CVP_WRAPPER_INTR_MASK);
  2994. /* Write 0 to unmask CPU and WD interrupts */
  2995. mask_val &= ~(CVP_FATAL_INTR_BMSK | CVP_WRAPPER_INTR_MASK_A2HCPU_BMSK);
  2996. __write_register(device, CVP_WRAPPER_INTR_MASK, mask_val);
  2997. dprintk(CVP_REG, "Init irq: reg: %x, mask value %x\n",
  2998. CVP_WRAPPER_INTR_MASK, mask_val);
  2999. }
  3000. static void setup_dsp_uc_memmap_vpu5(struct iris_hfi_device *device)
  3001. {
  3002. /* initialize DSP QTBL & UCREGION with CPU queues */
  3003. __write_register(device, HFI_DSP_QTBL_ADDR,
  3004. (u32)device->dsp_iface_q_table.align_device_addr);
  3005. __write_register(device, HFI_DSP_UC_REGION_ADDR,
  3006. (u32)device->dsp_iface_q_table.align_device_addr);
  3007. __write_register(device, HFI_DSP_UC_REGION_SIZE,
  3008. device->dsp_iface_q_table.mem_data.size);
  3009. }
  3010. static void clock_config_on_enable_vpu5(struct iris_hfi_device *device)
  3011. {
  3012. __write_register(device, CVP_WRAPPER_CPU_CLOCK_CONFIG, 0);
  3013. }
  3014. static int __set_ubwc_config(struct iris_hfi_device *device)
  3015. {
  3016. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  3017. int rc = 0;
  3018. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  3019. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  3020. if (!device->res->ubwc_config)
  3021. return 0;
  3022. rc = call_hfi_pkt_op(device, sys_ubwc_config, pkt,
  3023. device->res->ubwc_config);
  3024. if (rc) {
  3025. dprintk(CVP_WARN,
  3026. "ubwc config setting to FW failed\n");
  3027. rc = -ENOTEMPTY;
  3028. goto fail_to_set_ubwc_config;
  3029. }
  3030. if (__iface_cmdq_write(device, pkt)) {
  3031. rc = -ENOTEMPTY;
  3032. goto fail_to_set_ubwc_config;
  3033. }
  3034. fail_to_set_ubwc_config:
  3035. return rc;
  3036. }
  3037. static int __power_on_controller(struct iris_hfi_device *device)
  3038. {
  3039. int rc = 0;
  3040. rc = __enable_regulator(device, "cvp");
  3041. if (rc) {
  3042. dprintk(CVP_ERR, "Failed to enable ctrler: %d\n", rc);
  3043. return rc;
  3044. }
  3045. rc = call_iris_op(device, reset_ahb2axi_bridge, device);
  3046. if (rc) {
  3047. dprintk(CVP_ERR, "Failed to reset ahb2axi: %d\n", rc);
  3048. goto fail_reset_clks;
  3049. }
  3050. rc = msm_cvp_prepare_enable_clk(device, "gcc_video_axi1");
  3051. if (rc) {
  3052. dprintk(CVP_ERR, "Failed to enable axi1 clk: %d\n", rc);
  3053. goto fail_reset_clks;
  3054. }
  3055. rc = msm_cvp_prepare_enable_clk(device, "cvp_clk");
  3056. if (rc) {
  3057. dprintk(CVP_ERR, "Failed to enable cvp_clk: %d\n", rc);
  3058. goto fail_enable_clk;
  3059. }
  3060. dprintk(CVP_PWR, "EVA controller powered on\n");
  3061. return 0;
  3062. fail_enable_clk:
  3063. msm_cvp_disable_unprepare_clk(device, "gcc_video_axi1");
  3064. fail_reset_clks:
  3065. __disable_regulator(device, "cvp");
  3066. return rc;
  3067. }
  3068. static int __power_on_core(struct iris_hfi_device *device)
  3069. {
  3070. int rc = 0;
  3071. rc = __enable_regulator(device, "cvp-core");
  3072. if (rc) {
  3073. dprintk(CVP_ERR, "Failed to enable core: %d\n", rc);
  3074. return rc;
  3075. }
  3076. rc = msm_cvp_prepare_enable_clk(device, "core_clk");
  3077. if (rc) {
  3078. dprintk(CVP_ERR, "Failed to enable core_clk: %d\n", rc);
  3079. __disable_regulator(device, "cvp-core");
  3080. return rc;
  3081. }
  3082. dprintk(CVP_PWR, "EVA core powered on\n");
  3083. return 0;
  3084. }
  3085. static int __iris_power_on(struct iris_hfi_device *device)
  3086. {
  3087. int rc = 0;
  3088. if (device->power_enabled)
  3089. return 0;
  3090. /* Vote for all hardware resources */
  3091. rc = __vote_buses(device, device->bus_vote.data,
  3092. device->bus_vote.data_count);
  3093. if (rc) {
  3094. dprintk(CVP_ERR, "Failed to vote buses, err: %d\n", rc);
  3095. goto fail_vote_buses;
  3096. }
  3097. rc = __power_on_controller(device);
  3098. if (rc)
  3099. goto fail_enable_controller;
  3100. rc = __power_on_core(device);
  3101. if (rc)
  3102. goto fail_enable_core;
  3103. rc = msm_cvp_scale_clocks(device);
  3104. if (rc) {
  3105. dprintk(CVP_WARN,
  3106. "Failed to scale clocks, perf may regress\n");
  3107. rc = 0;
  3108. } else {
  3109. dprintk(CVP_PWR, "Done with scaling\n");
  3110. }
  3111. /*Do not access registers before this point!*/
  3112. device->power_enabled = true;
  3113. /*
  3114. * Re-program all of the registers that get reset as a result of
  3115. * regulator_disable() and _enable()
  3116. */
  3117. __set_registers(device);
  3118. dprintk(CVP_CORE, "Done with register set\n");
  3119. call_iris_op(device, interrupt_init, device);
  3120. dprintk(CVP_CORE, "Done with interrupt enabling\n");
  3121. device->intr_status = 0;
  3122. enable_irq(device->cvp_hal_data->irq);
  3123. pr_info(CVP_DBG_TAG "cvp (eva) powered on\n", "pwr");
  3124. return 0;
  3125. fail_enable_core:
  3126. __power_off_controller(device);
  3127. fail_enable_controller:
  3128. __unvote_buses(device);
  3129. fail_vote_buses:
  3130. device->power_enabled = false;
  3131. return rc;
  3132. }
  3133. static inline int __suspend(struct iris_hfi_device *device)
  3134. {
  3135. int rc = 0;
  3136. if (!device) {
  3137. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  3138. return -EINVAL;
  3139. } else if (!device->power_enabled) {
  3140. dprintk(CVP_PWR, "Power already disabled\n");
  3141. return 0;
  3142. }
  3143. dprintk(CVP_PWR, "Entering suspend\n");
  3144. if (device->res->pm_qos_latency_us &&
  3145. cpu_latency_qos_request_active(&device->qos))
  3146. cpu_latency_qos_remove_request(&device->qos);
  3147. rc = __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_SUSPEND);
  3148. if (rc) {
  3149. dprintk(CVP_WARN, "Failed to suspend cvp core %d\n", rc);
  3150. goto err_tzbsp_suspend;
  3151. }
  3152. __disable_subcaches(device);
  3153. call_iris_op(device, power_off, device);
  3154. return rc;
  3155. err_tzbsp_suspend:
  3156. return rc;
  3157. }
  3158. static void __print_sidebandmanager_regs(struct iris_hfi_device *device)
  3159. {
  3160. u32 sbm_ln0_low, axi_cbcr;
  3161. u32 main_sbm_ln0_low = 0xdeadbeef, main_sbm_ln0_high = 0xdeadbeef;
  3162. u32 main_sbm_ln1_high = 0xdeadbeef, cpu_cs_x2rpmh;
  3163. sbm_ln0_low =
  3164. __read_register(device, CVP_NOC_SBM_SENSELN0_LOW);
  3165. cpu_cs_x2rpmh = __read_register(device, CVP_CPU_CS_X2RPMh);
  3166. __write_register(device, CVP_CPU_CS_X2RPMh,
  3167. (cpu_cs_x2rpmh | CVP_CPU_CS_X2RPMh_SWOVERRIDE_BMSK));
  3168. usleep_range(500, 1000);
  3169. cpu_cs_x2rpmh = __read_register(device, CVP_CPU_CS_X2RPMh);
  3170. if (!(cpu_cs_x2rpmh & CVP_CPU_CS_X2RPMh_SWOVERRIDE_BMSK)) {
  3171. dprintk(CVP_WARN,
  3172. "failed set CVP_CPU_CS_X2RPMH mask %x\n",
  3173. cpu_cs_x2rpmh);
  3174. goto exit;
  3175. }
  3176. axi_cbcr = __read_gcc_register(device, CVP_GCC_VIDEO_AXI1_CBCR);
  3177. if (axi_cbcr & 0x80000000) {
  3178. dprintk(CVP_WARN, "failed to turn on AXI clock %x\n",
  3179. axi_cbcr);
  3180. goto exit;
  3181. }
  3182. main_sbm_ln0_low = __read_register(device,
  3183. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN0_LOW);
  3184. main_sbm_ln0_high = __read_register(device,
  3185. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN0_HIGH);
  3186. main_sbm_ln1_high = __read_register(device,
  3187. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN1_HIGH);
  3188. exit:
  3189. cpu_cs_x2rpmh = cpu_cs_x2rpmh & (~CVP_CPU_CS_X2RPMh_SWOVERRIDE_BMSK);
  3190. __write_register(device, CVP_CPU_CS_X2RPMh, cpu_cs_x2rpmh);
  3191. dprintk(CVP_WARN, "Sidebandmanager regs %x %x %x %x %x\n",
  3192. sbm_ln0_low, main_sbm_ln0_low,
  3193. main_sbm_ln0_high, main_sbm_ln1_high,
  3194. cpu_cs_x2rpmh);
  3195. }
  3196. static int __power_off_controller(struct iris_hfi_device *device)
  3197. {
  3198. u32 lpi_status, reg_status = 0, count = 0, max_count = 1000;
  3199. /* HPG 6.2.2 Step 1 */
  3200. __write_register(device, CVP_CPU_CS_X2RPMh, 0x3);
  3201. /* HPG 6.2.2 Step 2, noc to low power */
  3202. __write_register(device, CVP_AON_WRAPPER_MVP_NOC_LPI_CONTROL, 0x1);
  3203. while (!reg_status && count < max_count) {
  3204. lpi_status =
  3205. __read_register(device,
  3206. CVP_AON_WRAPPER_MVP_NOC_LPI_STATUS);
  3207. reg_status = lpi_status & BIT(0);
  3208. /* Wait for noc lpi status to be set */
  3209. usleep_range(50, 100);
  3210. count++;
  3211. }
  3212. dprintk(CVP_PWR,
  3213. "Noc: lpi_status %x noc_status %x (count %d)\n",
  3214. lpi_status, reg_status, count);
  3215. if (count == max_count) {
  3216. u32 pc_ready, wfi_status;
  3217. wfi_status = __read_register(device, CVP_WRAPPER_CPU_STATUS);
  3218. pc_ready = __read_register(device, CVP_CTRL_STATUS);
  3219. dprintk(CVP_WARN,
  3220. "NOC not in qaccept status %x %x %x %x\n",
  3221. reg_status, lpi_status, wfi_status, pc_ready);
  3222. __print_sidebandmanager_regs(device);
  3223. }
  3224. /* HPG 6.2.2 Step 3, debug bridge to low power BYPASSED */
  3225. /* HPG 6.2.2 Step 4, debug bridge to lpi release */
  3226. __write_register(device,
  3227. CVP_WRAPPER_DEBUG_BRIDGE_LPI_CONTROL, 0x0);
  3228. lpi_status = 0x1;
  3229. count = 0;
  3230. while (lpi_status && count < max_count) {
  3231. lpi_status = __read_register(device,
  3232. CVP_WRAPPER_DEBUG_BRIDGE_LPI_STATUS);
  3233. usleep_range(50, 100);
  3234. count++;
  3235. }
  3236. dprintk(CVP_PWR,
  3237. "DBLP Release: lpi_status %d(count %d)\n",
  3238. lpi_status, count);
  3239. if (count == max_count) {
  3240. dprintk(CVP_WARN,
  3241. "DBLP Release: lpi_status %x\n", lpi_status);
  3242. }
  3243. /* HPG 6.2.2 Step 5 */
  3244. msm_cvp_disable_unprepare_clk(device, "cvp_clk");
  3245. /* HPG 6.2.2 Step 6 */
  3246. __disable_regulator(device, "cvp");
  3247. /* HPG 6.2.2 Step 7 */
  3248. msm_cvp_disable_unprepare_clk(device, "gcc_video_axi1");
  3249. return 0;
  3250. }
  3251. static int __power_off_core(struct iris_hfi_device *device)
  3252. {
  3253. u32 config, value = 0, count = 0, warn_flag = 0;
  3254. const u32 max_count = 10;
  3255. value = __read_register(device, CVP_CC_MVS1_GDSCR);
  3256. if (!(value & 0x80000000)) {
  3257. /*
  3258. * Core has been powered off by f/w.
  3259. * Check NOC reset registers to ensure
  3260. * NO outstanding NoC transactions
  3261. */
  3262. value = __read_register(device, CVP_NOC_RESET_ACK);
  3263. if (value) {
  3264. dprintk(CVP_WARN,
  3265. "Core off with NOC RESET ACK non-zero %x\n",
  3266. value);
  3267. __print_sidebandmanager_regs(device);
  3268. }
  3269. __disable_regulator(device, "cvp-core");
  3270. msm_cvp_disable_unprepare_clk(device, "core_clk");
  3271. return 0;
  3272. }
  3273. dprintk(CVP_PWR, "Driver controls Core power off now\n");
  3274. /*
  3275. * check to make sure core clock branch enabled else
  3276. * we cannot read core idle register
  3277. */
  3278. config = __read_register(device, CVP_WRAPPER_CORE_CLOCK_CONFIG);
  3279. if (config) {
  3280. dprintk(CVP_PWR,
  3281. "core clock config not enabled, enable it to access core\n");
  3282. __write_register(device, CVP_WRAPPER_CORE_CLOCK_CONFIG, 0);
  3283. }
  3284. /*
  3285. * add MNoC idle check before collapsing MVS1 per HPG update
  3286. * poll for NoC DMA idle -> HPG 6.2.1
  3287. *
  3288. */
  3289. do {
  3290. value = __read_register(device, CVP_SS_IDLE_STATUS);
  3291. if (value & 0x400000)
  3292. break;
  3293. else
  3294. usleep_range(1000, 2000);
  3295. count++;
  3296. } while (count < max_count);
  3297. if (count == max_count) {
  3298. dprintk(CVP_WARN, "Core fail to go idle %x\n", value);
  3299. warn_flag = 1;
  3300. }
  3301. /* Apply partial reset on MSF interface and wait for ACK */
  3302. __write_register(device, CVP_NOC_RESET_REQ, 0x7);
  3303. count = 0;
  3304. do {
  3305. value = __read_register(device, CVP_NOC_RESET_ACK);
  3306. if ((value & 0x7) == 0x7)
  3307. break;
  3308. else
  3309. usleep_range(100, 200);
  3310. count++;
  3311. } while (count < max_count);
  3312. if (count == max_count) {
  3313. dprintk(CVP_WARN, "Core NoC reset assert failed %x\n", value);
  3314. warn_flag = 1;
  3315. }
  3316. /* De-assert partial reset on MSF interface and wait for ACK */
  3317. __write_register(device, CVP_NOC_RESET_REQ, 0x0);
  3318. count = 0;
  3319. do {
  3320. value = __read_register(device, CVP_NOC_RESET_ACK);
  3321. if ((value & 0x1) == 0x0)
  3322. break;
  3323. else
  3324. usleep_range(100, 200);
  3325. count++;
  3326. } while (count < max_count);
  3327. if (count == max_count) {
  3328. dprintk(CVP_WARN, "Core NoC reset de-assert failed\n");
  3329. warn_flag = 1;
  3330. }
  3331. if (warn_flag)
  3332. __print_sidebandmanager_regs(device);
  3333. /* Reset both sides of 2 ahb2ahb_bridges (TZ and non-TZ) */
  3334. __write_register(device, CVP_AHB_BRIDGE_SYNC_RESET, 0x3);
  3335. __write_register(device, CVP_AHB_BRIDGE_SYNC_RESET, 0x2);
  3336. __write_register(device, CVP_AHB_BRIDGE_SYNC_RESET, 0x0);
  3337. __write_register(device, CVP_WRAPPER_CORE_CLOCK_CONFIG, config);
  3338. __disable_regulator(device, "cvp-core");
  3339. msm_cvp_disable_unprepare_clk(device, "core_clk");
  3340. return 0;
  3341. }
  3342. static void power_off_iris2(struct iris_hfi_device *device)
  3343. {
  3344. if (!device->power_enabled || !device->res->sw_power_collapsible)
  3345. return;
  3346. if (!(device->intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  3347. disable_irq_nosync(device->cvp_hal_data->irq);
  3348. device->intr_status = 0;
  3349. __power_off_core(device);
  3350. __power_off_controller(device);
  3351. if (__unvote_buses(device))
  3352. dprintk(CVP_WARN, "Failed to unvote for buses\n");
  3353. /*Do not access registers after this point!*/
  3354. device->power_enabled = false;
  3355. pr_info(CVP_DBG_TAG "cvp (eva) power collapsed\n", "pwr");
  3356. }
  3357. static inline int __resume(struct iris_hfi_device *device)
  3358. {
  3359. int rc = 0;
  3360. u32 flags = 0, reg_gdsc, reg_cbcr;
  3361. if (!device) {
  3362. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  3363. return -EINVAL;
  3364. } else if (device->power_enabled) {
  3365. goto exit;
  3366. } else if (!__core_in_valid_state(device)) {
  3367. dprintk(CVP_PWR, "iris_hfi_device in deinit state.");
  3368. return -EINVAL;
  3369. }
  3370. dprintk(CVP_PWR, "Resuming from power collapse\n");
  3371. rc = __iris_power_on(device);
  3372. if (rc) {
  3373. dprintk(CVP_ERR, "Failed to power on cvp\n");
  3374. goto err_iris_power_on;
  3375. }
  3376. reg_gdsc = __read_register(device, CVP_CC_MVS1C_GDSCR);
  3377. reg_cbcr = __read_register(device, CVP_CC_MVS1C_CBCR);
  3378. if (!(reg_gdsc & 0x80000000) || (reg_cbcr & 0x80000000))
  3379. dprintk(CVP_ERR, "CVP power on failed gdsc %x cbcr %x\n",
  3380. reg_gdsc, reg_cbcr);
  3381. /* Reboot the firmware */
  3382. rc = __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_RESUME);
  3383. if (rc) {
  3384. dprintk(CVP_ERR, "Failed to resume cvp core %d\n", rc);
  3385. goto err_set_cvp_state;
  3386. }
  3387. __setup_ucregion_memory_map(device);
  3388. /* Wait for boot completion */
  3389. rc = __boot_firmware(device);
  3390. if (rc) {
  3391. dprintk(CVP_ERR, "Failed to reset cvp core\n");
  3392. goto err_reset_core;
  3393. }
  3394. /*
  3395. * Work around for H/W bug, need to reprogram these registers once
  3396. * firmware is out reset
  3397. */
  3398. __set_threshold_registers(device);
  3399. if (device->res->pm_qos_latency_us)
  3400. cpu_latency_qos_add_request(&device->qos,
  3401. device->res->pm_qos_latency_us);
  3402. __sys_set_debug(device, msm_cvp_fw_debug);
  3403. __enable_subcaches(device);
  3404. __set_subcaches(device);
  3405. __dsp_resume(device, flags);
  3406. dprintk(CVP_PWR, "Resumed from power collapse\n");
  3407. exit:
  3408. /* Don't reset skip_pc_count for SYS_PC_PREP cmd */
  3409. if (device->last_packet_type != HFI_CMD_SYS_PC_PREP)
  3410. device->skip_pc_count = 0;
  3411. return rc;
  3412. err_reset_core:
  3413. __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_SUSPEND);
  3414. err_set_cvp_state:
  3415. call_iris_op(device, power_off, device);
  3416. err_iris_power_on:
  3417. dprintk(CVP_ERR, "Failed to resume from power collapse\n");
  3418. return rc;
  3419. }
  3420. static int __load_fw(struct iris_hfi_device *device)
  3421. {
  3422. int rc = 0;
  3423. /* Initialize resources */
  3424. rc = __init_resources(device, device->res);
  3425. if (rc) {
  3426. dprintk(CVP_ERR, "Failed to init resources: %d\n", rc);
  3427. goto fail_init_res;
  3428. }
  3429. rc = __initialize_packetization(device);
  3430. if (rc) {
  3431. dprintk(CVP_ERR, "Failed to initialize packetization\n");
  3432. goto fail_init_pkt;
  3433. }
  3434. rc = __iris_power_on(device);
  3435. if (rc) {
  3436. dprintk(CVP_ERR, "Failed to power on iris in in load_fw\n");
  3437. goto fail_iris_power_on;
  3438. }
  3439. if ((!device->res->use_non_secure_pil && !device->res->firmware_base)
  3440. || device->res->use_non_secure_pil) {
  3441. rc = load_cvp_fw_impl(device);
  3442. if (rc)
  3443. goto fail_load_fw;
  3444. }
  3445. return rc;
  3446. fail_load_fw:
  3447. call_iris_op(device, power_off, device);
  3448. fail_iris_power_on:
  3449. fail_init_pkt:
  3450. __deinit_resources(device);
  3451. fail_init_res:
  3452. return rc;
  3453. }
  3454. static void __unload_fw(struct iris_hfi_device *device)
  3455. {
  3456. if (!device->resources.fw.cookie)
  3457. return;
  3458. cancel_delayed_work(&iris_hfi_pm_work);
  3459. if (device->state != IRIS_STATE_DEINIT)
  3460. flush_workqueue(device->iris_pm_workq);
  3461. unload_cvp_fw_impl(device);
  3462. __interface_queues_release(device);
  3463. call_iris_op(device, power_off, device);
  3464. __deinit_resources(device);
  3465. dprintk(CVP_WARN, "Firmware unloaded\n");
  3466. }
  3467. static int iris_hfi_get_fw_info(void *dev, struct cvp_hal_fw_info *fw_info)
  3468. {
  3469. int i = 0;
  3470. struct iris_hfi_device *device = dev;
  3471. if (!device || !fw_info) {
  3472. dprintk(CVP_ERR,
  3473. "%s Invalid parameter: device = %pK fw_info = %pK\n",
  3474. __func__, device, fw_info);
  3475. return -EINVAL;
  3476. }
  3477. mutex_lock(&device->lock);
  3478. while (cvp_driver->fw_version[i++] != 'V' && i < CVP_VERSION_LENGTH)
  3479. ;
  3480. if (i == CVP_VERSION_LENGTH - 1) {
  3481. dprintk(CVP_WARN, "Iris version string is not proper\n");
  3482. fw_info->version[0] = '\0';
  3483. goto fail_version_string;
  3484. }
  3485. memcpy(&fw_info->version[0], &cvp_driver->fw_version[0],
  3486. CVP_VERSION_LENGTH);
  3487. fw_info->version[CVP_VERSION_LENGTH - 1] = '\0';
  3488. fail_version_string:
  3489. dprintk(CVP_CORE, "F/W version retrieved : %s\n", fw_info->version);
  3490. fw_info->base_addr = device->cvp_hal_data->firmware_base;
  3491. fw_info->register_base = device->res->register_base;
  3492. fw_info->register_size = device->cvp_hal_data->register_size;
  3493. fw_info->irq = device->cvp_hal_data->irq;
  3494. mutex_unlock(&device->lock);
  3495. return 0;
  3496. }
  3497. static int iris_hfi_get_core_capabilities(void *dev)
  3498. {
  3499. dprintk(CVP_CORE, "%s not supported yet!\n", __func__);
  3500. return 0;
  3501. }
  3502. static const char * const mid_names[16] = {
  3503. "CVP_FW",
  3504. "ARP_DATA",
  3505. "CVP_OD_NON_PIXEL",
  3506. "CVP_OD_ORIG_PIXEL",
  3507. "CVP_OD_WR_PIXEL",
  3508. "CVP_MPU_ORIG_PIXEL",
  3509. "CVP_MPU_REF_PIXEL",
  3510. "CVP_MPU_NON_PIXEL",
  3511. "CVP_MPU_DFS",
  3512. "CVP_FDU_NON_PIXEL",
  3513. "CVP_FDU_PIXEL",
  3514. "CVP_ICA_PIXEL",
  3515. "Invalid",
  3516. "Invalid",
  3517. "Invalid",
  3518. "Invalid"
  3519. };
  3520. static void __print_reg_details(u32 val)
  3521. {
  3522. u32 mid, sid;
  3523. mid = (val >> 5) & 0xF;
  3524. sid = (val >> 2) & 0x7;
  3525. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG3_LOW: %#x\n", val);
  3526. dprintk(CVP_ERR, "Sub-client:%s, SID: %d\n", mid_names[mid], sid);
  3527. }
  3528. static void __err_log(bool logging, u32 *data, const char *name, u32 val)
  3529. {
  3530. if (logging)
  3531. *data = val;
  3532. dprintk(CVP_ERR, "%s: %#x\n", name, val);
  3533. }
  3534. static void __noc_error_info_iris2(struct iris_hfi_device *device)
  3535. {
  3536. struct msm_cvp_core *core;
  3537. struct cvp_noc_log *noc_log;
  3538. u32 val = 0, regi, i;
  3539. bool log_required = false;
  3540. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  3541. if (!core->ssr_count && core->resources.max_ssr_allowed > 1)
  3542. log_required = true;
  3543. noc_log = &core->log.noc_log;
  3544. val = __read_register(device, CVP_NOC_ERR_SWID_LOW_OFFS);
  3545. __err_log(log_required, &noc_log->err_ctrl_swid_low,
  3546. "CVP_NOC_ERL_MAIN_SWID_LOW", val);
  3547. val = __read_register(device, CVP_NOC_ERR_SWID_HIGH_OFFS);
  3548. __err_log(log_required, &noc_log->err_ctrl_swid_high,
  3549. "CVP_NOC_ERL_MAIN_SWID_HIGH", val);
  3550. val = __read_register(device, CVP_NOC_ERR_MAINCTL_LOW_OFFS);
  3551. __err_log(log_required, &noc_log->err_ctrl_mainctl_low,
  3552. "CVP_NOC_ERL_MAIN_MAINCTL_LOW", val);
  3553. val = __read_register(device, CVP_NOC_ERR_ERRVLD_LOW_OFFS);
  3554. __err_log(log_required, &noc_log->err_ctrl_errvld_low,
  3555. "CVP_NOC_ERL_MAIN_ERRVLD_LOW", val);
  3556. val = __read_register(device, CVP_NOC_ERR_ERRCLR_LOW_OFFS);
  3557. __err_log(log_required, &noc_log->err_ctrl_errclr_low,
  3558. "CVP_NOC_ERL_MAIN_ERRCLR_LOW", val);
  3559. val = __read_register(device, CVP_NOC_ERR_ERRLOG0_LOW_OFFS);
  3560. __err_log(log_required, &noc_log->err_ctrl_errlog0_low,
  3561. "CVP_NOC_ERL_MAIN_ERRLOG0_LOW", val);
  3562. val = __read_register(device, CVP_NOC_ERR_ERRLOG0_HIGH_OFFS);
  3563. __err_log(log_required, &noc_log->err_ctrl_errlog0_high,
  3564. "CVP_NOC_ERL_MAIN_ERRLOG0_HIGH", val);
  3565. val = __read_register(device, CVP_NOC_ERR_ERRLOG1_LOW_OFFS);
  3566. __err_log(log_required, &noc_log->err_ctrl_errlog1_low,
  3567. "CVP_NOC_ERL_MAIN_ERRLOG1_LOW", val);
  3568. val = __read_register(device, CVP_NOC_ERR_ERRLOG1_HIGH_OFFS);
  3569. __err_log(log_required, &noc_log->err_ctrl_errlog1_high,
  3570. "CVP_NOC_ERL_MAIN_ERRLOG1_HIGH", val);
  3571. val = __read_register(device, CVP_NOC_ERR_ERRLOG2_LOW_OFFS);
  3572. __err_log(log_required, &noc_log->err_ctrl_errlog2_low,
  3573. "CVP_NOC_ERL_MAIN_ERRLOG2_LOW", val);
  3574. val = __read_register(device, CVP_NOC_ERR_ERRLOG2_HIGH_OFFS);
  3575. __err_log(log_required, &noc_log->err_ctrl_errlog2_high,
  3576. "CVP_NOC_ERL_MAIN_ERRLOG2_HIGH", val);
  3577. val = __read_register(device, CVP_NOC_ERR_ERRLOG3_LOW_OFFS);
  3578. __err_log(log_required, &noc_log->err_ctrl_errlog3_low,
  3579. "CVP_NOC_ERL_MAIN_ERRLOG3_LOW", val);
  3580. val = __read_register(device, CVP_NOC_ERR_ERRLOG3_HIGH_OFFS);
  3581. __err_log(log_required, &noc_log->err_ctrl_errlog3_high,
  3582. "CVP_NOC_ERL_MAIN_ERRLOG3_HIGH", val);
  3583. val = __read_register(device, CVP_NOC_CORE_ERR_SWID_LOW_OFFS);
  3584. __err_log(log_required, &noc_log->err_core_swid_low,
  3585. "CVP_NOC__CORE_ERL_MAIN_SWID_LOW", val);
  3586. val = __read_register(device, CVP_NOC_CORE_ERR_SWID_HIGH_OFFS);
  3587. __err_log(log_required, &noc_log->err_core_swid_high,
  3588. "CVP_NOC_CORE_ERL_MAIN_SWID_HIGH", val);
  3589. val = __read_register(device, CVP_NOC_CORE_ERR_MAINCTL_LOW_OFFS);
  3590. __err_log(log_required, &noc_log->err_core_mainctl_low,
  3591. "CVP_NOC_CORE_ERL_MAIN_MAINCTL_LOW", val);
  3592. val = __read_register(device, CVP_NOC_CORE_ERR_ERRVLD_LOW_OFFS);
  3593. __err_log(log_required, &noc_log->err_core_errvld_low,
  3594. "CVP_NOC_CORE_ERL_MAIN_ERRVLD_LOW", val);
  3595. val = __read_register(device, CVP_NOC_CORE_ERR_ERRCLR_LOW_OFFS);
  3596. __err_log(log_required, &noc_log->err_core_errclr_low,
  3597. "CVP_NOC_CORE_ERL_MAIN_ERRCLR_LOW", val);
  3598. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG0_LOW_OFFS);
  3599. __err_log(log_required, &noc_log->err_core_errlog0_low,
  3600. "CVP_NOC_CORE_ERL_MAIN_ERRLOG0_LOW", val);
  3601. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG0_HIGH_OFFS);
  3602. __err_log(log_required, &noc_log->err_core_errlog0_high,
  3603. "CVP_NOC_CORE_ERL_MAIN_ERRLOG0_HIGH", val);
  3604. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG1_LOW_OFFS);
  3605. __err_log(log_required, &noc_log->err_core_errlog1_low,
  3606. "CVP_NOC_CORE_ERL_MAIN_ERRLOG1_LOW", val);
  3607. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG1_HIGH_OFFS);
  3608. __err_log(log_required, &noc_log->err_core_errlog1_high,
  3609. "CVP_NOC_CORE_ERL_MAIN_ERRLOG1_HIGH", val);
  3610. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG2_LOW_OFFS);
  3611. __err_log(log_required, &noc_log->err_core_errlog2_low,
  3612. "CVP_NOC_CORE_ERL_MAIN_ERRLOG2_LOW", val);
  3613. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG2_HIGH_OFFS);
  3614. __err_log(log_required, &noc_log->err_core_errlog2_high,
  3615. "CVP_NOC_CORE_ERL_MAIN_ERRLOG2_HIGH", val);
  3616. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_LOW_OFFS);
  3617. __err_log(log_required, &noc_log->err_core_errlog3_low,
  3618. "CORE ERRLOG3_LOW, below details", val);
  3619. __print_reg_details(val);
  3620. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_HIGH_OFFS);
  3621. __err_log(log_required, &noc_log->err_core_errlog3_high,
  3622. "CVP_NOC_CORE_ERL_MAIN_ERRLOG3_HIGH", val);
  3623. #define CVP_SS_CLK_HALT 0x8
  3624. #define CVP_SS_CLK_EN 0xC
  3625. #define CVP_SS_ARP_TEST_BUS_CONTROL 0x700
  3626. #define CVP_SS_ARP_TEST_BUS_REGISTER 0x704
  3627. #define CVP_DMA_TEST_BUS_CONTROL 0x66A0
  3628. #define CVP_DMA_TEST_BUS_REGISTER 0x66A4
  3629. #define CVP_VPU_WRAPPER_CORE_CONFIG 0xB0088
  3630. __write_register(device, CVP_SS_CLK_HALT, 0);
  3631. __write_register(device, CVP_SS_CLK_EN, 0x3f);
  3632. __write_register(device, CVP_VPU_WRAPPER_CORE_CONFIG, 0);
  3633. for (i = 0; i < 15; i++) {
  3634. regi = 0xC0000000 + i;
  3635. __write_register(device, CVP_SS_ARP_TEST_BUS_CONTROL, regi);
  3636. val = __read_register(device, CVP_SS_ARP_TEST_BUS_REGISTER);
  3637. noc_log->arp_test_bus[i] = val;
  3638. dprintk(CVP_ERR, "ARP_CTL:%x - %x\n", regi, val);
  3639. }
  3640. for (i = 0; i < 512; i++) {
  3641. regi = 0x40000000 + i;
  3642. __write_register(device, CVP_DMA_TEST_BUS_CONTROL, regi);
  3643. val = __read_register(device, CVP_DMA_TEST_BUS_REGISTER);
  3644. noc_log->dma_test_bus[i] = val;
  3645. dprintk(CVP_ERR, "DMA_CTL:%x - %x\n", regi, val);
  3646. }
  3647. }
  3648. static int iris_hfi_noc_error_info(void *dev)
  3649. {
  3650. struct iris_hfi_device *device;
  3651. if (!dev) {
  3652. dprintk(CVP_ERR, "%s: null device\n", __func__);
  3653. return -EINVAL;
  3654. }
  3655. device = dev;
  3656. mutex_lock(&device->lock);
  3657. dprintk(CVP_ERR, "%s: non error information\n", __func__);
  3658. call_iris_op(device, noc_error_info, device);
  3659. mutex_unlock(&device->lock);
  3660. return 0;
  3661. }
  3662. static int __initialize_packetization(struct iris_hfi_device *device)
  3663. {
  3664. int rc = 0;
  3665. if (!device || !device->res) {
  3666. dprintk(CVP_ERR, "%s - invalid param\n", __func__);
  3667. return -EINVAL;
  3668. }
  3669. device->packetization_type = HFI_PACKETIZATION_4XX;
  3670. device->pkt_ops = cvp_hfi_get_pkt_ops_handle(
  3671. device->packetization_type);
  3672. if (!device->pkt_ops) {
  3673. rc = -EINVAL;
  3674. dprintk(CVP_ERR, "Failed to get pkt_ops handle\n");
  3675. }
  3676. return rc;
  3677. }
  3678. void __init_cvp_ops(struct iris_hfi_device *device)
  3679. {
  3680. device->vpu_ops = &iris2_ops;
  3681. }
  3682. static struct iris_hfi_device *__add_device(u32 device_id,
  3683. struct msm_cvp_platform_resources *res,
  3684. hfi_cmd_response_callback callback)
  3685. {
  3686. struct iris_hfi_device *hdevice = NULL;
  3687. int rc = 0;
  3688. if (!res || !callback) {
  3689. dprintk(CVP_ERR, "Invalid Parameters\n");
  3690. return NULL;
  3691. }
  3692. dprintk(CVP_INFO, "%s: device_id: %d\n", __func__, device_id);
  3693. hdevice = kzalloc(sizeof(*hdevice), GFP_KERNEL);
  3694. if (!hdevice) {
  3695. dprintk(CVP_ERR, "failed to allocate new device\n");
  3696. goto exit;
  3697. }
  3698. hdevice->response_pkt = kmalloc_array(cvp_max_packets,
  3699. sizeof(*hdevice->response_pkt), GFP_KERNEL);
  3700. if (!hdevice->response_pkt) {
  3701. dprintk(CVP_ERR, "failed to allocate response_pkt\n");
  3702. goto err_cleanup;
  3703. }
  3704. hdevice->raw_packet =
  3705. kzalloc(CVP_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL);
  3706. if (!hdevice->raw_packet) {
  3707. dprintk(CVP_ERR, "failed to allocate raw packet\n");
  3708. goto err_cleanup;
  3709. }
  3710. rc = __init_regs_and_interrupts(hdevice, res);
  3711. if (rc)
  3712. goto err_cleanup;
  3713. hdevice->res = res;
  3714. hdevice->device_id = device_id;
  3715. hdevice->callback = callback;
  3716. __init_cvp_ops(hdevice);
  3717. hdevice->cvp_workq = create_singlethread_workqueue(
  3718. "msm_cvp_workerq_iris");
  3719. if (!hdevice->cvp_workq) {
  3720. dprintk(CVP_ERR, ": create cvp workq failed\n");
  3721. goto err_cleanup;
  3722. }
  3723. hdevice->iris_pm_workq = create_singlethread_workqueue(
  3724. "pm_workerq_iris");
  3725. if (!hdevice->iris_pm_workq) {
  3726. dprintk(CVP_ERR, ": create pm workq failed\n");
  3727. goto err_cleanup;
  3728. }
  3729. mutex_init(&hdevice->lock);
  3730. INIT_LIST_HEAD(&hdevice->sess_head);
  3731. return hdevice;
  3732. err_cleanup:
  3733. if (hdevice->iris_pm_workq)
  3734. destroy_workqueue(hdevice->iris_pm_workq);
  3735. if (hdevice->cvp_workq)
  3736. destroy_workqueue(hdevice->cvp_workq);
  3737. kfree(hdevice->response_pkt);
  3738. kfree(hdevice->raw_packet);
  3739. kfree(hdevice);
  3740. exit:
  3741. return NULL;
  3742. }
  3743. static struct iris_hfi_device *__get_device(u32 device_id,
  3744. struct msm_cvp_platform_resources *res,
  3745. hfi_cmd_response_callback callback)
  3746. {
  3747. if (!res || !callback) {
  3748. dprintk(CVP_ERR, "Invalid params: %pK %pK\n", res, callback);
  3749. return NULL;
  3750. }
  3751. return __add_device(device_id, res, callback);
  3752. }
  3753. void cvp_iris_hfi_delete_device(void *device)
  3754. {
  3755. struct msm_cvp_core *core;
  3756. struct iris_hfi_device *dev = NULL;
  3757. if (!device)
  3758. return;
  3759. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  3760. if (core)
  3761. dev = core->device->hfi_device_data;
  3762. if (!dev)
  3763. return;
  3764. mutex_destroy(&dev->lock);
  3765. destroy_workqueue(dev->cvp_workq);
  3766. destroy_workqueue(dev->iris_pm_workq);
  3767. free_irq(dev->cvp_hal_data->irq, dev);
  3768. iounmap(dev->cvp_hal_data->register_base);
  3769. iounmap(dev->cvp_hal_data->gcc_reg_base);
  3770. kfree(dev->cvp_hal_data);
  3771. kfree(dev->response_pkt);
  3772. kfree(dev->raw_packet);
  3773. kfree(dev);
  3774. }
  3775. static int iris_hfi_validate_session(void *sess, const char *func)
  3776. {
  3777. struct cvp_hal_session *session = sess;
  3778. int rc = 0;
  3779. struct iris_hfi_device *device;
  3780. if (!session || !session->device) {
  3781. dprintk(CVP_ERR, " %s Invalid Params %pK\n", __func__, session);
  3782. return -EINVAL;
  3783. }
  3784. device = session->device;
  3785. mutex_lock(&device->lock);
  3786. if (!__is_session_valid(device, session, func))
  3787. rc = -ECONNRESET;
  3788. mutex_unlock(&device->lock);
  3789. return rc;
  3790. }
  3791. static void iris_init_hfi_callbacks(struct cvp_hfi_device *hdev)
  3792. {
  3793. hdev->core_init = iris_hfi_core_init;
  3794. hdev->core_release = iris_hfi_core_release;
  3795. hdev->core_trigger_ssr = iris_hfi_core_trigger_ssr;
  3796. hdev->session_init = iris_hfi_session_init;
  3797. hdev->session_end = iris_hfi_session_end;
  3798. hdev->session_abort = iris_hfi_session_abort;
  3799. hdev->session_clean = iris_hfi_session_clean;
  3800. hdev->session_set_buffers = iris_hfi_session_set_buffers;
  3801. hdev->session_release_buffers = iris_hfi_session_release_buffers;
  3802. hdev->session_send = iris_hfi_session_send;
  3803. hdev->session_flush = iris_hfi_session_flush;
  3804. hdev->scale_clocks = iris_hfi_scale_clocks;
  3805. hdev->vote_bus = iris_hfi_vote_buses;
  3806. hdev->get_fw_info = iris_hfi_get_fw_info;
  3807. hdev->get_core_capabilities = iris_hfi_get_core_capabilities;
  3808. hdev->suspend = iris_hfi_suspend;
  3809. hdev->resume = iris_hfi_resume;
  3810. hdev->flush_debug_queue = iris_hfi_flush_debug_queue;
  3811. hdev->noc_error_info = iris_hfi_noc_error_info;
  3812. hdev->validate_session = iris_hfi_validate_session;
  3813. }
  3814. int cvp_iris_hfi_initialize(struct cvp_hfi_device *hdev, u32 device_id,
  3815. struct msm_cvp_platform_resources *res,
  3816. hfi_cmd_response_callback callback)
  3817. {
  3818. int rc = 0;
  3819. if (!hdev || !res || !callback) {
  3820. dprintk(CVP_ERR, "Invalid params: %pK %pK %pK\n",
  3821. hdev, res, callback);
  3822. rc = -EINVAL;
  3823. goto err_iris_hfi_init;
  3824. }
  3825. hdev->hfi_device_data = __get_device(device_id, res, callback);
  3826. if (IS_ERR_OR_NULL(hdev->hfi_device_data)) {
  3827. rc = PTR_ERR(hdev->hfi_device_data) ?: -EINVAL;
  3828. goto err_iris_hfi_init;
  3829. }
  3830. iris_init_hfi_callbacks(hdev);
  3831. err_iris_hfi_init:
  3832. return rc;
  3833. }