rouleur.c 71 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/slab.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/device.h>
  9. #include <linux/delay.h>
  10. #include <linux/kernel.h>
  11. #include <linux/component.h>
  12. #include <linux/regmap.h>
  13. #include <linux/pm_runtime.h>
  14. #include <linux/of_platform.h>
  15. #include <sound/soc.h>
  16. #include <sound/tlv.h>
  17. #include <soc/soundwire.h>
  18. #include <sound/soc.h>
  19. #include <sound/soc-dapm.h>
  20. #include "internal.h"
  21. #include "rouleur.h"
  22. #include <asoc/wcdcal-hwdep.h>
  23. #include "rouleur-registers.h"
  24. #include "pm2250-spmi.h"
  25. #include <asoc/msm-cdc-pinctrl.h>
  26. #include <dt-bindings/sound/audio-codec-port-types.h>
  27. #include <asoc/msm-cdc-supply.h>
  28. #define DRV_NAME "rouleur_codec"
  29. #define NUM_SWRS_DT_PARAMS 5
  30. #define ROULEUR_VERSION_1_0 1
  31. #define ROULEUR_VERSION_ENTRY_SIZE 32
  32. #define NUM_ATTEMPTS 5
  33. enum {
  34. CODEC_TX = 0,
  35. CODEC_RX,
  36. };
  37. enum {
  38. ALLOW_VPOS_DISABLE,
  39. HPH_COMP_DELAY,
  40. HPH_PA_DELAY,
  41. AMIC2_BCS_ENABLE,
  42. WCD_SUPPLIES_LPM_MODE,
  43. };
  44. /* TODO: Check on the step values */
  45. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  46. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  47. static int rouleur_handle_post_irq(void *data);
  48. static int rouleur_reset(struct device *dev, int val);
  49. static const struct regmap_irq ROULEUR_IRQs[ROULEUR_NUM_IRQS] = {
  50. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
  51. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
  52. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_ELECT_INS_REM_DET, 0, 0x04),
  53. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_ELECT_INS_REM_LEG_DET, 0, 0x08),
  54. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_SW_DET, 0, 0x10),
  55. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_OCP_INT, 0, 0x20),
  56. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_CNP_INT, 0, 0x40),
  57. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_OCP_INT, 0, 0x80),
  58. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_CNP_INT, 1, 0x01),
  59. REGMAP_IRQ_REG(ROULEUR_IRQ_EAR_CNP_INT, 1, 0x02),
  60. REGMAP_IRQ_REG(ROULEUR_IRQ_EAR_OCP_INT, 1, 0x04),
  61. REGMAP_IRQ_REG(ROULEUR_IRQ_LO_CNP_INT, 1, 0x08),
  62. REGMAP_IRQ_REG(ROULEUR_IRQ_LO_OCP_INT, 1, 0x10),
  63. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_PDM_WD_INT, 1, 0x20),
  64. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_PDM_WD_INT, 1, 0x40),
  65. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_SURGE_DET_INT, 2, 0x04),
  66. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
  67. };
  68. static struct regmap_irq_chip rouleur_regmap_irq_chip = {
  69. .name = "rouleur",
  70. .irqs = ROULEUR_IRQs,
  71. .num_irqs = ARRAY_SIZE(ROULEUR_IRQs),
  72. .num_regs = 3,
  73. .status_base = ROULEUR_DIG_SWR_INTR_STATUS_0,
  74. .mask_base = ROULEUR_DIG_SWR_INTR_MASK_0,
  75. .ack_base = ROULEUR_DIG_SWR_INTR_CLEAR_0,
  76. .use_ack = 1,
  77. .type_base = ROULEUR_DIG_SWR_INTR_LEVEL_0,
  78. .runtime_pm = false,
  79. .handle_post_irq = rouleur_handle_post_irq,
  80. .irq_drv_data = NULL,
  81. };
  82. static int rouleur_handle_post_irq(void *data)
  83. {
  84. struct rouleur_priv *rouleur = data;
  85. u32 status1 = 0, status2 = 0, status3 = 0;
  86. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_0, &status1);
  87. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_1, &status2);
  88. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_2, &status3);
  89. rouleur->tx_swr_dev->slave_irq_pending =
  90. ((status1 || status2 || status3) ? true : false);
  91. return IRQ_HANDLED;
  92. }
  93. static int rouleur_init_reg(struct snd_soc_component *component)
  94. {
  95. /* Disable HPH OCP */
  96. snd_soc_component_update_bits(component, ROULEUR_ANA_HPHPA_CNP_CTL_2,
  97. 0x03, 0x00);
  98. /* Enable surge protection */
  99. snd_soc_component_update_bits(component, ROULEUR_ANA_SURGE_EN,
  100. 0xC0, 0xC0);
  101. /* Disable mic bias pull down */
  102. snd_soc_component_update_bits(component, ROULEUR_ANA_MICBIAS_MICB_1_2_EN,
  103. 0x01, 0x00);
  104. return 0;
  105. }
  106. static int rouleur_set_port_params(struct snd_soc_component *component,
  107. u8 slv_prt_type, u8 *port_id, u8 *num_ch,
  108. u8 *ch_mask, u32 *ch_rate,
  109. u8 *port_type, u8 path)
  110. {
  111. int i, j;
  112. u8 num_ports = 0;
  113. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  114. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  115. switch (path) {
  116. case CODEC_RX:
  117. map = &rouleur->rx_port_mapping;
  118. num_ports = rouleur->num_rx_ports;
  119. break;
  120. case CODEC_TX:
  121. map = &rouleur->tx_port_mapping;
  122. num_ports = rouleur->num_tx_ports;
  123. break;
  124. default:
  125. dev_err(component->dev, "%s Invalid path: %d\n",
  126. __func__, path);
  127. return -EINVAL;
  128. }
  129. for (i = 0; i <= num_ports; i++) {
  130. for (j = 0; j < MAX_CH_PER_PORT; j++) {
  131. if ((*map)[i][j].slave_port_type == slv_prt_type)
  132. goto found;
  133. }
  134. }
  135. dev_err(component->dev, "%s Failed to find slave port for type %u\n",
  136. __func__, slv_prt_type);
  137. return -EINVAL;
  138. found:
  139. *port_id = i;
  140. *num_ch = (*map)[i][j].num_ch;
  141. *ch_mask = (*map)[i][j].ch_mask;
  142. *ch_rate = (*map)[i][j].ch_rate;
  143. *port_type = (*map)[i][j].master_port_type;
  144. return 0;
  145. }
  146. static int rouleur_parse_port_mapping(struct device *dev,
  147. char *prop, u8 path)
  148. {
  149. u32 *dt_array, map_size, map_length;
  150. u32 port_num = 0, ch_mask, ch_rate, old_port_num = 0;
  151. u32 slave_port_type, master_port_type;
  152. u32 i, ch_iter = 0;
  153. int ret = 0;
  154. u8 *num_ports = NULL;
  155. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  156. struct rouleur_priv *rouleur = dev_get_drvdata(dev);
  157. switch (path) {
  158. case CODEC_RX:
  159. map = &rouleur->rx_port_mapping;
  160. num_ports = &rouleur->num_rx_ports;
  161. break;
  162. case CODEC_TX:
  163. map = &rouleur->tx_port_mapping;
  164. num_ports = &rouleur->num_tx_ports;
  165. break;
  166. default:
  167. dev_err(dev, "%s Invalid path: %d\n",
  168. __func__, path);
  169. return -EINVAL;
  170. }
  171. if (!of_find_property(dev->of_node, prop,
  172. &map_size)) {
  173. dev_err(dev, "missing port mapping prop %s\n", prop);
  174. ret = -EINVAL;
  175. goto err;
  176. }
  177. map_length = map_size / (NUM_SWRS_DT_PARAMS * sizeof(u32));
  178. dt_array = kzalloc(map_size, GFP_KERNEL);
  179. if (!dt_array) {
  180. ret = -ENOMEM;
  181. goto err;
  182. }
  183. ret = of_property_read_u32_array(dev->of_node, prop, dt_array,
  184. NUM_SWRS_DT_PARAMS * map_length);
  185. if (ret) {
  186. dev_err(dev, "%s: Failed to read port mapping from prop %s\n",
  187. __func__, prop);
  188. ret = -EINVAL;
  189. goto err_pdata_fail;
  190. }
  191. for (i = 0; i < map_length; i++) {
  192. port_num = dt_array[NUM_SWRS_DT_PARAMS * i];
  193. slave_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 1];
  194. ch_mask = dt_array[NUM_SWRS_DT_PARAMS * i + 2];
  195. ch_rate = dt_array[NUM_SWRS_DT_PARAMS * i + 3];
  196. master_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 4];
  197. if (port_num != old_port_num)
  198. ch_iter = 0;
  199. (*map)[port_num][ch_iter].slave_port_type = slave_port_type;
  200. (*map)[port_num][ch_iter].ch_mask = ch_mask;
  201. (*map)[port_num][ch_iter].master_port_type = master_port_type;
  202. (*map)[port_num][ch_iter].num_ch = __sw_hweight8(ch_mask);
  203. (*map)[port_num][ch_iter++].ch_rate = ch_rate;
  204. old_port_num = port_num;
  205. }
  206. *num_ports = port_num;
  207. err_pdata_fail:
  208. kfree(dt_array);
  209. err:
  210. return ret;
  211. }
  212. static int rouleur_tx_connect_port(struct snd_soc_component *component,
  213. u8 slv_port_type, u8 enable)
  214. {
  215. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  216. u8 port_id;
  217. u8 num_ch;
  218. u8 ch_mask;
  219. u32 ch_rate;
  220. u8 port_type;
  221. u8 num_port = 1;
  222. int ret = 0;
  223. ret = rouleur_set_port_params(component, slv_port_type, &port_id,
  224. &num_ch, &ch_mask, &ch_rate,
  225. &port_type, CODEC_TX);
  226. if (ret) {
  227. dev_err(rouleur->dev, "%s:Failed to set port params: %d\n",
  228. __func__, ret);
  229. return ret;
  230. }
  231. if (enable)
  232. ret = swr_connect_port(rouleur->tx_swr_dev, &port_id,
  233. num_port, &ch_mask, &ch_rate,
  234. &num_ch, &port_type);
  235. else
  236. ret = swr_disconnect_port(rouleur->tx_swr_dev, &port_id,
  237. num_port, &ch_mask, &port_type);
  238. return ret;
  239. }
  240. static int rouleur_rx_connect_port(struct snd_soc_component *component,
  241. u8 slv_port_type, u8 enable)
  242. {
  243. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  244. u8 port_id;
  245. u8 num_ch;
  246. u8 ch_mask;
  247. u32 ch_rate;
  248. u8 port_type;
  249. u8 num_port = 1;
  250. int ret = 0;
  251. ret = rouleur_set_port_params(component, slv_port_type, &port_id,
  252. &num_ch, &ch_mask, &ch_rate,
  253. &port_type, CODEC_RX);
  254. if (ret) {
  255. dev_err(rouleur->dev, "%s:Failed to set port params: %d\n",
  256. __func__, ret);
  257. return ret;
  258. }
  259. if (enable)
  260. ret = swr_connect_port(rouleur->rx_swr_dev, &port_id,
  261. num_port, &ch_mask, &ch_rate,
  262. &num_ch, &port_type);
  263. else
  264. ret = swr_disconnect_port(rouleur->rx_swr_dev, &port_id,
  265. num_port, &ch_mask, &port_type);
  266. return ret;
  267. }
  268. int rouleur_global_mbias_enable(struct snd_soc_component *component)
  269. {
  270. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  271. mutex_lock(&rouleur->main_bias_lock);
  272. if (rouleur->mbias_cnt == 0) {
  273. snd_soc_component_update_bits(component,
  274. ROULEUR_ANA_MBIAS_EN, 0x20, 0x20);
  275. snd_soc_component_update_bits(component,
  276. ROULEUR_ANA_MBIAS_EN, 0x10, 0x10);
  277. usleep_range(1000, 1100);
  278. }
  279. rouleur->mbias_cnt++;
  280. mutex_unlock(&rouleur->main_bias_lock);
  281. return 0;
  282. }
  283. int rouleur_global_mbias_disable(struct snd_soc_component *component)
  284. {
  285. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  286. mutex_lock(&rouleur->main_bias_lock);
  287. if (rouleur->mbias_cnt == 0) {
  288. dev_dbg(rouleur->dev, "%s:mbias already disabled\n", __func__);
  289. mutex_unlock(&rouleur->main_bias_lock);
  290. return 0;
  291. }
  292. rouleur->mbias_cnt--;
  293. if (rouleur->mbias_cnt == 0) {
  294. snd_soc_component_update_bits(component,
  295. ROULEUR_ANA_MBIAS_EN, 0x10, 0x00);
  296. snd_soc_component_update_bits(component,
  297. ROULEUR_ANA_MBIAS_EN, 0x20, 0x00);
  298. }
  299. mutex_unlock(&rouleur->main_bias_lock);
  300. return 0;
  301. }
  302. static int rouleur_rx_clk_enable(struct snd_soc_component *component)
  303. {
  304. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  305. mutex_lock(&rouleur->rx_clk_lock);
  306. if (rouleur->rx_clk_cnt == 0) {
  307. snd_soc_component_update_bits(component,
  308. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x10, 0x10);
  309. snd_soc_component_update_bits(component,
  310. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x20, 0x20);
  311. usleep_range(5000, 5100);
  312. rouleur_global_mbias_enable(component);
  313. snd_soc_component_update_bits(component,
  314. ROULEUR_ANA_HPHPA_FSM_CLK, 0x7F, 0x11);
  315. snd_soc_component_update_bits(component,
  316. ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x80);
  317. snd_soc_component_update_bits(component,
  318. ROULEUR_ANA_NCP_EN, 0x01, 0x01);
  319. usleep_range(500, 510);
  320. }
  321. rouleur->rx_clk_cnt++;
  322. mutex_unlock(&rouleur->rx_clk_lock);
  323. return 0;
  324. }
  325. static int rouleur_rx_clk_disable(struct snd_soc_component *component)
  326. {
  327. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  328. mutex_lock(&rouleur->rx_clk_lock);
  329. if (rouleur->rx_clk_cnt == 0) {
  330. dev_dbg(rouleur->dev, "%s:clk already disabled\n", __func__);
  331. mutex_unlock(&rouleur->rx_clk_lock);
  332. return 0;
  333. }
  334. rouleur->rx_clk_cnt--;
  335. if (rouleur->rx_clk_cnt == 0) {
  336. snd_soc_component_update_bits(component,
  337. ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x00);
  338. snd_soc_component_update_bits(component,
  339. ROULEUR_ANA_HPHPA_FSM_CLK, 0x7F, 0x00);
  340. snd_soc_component_update_bits(component,
  341. ROULEUR_ANA_NCP_EN, 0x01, 0x00);
  342. snd_soc_component_update_bits(component,
  343. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x20, 0x00);
  344. snd_soc_component_update_bits(component,
  345. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x10, 0x00);
  346. rouleur_global_mbias_disable(component);
  347. }
  348. mutex_unlock(&rouleur->rx_clk_lock);
  349. return 0;
  350. }
  351. /*
  352. * rouleur_soc_get_mbhc: get rouleur_mbhc handle of corresponding component
  353. * @component: handle to snd_soc_component *
  354. *
  355. * return rouleur_mbhc handle or error code in case of failure
  356. */
  357. struct rouleur_mbhc *rouleur_soc_get_mbhc(struct snd_soc_component *component)
  358. {
  359. struct rouleur_priv *rouleur;
  360. if (!component) {
  361. pr_err("%s: Invalid params, NULL component\n", __func__);
  362. return NULL;
  363. }
  364. rouleur = snd_soc_component_get_drvdata(component);
  365. if (!rouleur) {
  366. pr_err("%s: Invalid params, NULL tavil\n", __func__);
  367. return NULL;
  368. }
  369. return rouleur->mbhc;
  370. }
  371. EXPORT_SYMBOL(rouleur_soc_get_mbhc);
  372. static int rouleur_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
  373. struct snd_kcontrol *kcontrol,
  374. int event)
  375. {
  376. struct snd_soc_component *component =
  377. snd_soc_dapm_to_component(w->dapm);
  378. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  379. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  380. w->name, event);
  381. switch (event) {
  382. case SND_SOC_DAPM_PRE_PMU:
  383. rouleur_rx_clk_enable(component);
  384. snd_soc_component_update_bits(component,
  385. ROULEUR_ANA_HPHPA_CNP_CTL_1,
  386. 0x02, 0x02);
  387. snd_soc_component_update_bits(component,
  388. ROULEUR_SWR_HPHPA_HD2,
  389. 0x38, 0x38);
  390. set_bit(HPH_COMP_DELAY, &rouleur->status_mask);
  391. break;
  392. case SND_SOC_DAPM_POST_PMU:
  393. if (rouleur->comp1_enable) {
  394. snd_soc_component_update_bits(component,
  395. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  396. 0x02, 0x02);
  397. if (rouleur->comp2_enable)
  398. snd_soc_component_update_bits(component,
  399. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  400. 0x01, 0x01);
  401. /*
  402. * 5ms sleep is required after COMP is enabled as per
  403. * HW requirement
  404. */
  405. if (test_bit(HPH_COMP_DELAY, &rouleur->status_mask)) {
  406. usleep_range(5000, 5100);
  407. clear_bit(HPH_COMP_DELAY,
  408. &rouleur->status_mask);
  409. }
  410. } else {
  411. snd_soc_component_update_bits(component,
  412. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  413. 0x02, 0x00);
  414. }
  415. snd_soc_component_update_bits(component,
  416. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  417. 0x80, 0x00);
  418. snd_soc_component_update_bits(component,
  419. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  420. 0x04, 0x04);
  421. snd_soc_component_update_bits(component,
  422. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x01, 0x01);
  423. break;
  424. case SND_SOC_DAPM_POST_PMD:
  425. snd_soc_component_update_bits(component,
  426. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  427. 0x01, 0x00);
  428. snd_soc_component_update_bits(component,
  429. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  430. 0x04, 0x00);
  431. snd_soc_component_update_bits(component,
  432. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  433. 0x80, 0x80);
  434. if (rouleur->comp1_enable)
  435. snd_soc_component_update_bits(component,
  436. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  437. 0x02, 0x00);
  438. break;
  439. }
  440. return 0;
  441. }
  442. static int rouleur_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
  443. struct snd_kcontrol *kcontrol,
  444. int event)
  445. {
  446. struct snd_soc_component *component =
  447. snd_soc_dapm_to_component(w->dapm);
  448. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  449. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  450. w->name, event);
  451. switch (event) {
  452. case SND_SOC_DAPM_PRE_PMU:
  453. rouleur_rx_clk_enable(component);
  454. snd_soc_component_update_bits(component,
  455. ROULEUR_ANA_HPHPA_CNP_CTL_1,
  456. 0x02, 0x02);
  457. snd_soc_component_update_bits(component,
  458. ROULEUR_SWR_HPHPA_HD2,
  459. 0x07, 0x07);
  460. set_bit(HPH_COMP_DELAY, &rouleur->status_mask);
  461. break;
  462. case SND_SOC_DAPM_POST_PMU:
  463. if (rouleur->comp2_enable) {
  464. snd_soc_component_update_bits(component,
  465. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  466. 0x01, 0x01);
  467. if (rouleur->comp1_enable)
  468. snd_soc_component_update_bits(component,
  469. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  470. 0x02, 0x02);
  471. /*
  472. * 5ms sleep is required after COMP is enabled as per
  473. * HW requirement
  474. */
  475. if (test_bit(HPH_COMP_DELAY, &rouleur->status_mask)) {
  476. usleep_range(5000, 5100);
  477. clear_bit(HPH_COMP_DELAY,
  478. &rouleur->status_mask);
  479. }
  480. } else {
  481. snd_soc_component_update_bits(component,
  482. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  483. 0x01, 0x00);
  484. }
  485. snd_soc_component_update_bits(component,
  486. ROULEUR_DIG_SWR_CDC_RX1_CTL,
  487. 0x80, 0x00);
  488. snd_soc_component_update_bits(component,
  489. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  490. 0x08, 0x08);
  491. snd_soc_component_update_bits(component,
  492. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x02, 0x02);
  493. break;
  494. case SND_SOC_DAPM_POST_PMD:
  495. snd_soc_component_update_bits(component,
  496. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x02, 0x00);
  497. snd_soc_component_update_bits(component,
  498. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  499. 0x08, 0x00);
  500. snd_soc_component_update_bits(component,
  501. ROULEUR_DIG_SWR_CDC_RX1_CTL,
  502. 0x80, 0x80);
  503. if (rouleur->comp2_enable)
  504. snd_soc_component_update_bits(component,
  505. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  506. 0x01, 0x00);
  507. break;
  508. }
  509. return 0;
  510. }
  511. static int rouleur_codec_ear_lo_dac_event(struct snd_soc_dapm_widget *w,
  512. struct snd_kcontrol *kcontrol,
  513. int event)
  514. {
  515. struct snd_soc_component *component =
  516. snd_soc_dapm_to_component(w->dapm);
  517. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  518. w->name, event);
  519. switch (event) {
  520. case SND_SOC_DAPM_PRE_PMU:
  521. rouleur_rx_clk_enable(component);
  522. snd_soc_component_update_bits(component,
  523. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  524. 0x80, 0x00);
  525. snd_soc_component_update_bits(component,
  526. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  527. 0x04, 0x04);
  528. snd_soc_component_update_bits(component,
  529. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  530. 0x01, 0x01);
  531. break;
  532. case SND_SOC_DAPM_POST_PMD:
  533. snd_soc_component_update_bits(component,
  534. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  535. 0x01, 0x00);
  536. snd_soc_component_update_bits(component,
  537. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  538. 0x04, 0x00);
  539. snd_soc_component_update_bits(component,
  540. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  541. 0x80, 0x80);
  542. break;
  543. };
  544. return 0;
  545. }
  546. static int rouleur_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
  547. struct snd_kcontrol *kcontrol,
  548. int event)
  549. {
  550. struct snd_soc_component *component =
  551. snd_soc_dapm_to_component(w->dapm);
  552. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  553. int ret = 0;
  554. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  555. w->name, event);
  556. switch (event) {
  557. case SND_SOC_DAPM_PRE_PMU:
  558. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  559. rouleur->rx_swr_dev->dev_num,
  560. true);
  561. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  562. usleep_range(5000, 5100);
  563. snd_soc_component_update_bits(component,
  564. ROULEUR_DIG_SWR_PDM_WD_CTL1,
  565. 0x03, 0x03);
  566. break;
  567. case SND_SOC_DAPM_POST_PMU:
  568. /*
  569. * 5ms sleep is required after PA is enabled as per
  570. * HW requirement.
  571. */
  572. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  573. usleep_range(5000, 5100);
  574. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  575. }
  576. if (rouleur->update_wcd_event)
  577. rouleur->update_wcd_event(rouleur->handle,
  578. WCD_BOLERO_EVT_RX_MUTE,
  579. (WCD_RX2 << 0x10));
  580. wcd_enable_irq(&rouleur->irq_info,
  581. ROULEUR_IRQ_HPHR_PDM_WD_INT);
  582. break;
  583. case SND_SOC_DAPM_PRE_PMD:
  584. wcd_disable_irq(&rouleur->irq_info,
  585. ROULEUR_IRQ_HPHR_PDM_WD_INT);
  586. if (rouleur->update_wcd_event)
  587. rouleur->update_wcd_event(rouleur->handle,
  588. WCD_BOLERO_EVT_RX_MUTE,
  589. (WCD_RX2 << 0x10 | 0x1));
  590. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  591. WCD_EVENT_PRE_HPHR_PA_OFF,
  592. &rouleur->mbhc->wcd_mbhc);
  593. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  594. break;
  595. case SND_SOC_DAPM_POST_PMD:
  596. /*
  597. * 7ms sleep is required after PA is disabled as per
  598. * HW requirement. If compander is disabled, then
  599. * 20ms delay is required.
  600. */
  601. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  602. usleep_range(5000, 5100);
  603. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  604. }
  605. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  606. WCD_EVENT_POST_HPHR_PA_OFF,
  607. &rouleur->mbhc->wcd_mbhc);
  608. snd_soc_component_update_bits(component,
  609. ROULEUR_DIG_SWR_PDM_WD_CTL1,
  610. 0x03, 0x00);
  611. break;
  612. };
  613. return ret;
  614. }
  615. static int rouleur_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
  616. struct snd_kcontrol *kcontrol,
  617. int event)
  618. {
  619. struct snd_soc_component *component =
  620. snd_soc_dapm_to_component(w->dapm);
  621. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  622. int ret = 0;
  623. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  624. w->name, event);
  625. switch (event) {
  626. case SND_SOC_DAPM_PRE_PMU:
  627. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  628. rouleur->rx_swr_dev->dev_num,
  629. true);
  630. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  631. usleep_range(5000, 5100);
  632. snd_soc_component_update_bits(component,
  633. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  634. 0x03, 0x03);
  635. break;
  636. case SND_SOC_DAPM_POST_PMU:
  637. /*
  638. * 5ms sleep is required after PA is enabled as per
  639. * HW requirement.
  640. */
  641. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  642. usleep_range(5000, 5100);
  643. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  644. }
  645. if (rouleur->update_wcd_event)
  646. rouleur->update_wcd_event(rouleur->handle,
  647. WCD_BOLERO_EVT_RX_MUTE,
  648. (WCD_RX1 << 0x10));
  649. wcd_enable_irq(&rouleur->irq_info,
  650. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  651. break;
  652. case SND_SOC_DAPM_PRE_PMD:
  653. wcd_disable_irq(&rouleur->irq_info,
  654. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  655. if (rouleur->update_wcd_event)
  656. rouleur->update_wcd_event(rouleur->handle,
  657. WCD_BOLERO_EVT_RX_MUTE,
  658. (WCD_RX1 << 0x10 | 0x1));
  659. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  660. WCD_EVENT_PRE_HPHL_PA_OFF,
  661. &rouleur->mbhc->wcd_mbhc);
  662. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  663. break;
  664. case SND_SOC_DAPM_POST_PMD:
  665. /*
  666. * 5ms sleep is required after PA is disabled as per
  667. * HW requirement.
  668. */
  669. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  670. usleep_range(5000, 5100);
  671. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  672. }
  673. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  674. WCD_EVENT_POST_HPHL_PA_OFF,
  675. &rouleur->mbhc->wcd_mbhc);
  676. snd_soc_component_update_bits(component,
  677. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  678. 0x03, 0x00);
  679. break;
  680. };
  681. return ret;
  682. }
  683. static int rouleur_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
  684. struct snd_kcontrol *kcontrol,
  685. int event)
  686. {
  687. struct snd_soc_component *component =
  688. snd_soc_dapm_to_component(w->dapm);
  689. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  690. int ret = 0;
  691. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  692. w->name, event);
  693. switch (event) {
  694. case SND_SOC_DAPM_PRE_PMU:
  695. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  696. rouleur->rx_swr_dev->dev_num,
  697. true);
  698. usleep_range(5000, 5100);
  699. snd_soc_component_update_bits(component,
  700. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  701. 0x03, 0x03);
  702. break;
  703. case SND_SOC_DAPM_POST_PMU:
  704. if (rouleur->update_wcd_event)
  705. rouleur->update_wcd_event(rouleur->handle,
  706. WCD_BOLERO_EVT_RX_MUTE,
  707. (WCD_RX1 << 0x10));
  708. wcd_enable_irq(&rouleur->irq_info,
  709. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  710. break;
  711. case SND_SOC_DAPM_PRE_PMD:
  712. wcd_disable_irq(&rouleur->irq_info,
  713. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  714. if (rouleur->update_wcd_event)
  715. rouleur->update_wcd_event(rouleur->handle,
  716. WCD_BOLERO_EVT_RX_MUTE,
  717. (WCD_RX1 << 0x10 | 0x1));
  718. break;
  719. case SND_SOC_DAPM_POST_PMD:
  720. usleep_range(5000, 5100);
  721. snd_soc_component_update_bits(component,
  722. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  723. 0x03, 0x00);
  724. };
  725. return ret;
  726. }
  727. static int rouleur_codec_enable_lo_pa(struct snd_soc_dapm_widget *w,
  728. struct snd_kcontrol *kcontrol,
  729. int event)
  730. {
  731. struct snd_soc_component *component =
  732. snd_soc_dapm_to_component(w->dapm);
  733. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  734. int ret = 0;
  735. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  736. w->name, event);
  737. switch (event) {
  738. case SND_SOC_DAPM_PRE_PMU:
  739. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  740. rouleur->rx_swr_dev->dev_num,
  741. true);
  742. snd_soc_component_update_bits(component,
  743. ROULEUR_ANA_COMBOPA_CTL,
  744. 0x40, 0x40);
  745. usleep_range(5000, 5100);
  746. snd_soc_component_update_bits(component,
  747. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  748. 0x03, 0x03);
  749. break;
  750. case SND_SOC_DAPM_POST_PMU:
  751. if (rouleur->update_wcd_event)
  752. rouleur->update_wcd_event(rouleur->handle,
  753. WCD_BOLERO_EVT_RX_MUTE,
  754. (WCD_RX1 << 0x10));
  755. wcd_enable_irq(&rouleur->irq_info,
  756. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  757. break;
  758. case SND_SOC_DAPM_PRE_PMD:
  759. wcd_disable_irq(&rouleur->irq_info,
  760. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  761. if (rouleur->update_wcd_event)
  762. rouleur->update_wcd_event(rouleur->handle,
  763. WCD_BOLERO_EVT_RX_MUTE,
  764. (WCD_RX1 << 0x10 | 0x1));
  765. break;
  766. case SND_SOC_DAPM_POST_PMD:
  767. snd_soc_component_update_bits(component,
  768. ROULEUR_ANA_COMBOPA_CTL,
  769. 0x40, 0x00);
  770. usleep_range(5000, 5100);
  771. snd_soc_component_update_bits(component,
  772. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  773. 0x03, 0x00);
  774. };
  775. return ret;
  776. }
  777. static int rouleur_enable_rx1(struct snd_soc_dapm_widget *w,
  778. struct snd_kcontrol *kcontrol,
  779. int event)
  780. {
  781. struct snd_soc_component *component =
  782. snd_soc_dapm_to_component(w->dapm);
  783. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  784. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  785. w->name, event);
  786. switch (event) {
  787. case SND_SOC_DAPM_PRE_PMU:
  788. rouleur_rx_connect_port(component, HPH_L, true);
  789. if (rouleur->comp1_enable)
  790. rouleur_rx_connect_port(component, COMP_L, true);
  791. break;
  792. case SND_SOC_DAPM_POST_PMD:
  793. rouleur_rx_connect_port(component, HPH_L, false);
  794. if (rouleur->comp1_enable)
  795. rouleur_rx_connect_port(component, COMP_L, false);
  796. rouleur_rx_clk_disable(component);
  797. break;
  798. };
  799. return 0;
  800. }
  801. static int rouleur_enable_rx2(struct snd_soc_dapm_widget *w,
  802. struct snd_kcontrol *kcontrol, int event)
  803. {
  804. struct snd_soc_component *component =
  805. snd_soc_dapm_to_component(w->dapm);
  806. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  807. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  808. w->name, event);
  809. switch (event) {
  810. case SND_SOC_DAPM_PRE_PMU:
  811. rouleur_rx_connect_port(component, HPH_R, true);
  812. if (rouleur->comp2_enable)
  813. rouleur_rx_connect_port(component, COMP_R, true);
  814. break;
  815. case SND_SOC_DAPM_POST_PMD:
  816. rouleur_rx_connect_port(component, HPH_R, false);
  817. if (rouleur->comp2_enable)
  818. rouleur_rx_connect_port(component, COMP_R, false);
  819. rouleur_rx_clk_disable(component);
  820. break;
  821. };
  822. return 0;
  823. }
  824. static int rouleur_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  825. struct snd_kcontrol *kcontrol,
  826. int event)
  827. {
  828. struct snd_soc_component *component =
  829. snd_soc_dapm_to_component(w->dapm);
  830. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  831. u16 dmic_clk_reg;
  832. s32 *dmic_clk_cnt;
  833. unsigned int dmic;
  834. char *wname;
  835. int ret = 0;
  836. wname = strpbrk(w->name, "01");
  837. if (!wname) {
  838. dev_err(component->dev, "%s: widget not found\n", __func__);
  839. return -EINVAL;
  840. }
  841. ret = kstrtouint(wname, 10, &dmic);
  842. if (ret < 0) {
  843. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  844. __func__);
  845. return -EINVAL;
  846. }
  847. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  848. w->name, event);
  849. switch (dmic) {
  850. case 0:
  851. case 1:
  852. dmic_clk_cnt = &(rouleur->dmic_0_1_clk_cnt);
  853. dmic_clk_reg = ROULEUR_DIG_SWR_CDC_DMIC1_CTL;
  854. break;
  855. default:
  856. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  857. __func__);
  858. return -EINVAL;
  859. };
  860. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_clk_cnt %d\n",
  861. __func__, event, dmic, *dmic_clk_cnt);
  862. switch (event) {
  863. case SND_SOC_DAPM_PRE_PMU:
  864. snd_soc_component_update_bits(component,
  865. ROULEUR_DIG_SWR_CDC_AMIC_CTL, 0x02, 0x00);
  866. snd_soc_component_update_bits(component,
  867. dmic_clk_reg, 0x08, 0x08);
  868. rouleur_tx_connect_port(component, DMIC0 + (w->shift), true);
  869. break;
  870. case SND_SOC_DAPM_POST_PMD:
  871. rouleur_tx_connect_port(component, DMIC0 + (w->shift), false);
  872. snd_soc_component_update_bits(component,
  873. dmic_clk_reg, 0x08, 0x00);
  874. snd_soc_component_update_bits(component,
  875. ROULEUR_DIG_SWR_CDC_AMIC_CTL, 0x02, 0x02);
  876. break;
  877. };
  878. return 0;
  879. }
  880. static int rouleur_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
  881. struct snd_kcontrol *kcontrol,
  882. int event)
  883. {
  884. struct snd_soc_component *component =
  885. snd_soc_dapm_to_component(w->dapm);
  886. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  887. int ret = 0;
  888. switch (event) {
  889. case SND_SOC_DAPM_PRE_PMU:
  890. ret = swr_slvdev_datapath_control(rouleur->tx_swr_dev,
  891. rouleur->tx_swr_dev->dev_num,
  892. true);
  893. break;
  894. case SND_SOC_DAPM_POST_PMD:
  895. ret = swr_slvdev_datapath_control(rouleur->tx_swr_dev,
  896. rouleur->tx_swr_dev->dev_num,
  897. false);
  898. break;
  899. };
  900. return ret;
  901. }
  902. static int rouleur_codec_enable_adc(struct snd_soc_dapm_widget *w,
  903. struct snd_kcontrol *kcontrol,
  904. int event)
  905. {
  906. struct snd_soc_component *component =
  907. snd_soc_dapm_to_component(w->dapm);
  908. struct rouleur_priv *rouleur =
  909. snd_soc_component_get_drvdata(component);
  910. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  911. w->name, event);
  912. switch (event) {
  913. case SND_SOC_DAPM_PRE_PMU:
  914. /* Enable BCS for Headset mic */
  915. if (w->shift == 1 && !(snd_soc_component_read32(component,
  916. ROULEUR_ANA_TX_AMIC2) & 0x10)) {
  917. rouleur_tx_connect_port(component, MBHC, true);
  918. set_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask);
  919. }
  920. rouleur_tx_connect_port(component, ADC1 + (w->shift), true);
  921. rouleur_global_mbias_enable(component);
  922. if (w->shift)
  923. snd_soc_component_update_bits(component,
  924. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  925. 0x30, 0x30);
  926. else
  927. snd_soc_component_update_bits(component,
  928. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  929. 0x03, 0x03);
  930. break;
  931. case SND_SOC_DAPM_POST_PMD:
  932. rouleur_tx_connect_port(component, ADC1 + (w->shift), false);
  933. if (w->shift == 1 &&
  934. test_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask)) {
  935. rouleur_tx_connect_port(component, MBHC, false);
  936. clear_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask);
  937. }
  938. if (w->shift)
  939. snd_soc_component_update_bits(component,
  940. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  941. 0x30, 0x00);
  942. else
  943. snd_soc_component_update_bits(component,
  944. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  945. 0x03, 0x00);
  946. rouleur_global_mbias_disable(component);
  947. break;
  948. };
  949. return 0;
  950. }
  951. /*
  952. * rouleur_get_micb_vout_ctl_val: converts micbias from volts to register value
  953. * @micb_mv: micbias in mv
  954. *
  955. * return register value converted
  956. */
  957. int rouleur_get_micb_vout_ctl_val(u32 micb_mv)
  958. {
  959. /* min micbias voltage is 1.6V and maximum is 2.85V */
  960. if (micb_mv < 1600 || micb_mv > 2850) {
  961. pr_err("%s: unsupported micbias voltage\n", __func__);
  962. return -EINVAL;
  963. }
  964. return (micb_mv - 1600) / 50;
  965. }
  966. EXPORT_SYMBOL(rouleur_get_micb_vout_ctl_val);
  967. /*
  968. * rouleur_mbhc_micb_adjust_voltage: adjust specific micbias voltage
  969. * @component: handle to snd_soc_component *
  970. * @req_volt: micbias voltage to be set
  971. * @micb_num: micbias to be set, e.g. micbias1 or micbias2
  972. *
  973. * return 0 if adjustment is success or error code in case of failure
  974. */
  975. int rouleur_mbhc_micb_adjust_voltage(struct snd_soc_component *component,
  976. int req_volt, int micb_num)
  977. {
  978. struct rouleur_priv *rouleur =
  979. snd_soc_component_get_drvdata(component);
  980. int cur_vout_ctl, req_vout_ctl;
  981. int micb_reg, micb_val, micb_en;
  982. int ret = 0;
  983. int pullup_mask;
  984. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  985. switch (micb_num) {
  986. case MIC_BIAS_1:
  987. micb_val = snd_soc_component_read32(component, micb_reg);
  988. micb_en = (micb_val & 0x40) >> 6;
  989. pullup_mask = 0x20;
  990. break;
  991. case MIC_BIAS_2:
  992. micb_val = snd_soc_component_read32(component, micb_reg);
  993. micb_en = (micb_val & 0x04) >> 2;
  994. pullup_mask = 0x02;
  995. break;
  996. case MIC_BIAS_3:
  997. default:
  998. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  999. __func__, micb_num);
  1000. return -EINVAL;
  1001. }
  1002. mutex_lock(&rouleur->micb_lock);
  1003. /*
  1004. * If requested micbias voltage is same as current micbias
  1005. * voltage, then just return. Otherwise, adjust voltage as
  1006. * per requested value. If micbias is already enabled, then
  1007. * to avoid slow micbias ramp-up or down enable pull-up
  1008. * momentarily, change the micbias value and then re-enable
  1009. * micbias.
  1010. */
  1011. cur_vout_ctl = (snd_soc_component_read32(component,
  1012. ROULEUR_ANA_MICBIAS_LDO_1_SETTING)) & 0xF8;
  1013. cur_vout_ctl = cur_vout_ctl >> 3;
  1014. req_vout_ctl = rouleur_get_micb_vout_ctl_val(req_volt);
  1015. if (req_vout_ctl < 0) {
  1016. ret = -EINVAL;
  1017. goto exit;
  1018. }
  1019. if (cur_vout_ctl == req_vout_ctl) {
  1020. ret = 0;
  1021. goto exit;
  1022. }
  1023. dev_dbg(component->dev, "%s: micb_num: %d, cur_mv: %d, req_mv: %d, micb_en: %d\n",
  1024. __func__, micb_num, WCD_VOUT_CTL_TO_MICB(cur_vout_ctl),
  1025. req_volt, micb_en);
  1026. if (micb_en == 0x1)
  1027. snd_soc_component_update_bits(component, micb_reg, pullup_mask,
  1028. pullup_mask);
  1029. snd_soc_component_update_bits(component,
  1030. ROULEUR_ANA_MICBIAS_LDO_1_SETTING, 0xF8, req_vout_ctl << 3);
  1031. if (micb_en == 0x1) {
  1032. snd_soc_component_update_bits(component, micb_reg,
  1033. pullup_mask, 0x00);
  1034. /*
  1035. * Add 2ms delay as per HW requirement after enabling
  1036. * micbias
  1037. */
  1038. usleep_range(2000, 2100);
  1039. }
  1040. exit:
  1041. mutex_unlock(&rouleur->micb_lock);
  1042. return ret;
  1043. }
  1044. EXPORT_SYMBOL(rouleur_mbhc_micb_adjust_voltage);
  1045. int rouleur_micbias_control(struct snd_soc_component *component,
  1046. int micb_num, int req, bool is_dapm)
  1047. {
  1048. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1049. int micb_index = micb_num - 1;
  1050. u16 micb_reg;
  1051. int pre_off_event = 0, post_off_event = 0;
  1052. int post_on_event = 0, post_dapm_off = 0;
  1053. int post_dapm_on = 0;
  1054. u8 pullup_mask = 0, enable_mask = 0;
  1055. int ret = 0;
  1056. if ((micb_index < 0) || (micb_index > ROULEUR_MAX_MICBIAS - 1)) {
  1057. dev_err(component->dev, "%s: Invalid micbias index, micb_ind:%d\n",
  1058. __func__, micb_index);
  1059. return -EINVAL;
  1060. }
  1061. switch (micb_num) {
  1062. case MIC_BIAS_1:
  1063. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1064. pullup_mask = 0x20;
  1065. enable_mask = 0x40;
  1066. break;
  1067. case MIC_BIAS_2:
  1068. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1069. pullup_mask = 0x02;
  1070. enable_mask = 0x04;
  1071. pre_off_event = WCD_EVENT_PRE_MICBIAS_2_OFF;
  1072. post_off_event = WCD_EVENT_POST_MICBIAS_2_OFF;
  1073. post_on_event = WCD_EVENT_POST_MICBIAS_2_ON;
  1074. post_dapm_on = WCD_EVENT_POST_DAPM_MICBIAS_2_ON;
  1075. post_dapm_off = WCD_EVENT_POST_DAPM_MICBIAS_2_OFF;
  1076. break;
  1077. case MIC_BIAS_3:
  1078. micb_reg = ROULEUR_ANA_MICBIAS_MICB_3_EN;
  1079. pullup_mask = 0x02;
  1080. break;
  1081. default:
  1082. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  1083. __func__, micb_num);
  1084. return -EINVAL;
  1085. };
  1086. mutex_lock(&rouleur->micb_lock);
  1087. switch (req) {
  1088. case MICB_PULLUP_ENABLE:
  1089. if (!rouleur->dev_up) {
  1090. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1091. __func__, req);
  1092. ret = -ENODEV;
  1093. goto done;
  1094. }
  1095. rouleur->pullup_ref[micb_index]++;
  1096. if ((rouleur->pullup_ref[micb_index] == 1) &&
  1097. (rouleur->micb_ref[micb_index] == 0))
  1098. snd_soc_component_update_bits(component, micb_reg,
  1099. pullup_mask, pullup_mask);
  1100. break;
  1101. case MICB_PULLUP_DISABLE:
  1102. if (!rouleur->dev_up) {
  1103. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1104. __func__, req);
  1105. ret = -ENODEV;
  1106. goto done;
  1107. }
  1108. if (rouleur->pullup_ref[micb_index] > 0)
  1109. rouleur->pullup_ref[micb_index]--;
  1110. if ((rouleur->pullup_ref[micb_index] == 0) &&
  1111. (rouleur->micb_ref[micb_index] == 0))
  1112. snd_soc_component_update_bits(component, micb_reg,
  1113. pullup_mask, 0x00);
  1114. break;
  1115. case MICB_ENABLE:
  1116. if (!rouleur->dev_up) {
  1117. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1118. __func__, req);
  1119. ret = -ENODEV;
  1120. goto done;
  1121. }
  1122. rouleur->micb_ref[micb_index]++;
  1123. if (rouleur->micb_ref[micb_index] == 1) {
  1124. rouleur_global_mbias_enable(component);
  1125. snd_soc_component_update_bits(component,
  1126. micb_reg, enable_mask, enable_mask);
  1127. if (post_on_event)
  1128. blocking_notifier_call_chain(
  1129. &rouleur->mbhc->notifier, post_on_event,
  1130. &rouleur->mbhc->wcd_mbhc);
  1131. }
  1132. if (is_dapm && post_dapm_on && rouleur->mbhc)
  1133. blocking_notifier_call_chain(
  1134. &rouleur->mbhc->notifier, post_dapm_on,
  1135. &rouleur->mbhc->wcd_mbhc);
  1136. break;
  1137. case MICB_DISABLE:
  1138. if (rouleur->micb_ref[micb_index] > 0)
  1139. rouleur->micb_ref[micb_index]--;
  1140. if (!rouleur->dev_up) {
  1141. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1142. __func__, req);
  1143. ret = -ENODEV;
  1144. goto done;
  1145. }
  1146. if ((rouleur->micb_ref[micb_index] == 0) &&
  1147. (rouleur->pullup_ref[micb_index] > 0)) {
  1148. snd_soc_component_update_bits(component, micb_reg,
  1149. pullup_mask, pullup_mask);
  1150. snd_soc_component_update_bits(component, micb_reg,
  1151. enable_mask, 0x00);
  1152. rouleur_global_mbias_disable(component);
  1153. } else if ((rouleur->micb_ref[micb_index] == 0) &&
  1154. (rouleur->pullup_ref[micb_index] == 0)) {
  1155. if (pre_off_event && rouleur->mbhc)
  1156. blocking_notifier_call_chain(
  1157. &rouleur->mbhc->notifier, pre_off_event,
  1158. &rouleur->mbhc->wcd_mbhc);
  1159. snd_soc_component_update_bits(component, micb_reg,
  1160. enable_mask, 0x00);
  1161. rouleur_global_mbias_disable(component);
  1162. if (post_off_event && rouleur->mbhc)
  1163. blocking_notifier_call_chain(
  1164. &rouleur->mbhc->notifier,
  1165. post_off_event,
  1166. &rouleur->mbhc->wcd_mbhc);
  1167. }
  1168. if (is_dapm && post_dapm_off && rouleur->mbhc)
  1169. blocking_notifier_call_chain(
  1170. &rouleur->mbhc->notifier, post_dapm_off,
  1171. &rouleur->mbhc->wcd_mbhc);
  1172. break;
  1173. };
  1174. dev_dbg(component->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
  1175. __func__, micb_num, rouleur->micb_ref[micb_index],
  1176. rouleur->pullup_ref[micb_index]);
  1177. done:
  1178. mutex_unlock(&rouleur->micb_lock);
  1179. return 0;
  1180. }
  1181. EXPORT_SYMBOL(rouleur_micbias_control);
  1182. void rouleur_disable_bcs_before_slow_insert(struct snd_soc_component *component,
  1183. bool bcs_disable)
  1184. {
  1185. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1186. if (rouleur->update_wcd_event) {
  1187. if (bcs_disable)
  1188. rouleur->update_wcd_event(rouleur->handle,
  1189. WCD_BOLERO_EVT_BCS_CLK_OFF, 0);
  1190. else
  1191. rouleur->update_wcd_event(rouleur->handle,
  1192. WCD_BOLERO_EVT_BCS_CLK_OFF, 1);
  1193. }
  1194. }
  1195. static int rouleur_get_logical_addr(struct swr_device *swr_dev)
  1196. {
  1197. int ret = 0;
  1198. uint8_t devnum = 0;
  1199. int num_retry = NUM_ATTEMPTS;
  1200. do {
  1201. ret = swr_get_logical_dev_num(swr_dev, swr_dev->addr, &devnum);
  1202. if (ret) {
  1203. dev_err(&swr_dev->dev,
  1204. "%s get devnum %d for dev addr %lx failed\n",
  1205. __func__, devnum, swr_dev->addr);
  1206. /* retry after 1ms */
  1207. usleep_range(1000, 1010);
  1208. }
  1209. } while (ret && --num_retry);
  1210. swr_dev->dev_num = devnum;
  1211. return 0;
  1212. }
  1213. static bool get_usbc_hs_status(struct snd_soc_component *component,
  1214. struct wcd_mbhc_config *mbhc_cfg)
  1215. {
  1216. if (mbhc_cfg->enable_usbc_analog) {
  1217. if (!(snd_soc_component_read32(component, ROULEUR_ANA_MBHC_MECH)
  1218. & 0x20))
  1219. return true;
  1220. }
  1221. return false;
  1222. }
  1223. static int rouleur_event_notify(struct notifier_block *block,
  1224. unsigned long val,
  1225. void *data)
  1226. {
  1227. u16 event = (val & 0xffff);
  1228. int ret = 0;
  1229. struct rouleur_priv *rouleur = dev_get_drvdata((struct device *)data);
  1230. struct snd_soc_component *component = rouleur->component;
  1231. struct wcd_mbhc *mbhc;
  1232. switch (event) {
  1233. case BOLERO_WCD_EVT_PA_OFF_PRE_SSR:
  1234. snd_soc_component_update_bits(component,
  1235. ROULEUR_ANA_HPHPA_CNP_CTL_2,
  1236. 0xC0, 0x00);
  1237. snd_soc_component_update_bits(component,
  1238. ROULEUR_ANA_COMBOPA_CTL,
  1239. 0x40, 0x00);
  1240. snd_soc_component_update_bits(component,
  1241. ROULEUR_ANA_COMBOPA_CTL,
  1242. 0x80, 0x00);
  1243. snd_soc_component_update_bits(component,
  1244. ROULEUR_ANA_COMBOPA_CTL,
  1245. 0x40, 0x40);
  1246. snd_soc_component_update_bits(component,
  1247. ROULEUR_ANA_COMBOPA_CTL,
  1248. 0x80, 0x00);
  1249. break;
  1250. case BOLERO_WCD_EVT_SSR_DOWN:
  1251. rouleur->dev_up = false;
  1252. rouleur->mbhc->wcd_mbhc.deinit_in_progress = true;
  1253. mbhc = &rouleur->mbhc->wcd_mbhc;
  1254. rouleur->usbc_hs_status = get_usbc_hs_status(component,
  1255. mbhc->mbhc_cfg);
  1256. rouleur_mbhc_ssr_down(rouleur->mbhc, component);
  1257. rouleur_reset(rouleur->dev, 0x01);
  1258. break;
  1259. case BOLERO_WCD_EVT_SSR_UP:
  1260. rouleur_reset(rouleur->dev, 0x00);
  1261. /* allow reset to take effect */
  1262. usleep_range(10000, 10010);
  1263. rouleur_get_logical_addr(rouleur->tx_swr_dev);
  1264. rouleur_get_logical_addr(rouleur->rx_swr_dev);
  1265. rouleur_init_reg(component);
  1266. regcache_mark_dirty(rouleur->regmap);
  1267. regcache_sync(rouleur->regmap);
  1268. /* Initialize MBHC module */
  1269. mbhc = &rouleur->mbhc->wcd_mbhc;
  1270. ret = rouleur_mbhc_post_ssr_init(rouleur->mbhc, component);
  1271. if (ret) {
  1272. dev_err(component->dev, "%s: mbhc initialization failed\n",
  1273. __func__);
  1274. } else {
  1275. rouleur_mbhc_hs_detect(component, mbhc->mbhc_cfg);
  1276. if (rouleur->usbc_hs_status)
  1277. mdelay(500);
  1278. }
  1279. rouleur->mbhc->wcd_mbhc.deinit_in_progress = false;
  1280. rouleur->dev_up = true;
  1281. break;
  1282. default:
  1283. dev_err(component->dev, "%s: invalid event %d\n", __func__,
  1284. event);
  1285. break;
  1286. }
  1287. return 0;
  1288. }
  1289. static int __rouleur_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1290. int event)
  1291. {
  1292. struct snd_soc_component *component =
  1293. snd_soc_dapm_to_component(w->dapm);
  1294. int micb_num;
  1295. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1296. __func__, w->name, event);
  1297. if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1")))
  1298. micb_num = MIC_BIAS_1;
  1299. else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2")))
  1300. micb_num = MIC_BIAS_2;
  1301. else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3")))
  1302. micb_num = MIC_BIAS_3;
  1303. else
  1304. return -EINVAL;
  1305. switch (event) {
  1306. case SND_SOC_DAPM_PRE_PMU:
  1307. /* Micbias LD0 enable not supported for MicBias 3*/
  1308. if (micb_num == MIC_BIAS_3)
  1309. rouleur_micbias_control(component, micb_num,
  1310. MICB_PULLUP_ENABLE, true);
  1311. else
  1312. rouleur_micbias_control(component, micb_num,
  1313. MICB_ENABLE, true);
  1314. break;
  1315. case SND_SOC_DAPM_POST_PMU:
  1316. usleep_range(1000, 1100);
  1317. break;
  1318. case SND_SOC_DAPM_POST_PMD:
  1319. if (micb_num == MIC_BIAS_3)
  1320. rouleur_micbias_control(component, micb_num,
  1321. MICB_PULLUP_DISABLE, true);
  1322. else
  1323. rouleur_micbias_control(component, micb_num,
  1324. MICB_DISABLE, true);
  1325. break;
  1326. };
  1327. return 0;
  1328. }
  1329. static int rouleur_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1330. struct snd_kcontrol *kcontrol,
  1331. int event)
  1332. {
  1333. return __rouleur_codec_enable_micbias(w, event);
  1334. }
  1335. static int __rouleur_codec_enable_micbias_pullup(struct snd_soc_dapm_widget *w,
  1336. int event)
  1337. {
  1338. struct snd_soc_component *component =
  1339. snd_soc_dapm_to_component(w->dapm);
  1340. int micb_num;
  1341. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1342. __func__, w->name, event);
  1343. if (strnstr(w->name, "VA MIC BIAS1", sizeof("VA MIC BIAS1")))
  1344. micb_num = MIC_BIAS_1;
  1345. else if (strnstr(w->name, "VA MIC BIAS2", sizeof("VA MIC BIAS2")))
  1346. micb_num = MIC_BIAS_2;
  1347. else if (strnstr(w->name, "VA MIC BIAS3", sizeof("VA MIC BIAS3")))
  1348. micb_num = MIC_BIAS_3;
  1349. else
  1350. return -EINVAL;
  1351. switch (event) {
  1352. case SND_SOC_DAPM_PRE_PMU:
  1353. rouleur_micbias_control(component, micb_num,
  1354. MICB_PULLUP_ENABLE, true);
  1355. break;
  1356. case SND_SOC_DAPM_POST_PMU:
  1357. /* 1 msec delay as per HW requirement */
  1358. usleep_range(1000, 1100);
  1359. break;
  1360. case SND_SOC_DAPM_POST_PMD:
  1361. rouleur_micbias_control(component, micb_num,
  1362. MICB_PULLUP_DISABLE, true);
  1363. break;
  1364. };
  1365. return 0;
  1366. }
  1367. static int rouleur_codec_enable_micbias_pullup(struct snd_soc_dapm_widget *w,
  1368. struct snd_kcontrol *kcontrol,
  1369. int event)
  1370. {
  1371. return __rouleur_codec_enable_micbias_pullup(w, event);
  1372. }
  1373. static int rouleur_get_compander(struct snd_kcontrol *kcontrol,
  1374. struct snd_ctl_elem_value *ucontrol)
  1375. {
  1376. struct snd_soc_component *component =
  1377. snd_soc_kcontrol_component(kcontrol);
  1378. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1379. bool hphr;
  1380. struct soc_multi_mixer_control *mc;
  1381. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1382. hphr = mc->shift;
  1383. ucontrol->value.integer.value[0] = hphr ? rouleur->comp2_enable :
  1384. rouleur->comp1_enable;
  1385. return 0;
  1386. }
  1387. static int rouleur_set_compander(struct snd_kcontrol *kcontrol,
  1388. struct snd_ctl_elem_value *ucontrol)
  1389. {
  1390. struct snd_soc_component *component =
  1391. snd_soc_kcontrol_component(kcontrol);
  1392. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1393. int value = ucontrol->value.integer.value[0];
  1394. bool hphr;
  1395. struct soc_multi_mixer_control *mc;
  1396. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1397. hphr = mc->shift;
  1398. if (hphr)
  1399. rouleur->comp2_enable = value;
  1400. else
  1401. rouleur->comp1_enable = value;
  1402. return 0;
  1403. }
  1404. static int rouleur_codec_enable_pa_vpos(struct snd_soc_dapm_widget *w,
  1405. struct snd_kcontrol *kcontrol,
  1406. int event)
  1407. {
  1408. struct snd_soc_component *component =
  1409. snd_soc_dapm_to_component(w->dapm);
  1410. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1411. struct rouleur_pdata *pdata = NULL;
  1412. int ret = 0;
  1413. pdata = dev_get_platdata(rouleur->dev);
  1414. if (!pdata) {
  1415. dev_err(component->dev, "%s: pdata is NULL\n", __func__);
  1416. return -EINVAL;
  1417. }
  1418. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1419. w->name, event);
  1420. switch (event) {
  1421. case SND_SOC_DAPM_PRE_PMU:
  1422. if (test_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask)) {
  1423. dev_dbg(component->dev,
  1424. "%s: vpos already in enabled state\n",
  1425. __func__);
  1426. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1427. return 0;
  1428. }
  1429. ret = msm_cdc_enable_ondemand_supply(rouleur->dev,
  1430. rouleur->supplies,
  1431. pdata->regulator,
  1432. pdata->num_supplies,
  1433. "cdc-pa-vpos");
  1434. if (ret == -EINVAL) {
  1435. dev_err(component->dev, "%s: pa vpos is not enabled\n",
  1436. __func__);
  1437. return ret;
  1438. }
  1439. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1440. /*
  1441. * 200us sleep is required after LDO15 is enabled as per
  1442. * HW requirement
  1443. */
  1444. usleep_range(200, 250);
  1445. break;
  1446. case SND_SOC_DAPM_POST_PMD:
  1447. set_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1448. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  1449. rouleur->rx_swr_dev->dev_num,
  1450. false);
  1451. break;
  1452. }
  1453. return 0;
  1454. }
  1455. static const struct snd_kcontrol_new rouleur_snd_controls[] = {
  1456. SOC_SINGLE_EXT("HPHL_COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  1457. rouleur_get_compander, rouleur_set_compander),
  1458. SOC_SINGLE_EXT("HPHR_COMP Switch", SND_SOC_NOPM, 1, 1, 0,
  1459. rouleur_get_compander, rouleur_set_compander),
  1460. SOC_SINGLE_TLV("HPHL Volume", ROULEUR_ANA_HPHPA_L_GAIN, 0, 20, 1,
  1461. line_gain),
  1462. SOC_SINGLE_TLV("HPHR Volume", ROULEUR_ANA_HPHPA_R_GAIN, 0, 20, 1,
  1463. line_gain),
  1464. SOC_SINGLE_TLV("ADC1 Volume", ROULEUR_ANA_TX_AMIC1, 0, 8, 0,
  1465. analog_gain),
  1466. SOC_SINGLE_TLV("ADC2 Volume", ROULEUR_ANA_TX_AMIC2, 0, 8, 0,
  1467. analog_gain),
  1468. };
  1469. static const struct snd_kcontrol_new adc1_switch[] = {
  1470. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1471. };
  1472. static const struct snd_kcontrol_new adc2_switch[] = {
  1473. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1474. };
  1475. static const struct snd_kcontrol_new dmic1_switch[] = {
  1476. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1477. };
  1478. static const struct snd_kcontrol_new dmic2_switch[] = {
  1479. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1480. };
  1481. static const struct snd_kcontrol_new ear_rdac_switch[] = {
  1482. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1483. };
  1484. static const struct snd_kcontrol_new lo_rdac_switch[] = {
  1485. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1486. };
  1487. static const struct snd_kcontrol_new hphl_rdac_switch[] = {
  1488. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1489. };
  1490. static const struct snd_kcontrol_new hphr_rdac_switch[] = {
  1491. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1492. };
  1493. static const char * const adc2_mux_text[] = {
  1494. "INP2", "INP3"
  1495. };
  1496. static const struct soc_enum adc2_enum =
  1497. SOC_ENUM_SINGLE(ROULEUR_ANA_TX_AMIC2, 4,
  1498. ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
  1499. static const struct snd_kcontrol_new tx_adc2_mux =
  1500. SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
  1501. static const struct snd_soc_dapm_widget rouleur_dapm_widgets[] = {
  1502. /*input widgets*/
  1503. SND_SOC_DAPM_INPUT("AMIC1"),
  1504. SND_SOC_DAPM_INPUT("AMIC2"),
  1505. SND_SOC_DAPM_INPUT("AMIC3"),
  1506. SND_SOC_DAPM_INPUT("IN1_HPHL"),
  1507. SND_SOC_DAPM_INPUT("IN2_HPHR"),
  1508. /*tx widgets*/
  1509. SND_SOC_DAPM_ADC_E("ADC1", NULL, SND_SOC_NOPM, 0, 0,
  1510. rouleur_codec_enable_adc,
  1511. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1512. SND_SOC_DAPM_ADC_E("ADC2", NULL, SND_SOC_NOPM, 1, 0,
  1513. rouleur_codec_enable_adc,
  1514. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1515. SND_SOC_DAPM_MUX("ADC2 MUX", SND_SOC_NOPM, 0, 0,
  1516. &tx_adc2_mux),
  1517. /*tx mixers*/
  1518. SND_SOC_DAPM_MIXER_E("ADC1_MIXER", SND_SOC_NOPM, 0, 0,
  1519. adc1_switch, ARRAY_SIZE(adc1_switch),
  1520. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1521. SND_SOC_DAPM_POST_PMD),
  1522. SND_SOC_DAPM_MIXER_E("ADC2_MIXER", SND_SOC_NOPM, 0, 0,
  1523. adc2_switch, ARRAY_SIZE(adc2_switch),
  1524. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1525. SND_SOC_DAPM_POST_PMD),
  1526. /* micbias widgets*/
  1527. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1528. rouleur_codec_enable_micbias,
  1529. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1530. SND_SOC_DAPM_POST_PMD),
  1531. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1532. rouleur_codec_enable_micbias,
  1533. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1534. SND_SOC_DAPM_POST_PMD),
  1535. SND_SOC_DAPM_MICBIAS_E("MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1536. rouleur_codec_enable_micbias,
  1537. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1538. SND_SOC_DAPM_POST_PMD),
  1539. SND_SOC_DAPM_SUPPLY("PA_VPOS", SND_SOC_NOPM, 0, 0,
  1540. rouleur_codec_enable_pa_vpos,
  1541. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1542. /*rx widgets*/
  1543. SND_SOC_DAPM_PGA_E("EAR PGA", ROULEUR_ANA_COMBOPA_CTL, 7, 0, NULL, 0,
  1544. rouleur_codec_enable_ear_pa,
  1545. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1546. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1547. SND_SOC_DAPM_PGA_E("LO PGA", ROULEUR_ANA_COMBOPA_CTL, 7, 0, NULL, 0,
  1548. rouleur_codec_enable_lo_pa,
  1549. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1550. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1551. SND_SOC_DAPM_PGA_E("HPHL PGA", ROULEUR_ANA_HPHPA_CNP_CTL_2, 7, 0, NULL,
  1552. 0, rouleur_codec_enable_hphl_pa,
  1553. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1554. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1555. SND_SOC_DAPM_PGA_E("HPHR PGA", ROULEUR_ANA_HPHPA_CNP_CTL_2, 6, 0, NULL,
  1556. 0, rouleur_codec_enable_hphr_pa,
  1557. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1558. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1559. SND_SOC_DAPM_DAC_E("RDAC1", NULL, SND_SOC_NOPM, 0, 0,
  1560. rouleur_codec_hphl_dac_event,
  1561. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1562. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1563. SND_SOC_DAPM_DAC_E("RDAC2", NULL, SND_SOC_NOPM, 0, 0,
  1564. rouleur_codec_hphr_dac_event,
  1565. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1566. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1567. SND_SOC_DAPM_DAC_E("RDAC3", NULL, SND_SOC_NOPM, 0, 0,
  1568. rouleur_codec_ear_lo_dac_event,
  1569. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1570. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1571. SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
  1572. rouleur_enable_rx1, SND_SOC_DAPM_PRE_PMU |
  1573. SND_SOC_DAPM_POST_PMD),
  1574. SND_SOC_DAPM_MIXER_E("RX2", SND_SOC_NOPM, 0, 0, NULL, 0,
  1575. rouleur_enable_rx2, SND_SOC_DAPM_PRE_PMU |
  1576. SND_SOC_DAPM_POST_PMD),
  1577. /* rx mixer widgets*/
  1578. SND_SOC_DAPM_MIXER("EAR_RDAC", SND_SOC_NOPM, 0, 0,
  1579. ear_rdac_switch, ARRAY_SIZE(ear_rdac_switch)),
  1580. SND_SOC_DAPM_MIXER("LO_RDAC", SND_SOC_NOPM, 0, 0,
  1581. lo_rdac_switch, ARRAY_SIZE(lo_rdac_switch)),
  1582. SND_SOC_DAPM_MIXER("HPHL_RDAC", SND_SOC_NOPM, 0, 0,
  1583. hphl_rdac_switch, ARRAY_SIZE(hphl_rdac_switch)),
  1584. SND_SOC_DAPM_MIXER("HPHR_RDAC", SND_SOC_NOPM, 0, 0,
  1585. hphr_rdac_switch, ARRAY_SIZE(hphr_rdac_switch)),
  1586. /*output widgets tx*/
  1587. SND_SOC_DAPM_OUTPUT("ADC1_OUTPUT"),
  1588. SND_SOC_DAPM_OUTPUT("ADC2_OUTPUT"),
  1589. /*output widgets rx*/
  1590. SND_SOC_DAPM_OUTPUT("EAR"),
  1591. SND_SOC_DAPM_OUTPUT("LO"),
  1592. SND_SOC_DAPM_OUTPUT("HPHL"),
  1593. SND_SOC_DAPM_OUTPUT("HPHR"),
  1594. /* micbias pull up widgets*/
  1595. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1596. rouleur_codec_enable_micbias_pullup,
  1597. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1598. SND_SOC_DAPM_POST_PMD),
  1599. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1600. rouleur_codec_enable_micbias_pullup,
  1601. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1602. SND_SOC_DAPM_POST_PMD),
  1603. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1604. rouleur_codec_enable_micbias_pullup,
  1605. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1606. SND_SOC_DAPM_POST_PMD),
  1607. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  1608. rouleur_codec_enable_dmic,
  1609. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1610. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 1, 0,
  1611. rouleur_codec_enable_dmic,
  1612. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1613. /*tx mixer widgets*/
  1614. SND_SOC_DAPM_MIXER_E("DMIC1_MIXER", SND_SOC_NOPM, 0,
  1615. 0, dmic1_switch, ARRAY_SIZE(dmic1_switch),
  1616. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1617. SND_SOC_DAPM_POST_PMD),
  1618. SND_SOC_DAPM_MIXER_E("DMIC2_MIXER", SND_SOC_NOPM, 0,
  1619. 0, dmic2_switch, ARRAY_SIZE(dmic2_switch),
  1620. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1621. SND_SOC_DAPM_POST_PMD),
  1622. /*output widgets*/
  1623. SND_SOC_DAPM_OUTPUT("DMIC1_OUTPUT"),
  1624. SND_SOC_DAPM_OUTPUT("DMIC2_OUTPUT"),
  1625. };
  1626. static const struct snd_soc_dapm_route rouleur_audio_map[] = {
  1627. {"ADC1_OUTPUT", NULL, "ADC1_MIXER"},
  1628. {"ADC1_MIXER", "Switch", "ADC1"},
  1629. {"ADC1", NULL, "AMIC1"},
  1630. {"ADC2_OUTPUT", NULL, "ADC2_MIXER"},
  1631. {"ADC2_MIXER", "Switch", "ADC2"},
  1632. {"ADC2", NULL, "ADC2 MUX"},
  1633. {"ADC2 MUX", "INP3", "AMIC3"},
  1634. {"ADC2 MUX", "INP2", "AMIC2"},
  1635. {"IN1_HPHL", NULL, "PA_VPOS"},
  1636. {"RX1", NULL, "IN1_HPHL"},
  1637. {"RDAC1", NULL, "RX1"},
  1638. {"HPHL_RDAC", "Switch", "RDAC1"},
  1639. {"HPHL PGA", NULL, "HPHL_RDAC"},
  1640. {"HPHL", NULL, "HPHL PGA"},
  1641. {"IN2_HPHR", NULL, "PA_VPOS"},
  1642. {"RX2", NULL, "IN2_HPHR"},
  1643. {"RDAC2", NULL, "RX2"},
  1644. {"HPHR_RDAC", "Switch", "RDAC2"},
  1645. {"HPHR PGA", NULL, "HPHR_RDAC"},
  1646. {"HPHR", NULL, "HPHR PGA"},
  1647. {"RDAC3", NULL, "RX1"},
  1648. {"EAR_RDAC", "Switch", "RDAC3"},
  1649. {"EAR PGA", NULL, "EAR_RDAC"},
  1650. {"EAR", NULL, "EAR PGA"},
  1651. {"RDAC3", NULL, "RX1"},
  1652. {"LO_RDAC", "Switch", "RDAC3"},
  1653. {"LO PGA", NULL, "LO_RDAC"},
  1654. {"LO", NULL, "LO PGA"},
  1655. {"DMIC1_OUTPUT", NULL, "DMIC1_MIXER"},
  1656. {"DMIC1_MIXER", "Switch", "DMIC1"},
  1657. {"DMIC2_OUTPUT", NULL, "DMIC2_MIXER"},
  1658. {"DMIC2_MIXER", "Switch", "DMIC2"},
  1659. };
  1660. static ssize_t rouleur_version_read(struct snd_info_entry *entry,
  1661. void *file_private_data,
  1662. struct file *file,
  1663. char __user *buf, size_t count,
  1664. loff_t pos)
  1665. {
  1666. struct rouleur_priv *priv;
  1667. char buffer[ROULEUR_VERSION_ENTRY_SIZE];
  1668. int len = 0;
  1669. priv = (struct rouleur_priv *) entry->private_data;
  1670. if (!priv) {
  1671. pr_err("%s: rouleur priv is null\n", __func__);
  1672. return -EINVAL;
  1673. }
  1674. switch (priv->version) {
  1675. case ROULEUR_VERSION_1_0:
  1676. len = snprintf(buffer, sizeof(buffer), "ROULEUR_1_0\n");
  1677. break;
  1678. default:
  1679. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  1680. }
  1681. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  1682. }
  1683. static struct snd_info_entry_ops rouleur_info_ops = {
  1684. .read = rouleur_version_read,
  1685. };
  1686. /*
  1687. * rouleur_info_create_codec_entry - creates rouleur module
  1688. * @codec_root: The parent directory
  1689. * @component: component instance
  1690. *
  1691. * Creates rouleur module and version entry under the given
  1692. * parent directory.
  1693. *
  1694. * Return: 0 on success or negative error code on failure.
  1695. */
  1696. int rouleur_info_create_codec_entry(struct snd_info_entry *codec_root,
  1697. struct snd_soc_component *component)
  1698. {
  1699. struct snd_info_entry *version_entry;
  1700. struct rouleur_priv *priv;
  1701. struct snd_soc_card *card;
  1702. if (!codec_root || !component)
  1703. return -EINVAL;
  1704. priv = snd_soc_component_get_drvdata(component);
  1705. if (priv->entry) {
  1706. dev_dbg(priv->dev,
  1707. "%s:rouleur module already created\n", __func__);
  1708. return 0;
  1709. }
  1710. card = component->card;
  1711. priv->entry = snd_info_create_subdir(codec_root->module,
  1712. "rouleur", codec_root);
  1713. if (!priv->entry) {
  1714. dev_dbg(component->dev, "%s: failed to create rouleur entry\n",
  1715. __func__);
  1716. return -ENOMEM;
  1717. }
  1718. version_entry = snd_info_create_card_entry(card->snd_card,
  1719. "version",
  1720. priv->entry);
  1721. if (!version_entry) {
  1722. dev_dbg(component->dev, "%s: failed to create rouleur version entry\n",
  1723. __func__);
  1724. return -ENOMEM;
  1725. }
  1726. version_entry->private_data = priv;
  1727. version_entry->size = ROULEUR_VERSION_ENTRY_SIZE;
  1728. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  1729. version_entry->c.ops = &rouleur_info_ops;
  1730. if (snd_info_register(version_entry) < 0) {
  1731. snd_info_free_entry(version_entry);
  1732. return -ENOMEM;
  1733. }
  1734. priv->version_entry = version_entry;
  1735. return 0;
  1736. }
  1737. EXPORT_SYMBOL(rouleur_info_create_codec_entry);
  1738. static int rouleur_set_micbias_data(struct rouleur_priv *rouleur,
  1739. struct rouleur_pdata *pdata)
  1740. {
  1741. int vout_ctl = 0;
  1742. int rc = 0;
  1743. if (!pdata) {
  1744. dev_err(rouleur->dev, "%s: NULL pdata\n", __func__);
  1745. return -ENODEV;
  1746. }
  1747. /* set micbias voltage */
  1748. vout_ctl = rouleur_get_micb_vout_ctl_val(pdata->micbias.micb1_mv);
  1749. if (vout_ctl < 0) {
  1750. rc = -EINVAL;
  1751. goto done;
  1752. }
  1753. regmap_update_bits(rouleur->regmap, ROULEUR_ANA_MICBIAS_LDO_1_SETTING,
  1754. 0xF8, vout_ctl << 3);
  1755. done:
  1756. return rc;
  1757. }
  1758. static int rouleur_soc_codec_probe(struct snd_soc_component *component)
  1759. {
  1760. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1761. struct snd_soc_dapm_context *dapm =
  1762. snd_soc_component_get_dapm(component);
  1763. int ret = -EINVAL;
  1764. dev_info(component->dev, "%s()\n", __func__);
  1765. rouleur = snd_soc_component_get_drvdata(component);
  1766. if (!rouleur)
  1767. return -EINVAL;
  1768. rouleur->component = component;
  1769. snd_soc_component_init_regmap(component, rouleur->regmap);
  1770. rouleur->fw_data = devm_kzalloc(component->dev,
  1771. sizeof(*(rouleur->fw_data)),
  1772. GFP_KERNEL);
  1773. if (!rouleur->fw_data) {
  1774. dev_err(component->dev, "Failed to allocate fw_data\n");
  1775. ret = -ENOMEM;
  1776. goto done;
  1777. }
  1778. set_bit(WCD9XXX_MBHC_CAL, rouleur->fw_data->cal_bit);
  1779. ret = wcd_cal_create_hwdep(rouleur->fw_data,
  1780. WCD9XXX_CODEC_HWDEP_NODE, component);
  1781. if (ret < 0) {
  1782. dev_err(component->dev, "%s hwdep failed %d\n", __func__, ret);
  1783. goto done;
  1784. }
  1785. ret = rouleur_mbhc_init(&rouleur->mbhc, component, rouleur->fw_data);
  1786. if (ret) {
  1787. pr_err("%s: mbhc initialization failed\n", __func__);
  1788. goto done;
  1789. }
  1790. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  1791. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  1792. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  1793. snd_soc_dapm_ignore_suspend(dapm, "IN1_HPHL");
  1794. snd_soc_dapm_ignore_suspend(dapm, "IN2_HPHR");
  1795. snd_soc_dapm_ignore_suspend(dapm, "ADC1_OUTPUT");
  1796. snd_soc_dapm_ignore_suspend(dapm, "ADC2_OUTPUT");
  1797. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  1798. snd_soc_dapm_ignore_suspend(dapm, "LO");
  1799. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  1800. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  1801. snd_soc_dapm_ignore_suspend(dapm, "DMIC1_OUTPUT");
  1802. snd_soc_dapm_ignore_suspend(dapm, "DMIC2_OUTPUT");
  1803. snd_soc_dapm_sync(dapm);
  1804. rouleur_init_reg(component);
  1805. rouleur->version = ROULEUR_VERSION_1_0;
  1806. /* Register event notifier */
  1807. rouleur->nblock.notifier_call = rouleur_event_notify;
  1808. if (rouleur->register_notifier) {
  1809. ret = rouleur->register_notifier(rouleur->handle,
  1810. &rouleur->nblock,
  1811. true);
  1812. if (ret) {
  1813. dev_err(component->dev,
  1814. "%s: Failed to register notifier %d\n",
  1815. __func__, ret);
  1816. return ret;
  1817. }
  1818. }
  1819. rouleur->dev_up = true;
  1820. done:
  1821. return ret;
  1822. }
  1823. static void rouleur_soc_codec_remove(struct snd_soc_component *component)
  1824. {
  1825. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1826. if (!rouleur)
  1827. return;
  1828. if (rouleur->register_notifier)
  1829. rouleur->register_notifier(rouleur->handle,
  1830. &rouleur->nblock,
  1831. false);
  1832. }
  1833. static int rouleur_soc_codec_suspend(struct snd_soc_component *component)
  1834. {
  1835. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1836. if (!rouleur)
  1837. return 0;
  1838. rouleur->dapm_bias_off = true;
  1839. return 0;
  1840. }
  1841. static int rouleur_soc_codec_resume(struct snd_soc_component *component)
  1842. {
  1843. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1844. if (!rouleur)
  1845. return 0;
  1846. rouleur->dapm_bias_off = false;
  1847. return 0;
  1848. }
  1849. static const struct snd_soc_component_driver soc_codec_dev_rouleur = {
  1850. .name = DRV_NAME,
  1851. .probe = rouleur_soc_codec_probe,
  1852. .remove = rouleur_soc_codec_remove,
  1853. .controls = rouleur_snd_controls,
  1854. .num_controls = ARRAY_SIZE(rouleur_snd_controls),
  1855. .dapm_widgets = rouleur_dapm_widgets,
  1856. .num_dapm_widgets = ARRAY_SIZE(rouleur_dapm_widgets),
  1857. .dapm_routes = rouleur_audio_map,
  1858. .num_dapm_routes = ARRAY_SIZE(rouleur_audio_map),
  1859. .suspend = rouleur_soc_codec_suspend,
  1860. .resume = rouleur_soc_codec_resume,
  1861. };
  1862. #ifdef CONFIG_PM_SLEEP
  1863. static int rouleur_suspend(struct device *dev)
  1864. {
  1865. struct rouleur_priv *rouleur = NULL;
  1866. int ret = 0;
  1867. struct rouleur_pdata *pdata = NULL;
  1868. if (!dev)
  1869. return -ENODEV;
  1870. rouleur = dev_get_drvdata(dev);
  1871. if (!rouleur)
  1872. return -EINVAL;
  1873. pdata = dev_get_platdata(rouleur->dev);
  1874. if (!pdata) {
  1875. dev_err(dev, "%s: pdata is NULL\n", __func__);
  1876. return -EINVAL;
  1877. }
  1878. if (test_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask)) {
  1879. ret = msm_cdc_disable_ondemand_supply(rouleur->dev,
  1880. rouleur->supplies,
  1881. pdata->regulator,
  1882. pdata->num_supplies,
  1883. "cdc-pa-vpos");
  1884. if (ret == -EINVAL) {
  1885. dev_err(dev, "%s: pa vpos is not disabled\n",
  1886. __func__);
  1887. return 0;
  1888. }
  1889. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1890. }
  1891. if (rouleur->dapm_bias_off) {
  1892. msm_cdc_set_supplies_lpm_mode(rouleur->dev,
  1893. rouleur->supplies,
  1894. pdata->regulator,
  1895. pdata->num_supplies,
  1896. true);
  1897. set_bit(WCD_SUPPLIES_LPM_MODE, &rouleur->status_mask);
  1898. }
  1899. return 0;
  1900. }
  1901. static int rouleur_resume(struct device *dev)
  1902. {
  1903. struct rouleur_priv *rouleur = NULL;
  1904. struct rouleur_pdata *pdata = NULL;
  1905. if (!dev)
  1906. return -ENODEV;
  1907. rouleur = dev_get_drvdata(dev);
  1908. if (!rouleur)
  1909. return -EINVAL;
  1910. pdata = dev_get_platdata(rouleur->dev);
  1911. if (!pdata) {
  1912. dev_err(dev, "%s: pdata is NULL\n", __func__);
  1913. return -EINVAL;
  1914. }
  1915. if (test_bit(WCD_SUPPLIES_LPM_MODE, &rouleur->status_mask)) {
  1916. msm_cdc_set_supplies_lpm_mode(rouleur->dev,
  1917. rouleur->supplies,
  1918. pdata->regulator,
  1919. pdata->num_supplies,
  1920. false);
  1921. clear_bit(WCD_SUPPLIES_LPM_MODE, &rouleur->status_mask);
  1922. }
  1923. return 0;
  1924. }
  1925. #endif
  1926. static int rouleur_reset(struct device *dev, int reset_val)
  1927. {
  1928. struct rouleur_priv *rouleur = NULL;
  1929. if (!dev)
  1930. return -ENODEV;
  1931. rouleur = dev_get_drvdata(dev);
  1932. if (!rouleur)
  1933. return -EINVAL;
  1934. pm2250_spmi_write(rouleur->spmi_dev, rouleur->reset_reg, reset_val);
  1935. return 0;
  1936. }
  1937. static int rouleur_read_of_property_u32(struct device *dev, const char *name,
  1938. u32 *val)
  1939. {
  1940. int rc = 0;
  1941. rc = of_property_read_u32(dev->of_node, name, val);
  1942. if (rc)
  1943. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1944. __func__, name, dev->of_node->full_name);
  1945. return rc;
  1946. }
  1947. static void rouleur_dt_parse_micbias_info(struct device *dev,
  1948. struct rouleur_micbias_setting *mb)
  1949. {
  1950. u32 prop_val = 0;
  1951. int rc = 0;
  1952. /* MB1 */
  1953. if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
  1954. NULL)) {
  1955. rc = rouleur_read_of_property_u32(dev,
  1956. "qcom,cdc-micbias1-mv",
  1957. &prop_val);
  1958. if (!rc)
  1959. mb->micb1_mv = prop_val;
  1960. } else {
  1961. dev_info(dev, "%s: Micbias1 DT property not found\n",
  1962. __func__);
  1963. }
  1964. /* MB2 */
  1965. if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
  1966. NULL)) {
  1967. rc = rouleur_read_of_property_u32(dev,
  1968. "qcom,cdc-micbias2-mv",
  1969. &prop_val);
  1970. if (!rc)
  1971. mb->micb2_mv = prop_val;
  1972. } else {
  1973. dev_info(dev, "%s: Micbias2 DT property not found\n",
  1974. __func__);
  1975. }
  1976. /* MB3 */
  1977. if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
  1978. NULL)) {
  1979. rc = rouleur_read_of_property_u32(dev,
  1980. "qcom,cdc-micbias3-mv",
  1981. &prop_val);
  1982. if (!rc)
  1983. mb->micb3_mv = prop_val;
  1984. } else {
  1985. dev_info(dev, "%s: Micbias3 DT property not found\n",
  1986. __func__);
  1987. }
  1988. }
  1989. struct rouleur_pdata *rouleur_populate_dt_data(struct device *dev)
  1990. {
  1991. struct rouleur_pdata *pdata = NULL;
  1992. u32 reg;
  1993. int ret = 0;
  1994. pdata = kzalloc(sizeof(struct rouleur_pdata),
  1995. GFP_KERNEL);
  1996. if (!pdata)
  1997. return NULL;
  1998. pdata->spmi_np = of_parse_phandle(dev->of_node,
  1999. "qcom,pmic-spmi-node", 0);
  2000. if (!pdata->spmi_np) {
  2001. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  2002. __func__, "qcom,pmic-spmi-node",
  2003. dev->of_node->full_name);
  2004. kfree(pdata);
  2005. return NULL;
  2006. }
  2007. ret = of_property_read_u32(dev->of_node, "qcom,wcd-reset-reg", &reg);
  2008. if (ret) {
  2009. dev_err(dev, "%s: Failed to obtain reset reg value %d\n",
  2010. __func__, ret);
  2011. kfree(pdata);
  2012. return NULL;
  2013. }
  2014. pdata->reset_reg = reg;
  2015. /* Parse power supplies */
  2016. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  2017. &pdata->num_supplies);
  2018. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  2019. dev_err(dev, "%s: no power supplies defined for codec\n",
  2020. __func__);
  2021. kfree(pdata);
  2022. return NULL;
  2023. }
  2024. pdata->rx_slave = of_parse_phandle(dev->of_node, "qcom,rx-slave", 0);
  2025. pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
  2026. rouleur_dt_parse_micbias_info(dev, &pdata->micbias);
  2027. return pdata;
  2028. }
  2029. static int rouleur_wakeup(void *handle, bool enable)
  2030. {
  2031. struct rouleur_priv *priv;
  2032. if (!handle) {
  2033. pr_err("%s: NULL handle\n", __func__);
  2034. return -EINVAL;
  2035. }
  2036. priv = (struct rouleur_priv *)handle;
  2037. if (!priv->tx_swr_dev) {
  2038. pr_err("%s: tx swr dev is NULL\n", __func__);
  2039. return -EINVAL;
  2040. }
  2041. if (enable)
  2042. return swr_device_wakeup_vote(priv->tx_swr_dev);
  2043. else
  2044. return swr_device_wakeup_unvote(priv->tx_swr_dev);
  2045. }
  2046. static irqreturn_t rouleur_wd_handle_irq(int irq, void *data)
  2047. {
  2048. pr_err_ratelimited("%s: Watchdog interrupt for irq =%d triggered\n",
  2049. __func__, irq);
  2050. return IRQ_HANDLED;
  2051. }
  2052. static int rouleur_bind(struct device *dev)
  2053. {
  2054. int ret = 0, i = 0;
  2055. struct rouleur_priv *rouleur = NULL;
  2056. struct rouleur_pdata *pdata = NULL;
  2057. struct wcd_ctrl_platform_data *plat_data = NULL;
  2058. struct platform_device *pdev = NULL;
  2059. rouleur = kzalloc(sizeof(struct rouleur_priv), GFP_KERNEL);
  2060. if (!rouleur)
  2061. return -ENOMEM;
  2062. dev_set_drvdata(dev, rouleur);
  2063. pdata = rouleur_populate_dt_data(dev);
  2064. if (!pdata) {
  2065. dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
  2066. kfree(rouleur);
  2067. return -EINVAL;
  2068. }
  2069. rouleur->dev = dev;
  2070. rouleur->dev->platform_data = pdata;
  2071. pdev = of_find_device_by_node(pdata->spmi_np);
  2072. if (!pdev) {
  2073. dev_err(dev, "%s: platform device from SPMI node is NULL\n",
  2074. __func__);
  2075. ret = -EINVAL;
  2076. goto err_bind_all;
  2077. }
  2078. rouleur->spmi_dev = &pdev->dev;
  2079. rouleur->reset_reg = pdata->reset_reg;
  2080. ret = msm_cdc_init_supplies(dev, &rouleur->supplies,
  2081. pdata->regulator, pdata->num_supplies);
  2082. if (!rouleur->supplies) {
  2083. dev_err(dev, "%s: Cannot init wcd supplies\n",
  2084. __func__);
  2085. goto err_bind_all;
  2086. }
  2087. plat_data = dev_get_platdata(dev->parent);
  2088. if (!plat_data) {
  2089. dev_err(dev, "%s: platform data from parent is NULL\n",
  2090. __func__);
  2091. ret = -EINVAL;
  2092. goto err_bind_all;
  2093. }
  2094. rouleur->handle = (void *)plat_data->handle;
  2095. if (!rouleur->handle) {
  2096. dev_err(dev, "%s: handle is NULL\n", __func__);
  2097. ret = -EINVAL;
  2098. goto err_bind_all;
  2099. }
  2100. rouleur->update_wcd_event = plat_data->update_wcd_event;
  2101. if (!rouleur->update_wcd_event) {
  2102. dev_err(dev, "%s: update_wcd_event api is null!\n",
  2103. __func__);
  2104. ret = -EINVAL;
  2105. goto err_bind_all;
  2106. }
  2107. rouleur->register_notifier = plat_data->register_notifier;
  2108. if (!rouleur->register_notifier) {
  2109. dev_err(dev, "%s: register_notifier api is null!\n",
  2110. __func__);
  2111. ret = -EINVAL;
  2112. goto err_bind_all;
  2113. }
  2114. ret = msm_cdc_enable_static_supplies(dev, rouleur->supplies,
  2115. pdata->regulator,
  2116. pdata->num_supplies);
  2117. if (ret) {
  2118. dev_err(dev, "%s: wcd static supply enable failed!\n",
  2119. __func__);
  2120. goto err_bind_all;
  2121. }
  2122. rouleur_reset(dev, 0x01);
  2123. usleep_range(20, 30);
  2124. rouleur_reset(dev, 0x00);
  2125. /*
  2126. * Add 5msec delay to provide sufficient time for
  2127. * soundwire auto enumeration of slave devices as
  2128. * as per HW requirement.
  2129. */
  2130. usleep_range(5000, 5010);
  2131. rouleur->wakeup = rouleur_wakeup;
  2132. ret = component_bind_all(dev, rouleur);
  2133. if (ret) {
  2134. dev_err(dev, "%s: Slave bind failed, ret = %d\n",
  2135. __func__, ret);
  2136. goto err_bind_all;
  2137. }
  2138. ret = rouleur_parse_port_mapping(dev, "qcom,rx_swr_ch_map", CODEC_RX);
  2139. ret |= rouleur_parse_port_mapping(dev, "qcom,tx_swr_ch_map", CODEC_TX);
  2140. if (ret) {
  2141. dev_err(dev, "Failed to read port mapping\n");
  2142. goto err;
  2143. }
  2144. rouleur->rx_swr_dev = get_matching_swr_slave_device(pdata->rx_slave);
  2145. if (!rouleur->rx_swr_dev) {
  2146. dev_err(dev, "%s: Could not find RX swr slave device\n",
  2147. __func__);
  2148. ret = -ENODEV;
  2149. goto err;
  2150. }
  2151. rouleur->tx_swr_dev = get_matching_swr_slave_device(pdata->tx_slave);
  2152. if (!rouleur->tx_swr_dev) {
  2153. dev_err(dev, "%s: Could not find TX swr slave device\n",
  2154. __func__);
  2155. ret = -ENODEV;
  2156. goto err;
  2157. }
  2158. rouleur->regmap = devm_regmap_init_swr(rouleur->tx_swr_dev,
  2159. &rouleur_regmap_config);
  2160. if (!rouleur->regmap) {
  2161. dev_err(dev, "%s: Regmap init failed\n",
  2162. __func__);
  2163. goto err;
  2164. }
  2165. /* Set all interupts as edge triggered */
  2166. for (i = 0; i < rouleur_regmap_irq_chip.num_regs; i++)
  2167. regmap_write(rouleur->regmap,
  2168. (ROULEUR_DIG_SWR_INTR_LEVEL_0 + i), 0);
  2169. rouleur_regmap_irq_chip.irq_drv_data = rouleur;
  2170. rouleur->irq_info.wcd_regmap_irq_chip = &rouleur_regmap_irq_chip;
  2171. rouleur->irq_info.codec_name = "rouleur";
  2172. rouleur->irq_info.regmap = rouleur->regmap;
  2173. rouleur->irq_info.dev = dev;
  2174. ret = wcd_irq_init(&rouleur->irq_info, &rouleur->virq);
  2175. if (ret) {
  2176. dev_err(dev, "%s: IRQ init failed: %d\n",
  2177. __func__, ret);
  2178. goto err;
  2179. }
  2180. rouleur->tx_swr_dev->slave_irq = rouleur->virq;
  2181. mutex_init(&rouleur->micb_lock);
  2182. mutex_init(&rouleur->main_bias_lock);
  2183. mutex_init(&rouleur->rx_clk_lock);
  2184. ret = rouleur_set_micbias_data(rouleur, pdata);
  2185. if (ret < 0) {
  2186. dev_err(dev, "%s: bad micbias pdata\n", __func__);
  2187. goto err_irq;
  2188. }
  2189. /* Request for watchdog interrupt */
  2190. wcd_request_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHR_PDM_WD_INT,
  2191. "HPHR PDM WD INT", rouleur_wd_handle_irq, NULL);
  2192. wcd_request_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHL_PDM_WD_INT,
  2193. "HPHL PDM WD INT", rouleur_wd_handle_irq, NULL);
  2194. /* Disable watchdog interrupt for HPH */
  2195. wcd_disable_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHR_PDM_WD_INT);
  2196. wcd_disable_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHL_PDM_WD_INT);
  2197. ret = snd_soc_register_component(dev, &soc_codec_dev_rouleur,
  2198. NULL, 0);
  2199. if (ret) {
  2200. dev_err(dev, "%s: Codec registration failed\n",
  2201. __func__);
  2202. goto err_irq;
  2203. }
  2204. return ret;
  2205. err_irq:
  2206. wcd_irq_exit(&rouleur->irq_info, rouleur->virq);
  2207. mutex_destroy(&rouleur->micb_lock);
  2208. mutex_destroy(&rouleur->main_bias_lock);
  2209. mutex_destroy(&rouleur->rx_clk_lock);
  2210. err:
  2211. component_unbind_all(dev, rouleur);
  2212. err_bind_all:
  2213. dev_set_drvdata(dev, NULL);
  2214. kfree(pdata);
  2215. kfree(rouleur);
  2216. return ret;
  2217. }
  2218. static void rouleur_unbind(struct device *dev)
  2219. {
  2220. struct rouleur_priv *rouleur = dev_get_drvdata(dev);
  2221. struct rouleur_pdata *pdata = dev_get_platdata(rouleur->dev);
  2222. wcd_irq_exit(&rouleur->irq_info, rouleur->virq);
  2223. snd_soc_unregister_component(dev);
  2224. component_unbind_all(dev, rouleur);
  2225. mutex_destroy(&rouleur->micb_lock);
  2226. mutex_destroy(&rouleur->main_bias_lock);
  2227. mutex_destroy(&rouleur->rx_clk_lock);
  2228. dev_set_drvdata(dev, NULL);
  2229. kfree(pdata);
  2230. kfree(rouleur);
  2231. }
  2232. static const struct of_device_id rouleur_dt_match[] = {
  2233. { .compatible = "qcom,rouleur-codec" , .data = "rouleur" },
  2234. {}
  2235. };
  2236. static const struct component_master_ops rouleur_comp_ops = {
  2237. .bind = rouleur_bind,
  2238. .unbind = rouleur_unbind,
  2239. };
  2240. static int rouleur_compare_of(struct device *dev, void *data)
  2241. {
  2242. return dev->of_node == data;
  2243. }
  2244. static void rouleur_release_of(struct device *dev, void *data)
  2245. {
  2246. of_node_put(data);
  2247. }
  2248. static int rouleur_add_slave_components(struct device *dev,
  2249. struct component_match **matchptr)
  2250. {
  2251. struct device_node *np, *rx_node, *tx_node;
  2252. np = dev->of_node;
  2253. rx_node = of_parse_phandle(np, "qcom,rx-slave", 0);
  2254. if (!rx_node) {
  2255. dev_err(dev, "%s: Rx-slave node not defined\n", __func__);
  2256. return -ENODEV;
  2257. }
  2258. of_node_get(rx_node);
  2259. component_match_add_release(dev, matchptr,
  2260. rouleur_release_of,
  2261. rouleur_compare_of,
  2262. rx_node);
  2263. tx_node = of_parse_phandle(np, "qcom,tx-slave", 0);
  2264. if (!tx_node) {
  2265. dev_err(dev, "%s: Tx-slave node not defined\n", __func__);
  2266. return -ENODEV;
  2267. }
  2268. of_node_get(tx_node);
  2269. component_match_add_release(dev, matchptr,
  2270. rouleur_release_of,
  2271. rouleur_compare_of,
  2272. tx_node);
  2273. return 0;
  2274. }
  2275. static int rouleur_probe(struct platform_device *pdev)
  2276. {
  2277. struct component_match *match = NULL;
  2278. int ret;
  2279. ret = rouleur_add_slave_components(&pdev->dev, &match);
  2280. if (ret)
  2281. return ret;
  2282. return component_master_add_with_match(&pdev->dev,
  2283. &rouleur_comp_ops, match);
  2284. }
  2285. static int rouleur_remove(struct platform_device *pdev)
  2286. {
  2287. component_master_del(&pdev->dev, &rouleur_comp_ops);
  2288. dev_set_drvdata(&pdev->dev, NULL);
  2289. return 0;
  2290. }
  2291. #ifdef CONFIG_PM_SLEEP
  2292. static const struct dev_pm_ops rouleur_dev_pm_ops = {
  2293. .suspend_late = rouleur_suspend,
  2294. .resume_early = rouleur_resume
  2295. };
  2296. #endif
  2297. static struct platform_driver rouleur_codec_driver = {
  2298. .probe = rouleur_probe,
  2299. .remove = rouleur_remove,
  2300. .driver = {
  2301. .name = "rouleur_codec",
  2302. .owner = THIS_MODULE,
  2303. .of_match_table = of_match_ptr(rouleur_dt_match),
  2304. #ifdef CONFIG_PM_SLEEP
  2305. .pm = &rouleur_dev_pm_ops,
  2306. #endif
  2307. .suppress_bind_attrs = true,
  2308. },
  2309. };
  2310. module_platform_driver(rouleur_codec_driver);
  2311. MODULE_DESCRIPTION("Rouleur Codec driver");
  2312. MODULE_LICENSE("GPL v2");