wsa883x.c 57 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/init.h>
  8. #include <linux/slab.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/device.h>
  11. #include <linux/printk.h>
  12. #include <linux/bitops.h>
  13. #include <linux/regulator/consumer.h>
  14. #include <linux/pm_runtime.h>
  15. #include <linux/delay.h>
  16. #include <linux/kernel.h>
  17. #include <linux/gpio.h>
  18. #include <linux/of_gpio.h>
  19. #include <linux/of_platform.h>
  20. #include <linux/regmap.h>
  21. #include <linux/debugfs.h>
  22. #include <soc/soundwire.h>
  23. #include <sound/pcm.h>
  24. #include <sound/pcm_params.h>
  25. #include <sound/soc.h>
  26. #include <sound/soc-dapm.h>
  27. #include <sound/tlv.h>
  28. #include <asoc/msm-cdc-pinctrl.h>
  29. #include <asoc/msm-cdc-supply.h>
  30. #include "wsa883x-registers.h"
  31. #include "wsa883x.h"
  32. #include "internal.h"
  33. #include "asoc/bolero-slave-internal.h"
  34. #include <linux/qti-regmap-debugfs.h>
  35. #define T1_TEMP -10
  36. #define T2_TEMP 150
  37. #define LOW_TEMP_THRESHOLD 5
  38. #define HIGH_TEMP_THRESHOLD 45
  39. #define TEMP_INVALID 0xFFFF
  40. #define WSA883X_TEMP_RETRY 3
  41. #define MAX_NAME_LEN 40
  42. #define WSA883X_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
  43. SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
  44. SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000 |\
  45. SNDRV_PCM_RATE_384000)
  46. /* Fractional Rates */
  47. #define WSA883X_FRAC_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_88200 |\
  48. SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_352800)
  49. #define WSA883X_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
  50. SNDRV_PCM_FMTBIT_S24_LE |\
  51. SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE)
  52. enum {
  53. WSA_4OHMS =4,
  54. WSA_8OHMS = 8,
  55. WSA_16OHMS = 16,
  56. WSA_32OHMS = 32,
  57. };
  58. struct wsa_temp_register {
  59. u8 d1_msb;
  60. u8 d1_lsb;
  61. u8 d2_msb;
  62. u8 d2_lsb;
  63. u8 dmeas_msb;
  64. u8 dmeas_lsb;
  65. };
  66. enum {
  67. COMP_OFFSET0,
  68. COMP_OFFSET1,
  69. COMP_OFFSET2,
  70. COMP_OFFSET3,
  71. COMP_OFFSET4,
  72. };
  73. struct wsa_reg_mask_val {
  74. u16 reg;
  75. u8 mask;
  76. u8 val;
  77. };
  78. static const struct wsa_reg_mask_val reg_init[] = {
  79. {WSA883X_PA_FSM_BYP, 0x01, 0x00},
  80. {WSA883X_ISENSE2, 0xE0, 0x40},
  81. {WSA883X_ADC_6, 0x02, 0x02},
  82. {WSA883X_CDC_SPK_DSM_A2_0, 0xFF, 0x0A},
  83. {WSA883X_CDC_SPK_DSM_A2_1, 0x0F, 0x08},
  84. {WSA883X_CDC_SPK_DSM_A3_0, 0xFF, 0xF3},
  85. {WSA883X_CDC_SPK_DSM_A3_1, 0x07, 0x07},
  86. {WSA883X_CDC_SPK_DSM_A4_0, 0xFF, 0x79},
  87. {WSA883X_CDC_SPK_DSM_A4_1, 0x03, 0x02},
  88. {WSA883X_CDC_SPK_DSM_A5_0, 0xFF, 0x0B},
  89. {WSA883X_CDC_SPK_DSM_A5_1, 0x03, 0x02},
  90. {WSA883X_CDC_SPK_DSM_A6_0, 0xFF, 0x8A},
  91. {WSA883X_CDC_SPK_DSM_A7_0, 0xFF, 0x9B},
  92. {WSA883X_CDC_SPK_DSM_C_0, 0xFF, 0x68},
  93. {WSA883X_CDC_SPK_DSM_C_1, 0xFF, 0x54},
  94. {WSA883X_CDC_SPK_DSM_C_2, 0xFF, 0xF2},
  95. {WSA883X_CDC_SPK_DSM_C_3, 0x3F, 0x20},
  96. {WSA883X_CDC_SPK_DSM_R1, 0xFF, 0x83},
  97. {WSA883X_CDC_SPK_DSM_R2, 0xFF, 0x7F},
  98. {WSA883X_CDC_SPK_DSM_R3, 0xFF, 0x9D},
  99. {WSA883X_CDC_SPK_DSM_R4, 0xFF, 0x82},
  100. {WSA883X_CDC_SPK_DSM_R5, 0xFF, 0x8B},
  101. {WSA883X_CDC_SPK_DSM_R6, 0xFF, 0x9B},
  102. {WSA883X_CDC_SPK_DSM_R7, 0xFF, 0x3F},
  103. {WSA883X_VBAT_SNS, 0x60, 0x20},
  104. {WSA883X_DRE_CTL_0, 0xF0, 0x90},
  105. {WSA883X_DRE_IDLE_DET_CTL, 0x10, 0x00},
  106. {WSA883X_CURRENT_LIMIT, 0x78, 0x40},
  107. {WSA883X_DRE_CTL_0, 0x07, 0x02},
  108. {WSA883X_VAGC_TIME, 0x0F, 0x0F},
  109. {WSA883X_VAGC_ATTN_LVL_1_2, 0x77, 0x00},
  110. {WSA883X_VAGC_ATTN_LVL_3, 0x07, 0x01},
  111. {WSA883X_VAGC_CTL, 0x01, 0x01},
  112. {WSA883X_TAGC_CTL, 0x0E, 0x0A},
  113. {WSA883X_TAGC_TIME, 0x0C, 0x0C},
  114. {WSA883X_TAGC_E2E_GAIN, 0x1F, 0x02},
  115. {WSA883X_TEMP_CONFIG0, 0x07, 0x02},
  116. {WSA883X_TEMP_CONFIG1, 0x07, 0x02},
  117. {WSA883X_OTP_REG_1, 0xFF, 0x49},
  118. {WSA883X_OTP_REG_2, 0xC0, 0x80},
  119. {WSA883X_OTP_REG_3, 0xFF, 0xC9},
  120. {WSA883X_OTP_REG_4, 0xC0, 0x40},
  121. {WSA883X_TAGC_CTL, 0x01, 0x01},
  122. {WSA883X_ADC_2, 0x40, 0x00},
  123. {WSA883X_ADC_7, 0x04, 0x04},
  124. {WSA883X_ADC_7, 0x02, 0x02},
  125. {WSA883X_CKWD_CTL_0, 0x60, 0x00},
  126. {WSA883X_DRE_CTL_1, 0x3E, 0x20},
  127. {WSA883X_CKWD_CTL_1, 0x1F, 0x1B},
  128. {WSA883X_GMAMP_SUP1, 0x60, 0x60},
  129. };
  130. static int wsa883x_handle_post_irq(void *data);
  131. static int wsa883x_get_temperature(struct snd_soc_component *component,
  132. int *temp);
  133. enum {
  134. WSA8830 = 0,
  135. WSA8835,
  136. WSA8832,
  137. WSA8835_V2 = 5,
  138. };
  139. enum {
  140. SPKR_STATUS = 0,
  141. WSA_SUPPLIES_LPM_MODE,
  142. SPKR_ADIE_LB,
  143. };
  144. enum {
  145. WSA883X_IRQ_INT_SAF2WAR = 0,
  146. WSA883X_IRQ_INT_WAR2SAF,
  147. WSA883X_IRQ_INT_DISABLE,
  148. WSA883X_IRQ_INT_OCP,
  149. WSA883X_IRQ_INT_CLIP,
  150. WSA883X_IRQ_INT_PDM_WD,
  151. WSA883X_IRQ_INT_CLK_WD,
  152. WSA883X_IRQ_INT_INTR_PIN,
  153. WSA883X_IRQ_INT_UVLO,
  154. WSA883X_IRQ_INT_PA_ON_ERR,
  155. WSA883X_NUM_IRQS,
  156. };
  157. enum {
  158. COMP_PORT_EN_STATUS_BIT = 0,
  159. VISENSE_EN_STATUS_BIT,
  160. };
  161. static const struct regmap_irq wsa883x_irqs[WSA883X_NUM_IRQS] = {
  162. REGMAP_IRQ_REG(WSA883X_IRQ_INT_SAF2WAR, 0, 0x01),
  163. REGMAP_IRQ_REG(WSA883X_IRQ_INT_WAR2SAF, 0, 0x02),
  164. REGMAP_IRQ_REG(WSA883X_IRQ_INT_DISABLE, 0, 0x04),
  165. REGMAP_IRQ_REG(WSA883X_IRQ_INT_OCP, 0, 0x08),
  166. REGMAP_IRQ_REG(WSA883X_IRQ_INT_CLIP, 0, 0x10),
  167. REGMAP_IRQ_REG(WSA883X_IRQ_INT_PDM_WD, 0, 0x20),
  168. REGMAP_IRQ_REG(WSA883X_IRQ_INT_CLK_WD, 0, 0x40),
  169. REGMAP_IRQ_REG(WSA883X_IRQ_INT_INTR_PIN, 0, 0x80),
  170. REGMAP_IRQ_REG(WSA883X_IRQ_INT_UVLO, 1, 0x01),
  171. REGMAP_IRQ_REG(WSA883X_IRQ_INT_PA_ON_ERR, 1, 0x02),
  172. };
  173. static struct regmap_irq_chip wsa883x_regmap_irq_chip = {
  174. .name = "wsa883x",
  175. .irqs = wsa883x_irqs,
  176. .num_irqs = ARRAY_SIZE(wsa883x_irqs),
  177. .num_regs = 2,
  178. .status_base = WSA883X_INTR_STATUS0,
  179. .mask_base = WSA883X_INTR_MASK0,
  180. .type_base = WSA883X_INTR_LEVEL0,
  181. .ack_base = WSA883X_INTR_CLEAR0,
  182. .use_ack = 1,
  183. .runtime_pm = false,
  184. .handle_post_irq = wsa883x_handle_post_irq,
  185. .irq_drv_data = NULL,
  186. };
  187. static int wsa883x_handle_post_irq(void *data)
  188. {
  189. struct wsa883x_priv *wsa883x = data;
  190. u32 sts1 = 0, sts2 = 0;
  191. regmap_read(wsa883x->regmap, WSA883X_INTR_STATUS0, &sts1);
  192. regmap_read(wsa883x->regmap, WSA883X_INTR_STATUS1, &sts2);
  193. wsa883x->swr_slave->slave_irq_pending =
  194. ((sts1 || sts2) ? true : false);
  195. return IRQ_HANDLED;
  196. }
  197. #ifdef CONFIG_DEBUG_FS
  198. static int codec_debug_open(struct inode *inode, struct file *file)
  199. {
  200. file->private_data = inode->i_private;
  201. return 0;
  202. }
  203. static int get_parameters(char *buf, u32 *param1, int num_of_par)
  204. {
  205. char *token;
  206. int base, cnt;
  207. token = strsep(&buf, " ");
  208. for (cnt = 0; cnt < num_of_par; cnt++) {
  209. if (token) {
  210. if ((token[1] == 'x') || (token[1] == 'X'))
  211. base = 16;
  212. else
  213. base = 10;
  214. if (kstrtou32(token, base, &param1[cnt]) != 0)
  215. return -EINVAL;
  216. token = strsep(&buf, " ");
  217. } else {
  218. return -EINVAL;
  219. }
  220. }
  221. return 0;
  222. }
  223. static bool is_swr_slave_reg_readable(int reg)
  224. {
  225. int ret = true;
  226. if (((reg > 0x46) && (reg < 0x4A)) ||
  227. ((reg > 0x4A) && (reg < 0x50)) ||
  228. ((reg > 0x55) && (reg < 0xD0)) ||
  229. ((reg > 0xD0) && (reg < 0xE0)) ||
  230. ((reg > 0xE0) && (reg < 0xF0)) ||
  231. ((reg > 0xF0) && (reg < 0x100)) ||
  232. ((reg > 0x105) && (reg < 0x120)) ||
  233. ((reg > 0x205) && (reg < 0x220)) ||
  234. ((reg > 0x305) && (reg < 0x320)) ||
  235. ((reg > 0x405) && (reg < 0x420)) ||
  236. ((reg > 0x128) && (reg < 0x130)) ||
  237. ((reg > 0x228) && (reg < 0x230)) ||
  238. ((reg > 0x328) && (reg < 0x330)) ||
  239. ((reg > 0x428) && (reg < 0x430)) ||
  240. ((reg > 0x138) && (reg < 0x205)) ||
  241. ((reg > 0x238) && (reg < 0x305)) ||
  242. ((reg > 0x338) && (reg < 0x405)) ||
  243. ((reg > 0x405) && (reg < 0xF00)) ||
  244. ((reg > 0xF05) && (reg < 0xF20)) ||
  245. ((reg > 0xF25) && (reg < 0xF30)) ||
  246. ((reg > 0xF35) && (reg < 0x2000)))
  247. ret = false;
  248. return ret;
  249. }
  250. static ssize_t swr_slave_reg_show(struct swr_device *pdev, char __user *ubuf,
  251. size_t count, loff_t *ppos)
  252. {
  253. int i, reg_val, len;
  254. ssize_t total = 0;
  255. char tmp_buf[SWR_SLV_MAX_BUF_LEN];
  256. if (!ubuf || !ppos)
  257. return 0;
  258. for (i = (((int) *ppos/BYTES_PER_LINE) + SWR_SLV_START_REG_ADDR);
  259. i <= SWR_SLV_MAX_REG_ADDR; i++) {
  260. if (!is_swr_slave_reg_readable(i))
  261. continue;
  262. swr_read(pdev, pdev->dev_num, i, &reg_val, 1);
  263. len = snprintf(tmp_buf, sizeof(tmp_buf), "0x%.3x: 0x%.2x\n", i,
  264. (reg_val & 0xFF));
  265. if (len < 0) {
  266. pr_err("%s: fail to fill the buffer\n", __func__);
  267. total = -EFAULT;
  268. goto copy_err;
  269. }
  270. if ((total + len) >= count - 1)
  271. break;
  272. if (copy_to_user((ubuf + total), tmp_buf, len)) {
  273. pr_err("%s: fail to copy reg dump\n", __func__);
  274. total = -EFAULT;
  275. goto copy_err;
  276. }
  277. total += len;
  278. *ppos += len;
  279. }
  280. copy_err:
  281. *ppos = SWR_SLV_MAX_REG_ADDR * BYTES_PER_LINE;
  282. return total;
  283. }
  284. static ssize_t codec_debug_dump(struct file *file, char __user *ubuf,
  285. size_t count, loff_t *ppos)
  286. {
  287. struct swr_device *pdev;
  288. if (!count || !file || !ppos || !ubuf)
  289. return -EINVAL;
  290. pdev = file->private_data;
  291. if (!pdev)
  292. return -EINVAL;
  293. if (*ppos < 0)
  294. return -EINVAL;
  295. return swr_slave_reg_show(pdev, ubuf, count, ppos);
  296. }
  297. static ssize_t codec_debug_read(struct file *file, char __user *ubuf,
  298. size_t count, loff_t *ppos)
  299. {
  300. char lbuf[SWR_SLV_RD_BUF_LEN];
  301. struct swr_device *pdev = NULL;
  302. struct wsa883x_priv *wsa883x = NULL;
  303. if (!count || !file || !ppos || !ubuf)
  304. return -EINVAL;
  305. pdev = file->private_data;
  306. if (!pdev)
  307. return -EINVAL;
  308. wsa883x = swr_get_dev_data(pdev);
  309. if (!wsa883x)
  310. return -EINVAL;
  311. if (*ppos < 0)
  312. return -EINVAL;
  313. snprintf(lbuf, sizeof(lbuf), "0x%x\n",
  314. (wsa883x->read_data & 0xFF));
  315. return simple_read_from_buffer(ubuf, count, ppos, lbuf,
  316. strnlen(lbuf, 7));
  317. }
  318. static ssize_t codec_debug_peek_write(struct file *file,
  319. const char __user *ubuf, size_t cnt, loff_t *ppos)
  320. {
  321. char lbuf[SWR_SLV_WR_BUF_LEN];
  322. int rc = 0;
  323. u32 param[5];
  324. struct swr_device *pdev = NULL;
  325. struct wsa883x_priv *wsa883x = NULL;
  326. if (!cnt || !file || !ppos || !ubuf)
  327. return -EINVAL;
  328. pdev = file->private_data;
  329. if (!pdev)
  330. return -EINVAL;
  331. wsa883x = swr_get_dev_data(pdev);
  332. if (!wsa883x)
  333. return -EINVAL;
  334. if (*ppos < 0)
  335. return -EINVAL;
  336. if (cnt > sizeof(lbuf) - 1)
  337. return -EINVAL;
  338. rc = copy_from_user(lbuf, ubuf, cnt);
  339. if (rc)
  340. return -EFAULT;
  341. lbuf[cnt] = '\0';
  342. rc = get_parameters(lbuf, param, 1);
  343. if (!((param[0] <= SWR_SLV_MAX_REG_ADDR) && (rc == 0)))
  344. return -EINVAL;
  345. swr_read(pdev, pdev->dev_num, param[0], &wsa883x->read_data, 1);
  346. if (rc == 0)
  347. rc = cnt;
  348. else
  349. pr_err("%s: rc = %d\n", __func__, rc);
  350. return rc;
  351. }
  352. static ssize_t codec_debug_write(struct file *file,
  353. const char __user *ubuf, size_t cnt, loff_t *ppos)
  354. {
  355. char lbuf[SWR_SLV_WR_BUF_LEN];
  356. int rc = 0;
  357. u32 param[5];
  358. struct swr_device *pdev;
  359. if (!file || !ppos || !ubuf)
  360. return -EINVAL;
  361. pdev = file->private_data;
  362. if (!pdev)
  363. return -EINVAL;
  364. if (cnt > sizeof(lbuf) - 1)
  365. return -EINVAL;
  366. rc = copy_from_user(lbuf, ubuf, cnt);
  367. if (rc)
  368. return -EFAULT;
  369. lbuf[cnt] = '\0';
  370. rc = get_parameters(lbuf, param, 2);
  371. if (!((param[0] <= SWR_SLV_MAX_REG_ADDR) &&
  372. (param[1] <= 0xFF) && (rc == 0)))
  373. return -EINVAL;
  374. swr_write(pdev, pdev->dev_num, param[0], &param[1]);
  375. if (rc == 0)
  376. rc = cnt;
  377. else
  378. pr_err("%s: rc = %d\n", __func__, rc);
  379. return rc;
  380. }
  381. static const struct file_operations codec_debug_write_ops = {
  382. .open = codec_debug_open,
  383. .write = codec_debug_write,
  384. };
  385. static const struct file_operations codec_debug_read_ops = {
  386. .open = codec_debug_open,
  387. .read = codec_debug_read,
  388. .write = codec_debug_peek_write,
  389. };
  390. static const struct file_operations codec_debug_dump_ops = {
  391. .open = codec_debug_open,
  392. .read = codec_debug_dump,
  393. };
  394. #endif
  395. static void wsa883x_regcache_sync(struct wsa883x_priv *wsa883x)
  396. {
  397. mutex_lock(&wsa883x->res_lock);
  398. regcache_mark_dirty(wsa883x->regmap);
  399. regcache_sync(wsa883x->regmap);
  400. mutex_unlock(&wsa883x->res_lock);
  401. }
  402. static irqreturn_t wsa883x_saf2war_handle_irq(int irq, void *data)
  403. {
  404. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  405. __func__, irq);
  406. return IRQ_HANDLED;
  407. }
  408. static irqreturn_t wsa883x_war2saf_handle_irq(int irq, void *data)
  409. {
  410. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  411. __func__, irq);
  412. return IRQ_HANDLED;
  413. }
  414. static irqreturn_t wsa883x_otp_handle_irq(int irq, void *data)
  415. {
  416. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  417. __func__, irq);
  418. return IRQ_HANDLED;
  419. }
  420. static irqreturn_t wsa883x_ocp_handle_irq(int irq, void *data)
  421. {
  422. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  423. __func__, irq);
  424. return IRQ_HANDLED;
  425. }
  426. static irqreturn_t wsa883x_clip_handle_irq(int irq, void *data)
  427. {
  428. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  429. __func__, irq);
  430. return IRQ_HANDLED;
  431. }
  432. static irqreturn_t wsa883x_pdm_wd_handle_irq(int irq, void *data)
  433. {
  434. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  435. __func__, irq);
  436. return IRQ_HANDLED;
  437. }
  438. static irqreturn_t wsa883x_clk_wd_handle_irq(int irq, void *data)
  439. {
  440. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  441. __func__, irq);
  442. return IRQ_HANDLED;
  443. }
  444. static irqreturn_t wsa883x_ext_int_handle_irq(int irq, void *data)
  445. {
  446. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  447. __func__, irq);
  448. return IRQ_HANDLED;
  449. }
  450. static irqreturn_t wsa883x_uvlo_handle_irq(int irq, void *data)
  451. {
  452. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  453. __func__, irq);
  454. return IRQ_HANDLED;
  455. }
  456. static irqreturn_t wsa883x_pa_on_err_handle_irq(int irq, void *data)
  457. {
  458. u8 pa_fsm_sta = 0, pa_fsm_err = 0;
  459. struct wsa883x_priv *wsa883x = data;
  460. struct snd_soc_component *component = NULL;
  461. if (!wsa883x)
  462. return IRQ_NONE;
  463. component = wsa883x->component;
  464. if (!component)
  465. return IRQ_NONE;
  466. pa_fsm_sta = (snd_soc_component_read(component, WSA883X_PA_FSM_STA)
  467. & 0x70);
  468. if (pa_fsm_sta)
  469. pa_fsm_err = snd_soc_component_read(component,
  470. WSA883X_PA_FSM_ERR_COND);
  471. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  472. __func__, irq);
  473. snd_soc_component_update_bits(component, WSA883X_PA_FSM_CTL,
  474. 0x10, 0x00);
  475. snd_soc_component_update_bits(component, WSA883X_PA_FSM_CTL,
  476. 0x10, 0x10);
  477. snd_soc_component_update_bits(component, WSA883X_PA_FSM_CTL,
  478. 0x10, 0x00);
  479. return IRQ_HANDLED;
  480. }
  481. static const char * const wsa_dev_mode_text[] = {
  482. "speaker", "receiver", "ultrasound"
  483. };
  484. enum {
  485. SPEAKER,
  486. RECEIVER,
  487. ULTRASOUND,
  488. };
  489. static const struct soc_enum wsa_dev_mode_enum =
  490. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(wsa_dev_mode_text), wsa_dev_mode_text);
  491. static int wsa_dev_mode_get(struct snd_kcontrol *kcontrol,
  492. struct snd_ctl_elem_value *ucontrol)
  493. {
  494. struct snd_soc_component *component =
  495. snd_soc_kcontrol_component(kcontrol);
  496. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  497. ucontrol->value.integer.value[0] = wsa883x->dev_mode;
  498. dev_dbg(component->dev, "%s: mode = 0x%x\n", __func__,
  499. wsa883x->dev_mode);
  500. return 0;
  501. }
  502. static int wsa_dev_mode_put(struct snd_kcontrol *kcontrol,
  503. struct snd_ctl_elem_value *ucontrol)
  504. {
  505. struct snd_soc_component *component =
  506. snd_soc_kcontrol_component(kcontrol);
  507. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  508. dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  509. __func__, ucontrol->value.integer.value[0]);
  510. wsa883x->dev_mode = ucontrol->value.integer.value[0];
  511. return 0;
  512. }
  513. static const char * const wsa_pa_gain_text[] = {
  514. "G_21_DB", "G_19P5_DB", "G_18_DB", "G_16P5_DB", "G_15_DB", "G_13P5_DB",
  515. "G_12_DB", "G_10P5_DB", "G_9_DB", "G_7P5_DB", "G_6_DB", "G_4P5_DB", "G_3_DB", "G_1P5_DB",
  516. "G_0_DB", "N_1P5_DB", "N_3_DB"
  517. };
  518. static const struct soc_enum wsa_pa_gain_enum =
  519. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(wsa_pa_gain_text), wsa_pa_gain_text);
  520. static int wsa_pa_gain_get(struct snd_kcontrol *kcontrol,
  521. struct snd_ctl_elem_value *ucontrol)
  522. {
  523. struct snd_soc_component *component =
  524. snd_soc_kcontrol_component(kcontrol);
  525. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  526. ucontrol->value.integer.value[0] = wsa883x->pa_gain;
  527. dev_dbg(component->dev, "%s: PA gain = 0x%x\n", __func__,
  528. wsa883x->pa_gain);
  529. return 0;
  530. }
  531. static int wsa_pa_gain_put(struct snd_kcontrol *kcontrol,
  532. struct snd_ctl_elem_value *ucontrol)
  533. {
  534. struct snd_soc_component *component =
  535. snd_soc_kcontrol_component(kcontrol);
  536. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  537. dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  538. __func__, ucontrol->value.integer.value[0]);
  539. wsa883x->pa_gain = ucontrol->value.integer.value[0];
  540. if (!wsa883x->comp_enable)
  541. snd_soc_component_update_bits(component,
  542. WSA883X_DRE_CTL_1,
  543. 0x3E, wsa883x->pa_gain << 1);
  544. return 0;
  545. }
  546. static int wsa883x_get_mute(struct snd_kcontrol *kcontrol,
  547. struct snd_ctl_elem_value *ucontrol)
  548. {
  549. struct snd_soc_component *component =
  550. snd_soc_kcontrol_component(kcontrol);
  551. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  552. ucontrol->value.integer.value[0] = wsa883x->pa_mute;
  553. return 0;
  554. }
  555. static int wsa883x_set_mute(struct snd_kcontrol *kcontrol,
  556. struct snd_ctl_elem_value *ucontrol)
  557. {
  558. struct snd_soc_component *component =
  559. snd_soc_kcontrol_component(kcontrol);
  560. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  561. int value = ucontrol->value.integer.value[0];
  562. dev_dbg(component->dev, "%s: mute current %d, new %d\n",
  563. __func__, wsa883x->pa_mute, value);
  564. wsa883x->pa_mute = value;
  565. return 0;
  566. }
  567. static int wsa_get_temp(struct snd_kcontrol *kcontrol,
  568. struct snd_ctl_elem_value *ucontrol)
  569. {
  570. struct snd_soc_component *component =
  571. snd_soc_kcontrol_component(kcontrol);
  572. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  573. int temp = 0;
  574. if (test_bit(SPKR_STATUS, &wsa883x->status_mask))
  575. temp = wsa883x->curr_temp;
  576. else
  577. wsa883x_get_temperature(component, &temp);
  578. ucontrol->value.integer.value[0] = temp;
  579. return 0;
  580. }
  581. static ssize_t wsa883x_codec_version_read(struct snd_info_entry *entry,
  582. void *file_private_data, struct file *file,
  583. char __user *buf, size_t count, loff_t pos)
  584. {
  585. struct wsa883x_priv *wsa883x;
  586. char buffer[WSA883X_VERSION_ENTRY_SIZE];
  587. int len = 0;
  588. wsa883x = (struct wsa883x_priv *) entry->private_data;
  589. if (!wsa883x) {
  590. pr_err("%s: wsa883x priv is null\n", __func__);
  591. return -EINVAL;
  592. }
  593. switch (wsa883x->version) {
  594. case WSA883X_VERSION_1_0:
  595. len = snprintf(buffer, sizeof(buffer), "WSA883X_1_0\n");
  596. break;
  597. case WSA883X_VERSION_1_1:
  598. len = snprintf(buffer, sizeof(buffer), "WSA883X_1_1\n");
  599. break;
  600. default:
  601. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  602. break;
  603. }
  604. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  605. }
  606. static struct snd_info_entry_ops wsa883x_codec_info_ops = {
  607. .read = wsa883x_codec_version_read,
  608. };
  609. static ssize_t wsa883x_variant_read(struct snd_info_entry *entry,
  610. void *file_private_data,
  611. struct file *file,
  612. char __user *buf, size_t count,
  613. loff_t pos)
  614. {
  615. struct wsa883x_priv *wsa883x;
  616. char buffer[WSA883X_VARIANT_ENTRY_SIZE];
  617. int len = 0;
  618. wsa883x = (struct wsa883x_priv *) entry->private_data;
  619. if (!wsa883x) {
  620. pr_err("%s: wsa883x priv is null\n", __func__);
  621. return -EINVAL;
  622. }
  623. switch (wsa883x->variant) {
  624. case WSA8830:
  625. len = snprintf(buffer, sizeof(buffer), "WSA8830\n");
  626. break;
  627. case WSA8835:
  628. case WSA8835_V2:
  629. len = snprintf(buffer, sizeof(buffer), "WSA8835\n");
  630. break;
  631. case WSA8832:
  632. len = snprintf(buffer, sizeof(buffer), "WSA8832\n");
  633. break;
  634. default:
  635. len = snprintf(buffer, sizeof(buffer), "UNDEFINED\n");
  636. break;
  637. }
  638. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  639. }
  640. static struct snd_info_entry_ops wsa883x_variant_ops = {
  641. .read = wsa883x_variant_read,
  642. };
  643. /*
  644. * wsa883x_codec_info_create_codec_entry - creates wsa883x module
  645. * @codec_root: The parent directory
  646. * @component: Codec instance
  647. *
  648. * Creates wsa883x module and version entry under the given
  649. * parent directory.
  650. *
  651. * Return: 0 on success or negative error code on failure.
  652. */
  653. int wsa883x_codec_info_create_codec_entry(struct snd_info_entry *codec_root,
  654. struct snd_soc_component *component)
  655. {
  656. struct snd_info_entry *version_entry;
  657. struct snd_info_entry *variant_entry;
  658. struct wsa883x_priv *wsa883x;
  659. struct snd_soc_card *card;
  660. char name[80];
  661. if (!codec_root || !component)
  662. return -EINVAL;
  663. wsa883x = snd_soc_component_get_drvdata(component);
  664. if (wsa883x->entry) {
  665. dev_dbg(wsa883x->dev,
  666. "%s:wsa883x module already created\n", __func__);
  667. return 0;
  668. }
  669. card = component->card;
  670. snprintf(name, sizeof(name), "%s.%llx", "wsa883x",
  671. wsa883x->swr_slave->addr);
  672. wsa883x->entry = snd_info_create_module_entry(codec_root->module,
  673. (const char *)name,
  674. codec_root);
  675. if (!wsa883x->entry) {
  676. dev_dbg(component->dev, "%s: failed to create wsa883x entry\n",
  677. __func__);
  678. return -ENOMEM;
  679. }
  680. wsa883x->entry->mode = S_IFDIR | 0555;
  681. if (snd_info_register(wsa883x->entry) < 0) {
  682. snd_info_free_entry(wsa883x->entry);
  683. return -ENOMEM;
  684. }
  685. version_entry = snd_info_create_card_entry(card->snd_card,
  686. "version",
  687. wsa883x->entry);
  688. if (!version_entry) {
  689. dev_dbg(component->dev, "%s: failed to create wsa883x version entry\n",
  690. __func__);
  691. snd_info_free_entry(wsa883x->entry);
  692. return -ENOMEM;
  693. }
  694. version_entry->private_data = wsa883x;
  695. version_entry->size = WSA883X_VERSION_ENTRY_SIZE;
  696. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  697. version_entry->c.ops = &wsa883x_codec_info_ops;
  698. if (snd_info_register(version_entry) < 0) {
  699. snd_info_free_entry(version_entry);
  700. snd_info_free_entry(wsa883x->entry);
  701. return -ENOMEM;
  702. }
  703. wsa883x->version_entry = version_entry;
  704. variant_entry = snd_info_create_card_entry(card->snd_card,
  705. "variant",
  706. wsa883x->entry);
  707. if (!variant_entry) {
  708. dev_dbg(component->dev,
  709. "%s: failed to create wsa883x variant entry\n",
  710. __func__);
  711. snd_info_free_entry(version_entry);
  712. snd_info_free_entry(wsa883x->entry);
  713. return -ENOMEM;
  714. }
  715. variant_entry->private_data = wsa883x;
  716. variant_entry->size = WSA883X_VARIANT_ENTRY_SIZE;
  717. variant_entry->content = SNDRV_INFO_CONTENT_DATA;
  718. variant_entry->c.ops = &wsa883x_variant_ops;
  719. if (snd_info_register(variant_entry) < 0) {
  720. snd_info_free_entry(variant_entry);
  721. snd_info_free_entry(version_entry);
  722. snd_info_free_entry(wsa883x->entry);
  723. return -ENOMEM;
  724. }
  725. wsa883x->variant_entry = variant_entry;
  726. return 0;
  727. }
  728. EXPORT_SYMBOL(wsa883x_codec_info_create_codec_entry);
  729. /*
  730. * wsa883x_codec_get_dev_num - returns swr device number
  731. * @component: Codec instance
  732. *
  733. * Return: swr device number on success or negative error
  734. * code on failure.
  735. */
  736. int wsa883x_codec_get_dev_num(struct snd_soc_component *component)
  737. {
  738. struct wsa883x_priv *wsa883x;
  739. if (!component)
  740. return -EINVAL;
  741. wsa883x = snd_soc_component_get_drvdata(component);
  742. if (!wsa883x) {
  743. pr_err("%s: wsa883x component is NULL\n", __func__);
  744. return -EINVAL;
  745. }
  746. return wsa883x->swr_slave->dev_num;
  747. }
  748. EXPORT_SYMBOL(wsa883x_codec_get_dev_num);
  749. static int wsa883x_get_dev_num(struct snd_kcontrol *kcontrol,
  750. struct snd_ctl_elem_value *ucontrol)
  751. {
  752. struct snd_soc_component *component =
  753. snd_soc_kcontrol_component(kcontrol);
  754. struct wsa883x_priv *wsa883x;
  755. if (!component)
  756. return -EINVAL;
  757. wsa883x = snd_soc_component_get_drvdata(component);
  758. if (!wsa883x) {
  759. pr_err("%s: wsa883x component is NULL\n", __func__);
  760. return -EINVAL;
  761. }
  762. ucontrol->value.integer.value[0] = wsa883x->swr_slave->dev_num;
  763. return 0;
  764. }
  765. static int wsa883x_get_compander(struct snd_kcontrol *kcontrol,
  766. struct snd_ctl_elem_value *ucontrol)
  767. {
  768. struct snd_soc_component *component =
  769. snd_soc_kcontrol_component(kcontrol);
  770. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  771. ucontrol->value.integer.value[0] = wsa883x->comp_enable;
  772. return 0;
  773. }
  774. static int wsa883x_set_compander(struct snd_kcontrol *kcontrol,
  775. struct snd_ctl_elem_value *ucontrol)
  776. {
  777. struct snd_soc_component *component =
  778. snd_soc_kcontrol_component(kcontrol);
  779. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  780. int value = ucontrol->value.integer.value[0];
  781. dev_dbg(component->dev, "%s: Compander enable current %d, new %d\n",
  782. __func__, wsa883x->comp_enable, value);
  783. wsa883x->comp_enable = value;
  784. return 0;
  785. }
  786. static int wsa883x_get_comp_offset(struct snd_kcontrol *kcontrol,
  787. struct snd_ctl_elem_value *ucontrol)
  788. {
  789. struct snd_soc_component *component =
  790. snd_soc_kcontrol_component(kcontrol);
  791. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  792. ucontrol->value.integer.value[0] = wsa883x->comp_offset;
  793. return 0;
  794. }
  795. static int wsa883x_set_comp_offset(struct snd_kcontrol *kcontrol,
  796. struct snd_ctl_elem_value *ucontrol)
  797. {
  798. struct snd_soc_component *component =
  799. snd_soc_kcontrol_component(kcontrol);
  800. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  801. int value = ucontrol->value.integer.value[0];
  802. dev_dbg(component->dev, "%s: comp_offset %d\n",
  803. __func__, wsa883x->comp_offset);
  804. wsa883x->comp_offset = value;
  805. return 0;
  806. }
  807. static int wsa883x_get_visense(struct snd_kcontrol *kcontrol,
  808. struct snd_ctl_elem_value *ucontrol)
  809. {
  810. struct snd_soc_component *component =
  811. snd_soc_kcontrol_component(kcontrol);
  812. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  813. ucontrol->value.integer.value[0] = wsa883x->visense_enable;
  814. return 0;
  815. }
  816. static int wsa883x_set_visense(struct snd_kcontrol *kcontrol,
  817. struct snd_ctl_elem_value *ucontrol)
  818. {
  819. struct snd_soc_component *component =
  820. snd_soc_kcontrol_component(kcontrol);
  821. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  822. int value = ucontrol->value.integer.value[0];
  823. dev_dbg(component->dev, "%s: VIsense enable current %d, new %d\n",
  824. __func__, wsa883x->visense_enable, value);
  825. wsa883x->visense_enable = value;
  826. return 0;
  827. }
  828. static int wsa883x_get_ext_vdd_spk(struct snd_kcontrol *kcontrol,
  829. struct snd_ctl_elem_value *ucontrol)
  830. {
  831. struct snd_soc_component *component =
  832. snd_soc_kcontrol_component(kcontrol);
  833. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  834. ucontrol->value.integer.value[0] = wsa883x->ext_vdd_spk;
  835. return 0;
  836. }
  837. static int wsa883x_put_ext_vdd_spk(struct snd_kcontrol *kcontrol,
  838. struct snd_ctl_elem_value *ucontrol)
  839. {
  840. struct snd_soc_component *component =
  841. snd_soc_kcontrol_component(kcontrol);
  842. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  843. int value = ucontrol->value.integer.value[0];
  844. dev_dbg(component->dev, "%s: Ext VDD SPK enable current %d, new %d\n",
  845. __func__, wsa883x->ext_vdd_spk, value);
  846. wsa883x->ext_vdd_spk = value;
  847. return 0;
  848. }
  849. static const struct snd_kcontrol_new wsa883x_snd_controls[] = {
  850. SOC_ENUM_EXT("WSA PA Gain", wsa_pa_gain_enum,
  851. wsa_pa_gain_get, wsa_pa_gain_put),
  852. SOC_SINGLE_EXT("WSA PA Mute", SND_SOC_NOPM, 0, 1, 0,
  853. wsa883x_get_mute, wsa883x_set_mute),
  854. SOC_SINGLE_EXT("WSA Temp", SND_SOC_NOPM, 0, UINT_MAX, 0,
  855. wsa_get_temp, NULL),
  856. SOC_SINGLE_EXT("WSA Get DevNum", SND_SOC_NOPM, 0, UINT_MAX, 0,
  857. wsa883x_get_dev_num, NULL),
  858. SOC_ENUM_EXT("WSA MODE", wsa_dev_mode_enum,
  859. wsa_dev_mode_get, wsa_dev_mode_put),
  860. SOC_SINGLE_EXT("COMP Offset", SND_SOC_NOPM, 0, 4, 0,
  861. wsa883x_get_comp_offset, wsa883x_set_comp_offset),
  862. SOC_SINGLE_EXT("COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  863. wsa883x_get_compander, wsa883x_set_compander),
  864. SOC_SINGLE_EXT("VISENSE Switch", SND_SOC_NOPM, 0, 1, 0,
  865. wsa883x_get_visense, wsa883x_set_visense),
  866. SOC_SINGLE_EXT("External VDD_SPK", SND_SOC_NOPM, 0, 1, 0,
  867. wsa883x_get_ext_vdd_spk, wsa883x_put_ext_vdd_spk),
  868. };
  869. static const struct snd_kcontrol_new swr_dac_port[] = {
  870. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  871. };
  872. static int wsa883x_set_port(struct snd_soc_component *component, int port_idx,
  873. u8 *port_id, u8 *num_ch, u8 *ch_mask, u32 *ch_rate,
  874. u8 *port_type)
  875. {
  876. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  877. *port_id = wsa883x->port[port_idx].port_id;
  878. *num_ch = wsa883x->port[port_idx].num_ch;
  879. *ch_mask = wsa883x->port[port_idx].ch_mask;
  880. *ch_rate = wsa883x->port[port_idx].ch_rate;
  881. *port_type = wsa883x->port[port_idx].port_type;
  882. return 0;
  883. }
  884. static int wsa883x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
  885. struct snd_kcontrol *kcontrol, int event)
  886. {
  887. struct snd_soc_component *component =
  888. snd_soc_dapm_to_component(w->dapm);
  889. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  890. u8 port_id[WSA883X_MAX_SWR_PORTS];
  891. u8 num_ch[WSA883X_MAX_SWR_PORTS];
  892. u8 ch_mask[WSA883X_MAX_SWR_PORTS];
  893. u32 ch_rate[WSA883X_MAX_SWR_PORTS];
  894. u8 port_type[WSA883X_MAX_SWR_PORTS];
  895. u8 num_port = 0;
  896. dev_dbg(component->dev, "%s: event %d name %s\n", __func__,
  897. event, w->name);
  898. if (wsa883x == NULL)
  899. return -EINVAL;
  900. switch (event) {
  901. case SND_SOC_DAPM_PRE_PMU:
  902. wsa883x_set_port(component, SWR_DAC_PORT,
  903. &port_id[num_port], &num_ch[num_port],
  904. &ch_mask[num_port], &ch_rate[num_port],
  905. &port_type[num_port]);
  906. if (wsa883x->dev_mode == RECEIVER)
  907. ch_rate[num_port] = SWR_CLK_RATE_4P8MHZ;
  908. ++num_port;
  909. if (wsa883x->comp_enable) {
  910. wsa883x_set_port(component, SWR_COMP_PORT,
  911. &port_id[num_port], &num_ch[num_port],
  912. &ch_mask[num_port], &ch_rate[num_port],
  913. &port_type[num_port]);
  914. ++num_port;
  915. set_bit(COMP_PORT_EN_STATUS_BIT, &wsa883x->port_status_mask);
  916. }
  917. if (wsa883x->visense_enable) {
  918. wsa883x_set_port(component, SWR_VISENSE_PORT,
  919. &port_id[num_port], &num_ch[num_port],
  920. &ch_mask[num_port], &ch_rate[num_port],
  921. &port_type[num_port]);
  922. ++num_port;
  923. set_bit(VISENSE_EN_STATUS_BIT, &wsa883x->port_status_mask);
  924. }
  925. swr_connect_port(wsa883x->swr_slave, &port_id[0], num_port,
  926. &ch_mask[0], &ch_rate[0], &num_ch[0],
  927. &port_type[0]);
  928. break;
  929. case SND_SOC_DAPM_POST_PMU:
  930. set_bit(SPKR_STATUS, &wsa883x->status_mask);
  931. break;
  932. case SND_SOC_DAPM_PRE_PMD:
  933. wsa883x_set_port(component, SWR_DAC_PORT,
  934. &port_id[num_port], &num_ch[num_port],
  935. &ch_mask[num_port], &ch_rate[num_port],
  936. &port_type[num_port]);
  937. ++num_port;
  938. if (wsa883x->comp_enable &&
  939. test_bit(COMP_PORT_EN_STATUS_BIT, &wsa883x->port_status_mask)) {
  940. wsa883x_set_port(component, SWR_COMP_PORT,
  941. &port_id[num_port], &num_ch[num_port],
  942. &ch_mask[num_port], &ch_rate[num_port],
  943. &port_type[num_port]);
  944. ++num_port;
  945. clear_bit(COMP_PORT_EN_STATUS_BIT, &wsa883x->port_status_mask);
  946. }
  947. if (wsa883x->visense_enable &&
  948. test_bit(VISENSE_EN_STATUS_BIT, &wsa883x->port_status_mask)) {
  949. wsa883x_set_port(component, SWR_VISENSE_PORT,
  950. &port_id[num_port], &num_ch[num_port],
  951. &ch_mask[num_port], &ch_rate[num_port],
  952. &port_type[num_port]);
  953. ++num_port;
  954. clear_bit(VISENSE_EN_STATUS_BIT, &wsa883x->port_status_mask);
  955. }
  956. swr_disconnect_port(wsa883x->swr_slave, &port_id[0], num_port,
  957. &ch_mask[0], &port_type[0]);
  958. break;
  959. case SND_SOC_DAPM_POST_PMD:
  960. if (swr_set_device_group(wsa883x->swr_slave, SWR_GROUP_NONE))
  961. dev_err(component->dev,
  962. "%s: set num ch failed\n", __func__);
  963. swr_slvdev_datapath_control(wsa883x->swr_slave,
  964. wsa883x->swr_slave->dev_num,
  965. false);
  966. break;
  967. default:
  968. break;
  969. }
  970. return 0;
  971. }
  972. static int wsa883x_spkr_event(struct snd_soc_dapm_widget *w,
  973. struct snd_kcontrol *kcontrol, int event)
  974. {
  975. struct snd_soc_component *component =
  976. snd_soc_dapm_to_component(w->dapm);
  977. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  978. dev_dbg(component->dev, "%s: %s %d\n", __func__, w->name, event);
  979. switch (event) {
  980. case SND_SOC_DAPM_POST_PMU:
  981. if (wsa883x->dev_mode == RECEIVER) {
  982. snd_soc_component_update_bits(component,
  983. WSA883X_CDC_PATH_MODE,
  984. 0x02, 0x02);
  985. snd_soc_component_update_bits(component,
  986. WSA883X_SPKR_PWM_CLK_CTL,
  987. 0x08, 0x08);
  988. snd_soc_component_update_bits(component,
  989. WSA883X_DRE_CTL_0,
  990. 0xF0, 0x00);
  991. } else if (wsa883x->dev_mode == SPEAKER) {
  992. snd_soc_component_update_bits(component,
  993. WSA883X_CDC_PATH_MODE,
  994. 0x02, 0x00);
  995. snd_soc_component_update_bits(component,
  996. WSA883X_SPKR_PWM_CLK_CTL,
  997. 0x08, 0x00);
  998. snd_soc_component_update_bits(component,
  999. WSA883X_DRE_CTL_0,
  1000. 0xF0, 0x90);
  1001. }
  1002. swr_slvdev_datapath_control(wsa883x->swr_slave,
  1003. wsa883x->swr_slave->dev_num,
  1004. true);
  1005. /* Added delay as per HW sequence */
  1006. usleep_range(250, 300);
  1007. snd_soc_component_update_bits(component,
  1008. WSA883X_DRE_CTL_1,
  1009. 0x01, 0x01);
  1010. /* Added delay as per HW sequence */
  1011. usleep_range(250, 300);
  1012. /* Force remove group */
  1013. swr_remove_from_group(wsa883x->swr_slave,
  1014. wsa883x->swr_slave->dev_num);
  1015. if (wsa883x->comp_enable &&
  1016. test_bit(COMP_PORT_EN_STATUS_BIT, &wsa883x->port_status_mask))
  1017. snd_soc_component_update_bits(component,
  1018. WSA883X_DRE_CTL_0,
  1019. 0x07,
  1020. wsa883x->comp_offset);
  1021. wcd_enable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PA_ON_ERR);
  1022. wcd_enable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_UVLO);
  1023. wcd_enable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_SAF2WAR);
  1024. wcd_enable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_WAR2SAF);
  1025. wcd_enable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_DISABLE);
  1026. wcd_enable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_OCP);
  1027. wcd_enable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLK_WD);
  1028. snd_soc_component_update_bits(component,
  1029. WSA883X_VBAT_ADC_FLT_CTL,
  1030. 0x0E, 0x06);
  1031. snd_soc_component_update_bits(component,
  1032. WSA883X_VBAT_ADC_FLT_CTL,
  1033. 0x01, 0x01);
  1034. if (test_bit(SPKR_ADIE_LB, &wsa883x->status_mask))
  1035. snd_soc_component_update_bits(component,
  1036. WSA883X_PA_FSM_CTL, 0x01, 0x01);
  1037. break;
  1038. case SND_SOC_DAPM_PRE_PMD:
  1039. if (!test_bit(SPKR_ADIE_LB, &wsa883x->status_mask))
  1040. wcd_disable_irq(&wsa883x->irq_info,
  1041. WSA883X_IRQ_INT_PDM_WD);
  1042. snd_soc_component_update_bits(component,
  1043. WSA883X_VBAT_ADC_FLT_CTL,
  1044. 0x01, 0x00);
  1045. snd_soc_component_update_bits(component,
  1046. WSA883X_VBAT_ADC_FLT_CTL,
  1047. 0x0E, 0x00);
  1048. snd_soc_component_update_bits(component, WSA883X_PA_FSM_CTL,
  1049. 0x01, 0x00);
  1050. snd_soc_component_update_bits(component, WSA883X_PA_FSM_CTL,
  1051. 0x10, 0x00);
  1052. snd_soc_component_update_bits(component, WSA883X_PA_FSM_CTL,
  1053. 0x10, 0x10);
  1054. snd_soc_component_update_bits(component, WSA883X_PA_FSM_CTL,
  1055. 0x10, 0x00);
  1056. snd_soc_component_update_bits(component, WSA883X_PDM_WD_CTL,
  1057. 0x01, 0x00);
  1058. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLK_WD);
  1059. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_OCP);
  1060. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_DISABLE);
  1061. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_WAR2SAF);
  1062. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_SAF2WAR);
  1063. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_UVLO);
  1064. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PA_ON_ERR);
  1065. clear_bit(SPKR_STATUS, &wsa883x->status_mask);
  1066. clear_bit(SPKR_ADIE_LB, &wsa883x->status_mask);
  1067. break;
  1068. }
  1069. return 0;
  1070. }
  1071. static const struct snd_soc_dapm_widget wsa883x_dapm_widgets[] = {
  1072. SND_SOC_DAPM_INPUT("IN"),
  1073. SND_SOC_DAPM_MIXER_E("SWR DAC_Port", SND_SOC_NOPM, 0, 0, swr_dac_port,
  1074. ARRAY_SIZE(swr_dac_port), wsa883x_enable_swr_dac_port,
  1075. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1076. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1077. SND_SOC_DAPM_SPK("SPKR", wsa883x_spkr_event),
  1078. };
  1079. static const struct snd_soc_dapm_route wsa883x_audio_map[] = {
  1080. {"SWR DAC_Port", "Switch", "IN"},
  1081. {"SPKR", NULL, "SWR DAC_Port"},
  1082. };
  1083. int wsa883x_set_channel_map(struct snd_soc_component *component, u8 *port,
  1084. u8 num_port, unsigned int *ch_mask,
  1085. unsigned int *ch_rate, u8 *port_type)
  1086. {
  1087. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  1088. int i;
  1089. if (!port || !ch_mask || !ch_rate ||
  1090. (num_port > WSA883X_MAX_SWR_PORTS)) {
  1091. dev_err(component->dev,
  1092. "%s: Invalid port=%pK, ch_mask=%pK, ch_rate=%pK\n",
  1093. __func__, port, ch_mask, ch_rate);
  1094. return -EINVAL;
  1095. }
  1096. for (i = 0; i < num_port; i++) {
  1097. wsa883x->port[i].port_id = port[i];
  1098. wsa883x->port[i].ch_mask = ch_mask[i];
  1099. wsa883x->port[i].ch_rate = ch_rate[i];
  1100. wsa883x->port[i].num_ch = __sw_hweight8(ch_mask[i]);
  1101. if (port_type)
  1102. wsa883x->port[i].port_type = port_type[i];
  1103. }
  1104. return 0;
  1105. }
  1106. EXPORT_SYMBOL(wsa883x_set_channel_map);
  1107. static void wsa883x_codec_init(struct snd_soc_component *component)
  1108. {
  1109. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  1110. int i;
  1111. if (!wsa883x)
  1112. return;
  1113. for (i = 0; i < ARRAY_SIZE(reg_init); i++)
  1114. snd_soc_component_update_bits(component, reg_init[i].reg,
  1115. reg_init[i].mask, reg_init[i].val);
  1116. if (wsa883x->variant == WSA8830 || wsa883x->variant == WSA8832) {
  1117. snd_soc_component_update_bits(component, WSA883X_DRE_CTL_0,
  1118. 0x07, 0x03);
  1119. wsa883x->comp_offset = COMP_OFFSET3;
  1120. }
  1121. }
  1122. static int32_t wsa883x_temp_reg_read(struct snd_soc_component *component,
  1123. struct wsa_temp_register *wsa_temp_reg)
  1124. {
  1125. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  1126. if (!wsa883x) {
  1127. dev_err(component->dev, "%s: wsa883x is NULL\n", __func__);
  1128. return -EINVAL;
  1129. }
  1130. mutex_lock(&wsa883x->res_lock);
  1131. snd_soc_component_update_bits(component, WSA883X_PA_FSM_BYP,
  1132. 0x01, 0x01);
  1133. snd_soc_component_update_bits(component, WSA883X_PA_FSM_BYP,
  1134. 0x04, 0x04);
  1135. snd_soc_component_update_bits(component, WSA883X_PA_FSM_BYP,
  1136. 0x02, 0x02);
  1137. snd_soc_component_update_bits(component, WSA883X_PA_FSM_BYP,
  1138. 0x80, 0x80);
  1139. snd_soc_component_update_bits(component, WSA883X_PA_FSM_BYP,
  1140. 0x20, 0x20);
  1141. snd_soc_component_update_bits(component, WSA883X_PA_FSM_BYP,
  1142. 0x40, 0x40);
  1143. snd_soc_component_update_bits(component, WSA883X_TADC_VALUE_CTL,
  1144. 0x01, 0x00);
  1145. wsa_temp_reg->dmeas_msb = snd_soc_component_read(
  1146. component, WSA883X_TEMP_MSB);
  1147. wsa_temp_reg->dmeas_lsb = snd_soc_component_read(
  1148. component, WSA883X_TEMP_LSB);
  1149. snd_soc_component_update_bits(component, WSA883X_TADC_VALUE_CTL,
  1150. 0x01, 0x01);
  1151. wsa_temp_reg->d1_msb = snd_soc_component_read(
  1152. component, WSA883X_OTP_REG_1);
  1153. wsa_temp_reg->d1_lsb = snd_soc_component_read(
  1154. component, WSA883X_OTP_REG_2);
  1155. wsa_temp_reg->d2_msb = snd_soc_component_read(
  1156. component, WSA883X_OTP_REG_3);
  1157. wsa_temp_reg->d2_lsb = snd_soc_component_read(
  1158. component, WSA883X_OTP_REG_4);
  1159. snd_soc_component_update_bits(component, WSA883X_PA_FSM_BYP,
  1160. 0xE7, 0x00);
  1161. mutex_unlock(&wsa883x->res_lock);
  1162. return 0;
  1163. }
  1164. static int wsa883x_get_temperature(struct snd_soc_component *component,
  1165. int *temp)
  1166. {
  1167. struct wsa_temp_register reg;
  1168. int dmeas, d1, d2;
  1169. int ret = 0;
  1170. int temp_val = 0;
  1171. int t1 = T1_TEMP;
  1172. int t2 = T2_TEMP;
  1173. u8 retry = WSA883X_TEMP_RETRY;
  1174. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  1175. if (!wsa883x)
  1176. return -EINVAL;
  1177. do {
  1178. ret = wsa883x_temp_reg_read(component, &reg);
  1179. if (ret) {
  1180. pr_err("%s: temp read failed: %d, current temp: %d\n",
  1181. __func__, ret, wsa883x->curr_temp);
  1182. if (temp)
  1183. *temp = wsa883x->curr_temp;
  1184. return 0;
  1185. }
  1186. /*
  1187. * Temperature register values are expected to be in the
  1188. * following range.
  1189. * d1_msb = 68 - 92 and d1_lsb = 0, 64, 128, 192
  1190. * d2_msb = 185 -218 and d2_lsb = 0, 64, 128, 192
  1191. */
  1192. if ((reg.d1_msb < 68 || reg.d1_msb > 92) ||
  1193. (!(reg.d1_lsb == 0 || reg.d1_lsb == 64 || reg.d1_lsb == 128 ||
  1194. reg.d1_lsb == 192)) ||
  1195. (reg.d2_msb < 185 || reg.d2_msb > 218) ||
  1196. (!(reg.d2_lsb == 0 || reg.d2_lsb == 64 || reg.d2_lsb == 128 ||
  1197. reg.d2_lsb == 192))) {
  1198. printk_ratelimited("%s: Temperature registers[%d %d %d %d] are out of range\n",
  1199. __func__, reg.d1_msb, reg.d1_lsb, reg.d2_msb,
  1200. reg.d2_lsb);
  1201. }
  1202. dmeas = ((reg.dmeas_msb << 0x8) | reg.dmeas_lsb) >> 0x6;
  1203. d1 = ((reg.d1_msb << 0x8) | reg.d1_lsb) >> 0x6;
  1204. d2 = ((reg.d2_msb << 0x8) | reg.d2_lsb) >> 0x6;
  1205. if (d1 == d2)
  1206. temp_val = TEMP_INVALID;
  1207. else
  1208. temp_val = t1 + (((dmeas - d1) * (t2 - t1))/(d2 - d1));
  1209. if (temp_val <= LOW_TEMP_THRESHOLD ||
  1210. temp_val >= HIGH_TEMP_THRESHOLD) {
  1211. pr_debug("%s: T0: %d is out of range[%d, %d]\n", __func__,
  1212. temp_val, LOW_TEMP_THRESHOLD, HIGH_TEMP_THRESHOLD);
  1213. if (retry--)
  1214. msleep(10);
  1215. } else {
  1216. break;
  1217. }
  1218. } while (retry);
  1219. wsa883x->curr_temp = temp_val;
  1220. if (temp)
  1221. *temp = temp_val;
  1222. pr_debug("%s: t0 measured: %d dmeas = %d, d1 = %d, d2 = %d\n",
  1223. __func__, temp_val, dmeas, d1, d2);
  1224. return ret;
  1225. }
  1226. static int wsa883x_codec_probe(struct snd_soc_component *component)
  1227. {
  1228. char w_name[MAX_NAME_LEN];
  1229. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  1230. struct swr_device *dev;
  1231. int variant = 0, version = 0;
  1232. struct snd_soc_dapm_context *dapm =
  1233. snd_soc_component_get_dapm(component);
  1234. if (!wsa883x)
  1235. return -EINVAL;
  1236. if (!component->name_prefix)
  1237. return -EINVAL;
  1238. snd_soc_component_init_regmap(component, wsa883x->regmap);
  1239. dev = wsa883x->swr_slave;
  1240. wsa883x->component = component;
  1241. variant = (snd_soc_component_read(component, WSA883X_OTP_REG_0)
  1242. & 0x0F);
  1243. wsa883x->variant = variant;
  1244. version = (snd_soc_component_read(component, WSA883X_CHIP_ID0)
  1245. & 0xFF);
  1246. wsa883x->version = version;
  1247. wsa883x->comp_offset = COMP_OFFSET2;
  1248. wsa883x_codec_init(component);
  1249. wsa883x->global_pa_cnt = 0;
  1250. memset(w_name, 0, sizeof(w_name));
  1251. strlcpy(w_name, wsa883x->dai_driver->playback.stream_name,
  1252. sizeof(w_name));
  1253. snd_soc_dapm_ignore_suspend(dapm, w_name);
  1254. memset(w_name, 0, sizeof(w_name));
  1255. strlcpy(w_name, "IN", sizeof(w_name));
  1256. snd_soc_dapm_ignore_suspend(dapm, w_name);
  1257. memset(w_name, 0, sizeof(w_name));
  1258. strlcpy(w_name, "SWR DAC_Port", sizeof(w_name));
  1259. snd_soc_dapm_ignore_suspend(dapm, w_name);
  1260. memset(w_name, 0, sizeof(w_name));
  1261. strlcpy(w_name, "SPKR", sizeof(w_name));
  1262. snd_soc_dapm_ignore_suspend(dapm, w_name);
  1263. snd_soc_dapm_sync(dapm);
  1264. return 0;
  1265. }
  1266. static void wsa883x_codec_remove(struct snd_soc_component *component)
  1267. {
  1268. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  1269. if (!wsa883x)
  1270. return;
  1271. snd_soc_component_exit_regmap(component);
  1272. return;
  1273. }
  1274. static int wsa883x_soc_codec_suspend(struct snd_soc_component *component)
  1275. {
  1276. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  1277. if (!wsa883x)
  1278. return 0;
  1279. wsa883x->dapm_bias_off = true;
  1280. return 0;
  1281. }
  1282. static int wsa883x_soc_codec_resume(struct snd_soc_component *component)
  1283. {
  1284. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  1285. if (!wsa883x)
  1286. return 0;
  1287. wsa883x->dapm_bias_off = false;
  1288. return 0;
  1289. }
  1290. static const struct snd_soc_component_driver soc_codec_dev_wsa883x_wsa = {
  1291. .name = "",
  1292. .probe = wsa883x_codec_probe,
  1293. .remove = wsa883x_codec_remove,
  1294. .controls = wsa883x_snd_controls,
  1295. .num_controls = ARRAY_SIZE(wsa883x_snd_controls),
  1296. .dapm_widgets = wsa883x_dapm_widgets,
  1297. .num_dapm_widgets = ARRAY_SIZE(wsa883x_dapm_widgets),
  1298. .dapm_routes = wsa883x_audio_map,
  1299. .num_dapm_routes = ARRAY_SIZE(wsa883x_audio_map),
  1300. .suspend = wsa883x_soc_codec_suspend,
  1301. .resume = wsa883x_soc_codec_resume,
  1302. };
  1303. static int wsa883x_gpio_ctrl(struct wsa883x_priv *wsa883x, bool enable)
  1304. {
  1305. int ret = 0;
  1306. if (enable)
  1307. ret = msm_cdc_pinctrl_select_active_state(
  1308. wsa883x->wsa_rst_np);
  1309. else
  1310. ret = msm_cdc_pinctrl_select_sleep_state(
  1311. wsa883x->wsa_rst_np);
  1312. if (ret != 0)
  1313. dev_err(wsa883x->dev,
  1314. "%s: Failed to turn state %d; ret=%d\n",
  1315. __func__, enable, ret);
  1316. return ret;
  1317. }
  1318. static int wsa883x_swr_up(struct wsa883x_priv *wsa883x)
  1319. {
  1320. int ret;
  1321. ret = wsa883x_gpio_ctrl(wsa883x, true);
  1322. if (ret)
  1323. dev_err(wsa883x->dev, "%s: Failed to enable gpio\n", __func__);
  1324. return ret;
  1325. }
  1326. static int wsa883x_swr_down(struct wsa883x_priv *wsa883x)
  1327. {
  1328. int ret;
  1329. ret = wsa883x_gpio_ctrl(wsa883x, false);
  1330. if (ret)
  1331. dev_err(wsa883x->dev, "%s: Failed to disable gpio\n", __func__);
  1332. return ret;
  1333. }
  1334. static int wsa883x_swr_reset(struct wsa883x_priv *wsa883x)
  1335. {
  1336. u8 retry = WSA883X_NUM_RETRY;
  1337. u8 devnum = 0;
  1338. struct swr_device *pdev;
  1339. pdev = wsa883x->swr_slave;
  1340. while (swr_get_logical_dev_num(pdev, pdev->addr, &devnum) && retry--) {
  1341. /* Retry after 1 msec delay */
  1342. usleep_range(1000, 1100);
  1343. }
  1344. pdev->dev_num = devnum;
  1345. wsa883x_regcache_sync(wsa883x);
  1346. return 0;
  1347. }
  1348. static int wsa883x_event_notify(struct notifier_block *nb,
  1349. unsigned long val, void *ptr)
  1350. {
  1351. u16 event = (val & 0xffff);
  1352. struct wsa883x_priv *wsa883x = container_of(nb, struct wsa883x_priv,
  1353. parent_nblock);
  1354. if (!wsa883x)
  1355. return -EINVAL;
  1356. switch (event) {
  1357. case BOLERO_SLV_EVT_SSR_UP:
  1358. wsa883x_swr_down(wsa883x);
  1359. usleep_range(500, 510);
  1360. wsa883x_swr_up(wsa883x);
  1361. /* Add delay to allow enumerate */
  1362. usleep_range(20000, 20010);
  1363. wsa883x_swr_reset(wsa883x);
  1364. break;
  1365. case BOLERO_SLV_EVT_PA_ON_POST_FSCLK:
  1366. if (test_bit(SPKR_STATUS, &wsa883x->status_mask)) {
  1367. snd_soc_component_update_bits(wsa883x->component,
  1368. WSA883X_PDM_WD_CTL,
  1369. 0x01, 0x01);
  1370. snd_soc_component_update_bits(wsa883x->component,
  1371. WSA883X_PA_FSM_CTL,
  1372. 0x01, 0x01);
  1373. wcd_enable_irq(&wsa883x->irq_info,
  1374. WSA883X_IRQ_INT_PDM_WD);
  1375. /* Added delay as per HW sequence */
  1376. usleep_range(3000, 3100);
  1377. if (wsa883x->comp_enable &&
  1378. test_bit(COMP_PORT_EN_STATUS_BIT, &wsa883x->port_status_mask)) {
  1379. snd_soc_component_update_bits(wsa883x->component,
  1380. WSA883X_DRE_CTL_1,
  1381. 0x01, 0x00);
  1382. /* Added delay as per HW sequence */
  1383. usleep_range(5000, 5050);
  1384. }
  1385. }
  1386. break;
  1387. case BOLERO_SLV_EVT_PA_ON_POST_FSCLK_ADIE_LB:
  1388. if (test_bit(SPKR_STATUS, &wsa883x->status_mask))
  1389. set_bit(SPKR_ADIE_LB, &wsa883x->status_mask);
  1390. break;
  1391. default:
  1392. dev_dbg(wsa883x->dev, "%s: unknown event %d\n",
  1393. __func__, event);
  1394. break;
  1395. }
  1396. return 0;
  1397. }
  1398. static int wsa883x_enable_supplies(struct device * dev,
  1399. struct wsa883x_priv *priv)
  1400. {
  1401. int ret = 0;
  1402. /* Parse power supplies */
  1403. msm_cdc_get_power_supplies(dev, &priv->regulator,
  1404. &priv->num_supplies);
  1405. if (!priv->regulator || (priv->num_supplies <= 0)) {
  1406. dev_err(dev, "%s: no power supplies defined\n", __func__);
  1407. return -EINVAL;
  1408. }
  1409. ret = msm_cdc_init_supplies(dev, &priv->supplies,
  1410. priv->regulator, priv->num_supplies);
  1411. if (!priv->supplies) {
  1412. dev_err(dev, "%s: Cannot init wsa supplies\n",
  1413. __func__);
  1414. return ret;
  1415. }
  1416. ret = msm_cdc_enable_static_supplies(dev, priv->supplies,
  1417. priv->regulator,
  1418. priv->num_supplies);
  1419. if (ret)
  1420. dev_err(dev, "%s: wsa static supply enable failed!\n",
  1421. __func__);
  1422. return ret;
  1423. }
  1424. static struct snd_soc_dai_driver wsa_dai[] = {
  1425. {
  1426. .name = "",
  1427. .playback = {
  1428. .stream_name = "",
  1429. .rates = WSA883X_RATES | WSA883X_FRAC_RATES,
  1430. .formats = WSA883X_FORMATS,
  1431. .rate_max = 192000,
  1432. .rate_min = 8000,
  1433. .channels_min = 1,
  1434. .channels_max = 2,
  1435. },
  1436. },
  1437. };
  1438. static int wsa883x_swr_probe(struct swr_device *pdev)
  1439. {
  1440. int ret = 0, i = 0;
  1441. struct wsa883x_priv *wsa883x;
  1442. u8 devnum = 0;
  1443. bool pin_state_current = false;
  1444. struct wsa_ctrl_platform_data *plat_data = NULL;
  1445. struct snd_soc_component *component;
  1446. char buffer[MAX_NAME_LEN];
  1447. int dev_index = 0;
  1448. struct regmap_irq_chip *wsa883x_sub_regmap_irq_chip = NULL;
  1449. wsa883x = devm_kzalloc(&pdev->dev, sizeof(struct wsa883x_priv),
  1450. GFP_KERNEL);
  1451. if (!wsa883x)
  1452. return -ENOMEM;
  1453. wsa883x_sub_regmap_irq_chip = devm_kzalloc(&pdev->dev, sizeof(struct regmap_irq_chip),
  1454. GFP_KERNEL);
  1455. if (!wsa883x_sub_regmap_irq_chip)
  1456. return -ENOMEM;
  1457. memcpy(wsa883x_sub_regmap_irq_chip, &wsa883x_regmap_irq_chip,
  1458. sizeof(struct regmap_irq_chip));
  1459. ret = wsa883x_enable_supplies(&pdev->dev, wsa883x);
  1460. if (ret) {
  1461. ret = -EPROBE_DEFER;
  1462. goto err;
  1463. }
  1464. wsa883x->wsa_rst_np = of_parse_phandle(pdev->dev.of_node,
  1465. "qcom,spkr-sd-n-node", 0);
  1466. if (!wsa883x->wsa_rst_np) {
  1467. dev_dbg(&pdev->dev, "%s: pinctrl not defined\n", __func__);
  1468. goto err_supply;
  1469. }
  1470. swr_set_dev_data(pdev, wsa883x);
  1471. wsa883x->swr_slave = pdev;
  1472. wsa883x->dev = &pdev->dev;
  1473. pin_state_current = msm_cdc_pinctrl_get_state(wsa883x->wsa_rst_np);
  1474. wsa883x_gpio_ctrl(wsa883x, true);
  1475. /*
  1476. * Add 5msec delay to provide sufficient time for
  1477. * soundwire auto enumeration of slave devices as
  1478. * as per HW requirement.
  1479. */
  1480. usleep_range(5000, 5010);
  1481. ret = swr_get_logical_dev_num(pdev, pdev->addr, &devnum);
  1482. if (ret) {
  1483. dev_dbg(&pdev->dev,
  1484. "%s get devnum %d for dev addr %lx failed\n",
  1485. __func__, devnum, pdev->addr);
  1486. ret = -EPROBE_DEFER;
  1487. goto err_supply;
  1488. }
  1489. pdev->dev_num = devnum;
  1490. wsa883x->regmap = devm_regmap_init_swr(pdev,
  1491. &wsa883x_regmap_config);
  1492. if (IS_ERR(wsa883x->regmap)) {
  1493. ret = PTR_ERR(wsa883x->regmap);
  1494. dev_err(&pdev->dev, "%s: regmap_init failed %d\n",
  1495. __func__, ret);
  1496. goto dev_err;
  1497. }
  1498. devm_regmap_qti_debugfs_register(&pdev->dev, wsa883x->regmap);
  1499. /* Set all interrupts as edge triggered */
  1500. for (i = 0; i < wsa883x_sub_regmap_irq_chip->num_regs; i++)
  1501. regmap_write(wsa883x->regmap, (WSA883X_INTR_LEVEL0 + i), 0);
  1502. wsa883x_sub_regmap_irq_chip->irq_drv_data = wsa883x;
  1503. wsa883x->irq_info.wcd_regmap_irq_chip = wsa883x_sub_regmap_irq_chip;
  1504. wsa883x->irq_info.codec_name = "WSA883X";
  1505. wsa883x->irq_info.regmap = wsa883x->regmap;
  1506. wsa883x->irq_info.dev = &pdev->dev;
  1507. ret = wcd_irq_init(&wsa883x->irq_info, &wsa883x->virq);
  1508. if (ret) {
  1509. dev_err(wsa883x->dev, "%s: IRQ init failed: %d\n",
  1510. __func__, ret);
  1511. goto dev_err;
  1512. }
  1513. wsa883x->swr_slave->slave_irq = wsa883x->virq;
  1514. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_SAF2WAR,
  1515. "WSA SAF2WAR", wsa883x_saf2war_handle_irq, wsa883x);
  1516. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_SAF2WAR);
  1517. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_WAR2SAF,
  1518. "WSA WAR2SAF", wsa883x_war2saf_handle_irq, wsa883x);
  1519. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_WAR2SAF);
  1520. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_DISABLE,
  1521. "WSA OTP", wsa883x_otp_handle_irq, wsa883x);
  1522. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_DISABLE);
  1523. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_OCP,
  1524. "WSA OCP", wsa883x_ocp_handle_irq, wsa883x);
  1525. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_OCP);
  1526. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLIP,
  1527. "WSA CLIP", wsa883x_clip_handle_irq, wsa883x);
  1528. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLIP);
  1529. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PDM_WD,
  1530. "WSA PDM WD", wsa883x_pdm_wd_handle_irq, wsa883x);
  1531. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PDM_WD);
  1532. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLK_WD,
  1533. "WSA CLK WD", wsa883x_clk_wd_handle_irq, wsa883x);
  1534. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLK_WD);
  1535. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_INTR_PIN,
  1536. "WSA EXT INT", wsa883x_ext_int_handle_irq, wsa883x);
  1537. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_INTR_PIN);
  1538. /* Under Voltage Lock out (UVLO) interrupt handle */
  1539. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_UVLO,
  1540. "WSA UVLO", wsa883x_uvlo_handle_irq, wsa883x);
  1541. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_UVLO);
  1542. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PA_ON_ERR,
  1543. "WSA PA ERR", wsa883x_pa_on_err_handle_irq, wsa883x);
  1544. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PA_ON_ERR);
  1545. wsa883x->driver = devm_kzalloc(&pdev->dev,
  1546. sizeof(struct snd_soc_component_driver), GFP_KERNEL);
  1547. if (!wsa883x->driver) {
  1548. ret = -ENOMEM;
  1549. goto err_irq;
  1550. }
  1551. memcpy(wsa883x->driver, &soc_codec_dev_wsa883x_wsa,
  1552. sizeof(struct snd_soc_component_driver));
  1553. wsa883x->dai_driver = devm_kzalloc(&pdev->dev,
  1554. sizeof(struct snd_soc_dai_driver), GFP_KERNEL);
  1555. if (!wsa883x->dai_driver) {
  1556. ret = -ENOMEM;
  1557. goto err_mem;
  1558. }
  1559. memcpy(wsa883x->dai_driver, wsa_dai, sizeof(struct snd_soc_dai_driver));
  1560. /* Get last digit from HEX format */
  1561. dev_index = (int)((char)(pdev->addr & 0xF));
  1562. if (of_device_is_compatible(pdev->dev.of_node, "qcom,wsa883x_2"))
  1563. dev_index += 2;
  1564. snprintf(buffer, sizeof(buffer), "wsa-codec.%d", dev_index);
  1565. wsa883x->driver->name = kstrndup(buffer, strlen(buffer), GFP_KERNEL);
  1566. snprintf(buffer, sizeof(buffer), "wsa_rx%d", dev_index);
  1567. wsa883x->dai_driver->name =
  1568. kstrndup(buffer, strlen(buffer), GFP_KERNEL);
  1569. snprintf(buffer, sizeof(buffer), "WSA883X_AIF%d Playback", dev_index);
  1570. wsa883x->dai_driver->playback.stream_name =
  1571. kstrndup(buffer, strlen(buffer), GFP_KERNEL);
  1572. /* Number of DAI's used is 1 */
  1573. ret = snd_soc_register_component(&pdev->dev,
  1574. wsa883x->driver, wsa883x->dai_driver, 1);
  1575. component = snd_soc_lookup_component(&pdev->dev, wsa883x->driver->name);
  1576. if (!component) {
  1577. dev_err(&pdev->dev, "%s: component is NULL \n", __func__);
  1578. ret = -EINVAL;
  1579. goto err_mem;
  1580. }
  1581. wsa883x->parent_np = of_parse_phandle(pdev->dev.of_node,
  1582. "qcom,bolero-handle", 0);
  1583. if (!wsa883x->parent_np)
  1584. wsa883x->parent_np = of_parse_phandle(pdev->dev.of_node,
  1585. "qcom,lpass-cdc-handle", 0);
  1586. if (wsa883x->parent_np) {
  1587. wsa883x->parent_dev =
  1588. of_find_device_by_node(wsa883x->parent_np);
  1589. if (wsa883x->parent_dev) {
  1590. plat_data = dev_get_platdata(&wsa883x->parent_dev->dev);
  1591. if (plat_data) {
  1592. wsa883x->parent_nblock.notifier_call =
  1593. wsa883x_event_notify;
  1594. if (plat_data->register_notifier)
  1595. plat_data->register_notifier(
  1596. plat_data->handle,
  1597. &wsa883x->parent_nblock,
  1598. true);
  1599. wsa883x->register_notifier =
  1600. plat_data->register_notifier;
  1601. wsa883x->handle = plat_data->handle;
  1602. } else {
  1603. dev_err(&pdev->dev, "%s: plat data not found\n",
  1604. __func__);
  1605. }
  1606. } else {
  1607. dev_err(&pdev->dev, "%s: parent dev not found\n",
  1608. __func__);
  1609. }
  1610. } else {
  1611. dev_info(&pdev->dev, "%s: parent node not found\n", __func__);
  1612. }
  1613. mutex_init(&wsa883x->res_lock);
  1614. #ifdef CONFIG_DEBUG_FS
  1615. if (!wsa883x->debugfs_dent) {
  1616. wsa883x->debugfs_dent = debugfs_create_dir(
  1617. dev_name(&pdev->dev), 0);
  1618. if (!IS_ERR(wsa883x->debugfs_dent)) {
  1619. wsa883x->debugfs_peek =
  1620. debugfs_create_file("swrslave_peek",
  1621. S_IFREG | 0444,
  1622. wsa883x->debugfs_dent,
  1623. (void *) pdev,
  1624. &codec_debug_read_ops);
  1625. wsa883x->debugfs_poke =
  1626. debugfs_create_file("swrslave_poke",
  1627. S_IFREG | 0444,
  1628. wsa883x->debugfs_dent,
  1629. (void *) pdev,
  1630. &codec_debug_write_ops);
  1631. wsa883x->debugfs_reg_dump =
  1632. debugfs_create_file(
  1633. "swrslave_reg_dump",
  1634. S_IFREG | 0444,
  1635. wsa883x->debugfs_dent,
  1636. (void *) pdev,
  1637. &codec_debug_dump_ops);
  1638. }
  1639. }
  1640. #endif
  1641. return 0;
  1642. err_mem:
  1643. if (wsa883x->dai_driver) {
  1644. kfree(wsa883x->dai_driver->name);
  1645. kfree(wsa883x->dai_driver->playback.stream_name);
  1646. kfree(wsa883x->dai_driver);
  1647. }
  1648. if (wsa883x->driver) {
  1649. kfree(wsa883x->driver->name);
  1650. kfree(wsa883x->driver);
  1651. }
  1652. err_irq:
  1653. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_SAF2WAR, NULL);
  1654. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_WAR2SAF, NULL);
  1655. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_DISABLE, NULL);
  1656. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_OCP, NULL);
  1657. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLIP, NULL);
  1658. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PDM_WD, NULL);
  1659. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLK_WD, NULL);
  1660. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_INTR_PIN, NULL);
  1661. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_UVLO, NULL);
  1662. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PA_ON_ERR, NULL);
  1663. wcd_irq_exit(&wsa883x->irq_info, wsa883x->virq);
  1664. dev_err:
  1665. if (pin_state_current == false)
  1666. wsa883x_gpio_ctrl(wsa883x, false);
  1667. swr_remove_device(pdev);
  1668. err_supply:
  1669. msm_cdc_release_supplies(&pdev->dev, wsa883x->supplies,
  1670. wsa883x->regulator,
  1671. wsa883x->num_supplies);
  1672. err:
  1673. swr_set_dev_data(pdev, NULL);
  1674. return ret;
  1675. }
  1676. static int wsa883x_swr_remove(struct swr_device *pdev)
  1677. {
  1678. struct wsa883x_priv *wsa883x;
  1679. wsa883x = swr_get_dev_data(pdev);
  1680. if (!wsa883x) {
  1681. dev_err(&pdev->dev, "%s: wsa883x is NULL\n", __func__);
  1682. return -EINVAL;
  1683. }
  1684. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_SAF2WAR, NULL);
  1685. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_WAR2SAF, NULL);
  1686. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_DISABLE, NULL);
  1687. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_OCP, NULL);
  1688. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLIP, NULL);
  1689. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PDM_WD, NULL);
  1690. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLK_WD, NULL);
  1691. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_INTR_PIN, NULL);
  1692. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_UVLO, NULL);
  1693. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PA_ON_ERR, NULL);
  1694. if (wsa883x->register_notifier)
  1695. wsa883x->register_notifier(wsa883x->handle,
  1696. &wsa883x->parent_nblock, false);
  1697. #ifdef CONFIG_DEBUG_FS
  1698. debugfs_remove_recursive(wsa883x->debugfs_dent);
  1699. wsa883x->debugfs_dent = NULL;
  1700. #endif
  1701. mutex_destroy(&wsa883x->res_lock);
  1702. snd_soc_unregister_component(&pdev->dev);
  1703. if (wsa883x->dai_driver) {
  1704. kfree(wsa883x->dai_driver->name);
  1705. kfree(wsa883x->dai_driver->playback.stream_name);
  1706. kfree(wsa883x->dai_driver);
  1707. }
  1708. if (wsa883x->driver) {
  1709. kfree(wsa883x->driver->name);
  1710. kfree(wsa883x->driver);
  1711. }
  1712. msm_cdc_release_supplies(&pdev->dev, wsa883x->supplies,
  1713. wsa883x->regulator,
  1714. wsa883x->num_supplies);
  1715. swr_set_dev_data(pdev, NULL);
  1716. return 0;
  1717. }
  1718. #ifdef CONFIG_PM_SLEEP
  1719. static int wsa883x_swr_suspend(struct device *dev)
  1720. {
  1721. struct wsa883x_priv *wsa883x = swr_get_dev_data(to_swr_device(dev));
  1722. if (!wsa883x) {
  1723. dev_err(dev, "%s: wsa883x private data is NULL\n", __func__);
  1724. return -EINVAL;
  1725. }
  1726. dev_dbg(dev, "%s: system suspend\n", __func__);
  1727. if (wsa883x->dapm_bias_off ||
  1728. (wsa883x->component &&
  1729. (snd_soc_component_get_bias_level(wsa883x->component) ==
  1730. SND_SOC_BIAS_OFF))) {
  1731. msm_cdc_set_supplies_lpm_mode(dev, wsa883x->supplies,
  1732. wsa883x->regulator,
  1733. wsa883x->num_supplies,
  1734. true);
  1735. set_bit(WSA_SUPPLIES_LPM_MODE, &wsa883x->status_mask);
  1736. }
  1737. return 0;
  1738. }
  1739. static int wsa883x_swr_resume(struct device *dev)
  1740. {
  1741. struct wsa883x_priv *wsa883x = swr_get_dev_data(to_swr_device(dev));
  1742. if (!wsa883x) {
  1743. dev_err(dev, "%s: wsa883x private data is NULL\n", __func__);
  1744. return -EINVAL;
  1745. }
  1746. if (test_bit(WSA_SUPPLIES_LPM_MODE, &wsa883x->status_mask)) {
  1747. msm_cdc_set_supplies_lpm_mode(dev, wsa883x->supplies,
  1748. wsa883x->regulator,
  1749. wsa883x->num_supplies,
  1750. false);
  1751. clear_bit(WSA_SUPPLIES_LPM_MODE, &wsa883x->status_mask);
  1752. }
  1753. dev_dbg(dev, "%s: system resume\n", __func__);
  1754. return 0;
  1755. }
  1756. #endif /* CONFIG_PM_SLEEP */
  1757. static const struct dev_pm_ops wsa883x_swr_pm_ops = {
  1758. .suspend_late = wsa883x_swr_suspend,
  1759. .resume_early = wsa883x_swr_resume,
  1760. };
  1761. static const struct swr_device_id wsa883x_swr_id[] = {
  1762. {"wsa883x", 0},
  1763. {"wsa883x_2", 0},
  1764. {}
  1765. };
  1766. static const struct of_device_id wsa883x_swr_dt_match[] = {
  1767. {
  1768. .compatible = "qcom,wsa883x",
  1769. },
  1770. {
  1771. .compatible = "qcom,wsa883x_2",
  1772. },
  1773. {}
  1774. };
  1775. static struct swr_driver wsa883x_swr_driver = {
  1776. .driver = {
  1777. .name = "wsa883x",
  1778. .owner = THIS_MODULE,
  1779. .pm = &wsa883x_swr_pm_ops,
  1780. .of_match_table = wsa883x_swr_dt_match,
  1781. },
  1782. .probe = wsa883x_swr_probe,
  1783. .remove = wsa883x_swr_remove,
  1784. .id_table = wsa883x_swr_id,
  1785. };
  1786. static int __init wsa883x_swr_init(void)
  1787. {
  1788. return swr_driver_register(&wsa883x_swr_driver);
  1789. }
  1790. static void __exit wsa883x_swr_exit(void)
  1791. {
  1792. swr_driver_unregister(&wsa883x_swr_driver);
  1793. }
  1794. module_init(wsa883x_swr_init);
  1795. module_exit(wsa883x_swr_exit);
  1796. MODULE_DESCRIPTION("WSA883x codec driver");
  1797. MODULE_LICENSE("GPL v2");