rouleur.c 76 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/slab.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/device.h>
  9. #include <linux/delay.h>
  10. #include <linux/kernel.h>
  11. #include <linux/component.h>
  12. #include <linux/regmap.h>
  13. #include <linux/pm_runtime.h>
  14. #include <linux/of_platform.h>
  15. #include <sound/soc.h>
  16. #include <sound/tlv.h>
  17. #include <soc/soundwire.h>
  18. #include <sound/soc.h>
  19. #include <sound/soc-dapm.h>
  20. #include "internal.h"
  21. #include "rouleur.h"
  22. #include <asoc/wcdcal-hwdep.h>
  23. #include "rouleur-registers.h"
  24. #include "pm2250-spmi.h"
  25. #include <asoc/msm-cdc-pinctrl.h>
  26. #include <dt-bindings/sound/audio-codec-port-types.h>
  27. #include <asoc/msm-cdc-supply.h>
  28. #include <linux/power_supply.h>
  29. #include "asoc/bolero-slave-internal.h"
  30. #define DRV_NAME "rouleur_codec"
  31. #define NUM_SWRS_DT_PARAMS 5
  32. #define ROULEUR_VERSION_1_0 1
  33. #define ROULEUR_VERSION_ENTRY_SIZE 32
  34. #define NUM_ATTEMPTS 5
  35. #define SOC_THRESHOLD_LEVEL 25
  36. #define LOW_SOC_MBIAS_REG_MIN_VOLTAGE 2850000
  37. #define FOUNDRY_ID_SEC 0x5
  38. enum {
  39. CODEC_TX = 0,
  40. CODEC_RX,
  41. };
  42. enum {
  43. ALLOW_VPOS_DISABLE,
  44. HPH_COMP_DELAY,
  45. HPH_PA_DELAY,
  46. AMIC2_BCS_ENABLE,
  47. WCD_SUPPLIES_LPM_MODE,
  48. };
  49. /* TODO: Check on the step values */
  50. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  51. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  52. static int rouleur_handle_post_irq(void *data);
  53. static int rouleur_reset(struct device *dev, int val);
  54. static const struct regmap_irq ROULEUR_IRQs[ROULEUR_NUM_IRQS] = {
  55. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
  56. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
  57. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_ELECT_INS_REM_DET, 0, 0x04),
  58. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_ELECT_INS_REM_LEG_DET, 0, 0x08),
  59. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_SW_DET, 0, 0x10),
  60. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_OCP_INT, 0, 0x20),
  61. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_CNP_INT, 0, 0x40),
  62. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_OCP_INT, 0, 0x80),
  63. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_CNP_INT, 1, 0x01),
  64. REGMAP_IRQ_REG(ROULEUR_IRQ_EAR_CNP_INT, 1, 0x02),
  65. REGMAP_IRQ_REG(ROULEUR_IRQ_EAR_OCP_INT, 1, 0x04),
  66. REGMAP_IRQ_REG(ROULEUR_IRQ_LO_CNP_INT, 1, 0x08),
  67. REGMAP_IRQ_REG(ROULEUR_IRQ_LO_OCP_INT, 1, 0x10),
  68. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_PDM_WD_INT, 1, 0x20),
  69. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_PDM_WD_INT, 1, 0x40),
  70. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_SURGE_DET_INT, 2, 0x04),
  71. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
  72. };
  73. static struct regmap_irq_chip rouleur_regmap_irq_chip = {
  74. .name = "rouleur",
  75. .irqs = ROULEUR_IRQs,
  76. .num_irqs = ARRAY_SIZE(ROULEUR_IRQs),
  77. .num_regs = 3,
  78. .status_base = ROULEUR_DIG_SWR_INTR_STATUS_0,
  79. .mask_base = ROULEUR_DIG_SWR_INTR_MASK_0,
  80. .ack_base = ROULEUR_DIG_SWR_INTR_CLEAR_0,
  81. .use_ack = 1,
  82. .type_base = ROULEUR_DIG_SWR_INTR_LEVEL_0,
  83. .runtime_pm = false,
  84. .handle_post_irq = rouleur_handle_post_irq,
  85. .irq_drv_data = NULL,
  86. };
  87. static int rouleur_handle_post_irq(void *data)
  88. {
  89. struct rouleur_priv *rouleur = data;
  90. u32 status1 = 0, status2 = 0, status3 = 0;
  91. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_0, &status1);
  92. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_1, &status2);
  93. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_2, &status3);
  94. rouleur->tx_swr_dev->slave_irq_pending =
  95. ((status1 || status2 || status3) ? true : false);
  96. return IRQ_HANDLED;
  97. }
  98. static int rouleur_init_reg(struct snd_soc_component *component)
  99. {
  100. /* Disable HPH OCP */
  101. snd_soc_component_update_bits(component, ROULEUR_ANA_HPHPA_CNP_CTL_2,
  102. 0x03, 0x00);
  103. /* Enable surge protection */
  104. snd_soc_component_update_bits(component, ROULEUR_ANA_SURGE_EN,
  105. 0xC0, 0xC0);
  106. /* Disable mic bias pull down */
  107. snd_soc_component_update_bits(component, ROULEUR_ANA_MICBIAS_MICB_1_2_EN,
  108. 0x01, 0x00);
  109. return 0;
  110. }
  111. static int rouleur_set_port_params(struct snd_soc_component *component,
  112. u8 slv_prt_type, u8 *port_id, u8 *num_ch,
  113. u8 *ch_mask, u32 *ch_rate,
  114. u8 *port_type, u8 path)
  115. {
  116. int i, j;
  117. u8 num_ports = 0;
  118. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  119. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  120. switch (path) {
  121. case CODEC_RX:
  122. map = &rouleur->rx_port_mapping;
  123. num_ports = rouleur->num_rx_ports;
  124. break;
  125. case CODEC_TX:
  126. map = &rouleur->tx_port_mapping;
  127. num_ports = rouleur->num_tx_ports;
  128. break;
  129. default:
  130. dev_err(component->dev, "%s Invalid path: %d\n",
  131. __func__, path);
  132. return -EINVAL;
  133. }
  134. for (i = 0; i <= num_ports; i++) {
  135. for (j = 0; j < MAX_CH_PER_PORT; j++) {
  136. if ((*map)[i][j].slave_port_type == slv_prt_type)
  137. goto found;
  138. }
  139. }
  140. dev_err(component->dev, "%s Failed to find slave port for type %u\n",
  141. __func__, slv_prt_type);
  142. return -EINVAL;
  143. found:
  144. *port_id = i;
  145. *num_ch = (*map)[i][j].num_ch;
  146. *ch_mask = (*map)[i][j].ch_mask;
  147. *ch_rate = (*map)[i][j].ch_rate;
  148. *port_type = (*map)[i][j].master_port_type;
  149. return 0;
  150. }
  151. static int rouleur_parse_port_mapping(struct device *dev,
  152. char *prop, u8 path)
  153. {
  154. u32 *dt_array, map_size, map_length;
  155. u32 port_num = 0, ch_mask, ch_rate, old_port_num = 0;
  156. u32 slave_port_type, master_port_type;
  157. u32 i, ch_iter = 0;
  158. int ret = 0;
  159. u8 *num_ports = NULL;
  160. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  161. struct rouleur_priv *rouleur = dev_get_drvdata(dev);
  162. switch (path) {
  163. case CODEC_RX:
  164. map = &rouleur->rx_port_mapping;
  165. num_ports = &rouleur->num_rx_ports;
  166. break;
  167. case CODEC_TX:
  168. map = &rouleur->tx_port_mapping;
  169. num_ports = &rouleur->num_tx_ports;
  170. break;
  171. default:
  172. dev_err(dev, "%s Invalid path: %d\n",
  173. __func__, path);
  174. return -EINVAL;
  175. }
  176. if (!of_find_property(dev->of_node, prop,
  177. &map_size)) {
  178. dev_err(dev, "missing port mapping prop %s\n", prop);
  179. ret = -EINVAL;
  180. goto err;
  181. }
  182. map_length = map_size / (NUM_SWRS_DT_PARAMS * sizeof(u32));
  183. dt_array = kzalloc(map_size, GFP_KERNEL);
  184. if (!dt_array) {
  185. ret = -ENOMEM;
  186. goto err;
  187. }
  188. ret = of_property_read_u32_array(dev->of_node, prop, dt_array,
  189. NUM_SWRS_DT_PARAMS * map_length);
  190. if (ret) {
  191. dev_err(dev, "%s: Failed to read port mapping from prop %s\n",
  192. __func__, prop);
  193. ret = -EINVAL;
  194. goto err_pdata_fail;
  195. }
  196. for (i = 0; i < map_length; i++) {
  197. port_num = dt_array[NUM_SWRS_DT_PARAMS * i];
  198. slave_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 1];
  199. ch_mask = dt_array[NUM_SWRS_DT_PARAMS * i + 2];
  200. ch_rate = dt_array[NUM_SWRS_DT_PARAMS * i + 3];
  201. master_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 4];
  202. if (port_num != old_port_num)
  203. ch_iter = 0;
  204. (*map)[port_num][ch_iter].slave_port_type = slave_port_type;
  205. (*map)[port_num][ch_iter].ch_mask = ch_mask;
  206. (*map)[port_num][ch_iter].master_port_type = master_port_type;
  207. (*map)[port_num][ch_iter].num_ch = __sw_hweight8(ch_mask);
  208. (*map)[port_num][ch_iter++].ch_rate = ch_rate;
  209. old_port_num = port_num;
  210. }
  211. *num_ports = port_num;
  212. err_pdata_fail:
  213. kfree(dt_array);
  214. err:
  215. return ret;
  216. }
  217. static int rouleur_tx_connect_port(struct snd_soc_component *component,
  218. u8 slv_port_type, u8 enable)
  219. {
  220. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  221. u8 port_id;
  222. u8 num_ch;
  223. u8 ch_mask;
  224. u32 ch_rate;
  225. u8 port_type;
  226. u8 num_port = 1;
  227. int ret = 0;
  228. ret = rouleur_set_port_params(component, slv_port_type, &port_id,
  229. &num_ch, &ch_mask, &ch_rate,
  230. &port_type, CODEC_TX);
  231. if (ret) {
  232. dev_err(rouleur->dev, "%s:Failed to set port params: %d\n",
  233. __func__, ret);
  234. return ret;
  235. }
  236. if (enable)
  237. ret = swr_connect_port(rouleur->tx_swr_dev, &port_id,
  238. num_port, &ch_mask, &ch_rate,
  239. &num_ch, &port_type);
  240. else
  241. ret = swr_disconnect_port(rouleur->tx_swr_dev, &port_id,
  242. num_port, &ch_mask, &port_type);
  243. return ret;
  244. }
  245. static int rouleur_rx_connect_port(struct snd_soc_component *component,
  246. u8 slv_port_type, u8 enable)
  247. {
  248. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  249. u8 port_id;
  250. u8 num_ch;
  251. u8 ch_mask;
  252. u32 ch_rate;
  253. u8 port_type;
  254. u8 num_port = 1;
  255. int ret = 0;
  256. ret = rouleur_set_port_params(component, slv_port_type, &port_id,
  257. &num_ch, &ch_mask, &ch_rate,
  258. &port_type, CODEC_RX);
  259. if (ret) {
  260. dev_err(rouleur->dev, "%s:Failed to set port params: %d\n",
  261. __func__, ret);
  262. return ret;
  263. }
  264. if (enable)
  265. ret = swr_connect_port(rouleur->rx_swr_dev, &port_id,
  266. num_port, &ch_mask, &ch_rate,
  267. &num_ch, &port_type);
  268. else
  269. ret = swr_disconnect_port(rouleur->rx_swr_dev, &port_id,
  270. num_port, &ch_mask, &port_type);
  271. return ret;
  272. }
  273. int rouleur_global_mbias_enable(struct snd_soc_component *component)
  274. {
  275. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  276. mutex_lock(&rouleur->main_bias_lock);
  277. if (rouleur->mbias_cnt == 0) {
  278. snd_soc_component_update_bits(component,
  279. ROULEUR_ANA_MBIAS_EN, 0x20, 0x20);
  280. snd_soc_component_update_bits(component,
  281. ROULEUR_ANA_MBIAS_EN, 0x10, 0x10);
  282. usleep_range(1000, 1100);
  283. }
  284. rouleur->mbias_cnt++;
  285. mutex_unlock(&rouleur->main_bias_lock);
  286. return 0;
  287. }
  288. int rouleur_global_mbias_disable(struct snd_soc_component *component)
  289. {
  290. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  291. mutex_lock(&rouleur->main_bias_lock);
  292. if (rouleur->mbias_cnt == 0) {
  293. dev_dbg(rouleur->dev, "%s:mbias already disabled\n", __func__);
  294. mutex_unlock(&rouleur->main_bias_lock);
  295. return 0;
  296. }
  297. rouleur->mbias_cnt--;
  298. if (rouleur->mbias_cnt == 0) {
  299. snd_soc_component_update_bits(component,
  300. ROULEUR_ANA_MBIAS_EN, 0x10, 0x00);
  301. snd_soc_component_update_bits(component,
  302. ROULEUR_ANA_MBIAS_EN, 0x20, 0x00);
  303. }
  304. mutex_unlock(&rouleur->main_bias_lock);
  305. return 0;
  306. }
  307. static int rouleur_rx_clk_enable(struct snd_soc_component *component)
  308. {
  309. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  310. mutex_lock(&rouleur->rx_clk_lock);
  311. if (rouleur->rx_clk_cnt == 0) {
  312. snd_soc_component_update_bits(component,
  313. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x10, 0x10);
  314. snd_soc_component_update_bits(component,
  315. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x20, 0x20);
  316. usleep_range(5000, 5100);
  317. rouleur_global_mbias_enable(component);
  318. snd_soc_component_update_bits(component,
  319. ROULEUR_ANA_HPHPA_FSM_CLK, 0x7F, 0x11);
  320. snd_soc_component_update_bits(component,
  321. ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x80);
  322. snd_soc_component_update_bits(component,
  323. ROULEUR_ANA_NCP_VCTRL, 0x07, 0x06);
  324. snd_soc_component_update_bits(component,
  325. ROULEUR_ANA_NCP_EN, 0x01, 0x01);
  326. usleep_range(500, 510);
  327. }
  328. rouleur->rx_clk_cnt++;
  329. mutex_unlock(&rouleur->rx_clk_lock);
  330. return 0;
  331. }
  332. static int rouleur_rx_clk_disable(struct snd_soc_component *component)
  333. {
  334. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  335. mutex_lock(&rouleur->rx_clk_lock);
  336. if (rouleur->rx_clk_cnt == 0) {
  337. dev_dbg(rouleur->dev, "%s:clk already disabled\n", __func__);
  338. mutex_unlock(&rouleur->rx_clk_lock);
  339. return 0;
  340. }
  341. rouleur->rx_clk_cnt--;
  342. if (rouleur->rx_clk_cnt == 0) {
  343. snd_soc_component_update_bits(component,
  344. ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x00);
  345. snd_soc_component_update_bits(component,
  346. ROULEUR_ANA_HPHPA_FSM_CLK, 0x7F, 0x00);
  347. snd_soc_component_update_bits(component,
  348. ROULEUR_ANA_NCP_EN, 0x01, 0x00);
  349. snd_soc_component_update_bits(component,
  350. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x20, 0x00);
  351. snd_soc_component_update_bits(component,
  352. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x10, 0x00);
  353. rouleur_global_mbias_disable(component);
  354. }
  355. mutex_unlock(&rouleur->rx_clk_lock);
  356. return 0;
  357. }
  358. /*
  359. * rouleur_soc_get_mbhc: get rouleur_mbhc handle of corresponding component
  360. * @component: handle to snd_soc_component *
  361. *
  362. * return rouleur_mbhc handle or error code in case of failure
  363. */
  364. struct rouleur_mbhc *rouleur_soc_get_mbhc(struct snd_soc_component *component)
  365. {
  366. struct rouleur_priv *rouleur;
  367. if (!component) {
  368. pr_err("%s: Invalid params, NULL component\n", __func__);
  369. return NULL;
  370. }
  371. rouleur = snd_soc_component_get_drvdata(component);
  372. if (!rouleur) {
  373. pr_err("%s: Invalid params, NULL tavil\n", __func__);
  374. return NULL;
  375. }
  376. return rouleur->mbhc;
  377. }
  378. EXPORT_SYMBOL(rouleur_soc_get_mbhc);
  379. static int rouleur_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
  380. struct snd_kcontrol *kcontrol,
  381. int event)
  382. {
  383. struct snd_soc_component *component =
  384. snd_soc_dapm_to_component(w->dapm);
  385. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  386. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  387. w->name, event);
  388. switch (event) {
  389. case SND_SOC_DAPM_PRE_PMU:
  390. rouleur_rx_clk_enable(component);
  391. snd_soc_component_update_bits(component,
  392. ROULEUR_ANA_HPHPA_CNP_CTL_1,
  393. 0x02, 0x02);
  394. snd_soc_component_update_bits(component,
  395. ROULEUR_SWR_HPHPA_HD2,
  396. 0x38, 0x38);
  397. set_bit(HPH_COMP_DELAY, &rouleur->status_mask);
  398. break;
  399. case SND_SOC_DAPM_POST_PMU:
  400. if (rouleur->comp1_enable) {
  401. snd_soc_component_update_bits(component,
  402. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  403. 0x02, 0x02);
  404. if (rouleur->comp2_enable)
  405. snd_soc_component_update_bits(component,
  406. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  407. 0x01, 0x01);
  408. /*
  409. * 5ms sleep is required after COMP is enabled as per
  410. * HW requirement
  411. */
  412. if (test_bit(HPH_COMP_DELAY, &rouleur->status_mask)) {
  413. usleep_range(5000, 5100);
  414. clear_bit(HPH_COMP_DELAY,
  415. &rouleur->status_mask);
  416. }
  417. } else {
  418. snd_soc_component_update_bits(component,
  419. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  420. 0x02, 0x00);
  421. }
  422. snd_soc_component_update_bits(component,
  423. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  424. 0x80, 0x00);
  425. snd_soc_component_update_bits(component,
  426. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  427. 0x04, 0x04);
  428. snd_soc_component_update_bits(component,
  429. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x01, 0x01);
  430. break;
  431. case SND_SOC_DAPM_POST_PMD:
  432. snd_soc_component_update_bits(component,
  433. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  434. 0x01, 0x00);
  435. snd_soc_component_update_bits(component,
  436. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  437. 0x04, 0x00);
  438. snd_soc_component_update_bits(component,
  439. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  440. 0x80, 0x80);
  441. if (rouleur->comp1_enable)
  442. snd_soc_component_update_bits(component,
  443. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  444. 0x02, 0x00);
  445. break;
  446. }
  447. return 0;
  448. }
  449. static int rouleur_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
  450. struct snd_kcontrol *kcontrol,
  451. int event)
  452. {
  453. struct snd_soc_component *component =
  454. snd_soc_dapm_to_component(w->dapm);
  455. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  456. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  457. w->name, event);
  458. switch (event) {
  459. case SND_SOC_DAPM_PRE_PMU:
  460. rouleur_rx_clk_enable(component);
  461. snd_soc_component_update_bits(component,
  462. ROULEUR_ANA_HPHPA_CNP_CTL_1,
  463. 0x02, 0x02);
  464. snd_soc_component_update_bits(component,
  465. ROULEUR_SWR_HPHPA_HD2,
  466. 0x07, 0x07);
  467. set_bit(HPH_COMP_DELAY, &rouleur->status_mask);
  468. break;
  469. case SND_SOC_DAPM_POST_PMU:
  470. if (rouleur->comp2_enable) {
  471. snd_soc_component_update_bits(component,
  472. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  473. 0x01, 0x01);
  474. if (rouleur->comp1_enable)
  475. snd_soc_component_update_bits(component,
  476. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  477. 0x02, 0x02);
  478. /*
  479. * 5ms sleep is required after COMP is enabled as per
  480. * HW requirement
  481. */
  482. if (test_bit(HPH_COMP_DELAY, &rouleur->status_mask)) {
  483. usleep_range(5000, 5100);
  484. clear_bit(HPH_COMP_DELAY,
  485. &rouleur->status_mask);
  486. }
  487. } else {
  488. snd_soc_component_update_bits(component,
  489. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  490. 0x01, 0x00);
  491. }
  492. snd_soc_component_update_bits(component,
  493. ROULEUR_DIG_SWR_CDC_RX1_CTL,
  494. 0x80, 0x00);
  495. snd_soc_component_update_bits(component,
  496. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  497. 0x08, 0x08);
  498. snd_soc_component_update_bits(component,
  499. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x02, 0x02);
  500. break;
  501. case SND_SOC_DAPM_POST_PMD:
  502. snd_soc_component_update_bits(component,
  503. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x02, 0x00);
  504. snd_soc_component_update_bits(component,
  505. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  506. 0x08, 0x00);
  507. snd_soc_component_update_bits(component,
  508. ROULEUR_DIG_SWR_CDC_RX1_CTL,
  509. 0x80, 0x80);
  510. if (rouleur->comp2_enable)
  511. snd_soc_component_update_bits(component,
  512. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  513. 0x01, 0x00);
  514. break;
  515. }
  516. return 0;
  517. }
  518. static int rouleur_codec_ear_lo_dac_event(struct snd_soc_dapm_widget *w,
  519. struct snd_kcontrol *kcontrol,
  520. int event)
  521. {
  522. struct snd_soc_component *component =
  523. snd_soc_dapm_to_component(w->dapm);
  524. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  525. w->name, event);
  526. switch (event) {
  527. case SND_SOC_DAPM_PRE_PMU:
  528. rouleur_rx_clk_enable(component);
  529. snd_soc_component_update_bits(component,
  530. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  531. 0x80, 0x00);
  532. snd_soc_component_update_bits(component,
  533. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  534. 0x01, 0x01);
  535. snd_soc_component_update_bits(component,
  536. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  537. 0x04, 0x04);
  538. break;
  539. case SND_SOC_DAPM_POST_PMD:
  540. snd_soc_component_update_bits(component,
  541. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  542. 0x01, 0x00);
  543. snd_soc_component_update_bits(component,
  544. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  545. 0x04, 0x00);
  546. snd_soc_component_update_bits(component,
  547. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  548. 0x80, 0x80);
  549. break;
  550. };
  551. return 0;
  552. }
  553. static int rouleur_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
  554. struct snd_kcontrol *kcontrol,
  555. int event)
  556. {
  557. struct snd_soc_component *component =
  558. snd_soc_dapm_to_component(w->dapm);
  559. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  560. int ret = 0;
  561. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  562. w->name, event);
  563. switch (event) {
  564. case SND_SOC_DAPM_PRE_PMU:
  565. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  566. rouleur->rx_swr_dev->dev_num,
  567. true);
  568. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  569. usleep_range(200, 210);
  570. /* Enable HD2 Config for HPHR if foundry id is SEC */
  571. if (rouleur->foundry_id == FOUNDRY_ID_SEC)
  572. rouleur->update_wcd_event(rouleur->handle,
  573. SLV_BOLERO_EVT_HPHR_HD2_ENABLE,
  574. 0x04);
  575. snd_soc_component_update_bits(component,
  576. ROULEUR_DIG_SWR_PDM_WD_CTL1,
  577. 0x03, 0x03);
  578. break;
  579. case SND_SOC_DAPM_POST_PMU:
  580. /*
  581. * 5ms sleep is required after PA is enabled as per
  582. * HW requirement.
  583. */
  584. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  585. usleep_range(5000, 5100);
  586. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  587. }
  588. if (rouleur->update_wcd_event)
  589. rouleur->update_wcd_event(rouleur->handle,
  590. SLV_BOLERO_EVT_RX_MUTE,
  591. (WCD_RX2 << 0x10));
  592. wcd_enable_irq(&rouleur->irq_info,
  593. ROULEUR_IRQ_HPHR_PDM_WD_INT);
  594. break;
  595. case SND_SOC_DAPM_PRE_PMD:
  596. wcd_disable_irq(&rouleur->irq_info,
  597. ROULEUR_IRQ_HPHR_PDM_WD_INT);
  598. if (rouleur->update_wcd_event)
  599. rouleur->update_wcd_event(rouleur->handle,
  600. SLV_BOLERO_EVT_RX_MUTE,
  601. (WCD_RX2 << 0x10 | 0x1));
  602. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  603. WCD_EVENT_PRE_HPHR_PA_OFF,
  604. &rouleur->mbhc->wcd_mbhc);
  605. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  606. break;
  607. case SND_SOC_DAPM_POST_PMD:
  608. /*
  609. * 5ms sleep is required after PA is disabled as per
  610. * HW requirement.
  611. */
  612. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  613. usleep_range(5000, 5100);
  614. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  615. }
  616. if (rouleur->foundry_id == FOUNDRY_ID_SEC)
  617. rouleur->update_wcd_event(rouleur->handle,
  618. SLV_BOLERO_EVT_HPHR_HD2_ENABLE,
  619. 0x00);
  620. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  621. WCD_EVENT_POST_HPHR_PA_OFF,
  622. &rouleur->mbhc->wcd_mbhc);
  623. snd_soc_component_update_bits(component,
  624. ROULEUR_DIG_SWR_PDM_WD_CTL1,
  625. 0x03, 0x00);
  626. break;
  627. };
  628. return ret;
  629. }
  630. static int rouleur_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
  631. struct snd_kcontrol *kcontrol,
  632. int event)
  633. {
  634. struct snd_soc_component *component =
  635. snd_soc_dapm_to_component(w->dapm);
  636. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  637. int ret = 0;
  638. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  639. w->name, event);
  640. switch (event) {
  641. case SND_SOC_DAPM_PRE_PMU:
  642. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  643. rouleur->rx_swr_dev->dev_num,
  644. true);
  645. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  646. usleep_range(200, 210);
  647. if (rouleur->foundry_id == FOUNDRY_ID_SEC)
  648. rouleur->update_wcd_event(rouleur->handle,
  649. SLV_BOLERO_EVT_HPHL_HD2_ENABLE,
  650. 0x04);
  651. snd_soc_component_update_bits(component,
  652. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  653. 0x03, 0x03);
  654. break;
  655. case SND_SOC_DAPM_POST_PMU:
  656. /*
  657. * 5ms sleep is required after PA is enabled as per
  658. * HW requirement.
  659. */
  660. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  661. usleep_range(5000, 5100);
  662. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  663. }
  664. if (rouleur->update_wcd_event)
  665. rouleur->update_wcd_event(rouleur->handle,
  666. SLV_BOLERO_EVT_RX_MUTE,
  667. (WCD_RX1 << 0x10));
  668. wcd_enable_irq(&rouleur->irq_info,
  669. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  670. break;
  671. case SND_SOC_DAPM_PRE_PMD:
  672. wcd_disable_irq(&rouleur->irq_info,
  673. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  674. if (rouleur->update_wcd_event)
  675. rouleur->update_wcd_event(rouleur->handle,
  676. SLV_BOLERO_EVT_RX_MUTE,
  677. (WCD_RX1 << 0x10 | 0x1));
  678. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  679. WCD_EVENT_PRE_HPHL_PA_OFF,
  680. &rouleur->mbhc->wcd_mbhc);
  681. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  682. break;
  683. case SND_SOC_DAPM_POST_PMD:
  684. /*
  685. * 5ms sleep is required after PA is disabled as per
  686. * HW requirement.
  687. */
  688. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  689. usleep_range(5000, 5100);
  690. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  691. }
  692. if (rouleur->foundry_id == FOUNDRY_ID_SEC)
  693. rouleur->update_wcd_event(rouleur->handle,
  694. SLV_BOLERO_EVT_HPHL_HD2_ENABLE,
  695. 0x00);
  696. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  697. WCD_EVENT_POST_HPHL_PA_OFF,
  698. &rouleur->mbhc->wcd_mbhc);
  699. snd_soc_component_update_bits(component,
  700. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  701. 0x03, 0x00);
  702. break;
  703. };
  704. return ret;
  705. }
  706. static int rouleur_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
  707. struct snd_kcontrol *kcontrol,
  708. int event)
  709. {
  710. struct snd_soc_component *component =
  711. snd_soc_dapm_to_component(w->dapm);
  712. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  713. int ret = 0;
  714. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  715. w->name, event);
  716. switch (event) {
  717. case SND_SOC_DAPM_PRE_PMU:
  718. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  719. rouleur->rx_swr_dev->dev_num,
  720. true);
  721. snd_soc_component_update_bits(component,
  722. ROULEUR_ANA_COMBOPA_CTL_5,
  723. 0x04, 0x00);
  724. usleep_range(1000, 1010);
  725. snd_soc_component_update_bits(component,
  726. ROULEUR_ANA_COMBOPA_CTL_4,
  727. 0x0F, 0x0F);
  728. usleep_range(1000, 1010);
  729. snd_soc_component_update_bits(component,
  730. ROULEUR_ANA_COMBOPA_CTL,
  731. 0x40, 0x00);
  732. if (rouleur->foundry_id == FOUNDRY_ID_SEC)
  733. rouleur->update_wcd_event(rouleur->handle,
  734. SLV_BOLERO_EVT_HPHL_HD2_ENABLE,
  735. 0x04);
  736. snd_soc_component_update_bits(component,
  737. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  738. 0x03, 0x03);
  739. break;
  740. case SND_SOC_DAPM_POST_PMU:
  741. usleep_range(5000, 5100);
  742. snd_soc_component_update_bits(component,
  743. ROULEUR_ANA_COMBOPA_CTL_4,
  744. 0x0F, 0x04);
  745. if (rouleur->update_wcd_event)
  746. rouleur->update_wcd_event(rouleur->handle,
  747. SLV_BOLERO_EVT_RX_MUTE,
  748. (WCD_RX1 << 0x10));
  749. wcd_enable_irq(&rouleur->irq_info,
  750. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  751. break;
  752. case SND_SOC_DAPM_PRE_PMD:
  753. wcd_disable_irq(&rouleur->irq_info,
  754. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  755. if (rouleur->update_wcd_event)
  756. rouleur->update_wcd_event(rouleur->handle,
  757. SLV_BOLERO_EVT_RX_MUTE,
  758. (WCD_RX1 << 0x10 | 0x1));
  759. break;
  760. case SND_SOC_DAPM_POST_PMD:
  761. usleep_range(5000, 5100);
  762. if (rouleur->foundry_id == FOUNDRY_ID_SEC)
  763. rouleur->update_wcd_event(rouleur->handle,
  764. SLV_BOLERO_EVT_HPHL_HD2_ENABLE,
  765. 0x00);
  766. snd_soc_component_update_bits(component,
  767. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  768. 0x03, 0x00);
  769. };
  770. return ret;
  771. }
  772. static int rouleur_codec_enable_lo_pa(struct snd_soc_dapm_widget *w,
  773. struct snd_kcontrol *kcontrol,
  774. int event)
  775. {
  776. struct snd_soc_component *component =
  777. snd_soc_dapm_to_component(w->dapm);
  778. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  779. int ret = 0;
  780. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  781. w->name, event);
  782. switch (event) {
  783. case SND_SOC_DAPM_PRE_PMU:
  784. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  785. rouleur->rx_swr_dev->dev_num,
  786. true);
  787. snd_soc_component_update_bits(component,
  788. ROULEUR_ANA_COMBOPA_CTL_5,
  789. 0x04, 0x00);
  790. usleep_range(1000, 1010);
  791. snd_soc_component_update_bits(component,
  792. ROULEUR_ANA_COMBOPA_CTL_4,
  793. 0x0F, 0x0F);
  794. usleep_range(1000, 1010);
  795. snd_soc_component_update_bits(component,
  796. ROULEUR_ANA_COMBOPA_CTL,
  797. 0x40, 0x40);
  798. snd_soc_component_update_bits(component,
  799. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  800. 0x03, 0x03);
  801. break;
  802. case SND_SOC_DAPM_POST_PMU:
  803. usleep_range(5000, 5100);
  804. snd_soc_component_update_bits(component,
  805. ROULEUR_ANA_COMBOPA_CTL_4,
  806. 0x0F, 0x04);
  807. if (rouleur->update_wcd_event)
  808. rouleur->update_wcd_event(rouleur->handle,
  809. SLV_BOLERO_EVT_RX_MUTE,
  810. (WCD_RX1 << 0x10));
  811. wcd_enable_irq(&rouleur->irq_info,
  812. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  813. break;
  814. case SND_SOC_DAPM_PRE_PMD:
  815. wcd_disable_irq(&rouleur->irq_info,
  816. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  817. if (rouleur->update_wcd_event)
  818. rouleur->update_wcd_event(rouleur->handle,
  819. SLV_BOLERO_EVT_RX_MUTE,
  820. (WCD_RX1 << 0x10 | 0x1));
  821. break;
  822. case SND_SOC_DAPM_POST_PMD:
  823. snd_soc_component_update_bits(component,
  824. ROULEUR_ANA_COMBOPA_CTL,
  825. 0x40, 0x00);
  826. usleep_range(5000, 5100);
  827. snd_soc_component_update_bits(component,
  828. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  829. 0x03, 0x00);
  830. };
  831. return ret;
  832. }
  833. static int rouleur_enable_rx1(struct snd_soc_dapm_widget *w,
  834. struct snd_kcontrol *kcontrol,
  835. int event)
  836. {
  837. struct snd_soc_component *component =
  838. snd_soc_dapm_to_component(w->dapm);
  839. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  840. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  841. w->name, event);
  842. switch (event) {
  843. case SND_SOC_DAPM_PRE_PMU:
  844. rouleur_rx_connect_port(component, HPH_L, true);
  845. if (rouleur->comp1_enable)
  846. rouleur_rx_connect_port(component, COMP_L, true);
  847. break;
  848. case SND_SOC_DAPM_POST_PMD:
  849. rouleur_rx_connect_port(component, HPH_L, false);
  850. if (rouleur->comp1_enable)
  851. rouleur_rx_connect_port(component, COMP_L, false);
  852. rouleur_rx_clk_disable(component);
  853. break;
  854. };
  855. return 0;
  856. }
  857. static int rouleur_enable_rx2(struct snd_soc_dapm_widget *w,
  858. struct snd_kcontrol *kcontrol, int event)
  859. {
  860. struct snd_soc_component *component =
  861. snd_soc_dapm_to_component(w->dapm);
  862. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  863. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  864. w->name, event);
  865. switch (event) {
  866. case SND_SOC_DAPM_PRE_PMU:
  867. rouleur_rx_connect_port(component, HPH_R, true);
  868. if (rouleur->comp2_enable)
  869. rouleur_rx_connect_port(component, COMP_R, true);
  870. break;
  871. case SND_SOC_DAPM_POST_PMD:
  872. rouleur_rx_connect_port(component, HPH_R, false);
  873. if (rouleur->comp2_enable)
  874. rouleur_rx_connect_port(component, COMP_R, false);
  875. rouleur_rx_clk_disable(component);
  876. break;
  877. };
  878. return 0;
  879. }
  880. static int rouleur_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  881. struct snd_kcontrol *kcontrol,
  882. int event)
  883. {
  884. struct snd_soc_component *component =
  885. snd_soc_dapm_to_component(w->dapm);
  886. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  887. u16 dmic_clk_reg;
  888. s32 *dmic_clk_cnt;
  889. unsigned int dmic;
  890. char *wname;
  891. int ret = 0;
  892. wname = strpbrk(w->name, "01");
  893. if (!wname) {
  894. dev_err(component->dev, "%s: widget not found\n", __func__);
  895. return -EINVAL;
  896. }
  897. ret = kstrtouint(wname, 10, &dmic);
  898. if (ret < 0) {
  899. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  900. __func__);
  901. return -EINVAL;
  902. }
  903. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  904. w->name, event);
  905. switch (dmic) {
  906. case 0:
  907. case 1:
  908. dmic_clk_cnt = &(rouleur->dmic_0_1_clk_cnt);
  909. dmic_clk_reg = ROULEUR_DIG_SWR_CDC_DMIC1_CTL;
  910. break;
  911. default:
  912. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  913. __func__);
  914. return -EINVAL;
  915. };
  916. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_clk_cnt %d\n",
  917. __func__, event, dmic, *dmic_clk_cnt);
  918. switch (event) {
  919. case SND_SOC_DAPM_PRE_PMU:
  920. snd_soc_component_update_bits(component,
  921. ROULEUR_DIG_SWR_CDC_AMIC_CTL, 0x02, 0x00);
  922. snd_soc_component_update_bits(component,
  923. dmic_clk_reg, 0x08, 0x08);
  924. rouleur_tx_connect_port(component, DMIC0 + (w->shift), true);
  925. break;
  926. case SND_SOC_DAPM_POST_PMD:
  927. rouleur_tx_connect_port(component, DMIC0 + (w->shift), false);
  928. snd_soc_component_update_bits(component,
  929. dmic_clk_reg, 0x08, 0x00);
  930. snd_soc_component_update_bits(component,
  931. ROULEUR_DIG_SWR_CDC_AMIC_CTL, 0x02, 0x02);
  932. break;
  933. };
  934. return 0;
  935. }
  936. static int rouleur_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
  937. struct snd_kcontrol *kcontrol,
  938. int event)
  939. {
  940. struct snd_soc_component *component =
  941. snd_soc_dapm_to_component(w->dapm);
  942. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  943. int ret = 0;
  944. switch (event) {
  945. case SND_SOC_DAPM_PRE_PMU:
  946. ret = swr_slvdev_datapath_control(rouleur->tx_swr_dev,
  947. rouleur->tx_swr_dev->dev_num,
  948. true);
  949. break;
  950. case SND_SOC_DAPM_POST_PMD:
  951. ret = swr_slvdev_datapath_control(rouleur->tx_swr_dev,
  952. rouleur->tx_swr_dev->dev_num,
  953. false);
  954. break;
  955. };
  956. return ret;
  957. }
  958. static int rouleur_codec_enable_adc(struct snd_soc_dapm_widget *w,
  959. struct snd_kcontrol *kcontrol,
  960. int event)
  961. {
  962. struct snd_soc_component *component =
  963. snd_soc_dapm_to_component(w->dapm);
  964. struct rouleur_priv *rouleur =
  965. snd_soc_component_get_drvdata(component);
  966. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  967. w->name, event);
  968. switch (event) {
  969. case SND_SOC_DAPM_PRE_PMU:
  970. /* Enable BCS for Headset mic */
  971. if (w->shift == 1 && !(snd_soc_component_read32(component,
  972. ROULEUR_ANA_TX_AMIC2) & 0x10)) {
  973. rouleur_tx_connect_port(component, MBHC, true);
  974. set_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask);
  975. }
  976. rouleur_tx_connect_port(component, ADC1 + (w->shift), true);
  977. rouleur_global_mbias_enable(component);
  978. if (w->shift)
  979. snd_soc_component_update_bits(component,
  980. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  981. 0x30, 0x30);
  982. else
  983. snd_soc_component_update_bits(component,
  984. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  985. 0x03, 0x03);
  986. break;
  987. case SND_SOC_DAPM_POST_PMD:
  988. rouleur_tx_connect_port(component, ADC1 + (w->shift), false);
  989. if (w->shift == 1 &&
  990. test_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask)) {
  991. rouleur_tx_connect_port(component, MBHC, false);
  992. clear_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask);
  993. }
  994. if (w->shift)
  995. snd_soc_component_update_bits(component,
  996. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  997. 0x30, 0x00);
  998. else
  999. snd_soc_component_update_bits(component,
  1000. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  1001. 0x03, 0x00);
  1002. rouleur_global_mbias_disable(component);
  1003. break;
  1004. };
  1005. return 0;
  1006. }
  1007. /*
  1008. * rouleur_get_micb_vout_ctl_val: converts micbias from volts to register value
  1009. * @micb_mv: micbias in mv
  1010. *
  1011. * return register value converted
  1012. */
  1013. int rouleur_get_micb_vout_ctl_val(u32 micb_mv)
  1014. {
  1015. /* min micbias voltage is 1.6V and maximum is 2.85V */
  1016. if (micb_mv < 1600 || micb_mv > 2850) {
  1017. pr_err("%s: unsupported micbias voltage\n", __func__);
  1018. return -EINVAL;
  1019. }
  1020. return (micb_mv - 1600) / 50;
  1021. }
  1022. EXPORT_SYMBOL(rouleur_get_micb_vout_ctl_val);
  1023. /*
  1024. * rouleur_mbhc_micb_adjust_voltage: adjust specific micbias voltage
  1025. * @component: handle to snd_soc_component *
  1026. * @req_volt: micbias voltage to be set
  1027. * @micb_num: micbias to be set, e.g. micbias1 or micbias2
  1028. *
  1029. * return 0 if adjustment is success or error code in case of failure
  1030. */
  1031. int rouleur_mbhc_micb_adjust_voltage(struct snd_soc_component *component,
  1032. int req_volt, int micb_num)
  1033. {
  1034. struct rouleur_priv *rouleur =
  1035. snd_soc_component_get_drvdata(component);
  1036. int cur_vout_ctl, req_vout_ctl;
  1037. int micb_reg, micb_val, micb_en;
  1038. int ret = 0;
  1039. int pullup_mask;
  1040. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1041. switch (micb_num) {
  1042. case MIC_BIAS_1:
  1043. micb_val = snd_soc_component_read32(component, micb_reg);
  1044. micb_en = (micb_val & 0x40) >> 6;
  1045. pullup_mask = 0x20;
  1046. break;
  1047. case MIC_BIAS_2:
  1048. micb_val = snd_soc_component_read32(component, micb_reg);
  1049. micb_en = (micb_val & 0x04) >> 2;
  1050. pullup_mask = 0x02;
  1051. break;
  1052. case MIC_BIAS_3:
  1053. default:
  1054. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  1055. __func__, micb_num);
  1056. return -EINVAL;
  1057. }
  1058. mutex_lock(&rouleur->micb_lock);
  1059. /*
  1060. * If requested micbias voltage is same as current micbias
  1061. * voltage, then just return. Otherwise, adjust voltage as
  1062. * per requested value. If micbias is already enabled, then
  1063. * to avoid slow micbias ramp-up or down enable pull-up
  1064. * momentarily, change the micbias value and then re-enable
  1065. * micbias.
  1066. */
  1067. cur_vout_ctl = (snd_soc_component_read32(component,
  1068. ROULEUR_ANA_MICBIAS_LDO_1_SETTING)) & 0xF8;
  1069. cur_vout_ctl = cur_vout_ctl >> 3;
  1070. req_vout_ctl = rouleur_get_micb_vout_ctl_val(req_volt);
  1071. if (req_vout_ctl < 0) {
  1072. ret = -EINVAL;
  1073. goto exit;
  1074. }
  1075. if (cur_vout_ctl == req_vout_ctl) {
  1076. ret = 0;
  1077. goto exit;
  1078. }
  1079. dev_dbg(component->dev, "%s: micb_num: %d, cur_mv: %d, req_mv: %d, micb_en: %d\n",
  1080. __func__, micb_num, WCD_VOUT_CTL_TO_MICB(cur_vout_ctl),
  1081. req_volt, micb_en);
  1082. if (micb_en == 0x1)
  1083. snd_soc_component_update_bits(component, micb_reg, pullup_mask,
  1084. pullup_mask);
  1085. snd_soc_component_update_bits(component,
  1086. ROULEUR_ANA_MICBIAS_LDO_1_SETTING, 0xF8, req_vout_ctl << 3);
  1087. if (micb_en == 0x1) {
  1088. snd_soc_component_update_bits(component, micb_reg,
  1089. pullup_mask, 0x00);
  1090. /*
  1091. * Add 2ms delay as per HW requirement after enabling
  1092. * micbias
  1093. */
  1094. usleep_range(2000, 2100);
  1095. }
  1096. exit:
  1097. mutex_unlock(&rouleur->micb_lock);
  1098. return ret;
  1099. }
  1100. EXPORT_SYMBOL(rouleur_mbhc_micb_adjust_voltage);
  1101. int rouleur_micbias_control(struct snd_soc_component *component,
  1102. int micb_num, int req, bool is_dapm)
  1103. {
  1104. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1105. int micb_index = micb_num - 1;
  1106. u16 micb_reg;
  1107. int pre_off_event = 0, post_off_event = 0;
  1108. int post_on_event = 0, post_dapm_off = 0;
  1109. int post_dapm_on = 0;
  1110. u8 pullup_mask = 0, enable_mask = 0;
  1111. int ret = 0;
  1112. if ((micb_index < 0) || (micb_index > ROULEUR_MAX_MICBIAS - 1)) {
  1113. dev_err(component->dev, "%s: Invalid micbias index, micb_ind:%d\n",
  1114. __func__, micb_index);
  1115. return -EINVAL;
  1116. }
  1117. switch (micb_num) {
  1118. case MIC_BIAS_1:
  1119. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1120. pullup_mask = 0x20;
  1121. enable_mask = 0x40;
  1122. break;
  1123. case MIC_BIAS_2:
  1124. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1125. pullup_mask = 0x02;
  1126. enable_mask = 0x04;
  1127. pre_off_event = WCD_EVENT_PRE_MICBIAS_2_OFF;
  1128. post_off_event = WCD_EVENT_POST_MICBIAS_2_OFF;
  1129. post_on_event = WCD_EVENT_POST_MICBIAS_2_ON;
  1130. post_dapm_on = WCD_EVENT_POST_DAPM_MICBIAS_2_ON;
  1131. post_dapm_off = WCD_EVENT_POST_DAPM_MICBIAS_2_OFF;
  1132. break;
  1133. case MIC_BIAS_3:
  1134. micb_reg = ROULEUR_ANA_MICBIAS_MICB_3_EN;
  1135. pullup_mask = 0x02;
  1136. break;
  1137. default:
  1138. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  1139. __func__, micb_num);
  1140. return -EINVAL;
  1141. };
  1142. mutex_lock(&rouleur->micb_lock);
  1143. switch (req) {
  1144. case MICB_PULLUP_ENABLE:
  1145. if (!rouleur->dev_up) {
  1146. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1147. __func__, req);
  1148. ret = -ENODEV;
  1149. goto done;
  1150. }
  1151. rouleur->pullup_ref[micb_index]++;
  1152. if ((rouleur->pullup_ref[micb_index] == 1) &&
  1153. (rouleur->micb_ref[micb_index] == 0))
  1154. snd_soc_component_update_bits(component, micb_reg,
  1155. pullup_mask, pullup_mask);
  1156. break;
  1157. case MICB_PULLUP_DISABLE:
  1158. if (!rouleur->dev_up) {
  1159. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1160. __func__, req);
  1161. ret = -ENODEV;
  1162. goto done;
  1163. }
  1164. if (rouleur->pullup_ref[micb_index] > 0)
  1165. rouleur->pullup_ref[micb_index]--;
  1166. if ((rouleur->pullup_ref[micb_index] == 0) &&
  1167. (rouleur->micb_ref[micb_index] == 0))
  1168. snd_soc_component_update_bits(component, micb_reg,
  1169. pullup_mask, 0x00);
  1170. break;
  1171. case MICB_ENABLE:
  1172. if (!rouleur->dev_up) {
  1173. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1174. __func__, req);
  1175. ret = -ENODEV;
  1176. goto done;
  1177. }
  1178. rouleur->micb_ref[micb_index]++;
  1179. if (rouleur->micb_ref[micb_index] == 1) {
  1180. rouleur_global_mbias_enable(component);
  1181. snd_soc_component_update_bits(component,
  1182. micb_reg, enable_mask, enable_mask);
  1183. if (post_on_event)
  1184. blocking_notifier_call_chain(
  1185. &rouleur->mbhc->notifier, post_on_event,
  1186. &rouleur->mbhc->wcd_mbhc);
  1187. }
  1188. if (is_dapm && post_dapm_on && rouleur->mbhc)
  1189. blocking_notifier_call_chain(
  1190. &rouleur->mbhc->notifier, post_dapm_on,
  1191. &rouleur->mbhc->wcd_mbhc);
  1192. break;
  1193. case MICB_DISABLE:
  1194. if (rouleur->micb_ref[micb_index] > 0)
  1195. rouleur->micb_ref[micb_index]--;
  1196. if (!rouleur->dev_up) {
  1197. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1198. __func__, req);
  1199. ret = -ENODEV;
  1200. goto done;
  1201. }
  1202. if ((rouleur->micb_ref[micb_index] == 0) &&
  1203. (rouleur->pullup_ref[micb_index] > 0)) {
  1204. snd_soc_component_update_bits(component, micb_reg,
  1205. pullup_mask, pullup_mask);
  1206. snd_soc_component_update_bits(component, micb_reg,
  1207. enable_mask, 0x00);
  1208. rouleur_global_mbias_disable(component);
  1209. } else if ((rouleur->micb_ref[micb_index] == 0) &&
  1210. (rouleur->pullup_ref[micb_index] == 0)) {
  1211. if (pre_off_event && rouleur->mbhc)
  1212. blocking_notifier_call_chain(
  1213. &rouleur->mbhc->notifier, pre_off_event,
  1214. &rouleur->mbhc->wcd_mbhc);
  1215. snd_soc_component_update_bits(component, micb_reg,
  1216. enable_mask, 0x00);
  1217. rouleur_global_mbias_disable(component);
  1218. if (post_off_event && rouleur->mbhc)
  1219. blocking_notifier_call_chain(
  1220. &rouleur->mbhc->notifier,
  1221. post_off_event,
  1222. &rouleur->mbhc->wcd_mbhc);
  1223. }
  1224. if (is_dapm && post_dapm_off && rouleur->mbhc)
  1225. blocking_notifier_call_chain(
  1226. &rouleur->mbhc->notifier, post_dapm_off,
  1227. &rouleur->mbhc->wcd_mbhc);
  1228. break;
  1229. };
  1230. dev_dbg(component->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
  1231. __func__, micb_num, rouleur->micb_ref[micb_index],
  1232. rouleur->pullup_ref[micb_index]);
  1233. done:
  1234. mutex_unlock(&rouleur->micb_lock);
  1235. return 0;
  1236. }
  1237. EXPORT_SYMBOL(rouleur_micbias_control);
  1238. void rouleur_disable_bcs_before_slow_insert(struct snd_soc_component *component,
  1239. bool bcs_disable)
  1240. {
  1241. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1242. if (rouleur->update_wcd_event) {
  1243. if (bcs_disable)
  1244. rouleur->update_wcd_event(rouleur->handle,
  1245. SLV_BOLERO_EVT_BCS_CLK_OFF, 0);
  1246. else
  1247. rouleur->update_wcd_event(rouleur->handle,
  1248. SLV_BOLERO_EVT_BCS_CLK_OFF, 1);
  1249. }
  1250. }
  1251. static int rouleur_get_logical_addr(struct swr_device *swr_dev)
  1252. {
  1253. int ret = 0;
  1254. uint8_t devnum = 0;
  1255. int num_retry = NUM_ATTEMPTS;
  1256. do {
  1257. ret = swr_get_logical_dev_num(swr_dev, swr_dev->addr, &devnum);
  1258. if (ret) {
  1259. dev_err(&swr_dev->dev,
  1260. "%s get devnum %d for dev addr %lx failed\n",
  1261. __func__, devnum, swr_dev->addr);
  1262. /* retry after 1ms */
  1263. usleep_range(1000, 1010);
  1264. }
  1265. } while (ret && --num_retry);
  1266. swr_dev->dev_num = devnum;
  1267. return 0;
  1268. }
  1269. static bool get_usbc_hs_status(struct snd_soc_component *component,
  1270. struct wcd_mbhc_config *mbhc_cfg)
  1271. {
  1272. if (mbhc_cfg->enable_usbc_analog) {
  1273. if (!(snd_soc_component_read32(component, ROULEUR_ANA_MBHC_MECH)
  1274. & 0x20))
  1275. return true;
  1276. }
  1277. return false;
  1278. }
  1279. static int rouleur_event_notify(struct notifier_block *block,
  1280. unsigned long val,
  1281. void *data)
  1282. {
  1283. u16 event = (val & 0xffff);
  1284. int ret = 0;
  1285. struct rouleur_priv *rouleur = dev_get_drvdata((struct device *)data);
  1286. struct snd_soc_component *component = rouleur->component;
  1287. struct wcd_mbhc *mbhc;
  1288. switch (event) {
  1289. case BOLERO_SLV_EVT_PA_OFF_PRE_SSR:
  1290. snd_soc_component_update_bits(component,
  1291. ROULEUR_ANA_HPHPA_CNP_CTL_2,
  1292. 0xC0, 0x00);
  1293. snd_soc_component_update_bits(component,
  1294. ROULEUR_ANA_COMBOPA_CTL,
  1295. 0x40, 0x00);
  1296. snd_soc_component_update_bits(component,
  1297. ROULEUR_ANA_COMBOPA_CTL,
  1298. 0x80, 0x00);
  1299. snd_soc_component_update_bits(component,
  1300. ROULEUR_ANA_COMBOPA_CTL,
  1301. 0x40, 0x40);
  1302. snd_soc_component_update_bits(component,
  1303. ROULEUR_ANA_COMBOPA_CTL,
  1304. 0x80, 0x00);
  1305. break;
  1306. case BOLERO_SLV_EVT_SSR_DOWN:
  1307. rouleur->dev_up = false;
  1308. rouleur->mbhc->wcd_mbhc.deinit_in_progress = true;
  1309. mbhc = &rouleur->mbhc->wcd_mbhc;
  1310. rouleur->usbc_hs_status = get_usbc_hs_status(component,
  1311. mbhc->mbhc_cfg);
  1312. rouleur_mbhc_ssr_down(rouleur->mbhc, component);
  1313. rouleur_reset(rouleur->dev, 0x01);
  1314. break;
  1315. case BOLERO_SLV_EVT_SSR_UP:
  1316. rouleur_reset(rouleur->dev, 0x00);
  1317. /* allow reset to take effect */
  1318. usleep_range(10000, 10010);
  1319. rouleur_get_logical_addr(rouleur->tx_swr_dev);
  1320. rouleur_get_logical_addr(rouleur->rx_swr_dev);
  1321. rouleur_init_reg(component);
  1322. regcache_mark_dirty(rouleur->regmap);
  1323. regcache_sync(rouleur->regmap);
  1324. rouleur->dev_up = true;
  1325. /* Initialize MBHC module */
  1326. mbhc = &rouleur->mbhc->wcd_mbhc;
  1327. ret = rouleur_mbhc_post_ssr_init(rouleur->mbhc, component);
  1328. if (ret) {
  1329. dev_err(component->dev, "%s: mbhc initialization failed\n",
  1330. __func__);
  1331. } else {
  1332. rouleur_mbhc_hs_detect(component, mbhc->mbhc_cfg);
  1333. if (rouleur->usbc_hs_status)
  1334. mdelay(500);
  1335. }
  1336. rouleur->mbhc->wcd_mbhc.deinit_in_progress = false;
  1337. break;
  1338. default:
  1339. dev_err(component->dev, "%s: invalid event %d\n", __func__,
  1340. event);
  1341. break;
  1342. }
  1343. return 0;
  1344. }
  1345. static int __rouleur_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1346. int event)
  1347. {
  1348. struct snd_soc_component *component =
  1349. snd_soc_dapm_to_component(w->dapm);
  1350. int micb_num;
  1351. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1352. __func__, w->name, event);
  1353. if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1")))
  1354. micb_num = MIC_BIAS_1;
  1355. else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2")))
  1356. micb_num = MIC_BIAS_2;
  1357. else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3")))
  1358. micb_num = MIC_BIAS_3;
  1359. else
  1360. return -EINVAL;
  1361. switch (event) {
  1362. case SND_SOC_DAPM_PRE_PMU:
  1363. /* Micbias LD0 enable not supported for MicBias 3*/
  1364. if (micb_num == MIC_BIAS_3)
  1365. rouleur_micbias_control(component, micb_num,
  1366. MICB_PULLUP_ENABLE, true);
  1367. else
  1368. rouleur_micbias_control(component, micb_num,
  1369. MICB_ENABLE, true);
  1370. break;
  1371. case SND_SOC_DAPM_POST_PMU:
  1372. usleep_range(1000, 1100);
  1373. break;
  1374. case SND_SOC_DAPM_POST_PMD:
  1375. if (micb_num == MIC_BIAS_3)
  1376. rouleur_micbias_control(component, micb_num,
  1377. MICB_PULLUP_DISABLE, true);
  1378. else
  1379. rouleur_micbias_control(component, micb_num,
  1380. MICB_DISABLE, true);
  1381. break;
  1382. };
  1383. return 0;
  1384. }
  1385. static int rouleur_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1386. struct snd_kcontrol *kcontrol,
  1387. int event)
  1388. {
  1389. return __rouleur_codec_enable_micbias(w, event);
  1390. }
  1391. static int __rouleur_codec_enable_micbias_pullup(struct snd_soc_dapm_widget *w,
  1392. int event)
  1393. {
  1394. struct snd_soc_component *component =
  1395. snd_soc_dapm_to_component(w->dapm);
  1396. int micb_num;
  1397. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1398. __func__, w->name, event);
  1399. if (strnstr(w->name, "VA MIC BIAS1", sizeof("VA MIC BIAS1")))
  1400. micb_num = MIC_BIAS_1;
  1401. else if (strnstr(w->name, "VA MIC BIAS2", sizeof("VA MIC BIAS2")))
  1402. micb_num = MIC_BIAS_2;
  1403. else if (strnstr(w->name, "VA MIC BIAS3", sizeof("VA MIC BIAS3")))
  1404. micb_num = MIC_BIAS_3;
  1405. else
  1406. return -EINVAL;
  1407. switch (event) {
  1408. case SND_SOC_DAPM_PRE_PMU:
  1409. rouleur_micbias_control(component, micb_num,
  1410. MICB_PULLUP_ENABLE, true);
  1411. break;
  1412. case SND_SOC_DAPM_POST_PMU:
  1413. /* 1 msec delay as per HW requirement */
  1414. usleep_range(1000, 1100);
  1415. break;
  1416. case SND_SOC_DAPM_POST_PMD:
  1417. rouleur_micbias_control(component, micb_num,
  1418. MICB_PULLUP_DISABLE, true);
  1419. break;
  1420. };
  1421. return 0;
  1422. }
  1423. static int rouleur_codec_enable_micbias_pullup(struct snd_soc_dapm_widget *w,
  1424. struct snd_kcontrol *kcontrol,
  1425. int event)
  1426. {
  1427. return __rouleur_codec_enable_micbias_pullup(w, event);
  1428. }
  1429. static int rouleur_get_compander(struct snd_kcontrol *kcontrol,
  1430. struct snd_ctl_elem_value *ucontrol)
  1431. {
  1432. struct snd_soc_component *component =
  1433. snd_soc_kcontrol_component(kcontrol);
  1434. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1435. bool hphr;
  1436. struct soc_multi_mixer_control *mc;
  1437. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1438. hphr = mc->shift;
  1439. ucontrol->value.integer.value[0] = hphr ? rouleur->comp2_enable :
  1440. rouleur->comp1_enable;
  1441. return 0;
  1442. }
  1443. static int rouleur_set_compander(struct snd_kcontrol *kcontrol,
  1444. struct snd_ctl_elem_value *ucontrol)
  1445. {
  1446. struct snd_soc_component *component =
  1447. snd_soc_kcontrol_component(kcontrol);
  1448. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1449. int value = ucontrol->value.integer.value[0];
  1450. bool hphr;
  1451. struct soc_multi_mixer_control *mc;
  1452. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1453. hphr = mc->shift;
  1454. if (hphr)
  1455. rouleur->comp2_enable = value;
  1456. else
  1457. rouleur->comp1_enable = value;
  1458. return 0;
  1459. }
  1460. static int rouleur_codec_enable_pa_vpos(struct snd_soc_dapm_widget *w,
  1461. struct snd_kcontrol *kcontrol,
  1462. int event)
  1463. {
  1464. struct snd_soc_component *component =
  1465. snd_soc_dapm_to_component(w->dapm);
  1466. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1467. struct rouleur_pdata *pdata = NULL;
  1468. int ret = 0;
  1469. pdata = dev_get_platdata(rouleur->dev);
  1470. if (!pdata) {
  1471. dev_err(component->dev, "%s: pdata is NULL\n", __func__);
  1472. return -EINVAL;
  1473. }
  1474. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1475. w->name, event);
  1476. switch (event) {
  1477. case SND_SOC_DAPM_PRE_PMU:
  1478. if (test_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask)) {
  1479. dev_dbg(component->dev,
  1480. "%s: vpos already in enabled state\n",
  1481. __func__);
  1482. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1483. return 0;
  1484. }
  1485. ret = msm_cdc_enable_ondemand_supply(rouleur->dev,
  1486. rouleur->supplies,
  1487. pdata->regulator,
  1488. pdata->num_supplies,
  1489. "cdc-pa-vpos");
  1490. if (ret == -EINVAL) {
  1491. dev_err(component->dev, "%s: pa vpos is not enabled\n",
  1492. __func__);
  1493. return ret;
  1494. }
  1495. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1496. /*
  1497. * 200us sleep is required after LDO15 is enabled as per
  1498. * HW requirement
  1499. */
  1500. usleep_range(200, 250);
  1501. break;
  1502. case SND_SOC_DAPM_POST_PMD:
  1503. set_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1504. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  1505. rouleur->rx_swr_dev->dev_num,
  1506. false);
  1507. break;
  1508. }
  1509. return 0;
  1510. }
  1511. static const struct snd_kcontrol_new rouleur_snd_controls[] = {
  1512. SOC_SINGLE_EXT("HPHL_COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  1513. rouleur_get_compander, rouleur_set_compander),
  1514. SOC_SINGLE_EXT("HPHR_COMP Switch", SND_SOC_NOPM, 1, 1, 0,
  1515. rouleur_get_compander, rouleur_set_compander),
  1516. SOC_SINGLE_TLV("HPHL Volume", ROULEUR_ANA_HPHPA_L_GAIN, 0, 20, 1,
  1517. line_gain),
  1518. SOC_SINGLE_TLV("HPHR Volume", ROULEUR_ANA_HPHPA_R_GAIN, 0, 20, 1,
  1519. line_gain),
  1520. SOC_SINGLE_TLV("ADC1 Volume", ROULEUR_ANA_TX_AMIC1, 0, 8, 0,
  1521. analog_gain),
  1522. SOC_SINGLE_TLV("ADC2 Volume", ROULEUR_ANA_TX_AMIC2, 0, 8, 0,
  1523. analog_gain),
  1524. };
  1525. static const struct snd_kcontrol_new adc1_switch[] = {
  1526. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1527. };
  1528. static const struct snd_kcontrol_new adc2_switch[] = {
  1529. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1530. };
  1531. static const struct snd_kcontrol_new dmic1_switch[] = {
  1532. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1533. };
  1534. static const struct snd_kcontrol_new dmic2_switch[] = {
  1535. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1536. };
  1537. static const struct snd_kcontrol_new ear_rdac_switch[] = {
  1538. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1539. };
  1540. static const struct snd_kcontrol_new lo_rdac_switch[] = {
  1541. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1542. };
  1543. static const struct snd_kcontrol_new hphl_rdac_switch[] = {
  1544. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1545. };
  1546. static const struct snd_kcontrol_new hphr_rdac_switch[] = {
  1547. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1548. };
  1549. static const char * const adc2_mux_text[] = {
  1550. "INP2", "INP3"
  1551. };
  1552. static const struct soc_enum adc2_enum =
  1553. SOC_ENUM_SINGLE(ROULEUR_ANA_TX_AMIC2, 4,
  1554. ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
  1555. static const struct snd_kcontrol_new tx_adc2_mux =
  1556. SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
  1557. static const struct snd_soc_dapm_widget rouleur_dapm_widgets[] = {
  1558. /*input widgets*/
  1559. SND_SOC_DAPM_INPUT("AMIC1"),
  1560. SND_SOC_DAPM_INPUT("AMIC2"),
  1561. SND_SOC_DAPM_INPUT("AMIC3"),
  1562. SND_SOC_DAPM_INPUT("IN1_HPHL"),
  1563. SND_SOC_DAPM_INPUT("IN2_HPHR"),
  1564. /*tx widgets*/
  1565. SND_SOC_DAPM_ADC_E("ADC1", NULL, SND_SOC_NOPM, 0, 0,
  1566. rouleur_codec_enable_adc,
  1567. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1568. SND_SOC_DAPM_ADC_E("ADC2", NULL, SND_SOC_NOPM, 1, 0,
  1569. rouleur_codec_enable_adc,
  1570. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1571. SND_SOC_DAPM_MUX("ADC2 MUX", SND_SOC_NOPM, 0, 0,
  1572. &tx_adc2_mux),
  1573. /*tx mixers*/
  1574. SND_SOC_DAPM_MIXER_E("ADC1_MIXER", SND_SOC_NOPM, 0, 0,
  1575. adc1_switch, ARRAY_SIZE(adc1_switch),
  1576. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1577. SND_SOC_DAPM_POST_PMD),
  1578. SND_SOC_DAPM_MIXER_E("ADC2_MIXER", SND_SOC_NOPM, 0, 0,
  1579. adc2_switch, ARRAY_SIZE(adc2_switch),
  1580. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1581. SND_SOC_DAPM_POST_PMD),
  1582. /* micbias widgets*/
  1583. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1584. rouleur_codec_enable_micbias,
  1585. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1586. SND_SOC_DAPM_POST_PMD),
  1587. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1588. rouleur_codec_enable_micbias,
  1589. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1590. SND_SOC_DAPM_POST_PMD),
  1591. SND_SOC_DAPM_MICBIAS_E("MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1592. rouleur_codec_enable_micbias,
  1593. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1594. SND_SOC_DAPM_POST_PMD),
  1595. SND_SOC_DAPM_SUPPLY("PA_VPOS", SND_SOC_NOPM, 0, 0,
  1596. rouleur_codec_enable_pa_vpos,
  1597. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1598. /*rx widgets*/
  1599. SND_SOC_DAPM_PGA_E("EAR PGA", ROULEUR_ANA_COMBOPA_CTL, 7, 0, NULL, 0,
  1600. rouleur_codec_enable_ear_pa,
  1601. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1602. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1603. SND_SOC_DAPM_PGA_E("LO PGA", ROULEUR_ANA_COMBOPA_CTL, 7, 0, NULL, 0,
  1604. rouleur_codec_enable_lo_pa,
  1605. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1606. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1607. SND_SOC_DAPM_PGA_E("HPHL PGA", ROULEUR_ANA_HPHPA_CNP_CTL_2, 7, 0, NULL,
  1608. 0, rouleur_codec_enable_hphl_pa,
  1609. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1610. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1611. SND_SOC_DAPM_PGA_E("HPHR PGA", ROULEUR_ANA_HPHPA_CNP_CTL_2, 6, 0, NULL,
  1612. 0, rouleur_codec_enable_hphr_pa,
  1613. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1614. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1615. SND_SOC_DAPM_DAC_E("RDAC1", NULL, SND_SOC_NOPM, 0, 0,
  1616. rouleur_codec_hphl_dac_event,
  1617. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1618. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1619. SND_SOC_DAPM_DAC_E("RDAC2", NULL, SND_SOC_NOPM, 0, 0,
  1620. rouleur_codec_hphr_dac_event,
  1621. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1622. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1623. SND_SOC_DAPM_DAC_E("RDAC3", NULL, SND_SOC_NOPM, 0, 0,
  1624. rouleur_codec_ear_lo_dac_event,
  1625. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1626. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1627. SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
  1628. rouleur_enable_rx1, SND_SOC_DAPM_PRE_PMU |
  1629. SND_SOC_DAPM_POST_PMD),
  1630. SND_SOC_DAPM_MIXER_E("RX2", SND_SOC_NOPM, 0, 0, NULL, 0,
  1631. rouleur_enable_rx2, SND_SOC_DAPM_PRE_PMU |
  1632. SND_SOC_DAPM_POST_PMD),
  1633. /* rx mixer widgets*/
  1634. SND_SOC_DAPM_MIXER("EAR_RDAC", SND_SOC_NOPM, 0, 0,
  1635. ear_rdac_switch, ARRAY_SIZE(ear_rdac_switch)),
  1636. SND_SOC_DAPM_MIXER("LO_RDAC", SND_SOC_NOPM, 0, 0,
  1637. lo_rdac_switch, ARRAY_SIZE(lo_rdac_switch)),
  1638. SND_SOC_DAPM_MIXER("HPHL_RDAC", SND_SOC_NOPM, 0, 0,
  1639. hphl_rdac_switch, ARRAY_SIZE(hphl_rdac_switch)),
  1640. SND_SOC_DAPM_MIXER("HPHR_RDAC", SND_SOC_NOPM, 0, 0,
  1641. hphr_rdac_switch, ARRAY_SIZE(hphr_rdac_switch)),
  1642. /*output widgets tx*/
  1643. SND_SOC_DAPM_OUTPUT("ADC1_OUTPUT"),
  1644. SND_SOC_DAPM_OUTPUT("ADC2_OUTPUT"),
  1645. /*output widgets rx*/
  1646. SND_SOC_DAPM_OUTPUT("EAR"),
  1647. SND_SOC_DAPM_OUTPUT("LO"),
  1648. SND_SOC_DAPM_OUTPUT("HPHL"),
  1649. SND_SOC_DAPM_OUTPUT("HPHR"),
  1650. /* micbias pull up widgets*/
  1651. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1652. rouleur_codec_enable_micbias_pullup,
  1653. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1654. SND_SOC_DAPM_POST_PMD),
  1655. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1656. rouleur_codec_enable_micbias_pullup,
  1657. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1658. SND_SOC_DAPM_POST_PMD),
  1659. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1660. rouleur_codec_enable_micbias_pullup,
  1661. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1662. SND_SOC_DAPM_POST_PMD),
  1663. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  1664. rouleur_codec_enable_dmic,
  1665. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1666. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 1, 0,
  1667. rouleur_codec_enable_dmic,
  1668. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1669. /*tx mixer widgets*/
  1670. SND_SOC_DAPM_MIXER_E("DMIC1_MIXER", SND_SOC_NOPM, 0,
  1671. 0, dmic1_switch, ARRAY_SIZE(dmic1_switch),
  1672. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1673. SND_SOC_DAPM_POST_PMD),
  1674. SND_SOC_DAPM_MIXER_E("DMIC2_MIXER", SND_SOC_NOPM, 0,
  1675. 0, dmic2_switch, ARRAY_SIZE(dmic2_switch),
  1676. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1677. SND_SOC_DAPM_POST_PMD),
  1678. /*output widgets*/
  1679. SND_SOC_DAPM_OUTPUT("DMIC1_OUTPUT"),
  1680. SND_SOC_DAPM_OUTPUT("DMIC2_OUTPUT"),
  1681. };
  1682. static const struct snd_soc_dapm_route rouleur_audio_map[] = {
  1683. {"ADC1_OUTPUT", NULL, "ADC1_MIXER"},
  1684. {"ADC1_MIXER", "Switch", "ADC1"},
  1685. {"ADC1", NULL, "AMIC1"},
  1686. {"ADC2_OUTPUT", NULL, "ADC2_MIXER"},
  1687. {"ADC2_MIXER", "Switch", "ADC2"},
  1688. {"ADC2", NULL, "ADC2 MUX"},
  1689. {"ADC2 MUX", "INP3", "AMIC3"},
  1690. {"ADC2 MUX", "INP2", "AMIC2"},
  1691. {"IN1_HPHL", NULL, "PA_VPOS"},
  1692. {"RX1", NULL, "IN1_HPHL"},
  1693. {"RDAC1", NULL, "RX1"},
  1694. {"HPHL_RDAC", "Switch", "RDAC1"},
  1695. {"HPHL PGA", NULL, "HPHL_RDAC"},
  1696. {"HPHL", NULL, "HPHL PGA"},
  1697. {"IN2_HPHR", NULL, "PA_VPOS"},
  1698. {"RX2", NULL, "IN2_HPHR"},
  1699. {"RDAC2", NULL, "RX2"},
  1700. {"HPHR_RDAC", "Switch", "RDAC2"},
  1701. {"HPHR PGA", NULL, "HPHR_RDAC"},
  1702. {"HPHR", NULL, "HPHR PGA"},
  1703. {"RDAC3", NULL, "RX1"},
  1704. {"EAR_RDAC", "Switch", "RDAC3"},
  1705. {"EAR PGA", NULL, "EAR_RDAC"},
  1706. {"EAR", NULL, "EAR PGA"},
  1707. {"RDAC3", NULL, "RX1"},
  1708. {"LO_RDAC", "Switch", "RDAC3"},
  1709. {"LO PGA", NULL, "LO_RDAC"},
  1710. {"LO", NULL, "LO PGA"},
  1711. {"DMIC1_OUTPUT", NULL, "DMIC1_MIXER"},
  1712. {"DMIC1_MIXER", "Switch", "DMIC1"},
  1713. {"DMIC2_OUTPUT", NULL, "DMIC2_MIXER"},
  1714. {"DMIC2_MIXER", "Switch", "DMIC2"},
  1715. };
  1716. static ssize_t rouleur_version_read(struct snd_info_entry *entry,
  1717. void *file_private_data,
  1718. struct file *file,
  1719. char __user *buf, size_t count,
  1720. loff_t pos)
  1721. {
  1722. struct rouleur_priv *priv;
  1723. char buffer[ROULEUR_VERSION_ENTRY_SIZE];
  1724. int len = 0;
  1725. priv = (struct rouleur_priv *) entry->private_data;
  1726. if (!priv) {
  1727. pr_err("%s: rouleur priv is null\n", __func__);
  1728. return -EINVAL;
  1729. }
  1730. switch (priv->version) {
  1731. case ROULEUR_VERSION_1_0:
  1732. len = snprintf(buffer, sizeof(buffer), "ROULEUR_1_0\n");
  1733. break;
  1734. default:
  1735. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  1736. }
  1737. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  1738. }
  1739. static struct snd_info_entry_ops rouleur_info_ops = {
  1740. .read = rouleur_version_read,
  1741. };
  1742. /*
  1743. * rouleur_info_create_codec_entry - creates rouleur module
  1744. * @codec_root: The parent directory
  1745. * @component: component instance
  1746. *
  1747. * Creates rouleur module and version entry under the given
  1748. * parent directory.
  1749. *
  1750. * Return: 0 on success or negative error code on failure.
  1751. */
  1752. int rouleur_info_create_codec_entry(struct snd_info_entry *codec_root,
  1753. struct snd_soc_component *component)
  1754. {
  1755. struct snd_info_entry *version_entry;
  1756. struct rouleur_priv *priv;
  1757. struct snd_soc_card *card;
  1758. if (!codec_root || !component)
  1759. return -EINVAL;
  1760. priv = snd_soc_component_get_drvdata(component);
  1761. if (priv->entry) {
  1762. dev_dbg(priv->dev,
  1763. "%s:rouleur module already created\n", __func__);
  1764. return 0;
  1765. }
  1766. card = component->card;
  1767. priv->entry = snd_info_create_subdir(codec_root->module,
  1768. "rouleur", codec_root);
  1769. if (!priv->entry) {
  1770. dev_dbg(component->dev, "%s: failed to create rouleur entry\n",
  1771. __func__);
  1772. return -ENOMEM;
  1773. }
  1774. version_entry = snd_info_create_card_entry(card->snd_card,
  1775. "version",
  1776. priv->entry);
  1777. if (!version_entry) {
  1778. dev_dbg(component->dev, "%s: failed to create rouleur version entry\n",
  1779. __func__);
  1780. return -ENOMEM;
  1781. }
  1782. version_entry->private_data = priv;
  1783. version_entry->size = ROULEUR_VERSION_ENTRY_SIZE;
  1784. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  1785. version_entry->c.ops = &rouleur_info_ops;
  1786. if (snd_info_register(version_entry) < 0) {
  1787. snd_info_free_entry(version_entry);
  1788. return -ENOMEM;
  1789. }
  1790. priv->version_entry = version_entry;
  1791. return 0;
  1792. }
  1793. EXPORT_SYMBOL(rouleur_info_create_codec_entry);
  1794. static int rouleur_set_micbias_data(struct rouleur_priv *rouleur,
  1795. struct rouleur_pdata *pdata)
  1796. {
  1797. int vout_ctl = 0;
  1798. int rc = 0;
  1799. if (!pdata) {
  1800. dev_err(rouleur->dev, "%s: NULL pdata\n", __func__);
  1801. return -ENODEV;
  1802. }
  1803. /* set micbias voltage */
  1804. vout_ctl = rouleur_get_micb_vout_ctl_val(pdata->micbias.micb1_mv);
  1805. if (vout_ctl < 0) {
  1806. rc = -EINVAL;
  1807. goto done;
  1808. }
  1809. regmap_update_bits(rouleur->regmap, ROULEUR_ANA_MICBIAS_LDO_1_SETTING,
  1810. 0xF8, vout_ctl << 3);
  1811. done:
  1812. return rc;
  1813. }
  1814. static int rouleur_battery_supply_cb(struct notifier_block *nb,
  1815. unsigned long event, void *data)
  1816. {
  1817. struct power_supply *psy = data;
  1818. struct rouleur_priv *rouleur =
  1819. container_of(nb, struct rouleur_priv, psy_nb);
  1820. if (strcmp(psy->desc->name, "battery"))
  1821. return NOTIFY_OK;
  1822. queue_work(system_freezable_wq, &rouleur->soc_eval_work);
  1823. return NOTIFY_OK;
  1824. }
  1825. static int rouleur_read_battery_soc(struct rouleur_priv *rouleur, int *soc_val)
  1826. {
  1827. static struct power_supply *batt_psy;
  1828. union power_supply_propval ret = {0,};
  1829. int err = 0;
  1830. *soc_val = 100;
  1831. if (!batt_psy)
  1832. batt_psy = power_supply_get_by_name("battery");
  1833. if (batt_psy) {
  1834. err = power_supply_get_property(batt_psy,
  1835. POWER_SUPPLY_PROP_CAPACITY, &ret);
  1836. if (err) {
  1837. pr_err("%s: battery SoC read error:%d\n",
  1838. __func__, err);
  1839. return err;
  1840. }
  1841. *soc_val = ret.intval;
  1842. }
  1843. pr_debug("%s: soc:%d\n", __func__, *soc_val);
  1844. return err;
  1845. }
  1846. static void rouleur_evaluate_soc(struct work_struct *work)
  1847. {
  1848. struct rouleur_priv *rouleur =
  1849. container_of(work, struct rouleur_priv, soc_eval_work);
  1850. int soc_val = 0, ret = 0;
  1851. struct rouleur_pdata *pdata = NULL;
  1852. pdata = dev_get_platdata(rouleur->dev);
  1853. if (!pdata) {
  1854. dev_err(rouleur->dev, "%s: pdata is NULL\n", __func__);
  1855. return;
  1856. }
  1857. if (rouleur_read_battery_soc(rouleur, &soc_val) < 0) {
  1858. dev_err(rouleur->dev, "%s unable to read battery SoC\n",
  1859. __func__);
  1860. return;
  1861. }
  1862. if (soc_val < SOC_THRESHOLD_LEVEL) {
  1863. dev_dbg(rouleur->dev,
  1864. "%s battery SoC less than threshold soc_val = %d\n",
  1865. __func__, soc_val);
  1866. /* Reduce PA Gain by 6DB for low SoC */
  1867. if (rouleur->update_wcd_event)
  1868. rouleur->update_wcd_event(rouleur->handle,
  1869. SLV_BOLERO_EVT_RX_PA_GAIN_UPDATE,
  1870. true);
  1871. rouleur->low_soc = true;
  1872. ret = msm_cdc_set_supply_min_voltage(rouleur->dev,
  1873. rouleur->supplies,
  1874. pdata->regulator,
  1875. pdata->num_supplies,
  1876. "cdc-vdd-mic-bias",
  1877. LOW_SOC_MBIAS_REG_MIN_VOLTAGE,
  1878. true);
  1879. if (ret < 0)
  1880. dev_err(rouleur->dev,
  1881. "%s unable to set mbias min voltage\n",
  1882. __func__);
  1883. } else {
  1884. if (rouleur->low_soc == true) {
  1885. /* Reset PA Gain to default for normal SoC */
  1886. if (rouleur->update_wcd_event)
  1887. rouleur->update_wcd_event(rouleur->handle,
  1888. SLV_BOLERO_EVT_RX_PA_GAIN_UPDATE,
  1889. false);
  1890. ret = msm_cdc_set_supply_min_voltage(rouleur->dev,
  1891. rouleur->supplies,
  1892. pdata->regulator,
  1893. pdata->num_supplies,
  1894. "cdc-vdd-mic-bias",
  1895. LOW_SOC_MBIAS_REG_MIN_VOLTAGE,
  1896. false);
  1897. if (ret < 0)
  1898. dev_err(rouleur->dev,
  1899. "%s unable to set mbias min voltage\n",
  1900. __func__);
  1901. rouleur->low_soc = false;
  1902. }
  1903. }
  1904. }
  1905. static void rouleur_get_foundry_id(struct rouleur_priv *rouleur)
  1906. {
  1907. int ret;
  1908. if (rouleur->foundry_id_reg == 0) {
  1909. pr_debug("%s: foundry id not defined\n", __func__);
  1910. return;
  1911. }
  1912. ret = pm2250_spmi_read(rouleur->spmi_dev,
  1913. rouleur->foundry_id_reg, &rouleur->foundry_id);
  1914. if (ret == 0)
  1915. pr_debug("%s: rouleur foundry id = %x\n", rouleur->foundry_id,
  1916. __func__);
  1917. else
  1918. pr_debug("%s: rouleur error in spmi read ret = %d\n",
  1919. __func__, ret);
  1920. }
  1921. static int rouleur_soc_codec_probe(struct snd_soc_component *component)
  1922. {
  1923. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1924. struct snd_soc_dapm_context *dapm =
  1925. snd_soc_component_get_dapm(component);
  1926. int ret = -EINVAL;
  1927. dev_info(component->dev, "%s()\n", __func__);
  1928. rouleur = snd_soc_component_get_drvdata(component);
  1929. if (!rouleur)
  1930. return -EINVAL;
  1931. rouleur->component = component;
  1932. snd_soc_component_init_regmap(component, rouleur->regmap);
  1933. rouleur->fw_data = devm_kzalloc(component->dev,
  1934. sizeof(*(rouleur->fw_data)),
  1935. GFP_KERNEL);
  1936. if (!rouleur->fw_data) {
  1937. dev_err(component->dev, "Failed to allocate fw_data\n");
  1938. ret = -ENOMEM;
  1939. goto done;
  1940. }
  1941. set_bit(WCD9XXX_MBHC_CAL, rouleur->fw_data->cal_bit);
  1942. ret = wcd_cal_create_hwdep(rouleur->fw_data,
  1943. WCD9XXX_CODEC_HWDEP_NODE, component);
  1944. if (ret < 0) {
  1945. dev_err(component->dev, "%s hwdep failed %d\n", __func__, ret);
  1946. goto done;
  1947. }
  1948. ret = rouleur_mbhc_init(&rouleur->mbhc, component, rouleur->fw_data);
  1949. if (ret) {
  1950. pr_err("%s: mbhc initialization failed\n", __func__);
  1951. goto done;
  1952. }
  1953. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  1954. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  1955. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  1956. snd_soc_dapm_ignore_suspend(dapm, "IN1_HPHL");
  1957. snd_soc_dapm_ignore_suspend(dapm, "IN2_HPHR");
  1958. snd_soc_dapm_ignore_suspend(dapm, "ADC1_OUTPUT");
  1959. snd_soc_dapm_ignore_suspend(dapm, "ADC2_OUTPUT");
  1960. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  1961. snd_soc_dapm_ignore_suspend(dapm, "LO");
  1962. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  1963. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  1964. snd_soc_dapm_ignore_suspend(dapm, "DMIC1_OUTPUT");
  1965. snd_soc_dapm_ignore_suspend(dapm, "DMIC2_OUTPUT");
  1966. snd_soc_dapm_sync(dapm);
  1967. rouleur_init_reg(component);
  1968. /* Get rouleur foundry id */
  1969. rouleur_get_foundry_id(rouleur);
  1970. rouleur->version = ROULEUR_VERSION_1_0;
  1971. /* Register event notifier */
  1972. rouleur->nblock.notifier_call = rouleur_event_notify;
  1973. if (rouleur->register_notifier) {
  1974. ret = rouleur->register_notifier(rouleur->handle,
  1975. &rouleur->nblock,
  1976. true);
  1977. if (ret) {
  1978. dev_err(component->dev,
  1979. "%s: Failed to register notifier %d\n",
  1980. __func__, ret);
  1981. return ret;
  1982. }
  1983. }
  1984. rouleur->low_soc = false;
  1985. rouleur->dev_up = true;
  1986. /* Register notifier to change gain based on state of charge */
  1987. INIT_WORK(&rouleur->soc_eval_work, rouleur_evaluate_soc);
  1988. rouleur->psy_nb.notifier_call = rouleur_battery_supply_cb;
  1989. if (power_supply_reg_notifier(&rouleur->psy_nb) < 0)
  1990. dev_dbg(rouleur->dev,
  1991. "%s: could not register pwr supply notifier\n",
  1992. __func__);
  1993. queue_work(system_freezable_wq, &rouleur->soc_eval_work);
  1994. done:
  1995. return ret;
  1996. }
  1997. static void rouleur_soc_codec_remove(struct snd_soc_component *component)
  1998. {
  1999. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  2000. if (!rouleur)
  2001. return;
  2002. if (rouleur->register_notifier)
  2003. rouleur->register_notifier(rouleur->handle,
  2004. &rouleur->nblock,
  2005. false);
  2006. }
  2007. static int rouleur_soc_codec_suspend(struct snd_soc_component *component)
  2008. {
  2009. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  2010. if (!rouleur)
  2011. return 0;
  2012. rouleur->dapm_bias_off = true;
  2013. return 0;
  2014. }
  2015. static int rouleur_soc_codec_resume(struct snd_soc_component *component)
  2016. {
  2017. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  2018. if (!rouleur)
  2019. return 0;
  2020. rouleur->dapm_bias_off = false;
  2021. return 0;
  2022. }
  2023. static const struct snd_soc_component_driver soc_codec_dev_rouleur = {
  2024. .name = DRV_NAME,
  2025. .probe = rouleur_soc_codec_probe,
  2026. .remove = rouleur_soc_codec_remove,
  2027. .controls = rouleur_snd_controls,
  2028. .num_controls = ARRAY_SIZE(rouleur_snd_controls),
  2029. .dapm_widgets = rouleur_dapm_widgets,
  2030. .num_dapm_widgets = ARRAY_SIZE(rouleur_dapm_widgets),
  2031. .dapm_routes = rouleur_audio_map,
  2032. .num_dapm_routes = ARRAY_SIZE(rouleur_audio_map),
  2033. .suspend = rouleur_soc_codec_suspend,
  2034. .resume = rouleur_soc_codec_resume,
  2035. };
  2036. #ifdef CONFIG_PM_SLEEP
  2037. static int rouleur_suspend(struct device *dev)
  2038. {
  2039. struct rouleur_priv *rouleur = NULL;
  2040. int ret = 0;
  2041. struct rouleur_pdata *pdata = NULL;
  2042. if (!dev)
  2043. return -ENODEV;
  2044. rouleur = dev_get_drvdata(dev);
  2045. if (!rouleur)
  2046. return -EINVAL;
  2047. pdata = dev_get_platdata(rouleur->dev);
  2048. if (!pdata) {
  2049. dev_err(dev, "%s: pdata is NULL\n", __func__);
  2050. return -EINVAL;
  2051. }
  2052. if (test_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask)) {
  2053. ret = msm_cdc_disable_ondemand_supply(rouleur->dev,
  2054. rouleur->supplies,
  2055. pdata->regulator,
  2056. pdata->num_supplies,
  2057. "cdc-pa-vpos");
  2058. if (ret == -EINVAL) {
  2059. dev_err(dev, "%s: pa vpos is not disabled\n",
  2060. __func__);
  2061. return 0;
  2062. }
  2063. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  2064. }
  2065. if (rouleur->dapm_bias_off) {
  2066. msm_cdc_set_supplies_lpm_mode(rouleur->dev,
  2067. rouleur->supplies,
  2068. pdata->regulator,
  2069. pdata->num_supplies,
  2070. true);
  2071. set_bit(WCD_SUPPLIES_LPM_MODE, &rouleur->status_mask);
  2072. }
  2073. return 0;
  2074. }
  2075. static int rouleur_resume(struct device *dev)
  2076. {
  2077. struct rouleur_priv *rouleur = NULL;
  2078. struct rouleur_pdata *pdata = NULL;
  2079. if (!dev)
  2080. return -ENODEV;
  2081. rouleur = dev_get_drvdata(dev);
  2082. if (!rouleur)
  2083. return -EINVAL;
  2084. pdata = dev_get_platdata(rouleur->dev);
  2085. if (!pdata) {
  2086. dev_err(dev, "%s: pdata is NULL\n", __func__);
  2087. return -EINVAL;
  2088. }
  2089. if (test_bit(WCD_SUPPLIES_LPM_MODE, &rouleur->status_mask)) {
  2090. msm_cdc_set_supplies_lpm_mode(rouleur->dev,
  2091. rouleur->supplies,
  2092. pdata->regulator,
  2093. pdata->num_supplies,
  2094. false);
  2095. clear_bit(WCD_SUPPLIES_LPM_MODE, &rouleur->status_mask);
  2096. }
  2097. return 0;
  2098. }
  2099. #endif
  2100. static int rouleur_reset(struct device *dev, int reset_val)
  2101. {
  2102. struct rouleur_priv *rouleur = NULL;
  2103. if (!dev)
  2104. return -ENODEV;
  2105. rouleur = dev_get_drvdata(dev);
  2106. if (!rouleur)
  2107. return -EINVAL;
  2108. pm2250_spmi_write(rouleur->spmi_dev, rouleur->reset_reg, reset_val);
  2109. return 0;
  2110. }
  2111. static int rouleur_read_of_property_u32(struct device *dev, const char *name,
  2112. u32 *val)
  2113. {
  2114. int rc = 0;
  2115. rc = of_property_read_u32(dev->of_node, name, val);
  2116. if (rc)
  2117. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  2118. __func__, name, dev->of_node->full_name);
  2119. return rc;
  2120. }
  2121. static void rouleur_dt_parse_micbias_info(struct device *dev,
  2122. struct rouleur_micbias_setting *mb)
  2123. {
  2124. u32 prop_val = 0;
  2125. int rc = 0;
  2126. /* MB1 */
  2127. if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
  2128. NULL)) {
  2129. rc = rouleur_read_of_property_u32(dev,
  2130. "qcom,cdc-micbias1-mv",
  2131. &prop_val);
  2132. if (!rc)
  2133. mb->micb1_mv = prop_val;
  2134. } else {
  2135. dev_info(dev, "%s: Micbias1 DT property not found\n",
  2136. __func__);
  2137. }
  2138. /* MB2 */
  2139. if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
  2140. NULL)) {
  2141. rc = rouleur_read_of_property_u32(dev,
  2142. "qcom,cdc-micbias2-mv",
  2143. &prop_val);
  2144. if (!rc)
  2145. mb->micb2_mv = prop_val;
  2146. } else {
  2147. dev_info(dev, "%s: Micbias2 DT property not found\n",
  2148. __func__);
  2149. }
  2150. /* MB3 */
  2151. if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
  2152. NULL)) {
  2153. rc = rouleur_read_of_property_u32(dev,
  2154. "qcom,cdc-micbias3-mv",
  2155. &prop_val);
  2156. if (!rc)
  2157. mb->micb3_mv = prop_val;
  2158. } else {
  2159. dev_info(dev, "%s: Micbias3 DT property not found\n",
  2160. __func__);
  2161. }
  2162. }
  2163. struct rouleur_pdata *rouleur_populate_dt_data(struct device *dev)
  2164. {
  2165. struct rouleur_pdata *pdata = NULL;
  2166. u32 reg;
  2167. int ret = 0;
  2168. pdata = kzalloc(sizeof(struct rouleur_pdata),
  2169. GFP_KERNEL);
  2170. if (!pdata)
  2171. return NULL;
  2172. pdata->spmi_np = of_parse_phandle(dev->of_node,
  2173. "qcom,pmic-spmi-node", 0);
  2174. if (!pdata->spmi_np) {
  2175. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  2176. __func__, "qcom,pmic-spmi-node",
  2177. dev->of_node->full_name);
  2178. kfree(pdata);
  2179. return NULL;
  2180. }
  2181. ret = of_property_read_u32(dev->of_node, "qcom,wcd-reset-reg", &reg);
  2182. if (ret) {
  2183. dev_err(dev, "%s: Failed to obtain reset reg value %d\n",
  2184. __func__, ret);
  2185. kfree(pdata);
  2186. return NULL;
  2187. }
  2188. pdata->reset_reg = reg;
  2189. if (of_property_read_u32(dev->of_node, "qcom,foundry-id-reg", &reg))
  2190. dev_dbg(dev, "%s: Failed to obtain foundry id\n",
  2191. __func__);
  2192. else
  2193. pdata->foundry_id_reg = reg;
  2194. /* Parse power supplies */
  2195. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  2196. &pdata->num_supplies);
  2197. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  2198. dev_err(dev, "%s: no power supplies defined for codec\n",
  2199. __func__);
  2200. kfree(pdata);
  2201. return NULL;
  2202. }
  2203. pdata->rx_slave = of_parse_phandle(dev->of_node, "qcom,rx-slave", 0);
  2204. pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
  2205. rouleur_dt_parse_micbias_info(dev, &pdata->micbias);
  2206. return pdata;
  2207. }
  2208. static int rouleur_wakeup(void *handle, bool enable)
  2209. {
  2210. struct rouleur_priv *priv;
  2211. if (!handle) {
  2212. pr_err("%s: NULL handle\n", __func__);
  2213. return -EINVAL;
  2214. }
  2215. priv = (struct rouleur_priv *)handle;
  2216. if (!priv->tx_swr_dev) {
  2217. pr_err("%s: tx swr dev is NULL\n", __func__);
  2218. return -EINVAL;
  2219. }
  2220. if (enable)
  2221. return swr_device_wakeup_vote(priv->tx_swr_dev);
  2222. else
  2223. return swr_device_wakeup_unvote(priv->tx_swr_dev);
  2224. }
  2225. static irqreturn_t rouleur_wd_handle_irq(int irq, void *data)
  2226. {
  2227. pr_err_ratelimited("%s: Watchdog interrupt for irq =%d triggered\n",
  2228. __func__, irq);
  2229. return IRQ_HANDLED;
  2230. }
  2231. static int rouleur_bind(struct device *dev)
  2232. {
  2233. int ret = 0, i = 0;
  2234. struct rouleur_priv *rouleur = NULL;
  2235. struct rouleur_pdata *pdata = NULL;
  2236. struct wcd_ctrl_platform_data *plat_data = NULL;
  2237. struct platform_device *pdev = NULL;
  2238. rouleur = kzalloc(sizeof(struct rouleur_priv), GFP_KERNEL);
  2239. if (!rouleur)
  2240. return -ENOMEM;
  2241. dev_set_drvdata(dev, rouleur);
  2242. pdata = rouleur_populate_dt_data(dev);
  2243. if (!pdata) {
  2244. dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
  2245. kfree(rouleur);
  2246. return -EINVAL;
  2247. }
  2248. rouleur->dev = dev;
  2249. rouleur->dev->platform_data = pdata;
  2250. pdev = of_find_device_by_node(pdata->spmi_np);
  2251. if (!pdev) {
  2252. dev_err(dev, "%s: platform device from SPMI node is NULL\n",
  2253. __func__);
  2254. ret = -EINVAL;
  2255. goto err_bind_all;
  2256. }
  2257. rouleur->spmi_dev = &pdev->dev;
  2258. rouleur->reset_reg = pdata->reset_reg;
  2259. rouleur->foundry_id_reg = pdata->foundry_id_reg;
  2260. ret = msm_cdc_init_supplies(dev, &rouleur->supplies,
  2261. pdata->regulator, pdata->num_supplies);
  2262. if (!rouleur->supplies) {
  2263. dev_err(dev, "%s: Cannot init wcd supplies\n",
  2264. __func__);
  2265. goto err_bind_all;
  2266. }
  2267. plat_data = dev_get_platdata(dev->parent);
  2268. if (!plat_data) {
  2269. dev_err(dev, "%s: platform data from parent is NULL\n",
  2270. __func__);
  2271. ret = -EINVAL;
  2272. goto err_bind_all;
  2273. }
  2274. rouleur->handle = (void *)plat_data->handle;
  2275. if (!rouleur->handle) {
  2276. dev_err(dev, "%s: handle is NULL\n", __func__);
  2277. ret = -EINVAL;
  2278. goto err_bind_all;
  2279. }
  2280. rouleur->update_wcd_event = plat_data->update_wcd_event;
  2281. if (!rouleur->update_wcd_event) {
  2282. dev_err(dev, "%s: update_wcd_event api is null!\n",
  2283. __func__);
  2284. ret = -EINVAL;
  2285. goto err_bind_all;
  2286. }
  2287. rouleur->register_notifier = plat_data->register_notifier;
  2288. if (!rouleur->register_notifier) {
  2289. dev_err(dev, "%s: register_notifier api is null!\n",
  2290. __func__);
  2291. ret = -EINVAL;
  2292. goto err_bind_all;
  2293. }
  2294. ret = msm_cdc_enable_static_supplies(dev, rouleur->supplies,
  2295. pdata->regulator,
  2296. pdata->num_supplies);
  2297. if (ret) {
  2298. dev_err(dev, "%s: wcd static supply enable failed!\n",
  2299. __func__);
  2300. goto err_bind_all;
  2301. }
  2302. rouleur_reset(dev, 0x01);
  2303. usleep_range(20, 30);
  2304. rouleur_reset(dev, 0x00);
  2305. /*
  2306. * Add 5msec delay to provide sufficient time for
  2307. * soundwire auto enumeration of slave devices as
  2308. * as per HW requirement.
  2309. */
  2310. usleep_range(5000, 5010);
  2311. rouleur->wakeup = rouleur_wakeup;
  2312. ret = component_bind_all(dev, rouleur);
  2313. if (ret) {
  2314. dev_err(dev, "%s: Slave bind failed, ret = %d\n",
  2315. __func__, ret);
  2316. goto err_bind_all;
  2317. }
  2318. ret = rouleur_parse_port_mapping(dev, "qcom,rx_swr_ch_map", CODEC_RX);
  2319. ret |= rouleur_parse_port_mapping(dev, "qcom,tx_swr_ch_map", CODEC_TX);
  2320. if (ret) {
  2321. dev_err(dev, "Failed to read port mapping\n");
  2322. goto err;
  2323. }
  2324. rouleur->rx_swr_dev = get_matching_swr_slave_device(pdata->rx_slave);
  2325. if (!rouleur->rx_swr_dev) {
  2326. dev_err(dev, "%s: Could not find RX swr slave device\n",
  2327. __func__);
  2328. ret = -ENODEV;
  2329. goto err;
  2330. }
  2331. rouleur->tx_swr_dev = get_matching_swr_slave_device(pdata->tx_slave);
  2332. if (!rouleur->tx_swr_dev) {
  2333. dev_err(dev, "%s: Could not find TX swr slave device\n",
  2334. __func__);
  2335. ret = -ENODEV;
  2336. goto err;
  2337. }
  2338. rouleur->regmap = devm_regmap_init_swr(rouleur->tx_swr_dev,
  2339. &rouleur_regmap_config);
  2340. if (!rouleur->regmap) {
  2341. dev_err(dev, "%s: Regmap init failed\n",
  2342. __func__);
  2343. goto err;
  2344. }
  2345. /* Set all interupts as edge triggered */
  2346. for (i = 0; i < rouleur_regmap_irq_chip.num_regs; i++)
  2347. regmap_write(rouleur->regmap,
  2348. (ROULEUR_DIG_SWR_INTR_LEVEL_0 + i), 0);
  2349. rouleur_regmap_irq_chip.irq_drv_data = rouleur;
  2350. rouleur->irq_info.wcd_regmap_irq_chip = &rouleur_regmap_irq_chip;
  2351. rouleur->irq_info.codec_name = "rouleur";
  2352. rouleur->irq_info.regmap = rouleur->regmap;
  2353. rouleur->irq_info.dev = dev;
  2354. ret = wcd_irq_init(&rouleur->irq_info, &rouleur->virq);
  2355. if (ret) {
  2356. dev_err(dev, "%s: IRQ init failed: %d\n",
  2357. __func__, ret);
  2358. goto err;
  2359. }
  2360. rouleur->tx_swr_dev->slave_irq = rouleur->virq;
  2361. mutex_init(&rouleur->micb_lock);
  2362. mutex_init(&rouleur->main_bias_lock);
  2363. mutex_init(&rouleur->rx_clk_lock);
  2364. ret = rouleur_set_micbias_data(rouleur, pdata);
  2365. if (ret < 0) {
  2366. dev_err(dev, "%s: bad micbias pdata\n", __func__);
  2367. goto err_irq;
  2368. }
  2369. /* Request for watchdog interrupt */
  2370. wcd_request_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHR_PDM_WD_INT,
  2371. "HPHR PDM WD INT", rouleur_wd_handle_irq, NULL);
  2372. wcd_request_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHL_PDM_WD_INT,
  2373. "HPHL PDM WD INT", rouleur_wd_handle_irq, NULL);
  2374. /* Disable watchdog interrupt for HPH */
  2375. wcd_disable_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHR_PDM_WD_INT);
  2376. wcd_disable_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHL_PDM_WD_INT);
  2377. ret = snd_soc_register_component(dev, &soc_codec_dev_rouleur,
  2378. NULL, 0);
  2379. if (ret) {
  2380. dev_err(dev, "%s: Codec registration failed\n",
  2381. __func__);
  2382. goto err_irq;
  2383. }
  2384. return ret;
  2385. err_irq:
  2386. wcd_irq_exit(&rouleur->irq_info, rouleur->virq);
  2387. mutex_destroy(&rouleur->micb_lock);
  2388. mutex_destroy(&rouleur->main_bias_lock);
  2389. mutex_destroy(&rouleur->rx_clk_lock);
  2390. err:
  2391. component_unbind_all(dev, rouleur);
  2392. err_bind_all:
  2393. dev_set_drvdata(dev, NULL);
  2394. kfree(pdata);
  2395. kfree(rouleur);
  2396. return ret;
  2397. }
  2398. static void rouleur_unbind(struct device *dev)
  2399. {
  2400. struct rouleur_priv *rouleur = dev_get_drvdata(dev);
  2401. struct rouleur_pdata *pdata = dev_get_platdata(rouleur->dev);
  2402. wcd_irq_exit(&rouleur->irq_info, rouleur->virq);
  2403. snd_soc_unregister_component(dev);
  2404. component_unbind_all(dev, rouleur);
  2405. mutex_destroy(&rouleur->micb_lock);
  2406. mutex_destroy(&rouleur->main_bias_lock);
  2407. mutex_destroy(&rouleur->rx_clk_lock);
  2408. dev_set_drvdata(dev, NULL);
  2409. kfree(pdata);
  2410. kfree(rouleur);
  2411. }
  2412. static const struct of_device_id rouleur_dt_match[] = {
  2413. { .compatible = "qcom,rouleur-codec" , .data = "rouleur" },
  2414. {}
  2415. };
  2416. static const struct component_master_ops rouleur_comp_ops = {
  2417. .bind = rouleur_bind,
  2418. .unbind = rouleur_unbind,
  2419. };
  2420. static int rouleur_compare_of(struct device *dev, void *data)
  2421. {
  2422. return dev->of_node == data;
  2423. }
  2424. static void rouleur_release_of(struct device *dev, void *data)
  2425. {
  2426. of_node_put(data);
  2427. }
  2428. static int rouleur_add_slave_components(struct device *dev,
  2429. struct component_match **matchptr)
  2430. {
  2431. struct device_node *np, *rx_node, *tx_node;
  2432. np = dev->of_node;
  2433. rx_node = of_parse_phandle(np, "qcom,rx-slave", 0);
  2434. if (!rx_node) {
  2435. dev_err(dev, "%s: Rx-slave node not defined\n", __func__);
  2436. return -ENODEV;
  2437. }
  2438. of_node_get(rx_node);
  2439. component_match_add_release(dev, matchptr,
  2440. rouleur_release_of,
  2441. rouleur_compare_of,
  2442. rx_node);
  2443. tx_node = of_parse_phandle(np, "qcom,tx-slave", 0);
  2444. if (!tx_node) {
  2445. dev_err(dev, "%s: Tx-slave node not defined\n", __func__);
  2446. return -ENODEV;
  2447. }
  2448. of_node_get(tx_node);
  2449. component_match_add_release(dev, matchptr,
  2450. rouleur_release_of,
  2451. rouleur_compare_of,
  2452. tx_node);
  2453. return 0;
  2454. }
  2455. static int rouleur_probe(struct platform_device *pdev)
  2456. {
  2457. struct component_match *match = NULL;
  2458. int ret;
  2459. ret = rouleur_add_slave_components(&pdev->dev, &match);
  2460. if (ret)
  2461. return ret;
  2462. return component_master_add_with_match(&pdev->dev,
  2463. &rouleur_comp_ops, match);
  2464. }
  2465. static int rouleur_remove(struct platform_device *pdev)
  2466. {
  2467. component_master_del(&pdev->dev, &rouleur_comp_ops);
  2468. dev_set_drvdata(&pdev->dev, NULL);
  2469. return 0;
  2470. }
  2471. #ifdef CONFIG_PM_SLEEP
  2472. static const struct dev_pm_ops rouleur_dev_pm_ops = {
  2473. .suspend_late = rouleur_suspend,
  2474. .resume_early = rouleur_resume
  2475. };
  2476. #endif
  2477. static struct platform_driver rouleur_codec_driver = {
  2478. .probe = rouleur_probe,
  2479. .remove = rouleur_remove,
  2480. .driver = {
  2481. .name = "rouleur_codec",
  2482. .owner = THIS_MODULE,
  2483. .of_match_table = of_match_ptr(rouleur_dt_match),
  2484. #ifdef CONFIG_PM_SLEEP
  2485. .pm = &rouleur_dev_pm_ops,
  2486. #endif
  2487. .suppress_bind_attrs = true,
  2488. },
  2489. };
  2490. module_platform_driver(rouleur_codec_driver);
  2491. MODULE_DESCRIPTION("Rouleur Codec driver");
  2492. MODULE_LICENSE("GPL v2");