sm6150.c 242 KB

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  1. /*
  2. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/delay.h>
  15. #include <linux/gpio.h>
  16. #include <linux/of_gpio.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/slab.h>
  19. #include <linux/io.h>
  20. #include <linux/module.h>
  21. #include <linux/input.h>
  22. #include <linux/of_device.h>
  23. #include <linux/pm_qos.h>
  24. #include <sound/core.h>
  25. #include <sound/soc.h>
  26. #include <sound/soc-dapm.h>
  27. #include <sound/pcm.h>
  28. #include <sound/pcm_params.h>
  29. #include <sound/info.h>
  30. #include <soc/snd_event.h>
  31. #include <dsp/q6afe-v2.h>
  32. #include <dsp/q6core.h>
  33. #include "device_event.h"
  34. #include "msm-pcm-routing-v2.h"
  35. #include "codecs/msm-cdc-pinctrl.h"
  36. #include "codecs/wcd934x/wcd934x.h"
  37. #include "codecs/wcd934x/wcd934x-mbhc.h"
  38. #include "codecs/wcd937x/wcd937x-mbhc.h"
  39. #include "codecs/wsa881x.h"
  40. #include "codecs/bolero/bolero-cdc.h"
  41. #include <dt-bindings/sound/audio-codec-port-types.h>
  42. #include "codecs/bolero/wsa-macro.h"
  43. #include "codecs/wcd937x/internal.h"
  44. #define DRV_NAME "sm6150-asoc-snd"
  45. #define __CHIPSET__ "SM6150 "
  46. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  47. #define SAMPLING_RATE_8KHZ 8000
  48. #define SAMPLING_RATE_11P025KHZ 11025
  49. #define SAMPLING_RATE_16KHZ 16000
  50. #define SAMPLING_RATE_22P05KHZ 22050
  51. #define SAMPLING_RATE_32KHZ 32000
  52. #define SAMPLING_RATE_44P1KHZ 44100
  53. #define SAMPLING_RATE_48KHZ 48000
  54. #define SAMPLING_RATE_88P2KHZ 88200
  55. #define SAMPLING_RATE_96KHZ 96000
  56. #define SAMPLING_RATE_176P4KHZ 176400
  57. #define SAMPLING_RATE_192KHZ 192000
  58. #define SAMPLING_RATE_352P8KHZ 352800
  59. #define SAMPLING_RATE_384KHZ 384000
  60. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  61. #define WCD9XXX_MBHC_DEF_RLOADS 5
  62. #define CODEC_EXT_CLK_RATE 9600000
  63. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  64. #define DEV_NAME_STR_LEN 32
  65. #define WSA8810_NAME_1 "wsa881x.20170211"
  66. #define WSA8810_NAME_2 "wsa881x.20170212"
  67. #define WCN_CDC_SLIM_RX_CH_MAX 2
  68. #define WCN_CDC_SLIM_TX_CH_MAX 3
  69. #define TDM_CHANNEL_MAX 8
  70. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  71. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  72. #define MSM_HIFI_ON 1
  73. enum {
  74. SLIM_RX_0 = 0,
  75. SLIM_RX_1,
  76. SLIM_RX_2,
  77. SLIM_RX_3,
  78. SLIM_RX_4,
  79. SLIM_RX_5,
  80. SLIM_RX_6,
  81. SLIM_RX_7,
  82. SLIM_RX_MAX,
  83. };
  84. enum {
  85. SLIM_TX_0 = 0,
  86. SLIM_TX_1,
  87. SLIM_TX_2,
  88. SLIM_TX_3,
  89. SLIM_TX_4,
  90. SLIM_TX_5,
  91. SLIM_TX_6,
  92. SLIM_TX_7,
  93. SLIM_TX_8,
  94. SLIM_TX_MAX,
  95. };
  96. enum {
  97. PRIM_MI2S = 0,
  98. SEC_MI2S,
  99. TERT_MI2S,
  100. QUAT_MI2S,
  101. QUIN_MI2S,
  102. MI2S_MAX,
  103. };
  104. enum {
  105. PRIM_AUX_PCM = 0,
  106. SEC_AUX_PCM,
  107. TERT_AUX_PCM,
  108. QUAT_AUX_PCM,
  109. QUIN_AUX_PCM,
  110. AUX_PCM_MAX,
  111. };
  112. enum {
  113. WSA_CDC_DMA_RX_0 = 0,
  114. WSA_CDC_DMA_RX_1,
  115. RX_CDC_DMA_RX_0,
  116. RX_CDC_DMA_RX_1,
  117. RX_CDC_DMA_RX_2,
  118. RX_CDC_DMA_RX_3,
  119. RX_CDC_DMA_RX_5,
  120. CDC_DMA_RX_MAX,
  121. };
  122. enum {
  123. WSA_CDC_DMA_TX_0 = 0,
  124. WSA_CDC_DMA_TX_1,
  125. WSA_CDC_DMA_TX_2,
  126. TX_CDC_DMA_TX_0,
  127. TX_CDC_DMA_TX_3,
  128. TX_CDC_DMA_TX_4,
  129. CDC_DMA_TX_MAX,
  130. };
  131. struct mi2s_conf {
  132. struct mutex lock;
  133. u32 ref_cnt;
  134. u32 msm_is_mi2s_master;
  135. };
  136. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  137. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  138. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  139. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  140. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
  141. Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
  142. };
  143. struct dev_config {
  144. u32 sample_rate;
  145. u32 bit_format;
  146. u32 channels;
  147. };
  148. enum {
  149. DP_RX_IDX = 0,
  150. EXT_DISP_RX_IDX_MAX,
  151. };
  152. struct msm_wsa881x_dev_info {
  153. struct device_node *of_node;
  154. u32 index;
  155. };
  156. struct aux_codec_dev_info {
  157. struct device_node *of_node;
  158. u32 index;
  159. };
  160. enum pinctrl_pin_state {
  161. STATE_DISABLE = 0, /* All pins are in sleep state */
  162. STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
  163. STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
  164. };
  165. struct msm_pinctrl_info {
  166. struct pinctrl *pinctrl;
  167. struct pinctrl_state *mi2s_disable;
  168. struct pinctrl_state *tdm_disable;
  169. struct pinctrl_state *mi2s_active;
  170. struct pinctrl_state *tdm_active;
  171. enum pinctrl_pin_state curr_state;
  172. };
  173. struct msm_asoc_mach_data {
  174. struct snd_info_entry *codec_root;
  175. struct msm_pinctrl_info pinctrl_info;
  176. int usbc_en2_gpio; /* used by gpio driver API */
  177. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  178. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  179. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  180. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  181. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  182. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  183. bool is_afe_config_done;
  184. };
  185. struct msm_asoc_wcd93xx_codec {
  186. void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
  187. enum afe_config_type config_type);
  188. };
  189. static const char *const pin_states[] = {"sleep", "i2s-active",
  190. "tdm-active"};
  191. static struct snd_soc_card snd_soc_card_sm6150_msm;
  192. enum {
  193. TDM_0 = 0,
  194. TDM_1,
  195. TDM_2,
  196. TDM_3,
  197. TDM_4,
  198. TDM_5,
  199. TDM_6,
  200. TDM_7,
  201. TDM_PORT_MAX,
  202. };
  203. enum {
  204. TDM_PRI = 0,
  205. TDM_SEC,
  206. TDM_TERT,
  207. TDM_QUAT,
  208. TDM_QUIN,
  209. TDM_INTERFACE_MAX,
  210. };
  211. struct tdm_port {
  212. u32 mode;
  213. u32 channel;
  214. };
  215. /* TDM default config */
  216. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  217. { /* PRI TDM */
  218. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  219. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  220. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  221. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  222. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  223. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  224. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  225. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  226. },
  227. { /* SEC TDM */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  230. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  231. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  232. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  233. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  236. },
  237. { /* TERT TDM */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  242. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  243. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  246. },
  247. { /* QUAT TDM */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  252. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  253. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  254. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  255. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  256. },
  257. { /* QUIN TDM */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  262. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  263. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  264. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  265. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  266. }
  267. };
  268. /* TDM default config */
  269. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  270. { /* PRI TDM */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  272. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  273. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  274. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  275. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  276. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  277. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  278. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  279. },
  280. { /* SEC TDM */
  281. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  282. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  284. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  285. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  286. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  287. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  288. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  289. },
  290. { /* TERT TDM */
  291. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  292. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  293. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  294. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  295. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  296. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  297. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  298. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  299. },
  300. { /* QUAT TDM */
  301. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  302. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  303. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  304. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  305. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  306. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  307. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  308. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  309. },
  310. { /* QUIN TDM */
  311. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  312. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  313. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  314. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  315. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  316. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  317. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  318. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  319. }
  320. };
  321. /* Default configuration of slimbus channels */
  322. static struct dev_config slim_rx_cfg[] = {
  323. [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  324. [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  325. [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  326. [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  327. [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  328. [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  329. [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  330. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  331. };
  332. static struct dev_config slim_tx_cfg[] = {
  333. [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  334. [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  335. [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  336. [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  337. [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  338. [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  339. [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  340. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  341. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  342. };
  343. /* Default configuration of Codec DMA Interface Tx */
  344. static struct dev_config cdc_dma_rx_cfg[] = {
  345. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  346. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  347. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  348. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  349. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  350. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  351. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  352. };
  353. /* Default configuration of Codec DMA Interface Rx */
  354. static struct dev_config cdc_dma_tx_cfg[] = {
  355. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  356. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  357. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  358. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  359. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  360. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  361. };
  362. /* Default configuration of external display BE */
  363. static struct dev_config ext_disp_rx_cfg[] = {
  364. [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  365. };
  366. static struct dev_config usb_rx_cfg = {
  367. .sample_rate = SAMPLING_RATE_48KHZ,
  368. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  369. .channels = 2,
  370. };
  371. static struct dev_config usb_tx_cfg = {
  372. .sample_rate = SAMPLING_RATE_48KHZ,
  373. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  374. .channels = 1,
  375. };
  376. static struct dev_config proxy_rx_cfg = {
  377. .sample_rate = SAMPLING_RATE_48KHZ,
  378. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  379. .channels = 2,
  380. };
  381. /* Default configuration of MI2S channels */
  382. static struct dev_config mi2s_rx_cfg[] = {
  383. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  384. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  385. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  386. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  387. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  388. };
  389. static struct dev_config mi2s_tx_cfg[] = {
  390. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  391. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  392. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  393. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  394. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  395. };
  396. static struct dev_config aux_pcm_rx_cfg[] = {
  397. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  398. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  399. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  400. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  401. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  402. };
  403. static struct dev_config aux_pcm_tx_cfg[] = {
  404. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  405. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  406. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  407. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  408. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  409. };
  410. static int msm_vi_feed_tx_ch = 2;
  411. static const char *const slim_rx_ch_text[] = {"One", "Two"};
  412. static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
  413. "Five", "Six", "Seven",
  414. "Eight"};
  415. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  416. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  417. "S32_LE"};
  418. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  419. "S24_3LE"};
  420. static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  421. "KHZ_32", "KHZ_44P1", "KHZ_48",
  422. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  423. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  424. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  425. "KHZ_44P1", "KHZ_48",
  426. "KHZ_88P2", "KHZ_96"};
  427. static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
  428. "KHZ_44P1", "KHZ_48",
  429. "KHZ_88P2", "KHZ_96"};
  430. static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
  431. "KHZ_44P1", "KHZ_48",
  432. "KHZ_88P2", "KHZ_96"};
  433. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  434. "Five", "Six", "Seven",
  435. "Eight"};
  436. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  437. "Six", "Seven", "Eight"};
  438. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  439. "KHZ_16", "KHZ_22P05",
  440. "KHZ_32", "KHZ_44P1", "KHZ_48",
  441. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  442. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  443. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  444. "KHZ_192", "KHZ_32", "KHZ_44P1",
  445. "KHZ_88P2", "KHZ_176P4" };
  446. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  447. "Five", "Six", "Seven", "Eight"};
  448. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  449. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  450. "KHZ_48", "KHZ_176P4",
  451. "KHZ_352P8"};
  452. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  453. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  454. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  455. "KHZ_48", "KHZ_96", "KHZ_192"};
  456. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  457. "Five", "Six", "Seven",
  458. "Eight"};
  459. static const char *const hifi_text[] = {"Off", "On"};
  460. static const char *const qos_text[] = {"Disable", "Enable"};
  461. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  462. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  463. "Five", "Six", "Seven",
  464. "Eight"};
  465. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  466. "KHZ_16", "KHZ_22P05",
  467. "KHZ_32", "KHZ_44P1", "KHZ_48",
  468. "KHZ_88P2", "KHZ_96",
  469. "KHZ_176P4", "KHZ_192",
  470. "KHZ_352P8", "KHZ_384"};
  471. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
  473. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
  475. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
  477. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  479. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  481. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
  483. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
  485. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
  486. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  487. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  488. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  489. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
  490. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
  491. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
  492. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
  493. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
  494. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
  496. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
  497. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  498. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  499. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  500. ext_disp_sample_rate_text);
  501. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  502. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  503. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  504. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  505. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  506. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  507. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  508. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  509. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  510. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  511. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  512. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  513. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  514. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  515. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  516. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  517. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  518. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  519. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  520. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  521. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
  522. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  523. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  524. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  525. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  526. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
  527. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  528. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  529. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  530. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  531. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  532. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  533. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  534. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  535. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
  536. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
  537. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  538. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  539. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  540. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  541. static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
  542. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  543. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  544. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  545. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  546. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  547. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  548. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  549. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  550. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  551. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  552. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  553. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  554. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  555. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  556. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  557. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  558. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  559. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  560. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  561. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  562. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  563. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  564. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  565. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  566. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  567. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  568. cdc_dma_sample_rate_text);
  569. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  570. cdc_dma_sample_rate_text);
  571. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  572. cdc_dma_sample_rate_text);
  573. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  574. cdc_dma_sample_rate_text);
  575. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  576. cdc_dma_sample_rate_text);
  577. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  578. cdc_dma_sample_rate_text);
  579. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  580. cdc_dma_sample_rate_text);
  581. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  582. cdc_dma_sample_rate_text);
  583. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  584. cdc_dma_sample_rate_text);
  585. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  586. cdc_dma_sample_rate_text);
  587. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  588. cdc_dma_sample_rate_text);
  589. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  590. cdc_dma_sample_rate_text);
  591. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  592. cdc_dma_sample_rate_text);
  593. static int msm_hifi_control;
  594. static bool codec_reg_done;
  595. static struct snd_soc_aux_dev *msm_aux_dev;
  596. static struct snd_soc_codec_conf *msm_codec_conf;
  597. static struct msm_asoc_wcd93xx_codec msm_codec_fn;
  598. static int dmic_0_1_gpio_cnt;
  599. static int dmic_2_3_gpio_cnt;
  600. static void *def_wcd_mbhc_cal(void);
  601. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  602. int enable, bool dapm);
  603. static int msm_wsa881x_init(struct snd_soc_component *component);
  604. static int msm_aux_codec_init(struct snd_soc_component *component);
  605. /*
  606. * Need to report LINEIN
  607. * if R/L channel impedance is larger than 5K ohm
  608. */
  609. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  610. .read_fw_bin = false,
  611. .calibration = NULL,
  612. .detect_extn_cable = true,
  613. .mono_stero_detection = false,
  614. .swap_gnd_mic = NULL,
  615. .hs_ext_micbias = true,
  616. .key_code[0] = KEY_MEDIA,
  617. .key_code[1] = KEY_VOICECOMMAND,
  618. .key_code[2] = KEY_VOLUMEUP,
  619. .key_code[3] = KEY_VOLUMEDOWN,
  620. .key_code[4] = 0,
  621. .key_code[5] = 0,
  622. .key_code[6] = 0,
  623. .key_code[7] = 0,
  624. .linein_th = 5000,
  625. .moisture_en = true,
  626. .mbhc_micbias = MIC_BIAS_2,
  627. .anc_micbias = MIC_BIAS_2,
  628. .enable_anc_mic_detect = false,
  629. };
  630. static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
  631. {"MIC BIAS1", NULL, "MCLK TX"},
  632. {"MIC BIAS2", NULL, "MCLK TX"},
  633. {"MIC BIAS3", NULL, "MCLK TX"},
  634. {"MIC BIAS4", NULL, "MCLK TX"},
  635. };
  636. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  637. {
  638. AFE_API_VERSION_I2S_CONFIG,
  639. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  640. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  641. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  642. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  643. 0,
  644. },
  645. {
  646. AFE_API_VERSION_I2S_CONFIG,
  647. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  648. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  649. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  650. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  651. 0,
  652. },
  653. {
  654. AFE_API_VERSION_I2S_CONFIG,
  655. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  656. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  657. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  658. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  659. 0,
  660. },
  661. {
  662. AFE_API_VERSION_I2S_CONFIG,
  663. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  664. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  665. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  666. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  667. 0,
  668. },
  669. {
  670. AFE_API_VERSION_I2S_CONFIG,
  671. Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
  672. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  673. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  674. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  675. 0,
  676. }
  677. };
  678. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  679. static int slim_get_sample_rate_val(int sample_rate)
  680. {
  681. int sample_rate_val = 0;
  682. switch (sample_rate) {
  683. case SAMPLING_RATE_8KHZ:
  684. sample_rate_val = 0;
  685. break;
  686. case SAMPLING_RATE_16KHZ:
  687. sample_rate_val = 1;
  688. break;
  689. case SAMPLING_RATE_32KHZ:
  690. sample_rate_val = 2;
  691. break;
  692. case SAMPLING_RATE_44P1KHZ:
  693. sample_rate_val = 3;
  694. break;
  695. case SAMPLING_RATE_48KHZ:
  696. sample_rate_val = 4;
  697. break;
  698. case SAMPLING_RATE_88P2KHZ:
  699. sample_rate_val = 5;
  700. break;
  701. case SAMPLING_RATE_96KHZ:
  702. sample_rate_val = 6;
  703. break;
  704. case SAMPLING_RATE_176P4KHZ:
  705. sample_rate_val = 7;
  706. break;
  707. case SAMPLING_RATE_192KHZ:
  708. sample_rate_val = 8;
  709. break;
  710. case SAMPLING_RATE_352P8KHZ:
  711. sample_rate_val = 9;
  712. break;
  713. case SAMPLING_RATE_384KHZ:
  714. sample_rate_val = 10;
  715. break;
  716. default:
  717. sample_rate_val = 4;
  718. break;
  719. }
  720. return sample_rate_val;
  721. }
  722. static int slim_get_sample_rate(int value)
  723. {
  724. int sample_rate = 0;
  725. switch (value) {
  726. case 0:
  727. sample_rate = SAMPLING_RATE_8KHZ;
  728. break;
  729. case 1:
  730. sample_rate = SAMPLING_RATE_16KHZ;
  731. break;
  732. case 2:
  733. sample_rate = SAMPLING_RATE_32KHZ;
  734. break;
  735. case 3:
  736. sample_rate = SAMPLING_RATE_44P1KHZ;
  737. break;
  738. case 4:
  739. sample_rate = SAMPLING_RATE_48KHZ;
  740. break;
  741. case 5:
  742. sample_rate = SAMPLING_RATE_88P2KHZ;
  743. break;
  744. case 6:
  745. sample_rate = SAMPLING_RATE_96KHZ;
  746. break;
  747. case 7:
  748. sample_rate = SAMPLING_RATE_176P4KHZ;
  749. break;
  750. case 8:
  751. sample_rate = SAMPLING_RATE_192KHZ;
  752. break;
  753. case 9:
  754. sample_rate = SAMPLING_RATE_352P8KHZ;
  755. break;
  756. case 10:
  757. sample_rate = SAMPLING_RATE_384KHZ;
  758. break;
  759. default:
  760. sample_rate = SAMPLING_RATE_48KHZ;
  761. break;
  762. }
  763. return sample_rate;
  764. }
  765. static int slim_get_bit_format_val(int bit_format)
  766. {
  767. int val = 0;
  768. switch (bit_format) {
  769. case SNDRV_PCM_FORMAT_S32_LE:
  770. val = 3;
  771. break;
  772. case SNDRV_PCM_FORMAT_S24_3LE:
  773. val = 2;
  774. break;
  775. case SNDRV_PCM_FORMAT_S24_LE:
  776. val = 1;
  777. break;
  778. case SNDRV_PCM_FORMAT_S16_LE:
  779. default:
  780. val = 0;
  781. break;
  782. }
  783. return val;
  784. }
  785. static int slim_get_bit_format(int val)
  786. {
  787. int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  788. switch (val) {
  789. case 0:
  790. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  791. break;
  792. case 1:
  793. bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
  794. break;
  795. case 2:
  796. bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
  797. break;
  798. case 3:
  799. bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
  800. break;
  801. default:
  802. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  803. break;
  804. }
  805. return bit_fmt;
  806. }
  807. static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
  808. {
  809. int port_id = 0;
  810. if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
  811. port_id = SLIM_RX_0;
  812. } else if (strnstr(kcontrol->id.name,
  813. "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
  814. port_id = SLIM_RX_2;
  815. } else if (strnstr(kcontrol->id.name,
  816. "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
  817. port_id = SLIM_RX_5;
  818. } else if (strnstr(kcontrol->id.name,
  819. "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
  820. port_id = SLIM_RX_6;
  821. } else if (strnstr(kcontrol->id.name,
  822. "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
  823. port_id = SLIM_TX_0;
  824. } else if (strnstr(kcontrol->id.name,
  825. "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
  826. port_id = SLIM_TX_1;
  827. } else {
  828. pr_err("%s: unsupported channel: %s\n",
  829. __func__, kcontrol->id.name);
  830. return -EINVAL;
  831. }
  832. return port_id;
  833. }
  834. static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  835. struct snd_ctl_elem_value *ucontrol)
  836. {
  837. int ch_num = slim_get_port_idx(kcontrol);
  838. if (ch_num < 0)
  839. return ch_num;
  840. ucontrol->value.enumerated.item[0] =
  841. slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
  842. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  843. ch_num, slim_rx_cfg[ch_num].sample_rate,
  844. ucontrol->value.enumerated.item[0]);
  845. return 0;
  846. }
  847. static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  848. struct snd_ctl_elem_value *ucontrol)
  849. {
  850. int ch_num = slim_get_port_idx(kcontrol);
  851. if (ch_num < 0)
  852. return ch_num;
  853. slim_rx_cfg[ch_num].sample_rate =
  854. slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  855. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  856. ch_num, slim_rx_cfg[ch_num].sample_rate,
  857. ucontrol->value.enumerated.item[0]);
  858. return 0;
  859. }
  860. static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  861. struct snd_ctl_elem_value *ucontrol)
  862. {
  863. int ch_num = slim_get_port_idx(kcontrol);
  864. if (ch_num < 0)
  865. return ch_num;
  866. ucontrol->value.enumerated.item[0] =
  867. slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
  868. pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  869. ch_num, slim_tx_cfg[ch_num].sample_rate,
  870. ucontrol->value.enumerated.item[0]);
  871. return 0;
  872. }
  873. static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  874. struct snd_ctl_elem_value *ucontrol)
  875. {
  876. int sample_rate = 0;
  877. int ch_num = slim_get_port_idx(kcontrol);
  878. if (ch_num < 0)
  879. return ch_num;
  880. sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  881. if (sample_rate == SAMPLING_RATE_44P1KHZ) {
  882. pr_err("%s: Unsupported sample rate %d: for Tx path\n",
  883. __func__, sample_rate);
  884. return -EINVAL;
  885. }
  886. slim_tx_cfg[ch_num].sample_rate = sample_rate;
  887. pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
  888. ch_num, slim_tx_cfg[ch_num].sample_rate,
  889. ucontrol->value.enumerated.item[0]);
  890. return 0;
  891. }
  892. static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
  893. struct snd_ctl_elem_value *ucontrol)
  894. {
  895. int ch_num = slim_get_port_idx(kcontrol);
  896. if (ch_num < 0)
  897. return ch_num;
  898. ucontrol->value.enumerated.item[0] =
  899. slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
  900. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  901. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  902. ucontrol->value.enumerated.item[0]);
  903. return 0;
  904. }
  905. static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
  906. struct snd_ctl_elem_value *ucontrol)
  907. {
  908. int ch_num = slim_get_port_idx(kcontrol);
  909. if (ch_num < 0)
  910. return ch_num;
  911. slim_rx_cfg[ch_num].bit_format =
  912. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  913. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  914. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  915. ucontrol->value.enumerated.item[0]);
  916. return 0;
  917. }
  918. static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
  919. struct snd_ctl_elem_value *ucontrol)
  920. {
  921. int ch_num = slim_get_port_idx(kcontrol);
  922. if (ch_num < 0)
  923. return ch_num;
  924. ucontrol->value.enumerated.item[0] =
  925. slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
  926. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  927. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  928. ucontrol->value.enumerated.item[0]);
  929. return 0;
  930. }
  931. static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
  932. struct snd_ctl_elem_value *ucontrol)
  933. {
  934. int ch_num = slim_get_port_idx(kcontrol);
  935. if (ch_num < 0)
  936. return ch_num;
  937. slim_tx_cfg[ch_num].bit_format =
  938. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  939. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  940. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  941. ucontrol->value.enumerated.item[0]);
  942. return 0;
  943. }
  944. static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
  945. struct snd_ctl_elem_value *ucontrol)
  946. {
  947. int ch_num = slim_get_port_idx(kcontrol);
  948. if (ch_num < 0)
  949. return ch_num;
  950. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  951. ch_num, slim_rx_cfg[ch_num].channels);
  952. ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
  953. return 0;
  954. }
  955. static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
  956. struct snd_ctl_elem_value *ucontrol)
  957. {
  958. int ch_num = slim_get_port_idx(kcontrol);
  959. if (ch_num < 0)
  960. return ch_num;
  961. slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  962. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  963. ch_num, slim_rx_cfg[ch_num].channels);
  964. return 1;
  965. }
  966. static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
  967. struct snd_ctl_elem_value *ucontrol)
  968. {
  969. int ch_num = slim_get_port_idx(kcontrol);
  970. if (ch_num < 0)
  971. return ch_num;
  972. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  973. ch_num, slim_tx_cfg[ch_num].channels);
  974. ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
  975. return 0;
  976. }
  977. static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
  978. struct snd_ctl_elem_value *ucontrol)
  979. {
  980. int ch_num = slim_get_port_idx(kcontrol);
  981. if (ch_num < 0)
  982. return ch_num;
  983. slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  984. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  985. ch_num, slim_tx_cfg[ch_num].channels);
  986. return 1;
  987. }
  988. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  989. struct snd_ctl_elem_value *ucontrol)
  990. {
  991. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  992. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  993. ucontrol->value.integer.value[0]);
  994. return 0;
  995. }
  996. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  997. struct snd_ctl_elem_value *ucontrol)
  998. {
  999. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  1000. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  1001. return 1;
  1002. }
  1003. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  1004. struct snd_ctl_elem_value *ucontrol)
  1005. {
  1006. /*
  1007. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  1008. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  1009. * value.
  1010. */
  1011. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1012. case SAMPLING_RATE_96KHZ:
  1013. ucontrol->value.integer.value[0] = 5;
  1014. break;
  1015. case SAMPLING_RATE_88P2KHZ:
  1016. ucontrol->value.integer.value[0] = 4;
  1017. break;
  1018. case SAMPLING_RATE_48KHZ:
  1019. ucontrol->value.integer.value[0] = 3;
  1020. break;
  1021. case SAMPLING_RATE_44P1KHZ:
  1022. ucontrol->value.integer.value[0] = 2;
  1023. break;
  1024. case SAMPLING_RATE_16KHZ:
  1025. ucontrol->value.integer.value[0] = 1;
  1026. break;
  1027. case SAMPLING_RATE_8KHZ:
  1028. default:
  1029. ucontrol->value.integer.value[0] = 0;
  1030. break;
  1031. }
  1032. pr_debug("%s: sample rate = %d\n", __func__,
  1033. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1034. return 0;
  1035. }
  1036. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  1037. struct snd_ctl_elem_value *ucontrol)
  1038. {
  1039. switch (ucontrol->value.integer.value[0]) {
  1040. case 1:
  1041. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1042. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1043. break;
  1044. case 2:
  1045. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1046. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1047. break;
  1048. case 3:
  1049. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1050. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1051. break;
  1052. case 4:
  1053. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1054. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1055. break;
  1056. case 5:
  1057. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1058. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1059. break;
  1060. case 0:
  1061. default:
  1062. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1063. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1064. break;
  1065. }
  1066. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  1067. __func__,
  1068. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1069. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1070. ucontrol->value.enumerated.item[0]);
  1071. return 0;
  1072. }
  1073. static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
  1074. struct snd_ctl_elem_value *ucontrol)
  1075. {
  1076. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1077. case SAMPLING_RATE_96KHZ:
  1078. ucontrol->value.integer.value[0] = 5;
  1079. break;
  1080. case SAMPLING_RATE_88P2KHZ:
  1081. ucontrol->value.integer.value[0] = 4;
  1082. break;
  1083. case SAMPLING_RATE_48KHZ:
  1084. ucontrol->value.integer.value[0] = 3;
  1085. break;
  1086. case SAMPLING_RATE_44P1KHZ:
  1087. ucontrol->value.integer.value[0] = 2;
  1088. break;
  1089. case SAMPLING_RATE_16KHZ:
  1090. ucontrol->value.integer.value[0] = 1;
  1091. break;
  1092. case SAMPLING_RATE_8KHZ:
  1093. default:
  1094. ucontrol->value.integer.value[0] = 0;
  1095. break;
  1096. }
  1097. pr_debug("%s: sample rate rx = %d", __func__,
  1098. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1099. return 0;
  1100. }
  1101. static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
  1102. struct snd_ctl_elem_value *ucontrol)
  1103. {
  1104. switch (ucontrol->value.integer.value[0]) {
  1105. case 1:
  1106. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1107. break;
  1108. case 2:
  1109. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1110. break;
  1111. case 3:
  1112. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1113. break;
  1114. case 4:
  1115. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1116. break;
  1117. case 5:
  1118. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1119. break;
  1120. case 0:
  1121. default:
  1122. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1123. break;
  1124. }
  1125. pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
  1126. __func__,
  1127. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1128. ucontrol->value.enumerated.item[0]);
  1129. return 0;
  1130. }
  1131. static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
  1132. struct snd_ctl_elem_value *ucontrol)
  1133. {
  1134. switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
  1135. case SAMPLING_RATE_96KHZ:
  1136. ucontrol->value.integer.value[0] = 5;
  1137. break;
  1138. case SAMPLING_RATE_88P2KHZ:
  1139. ucontrol->value.integer.value[0] = 4;
  1140. break;
  1141. case SAMPLING_RATE_48KHZ:
  1142. ucontrol->value.integer.value[0] = 3;
  1143. break;
  1144. case SAMPLING_RATE_44P1KHZ:
  1145. ucontrol->value.integer.value[0] = 2;
  1146. break;
  1147. case SAMPLING_RATE_16KHZ:
  1148. ucontrol->value.integer.value[0] = 1;
  1149. break;
  1150. case SAMPLING_RATE_8KHZ:
  1151. default:
  1152. ucontrol->value.integer.value[0] = 0;
  1153. break;
  1154. }
  1155. pr_debug("%s: sample rate tx = %d", __func__,
  1156. slim_tx_cfg[SLIM_TX_7].sample_rate);
  1157. return 0;
  1158. }
  1159. static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
  1160. struct snd_ctl_elem_value *ucontrol)
  1161. {
  1162. switch (ucontrol->value.integer.value[0]) {
  1163. case 1:
  1164. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1165. break;
  1166. case 2:
  1167. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1168. break;
  1169. case 3:
  1170. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1171. break;
  1172. case 4:
  1173. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1174. break;
  1175. case 5:
  1176. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1177. break;
  1178. case 0:
  1179. default:
  1180. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1181. break;
  1182. }
  1183. pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
  1184. __func__,
  1185. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1186. ucontrol->value.enumerated.item[0]);
  1187. return 0;
  1188. }
  1189. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1190. {
  1191. int idx = 0;
  1192. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1193. sizeof("WSA_CDC_DMA_RX_0")))
  1194. idx = WSA_CDC_DMA_RX_0;
  1195. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1196. sizeof("WSA_CDC_DMA_RX_0")))
  1197. idx = WSA_CDC_DMA_RX_1;
  1198. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1199. sizeof("RX_CDC_DMA_RX_0")))
  1200. idx = RX_CDC_DMA_RX_0;
  1201. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1202. sizeof("RX_CDC_DMA_RX_1")))
  1203. idx = RX_CDC_DMA_RX_1;
  1204. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1205. sizeof("RX_CDC_DMA_RX_2")))
  1206. idx = RX_CDC_DMA_RX_2;
  1207. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1208. sizeof("RX_CDC_DMA_RX_3")))
  1209. idx = RX_CDC_DMA_RX_3;
  1210. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1211. sizeof("RX_CDC_DMA_RX_5")))
  1212. idx = RX_CDC_DMA_RX_5;
  1213. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1214. sizeof("WSA_CDC_DMA_TX_0")))
  1215. idx = WSA_CDC_DMA_TX_0;
  1216. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1217. sizeof("WSA_CDC_DMA_TX_1")))
  1218. idx = WSA_CDC_DMA_TX_1;
  1219. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1220. sizeof("WSA_CDC_DMA_TX_2")))
  1221. idx = WSA_CDC_DMA_TX_2;
  1222. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1223. sizeof("TX_CDC_DMA_TX_0")))
  1224. idx = TX_CDC_DMA_TX_0;
  1225. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1226. sizeof("TX_CDC_DMA_TX_3")))
  1227. idx = TX_CDC_DMA_TX_3;
  1228. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1229. sizeof("TX_CDC_DMA_TX_4")))
  1230. idx = TX_CDC_DMA_TX_4;
  1231. else {
  1232. pr_err("%s: unsupported channel: %s\n",
  1233. __func__, kcontrol->id.name);
  1234. return -EINVAL;
  1235. }
  1236. return idx;
  1237. }
  1238. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1239. struct snd_ctl_elem_value *ucontrol)
  1240. {
  1241. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1242. if (ch_num < 0) {
  1243. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1244. return ch_num;
  1245. }
  1246. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1247. cdc_dma_rx_cfg[ch_num].channels - 1);
  1248. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1249. return 0;
  1250. }
  1251. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1252. struct snd_ctl_elem_value *ucontrol)
  1253. {
  1254. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1255. if (ch_num < 0) {
  1256. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1257. return ch_num;
  1258. }
  1259. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1260. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1261. cdc_dma_rx_cfg[ch_num].channels);
  1262. return 1;
  1263. }
  1264. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1265. struct snd_ctl_elem_value *ucontrol)
  1266. {
  1267. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1268. if (ch_num < 0) {
  1269. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1270. return ch_num;
  1271. }
  1272. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1273. case SNDRV_PCM_FORMAT_S32_LE:
  1274. ucontrol->value.integer.value[0] = 3;
  1275. break;
  1276. case SNDRV_PCM_FORMAT_S24_3LE:
  1277. ucontrol->value.integer.value[0] = 2;
  1278. break;
  1279. case SNDRV_PCM_FORMAT_S24_LE:
  1280. ucontrol->value.integer.value[0] = 1;
  1281. break;
  1282. case SNDRV_PCM_FORMAT_S16_LE:
  1283. default:
  1284. ucontrol->value.integer.value[0] = 0;
  1285. break;
  1286. }
  1287. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1288. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1289. ucontrol->value.integer.value[0]);
  1290. return 0;
  1291. }
  1292. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1293. struct snd_ctl_elem_value *ucontrol)
  1294. {
  1295. int rc = 0;
  1296. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1297. if (ch_num < 0) {
  1298. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1299. return ch_num;
  1300. }
  1301. switch (ucontrol->value.integer.value[0]) {
  1302. case 3:
  1303. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1304. break;
  1305. case 2:
  1306. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1307. break;
  1308. case 1:
  1309. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1310. break;
  1311. case 0:
  1312. default:
  1313. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1314. break;
  1315. }
  1316. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1317. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1318. ucontrol->value.integer.value[0]);
  1319. return rc;
  1320. }
  1321. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1322. {
  1323. int sample_rate_val = 0;
  1324. switch (sample_rate) {
  1325. case SAMPLING_RATE_8KHZ:
  1326. sample_rate_val = 0;
  1327. break;
  1328. case SAMPLING_RATE_11P025KHZ:
  1329. sample_rate_val = 1;
  1330. break;
  1331. case SAMPLING_RATE_16KHZ:
  1332. sample_rate_val = 2;
  1333. break;
  1334. case SAMPLING_RATE_22P05KHZ:
  1335. sample_rate_val = 3;
  1336. break;
  1337. case SAMPLING_RATE_32KHZ:
  1338. sample_rate_val = 4;
  1339. break;
  1340. case SAMPLING_RATE_44P1KHZ:
  1341. sample_rate_val = 5;
  1342. break;
  1343. case SAMPLING_RATE_48KHZ:
  1344. sample_rate_val = 6;
  1345. break;
  1346. case SAMPLING_RATE_88P2KHZ:
  1347. sample_rate_val = 7;
  1348. break;
  1349. case SAMPLING_RATE_96KHZ:
  1350. sample_rate_val = 8;
  1351. break;
  1352. case SAMPLING_RATE_176P4KHZ:
  1353. sample_rate_val = 9;
  1354. break;
  1355. case SAMPLING_RATE_192KHZ:
  1356. sample_rate_val = 10;
  1357. break;
  1358. case SAMPLING_RATE_352P8KHZ:
  1359. sample_rate_val = 11;
  1360. break;
  1361. case SAMPLING_RATE_384KHZ:
  1362. sample_rate_val = 12;
  1363. break;
  1364. default:
  1365. sample_rate_val = 6;
  1366. break;
  1367. }
  1368. return sample_rate_val;
  1369. }
  1370. static int cdc_dma_get_sample_rate(int value)
  1371. {
  1372. int sample_rate = 0;
  1373. switch (value) {
  1374. case 0:
  1375. sample_rate = SAMPLING_RATE_8KHZ;
  1376. break;
  1377. case 1:
  1378. sample_rate = SAMPLING_RATE_11P025KHZ;
  1379. break;
  1380. case 2:
  1381. sample_rate = SAMPLING_RATE_16KHZ;
  1382. break;
  1383. case 3:
  1384. sample_rate = SAMPLING_RATE_22P05KHZ;
  1385. break;
  1386. case 4:
  1387. sample_rate = SAMPLING_RATE_32KHZ;
  1388. break;
  1389. case 5:
  1390. sample_rate = SAMPLING_RATE_44P1KHZ;
  1391. break;
  1392. case 6:
  1393. sample_rate = SAMPLING_RATE_48KHZ;
  1394. break;
  1395. case 7:
  1396. sample_rate = SAMPLING_RATE_88P2KHZ;
  1397. break;
  1398. case 8:
  1399. sample_rate = SAMPLING_RATE_96KHZ;
  1400. break;
  1401. case 9:
  1402. sample_rate = SAMPLING_RATE_176P4KHZ;
  1403. break;
  1404. case 10:
  1405. sample_rate = SAMPLING_RATE_192KHZ;
  1406. break;
  1407. case 11:
  1408. sample_rate = SAMPLING_RATE_352P8KHZ;
  1409. break;
  1410. case 12:
  1411. sample_rate = SAMPLING_RATE_384KHZ;
  1412. break;
  1413. default:
  1414. sample_rate = SAMPLING_RATE_48KHZ;
  1415. break;
  1416. }
  1417. return sample_rate;
  1418. }
  1419. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1420. struct snd_ctl_elem_value *ucontrol)
  1421. {
  1422. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1423. if (ch_num < 0) {
  1424. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1425. return ch_num;
  1426. }
  1427. ucontrol->value.enumerated.item[0] =
  1428. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1429. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1430. cdc_dma_rx_cfg[ch_num].sample_rate);
  1431. return 0;
  1432. }
  1433. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1434. struct snd_ctl_elem_value *ucontrol)
  1435. {
  1436. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1437. if (ch_num < 0) {
  1438. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1439. return ch_num;
  1440. }
  1441. cdc_dma_rx_cfg[ch_num].sample_rate =
  1442. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1443. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  1444. __func__, ucontrol->value.enumerated.item[0],
  1445. cdc_dma_rx_cfg[ch_num].sample_rate);
  1446. return 0;
  1447. }
  1448. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  1449. struct snd_ctl_elem_value *ucontrol)
  1450. {
  1451. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1452. if (ch_num < 0) {
  1453. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1454. return ch_num;
  1455. }
  1456. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1457. cdc_dma_tx_cfg[ch_num].channels);
  1458. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  1459. return 0;
  1460. }
  1461. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  1462. struct snd_ctl_elem_value *ucontrol)
  1463. {
  1464. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1465. if (ch_num < 0) {
  1466. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1467. return ch_num;
  1468. }
  1469. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1470. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1471. cdc_dma_tx_cfg[ch_num].channels);
  1472. return 1;
  1473. }
  1474. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1475. struct snd_ctl_elem_value *ucontrol)
  1476. {
  1477. int sample_rate_val;
  1478. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1479. if (ch_num < 0) {
  1480. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1481. return ch_num;
  1482. }
  1483. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  1484. case SAMPLING_RATE_384KHZ:
  1485. sample_rate_val = 12;
  1486. break;
  1487. case SAMPLING_RATE_352P8KHZ:
  1488. sample_rate_val = 11;
  1489. break;
  1490. case SAMPLING_RATE_192KHZ:
  1491. sample_rate_val = 10;
  1492. break;
  1493. case SAMPLING_RATE_176P4KHZ:
  1494. sample_rate_val = 9;
  1495. break;
  1496. case SAMPLING_RATE_96KHZ:
  1497. sample_rate_val = 8;
  1498. break;
  1499. case SAMPLING_RATE_88P2KHZ:
  1500. sample_rate_val = 7;
  1501. break;
  1502. case SAMPLING_RATE_48KHZ:
  1503. sample_rate_val = 6;
  1504. break;
  1505. case SAMPLING_RATE_44P1KHZ:
  1506. sample_rate_val = 5;
  1507. break;
  1508. case SAMPLING_RATE_32KHZ:
  1509. sample_rate_val = 4;
  1510. break;
  1511. case SAMPLING_RATE_22P05KHZ:
  1512. sample_rate_val = 3;
  1513. break;
  1514. case SAMPLING_RATE_16KHZ:
  1515. sample_rate_val = 2;
  1516. break;
  1517. case SAMPLING_RATE_11P025KHZ:
  1518. sample_rate_val = 1;
  1519. break;
  1520. case SAMPLING_RATE_8KHZ:
  1521. sample_rate_val = 0;
  1522. break;
  1523. default:
  1524. sample_rate_val = 6;
  1525. break;
  1526. }
  1527. ucontrol->value.integer.value[0] = sample_rate_val;
  1528. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  1529. cdc_dma_tx_cfg[ch_num].sample_rate);
  1530. return 0;
  1531. }
  1532. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1533. struct snd_ctl_elem_value *ucontrol)
  1534. {
  1535. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1536. if (ch_num < 0) {
  1537. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1538. return ch_num;
  1539. }
  1540. switch (ucontrol->value.integer.value[0]) {
  1541. case 12:
  1542. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  1543. break;
  1544. case 11:
  1545. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  1546. break;
  1547. case 10:
  1548. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  1549. break;
  1550. case 9:
  1551. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  1552. break;
  1553. case 8:
  1554. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  1555. break;
  1556. case 7:
  1557. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  1558. break;
  1559. case 6:
  1560. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1561. break;
  1562. case 5:
  1563. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  1564. break;
  1565. case 4:
  1566. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  1567. break;
  1568. case 3:
  1569. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  1570. break;
  1571. case 2:
  1572. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  1573. break;
  1574. case 1:
  1575. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  1576. break;
  1577. case 0:
  1578. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  1579. break;
  1580. default:
  1581. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1582. break;
  1583. }
  1584. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  1585. __func__, ucontrol->value.integer.value[0],
  1586. cdc_dma_tx_cfg[ch_num].sample_rate);
  1587. return 0;
  1588. }
  1589. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  1590. struct snd_ctl_elem_value *ucontrol)
  1591. {
  1592. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1593. if (ch_num < 0) {
  1594. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1595. return ch_num;
  1596. }
  1597. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  1598. case SNDRV_PCM_FORMAT_S32_LE:
  1599. ucontrol->value.integer.value[0] = 3;
  1600. break;
  1601. case SNDRV_PCM_FORMAT_S24_3LE:
  1602. ucontrol->value.integer.value[0] = 2;
  1603. break;
  1604. case SNDRV_PCM_FORMAT_S24_LE:
  1605. ucontrol->value.integer.value[0] = 1;
  1606. break;
  1607. case SNDRV_PCM_FORMAT_S16_LE:
  1608. default:
  1609. ucontrol->value.integer.value[0] = 0;
  1610. break;
  1611. }
  1612. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1613. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1614. ucontrol->value.integer.value[0]);
  1615. return 0;
  1616. }
  1617. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  1618. struct snd_ctl_elem_value *ucontrol)
  1619. {
  1620. int rc = 0;
  1621. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1622. if (ch_num < 0) {
  1623. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1624. return ch_num;
  1625. }
  1626. switch (ucontrol->value.integer.value[0]) {
  1627. case 3:
  1628. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1629. break;
  1630. case 2:
  1631. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1632. break;
  1633. case 1:
  1634. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1635. break;
  1636. case 0:
  1637. default:
  1638. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1639. break;
  1640. }
  1641. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1642. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1643. ucontrol->value.integer.value[0]);
  1644. return rc;
  1645. }
  1646. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  1647. struct snd_ctl_elem_value *ucontrol)
  1648. {
  1649. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  1650. usb_rx_cfg.channels);
  1651. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  1652. return 0;
  1653. }
  1654. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  1655. struct snd_ctl_elem_value *ucontrol)
  1656. {
  1657. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1658. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  1659. return 1;
  1660. }
  1661. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1662. struct snd_ctl_elem_value *ucontrol)
  1663. {
  1664. int sample_rate_val;
  1665. switch (usb_rx_cfg.sample_rate) {
  1666. case SAMPLING_RATE_384KHZ:
  1667. sample_rate_val = 12;
  1668. break;
  1669. case SAMPLING_RATE_352P8KHZ:
  1670. sample_rate_val = 11;
  1671. break;
  1672. case SAMPLING_RATE_192KHZ:
  1673. sample_rate_val = 10;
  1674. break;
  1675. case SAMPLING_RATE_176P4KHZ:
  1676. sample_rate_val = 9;
  1677. break;
  1678. case SAMPLING_RATE_96KHZ:
  1679. sample_rate_val = 8;
  1680. break;
  1681. case SAMPLING_RATE_88P2KHZ:
  1682. sample_rate_val = 7;
  1683. break;
  1684. case SAMPLING_RATE_48KHZ:
  1685. sample_rate_val = 6;
  1686. break;
  1687. case SAMPLING_RATE_44P1KHZ:
  1688. sample_rate_val = 5;
  1689. break;
  1690. case SAMPLING_RATE_32KHZ:
  1691. sample_rate_val = 4;
  1692. break;
  1693. case SAMPLING_RATE_22P05KHZ:
  1694. sample_rate_val = 3;
  1695. break;
  1696. case SAMPLING_RATE_16KHZ:
  1697. sample_rate_val = 2;
  1698. break;
  1699. case SAMPLING_RATE_11P025KHZ:
  1700. sample_rate_val = 1;
  1701. break;
  1702. case SAMPLING_RATE_8KHZ:
  1703. default:
  1704. sample_rate_val = 0;
  1705. break;
  1706. }
  1707. ucontrol->value.integer.value[0] = sample_rate_val;
  1708. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  1709. usb_rx_cfg.sample_rate);
  1710. return 0;
  1711. }
  1712. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1713. struct snd_ctl_elem_value *ucontrol)
  1714. {
  1715. switch (ucontrol->value.integer.value[0]) {
  1716. case 12:
  1717. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1718. break;
  1719. case 11:
  1720. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1721. break;
  1722. case 10:
  1723. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1724. break;
  1725. case 9:
  1726. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1727. break;
  1728. case 8:
  1729. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1730. break;
  1731. case 7:
  1732. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1733. break;
  1734. case 6:
  1735. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1736. break;
  1737. case 5:
  1738. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1739. break;
  1740. case 4:
  1741. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1742. break;
  1743. case 3:
  1744. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1745. break;
  1746. case 2:
  1747. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1748. break;
  1749. case 1:
  1750. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1751. break;
  1752. case 0:
  1753. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1754. break;
  1755. default:
  1756. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1757. break;
  1758. }
  1759. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  1760. __func__, ucontrol->value.integer.value[0],
  1761. usb_rx_cfg.sample_rate);
  1762. return 0;
  1763. }
  1764. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  1765. struct snd_ctl_elem_value *ucontrol)
  1766. {
  1767. switch (usb_rx_cfg.bit_format) {
  1768. case SNDRV_PCM_FORMAT_S32_LE:
  1769. ucontrol->value.integer.value[0] = 3;
  1770. break;
  1771. case SNDRV_PCM_FORMAT_S24_3LE:
  1772. ucontrol->value.integer.value[0] = 2;
  1773. break;
  1774. case SNDRV_PCM_FORMAT_S24_LE:
  1775. ucontrol->value.integer.value[0] = 1;
  1776. break;
  1777. case SNDRV_PCM_FORMAT_S16_LE:
  1778. default:
  1779. ucontrol->value.integer.value[0] = 0;
  1780. break;
  1781. }
  1782. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1783. __func__, usb_rx_cfg.bit_format,
  1784. ucontrol->value.integer.value[0]);
  1785. return 0;
  1786. }
  1787. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  1788. struct snd_ctl_elem_value *ucontrol)
  1789. {
  1790. int rc = 0;
  1791. switch (ucontrol->value.integer.value[0]) {
  1792. case 3:
  1793. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1794. break;
  1795. case 2:
  1796. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1797. break;
  1798. case 1:
  1799. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1800. break;
  1801. case 0:
  1802. default:
  1803. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1804. break;
  1805. }
  1806. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1807. __func__, usb_rx_cfg.bit_format,
  1808. ucontrol->value.integer.value[0]);
  1809. return rc;
  1810. }
  1811. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  1812. struct snd_ctl_elem_value *ucontrol)
  1813. {
  1814. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  1815. usb_tx_cfg.channels);
  1816. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  1817. return 0;
  1818. }
  1819. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  1820. struct snd_ctl_elem_value *ucontrol)
  1821. {
  1822. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1823. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  1824. return 1;
  1825. }
  1826. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1827. struct snd_ctl_elem_value *ucontrol)
  1828. {
  1829. int sample_rate_val;
  1830. switch (usb_tx_cfg.sample_rate) {
  1831. case SAMPLING_RATE_384KHZ:
  1832. sample_rate_val = 12;
  1833. break;
  1834. case SAMPLING_RATE_352P8KHZ:
  1835. sample_rate_val = 11;
  1836. break;
  1837. case SAMPLING_RATE_192KHZ:
  1838. sample_rate_val = 10;
  1839. break;
  1840. case SAMPLING_RATE_176P4KHZ:
  1841. sample_rate_val = 9;
  1842. break;
  1843. case SAMPLING_RATE_96KHZ:
  1844. sample_rate_val = 8;
  1845. break;
  1846. case SAMPLING_RATE_88P2KHZ:
  1847. sample_rate_val = 7;
  1848. break;
  1849. case SAMPLING_RATE_48KHZ:
  1850. sample_rate_val = 6;
  1851. break;
  1852. case SAMPLING_RATE_44P1KHZ:
  1853. sample_rate_val = 5;
  1854. break;
  1855. case SAMPLING_RATE_32KHZ:
  1856. sample_rate_val = 4;
  1857. break;
  1858. case SAMPLING_RATE_22P05KHZ:
  1859. sample_rate_val = 3;
  1860. break;
  1861. case SAMPLING_RATE_16KHZ:
  1862. sample_rate_val = 2;
  1863. break;
  1864. case SAMPLING_RATE_11P025KHZ:
  1865. sample_rate_val = 1;
  1866. break;
  1867. case SAMPLING_RATE_8KHZ:
  1868. sample_rate_val = 0;
  1869. break;
  1870. default:
  1871. sample_rate_val = 6;
  1872. break;
  1873. }
  1874. ucontrol->value.integer.value[0] = sample_rate_val;
  1875. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  1876. usb_tx_cfg.sample_rate);
  1877. return 0;
  1878. }
  1879. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1880. struct snd_ctl_elem_value *ucontrol)
  1881. {
  1882. switch (ucontrol->value.integer.value[0]) {
  1883. case 12:
  1884. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1885. break;
  1886. case 11:
  1887. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1888. break;
  1889. case 10:
  1890. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1891. break;
  1892. case 9:
  1893. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1894. break;
  1895. case 8:
  1896. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1897. break;
  1898. case 7:
  1899. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1900. break;
  1901. case 6:
  1902. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1903. break;
  1904. case 5:
  1905. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1906. break;
  1907. case 4:
  1908. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1909. break;
  1910. case 3:
  1911. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1912. break;
  1913. case 2:
  1914. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1915. break;
  1916. case 1:
  1917. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1918. break;
  1919. case 0:
  1920. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1921. break;
  1922. default:
  1923. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1924. break;
  1925. }
  1926. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  1927. __func__, ucontrol->value.integer.value[0],
  1928. usb_tx_cfg.sample_rate);
  1929. return 0;
  1930. }
  1931. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  1932. struct snd_ctl_elem_value *ucontrol)
  1933. {
  1934. switch (usb_tx_cfg.bit_format) {
  1935. case SNDRV_PCM_FORMAT_S32_LE:
  1936. ucontrol->value.integer.value[0] = 3;
  1937. break;
  1938. case SNDRV_PCM_FORMAT_S24_3LE:
  1939. ucontrol->value.integer.value[0] = 2;
  1940. break;
  1941. case SNDRV_PCM_FORMAT_S24_LE:
  1942. ucontrol->value.integer.value[0] = 1;
  1943. break;
  1944. case SNDRV_PCM_FORMAT_S16_LE:
  1945. default:
  1946. ucontrol->value.integer.value[0] = 0;
  1947. break;
  1948. }
  1949. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1950. __func__, usb_tx_cfg.bit_format,
  1951. ucontrol->value.integer.value[0]);
  1952. return 0;
  1953. }
  1954. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  1955. struct snd_ctl_elem_value *ucontrol)
  1956. {
  1957. int rc = 0;
  1958. switch (ucontrol->value.integer.value[0]) {
  1959. case 3:
  1960. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1961. break;
  1962. case 2:
  1963. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1964. break;
  1965. case 1:
  1966. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1967. break;
  1968. case 0:
  1969. default:
  1970. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1971. break;
  1972. }
  1973. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1974. __func__, usb_tx_cfg.bit_format,
  1975. ucontrol->value.integer.value[0]);
  1976. return rc;
  1977. }
  1978. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  1979. {
  1980. int idx;
  1981. if (strnstr(kcontrol->id.name, "Display Port RX",
  1982. sizeof("Display Port RX"))) {
  1983. idx = DP_RX_IDX;
  1984. } else {
  1985. pr_err("%s: unsupported BE: %s\n",
  1986. __func__, kcontrol->id.name);
  1987. idx = -EINVAL;
  1988. }
  1989. return idx;
  1990. }
  1991. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  1992. struct snd_ctl_elem_value *ucontrol)
  1993. {
  1994. int idx = ext_disp_get_port_idx(kcontrol);
  1995. if (idx < 0)
  1996. return idx;
  1997. switch (ext_disp_rx_cfg[idx].bit_format) {
  1998. case SNDRV_PCM_FORMAT_S24_3LE:
  1999. ucontrol->value.integer.value[0] = 2;
  2000. break;
  2001. case SNDRV_PCM_FORMAT_S24_LE:
  2002. ucontrol->value.integer.value[0] = 1;
  2003. break;
  2004. case SNDRV_PCM_FORMAT_S16_LE:
  2005. default:
  2006. ucontrol->value.integer.value[0] = 0;
  2007. break;
  2008. }
  2009. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  2010. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  2011. ucontrol->value.integer.value[0]);
  2012. return 0;
  2013. }
  2014. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  2015. struct snd_ctl_elem_value *ucontrol)
  2016. {
  2017. int idx = ext_disp_get_port_idx(kcontrol);
  2018. if (idx < 0)
  2019. return idx;
  2020. switch (ucontrol->value.integer.value[0]) {
  2021. case 2:
  2022. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2023. break;
  2024. case 1:
  2025. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2026. break;
  2027. case 0:
  2028. default:
  2029. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2030. break;
  2031. }
  2032. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  2033. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  2034. ucontrol->value.integer.value[0]);
  2035. return 0;
  2036. }
  2037. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  2038. struct snd_ctl_elem_value *ucontrol)
  2039. {
  2040. int idx = ext_disp_get_port_idx(kcontrol);
  2041. if (idx < 0)
  2042. return idx;
  2043. ucontrol->value.integer.value[0] =
  2044. ext_disp_rx_cfg[idx].channels - 2;
  2045. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  2046. idx, ext_disp_rx_cfg[idx].channels);
  2047. return 0;
  2048. }
  2049. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  2050. struct snd_ctl_elem_value *ucontrol)
  2051. {
  2052. int idx = ext_disp_get_port_idx(kcontrol);
  2053. if (idx < 0)
  2054. return idx;
  2055. ext_disp_rx_cfg[idx].channels =
  2056. ucontrol->value.integer.value[0] + 2;
  2057. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  2058. idx, ext_disp_rx_cfg[idx].channels);
  2059. return 1;
  2060. }
  2061. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2062. struct snd_ctl_elem_value *ucontrol)
  2063. {
  2064. int sample_rate_val;
  2065. int idx = ext_disp_get_port_idx(kcontrol);
  2066. if (idx < 0)
  2067. return idx;
  2068. switch (ext_disp_rx_cfg[idx].sample_rate) {
  2069. case SAMPLING_RATE_176P4KHZ:
  2070. sample_rate_val = 6;
  2071. break;
  2072. case SAMPLING_RATE_88P2KHZ:
  2073. sample_rate_val = 5;
  2074. break;
  2075. case SAMPLING_RATE_44P1KHZ:
  2076. sample_rate_val = 4;
  2077. break;
  2078. case SAMPLING_RATE_32KHZ:
  2079. sample_rate_val = 3;
  2080. break;
  2081. case SAMPLING_RATE_192KHZ:
  2082. sample_rate_val = 2;
  2083. break;
  2084. case SAMPLING_RATE_96KHZ:
  2085. sample_rate_val = 1;
  2086. break;
  2087. case SAMPLING_RATE_48KHZ:
  2088. default:
  2089. sample_rate_val = 0;
  2090. break;
  2091. }
  2092. ucontrol->value.integer.value[0] = sample_rate_val;
  2093. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  2094. idx, ext_disp_rx_cfg[idx].sample_rate);
  2095. return 0;
  2096. }
  2097. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2098. struct snd_ctl_elem_value *ucontrol)
  2099. {
  2100. int idx = ext_disp_get_port_idx(kcontrol);
  2101. if (idx < 0)
  2102. return idx;
  2103. switch (ucontrol->value.integer.value[0]) {
  2104. case 6:
  2105. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  2106. break;
  2107. case 5:
  2108. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  2109. break;
  2110. case 4:
  2111. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  2112. break;
  2113. case 3:
  2114. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  2115. break;
  2116. case 2:
  2117. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  2118. break;
  2119. case 1:
  2120. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  2121. break;
  2122. case 0:
  2123. default:
  2124. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  2125. break;
  2126. }
  2127. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  2128. __func__, ucontrol->value.integer.value[0], idx,
  2129. ext_disp_rx_cfg[idx].sample_rate);
  2130. return 0;
  2131. }
  2132. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  2133. struct snd_ctl_elem_value *ucontrol)
  2134. {
  2135. pr_debug("%s: proxy_rx channels = %d\n",
  2136. __func__, proxy_rx_cfg.channels);
  2137. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  2138. return 0;
  2139. }
  2140. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  2141. struct snd_ctl_elem_value *ucontrol)
  2142. {
  2143. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  2144. pr_debug("%s: proxy_rx channels = %d\n",
  2145. __func__, proxy_rx_cfg.channels);
  2146. return 1;
  2147. }
  2148. static int tdm_get_sample_rate(int value)
  2149. {
  2150. int sample_rate = 0;
  2151. switch (value) {
  2152. case 0:
  2153. sample_rate = SAMPLING_RATE_8KHZ;
  2154. break;
  2155. case 1:
  2156. sample_rate = SAMPLING_RATE_16KHZ;
  2157. break;
  2158. case 2:
  2159. sample_rate = SAMPLING_RATE_32KHZ;
  2160. break;
  2161. case 3:
  2162. sample_rate = SAMPLING_RATE_48KHZ;
  2163. break;
  2164. case 4:
  2165. sample_rate = SAMPLING_RATE_176P4KHZ;
  2166. break;
  2167. case 5:
  2168. sample_rate = SAMPLING_RATE_352P8KHZ;
  2169. break;
  2170. default:
  2171. sample_rate = SAMPLING_RATE_48KHZ;
  2172. break;
  2173. }
  2174. return sample_rate;
  2175. }
  2176. static int aux_pcm_get_sample_rate(int value)
  2177. {
  2178. int sample_rate;
  2179. switch (value) {
  2180. case 1:
  2181. sample_rate = SAMPLING_RATE_16KHZ;
  2182. break;
  2183. case 0:
  2184. default:
  2185. sample_rate = SAMPLING_RATE_8KHZ;
  2186. break;
  2187. }
  2188. return sample_rate;
  2189. }
  2190. static int tdm_get_sample_rate_val(int sample_rate)
  2191. {
  2192. int sample_rate_val = 0;
  2193. switch (sample_rate) {
  2194. case SAMPLING_RATE_8KHZ:
  2195. sample_rate_val = 0;
  2196. break;
  2197. case SAMPLING_RATE_16KHZ:
  2198. sample_rate_val = 1;
  2199. break;
  2200. case SAMPLING_RATE_32KHZ:
  2201. sample_rate_val = 2;
  2202. break;
  2203. case SAMPLING_RATE_48KHZ:
  2204. sample_rate_val = 3;
  2205. break;
  2206. case SAMPLING_RATE_176P4KHZ:
  2207. sample_rate_val = 4;
  2208. break;
  2209. case SAMPLING_RATE_352P8KHZ:
  2210. sample_rate_val = 5;
  2211. break;
  2212. default:
  2213. sample_rate_val = 3;
  2214. break;
  2215. }
  2216. return sample_rate_val;
  2217. }
  2218. static int aux_pcm_get_sample_rate_val(int sample_rate)
  2219. {
  2220. int sample_rate_val;
  2221. switch (sample_rate) {
  2222. case SAMPLING_RATE_16KHZ:
  2223. sample_rate_val = 1;
  2224. break;
  2225. case SAMPLING_RATE_8KHZ:
  2226. default:
  2227. sample_rate_val = 0;
  2228. break;
  2229. }
  2230. return sample_rate_val;
  2231. }
  2232. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  2233. struct tdm_port *port)
  2234. {
  2235. if (port) {
  2236. if (strnstr(kcontrol->id.name, "PRI",
  2237. sizeof(kcontrol->id.name))) {
  2238. port->mode = TDM_PRI;
  2239. } else if (strnstr(kcontrol->id.name, "SEC",
  2240. sizeof(kcontrol->id.name))) {
  2241. port->mode = TDM_SEC;
  2242. } else if (strnstr(kcontrol->id.name, "TERT",
  2243. sizeof(kcontrol->id.name))) {
  2244. port->mode = TDM_TERT;
  2245. } else if (strnstr(kcontrol->id.name, "QUAT",
  2246. sizeof(kcontrol->id.name))) {
  2247. port->mode = TDM_QUAT;
  2248. } else if (strnstr(kcontrol->id.name, "QUIN",
  2249. sizeof(kcontrol->id.name))) {
  2250. port->mode = TDM_QUIN;
  2251. } else {
  2252. pr_err("%s: unsupported mode in: %s\n",
  2253. __func__, kcontrol->id.name);
  2254. return -EINVAL;
  2255. }
  2256. if (strnstr(kcontrol->id.name, "RX_0",
  2257. sizeof(kcontrol->id.name)) ||
  2258. strnstr(kcontrol->id.name, "TX_0",
  2259. sizeof(kcontrol->id.name))) {
  2260. port->channel = TDM_0;
  2261. } else if (strnstr(kcontrol->id.name, "RX_1",
  2262. sizeof(kcontrol->id.name)) ||
  2263. strnstr(kcontrol->id.name, "TX_1",
  2264. sizeof(kcontrol->id.name))) {
  2265. port->channel = TDM_1;
  2266. } else if (strnstr(kcontrol->id.name, "RX_2",
  2267. sizeof(kcontrol->id.name)) ||
  2268. strnstr(kcontrol->id.name, "TX_2",
  2269. sizeof(kcontrol->id.name))) {
  2270. port->channel = TDM_2;
  2271. } else if (strnstr(kcontrol->id.name, "RX_3",
  2272. sizeof(kcontrol->id.name)) ||
  2273. strnstr(kcontrol->id.name, "TX_3",
  2274. sizeof(kcontrol->id.name))) {
  2275. port->channel = TDM_3;
  2276. } else if (strnstr(kcontrol->id.name, "RX_4",
  2277. sizeof(kcontrol->id.name)) ||
  2278. strnstr(kcontrol->id.name, "TX_4",
  2279. sizeof(kcontrol->id.name))) {
  2280. port->channel = TDM_4;
  2281. } else if (strnstr(kcontrol->id.name, "RX_5",
  2282. sizeof(kcontrol->id.name)) ||
  2283. strnstr(kcontrol->id.name, "TX_5",
  2284. sizeof(kcontrol->id.name))) {
  2285. port->channel = TDM_5;
  2286. } else if (strnstr(kcontrol->id.name, "RX_6",
  2287. sizeof(kcontrol->id.name)) ||
  2288. strnstr(kcontrol->id.name, "TX_6",
  2289. sizeof(kcontrol->id.name))) {
  2290. port->channel = TDM_6;
  2291. } else if (strnstr(kcontrol->id.name, "RX_7",
  2292. sizeof(kcontrol->id.name)) ||
  2293. strnstr(kcontrol->id.name, "TX_7",
  2294. sizeof(kcontrol->id.name))) {
  2295. port->channel = TDM_7;
  2296. } else {
  2297. pr_err("%s: unsupported channel in: %s\n",
  2298. __func__, kcontrol->id.name);
  2299. return -EINVAL;
  2300. }
  2301. } else {
  2302. return -EINVAL;
  2303. }
  2304. return 0;
  2305. }
  2306. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2307. struct snd_ctl_elem_value *ucontrol)
  2308. {
  2309. struct tdm_port port;
  2310. int ret = tdm_get_port_idx(kcontrol, &port);
  2311. if (ret) {
  2312. pr_err("%s: unsupported control: %s\n",
  2313. __func__, kcontrol->id.name);
  2314. } else {
  2315. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2316. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  2317. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2318. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2319. ucontrol->value.enumerated.item[0]);
  2320. }
  2321. return ret;
  2322. }
  2323. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2324. struct snd_ctl_elem_value *ucontrol)
  2325. {
  2326. struct tdm_port port;
  2327. int ret = tdm_get_port_idx(kcontrol, &port);
  2328. if (ret) {
  2329. pr_err("%s: unsupported control: %s\n",
  2330. __func__, kcontrol->id.name);
  2331. } else {
  2332. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  2333. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2334. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2335. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2336. ucontrol->value.enumerated.item[0]);
  2337. }
  2338. return ret;
  2339. }
  2340. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2341. struct snd_ctl_elem_value *ucontrol)
  2342. {
  2343. struct tdm_port port;
  2344. int ret = tdm_get_port_idx(kcontrol, &port);
  2345. if (ret) {
  2346. pr_err("%s: unsupported control: %s\n",
  2347. __func__, kcontrol->id.name);
  2348. } else {
  2349. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2350. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  2351. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2352. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2353. ucontrol->value.enumerated.item[0]);
  2354. }
  2355. return ret;
  2356. }
  2357. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2358. struct snd_ctl_elem_value *ucontrol)
  2359. {
  2360. struct tdm_port port;
  2361. int ret = tdm_get_port_idx(kcontrol, &port);
  2362. if (ret) {
  2363. pr_err("%s: unsupported control: %s\n",
  2364. __func__, kcontrol->id.name);
  2365. } else {
  2366. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  2367. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2368. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2369. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2370. ucontrol->value.enumerated.item[0]);
  2371. }
  2372. return ret;
  2373. }
  2374. static int tdm_get_format(int value)
  2375. {
  2376. int format = 0;
  2377. switch (value) {
  2378. case 0:
  2379. format = SNDRV_PCM_FORMAT_S16_LE;
  2380. break;
  2381. case 1:
  2382. format = SNDRV_PCM_FORMAT_S24_LE;
  2383. break;
  2384. case 2:
  2385. format = SNDRV_PCM_FORMAT_S32_LE;
  2386. break;
  2387. default:
  2388. format = SNDRV_PCM_FORMAT_S16_LE;
  2389. break;
  2390. }
  2391. return format;
  2392. }
  2393. static int tdm_get_format_val(int format)
  2394. {
  2395. int value = 0;
  2396. switch (format) {
  2397. case SNDRV_PCM_FORMAT_S16_LE:
  2398. value = 0;
  2399. break;
  2400. case SNDRV_PCM_FORMAT_S24_LE:
  2401. value = 1;
  2402. break;
  2403. case SNDRV_PCM_FORMAT_S32_LE:
  2404. value = 2;
  2405. break;
  2406. default:
  2407. value = 0;
  2408. break;
  2409. }
  2410. return value;
  2411. }
  2412. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  2413. struct snd_ctl_elem_value *ucontrol)
  2414. {
  2415. struct tdm_port port;
  2416. int ret = tdm_get_port_idx(kcontrol, &port);
  2417. if (ret) {
  2418. pr_err("%s: unsupported control: %s\n",
  2419. __func__, kcontrol->id.name);
  2420. } else {
  2421. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2422. tdm_rx_cfg[port.mode][port.channel].bit_format);
  2423. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2424. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2425. ucontrol->value.enumerated.item[0]);
  2426. }
  2427. return ret;
  2428. }
  2429. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  2430. struct snd_ctl_elem_value *ucontrol)
  2431. {
  2432. struct tdm_port port;
  2433. int ret = tdm_get_port_idx(kcontrol, &port);
  2434. if (ret) {
  2435. pr_err("%s: unsupported control: %s\n",
  2436. __func__, kcontrol->id.name);
  2437. } else {
  2438. tdm_rx_cfg[port.mode][port.channel].bit_format =
  2439. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2440. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2441. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2442. ucontrol->value.enumerated.item[0]);
  2443. }
  2444. return ret;
  2445. }
  2446. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  2447. struct snd_ctl_elem_value *ucontrol)
  2448. {
  2449. struct tdm_port port;
  2450. int ret = tdm_get_port_idx(kcontrol, &port);
  2451. if (ret) {
  2452. pr_err("%s: unsupported control: %s\n",
  2453. __func__, kcontrol->id.name);
  2454. } else {
  2455. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2456. tdm_tx_cfg[port.mode][port.channel].bit_format);
  2457. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2458. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2459. ucontrol->value.enumerated.item[0]);
  2460. }
  2461. return ret;
  2462. }
  2463. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  2464. struct snd_ctl_elem_value *ucontrol)
  2465. {
  2466. struct tdm_port port;
  2467. int ret = tdm_get_port_idx(kcontrol, &port);
  2468. if (ret) {
  2469. pr_err("%s: unsupported control: %s\n",
  2470. __func__, kcontrol->id.name);
  2471. } else {
  2472. tdm_tx_cfg[port.mode][port.channel].bit_format =
  2473. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2474. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2475. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2476. ucontrol->value.enumerated.item[0]);
  2477. }
  2478. return ret;
  2479. }
  2480. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  2481. struct snd_ctl_elem_value *ucontrol)
  2482. {
  2483. struct tdm_port port;
  2484. int ret = tdm_get_port_idx(kcontrol, &port);
  2485. if (ret) {
  2486. pr_err("%s: unsupported control: %s\n",
  2487. __func__, kcontrol->id.name);
  2488. } else {
  2489. ucontrol->value.enumerated.item[0] =
  2490. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  2491. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2492. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  2493. ucontrol->value.enumerated.item[0]);
  2494. }
  2495. return ret;
  2496. }
  2497. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  2498. struct snd_ctl_elem_value *ucontrol)
  2499. {
  2500. struct tdm_port port;
  2501. int ret = tdm_get_port_idx(kcontrol, &port);
  2502. if (ret) {
  2503. pr_err("%s: unsupported control: %s\n",
  2504. __func__, kcontrol->id.name);
  2505. } else {
  2506. tdm_rx_cfg[port.mode][port.channel].channels =
  2507. ucontrol->value.enumerated.item[0] + 1;
  2508. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2509. tdm_rx_cfg[port.mode][port.channel].channels,
  2510. ucontrol->value.enumerated.item[0] + 1);
  2511. }
  2512. return ret;
  2513. }
  2514. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  2515. struct snd_ctl_elem_value *ucontrol)
  2516. {
  2517. struct tdm_port port;
  2518. int ret = tdm_get_port_idx(kcontrol, &port);
  2519. if (ret) {
  2520. pr_err("%s: unsupported control: %s\n",
  2521. __func__, kcontrol->id.name);
  2522. } else {
  2523. ucontrol->value.enumerated.item[0] =
  2524. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  2525. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2526. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  2527. ucontrol->value.enumerated.item[0]);
  2528. }
  2529. return ret;
  2530. }
  2531. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  2532. struct snd_ctl_elem_value *ucontrol)
  2533. {
  2534. struct tdm_port port;
  2535. int ret = tdm_get_port_idx(kcontrol, &port);
  2536. if (ret) {
  2537. pr_err("%s: unsupported control: %s\n",
  2538. __func__, kcontrol->id.name);
  2539. } else {
  2540. tdm_tx_cfg[port.mode][port.channel].channels =
  2541. ucontrol->value.enumerated.item[0] + 1;
  2542. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2543. tdm_tx_cfg[port.mode][port.channel].channels,
  2544. ucontrol->value.enumerated.item[0] + 1);
  2545. }
  2546. return ret;
  2547. }
  2548. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  2549. {
  2550. int idx;
  2551. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  2552. sizeof("PRIM_AUX_PCM"))) {
  2553. idx = PRIM_AUX_PCM;
  2554. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  2555. sizeof("SEC_AUX_PCM"))) {
  2556. idx = SEC_AUX_PCM;
  2557. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  2558. sizeof("TERT_AUX_PCM"))) {
  2559. idx = TERT_AUX_PCM;
  2560. } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  2561. sizeof("QUAT_AUX_PCM"))) {
  2562. idx = QUAT_AUX_PCM;
  2563. } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
  2564. sizeof("QUIN_AUX_PCM"))) {
  2565. idx = QUIN_AUX_PCM;
  2566. } else {
  2567. pr_err("%s: unsupported port: %s\n",
  2568. __func__, kcontrol->id.name);
  2569. idx = -EINVAL;
  2570. }
  2571. return idx;
  2572. }
  2573. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2574. struct snd_ctl_elem_value *ucontrol)
  2575. {
  2576. int idx = aux_pcm_get_port_idx(kcontrol);
  2577. if (idx < 0)
  2578. return idx;
  2579. aux_pcm_rx_cfg[idx].sample_rate =
  2580. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2581. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2582. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2583. ucontrol->value.enumerated.item[0]);
  2584. return 0;
  2585. }
  2586. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2587. struct snd_ctl_elem_value *ucontrol)
  2588. {
  2589. int idx = aux_pcm_get_port_idx(kcontrol);
  2590. if (idx < 0)
  2591. return idx;
  2592. ucontrol->value.enumerated.item[0] =
  2593. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  2594. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2595. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2596. ucontrol->value.enumerated.item[0]);
  2597. return 0;
  2598. }
  2599. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2600. struct snd_ctl_elem_value *ucontrol)
  2601. {
  2602. int idx = aux_pcm_get_port_idx(kcontrol);
  2603. if (idx < 0)
  2604. return idx;
  2605. aux_pcm_tx_cfg[idx].sample_rate =
  2606. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2607. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2608. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2609. ucontrol->value.enumerated.item[0]);
  2610. return 0;
  2611. }
  2612. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2613. struct snd_ctl_elem_value *ucontrol)
  2614. {
  2615. int idx = aux_pcm_get_port_idx(kcontrol);
  2616. if (idx < 0)
  2617. return idx;
  2618. ucontrol->value.enumerated.item[0] =
  2619. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  2620. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2621. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2622. ucontrol->value.enumerated.item[0]);
  2623. return 0;
  2624. }
  2625. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  2626. {
  2627. int idx;
  2628. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  2629. sizeof("PRIM_MI2S_RX"))) {
  2630. idx = PRIM_MI2S;
  2631. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  2632. sizeof("SEC_MI2S_RX"))) {
  2633. idx = SEC_MI2S;
  2634. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  2635. sizeof("TERT_MI2S_RX"))) {
  2636. idx = TERT_MI2S;
  2637. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  2638. sizeof("QUAT_MI2S_RX"))) {
  2639. idx = QUAT_MI2S;
  2640. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
  2641. sizeof("QUIN_MI2S_RX"))) {
  2642. idx = QUIN_MI2S;
  2643. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  2644. sizeof("PRIM_MI2S_TX"))) {
  2645. idx = PRIM_MI2S;
  2646. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  2647. sizeof("SEC_MI2S_TX"))) {
  2648. idx = SEC_MI2S;
  2649. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  2650. sizeof("TERT_MI2S_TX"))) {
  2651. idx = TERT_MI2S;
  2652. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  2653. sizeof("QUAT_MI2S_TX"))) {
  2654. idx = QUAT_MI2S;
  2655. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
  2656. sizeof("QUIN_MI2S_TX"))) {
  2657. idx = QUIN_MI2S;
  2658. } else {
  2659. pr_err("%s: unsupported channel: %s\n",
  2660. __func__, kcontrol->id.name);
  2661. idx = -EINVAL;
  2662. }
  2663. return idx;
  2664. }
  2665. static int mi2s_get_sample_rate_val(int sample_rate)
  2666. {
  2667. int sample_rate_val;
  2668. switch (sample_rate) {
  2669. case SAMPLING_RATE_8KHZ:
  2670. sample_rate_val = 0;
  2671. break;
  2672. case SAMPLING_RATE_11P025KHZ:
  2673. sample_rate_val = 1;
  2674. break;
  2675. case SAMPLING_RATE_16KHZ:
  2676. sample_rate_val = 2;
  2677. break;
  2678. case SAMPLING_RATE_22P05KHZ:
  2679. sample_rate_val = 3;
  2680. break;
  2681. case SAMPLING_RATE_32KHZ:
  2682. sample_rate_val = 4;
  2683. break;
  2684. case SAMPLING_RATE_44P1KHZ:
  2685. sample_rate_val = 5;
  2686. break;
  2687. case SAMPLING_RATE_48KHZ:
  2688. sample_rate_val = 6;
  2689. break;
  2690. case SAMPLING_RATE_96KHZ:
  2691. sample_rate_val = 7;
  2692. break;
  2693. case SAMPLING_RATE_192KHZ:
  2694. sample_rate_val = 8;
  2695. break;
  2696. default:
  2697. sample_rate_val = 6;
  2698. break;
  2699. }
  2700. return sample_rate_val;
  2701. }
  2702. static int mi2s_get_sample_rate(int value)
  2703. {
  2704. int sample_rate;
  2705. switch (value) {
  2706. case 0:
  2707. sample_rate = SAMPLING_RATE_8KHZ;
  2708. break;
  2709. case 1:
  2710. sample_rate = SAMPLING_RATE_11P025KHZ;
  2711. break;
  2712. case 2:
  2713. sample_rate = SAMPLING_RATE_16KHZ;
  2714. break;
  2715. case 3:
  2716. sample_rate = SAMPLING_RATE_22P05KHZ;
  2717. break;
  2718. case 4:
  2719. sample_rate = SAMPLING_RATE_32KHZ;
  2720. break;
  2721. case 5:
  2722. sample_rate = SAMPLING_RATE_44P1KHZ;
  2723. break;
  2724. case 6:
  2725. sample_rate = SAMPLING_RATE_48KHZ;
  2726. break;
  2727. case 7:
  2728. sample_rate = SAMPLING_RATE_96KHZ;
  2729. break;
  2730. case 8:
  2731. sample_rate = SAMPLING_RATE_192KHZ;
  2732. break;
  2733. default:
  2734. sample_rate = SAMPLING_RATE_48KHZ;
  2735. break;
  2736. }
  2737. return sample_rate;
  2738. }
  2739. static int mi2s_auxpcm_get_format(int value)
  2740. {
  2741. int format;
  2742. switch (value) {
  2743. case 0:
  2744. format = SNDRV_PCM_FORMAT_S16_LE;
  2745. break;
  2746. case 1:
  2747. format = SNDRV_PCM_FORMAT_S24_LE;
  2748. break;
  2749. case 2:
  2750. format = SNDRV_PCM_FORMAT_S24_3LE;
  2751. break;
  2752. case 3:
  2753. format = SNDRV_PCM_FORMAT_S32_LE;
  2754. break;
  2755. default:
  2756. format = SNDRV_PCM_FORMAT_S16_LE;
  2757. break;
  2758. }
  2759. return format;
  2760. }
  2761. static int mi2s_auxpcm_get_format_value(int format)
  2762. {
  2763. int value;
  2764. switch (format) {
  2765. case SNDRV_PCM_FORMAT_S16_LE:
  2766. value = 0;
  2767. break;
  2768. case SNDRV_PCM_FORMAT_S24_LE:
  2769. value = 1;
  2770. break;
  2771. case SNDRV_PCM_FORMAT_S24_3LE:
  2772. value = 2;
  2773. break;
  2774. case SNDRV_PCM_FORMAT_S32_LE:
  2775. value = 3;
  2776. break;
  2777. default:
  2778. value = 0;
  2779. break;
  2780. }
  2781. return value;
  2782. }
  2783. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2784. struct snd_ctl_elem_value *ucontrol)
  2785. {
  2786. int idx = mi2s_get_port_idx(kcontrol);
  2787. if (idx < 0)
  2788. return idx;
  2789. mi2s_rx_cfg[idx].sample_rate =
  2790. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2791. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2792. idx, mi2s_rx_cfg[idx].sample_rate,
  2793. ucontrol->value.enumerated.item[0]);
  2794. return 0;
  2795. }
  2796. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2797. struct snd_ctl_elem_value *ucontrol)
  2798. {
  2799. int idx = mi2s_get_port_idx(kcontrol);
  2800. if (idx < 0)
  2801. return idx;
  2802. ucontrol->value.enumerated.item[0] =
  2803. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  2804. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2805. idx, mi2s_rx_cfg[idx].sample_rate,
  2806. ucontrol->value.enumerated.item[0]);
  2807. return 0;
  2808. }
  2809. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2810. struct snd_ctl_elem_value *ucontrol)
  2811. {
  2812. int idx = mi2s_get_port_idx(kcontrol);
  2813. if (idx < 0)
  2814. return idx;
  2815. mi2s_tx_cfg[idx].sample_rate =
  2816. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2817. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2818. idx, mi2s_tx_cfg[idx].sample_rate,
  2819. ucontrol->value.enumerated.item[0]);
  2820. return 0;
  2821. }
  2822. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2823. struct snd_ctl_elem_value *ucontrol)
  2824. {
  2825. int idx = mi2s_get_port_idx(kcontrol);
  2826. if (idx < 0)
  2827. return idx;
  2828. ucontrol->value.enumerated.item[0] =
  2829. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  2830. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2831. idx, mi2s_tx_cfg[idx].sample_rate,
  2832. ucontrol->value.enumerated.item[0]);
  2833. return 0;
  2834. }
  2835. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  2836. struct snd_ctl_elem_value *ucontrol)
  2837. {
  2838. int idx = mi2s_get_port_idx(kcontrol);
  2839. if (idx < 0)
  2840. return idx;
  2841. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2842. idx, mi2s_rx_cfg[idx].channels);
  2843. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  2844. return 0;
  2845. }
  2846. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  2847. struct snd_ctl_elem_value *ucontrol)
  2848. {
  2849. int idx = mi2s_get_port_idx(kcontrol);
  2850. if (idx < 0)
  2851. return idx;
  2852. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2853. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2854. idx, mi2s_rx_cfg[idx].channels);
  2855. return 1;
  2856. }
  2857. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  2858. struct snd_ctl_elem_value *ucontrol)
  2859. {
  2860. int idx = mi2s_get_port_idx(kcontrol);
  2861. if (idx < 0)
  2862. return idx;
  2863. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2864. idx, mi2s_tx_cfg[idx].channels);
  2865. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  2866. return 0;
  2867. }
  2868. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  2869. struct snd_ctl_elem_value *ucontrol)
  2870. {
  2871. int idx = mi2s_get_port_idx(kcontrol);
  2872. if (idx < 0)
  2873. return idx;
  2874. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2875. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2876. idx, mi2s_tx_cfg[idx].channels);
  2877. return 1;
  2878. }
  2879. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  2880. struct snd_ctl_elem_value *ucontrol)
  2881. {
  2882. int idx = mi2s_get_port_idx(kcontrol);
  2883. if (idx < 0)
  2884. return idx;
  2885. ucontrol->value.enumerated.item[0] =
  2886. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  2887. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2888. idx, mi2s_rx_cfg[idx].bit_format,
  2889. ucontrol->value.enumerated.item[0]);
  2890. return 0;
  2891. }
  2892. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  2893. struct snd_ctl_elem_value *ucontrol)
  2894. {
  2895. int idx = mi2s_get_port_idx(kcontrol);
  2896. if (idx < 0)
  2897. return idx;
  2898. mi2s_rx_cfg[idx].bit_format =
  2899. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2900. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2901. idx, mi2s_rx_cfg[idx].bit_format,
  2902. ucontrol->value.enumerated.item[0]);
  2903. return 0;
  2904. }
  2905. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  2906. struct snd_ctl_elem_value *ucontrol)
  2907. {
  2908. int idx = mi2s_get_port_idx(kcontrol);
  2909. if (idx < 0)
  2910. return idx;
  2911. ucontrol->value.enumerated.item[0] =
  2912. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  2913. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2914. idx, mi2s_tx_cfg[idx].bit_format,
  2915. ucontrol->value.enumerated.item[0]);
  2916. return 0;
  2917. }
  2918. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  2919. struct snd_ctl_elem_value *ucontrol)
  2920. {
  2921. int idx = mi2s_get_port_idx(kcontrol);
  2922. if (idx < 0)
  2923. return idx;
  2924. mi2s_tx_cfg[idx].bit_format =
  2925. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2926. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2927. idx, mi2s_tx_cfg[idx].bit_format,
  2928. ucontrol->value.enumerated.item[0]);
  2929. return 0;
  2930. }
  2931. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  2932. struct snd_ctl_elem_value *ucontrol)
  2933. {
  2934. int idx = aux_pcm_get_port_idx(kcontrol);
  2935. if (idx < 0)
  2936. return idx;
  2937. ucontrol->value.enumerated.item[0] =
  2938. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  2939. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2940. idx, aux_pcm_rx_cfg[idx].bit_format,
  2941. ucontrol->value.enumerated.item[0]);
  2942. return 0;
  2943. }
  2944. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  2945. struct snd_ctl_elem_value *ucontrol)
  2946. {
  2947. int idx = aux_pcm_get_port_idx(kcontrol);
  2948. if (idx < 0)
  2949. return idx;
  2950. aux_pcm_rx_cfg[idx].bit_format =
  2951. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2952. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2953. idx, aux_pcm_rx_cfg[idx].bit_format,
  2954. ucontrol->value.enumerated.item[0]);
  2955. return 0;
  2956. }
  2957. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  2958. struct snd_ctl_elem_value *ucontrol)
  2959. {
  2960. int idx = aux_pcm_get_port_idx(kcontrol);
  2961. if (idx < 0)
  2962. return idx;
  2963. ucontrol->value.enumerated.item[0] =
  2964. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  2965. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2966. idx, aux_pcm_tx_cfg[idx].bit_format,
  2967. ucontrol->value.enumerated.item[0]);
  2968. return 0;
  2969. }
  2970. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  2971. struct snd_ctl_elem_value *ucontrol)
  2972. {
  2973. int idx = aux_pcm_get_port_idx(kcontrol);
  2974. if (idx < 0)
  2975. return idx;
  2976. aux_pcm_tx_cfg[idx].bit_format =
  2977. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2978. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2979. idx, aux_pcm_tx_cfg[idx].bit_format,
  2980. ucontrol->value.enumerated.item[0]);
  2981. return 0;
  2982. }
  2983. static int msm_hifi_ctrl(struct snd_soc_codec *codec)
  2984. {
  2985. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  2986. struct snd_soc_card *card = codec->component.card;
  2987. struct msm_asoc_mach_data *pdata =
  2988. snd_soc_card_get_drvdata(card);
  2989. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
  2990. msm_hifi_control);
  2991. if (!pdata || !pdata->hph_en1_gpio_p) {
  2992. dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
  2993. return -EINVAL;
  2994. }
  2995. if (msm_hifi_control == MSM_HIFI_ON) {
  2996. msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
  2997. /* 5msec delay needed as per HW requirement */
  2998. usleep_range(5000, 5010);
  2999. } else {
  3000. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
  3001. }
  3002. snd_soc_dapm_sync(dapm);
  3003. return 0;
  3004. }
  3005. static int msm_hifi_get(struct snd_kcontrol *kcontrol,
  3006. struct snd_ctl_elem_value *ucontrol)
  3007. {
  3008. pr_debug("%s: msm_hifi_control = %d\n",
  3009. __func__, msm_hifi_control);
  3010. ucontrol->value.integer.value[0] = msm_hifi_control;
  3011. return 0;
  3012. }
  3013. static int msm_hifi_put(struct snd_kcontrol *kcontrol,
  3014. struct snd_ctl_elem_value *ucontrol)
  3015. {
  3016. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  3017. dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  3018. __func__, ucontrol->value.integer.value[0]);
  3019. msm_hifi_control = ucontrol->value.integer.value[0];
  3020. msm_hifi_ctrl(codec);
  3021. return 0;
  3022. }
  3023. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  3024. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  3025. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3026. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  3027. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3028. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  3029. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3030. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  3031. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3032. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  3033. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3034. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  3035. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3036. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  3037. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3038. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  3039. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3040. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  3041. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3042. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  3043. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3044. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  3045. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3046. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  3047. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3048. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  3049. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3050. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  3051. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3052. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  3053. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3054. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  3055. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3056. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  3057. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3058. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  3059. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3060. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  3061. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3062. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  3063. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3064. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  3065. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3066. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  3067. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3068. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  3069. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3070. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  3071. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3072. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  3073. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3074. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  3075. wsa_cdc_dma_rx_0_sample_rate,
  3076. cdc_dma_rx_sample_rate_get,
  3077. cdc_dma_rx_sample_rate_put),
  3078. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  3079. wsa_cdc_dma_rx_1_sample_rate,
  3080. cdc_dma_rx_sample_rate_get,
  3081. cdc_dma_rx_sample_rate_put),
  3082. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  3083. rx_cdc_dma_rx_0_sample_rate,
  3084. cdc_dma_rx_sample_rate_get,
  3085. cdc_dma_rx_sample_rate_put),
  3086. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  3087. rx_cdc_dma_rx_1_sample_rate,
  3088. cdc_dma_rx_sample_rate_get,
  3089. cdc_dma_rx_sample_rate_put),
  3090. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  3091. rx_cdc_dma_rx_2_sample_rate,
  3092. cdc_dma_rx_sample_rate_get,
  3093. cdc_dma_rx_sample_rate_put),
  3094. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  3095. rx_cdc_dma_rx_3_sample_rate,
  3096. cdc_dma_rx_sample_rate_get,
  3097. cdc_dma_rx_sample_rate_put),
  3098. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  3099. rx_cdc_dma_rx_5_sample_rate,
  3100. cdc_dma_rx_sample_rate_get,
  3101. cdc_dma_rx_sample_rate_put),
  3102. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  3103. wsa_cdc_dma_tx_0_sample_rate,
  3104. cdc_dma_tx_sample_rate_get,
  3105. cdc_dma_tx_sample_rate_put),
  3106. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  3107. wsa_cdc_dma_tx_1_sample_rate,
  3108. cdc_dma_tx_sample_rate_get,
  3109. cdc_dma_tx_sample_rate_put),
  3110. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  3111. wsa_cdc_dma_tx_2_sample_rate,
  3112. cdc_dma_tx_sample_rate_get,
  3113. cdc_dma_tx_sample_rate_put),
  3114. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  3115. tx_cdc_dma_tx_0_sample_rate,
  3116. cdc_dma_tx_sample_rate_get,
  3117. cdc_dma_tx_sample_rate_put),
  3118. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  3119. tx_cdc_dma_tx_3_sample_rate,
  3120. cdc_dma_tx_sample_rate_get,
  3121. cdc_dma_tx_sample_rate_put),
  3122. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  3123. tx_cdc_dma_tx_4_sample_rate,
  3124. cdc_dma_tx_sample_rate_get,
  3125. cdc_dma_tx_sample_rate_put),
  3126. };
  3127. static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
  3128. SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
  3129. slim_rx_ch_get, slim_rx_ch_put),
  3130. SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
  3131. slim_rx_ch_get, slim_rx_ch_put),
  3132. SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
  3133. slim_tx_ch_get, slim_tx_ch_put),
  3134. SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
  3135. slim_tx_ch_get, slim_tx_ch_put),
  3136. SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
  3137. slim_rx_ch_get, slim_rx_ch_put),
  3138. SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
  3139. slim_rx_ch_get, slim_rx_ch_put),
  3140. SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
  3141. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3142. SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
  3143. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3144. SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
  3145. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3146. SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
  3147. slim_tx_bit_format_get, slim_tx_bit_format_put),
  3148. SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
  3149. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3150. SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
  3151. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3152. SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
  3153. slim_tx_sample_rate_get, slim_tx_sample_rate_put),
  3154. SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
  3155. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3156. SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
  3157. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3158. };
  3159. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  3160. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  3161. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  3162. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  3163. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  3164. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  3165. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  3166. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  3167. proxy_rx_ch_get, proxy_rx_ch_put),
  3168. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  3169. usb_audio_rx_format_get, usb_audio_rx_format_put),
  3170. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  3171. usb_audio_tx_format_get, usb_audio_tx_format_put),
  3172. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  3173. ext_disp_rx_format_get, ext_disp_rx_format_put),
  3174. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  3175. usb_audio_rx_sample_rate_get,
  3176. usb_audio_rx_sample_rate_put),
  3177. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  3178. usb_audio_tx_sample_rate_get,
  3179. usb_audio_tx_sample_rate_put),
  3180. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  3181. ext_disp_rx_sample_rate_get,
  3182. ext_disp_rx_sample_rate_put),
  3183. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3184. tdm_rx_sample_rate_get,
  3185. tdm_rx_sample_rate_put),
  3186. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3187. tdm_tx_sample_rate_get,
  3188. tdm_tx_sample_rate_put),
  3189. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  3190. tdm_rx_format_get,
  3191. tdm_rx_format_put),
  3192. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  3193. tdm_tx_format_get,
  3194. tdm_tx_format_put),
  3195. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  3196. tdm_rx_ch_get,
  3197. tdm_rx_ch_put),
  3198. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  3199. tdm_tx_ch_get,
  3200. tdm_tx_ch_put),
  3201. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3202. tdm_rx_sample_rate_get,
  3203. tdm_rx_sample_rate_put),
  3204. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3205. tdm_tx_sample_rate_get,
  3206. tdm_tx_sample_rate_put),
  3207. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  3208. tdm_rx_format_get,
  3209. tdm_rx_format_put),
  3210. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  3211. tdm_tx_format_get,
  3212. tdm_tx_format_put),
  3213. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  3214. tdm_rx_ch_get,
  3215. tdm_rx_ch_put),
  3216. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  3217. tdm_tx_ch_get,
  3218. tdm_tx_ch_put),
  3219. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3220. tdm_rx_sample_rate_get,
  3221. tdm_rx_sample_rate_put),
  3222. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3223. tdm_tx_sample_rate_get,
  3224. tdm_tx_sample_rate_put),
  3225. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  3226. tdm_rx_format_get,
  3227. tdm_rx_format_put),
  3228. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  3229. tdm_tx_format_get,
  3230. tdm_tx_format_put),
  3231. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  3232. tdm_rx_ch_get,
  3233. tdm_rx_ch_put),
  3234. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  3235. tdm_tx_ch_get,
  3236. tdm_tx_ch_put),
  3237. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3238. tdm_rx_sample_rate_get,
  3239. tdm_rx_sample_rate_put),
  3240. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3241. tdm_tx_sample_rate_get,
  3242. tdm_tx_sample_rate_put),
  3243. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  3244. tdm_rx_format_get,
  3245. tdm_rx_format_put),
  3246. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  3247. tdm_tx_format_get,
  3248. tdm_tx_format_put),
  3249. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  3250. tdm_rx_ch_get,
  3251. tdm_rx_ch_put),
  3252. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  3253. tdm_tx_ch_get,
  3254. tdm_tx_ch_put),
  3255. SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3256. tdm_rx_sample_rate_get,
  3257. tdm_rx_sample_rate_put),
  3258. SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3259. tdm_tx_sample_rate_get,
  3260. tdm_tx_sample_rate_put),
  3261. SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
  3262. tdm_rx_format_get,
  3263. tdm_rx_format_put),
  3264. SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
  3265. tdm_tx_format_get,
  3266. tdm_tx_format_put),
  3267. SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
  3268. tdm_rx_ch_get,
  3269. tdm_rx_ch_put),
  3270. SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
  3271. tdm_tx_ch_get,
  3272. tdm_tx_ch_put),
  3273. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  3274. aux_pcm_rx_sample_rate_get,
  3275. aux_pcm_rx_sample_rate_put),
  3276. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  3277. aux_pcm_rx_sample_rate_get,
  3278. aux_pcm_rx_sample_rate_put),
  3279. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  3280. aux_pcm_rx_sample_rate_get,
  3281. aux_pcm_rx_sample_rate_put),
  3282. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  3283. aux_pcm_rx_sample_rate_get,
  3284. aux_pcm_rx_sample_rate_put),
  3285. SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
  3286. aux_pcm_rx_sample_rate_get,
  3287. aux_pcm_rx_sample_rate_put),
  3288. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  3289. aux_pcm_tx_sample_rate_get,
  3290. aux_pcm_tx_sample_rate_put),
  3291. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  3292. aux_pcm_tx_sample_rate_get,
  3293. aux_pcm_tx_sample_rate_put),
  3294. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  3295. aux_pcm_tx_sample_rate_get,
  3296. aux_pcm_tx_sample_rate_put),
  3297. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  3298. aux_pcm_tx_sample_rate_get,
  3299. aux_pcm_tx_sample_rate_put),
  3300. SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
  3301. aux_pcm_tx_sample_rate_get,
  3302. aux_pcm_tx_sample_rate_put),
  3303. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  3304. mi2s_rx_sample_rate_get,
  3305. mi2s_rx_sample_rate_put),
  3306. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  3307. mi2s_rx_sample_rate_get,
  3308. mi2s_rx_sample_rate_put),
  3309. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  3310. mi2s_rx_sample_rate_get,
  3311. mi2s_rx_sample_rate_put),
  3312. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  3313. mi2s_rx_sample_rate_get,
  3314. mi2s_rx_sample_rate_put),
  3315. SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
  3316. mi2s_rx_sample_rate_get,
  3317. mi2s_rx_sample_rate_put),
  3318. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  3319. mi2s_tx_sample_rate_get,
  3320. mi2s_tx_sample_rate_put),
  3321. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  3322. mi2s_tx_sample_rate_get,
  3323. mi2s_tx_sample_rate_put),
  3324. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  3325. mi2s_tx_sample_rate_get,
  3326. mi2s_tx_sample_rate_put),
  3327. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  3328. mi2s_tx_sample_rate_get,
  3329. mi2s_tx_sample_rate_put),
  3330. SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
  3331. mi2s_tx_sample_rate_get,
  3332. mi2s_tx_sample_rate_put),
  3333. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  3334. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3335. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  3336. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3337. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  3338. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3339. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  3340. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3341. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  3342. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3343. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  3344. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3345. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  3346. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3347. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  3348. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3349. SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
  3350. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3351. SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
  3352. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3353. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  3354. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3355. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  3356. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3357. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  3358. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3359. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  3360. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3361. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  3362. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3363. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  3364. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3365. SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
  3366. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3367. SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
  3368. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3369. SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
  3370. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3371. SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
  3372. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3373. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  3374. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3375. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  3376. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3377. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  3378. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3379. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  3380. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3381. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3382. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3383. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3384. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3385. SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3386. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3387. SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3388. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3389. SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
  3390. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3391. SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
  3392. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3393. SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
  3394. msm_hifi_put),
  3395. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  3396. msm_bt_sample_rate_get,
  3397. msm_bt_sample_rate_put),
  3398. SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
  3399. msm_bt_sample_rate_rx_get,
  3400. msm_bt_sample_rate_rx_put),
  3401. SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
  3402. msm_bt_sample_rate_tx_get,
  3403. msm_bt_sample_rate_tx_put),
  3404. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  3405. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  3406. };
  3407. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  3408. int enable, bool dapm)
  3409. {
  3410. int ret = 0;
  3411. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3412. ret = tavil_cdc_mclk_enable(codec, enable);
  3413. } else {
  3414. dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
  3415. __func__);
  3416. ret = -EINVAL;
  3417. }
  3418. return ret;
  3419. }
  3420. static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
  3421. int enable, bool dapm)
  3422. {
  3423. int ret = 0;
  3424. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3425. ret = tavil_cdc_mclk_tx_enable(codec, enable);
  3426. } else {
  3427. dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
  3428. __func__);
  3429. ret = -EINVAL;
  3430. }
  3431. return ret;
  3432. }
  3433. static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
  3434. struct snd_kcontrol *kcontrol, int event)
  3435. {
  3436. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3437. pr_debug("%s: event = %d\n", __func__, event);
  3438. switch (event) {
  3439. case SND_SOC_DAPM_PRE_PMU:
  3440. return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
  3441. case SND_SOC_DAPM_POST_PMD:
  3442. return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
  3443. }
  3444. return 0;
  3445. }
  3446. static int msm_mclk_event(struct snd_soc_dapm_widget *w,
  3447. struct snd_kcontrol *kcontrol, int event)
  3448. {
  3449. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3450. pr_debug("%s: event = %d\n", __func__, event);
  3451. switch (event) {
  3452. case SND_SOC_DAPM_PRE_PMU:
  3453. return msm_snd_enable_codec_ext_clk(codec, 1, true);
  3454. case SND_SOC_DAPM_POST_PMD:
  3455. return msm_snd_enable_codec_ext_clk(codec, 0, true);
  3456. }
  3457. return 0;
  3458. }
  3459. static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
  3460. struct snd_kcontrol *k, int event)
  3461. {
  3462. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3463. struct snd_soc_card *card = codec->component.card;
  3464. struct msm_asoc_mach_data *pdata =
  3465. snd_soc_card_get_drvdata(card);
  3466. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
  3467. __func__, msm_hifi_control);
  3468. if (!pdata || !pdata->hph_en0_gpio_p) {
  3469. dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
  3470. return -EINVAL;
  3471. }
  3472. if (msm_hifi_control != MSM_HIFI_ON) {
  3473. dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
  3474. __func__);
  3475. return 0;
  3476. }
  3477. switch (event) {
  3478. case SND_SOC_DAPM_POST_PMU:
  3479. msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
  3480. break;
  3481. case SND_SOC_DAPM_PRE_PMD:
  3482. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
  3483. break;
  3484. }
  3485. return 0;
  3486. }
  3487. static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
  3488. SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
  3489. msm_mclk_event,
  3490. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3491. SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
  3492. msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3493. SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
  3494. SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
  3495. SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
  3496. SND_SOC_DAPM_MIC("Handset Mic", NULL),
  3497. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  3498. SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
  3499. SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
  3500. SND_SOC_DAPM_MIC("Analog Mic5", NULL),
  3501. SND_SOC_DAPM_MIC("Digital Mic0", NULL),
  3502. SND_SOC_DAPM_MIC("Digital Mic1", NULL),
  3503. SND_SOC_DAPM_MIC("Digital Mic2", NULL),
  3504. SND_SOC_DAPM_MIC("Digital Mic3", NULL),
  3505. SND_SOC_DAPM_MIC("Digital Mic4", NULL),
  3506. SND_SOC_DAPM_MIC("Digital Mic5", NULL),
  3507. };
  3508. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3509. struct snd_kcontrol *kcontrol, int event)
  3510. {
  3511. struct msm_asoc_mach_data *pdata = NULL;
  3512. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3513. int ret = 0;
  3514. u32 dmic_idx;
  3515. int *dmic_gpio_cnt;
  3516. struct device_node *dmic_gpio;
  3517. char *wname;
  3518. wname = strpbrk(w->name, "0123");
  3519. if (!wname) {
  3520. dev_err(codec->dev, "%s: widget not found\n", __func__);
  3521. return -EINVAL;
  3522. }
  3523. ret = kstrtouint(wname, 10, &dmic_idx);
  3524. if (ret < 0) {
  3525. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  3526. __func__);
  3527. return -EINVAL;
  3528. }
  3529. pdata = snd_soc_card_get_drvdata(codec->component.card);
  3530. switch (dmic_idx) {
  3531. case 0:
  3532. case 1:
  3533. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3534. dmic_gpio = pdata->dmic01_gpio_p;
  3535. break;
  3536. case 2:
  3537. case 3:
  3538. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3539. dmic_gpio = pdata->dmic23_gpio_p;
  3540. break;
  3541. default:
  3542. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  3543. __func__);
  3544. return -EINVAL;
  3545. }
  3546. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3547. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3548. switch (event) {
  3549. case SND_SOC_DAPM_PRE_PMU:
  3550. (*dmic_gpio_cnt)++;
  3551. if (*dmic_gpio_cnt == 1) {
  3552. ret = msm_cdc_pinctrl_select_active_state(
  3553. dmic_gpio);
  3554. if (ret < 0) {
  3555. pr_err("%s: gpio set cannot be activated %sd",
  3556. __func__, "dmic_gpio");
  3557. return ret;
  3558. }
  3559. }
  3560. break;
  3561. case SND_SOC_DAPM_POST_PMD:
  3562. (*dmic_gpio_cnt)--;
  3563. if (*dmic_gpio_cnt == 0) {
  3564. ret = msm_cdc_pinctrl_select_sleep_state(
  3565. dmic_gpio);
  3566. if (ret < 0) {
  3567. pr_err("%s: gpio set cannot be de-activated %sd",
  3568. __func__, "dmic_gpio");
  3569. return ret;
  3570. }
  3571. }
  3572. break;
  3573. default:
  3574. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3575. return -EINVAL;
  3576. }
  3577. return 0;
  3578. }
  3579. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3580. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3581. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3582. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3583. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3584. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3585. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3586. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3587. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3588. };
  3589. static inline int param_is_mask(int p)
  3590. {
  3591. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  3592. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  3593. }
  3594. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  3595. int n)
  3596. {
  3597. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  3598. }
  3599. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  3600. unsigned int bit)
  3601. {
  3602. if (bit >= SNDRV_MASK_MAX)
  3603. return;
  3604. if (param_is_mask(n)) {
  3605. struct snd_mask *m = param_to_mask(p, n);
  3606. m->bits[0] = 0;
  3607. m->bits[1] = 0;
  3608. m->bits[bit >> 5] |= (1 << (bit & 31));
  3609. }
  3610. }
  3611. static int msm_slim_get_ch_from_beid(int32_t be_id)
  3612. {
  3613. int ch_id = 0;
  3614. switch (be_id) {
  3615. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3616. ch_id = SLIM_RX_0;
  3617. break;
  3618. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3619. ch_id = SLIM_RX_1;
  3620. break;
  3621. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3622. ch_id = SLIM_RX_2;
  3623. break;
  3624. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3625. ch_id = SLIM_RX_3;
  3626. break;
  3627. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3628. ch_id = SLIM_RX_4;
  3629. break;
  3630. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3631. ch_id = SLIM_RX_6;
  3632. break;
  3633. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3634. ch_id = SLIM_TX_0;
  3635. break;
  3636. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3637. ch_id = SLIM_TX_3;
  3638. break;
  3639. default:
  3640. ch_id = SLIM_RX_0;
  3641. break;
  3642. }
  3643. return ch_id;
  3644. }
  3645. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  3646. {
  3647. int idx = 0;
  3648. switch (be_id) {
  3649. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3650. idx = WSA_CDC_DMA_RX_0;
  3651. break;
  3652. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3653. idx = WSA_CDC_DMA_TX_0;
  3654. break;
  3655. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3656. idx = WSA_CDC_DMA_RX_1;
  3657. break;
  3658. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3659. idx = WSA_CDC_DMA_TX_1;
  3660. break;
  3661. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3662. idx = WSA_CDC_DMA_TX_2;
  3663. break;
  3664. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3665. idx = RX_CDC_DMA_RX_0;
  3666. break;
  3667. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3668. idx = RX_CDC_DMA_RX_1;
  3669. break;
  3670. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3671. idx = RX_CDC_DMA_RX_2;
  3672. break;
  3673. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3674. idx = RX_CDC_DMA_RX_3;
  3675. break;
  3676. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3677. idx = RX_CDC_DMA_RX_5;
  3678. break;
  3679. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3680. idx = TX_CDC_DMA_TX_0;
  3681. break;
  3682. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3683. idx = TX_CDC_DMA_TX_3;
  3684. break;
  3685. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3686. idx = TX_CDC_DMA_TX_4;
  3687. break;
  3688. default:
  3689. idx = RX_CDC_DMA_RX_0;
  3690. break;
  3691. }
  3692. return idx;
  3693. }
  3694. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  3695. {
  3696. int idx = -EINVAL;
  3697. switch (be_id) {
  3698. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3699. idx = DP_RX_IDX;
  3700. break;
  3701. default:
  3702. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  3703. idx = -EINVAL;
  3704. break;
  3705. }
  3706. return idx;
  3707. }
  3708. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3709. struct snd_pcm_hw_params *params)
  3710. {
  3711. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3712. struct snd_interval *rate = hw_param_interval(params,
  3713. SNDRV_PCM_HW_PARAM_RATE);
  3714. struct snd_interval *channels = hw_param_interval(params,
  3715. SNDRV_PCM_HW_PARAM_CHANNELS);
  3716. int rc = 0;
  3717. int idx;
  3718. void *config = NULL;
  3719. struct snd_soc_codec *codec = NULL;
  3720. pr_debug("%s: format = %d, rate = %d\n",
  3721. __func__, params_format(params), params_rate(params));
  3722. switch (dai_link->id) {
  3723. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3724. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3725. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3726. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3727. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3728. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3729. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3730. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3731. slim_rx_cfg[idx].bit_format);
  3732. rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
  3733. channels->min = channels->max = slim_rx_cfg[idx].channels;
  3734. break;
  3735. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3736. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3737. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3738. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3739. slim_tx_cfg[idx].bit_format);
  3740. rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
  3741. channels->min = channels->max = slim_tx_cfg[idx].channels;
  3742. break;
  3743. case MSM_BACKEND_DAI_SLIMBUS_1_TX:
  3744. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3745. slim_tx_cfg[1].bit_format);
  3746. rate->min = rate->max = slim_tx_cfg[1].sample_rate;
  3747. channels->min = channels->max = slim_tx_cfg[1].channels;
  3748. break;
  3749. case MSM_BACKEND_DAI_SLIMBUS_4_TX:
  3750. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3751. SNDRV_PCM_FORMAT_S32_LE);
  3752. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3753. channels->min = channels->max = msm_vi_feed_tx_ch;
  3754. break;
  3755. case MSM_BACKEND_DAI_SLIMBUS_5_RX:
  3756. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3757. slim_rx_cfg[5].bit_format);
  3758. rate->min = rate->max = slim_rx_cfg[5].sample_rate;
  3759. channels->min = channels->max = slim_rx_cfg[5].channels;
  3760. break;
  3761. case MSM_BACKEND_DAI_SLIMBUS_5_TX:
  3762. codec = rtd->codec;
  3763. rate->min = rate->max = SAMPLING_RATE_16KHZ;
  3764. channels->min = channels->max = 1;
  3765. config = msm_codec_fn.get_afe_config_fn(codec,
  3766. AFE_SLIMBUS_SLAVE_PORT_CONFIG);
  3767. if (config) {
  3768. rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
  3769. config, SLIMBUS_5_TX);
  3770. if (rc)
  3771. pr_err("%s: Failed to set slimbus slave port config %d\n",
  3772. __func__, rc);
  3773. }
  3774. break;
  3775. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3776. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3777. slim_rx_cfg[SLIM_RX_7].bit_format);
  3778. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3779. channels->min = channels->max =
  3780. slim_rx_cfg[SLIM_RX_7].channels;
  3781. break;
  3782. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3783. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3784. channels->min = channels->max =
  3785. slim_tx_cfg[SLIM_TX_7].channels;
  3786. break;
  3787. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3788. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3789. channels->min = channels->max =
  3790. slim_tx_cfg[SLIM_TX_8].channels;
  3791. break;
  3792. case MSM_BACKEND_DAI_USB_RX:
  3793. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3794. usb_rx_cfg.bit_format);
  3795. rate->min = rate->max = usb_rx_cfg.sample_rate;
  3796. channels->min = channels->max = usb_rx_cfg.channels;
  3797. break;
  3798. case MSM_BACKEND_DAI_USB_TX:
  3799. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3800. usb_tx_cfg.bit_format);
  3801. rate->min = rate->max = usb_tx_cfg.sample_rate;
  3802. channels->min = channels->max = usb_tx_cfg.channels;
  3803. break;
  3804. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3805. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  3806. if (idx < 0) {
  3807. pr_err("%s: Incorrect ext disp idx %d\n",
  3808. __func__, idx);
  3809. rc = idx;
  3810. goto done;
  3811. }
  3812. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3813. ext_disp_rx_cfg[idx].bit_format);
  3814. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  3815. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  3816. break;
  3817. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3818. channels->min = channels->max = proxy_rx_cfg.channels;
  3819. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3820. break;
  3821. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3822. channels->min = channels->max =
  3823. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3824. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3825. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3826. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3827. break;
  3828. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3829. channels->min = channels->max =
  3830. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3831. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3832. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3833. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3834. break;
  3835. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3836. channels->min = channels->max =
  3837. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3838. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3839. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3840. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3841. break;
  3842. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3843. channels->min = channels->max =
  3844. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3845. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3846. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3847. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3848. break;
  3849. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3850. channels->min = channels->max =
  3851. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3852. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3853. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3854. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3855. break;
  3856. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3857. channels->min = channels->max =
  3858. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3859. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3860. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3861. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3862. break;
  3863. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  3864. channels->min = channels->max =
  3865. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3866. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3867. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  3868. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3869. break;
  3870. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  3871. channels->min = channels->max =
  3872. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  3873. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3874. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  3875. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3876. break;
  3877. case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
  3878. channels->min = channels->max =
  3879. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  3880. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3881. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  3882. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3883. break;
  3884. case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
  3885. channels->min = channels->max =
  3886. tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  3887. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3888. tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
  3889. rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3890. break;
  3891. case MSM_BACKEND_DAI_AUXPCM_RX:
  3892. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3893. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3894. rate->min = rate->max =
  3895. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3896. channels->min = channels->max =
  3897. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3898. break;
  3899. case MSM_BACKEND_DAI_AUXPCM_TX:
  3900. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3901. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3902. rate->min = rate->max =
  3903. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3904. channels->min = channels->max =
  3905. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3906. break;
  3907. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3908. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3909. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3910. rate->min = rate->max =
  3911. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3912. channels->min = channels->max =
  3913. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3914. break;
  3915. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3916. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3917. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3918. rate->min = rate->max =
  3919. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3920. channels->min = channels->max =
  3921. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3922. break;
  3923. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3924. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3925. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3926. rate->min = rate->max =
  3927. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3928. channels->min = channels->max =
  3929. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3930. break;
  3931. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3932. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3933. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3934. rate->min = rate->max =
  3935. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3936. channels->min = channels->max =
  3937. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3938. break;
  3939. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  3940. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3941. aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
  3942. rate->min = rate->max =
  3943. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  3944. channels->min = channels->max =
  3945. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  3946. break;
  3947. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  3948. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3949. aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
  3950. rate->min = rate->max =
  3951. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  3952. channels->min = channels->max =
  3953. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  3954. break;
  3955. case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
  3956. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3957. aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
  3958. rate->min = rate->max =
  3959. aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
  3960. channels->min = channels->max =
  3961. aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
  3962. break;
  3963. case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
  3964. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3965. aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
  3966. rate->min = rate->max =
  3967. aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
  3968. channels->min = channels->max =
  3969. aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
  3970. break;
  3971. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3972. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3973. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  3974. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  3975. channels->min = channels->max =
  3976. mi2s_rx_cfg[PRIM_MI2S].channels;
  3977. break;
  3978. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3979. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3980. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  3981. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  3982. channels->min = channels->max =
  3983. mi2s_tx_cfg[PRIM_MI2S].channels;
  3984. break;
  3985. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3986. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3987. mi2s_rx_cfg[SEC_MI2S].bit_format);
  3988. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  3989. channels->min = channels->max =
  3990. mi2s_rx_cfg[SEC_MI2S].channels;
  3991. break;
  3992. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3993. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3994. mi2s_tx_cfg[SEC_MI2S].bit_format);
  3995. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  3996. channels->min = channels->max =
  3997. mi2s_tx_cfg[SEC_MI2S].channels;
  3998. break;
  3999. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4000. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4001. mi2s_rx_cfg[TERT_MI2S].bit_format);
  4002. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  4003. channels->min = channels->max =
  4004. mi2s_rx_cfg[TERT_MI2S].channels;
  4005. break;
  4006. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4007. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4008. mi2s_tx_cfg[TERT_MI2S].bit_format);
  4009. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  4010. channels->min = channels->max =
  4011. mi2s_tx_cfg[TERT_MI2S].channels;
  4012. break;
  4013. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4014. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4015. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  4016. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  4017. channels->min = channels->max =
  4018. mi2s_rx_cfg[QUAT_MI2S].channels;
  4019. break;
  4020. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4021. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4022. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  4023. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  4024. channels->min = channels->max =
  4025. mi2s_tx_cfg[QUAT_MI2S].channels;
  4026. break;
  4027. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4028. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4029. mi2s_rx_cfg[QUIN_MI2S].bit_format);
  4030. rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
  4031. channels->min = channels->max =
  4032. mi2s_rx_cfg[QUIN_MI2S].channels;
  4033. break;
  4034. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4035. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4036. mi2s_tx_cfg[QUIN_MI2S].bit_format);
  4037. rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
  4038. channels->min = channels->max =
  4039. mi2s_tx_cfg[QUIN_MI2S].channels;
  4040. break;
  4041. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4042. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4043. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4044. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4045. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4046. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4047. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4048. cdc_dma_rx_cfg[idx].bit_format);
  4049. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  4050. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  4051. break;
  4052. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4053. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4054. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4055. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  4056. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  4057. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4058. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4059. cdc_dma_tx_cfg[idx].bit_format);
  4060. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  4061. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  4062. break;
  4063. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4064. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4065. SNDRV_PCM_FORMAT_S32_LE);
  4066. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  4067. channels->min = channels->max = msm_vi_feed_tx_ch;
  4068. break;
  4069. default:
  4070. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  4071. break;
  4072. }
  4073. done:
  4074. return rc;
  4075. }
  4076. static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  4077. {
  4078. int value = 0;
  4079. bool ret = 0;
  4080. struct snd_soc_card *card = codec->component.card;
  4081. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4082. struct pinctrl_state *en2_pinctrl_active;
  4083. struct pinctrl_state *en2_pinctrl_sleep;
  4084. if (!pdata->usbc_en2_gpio_p) {
  4085. if (active) {
  4086. /* if active and usbc_en2_gpio undefined, get pin */
  4087. pdata->usbc_en2_gpio_p = devm_pinctrl_get(card->dev);
  4088. if (IS_ERR_OR_NULL(pdata->usbc_en2_gpio_p)) {
  4089. dev_err(card->dev,
  4090. "%s: Can't get EN2 gpio pinctrl:%ld\n",
  4091. __func__,
  4092. PTR_ERR(pdata->usbc_en2_gpio_p));
  4093. pdata->usbc_en2_gpio_p = NULL;
  4094. return false;
  4095. }
  4096. } else {
  4097. /* if not active and usbc_en2_gpio undefined, return */
  4098. return false;
  4099. }
  4100. }
  4101. pdata->usbc_en2_gpio = of_get_named_gpio(card->dev->of_node,
  4102. "qcom,usbc-analog-en2-gpio", 0);
  4103. if (!gpio_is_valid(pdata->usbc_en2_gpio)) {
  4104. dev_err(card->dev, "%s, property %s not in node %s",
  4105. __func__, "qcom,usbc-analog-en2-gpio",
  4106. card->dev->of_node->full_name);
  4107. return false;
  4108. }
  4109. en2_pinctrl_active = pinctrl_lookup_state(
  4110. pdata->usbc_en2_gpio_p, "aud_active");
  4111. if (IS_ERR_OR_NULL(en2_pinctrl_active)) {
  4112. dev_err(card->dev,
  4113. "%s: Cannot get aud_active pinctrl state:%ld\n",
  4114. __func__, PTR_ERR(en2_pinctrl_active));
  4115. ret = false;
  4116. goto err_lookup_state;
  4117. }
  4118. en2_pinctrl_sleep = pinctrl_lookup_state(
  4119. pdata->usbc_en2_gpio_p, "aud_sleep");
  4120. if (IS_ERR_OR_NULL(en2_pinctrl_sleep)) {
  4121. dev_err(card->dev,
  4122. "%s: Cannot get aud_sleep pinctrl state:%ld\n",
  4123. __func__, PTR_ERR(en2_pinctrl_sleep));
  4124. ret = false;
  4125. goto err_lookup_state;
  4126. }
  4127. /* if active and usbc_en2_gpio_p defined, swap using usbc_en2_gpio_p */
  4128. if (active) {
  4129. dev_dbg(codec->dev, "%s: enter\n", __func__);
  4130. if (pdata->usbc_en2_gpio_p) {
  4131. value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
  4132. if (value)
  4133. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  4134. en2_pinctrl_sleep);
  4135. else
  4136. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  4137. en2_pinctrl_active);
  4138. } else if (pdata->usbc_en2_gpio >= 0) {
  4139. value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
  4140. gpio_set_value_cansleep(pdata->usbc_en2_gpio, !value);
  4141. }
  4142. pr_debug("%s: swap select switch %d to %d\n", __func__,
  4143. value, !value);
  4144. ret = true;
  4145. } else {
  4146. /* if not active, release usbc_en2_gpio_p pin */
  4147. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  4148. en2_pinctrl_sleep);
  4149. }
  4150. err_lookup_state:
  4151. devm_pinctrl_put(pdata->usbc_en2_gpio_p);
  4152. pdata->usbc_en2_gpio_p = NULL;
  4153. return ret;
  4154. }
  4155. static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  4156. {
  4157. int value = 0;
  4158. bool ret = false;
  4159. struct snd_soc_card *card;
  4160. struct msm_asoc_mach_data *pdata;
  4161. if (!codec) {
  4162. pr_err("%s codec is NULL\n", __func__);
  4163. return false;
  4164. }
  4165. card = codec->component.card;
  4166. pdata = snd_soc_card_get_drvdata(card);
  4167. if (!pdata)
  4168. return false;
  4169. if (wcd_mbhc_cfg.enable_usbc_analog)
  4170. return msm_usbc_swap_gnd_mic(codec, active);
  4171. /* if usbc is not defined, swap using us_euro_gpio_p */
  4172. if (pdata->us_euro_gpio_p) {
  4173. value = msm_cdc_pinctrl_get_state(
  4174. pdata->us_euro_gpio_p);
  4175. if (value)
  4176. msm_cdc_pinctrl_select_sleep_state(
  4177. pdata->us_euro_gpio_p);
  4178. else
  4179. msm_cdc_pinctrl_select_active_state(
  4180. pdata->us_euro_gpio_p);
  4181. dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
  4182. __func__, value, !value);
  4183. ret = true;
  4184. }
  4185. return ret;
  4186. }
  4187. static int msm_afe_set_config(struct snd_soc_codec *codec)
  4188. {
  4189. int ret = 0;
  4190. void *config_data = NULL;
  4191. if (!msm_codec_fn.get_afe_config_fn) {
  4192. dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
  4193. __func__);
  4194. return -EINVAL;
  4195. }
  4196. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4197. AFE_CDC_REGISTERS_CONFIG);
  4198. if (config_data) {
  4199. ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
  4200. if (ret) {
  4201. dev_err(codec->dev,
  4202. "%s: Failed to set codec registers config %d\n",
  4203. __func__, ret);
  4204. return ret;
  4205. }
  4206. }
  4207. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4208. AFE_CDC_REGISTER_PAGE_CONFIG);
  4209. if (config_data) {
  4210. ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
  4211. 0);
  4212. if (ret)
  4213. dev_err(codec->dev,
  4214. "%s: Failed to set cdc register page config\n",
  4215. __func__);
  4216. }
  4217. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4218. AFE_SLIMBUS_SLAVE_CONFIG);
  4219. if (config_data) {
  4220. ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
  4221. if (ret) {
  4222. dev_err(codec->dev,
  4223. "%s: Failed to set slimbus slave config %d\n",
  4224. __func__, ret);
  4225. return ret;
  4226. }
  4227. }
  4228. return 0;
  4229. }
  4230. static void msm_afe_clear_config(void)
  4231. {
  4232. afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
  4233. afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
  4234. }
  4235. static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
  4236. {
  4237. int ret = 0;
  4238. void *config_data;
  4239. struct snd_soc_codec *codec = rtd->codec;
  4240. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4241. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4242. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4243. struct snd_soc_component *aux_comp;
  4244. struct snd_card *card;
  4245. struct snd_info_entry *entry;
  4246. struct msm_asoc_mach_data *pdata =
  4247. snd_soc_card_get_drvdata(rtd->card);
  4248. /*
  4249. * Codec SLIMBUS configuration
  4250. * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
  4251. * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
  4252. * TX14, TX15, TX16
  4253. */
  4254. unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
  4255. 150, 151};
  4256. unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
  4257. 134, 135, 136, 137, 138, 139,
  4258. 140, 141, 142, 143};
  4259. pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
  4260. rtd->pmdown_time = 0;
  4261. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  4262. ARRAY_SIZE(msm_tavil_snd_controls));
  4263. if (ret < 0) {
  4264. pr_err("%s: add_codec_controls failed, err %d\n",
  4265. __func__, ret);
  4266. return ret;
  4267. }
  4268. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4269. ARRAY_SIZE(msm_common_snd_controls));
  4270. if (ret < 0) {
  4271. pr_err("%s: add_codec_controls failed, err %d\n",
  4272. __func__, ret);
  4273. return ret;
  4274. }
  4275. snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
  4276. ARRAY_SIZE(msm_dapm_widgets_tavil));
  4277. snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
  4278. ARRAY_SIZE(wcd_audio_paths_tavil));
  4279. snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
  4280. snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
  4281. snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
  4282. snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
  4283. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4284. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4285. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4286. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4287. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  4288. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  4289. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
  4290. snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
  4291. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
  4292. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
  4293. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
  4294. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4295. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
  4296. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
  4297. snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
  4298. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  4299. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  4300. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4301. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4302. snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
  4303. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
  4304. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
  4305. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
  4306. snd_soc_dapm_sync(dapm);
  4307. snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4308. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4309. msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
  4310. ret = msm_afe_set_config(codec);
  4311. if (ret) {
  4312. pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
  4313. goto err;
  4314. }
  4315. pdata->is_afe_config_done = true;
  4316. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4317. AFE_AANC_VERSION);
  4318. if (config_data) {
  4319. ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
  4320. if (ret) {
  4321. pr_err("%s: Failed to set aanc version %d\n",
  4322. __func__, ret);
  4323. goto err;
  4324. }
  4325. }
  4326. /*
  4327. * Send speaker configuration only for WSA8810.
  4328. * Default configuration is for WSA8815.
  4329. */
  4330. pr_debug("%s: Number of aux devices: %d\n",
  4331. __func__, rtd->card->num_aux_devs);
  4332. if (rtd->card->num_aux_devs &&
  4333. !list_empty(&rtd->card->aux_comp_list)) {
  4334. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  4335. struct snd_soc_component, card_aux_list);
  4336. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4337. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4338. tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
  4339. tavil_set_spkr_gain_offset(rtd->codec,
  4340. WCD934X_RX_GAIN_OFFSET_M1P5_DB);
  4341. }
  4342. }
  4343. card = rtd->card->snd_card;
  4344. entry = snd_info_create_subdir(card->module, "codecs",
  4345. card->proc_root);
  4346. if (!entry) {
  4347. pr_debug("%s: Cannot create codecs module entry\n",
  4348. __func__);
  4349. ret = 0;
  4350. goto err;
  4351. }
  4352. pdata->codec_root = entry;
  4353. tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
  4354. codec_reg_done = true;
  4355. return 0;
  4356. err:
  4357. return ret;
  4358. }
  4359. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  4360. {
  4361. int ret = 0;
  4362. struct snd_soc_codec *codec = rtd->codec;
  4363. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4364. struct snd_card *card;
  4365. struct snd_info_entry *entry;
  4366. struct snd_soc_component *aux_comp;
  4367. struct msm_asoc_mach_data *pdata =
  4368. snd_soc_card_get_drvdata(rtd->card);
  4369. ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
  4370. ARRAY_SIZE(msm_int_snd_controls));
  4371. if (ret < 0) {
  4372. pr_err("%s: add_codec_controls failed: %d\n",
  4373. __func__, ret);
  4374. return ret;
  4375. }
  4376. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4377. ARRAY_SIZE(msm_common_snd_controls));
  4378. if (ret < 0) {
  4379. pr_err("%s: add common snd controls failed: %d\n",
  4380. __func__, ret);
  4381. return ret;
  4382. }
  4383. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  4384. ARRAY_SIZE(msm_int_dapm_widgets));
  4385. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4386. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4387. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4388. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4389. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  4390. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  4391. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  4392. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  4393. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  4394. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  4395. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  4396. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  4397. snd_soc_dapm_sync(dapm);
  4398. /*
  4399. * Send speaker configuration only for WSA8810.
  4400. * Default configuration is for WSA8815.
  4401. */
  4402. dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
  4403. __func__, rtd->card->num_aux_devs);
  4404. if (rtd->card->num_aux_devs &&
  4405. !list_empty(&rtd->card->component_dev_list)) {
  4406. aux_comp = list_first_entry(
  4407. &rtd->card->component_dev_list,
  4408. struct snd_soc_component,
  4409. card_aux_list);
  4410. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4411. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4412. wsa_macro_set_spkr_mode(rtd->codec,
  4413. WSA_MACRO_SPKR_MODE_1);
  4414. wsa_macro_set_spkr_gain_offset(rtd->codec,
  4415. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  4416. }
  4417. }
  4418. card = rtd->card->snd_card;
  4419. if (!pdata->codec_root) {
  4420. entry = snd_info_create_subdir(card->module, "codecs",
  4421. card->proc_root);
  4422. if (!entry) {
  4423. pr_debug("%s: Cannot create codecs module entry\n",
  4424. __func__);
  4425. ret = 0;
  4426. goto err;
  4427. }
  4428. pdata->codec_root = entry;
  4429. }
  4430. bolero_info_create_codec_entry(pdata->codec_root, codec);
  4431. codec_reg_done = true;
  4432. return 0;
  4433. err:
  4434. return ret;
  4435. }
  4436. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  4437. {
  4438. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  4439. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  4440. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4441. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4442. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4443. }
  4444. static void *def_wcd_mbhc_cal(void)
  4445. {
  4446. void *wcd_mbhc_cal;
  4447. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  4448. u16 *btn_high;
  4449. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  4450. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  4451. if (!wcd_mbhc_cal)
  4452. return NULL;
  4453. #define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
  4454. S(v_hs_max, 1600);
  4455. #undef S
  4456. #define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
  4457. S(num_btn, WCD_MBHC_DEF_BUTTONS);
  4458. #undef S
  4459. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  4460. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  4461. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  4462. btn_high[0] = 75;
  4463. btn_high[1] = 150;
  4464. btn_high[2] = 237;
  4465. btn_high[3] = 500;
  4466. btn_high[4] = 500;
  4467. btn_high[5] = 500;
  4468. btn_high[6] = 500;
  4469. btn_high[7] = 500;
  4470. return wcd_mbhc_cal;
  4471. }
  4472. static int msm_snd_hw_params(struct snd_pcm_substream *substream,
  4473. struct snd_pcm_hw_params *params)
  4474. {
  4475. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4476. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4477. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4478. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4479. int ret = 0;
  4480. u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4481. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4482. u32 user_set_tx_ch = 0;
  4483. u32 rx_ch_count;
  4484. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4485. ret = snd_soc_dai_get_channel_map(codec_dai,
  4486. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4487. if (ret < 0) {
  4488. pr_err("%s: failed to get codec chan map, err:%d\n",
  4489. __func__, ret);
  4490. goto err;
  4491. }
  4492. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
  4493. pr_debug("%s: rx_5_ch=%d\n", __func__,
  4494. slim_rx_cfg[5].channels);
  4495. rx_ch_count = slim_rx_cfg[5].channels;
  4496. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
  4497. pr_debug("%s: rx_2_ch=%d\n", __func__,
  4498. slim_rx_cfg[2].channels);
  4499. rx_ch_count = slim_rx_cfg[2].channels;
  4500. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
  4501. pr_debug("%s: rx_6_ch=%d\n", __func__,
  4502. slim_rx_cfg[6].channels);
  4503. rx_ch_count = slim_rx_cfg[6].channels;
  4504. } else {
  4505. pr_debug("%s: rx_0_ch=%d\n", __func__,
  4506. slim_rx_cfg[0].channels);
  4507. rx_ch_count = slim_rx_cfg[0].channels;
  4508. }
  4509. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4510. rx_ch_count, rx_ch);
  4511. if (ret < 0) {
  4512. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4513. __func__, ret);
  4514. goto err;
  4515. }
  4516. } else {
  4517. pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
  4518. codec_dai->name, codec_dai->id, user_set_tx_ch);
  4519. ret = snd_soc_dai_get_channel_map(codec_dai,
  4520. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4521. if (ret < 0) {
  4522. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4523. __func__, ret);
  4524. goto err;
  4525. }
  4526. /* For <codec>_tx1 case */
  4527. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
  4528. user_set_tx_ch = slim_tx_cfg[0].channels;
  4529. /* For <codec>_tx3 case */
  4530. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
  4531. user_set_tx_ch = slim_tx_cfg[1].channels;
  4532. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
  4533. user_set_tx_ch = msm_vi_feed_tx_ch;
  4534. else
  4535. user_set_tx_ch = tx_ch_cnt;
  4536. pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
  4537. __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
  4538. tx_ch_cnt, dai_link->id);
  4539. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4540. user_set_tx_ch, tx_ch, 0, 0);
  4541. if (ret < 0)
  4542. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4543. __func__, ret);
  4544. }
  4545. err:
  4546. return ret;
  4547. }
  4548. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  4549. struct snd_pcm_hw_params *params)
  4550. {
  4551. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4552. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4553. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4554. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4555. int ret = 0;
  4556. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  4557. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4558. u32 user_set_tx_ch = 0;
  4559. u32 user_set_rx_ch = 0;
  4560. u32 ch_id;
  4561. ret = snd_soc_dai_get_channel_map(codec_dai,
  4562. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  4563. &rx_ch_cdc_dma);
  4564. if (ret < 0) {
  4565. pr_err("%s: failed to get codec chan map, err:%d\n",
  4566. __func__, ret);
  4567. goto err;
  4568. }
  4569. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4570. switch (dai_link->id) {
  4571. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4572. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4573. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4574. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4575. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4576. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  4577. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  4578. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  4579. {
  4580. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4581. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  4582. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  4583. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  4584. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4585. user_set_rx_ch, &rx_ch_cdc_dma);
  4586. if (ret < 0) {
  4587. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4588. __func__, ret);
  4589. goto err;
  4590. }
  4591. }
  4592. break;
  4593. }
  4594. } else {
  4595. switch (dai_link->id) {
  4596. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4597. {
  4598. user_set_tx_ch = msm_vi_feed_tx_ch;
  4599. }
  4600. break;
  4601. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4602. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4603. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4604. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  4605. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  4606. {
  4607. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4608. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  4609. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  4610. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  4611. }
  4612. break;
  4613. }
  4614. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  4615. &tx_ch_cdc_dma, 0, 0);
  4616. if (ret < 0) {
  4617. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4618. __func__, ret);
  4619. goto err;
  4620. }
  4621. }
  4622. err:
  4623. return ret;
  4624. }
  4625. static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
  4626. struct snd_pcm_hw_params *params)
  4627. {
  4628. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4629. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4630. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4631. unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4632. unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
  4633. unsigned int num_tx_ch = 0;
  4634. unsigned int num_rx_ch = 0;
  4635. int ret = 0;
  4636. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4637. num_rx_ch = params_channels(params);
  4638. pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
  4639. codec_dai->name, codec_dai->id, num_rx_ch);
  4640. ret = snd_soc_dai_get_channel_map(codec_dai,
  4641. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4642. if (ret < 0) {
  4643. pr_err("%s: failed to get codec chan map, err:%d\n",
  4644. __func__, ret);
  4645. goto err;
  4646. }
  4647. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4648. num_rx_ch, rx_ch);
  4649. if (ret < 0) {
  4650. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4651. __func__, ret);
  4652. goto err;
  4653. }
  4654. } else {
  4655. num_tx_ch = params_channels(params);
  4656. pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
  4657. codec_dai->name, codec_dai->id, num_tx_ch);
  4658. ret = snd_soc_dai_get_channel_map(codec_dai,
  4659. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4660. if (ret < 0) {
  4661. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4662. __func__, ret);
  4663. goto err;
  4664. }
  4665. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4666. num_tx_ch, tx_ch, 0, 0);
  4667. if (ret < 0) {
  4668. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4669. __func__, ret);
  4670. goto err;
  4671. }
  4672. }
  4673. err:
  4674. return ret;
  4675. }
  4676. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  4677. struct snd_pcm_hw_params *params)
  4678. {
  4679. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4680. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4681. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4682. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4683. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  4684. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4685. int ret;
  4686. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  4687. codec_dai->name, codec_dai->id);
  4688. ret = snd_soc_dai_get_channel_map(codec_dai,
  4689. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4690. if (ret) {
  4691. dev_err(rtd->dev,
  4692. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  4693. __func__, ret);
  4694. goto err;
  4695. }
  4696. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  4697. __func__, tx_ch_cnt, dai_link->id);
  4698. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4699. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  4700. if (ret)
  4701. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  4702. __func__, ret);
  4703. err:
  4704. return ret;
  4705. }
  4706. static int msm_get_port_id(int be_id)
  4707. {
  4708. int afe_port_id;
  4709. switch (be_id) {
  4710. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  4711. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  4712. break;
  4713. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  4714. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  4715. break;
  4716. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  4717. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  4718. break;
  4719. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  4720. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  4721. break;
  4722. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4723. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  4724. break;
  4725. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4726. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  4727. break;
  4728. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4729. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  4730. break;
  4731. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4732. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  4733. break;
  4734. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4735. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
  4736. break;
  4737. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4738. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
  4739. break;
  4740. default:
  4741. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  4742. afe_port_id = -EINVAL;
  4743. }
  4744. return afe_port_id;
  4745. }
  4746. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  4747. {
  4748. u32 bit_per_sample;
  4749. switch (bit_format) {
  4750. case SNDRV_PCM_FORMAT_S32_LE:
  4751. case SNDRV_PCM_FORMAT_S24_3LE:
  4752. case SNDRV_PCM_FORMAT_S24_LE:
  4753. bit_per_sample = 32;
  4754. break;
  4755. case SNDRV_PCM_FORMAT_S16_LE:
  4756. default:
  4757. bit_per_sample = 16;
  4758. break;
  4759. }
  4760. return bit_per_sample;
  4761. }
  4762. static void update_mi2s_clk_val(int dai_id, int stream)
  4763. {
  4764. u32 bit_per_sample;
  4765. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4766. bit_per_sample =
  4767. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  4768. mi2s_clk[dai_id].clk_freq_in_hz =
  4769. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4770. } else {
  4771. bit_per_sample =
  4772. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  4773. mi2s_clk[dai_id].clk_freq_in_hz =
  4774. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4775. }
  4776. }
  4777. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  4778. {
  4779. int ret = 0;
  4780. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4781. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4782. int port_id = 0;
  4783. int index = cpu_dai->id;
  4784. port_id = msm_get_port_id(rtd->dai_link->id);
  4785. if (port_id < 0) {
  4786. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  4787. ret = port_id;
  4788. goto err;
  4789. }
  4790. if (enable) {
  4791. update_mi2s_clk_val(index, substream->stream);
  4792. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  4793. mi2s_clk[index].clk_freq_in_hz);
  4794. }
  4795. mi2s_clk[index].enable = enable;
  4796. ret = afe_set_lpass_clock_v2(port_id,
  4797. &mi2s_clk[index]);
  4798. if (ret < 0) {
  4799. dev_err(rtd->card->dev,
  4800. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  4801. __func__, port_id, ret);
  4802. goto err;
  4803. }
  4804. err:
  4805. return ret;
  4806. }
  4807. static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
  4808. enum pinctrl_pin_state new_state)
  4809. {
  4810. int ret = 0;
  4811. int curr_state = 0;
  4812. if (pinctrl_info == NULL) {
  4813. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4814. ret = -EINVAL;
  4815. goto err;
  4816. }
  4817. if (pinctrl_info->pinctrl == NULL) {
  4818. pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
  4819. ret = -EINVAL;
  4820. goto err;
  4821. }
  4822. curr_state = pinctrl_info->curr_state;
  4823. pinctrl_info->curr_state = new_state;
  4824. pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
  4825. pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
  4826. if (curr_state == pinctrl_info->curr_state) {
  4827. pr_debug("%s: Already in same state\n", __func__);
  4828. goto err;
  4829. }
  4830. if (curr_state != STATE_DISABLE &&
  4831. pinctrl_info->curr_state != STATE_DISABLE) {
  4832. pr_debug("%s: state already active cannot switch\n", __func__);
  4833. ret = -EIO;
  4834. goto err;
  4835. }
  4836. switch (pinctrl_info->curr_state) {
  4837. case STATE_MI2S_ACTIVE:
  4838. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4839. pinctrl_info->mi2s_active);
  4840. if (ret) {
  4841. pr_err("%s: MI2S state select failed with %d\n",
  4842. __func__, ret);
  4843. ret = -EIO;
  4844. goto err;
  4845. }
  4846. break;
  4847. case STATE_TDM_ACTIVE:
  4848. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4849. pinctrl_info->tdm_active);
  4850. if (ret) {
  4851. pr_err("%s: TDM state select failed with %d\n",
  4852. __func__, ret);
  4853. ret = -EIO;
  4854. goto err;
  4855. }
  4856. break;
  4857. case STATE_DISABLE:
  4858. if (curr_state == STATE_MI2S_ACTIVE) {
  4859. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4860. pinctrl_info->mi2s_disable);
  4861. } else {
  4862. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4863. pinctrl_info->tdm_disable);
  4864. }
  4865. if (ret) {
  4866. pr_err("%s: state disable failed with %d\n",
  4867. __func__, ret);
  4868. ret = -EIO;
  4869. goto err;
  4870. }
  4871. break;
  4872. default:
  4873. pr_err("%s: TLMM pin state is invalid\n", __func__);
  4874. return -EINVAL;
  4875. }
  4876. err:
  4877. return ret;
  4878. }
  4879. static int msm_get_pinctrl(struct platform_device *pdev)
  4880. {
  4881. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4882. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4883. struct msm_pinctrl_info *pinctrl_info = NULL;
  4884. struct pinctrl *pinctrl;
  4885. int ret = 0;
  4886. pinctrl_info = &pdata->pinctrl_info;
  4887. if (pinctrl_info == NULL) {
  4888. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4889. return -EINVAL;
  4890. }
  4891. pinctrl = devm_pinctrl_get(&pdev->dev);
  4892. if (IS_ERR_OR_NULL(pinctrl)) {
  4893. pr_err("%s: Unable to get pinctrl handle\n", __func__);
  4894. return -EINVAL;
  4895. }
  4896. pinctrl_info->pinctrl = pinctrl;
  4897. /* get all the states handles from Device Tree */
  4898. pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
  4899. "quat-mi2s-sleep");
  4900. if (IS_ERR(pinctrl_info->mi2s_disable)) {
  4901. pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
  4902. goto err;
  4903. }
  4904. pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
  4905. "quat-mi2s-active");
  4906. if (IS_ERR(pinctrl_info->mi2s_active)) {
  4907. pr_err("%s: could not get mi2s_active pinstate\n", __func__);
  4908. goto err;
  4909. }
  4910. pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
  4911. "quat-tdm-sleep");
  4912. if (IS_ERR(pinctrl_info->tdm_disable)) {
  4913. pr_err("%s: could not get tdm_disable pinstate\n", __func__);
  4914. goto err;
  4915. }
  4916. pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
  4917. "quat-tdm-active");
  4918. if (IS_ERR(pinctrl_info->tdm_active)) {
  4919. pr_err("%s: could not get tdm_active pinstate\n",
  4920. __func__);
  4921. goto err;
  4922. }
  4923. /* Reset the TLMM pins to a default state */
  4924. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4925. pinctrl_info->mi2s_disable);
  4926. if (ret != 0) {
  4927. pr_err("%s: Disable TLMM pins failed with %d\n",
  4928. __func__, ret);
  4929. ret = -EIO;
  4930. goto err;
  4931. }
  4932. pinctrl_info->curr_state = STATE_DISABLE;
  4933. return 0;
  4934. err:
  4935. devm_pinctrl_put(pinctrl);
  4936. pinctrl_info->pinctrl = NULL;
  4937. return -EINVAL;
  4938. }
  4939. static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  4940. struct snd_pcm_hw_params *params)
  4941. {
  4942. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4943. struct snd_interval *rate = hw_param_interval(params,
  4944. SNDRV_PCM_HW_PARAM_RATE);
  4945. struct snd_interval *channels = hw_param_interval(params,
  4946. SNDRV_PCM_HW_PARAM_CHANNELS);
  4947. if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
  4948. channels->min = channels->max =
  4949. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4950. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4951. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  4952. rate->min = rate->max =
  4953. tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  4954. } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
  4955. channels->min = channels->max =
  4956. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4957. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4958. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  4959. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  4960. } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
  4961. channels->min = channels->max =
  4962. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4963. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4964. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  4965. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  4966. } else {
  4967. pr_err("%s: dai id 0x%x not supported\n",
  4968. __func__, cpu_dai->id);
  4969. return -EINVAL;
  4970. }
  4971. pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
  4972. __func__, cpu_dai->id, channels->max, rate->max,
  4973. params_format(params));
  4974. return 0;
  4975. }
  4976. static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  4977. struct snd_pcm_hw_params *params)
  4978. {
  4979. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4980. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4981. int ret = 0;
  4982. int slot_width = 32;
  4983. int channels, slots;
  4984. unsigned int slot_mask, rate, clk_freq;
  4985. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  4986. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  4987. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4988. switch (cpu_dai->id) {
  4989. case AFE_PORT_ID_PRIMARY_TDM_RX:
  4990. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  4991. break;
  4992. case AFE_PORT_ID_SECONDARY_TDM_RX:
  4993. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4994. break;
  4995. case AFE_PORT_ID_TERTIARY_TDM_RX:
  4996. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  4997. break;
  4998. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  4999. slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  5000. break;
  5001. case AFE_PORT_ID_QUINARY_TDM_RX:
  5002. slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  5003. break;
  5004. case AFE_PORT_ID_PRIMARY_TDM_TX:
  5005. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  5006. break;
  5007. case AFE_PORT_ID_SECONDARY_TDM_TX:
  5008. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  5009. break;
  5010. case AFE_PORT_ID_TERTIARY_TDM_TX:
  5011. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  5012. break;
  5013. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  5014. slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  5015. break;
  5016. case AFE_PORT_ID_QUINARY_TDM_TX:
  5017. slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  5018. break;
  5019. default:
  5020. pr_err("%s: dai id 0x%x not supported\n",
  5021. __func__, cpu_dai->id);
  5022. return -EINVAL;
  5023. }
  5024. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  5025. /*2 slot config - bits 0 and 1 set for the first two slots */
  5026. slot_mask = 0x0000FFFF >> (16-slots);
  5027. channels = slots;
  5028. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  5029. __func__, slot_width, slots);
  5030. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  5031. slots, slot_width);
  5032. if (ret < 0) {
  5033. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  5034. __func__, ret);
  5035. goto end;
  5036. }
  5037. ret = snd_soc_dai_set_channel_map(cpu_dai,
  5038. 0, NULL, channels, slot_offset);
  5039. if (ret < 0) {
  5040. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  5041. __func__, ret);
  5042. goto end;
  5043. }
  5044. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  5045. /*2 slot config - bits 0 and 1 set for the first two slots */
  5046. slot_mask = 0x0000FFFF >> (16-slots);
  5047. channels = slots;
  5048. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  5049. __func__, slot_width, slots);
  5050. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  5051. slots, slot_width);
  5052. if (ret < 0) {
  5053. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  5054. __func__, ret);
  5055. goto end;
  5056. }
  5057. ret = snd_soc_dai_set_channel_map(cpu_dai,
  5058. channels, slot_offset, 0, NULL);
  5059. if (ret < 0) {
  5060. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  5061. __func__, ret);
  5062. goto end;
  5063. }
  5064. } else {
  5065. ret = -EINVAL;
  5066. pr_err("%s: invalid use case, err:%d\n",
  5067. __func__, ret);
  5068. goto end;
  5069. }
  5070. rate = params_rate(params);
  5071. clk_freq = rate * slot_width * slots;
  5072. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  5073. if (ret < 0)
  5074. pr_err("%s: failed to set tdm clk, err:%d\n",
  5075. __func__, ret);
  5076. end:
  5077. return ret;
  5078. }
  5079. static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
  5080. {
  5081. int ret = 0;
  5082. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5083. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5084. struct snd_soc_card *card = rtd->card;
  5085. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5086. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5087. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5088. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  5089. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  5090. ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
  5091. if (ret)
  5092. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5093. __func__, ret);
  5094. }
  5095. return ret;
  5096. }
  5097. static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
  5098. {
  5099. int ret = 0;
  5100. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5101. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5102. struct snd_soc_card *card = rtd->card;
  5103. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5104. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5105. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5106. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  5107. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  5108. ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
  5109. if (ret)
  5110. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5111. __func__, ret);
  5112. }
  5113. }
  5114. static struct snd_soc_ops sm6150_tdm_be_ops = {
  5115. .hw_params = sm6150_tdm_snd_hw_params,
  5116. .startup = sm6150_tdm_snd_startup,
  5117. .shutdown = sm6150_tdm_snd_shutdown
  5118. };
  5119. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  5120. {
  5121. cpumask_t mask;
  5122. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  5123. pm_qos_remove_request(&substream->latency_pm_qos_req);
  5124. cpumask_clear(&mask);
  5125. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  5126. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  5127. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  5128. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  5129. pm_qos_add_request(&substream->latency_pm_qos_req,
  5130. PM_QOS_CPU_DMA_LATENCY,
  5131. MSM_LL_QOS_VALUE);
  5132. return 0;
  5133. }
  5134. static struct snd_soc_ops msm_fe_qos_ops = {
  5135. .prepare = msm_fe_qos_prepare,
  5136. };
  5137. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  5138. {
  5139. int ret = 0;
  5140. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5141. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5142. int index = cpu_dai->id;
  5143. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  5144. struct snd_soc_card *card = rtd->card;
  5145. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5146. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5147. int ret_pinctrl = 0;
  5148. dev_dbg(rtd->card->dev,
  5149. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  5150. __func__, substream->name, substream->stream,
  5151. cpu_dai->name, cpu_dai->id);
  5152. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5153. ret = -EINVAL;
  5154. dev_err(rtd->card->dev,
  5155. "%s: CPU DAI id (%d) out of range\n",
  5156. __func__, cpu_dai->id);
  5157. goto err;
  5158. }
  5159. /*
  5160. * Mutex protection in case the same MI2S
  5161. * interface using for both TX and RX so
  5162. * that the same clock won't be enable twice.
  5163. */
  5164. mutex_lock(&mi2s_intf_conf[index].lock);
  5165. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  5166. /* Check if msm needs to provide the clock to the interface */
  5167. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  5168. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  5169. fmt = SND_SOC_DAIFMT_CBM_CFM;
  5170. }
  5171. ret = msm_mi2s_set_sclk(substream, true);
  5172. if (ret < 0) {
  5173. dev_err(rtd->card->dev,
  5174. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  5175. __func__, ret);
  5176. goto clean_up;
  5177. }
  5178. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  5179. if (ret < 0) {
  5180. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  5181. __func__, index, ret);
  5182. goto clk_off;
  5183. }
  5184. if (index == QUAT_MI2S) {
  5185. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5186. STATE_MI2S_ACTIVE);
  5187. if (ret_pinctrl)
  5188. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5189. __func__, ret_pinctrl);
  5190. }
  5191. }
  5192. clk_off:
  5193. if (ret < 0)
  5194. msm_mi2s_set_sclk(substream, false);
  5195. clean_up:
  5196. if (ret < 0)
  5197. mi2s_intf_conf[index].ref_cnt--;
  5198. mutex_unlock(&mi2s_intf_conf[index].lock);
  5199. err:
  5200. return ret;
  5201. }
  5202. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  5203. {
  5204. int ret;
  5205. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5206. int index = rtd->cpu_dai->id;
  5207. struct snd_soc_card *card = rtd->card;
  5208. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5209. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5210. int ret_pinctrl = 0;
  5211. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  5212. substream->name, substream->stream);
  5213. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5214. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  5215. return;
  5216. }
  5217. mutex_lock(&mi2s_intf_conf[index].lock);
  5218. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  5219. ret = msm_mi2s_set_sclk(substream, false);
  5220. if (ret < 0)
  5221. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  5222. __func__, index, ret);
  5223. if (index == QUAT_MI2S) {
  5224. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5225. STATE_DISABLE);
  5226. if (ret_pinctrl)
  5227. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5228. __func__, ret_pinctrl);
  5229. }
  5230. }
  5231. mutex_unlock(&mi2s_intf_conf[index].lock);
  5232. }
  5233. static struct snd_soc_ops msm_mi2s_be_ops = {
  5234. .startup = msm_mi2s_snd_startup,
  5235. .shutdown = msm_mi2s_snd_shutdown,
  5236. };
  5237. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  5238. .hw_params = msm_snd_cdc_dma_hw_params,
  5239. };
  5240. static struct snd_soc_ops msm_be_ops = {
  5241. .hw_params = msm_snd_hw_params,
  5242. };
  5243. static struct snd_soc_ops msm_slimbus_2_be_ops = {
  5244. .hw_params = msm_slimbus_2_hw_params,
  5245. };
  5246. static struct snd_soc_ops msm_wcn_ops = {
  5247. .hw_params = msm_wcn_hw_params,
  5248. };
  5249. /* Digital audio interface glue - connects codec <---> CPU */
  5250. static struct snd_soc_dai_link msm_common_dai_links[] = {
  5251. /* FrontEnd DAI Links */
  5252. {/* hw:x,0 */
  5253. .name = MSM_DAILINK_NAME(Media1),
  5254. .stream_name = "MultiMedia1",
  5255. .cpu_dai_name = "MultiMedia1",
  5256. .platform_name = "msm-pcm-dsp.0",
  5257. .dynamic = 1,
  5258. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5259. .dpcm_playback = 1,
  5260. .dpcm_capture = 1,
  5261. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5262. SND_SOC_DPCM_TRIGGER_POST},
  5263. .codec_dai_name = "snd-soc-dummy-dai",
  5264. .codec_name = "snd-soc-dummy",
  5265. .ignore_suspend = 1,
  5266. /* this dainlink has playback support */
  5267. .ignore_pmdown_time = 1,
  5268. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5269. },
  5270. {/* hw:x,1 */
  5271. .name = MSM_DAILINK_NAME(Media2),
  5272. .stream_name = "MultiMedia2",
  5273. .cpu_dai_name = "MultiMedia2",
  5274. .platform_name = "msm-pcm-dsp.0",
  5275. .dynamic = 1,
  5276. .dpcm_playback = 1,
  5277. .dpcm_capture = 1,
  5278. .codec_dai_name = "snd-soc-dummy-dai",
  5279. .codec_name = "snd-soc-dummy",
  5280. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5281. SND_SOC_DPCM_TRIGGER_POST},
  5282. .ignore_suspend = 1,
  5283. /* this dainlink has playback support */
  5284. .ignore_pmdown_time = 1,
  5285. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  5286. },
  5287. {/* hw:x,2 */
  5288. .name = "VoiceMMode1",
  5289. .stream_name = "VoiceMMode1",
  5290. .cpu_dai_name = "VoiceMMode1",
  5291. .platform_name = "msm-pcm-voice",
  5292. .dynamic = 1,
  5293. .dpcm_playback = 1,
  5294. .dpcm_capture = 1,
  5295. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5296. SND_SOC_DPCM_TRIGGER_POST},
  5297. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5298. .ignore_suspend = 1,
  5299. .ignore_pmdown_time = 1,
  5300. .codec_dai_name = "snd-soc-dummy-dai",
  5301. .codec_name = "snd-soc-dummy",
  5302. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  5303. },
  5304. {/* hw:x,3 */
  5305. .name = "MSM VoIP",
  5306. .stream_name = "VoIP",
  5307. .cpu_dai_name = "VoIP",
  5308. .platform_name = "msm-voip-dsp",
  5309. .dynamic = 1,
  5310. .dpcm_playback = 1,
  5311. .dpcm_capture = 1,
  5312. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5313. SND_SOC_DPCM_TRIGGER_POST},
  5314. .codec_dai_name = "snd-soc-dummy-dai",
  5315. .codec_name = "snd-soc-dummy",
  5316. .ignore_suspend = 1,
  5317. /* this dainlink has playback support */
  5318. .ignore_pmdown_time = 1,
  5319. .id = MSM_FRONTEND_DAI_VOIP,
  5320. },
  5321. {/* hw:x,4 */
  5322. .name = MSM_DAILINK_NAME(ULL),
  5323. .stream_name = "MultiMedia3",
  5324. .cpu_dai_name = "MultiMedia3",
  5325. .platform_name = "msm-pcm-dsp.2",
  5326. .dynamic = 1,
  5327. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5328. .dpcm_playback = 1,
  5329. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5330. SND_SOC_DPCM_TRIGGER_POST},
  5331. .codec_dai_name = "snd-soc-dummy-dai",
  5332. .codec_name = "snd-soc-dummy",
  5333. .ignore_suspend = 1,
  5334. /* this dainlink has playback support */
  5335. .ignore_pmdown_time = 1,
  5336. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  5337. },
  5338. /* Hostless PCM purpose */
  5339. {/* hw:x,5 */
  5340. .name = "SLIMBUS_0 Hostless",
  5341. .stream_name = "SLIMBUS_0 Hostless",
  5342. .cpu_dai_name = "SLIMBUS0_HOSTLESS",
  5343. .platform_name = "msm-pcm-hostless",
  5344. .dynamic = 1,
  5345. .dpcm_playback = 1,
  5346. .dpcm_capture = 1,
  5347. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5348. SND_SOC_DPCM_TRIGGER_POST},
  5349. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5350. .ignore_suspend = 1,
  5351. /* this dailink has playback support */
  5352. .ignore_pmdown_time = 1,
  5353. .codec_dai_name = "snd-soc-dummy-dai",
  5354. .codec_name = "snd-soc-dummy",
  5355. },
  5356. {/* hw:x,6 */
  5357. .name = "MSM AFE-PCM RX",
  5358. .stream_name = "AFE-PROXY RX",
  5359. .cpu_dai_name = "msm-dai-q6-dev.241",
  5360. .codec_name = "msm-stub-codec.1",
  5361. .codec_dai_name = "msm-stub-rx",
  5362. .platform_name = "msm-pcm-afe",
  5363. .dpcm_playback = 1,
  5364. .ignore_suspend = 1,
  5365. /* this dainlink has playback support */
  5366. .ignore_pmdown_time = 1,
  5367. },
  5368. {/* hw:x,7 */
  5369. .name = "MSM AFE-PCM TX",
  5370. .stream_name = "AFE-PROXY TX",
  5371. .cpu_dai_name = "msm-dai-q6-dev.240",
  5372. .codec_name = "msm-stub-codec.1",
  5373. .codec_dai_name = "msm-stub-tx",
  5374. .platform_name = "msm-pcm-afe",
  5375. .dpcm_capture = 1,
  5376. .ignore_suspend = 1,
  5377. },
  5378. {/* hw:x,8 */
  5379. .name = MSM_DAILINK_NAME(Compress1),
  5380. .stream_name = "Compress1",
  5381. .cpu_dai_name = "MultiMedia4",
  5382. .platform_name = "msm-compress-dsp",
  5383. .dynamic = 1,
  5384. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  5385. .dpcm_playback = 1,
  5386. .dpcm_capture = 1,
  5387. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5388. SND_SOC_DPCM_TRIGGER_POST},
  5389. .codec_dai_name = "snd-soc-dummy-dai",
  5390. .codec_name = "snd-soc-dummy",
  5391. .ignore_suspend = 1,
  5392. .ignore_pmdown_time = 1,
  5393. /* this dainlink has playback support */
  5394. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  5395. },
  5396. {/* hw:x,9 */
  5397. .name = "AUXPCM Hostless",
  5398. .stream_name = "AUXPCM Hostless",
  5399. .cpu_dai_name = "AUXPCM_HOSTLESS",
  5400. .platform_name = "msm-pcm-hostless",
  5401. .dynamic = 1,
  5402. .dpcm_playback = 1,
  5403. .dpcm_capture = 1,
  5404. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5405. SND_SOC_DPCM_TRIGGER_POST},
  5406. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5407. .ignore_suspend = 1,
  5408. /* this dainlink has playback support */
  5409. .ignore_pmdown_time = 1,
  5410. .codec_dai_name = "snd-soc-dummy-dai",
  5411. .codec_name = "snd-soc-dummy",
  5412. },
  5413. {/* hw:x,10 */
  5414. .name = "SLIMBUS_1 Hostless",
  5415. .stream_name = "SLIMBUS_1 Hostless",
  5416. .cpu_dai_name = "SLIMBUS1_HOSTLESS",
  5417. .platform_name = "msm-pcm-hostless",
  5418. .dynamic = 1,
  5419. .dpcm_playback = 1,
  5420. .dpcm_capture = 1,
  5421. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5422. SND_SOC_DPCM_TRIGGER_POST},
  5423. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5424. .ignore_suspend = 1,
  5425. /* this dailink has playback support */
  5426. .ignore_pmdown_time = 1,
  5427. .codec_dai_name = "snd-soc-dummy-dai",
  5428. .codec_name = "snd-soc-dummy",
  5429. },
  5430. {/* hw:x,11 */
  5431. .name = "SLIMBUS_3 Hostless",
  5432. .stream_name = "SLIMBUS_3 Hostless",
  5433. .cpu_dai_name = "SLIMBUS3_HOSTLESS",
  5434. .platform_name = "msm-pcm-hostless",
  5435. .dynamic = 1,
  5436. .dpcm_playback = 1,
  5437. .dpcm_capture = 1,
  5438. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5439. SND_SOC_DPCM_TRIGGER_POST},
  5440. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5441. .ignore_suspend = 1,
  5442. /* this dailink has playback support */
  5443. .ignore_pmdown_time = 1,
  5444. .codec_dai_name = "snd-soc-dummy-dai",
  5445. .codec_name = "snd-soc-dummy",
  5446. },
  5447. {/* hw:x,12 */
  5448. .name = "SLIMBUS_7 Hostless",
  5449. .stream_name = "SLIMBUS_7 Hostless",
  5450. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  5451. .platform_name = "msm-pcm-hostless",
  5452. .dynamic = 1,
  5453. .dpcm_playback = 1,
  5454. .dpcm_capture = 1,
  5455. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5456. SND_SOC_DPCM_TRIGGER_POST},
  5457. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5458. .ignore_suspend = 1,
  5459. /* this dailink has playback support */
  5460. .ignore_pmdown_time = 1,
  5461. .codec_dai_name = "snd-soc-dummy-dai",
  5462. .codec_name = "snd-soc-dummy",
  5463. },
  5464. {/* hw:x,13 */
  5465. .name = MSM_DAILINK_NAME(LowLatency),
  5466. .stream_name = "MultiMedia5",
  5467. .cpu_dai_name = "MultiMedia5",
  5468. .platform_name = "msm-pcm-dsp.1",
  5469. .dynamic = 1,
  5470. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5471. .dpcm_playback = 1,
  5472. .dpcm_capture = 1,
  5473. .codec_dai_name = "snd-soc-dummy-dai",
  5474. .codec_name = "snd-soc-dummy",
  5475. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5476. SND_SOC_DPCM_TRIGGER_POST},
  5477. .ignore_suspend = 1,
  5478. /* this dainlink has playback support */
  5479. .ignore_pmdown_time = 1,
  5480. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  5481. .ops = &msm_fe_qos_ops,
  5482. },
  5483. {/* hw:x,14 */
  5484. .name = "Listen 1 Audio Service",
  5485. .stream_name = "Listen 1 Audio Service",
  5486. .cpu_dai_name = "LSM1",
  5487. .platform_name = "msm-lsm-client",
  5488. .dynamic = 1,
  5489. .dpcm_capture = 1,
  5490. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5491. SND_SOC_DPCM_TRIGGER_POST },
  5492. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5493. .ignore_suspend = 1,
  5494. .codec_dai_name = "snd-soc-dummy-dai",
  5495. .codec_name = "snd-soc-dummy",
  5496. .id = MSM_FRONTEND_DAI_LSM1,
  5497. },
  5498. /* Multiple Tunnel instances */
  5499. {/* hw:x,15 */
  5500. .name = MSM_DAILINK_NAME(Compress2),
  5501. .stream_name = "Compress2",
  5502. .cpu_dai_name = "MultiMedia7",
  5503. .platform_name = "msm-compress-dsp",
  5504. .dynamic = 1,
  5505. .dpcm_playback = 1,
  5506. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5507. SND_SOC_DPCM_TRIGGER_POST},
  5508. .codec_dai_name = "snd-soc-dummy-dai",
  5509. .codec_name = "snd-soc-dummy",
  5510. .ignore_suspend = 1,
  5511. .ignore_pmdown_time = 1,
  5512. /* this dainlink has playback support */
  5513. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  5514. },
  5515. {/* hw:x,16 */
  5516. .name = MSM_DAILINK_NAME(MultiMedia10),
  5517. .stream_name = "MultiMedia10",
  5518. .cpu_dai_name = "MultiMedia10",
  5519. .platform_name = "msm-pcm-dsp.1",
  5520. .dynamic = 1,
  5521. .dpcm_playback = 1,
  5522. .dpcm_capture = 1,
  5523. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5524. SND_SOC_DPCM_TRIGGER_POST},
  5525. .codec_dai_name = "snd-soc-dummy-dai",
  5526. .codec_name = "snd-soc-dummy",
  5527. .ignore_suspend = 1,
  5528. .ignore_pmdown_time = 1,
  5529. /* this dainlink has playback support */
  5530. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  5531. },
  5532. {/* hw:x,17 */
  5533. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  5534. .stream_name = "MM_NOIRQ",
  5535. .cpu_dai_name = "MultiMedia8",
  5536. .platform_name = "msm-pcm-dsp-noirq",
  5537. .dynamic = 1,
  5538. .dpcm_playback = 1,
  5539. .dpcm_capture = 1,
  5540. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5541. SND_SOC_DPCM_TRIGGER_POST},
  5542. .codec_dai_name = "snd-soc-dummy-dai",
  5543. .codec_name = "snd-soc-dummy",
  5544. .ignore_suspend = 1,
  5545. .ignore_pmdown_time = 1,
  5546. /* this dainlink has playback support */
  5547. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  5548. .ops = &msm_fe_qos_ops,
  5549. },
  5550. /* HDMI Hostless */
  5551. {/* hw:x,18 */
  5552. .name = "HDMI_RX_HOSTLESS",
  5553. .stream_name = "HDMI_RX_HOSTLESS",
  5554. .cpu_dai_name = "HDMI_HOSTLESS",
  5555. .platform_name = "msm-pcm-hostless",
  5556. .dynamic = 1,
  5557. .dpcm_playback = 1,
  5558. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5559. SND_SOC_DPCM_TRIGGER_POST},
  5560. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5561. .ignore_suspend = 1,
  5562. .ignore_pmdown_time = 1,
  5563. .codec_dai_name = "snd-soc-dummy-dai",
  5564. .codec_name = "snd-soc-dummy",
  5565. },
  5566. {/* hw:x,19 */
  5567. .name = "VoiceMMode2",
  5568. .stream_name = "VoiceMMode2",
  5569. .cpu_dai_name = "VoiceMMode2",
  5570. .platform_name = "msm-pcm-voice",
  5571. .dynamic = 1,
  5572. .dpcm_playback = 1,
  5573. .dpcm_capture = 1,
  5574. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5575. SND_SOC_DPCM_TRIGGER_POST},
  5576. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5577. .ignore_suspend = 1,
  5578. .ignore_pmdown_time = 1,
  5579. .codec_dai_name = "snd-soc-dummy-dai",
  5580. .codec_name = "snd-soc-dummy",
  5581. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  5582. },
  5583. /* LSM FE */
  5584. {/* hw:x,20 */
  5585. .name = "Listen 2 Audio Service",
  5586. .stream_name = "Listen 2 Audio Service",
  5587. .cpu_dai_name = "LSM2",
  5588. .platform_name = "msm-lsm-client",
  5589. .dynamic = 1,
  5590. .dpcm_capture = 1,
  5591. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5592. SND_SOC_DPCM_TRIGGER_POST },
  5593. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5594. .ignore_suspend = 1,
  5595. .codec_dai_name = "snd-soc-dummy-dai",
  5596. .codec_name = "snd-soc-dummy",
  5597. .id = MSM_FRONTEND_DAI_LSM2,
  5598. },
  5599. {/* hw:x,21 */
  5600. .name = "Listen 3 Audio Service",
  5601. .stream_name = "Listen 3 Audio Service",
  5602. .cpu_dai_name = "LSM3",
  5603. .platform_name = "msm-lsm-client",
  5604. .dynamic = 1,
  5605. .dpcm_capture = 1,
  5606. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5607. SND_SOC_DPCM_TRIGGER_POST },
  5608. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5609. .ignore_suspend = 1,
  5610. .codec_dai_name = "snd-soc-dummy-dai",
  5611. .codec_name = "snd-soc-dummy",
  5612. .id = MSM_FRONTEND_DAI_LSM3,
  5613. },
  5614. {/* hw:x,22 */
  5615. .name = "Listen 4 Audio Service",
  5616. .stream_name = "Listen 4 Audio Service",
  5617. .cpu_dai_name = "LSM4",
  5618. .platform_name = "msm-lsm-client",
  5619. .dynamic = 1,
  5620. .dpcm_capture = 1,
  5621. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5622. SND_SOC_DPCM_TRIGGER_POST },
  5623. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5624. .ignore_suspend = 1,
  5625. .codec_dai_name = "snd-soc-dummy-dai",
  5626. .codec_name = "snd-soc-dummy",
  5627. .id = MSM_FRONTEND_DAI_LSM4,
  5628. },
  5629. {/* hw:x,23 */
  5630. .name = "Listen 5 Audio Service",
  5631. .stream_name = "Listen 5 Audio Service",
  5632. .cpu_dai_name = "LSM5",
  5633. .platform_name = "msm-lsm-client",
  5634. .dynamic = 1,
  5635. .dpcm_capture = 1,
  5636. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5637. SND_SOC_DPCM_TRIGGER_POST },
  5638. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5639. .ignore_suspend = 1,
  5640. .codec_dai_name = "snd-soc-dummy-dai",
  5641. .codec_name = "snd-soc-dummy",
  5642. .id = MSM_FRONTEND_DAI_LSM5,
  5643. },
  5644. {/* hw:x,24 */
  5645. .name = "Listen 6 Audio Service",
  5646. .stream_name = "Listen 6 Audio Service",
  5647. .cpu_dai_name = "LSM6",
  5648. .platform_name = "msm-lsm-client",
  5649. .dynamic = 1,
  5650. .dpcm_capture = 1,
  5651. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5652. SND_SOC_DPCM_TRIGGER_POST },
  5653. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5654. .ignore_suspend = 1,
  5655. .codec_dai_name = "snd-soc-dummy-dai",
  5656. .codec_name = "snd-soc-dummy",
  5657. .id = MSM_FRONTEND_DAI_LSM6,
  5658. },
  5659. {/* hw:x,25 */
  5660. .name = "Listen 7 Audio Service",
  5661. .stream_name = "Listen 7 Audio Service",
  5662. .cpu_dai_name = "LSM7",
  5663. .platform_name = "msm-lsm-client",
  5664. .dynamic = 1,
  5665. .dpcm_capture = 1,
  5666. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5667. SND_SOC_DPCM_TRIGGER_POST },
  5668. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5669. .ignore_suspend = 1,
  5670. .codec_dai_name = "snd-soc-dummy-dai",
  5671. .codec_name = "snd-soc-dummy",
  5672. .id = MSM_FRONTEND_DAI_LSM7,
  5673. },
  5674. {/* hw:x,26 */
  5675. .name = "Listen 8 Audio Service",
  5676. .stream_name = "Listen 8 Audio Service",
  5677. .cpu_dai_name = "LSM8",
  5678. .platform_name = "msm-lsm-client",
  5679. .dynamic = 1,
  5680. .dpcm_capture = 1,
  5681. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5682. SND_SOC_DPCM_TRIGGER_POST },
  5683. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5684. .ignore_suspend = 1,
  5685. .codec_dai_name = "snd-soc-dummy-dai",
  5686. .codec_name = "snd-soc-dummy",
  5687. .id = MSM_FRONTEND_DAI_LSM8,
  5688. },
  5689. {/* hw:x,27 */
  5690. .name = MSM_DAILINK_NAME(Media9),
  5691. .stream_name = "MultiMedia9",
  5692. .cpu_dai_name = "MultiMedia9",
  5693. .platform_name = "msm-pcm-dsp.0",
  5694. .dynamic = 1,
  5695. .dpcm_playback = 1,
  5696. .dpcm_capture = 1,
  5697. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5698. SND_SOC_DPCM_TRIGGER_POST},
  5699. .codec_dai_name = "snd-soc-dummy-dai",
  5700. .codec_name = "snd-soc-dummy",
  5701. .ignore_suspend = 1,
  5702. /* this dainlink has playback support */
  5703. .ignore_pmdown_time = 1,
  5704. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  5705. },
  5706. {/* hw:x,28 */
  5707. .name = MSM_DAILINK_NAME(Compress4),
  5708. .stream_name = "Compress4",
  5709. .cpu_dai_name = "MultiMedia11",
  5710. .platform_name = "msm-compress-dsp",
  5711. .dynamic = 1,
  5712. .dpcm_playback = 1,
  5713. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5714. SND_SOC_DPCM_TRIGGER_POST},
  5715. .codec_dai_name = "snd-soc-dummy-dai",
  5716. .codec_name = "snd-soc-dummy",
  5717. .ignore_suspend = 1,
  5718. .ignore_pmdown_time = 1,
  5719. /* this dainlink has playback support */
  5720. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  5721. },
  5722. {/* hw:x,29 */
  5723. .name = MSM_DAILINK_NAME(Compress5),
  5724. .stream_name = "Compress5",
  5725. .cpu_dai_name = "MultiMedia12",
  5726. .platform_name = "msm-compress-dsp",
  5727. .dynamic = 1,
  5728. .dpcm_playback = 1,
  5729. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5730. SND_SOC_DPCM_TRIGGER_POST},
  5731. .codec_dai_name = "snd-soc-dummy-dai",
  5732. .codec_name = "snd-soc-dummy",
  5733. .ignore_suspend = 1,
  5734. .ignore_pmdown_time = 1,
  5735. /* this dainlink has playback support */
  5736. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  5737. },
  5738. {/* hw:x,30 */
  5739. .name = MSM_DAILINK_NAME(Compress6),
  5740. .stream_name = "Compress6",
  5741. .cpu_dai_name = "MultiMedia13",
  5742. .platform_name = "msm-compress-dsp",
  5743. .dynamic = 1,
  5744. .dpcm_playback = 1,
  5745. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5746. SND_SOC_DPCM_TRIGGER_POST},
  5747. .codec_dai_name = "snd-soc-dummy-dai",
  5748. .codec_name = "snd-soc-dummy",
  5749. .ignore_suspend = 1,
  5750. .ignore_pmdown_time = 1,
  5751. /* this dainlink has playback support */
  5752. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  5753. },
  5754. {/* hw:x,31 */
  5755. .name = MSM_DAILINK_NAME(Compress7),
  5756. .stream_name = "Compress7",
  5757. .cpu_dai_name = "MultiMedia14",
  5758. .platform_name = "msm-compress-dsp",
  5759. .dynamic = 1,
  5760. .dpcm_playback = 1,
  5761. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5762. SND_SOC_DPCM_TRIGGER_POST},
  5763. .codec_dai_name = "snd-soc-dummy-dai",
  5764. .codec_name = "snd-soc-dummy",
  5765. .ignore_suspend = 1,
  5766. .ignore_pmdown_time = 1,
  5767. /* this dainlink has playback support */
  5768. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  5769. },
  5770. {/* hw:x,32 */
  5771. .name = MSM_DAILINK_NAME(Compress8),
  5772. .stream_name = "Compress8",
  5773. .cpu_dai_name = "MultiMedia15",
  5774. .platform_name = "msm-compress-dsp",
  5775. .dynamic = 1,
  5776. .dpcm_playback = 1,
  5777. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5778. SND_SOC_DPCM_TRIGGER_POST},
  5779. .codec_dai_name = "snd-soc-dummy-dai",
  5780. .codec_name = "snd-soc-dummy",
  5781. .ignore_suspend = 1,
  5782. .ignore_pmdown_time = 1,
  5783. /* this dainlink has playback support */
  5784. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  5785. },
  5786. {/* hw:x,33 */
  5787. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  5788. .stream_name = "MM_NOIRQ_2",
  5789. .cpu_dai_name = "MultiMedia16",
  5790. .platform_name = "msm-pcm-dsp-noirq",
  5791. .dynamic = 1,
  5792. .dpcm_playback = 1,
  5793. .dpcm_capture = 1,
  5794. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5795. SND_SOC_DPCM_TRIGGER_POST},
  5796. .codec_dai_name = "snd-soc-dummy-dai",
  5797. .codec_name = "snd-soc-dummy",
  5798. .ignore_suspend = 1,
  5799. .ignore_pmdown_time = 1,
  5800. /* this dainlink has playback support */
  5801. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  5802. },
  5803. {/* hw:x,34 */
  5804. .name = "SLIMBUS_8 Hostless",
  5805. .stream_name = "SLIMBUS8_HOSTLESS Capture",
  5806. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  5807. .platform_name = "msm-pcm-hostless",
  5808. .dynamic = 1,
  5809. .dpcm_capture = 1,
  5810. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5811. SND_SOC_DPCM_TRIGGER_POST},
  5812. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5813. .ignore_suspend = 1,
  5814. .codec_dai_name = "snd-soc-dummy-dai",
  5815. .codec_name = "snd-soc-dummy",
  5816. },
  5817. {/* hw:x,35 */
  5818. .name = "CDC_DMA Hostless",
  5819. .stream_name = "CDC_DMA Hostless",
  5820. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  5821. .platform_name = "msm-pcm-hostless",
  5822. .dynamic = 1,
  5823. .dpcm_playback = 1,
  5824. .dpcm_capture = 1,
  5825. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5826. SND_SOC_DPCM_TRIGGER_POST},
  5827. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5828. .ignore_suspend = 1,
  5829. /* this dailink has playback support */
  5830. .ignore_pmdown_time = 1,
  5831. .codec_dai_name = "snd-soc-dummy-dai",
  5832. .codec_name = "snd-soc-dummy",
  5833. },
  5834. {/* hw:x,36 */
  5835. .name = "TX3_CDC_DMA Hostless",
  5836. .stream_name = "TX3_CDC_DMA Hostless",
  5837. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  5838. .platform_name = "msm-pcm-hostless",
  5839. .dynamic = 1,
  5840. .dpcm_capture = 1,
  5841. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5842. SND_SOC_DPCM_TRIGGER_POST},
  5843. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5844. .ignore_suspend = 1,
  5845. .codec_dai_name = "snd-soc-dummy-dai",
  5846. .codec_name = "snd-soc-dummy",
  5847. },
  5848. };
  5849. static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
  5850. {/* hw:x,37 */
  5851. .name = LPASS_BE_SLIMBUS_4_TX,
  5852. .stream_name = "Slimbus4 Capture",
  5853. .cpu_dai_name = "msm-dai-q6-dev.16393",
  5854. .platform_name = "msm-pcm-hostless",
  5855. .codec_name = "tavil_codec",
  5856. .codec_dai_name = "tavil_vifeedback",
  5857. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  5858. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5859. .ops = &msm_be_ops,
  5860. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5861. .ignore_suspend = 1,
  5862. },
  5863. /* Ultrasound RX DAI Link */
  5864. {/* hw:x,38 */
  5865. .name = "SLIMBUS_2 Hostless Playback",
  5866. .stream_name = "SLIMBUS_2 Hostless Playback",
  5867. .cpu_dai_name = "msm-dai-q6-dev.16388",
  5868. .platform_name = "msm-pcm-hostless",
  5869. .codec_name = "tavil_codec",
  5870. .codec_dai_name = "tavil_rx2",
  5871. .ignore_suspend = 1,
  5872. .ignore_pmdown_time = 1,
  5873. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5874. .ops = &msm_slimbus_2_be_ops,
  5875. },
  5876. /* Ultrasound TX DAI Link */
  5877. {/* hw:x,39 */
  5878. .name = "SLIMBUS_2 Hostless Capture",
  5879. .stream_name = "SLIMBUS_2 Hostless Capture",
  5880. .cpu_dai_name = "msm-dai-q6-dev.16389",
  5881. .platform_name = "msm-pcm-hostless",
  5882. .codec_name = "tavil_codec",
  5883. .codec_dai_name = "tavil_tx2",
  5884. .ignore_suspend = 1,
  5885. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5886. .ops = &msm_slimbus_2_be_ops,
  5887. },
  5888. };
  5889. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  5890. {/* hw:x,37 */
  5891. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  5892. .stream_name = "WSA CDC DMA0 Capture",
  5893. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  5894. .platform_name = "msm-pcm-hostless",
  5895. .codec_name = "bolero_codec",
  5896. .codec_dai_name = "wsa_macro_vifeedback",
  5897. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  5898. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5899. .ignore_suspend = 1,
  5900. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5901. .ops = &msm_cdc_dma_be_ops,
  5902. },
  5903. };
  5904. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  5905. {
  5906. .name = MSM_DAILINK_NAME(ASM Loopback),
  5907. .stream_name = "MultiMedia6",
  5908. .cpu_dai_name = "MultiMedia6",
  5909. .platform_name = "msm-pcm-loopback",
  5910. .dynamic = 1,
  5911. .dpcm_playback = 1,
  5912. .dpcm_capture = 1,
  5913. .codec_dai_name = "snd-soc-dummy-dai",
  5914. .codec_name = "snd-soc-dummy",
  5915. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5916. SND_SOC_DPCM_TRIGGER_POST},
  5917. .ignore_suspend = 1,
  5918. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5919. .ignore_pmdown_time = 1,
  5920. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  5921. },
  5922. {
  5923. .name = "USB Audio Hostless",
  5924. .stream_name = "USB Audio Hostless",
  5925. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  5926. .platform_name = "msm-pcm-hostless",
  5927. .dynamic = 1,
  5928. .dpcm_playback = 1,
  5929. .dpcm_capture = 1,
  5930. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5931. SND_SOC_DPCM_TRIGGER_POST},
  5932. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5933. .ignore_suspend = 1,
  5934. .ignore_pmdown_time = 1,
  5935. .codec_dai_name = "snd-soc-dummy-dai",
  5936. .codec_name = "snd-soc-dummy",
  5937. },
  5938. };
  5939. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  5940. /* Backend AFE DAI Links */
  5941. {
  5942. .name = LPASS_BE_AFE_PCM_RX,
  5943. .stream_name = "AFE Playback",
  5944. .cpu_dai_name = "msm-dai-q6-dev.224",
  5945. .platform_name = "msm-pcm-routing",
  5946. .codec_name = "msm-stub-codec.1",
  5947. .codec_dai_name = "msm-stub-rx",
  5948. .no_pcm = 1,
  5949. .dpcm_playback = 1,
  5950. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  5951. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5952. /* this dainlink has playback support */
  5953. .ignore_pmdown_time = 1,
  5954. .ignore_suspend = 1,
  5955. },
  5956. {
  5957. .name = LPASS_BE_AFE_PCM_TX,
  5958. .stream_name = "AFE Capture",
  5959. .cpu_dai_name = "msm-dai-q6-dev.225",
  5960. .platform_name = "msm-pcm-routing",
  5961. .codec_name = "msm-stub-codec.1",
  5962. .codec_dai_name = "msm-stub-tx",
  5963. .no_pcm = 1,
  5964. .dpcm_capture = 1,
  5965. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  5966. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5967. .ignore_suspend = 1,
  5968. },
  5969. /* Incall Record Uplink BACK END DAI Link */
  5970. {
  5971. .name = LPASS_BE_INCALL_RECORD_TX,
  5972. .stream_name = "Voice Uplink Capture",
  5973. .cpu_dai_name = "msm-dai-q6-dev.32772",
  5974. .platform_name = "msm-pcm-routing",
  5975. .codec_name = "msm-stub-codec.1",
  5976. .codec_dai_name = "msm-stub-tx",
  5977. .no_pcm = 1,
  5978. .dpcm_capture = 1,
  5979. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  5980. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5981. .ignore_suspend = 1,
  5982. },
  5983. /* Incall Record Downlink BACK END DAI Link */
  5984. {
  5985. .name = LPASS_BE_INCALL_RECORD_RX,
  5986. .stream_name = "Voice Downlink Capture",
  5987. .cpu_dai_name = "msm-dai-q6-dev.32771",
  5988. .platform_name = "msm-pcm-routing",
  5989. .codec_name = "msm-stub-codec.1",
  5990. .codec_dai_name = "msm-stub-tx",
  5991. .no_pcm = 1,
  5992. .dpcm_capture = 1,
  5993. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  5994. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5995. .ignore_suspend = 1,
  5996. },
  5997. /* Incall Music BACK END DAI Link */
  5998. {
  5999. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  6000. .stream_name = "Voice Farend Playback",
  6001. .cpu_dai_name = "msm-dai-q6-dev.32773",
  6002. .platform_name = "msm-pcm-routing",
  6003. .codec_name = "msm-stub-codec.1",
  6004. .codec_dai_name = "msm-stub-rx",
  6005. .no_pcm = 1,
  6006. .dpcm_playback = 1,
  6007. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  6008. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6009. .ignore_suspend = 1,
  6010. .ignore_pmdown_time = 1,
  6011. },
  6012. /* Incall Music 2 BACK END DAI Link */
  6013. {
  6014. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  6015. .stream_name = "Voice2 Farend Playback",
  6016. .cpu_dai_name = "msm-dai-q6-dev.32770",
  6017. .platform_name = "msm-pcm-routing",
  6018. .codec_name = "msm-stub-codec.1",
  6019. .codec_dai_name = "msm-stub-rx",
  6020. .no_pcm = 1,
  6021. .dpcm_playback = 1,
  6022. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  6023. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6024. .ignore_suspend = 1,
  6025. .ignore_pmdown_time = 1,
  6026. },
  6027. {
  6028. .name = LPASS_BE_USB_AUDIO_RX,
  6029. .stream_name = "USB Audio Playback",
  6030. .cpu_dai_name = "msm-dai-q6-dev.28672",
  6031. .platform_name = "msm-pcm-routing",
  6032. .codec_name = "msm-stub-codec.1",
  6033. .codec_dai_name = "msm-stub-rx",
  6034. .no_pcm = 1,
  6035. .dpcm_playback = 1,
  6036. .id = MSM_BACKEND_DAI_USB_RX,
  6037. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6038. .ignore_pmdown_time = 1,
  6039. .ignore_suspend = 1,
  6040. },
  6041. {
  6042. .name = LPASS_BE_USB_AUDIO_TX,
  6043. .stream_name = "USB Audio Capture",
  6044. .cpu_dai_name = "msm-dai-q6-dev.28673",
  6045. .platform_name = "msm-pcm-routing",
  6046. .codec_name = "msm-stub-codec.1",
  6047. .codec_dai_name = "msm-stub-tx",
  6048. .no_pcm = 1,
  6049. .dpcm_capture = 1,
  6050. .id = MSM_BACKEND_DAI_USB_TX,
  6051. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6052. .ignore_suspend = 1,
  6053. },
  6054. {
  6055. .name = LPASS_BE_PRI_TDM_RX_0,
  6056. .stream_name = "Primary TDM0 Playback",
  6057. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  6058. .platform_name = "msm-pcm-routing",
  6059. .codec_name = "msm-stub-codec.1",
  6060. .codec_dai_name = "msm-stub-rx",
  6061. .no_pcm = 1,
  6062. .dpcm_playback = 1,
  6063. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  6064. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6065. .ops = &sm6150_tdm_be_ops,
  6066. .ignore_suspend = 1,
  6067. .ignore_pmdown_time = 1,
  6068. },
  6069. {
  6070. .name = LPASS_BE_PRI_TDM_TX_0,
  6071. .stream_name = "Primary TDM0 Capture",
  6072. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  6073. .platform_name = "msm-pcm-routing",
  6074. .codec_name = "msm-stub-codec.1",
  6075. .codec_dai_name = "msm-stub-tx",
  6076. .no_pcm = 1,
  6077. .dpcm_capture = 1,
  6078. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  6079. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6080. .ops = &sm6150_tdm_be_ops,
  6081. .ignore_suspend = 1,
  6082. },
  6083. {
  6084. .name = LPASS_BE_SEC_TDM_RX_0,
  6085. .stream_name = "Secondary TDM0 Playback",
  6086. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  6087. .platform_name = "msm-pcm-routing",
  6088. .codec_name = "msm-stub-codec.1",
  6089. .codec_dai_name = "msm-stub-rx",
  6090. .no_pcm = 1,
  6091. .dpcm_playback = 1,
  6092. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  6093. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6094. .ops = &sm6150_tdm_be_ops,
  6095. .ignore_suspend = 1,
  6096. .ignore_pmdown_time = 1,
  6097. },
  6098. {
  6099. .name = LPASS_BE_SEC_TDM_TX_0,
  6100. .stream_name = "Secondary TDM0 Capture",
  6101. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  6102. .platform_name = "msm-pcm-routing",
  6103. .codec_name = "msm-stub-codec.1",
  6104. .codec_dai_name = "msm-stub-tx",
  6105. .no_pcm = 1,
  6106. .dpcm_capture = 1,
  6107. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  6108. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6109. .ops = &sm6150_tdm_be_ops,
  6110. .ignore_suspend = 1,
  6111. },
  6112. {
  6113. .name = LPASS_BE_TERT_TDM_RX_0,
  6114. .stream_name = "Tertiary TDM0 Playback",
  6115. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  6116. .platform_name = "msm-pcm-routing",
  6117. .codec_name = "msm-stub-codec.1",
  6118. .codec_dai_name = "msm-stub-rx",
  6119. .no_pcm = 1,
  6120. .dpcm_playback = 1,
  6121. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  6122. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6123. .ops = &sm6150_tdm_be_ops,
  6124. .ignore_suspend = 1,
  6125. .ignore_pmdown_time = 1,
  6126. },
  6127. {
  6128. .name = LPASS_BE_TERT_TDM_TX_0,
  6129. .stream_name = "Tertiary TDM0 Capture",
  6130. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  6131. .platform_name = "msm-pcm-routing",
  6132. .codec_name = "msm-stub-codec.1",
  6133. .codec_dai_name = "msm-stub-tx",
  6134. .no_pcm = 1,
  6135. .dpcm_capture = 1,
  6136. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  6137. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6138. .ops = &sm6150_tdm_be_ops,
  6139. .ignore_suspend = 1,
  6140. },
  6141. {
  6142. .name = LPASS_BE_QUAT_TDM_RX_0,
  6143. .stream_name = "Quaternary TDM0 Playback",
  6144. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  6145. .platform_name = "msm-pcm-routing",
  6146. .codec_name = "msm-stub-codec.1",
  6147. .codec_dai_name = "msm-stub-rx",
  6148. .no_pcm = 1,
  6149. .dpcm_playback = 1,
  6150. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  6151. .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
  6152. .ops = &sm6150_tdm_be_ops,
  6153. .ignore_suspend = 1,
  6154. .ignore_pmdown_time = 1,
  6155. },
  6156. {
  6157. .name = LPASS_BE_QUAT_TDM_TX_0,
  6158. .stream_name = "Quaternary TDM0 Capture",
  6159. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  6160. .platform_name = "msm-pcm-routing",
  6161. .codec_name = "msm-stub-codec.1",
  6162. .codec_dai_name = "msm-stub-tx",
  6163. .no_pcm = 1,
  6164. .dpcm_capture = 1,
  6165. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  6166. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6167. .ops = &sm6150_tdm_be_ops,
  6168. .ignore_suspend = 1,
  6169. },
  6170. };
  6171. static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
  6172. {
  6173. .name = LPASS_BE_SLIMBUS_0_RX,
  6174. .stream_name = "Slimbus Playback",
  6175. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6176. .platform_name = "msm-pcm-routing",
  6177. .codec_name = "tavil_codec",
  6178. .codec_dai_name = "tavil_rx1",
  6179. .no_pcm = 1,
  6180. .dpcm_playback = 1,
  6181. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6182. .init = &msm_audrx_tavil_init,
  6183. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6184. /* this dainlink has playback support */
  6185. .ignore_pmdown_time = 1,
  6186. .ignore_suspend = 1,
  6187. .ops = &msm_be_ops,
  6188. },
  6189. {
  6190. .name = LPASS_BE_SLIMBUS_0_TX,
  6191. .stream_name = "Slimbus Capture",
  6192. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6193. .platform_name = "msm-pcm-routing",
  6194. .codec_name = "tavil_codec",
  6195. .codec_dai_name = "tavil_tx1",
  6196. .no_pcm = 1,
  6197. .dpcm_capture = 1,
  6198. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6199. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6200. .ignore_suspend = 1,
  6201. .ops = &msm_be_ops,
  6202. },
  6203. {
  6204. .name = LPASS_BE_SLIMBUS_1_RX,
  6205. .stream_name = "Slimbus1 Playback",
  6206. .cpu_dai_name = "msm-dai-q6-dev.16386",
  6207. .platform_name = "msm-pcm-routing",
  6208. .codec_name = "tavil_codec",
  6209. .codec_dai_name = "tavil_rx1",
  6210. .no_pcm = 1,
  6211. .dpcm_playback = 1,
  6212. .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
  6213. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6214. .ops = &msm_be_ops,
  6215. /* dai link has playback support */
  6216. .ignore_pmdown_time = 1,
  6217. .ignore_suspend = 1,
  6218. },
  6219. {
  6220. .name = LPASS_BE_SLIMBUS_1_TX,
  6221. .stream_name = "Slimbus1 Capture",
  6222. .cpu_dai_name = "msm-dai-q6-dev.16387",
  6223. .platform_name = "msm-pcm-routing",
  6224. .codec_name = "tavil_codec",
  6225. .codec_dai_name = "tavil_tx3",
  6226. .no_pcm = 1,
  6227. .dpcm_capture = 1,
  6228. .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
  6229. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6230. .ops = &msm_be_ops,
  6231. .ignore_suspend = 1,
  6232. },
  6233. {
  6234. .name = LPASS_BE_SLIMBUS_2_RX,
  6235. .stream_name = "Slimbus2 Playback",
  6236. .cpu_dai_name = "msm-dai-q6-dev.16388",
  6237. .platform_name = "msm-pcm-routing",
  6238. .codec_name = "tavil_codec",
  6239. .codec_dai_name = "tavil_rx2",
  6240. .no_pcm = 1,
  6241. .dpcm_playback = 1,
  6242. .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
  6243. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6244. .ops = &msm_be_ops,
  6245. .ignore_pmdown_time = 1,
  6246. .ignore_suspend = 1,
  6247. },
  6248. {
  6249. .name = LPASS_BE_SLIMBUS_3_RX,
  6250. .stream_name = "Slimbus3 Playback",
  6251. .cpu_dai_name = "msm-dai-q6-dev.16390",
  6252. .platform_name = "msm-pcm-routing",
  6253. .codec_name = "tavil_codec",
  6254. .codec_dai_name = "tavil_rx1",
  6255. .no_pcm = 1,
  6256. .dpcm_playback = 1,
  6257. .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
  6258. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6259. .ops = &msm_be_ops,
  6260. /* dai link has playback support */
  6261. .ignore_pmdown_time = 1,
  6262. .ignore_suspend = 1,
  6263. },
  6264. {
  6265. .name = LPASS_BE_SLIMBUS_3_TX,
  6266. .stream_name = "Slimbus3 Capture",
  6267. .cpu_dai_name = "msm-dai-q6-dev.16391",
  6268. .platform_name = "msm-pcm-routing",
  6269. .codec_name = "tavil_codec",
  6270. .codec_dai_name = "tavil_tx1",
  6271. .no_pcm = 1,
  6272. .dpcm_capture = 1,
  6273. .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
  6274. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6275. .ops = &msm_be_ops,
  6276. .ignore_suspend = 1,
  6277. },
  6278. {
  6279. .name = LPASS_BE_SLIMBUS_4_RX,
  6280. .stream_name = "Slimbus4 Playback",
  6281. .cpu_dai_name = "msm-dai-q6-dev.16392",
  6282. .platform_name = "msm-pcm-routing",
  6283. .codec_name = "tavil_codec",
  6284. .codec_dai_name = "tavil_rx1",
  6285. .no_pcm = 1,
  6286. .dpcm_playback = 1,
  6287. .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
  6288. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6289. .ops = &msm_be_ops,
  6290. /* dai link has playback support */
  6291. .ignore_pmdown_time = 1,
  6292. .ignore_suspend = 1,
  6293. },
  6294. {
  6295. .name = LPASS_BE_SLIMBUS_5_RX,
  6296. .stream_name = "Slimbus5 Playback",
  6297. .cpu_dai_name = "msm-dai-q6-dev.16394",
  6298. .platform_name = "msm-pcm-routing",
  6299. .codec_name = "tavil_codec",
  6300. .codec_dai_name = "tavil_rx3",
  6301. .no_pcm = 1,
  6302. .dpcm_playback = 1,
  6303. .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
  6304. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6305. .ops = &msm_be_ops,
  6306. /* dai link has playback support */
  6307. .ignore_pmdown_time = 1,
  6308. .ignore_suspend = 1,
  6309. },
  6310. /* MAD BE */
  6311. {
  6312. .name = LPASS_BE_SLIMBUS_5_TX,
  6313. .stream_name = "Slimbus5 Capture",
  6314. .cpu_dai_name = "msm-dai-q6-dev.16395",
  6315. .platform_name = "msm-pcm-routing",
  6316. .codec_name = "tavil_codec",
  6317. .codec_dai_name = "tavil_mad1",
  6318. .no_pcm = 1,
  6319. .dpcm_capture = 1,
  6320. .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
  6321. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6322. .ops = &msm_be_ops,
  6323. .ignore_suspend = 1,
  6324. },
  6325. {
  6326. .name = LPASS_BE_SLIMBUS_6_RX,
  6327. .stream_name = "Slimbus6 Playback",
  6328. .cpu_dai_name = "msm-dai-q6-dev.16396",
  6329. .platform_name = "msm-pcm-routing",
  6330. .codec_name = "tavil_codec",
  6331. .codec_dai_name = "tavil_rx4",
  6332. .no_pcm = 1,
  6333. .dpcm_playback = 1,
  6334. .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
  6335. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6336. .ops = &msm_be_ops,
  6337. /* dai link has playback support */
  6338. .ignore_pmdown_time = 1,
  6339. .ignore_suspend = 1,
  6340. },
  6341. /* Slimbus VI Recording */
  6342. {
  6343. .name = LPASS_BE_SLIMBUS_TX_VI,
  6344. .stream_name = "Slimbus4 Capture",
  6345. .cpu_dai_name = "msm-dai-q6-dev.16393",
  6346. .platform_name = "msm-pcm-routing",
  6347. .codec_name = "tavil_codec",
  6348. .codec_dai_name = "tavil_vifeedback",
  6349. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  6350. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6351. .ops = &msm_be_ops,
  6352. .ignore_suspend = 1,
  6353. .no_pcm = 1,
  6354. .dpcm_capture = 1,
  6355. },
  6356. };
  6357. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  6358. {
  6359. .name = LPASS_BE_SLIMBUS_7_RX,
  6360. .stream_name = "Slimbus7 Playback",
  6361. .cpu_dai_name = "msm-dai-q6-dev.16398",
  6362. .platform_name = "msm-pcm-routing",
  6363. .codec_name = "btfmslim_slave",
  6364. /* BT codec driver determines capabilities based on
  6365. * dai name, bt codecdai name should always contains
  6366. * supported usecase information
  6367. */
  6368. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  6369. .no_pcm = 1,
  6370. .dpcm_playback = 1,
  6371. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  6372. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6373. .ops = &msm_wcn_ops,
  6374. /* dai link has playback support */
  6375. .ignore_pmdown_time = 1,
  6376. .ignore_suspend = 1,
  6377. },
  6378. {
  6379. .name = LPASS_BE_SLIMBUS_7_TX,
  6380. .stream_name = "Slimbus7 Capture",
  6381. .cpu_dai_name = "msm-dai-q6-dev.16399",
  6382. .platform_name = "msm-pcm-routing",
  6383. .codec_name = "btfmslim_slave",
  6384. .codec_dai_name = "btfm_bt_sco_slim_tx",
  6385. .no_pcm = 1,
  6386. .dpcm_capture = 1,
  6387. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  6388. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6389. .ops = &msm_wcn_ops,
  6390. .ignore_suspend = 1,
  6391. },
  6392. {
  6393. .name = LPASS_BE_SLIMBUS_8_TX,
  6394. .stream_name = "Slimbus8 Capture",
  6395. .cpu_dai_name = "msm-dai-q6-dev.16401",
  6396. .platform_name = "msm-pcm-routing",
  6397. .codec_name = "btfmslim_slave",
  6398. .codec_dai_name = "btfm_fm_slim_tx",
  6399. .no_pcm = 1,
  6400. .dpcm_capture = 1,
  6401. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  6402. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6403. .init = &msm_wcn_init,
  6404. .ops = &msm_wcn_ops,
  6405. .ignore_suspend = 1,
  6406. },
  6407. };
  6408. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  6409. /* DISP PORT BACK END DAI Link */
  6410. {
  6411. .name = LPASS_BE_DISPLAY_PORT,
  6412. .stream_name = "Display Port Playback",
  6413. .cpu_dai_name = "msm-dai-q6-dp.24608",
  6414. .platform_name = "msm-pcm-routing",
  6415. .codec_name = "msm-ext-disp-audio-codec-rx",
  6416. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  6417. .no_pcm = 1,
  6418. .dpcm_playback = 1,
  6419. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  6420. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6421. .ignore_pmdown_time = 1,
  6422. .ignore_suspend = 1,
  6423. },
  6424. };
  6425. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  6426. {
  6427. .name = LPASS_BE_PRI_MI2S_RX,
  6428. .stream_name = "Primary MI2S Playback",
  6429. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6430. .platform_name = "msm-pcm-routing",
  6431. .codec_name = "msm-stub-codec.1",
  6432. .codec_dai_name = "msm-stub-rx",
  6433. .no_pcm = 1,
  6434. .dpcm_playback = 1,
  6435. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  6436. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6437. .ops = &msm_mi2s_be_ops,
  6438. .ignore_suspend = 1,
  6439. .ignore_pmdown_time = 1,
  6440. },
  6441. {
  6442. .name = LPASS_BE_PRI_MI2S_TX,
  6443. .stream_name = "Primary MI2S Capture",
  6444. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6445. .platform_name = "msm-pcm-routing",
  6446. .codec_name = "msm-stub-codec.1",
  6447. .codec_dai_name = "msm-stub-tx",
  6448. .no_pcm = 1,
  6449. .dpcm_capture = 1,
  6450. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  6451. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6452. .ops = &msm_mi2s_be_ops,
  6453. .ignore_suspend = 1,
  6454. },
  6455. {
  6456. .name = LPASS_BE_SEC_MI2S_RX,
  6457. .stream_name = "Secondary MI2S Playback",
  6458. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6459. .platform_name = "msm-pcm-routing",
  6460. .codec_name = "msm-stub-codec.1",
  6461. .codec_dai_name = "msm-stub-rx",
  6462. .no_pcm = 1,
  6463. .dpcm_playback = 1,
  6464. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  6465. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6466. .ops = &msm_mi2s_be_ops,
  6467. .ignore_suspend = 1,
  6468. .ignore_pmdown_time = 1,
  6469. },
  6470. {
  6471. .name = LPASS_BE_SEC_MI2S_TX,
  6472. .stream_name = "Secondary MI2S Capture",
  6473. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6474. .platform_name = "msm-pcm-routing",
  6475. .codec_name = "msm-stub-codec.1",
  6476. .codec_dai_name = "msm-stub-tx",
  6477. .no_pcm = 1,
  6478. .dpcm_capture = 1,
  6479. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  6480. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6481. .ops = &msm_mi2s_be_ops,
  6482. .ignore_suspend = 1,
  6483. },
  6484. {
  6485. .name = LPASS_BE_TERT_MI2S_RX,
  6486. .stream_name = "Tertiary MI2S Playback",
  6487. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6488. .platform_name = "msm-pcm-routing",
  6489. .codec_name = "msm-stub-codec.1",
  6490. .codec_dai_name = "msm-stub-rx",
  6491. .no_pcm = 1,
  6492. .dpcm_playback = 1,
  6493. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  6494. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6495. .ops = &msm_mi2s_be_ops,
  6496. .ignore_suspend = 1,
  6497. .ignore_pmdown_time = 1,
  6498. },
  6499. {
  6500. .name = LPASS_BE_TERT_MI2S_TX,
  6501. .stream_name = "Tertiary MI2S Capture",
  6502. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6503. .platform_name = "msm-pcm-routing",
  6504. .codec_name = "msm-stub-codec.1",
  6505. .codec_dai_name = "msm-stub-tx",
  6506. .no_pcm = 1,
  6507. .dpcm_capture = 1,
  6508. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  6509. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6510. .ops = &msm_mi2s_be_ops,
  6511. .ignore_suspend = 1,
  6512. },
  6513. {
  6514. .name = LPASS_BE_QUAT_MI2S_RX,
  6515. .stream_name = "Quaternary MI2S Playback",
  6516. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6517. .platform_name = "msm-pcm-routing",
  6518. .codec_name = "msm-stub-codec.1",
  6519. .codec_dai_name = "msm-stub-rx",
  6520. .no_pcm = 1,
  6521. .dpcm_playback = 1,
  6522. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  6523. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6524. .ops = &msm_mi2s_be_ops,
  6525. .ignore_suspend = 1,
  6526. .ignore_pmdown_time = 1,
  6527. },
  6528. {
  6529. .name = LPASS_BE_QUAT_MI2S_TX,
  6530. .stream_name = "Quaternary MI2S Capture",
  6531. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6532. .platform_name = "msm-pcm-routing",
  6533. .codec_name = "msm-stub-codec.1",
  6534. .codec_dai_name = "msm-stub-tx",
  6535. .no_pcm = 1,
  6536. .dpcm_capture = 1,
  6537. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  6538. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6539. .ops = &msm_mi2s_be_ops,
  6540. .ignore_suspend = 1,
  6541. },
  6542. {
  6543. .name = LPASS_BE_QUIN_MI2S_RX,
  6544. .stream_name = "Quinary MI2S Playback",
  6545. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6546. .platform_name = "msm-pcm-routing",
  6547. .codec_name = "msm-stub-codec.1",
  6548. .codec_dai_name = "msm-stub-rx",
  6549. .no_pcm = 1,
  6550. .dpcm_playback = 1,
  6551. .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
  6552. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6553. .ops = &msm_mi2s_be_ops,
  6554. .ignore_suspend = 1,
  6555. .ignore_pmdown_time = 1,
  6556. },
  6557. {
  6558. .name = LPASS_BE_QUIN_MI2S_TX,
  6559. .stream_name = "Quinary MI2S Capture",
  6560. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6561. .platform_name = "msm-pcm-routing",
  6562. .codec_name = "msm-stub-codec.1",
  6563. .codec_dai_name = "msm-stub-tx",
  6564. .no_pcm = 1,
  6565. .dpcm_capture = 1,
  6566. .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
  6567. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6568. .ops = &msm_mi2s_be_ops,
  6569. .ignore_suspend = 1,
  6570. },
  6571. };
  6572. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  6573. /* Primary AUX PCM Backend DAI Links */
  6574. {
  6575. .name = LPASS_BE_AUXPCM_RX,
  6576. .stream_name = "AUX PCM Playback",
  6577. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6578. .platform_name = "msm-pcm-routing",
  6579. .codec_name = "msm-stub-codec.1",
  6580. .codec_dai_name = "msm-stub-rx",
  6581. .no_pcm = 1,
  6582. .dpcm_playback = 1,
  6583. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  6584. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6585. .ignore_pmdown_time = 1,
  6586. .ignore_suspend = 1,
  6587. },
  6588. {
  6589. .name = LPASS_BE_AUXPCM_TX,
  6590. .stream_name = "AUX PCM Capture",
  6591. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6592. .platform_name = "msm-pcm-routing",
  6593. .codec_name = "msm-stub-codec.1",
  6594. .codec_dai_name = "msm-stub-tx",
  6595. .no_pcm = 1,
  6596. .dpcm_capture = 1,
  6597. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  6598. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6599. .ignore_suspend = 1,
  6600. },
  6601. /* Secondary AUX PCM Backend DAI Links */
  6602. {
  6603. .name = LPASS_BE_SEC_AUXPCM_RX,
  6604. .stream_name = "Sec AUX PCM Playback",
  6605. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6606. .platform_name = "msm-pcm-routing",
  6607. .codec_name = "msm-stub-codec.1",
  6608. .codec_dai_name = "msm-stub-rx",
  6609. .no_pcm = 1,
  6610. .dpcm_playback = 1,
  6611. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  6612. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6613. .ignore_pmdown_time = 1,
  6614. .ignore_suspend = 1,
  6615. },
  6616. {
  6617. .name = LPASS_BE_SEC_AUXPCM_TX,
  6618. .stream_name = "Sec AUX PCM Capture",
  6619. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6620. .platform_name = "msm-pcm-routing",
  6621. .codec_name = "msm-stub-codec.1",
  6622. .codec_dai_name = "msm-stub-tx",
  6623. .no_pcm = 1,
  6624. .dpcm_capture = 1,
  6625. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  6626. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6627. .ignore_suspend = 1,
  6628. },
  6629. /* Tertiary AUX PCM Backend DAI Links */
  6630. {
  6631. .name = LPASS_BE_TERT_AUXPCM_RX,
  6632. .stream_name = "Tert AUX PCM Playback",
  6633. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6634. .platform_name = "msm-pcm-routing",
  6635. .codec_name = "msm-stub-codec.1",
  6636. .codec_dai_name = "msm-stub-rx",
  6637. .no_pcm = 1,
  6638. .dpcm_playback = 1,
  6639. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  6640. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6641. .ignore_suspend = 1,
  6642. },
  6643. {
  6644. .name = LPASS_BE_TERT_AUXPCM_TX,
  6645. .stream_name = "Tert AUX PCM Capture",
  6646. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6647. .platform_name = "msm-pcm-routing",
  6648. .codec_name = "msm-stub-codec.1",
  6649. .codec_dai_name = "msm-stub-tx",
  6650. .no_pcm = 1,
  6651. .dpcm_capture = 1,
  6652. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  6653. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6654. .ignore_suspend = 1,
  6655. },
  6656. /* Quaternary AUX PCM Backend DAI Links */
  6657. {
  6658. .name = LPASS_BE_QUAT_AUXPCM_RX,
  6659. .stream_name = "Quat AUX PCM Playback",
  6660. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6661. .platform_name = "msm-pcm-routing",
  6662. .codec_name = "msm-stub-codec.1",
  6663. .codec_dai_name = "msm-stub-rx",
  6664. .no_pcm = 1,
  6665. .dpcm_playback = 1,
  6666. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  6667. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6668. .ignore_pmdown_time = 1,
  6669. .ignore_suspend = 1,
  6670. },
  6671. {
  6672. .name = LPASS_BE_QUAT_AUXPCM_TX,
  6673. .stream_name = "Quat AUX PCM Capture",
  6674. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6675. .platform_name = "msm-pcm-routing",
  6676. .codec_name = "msm-stub-codec.1",
  6677. .codec_dai_name = "msm-stub-tx",
  6678. .no_pcm = 1,
  6679. .dpcm_capture = 1,
  6680. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  6681. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6682. .ignore_suspend = 1,
  6683. },
  6684. /* Quinary AUX PCM Backend DAI Links */
  6685. {
  6686. .name = LPASS_BE_QUIN_AUXPCM_RX,
  6687. .stream_name = "Quin AUX PCM Playback",
  6688. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6689. .platform_name = "msm-pcm-routing",
  6690. .codec_name = "msm-stub-codec.1",
  6691. .codec_dai_name = "msm-stub-rx",
  6692. .no_pcm = 1,
  6693. .dpcm_playback = 1,
  6694. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
  6695. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6696. .ignore_pmdown_time = 1,
  6697. .ignore_suspend = 1,
  6698. },
  6699. {
  6700. .name = LPASS_BE_QUIN_AUXPCM_TX,
  6701. .stream_name = "Quin AUX PCM Capture",
  6702. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6703. .platform_name = "msm-pcm-routing",
  6704. .codec_name = "msm-stub-codec.1",
  6705. .codec_dai_name = "msm-stub-tx",
  6706. .no_pcm = 1,
  6707. .dpcm_capture = 1,
  6708. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
  6709. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6710. .ignore_suspend = 1,
  6711. },
  6712. };
  6713. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  6714. /* WSA CDC DMA Backend DAI Links */
  6715. {
  6716. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  6717. .stream_name = "WSA CDC DMA0 Playback",
  6718. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  6719. .platform_name = "msm-pcm-routing",
  6720. .codec_name = "bolero_codec",
  6721. .codec_dai_name = "wsa_macro_rx1",
  6722. .no_pcm = 1,
  6723. .dpcm_playback = 1,
  6724. .init = &msm_int_audrx_init,
  6725. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  6726. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6727. .ignore_pmdown_time = 1,
  6728. .ignore_suspend = 1,
  6729. .ops = &msm_cdc_dma_be_ops,
  6730. },
  6731. {
  6732. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  6733. .stream_name = "WSA CDC DMA1 Playback",
  6734. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  6735. .platform_name = "msm-pcm-routing",
  6736. .codec_name = "bolero_codec",
  6737. .codec_dai_name = "wsa_macro_rx_mix",
  6738. .no_pcm = 1,
  6739. .dpcm_playback = 1,
  6740. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  6741. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6742. .ignore_pmdown_time = 1,
  6743. .ignore_suspend = 1,
  6744. .ops = &msm_cdc_dma_be_ops,
  6745. },
  6746. {
  6747. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  6748. .stream_name = "WSA CDC DMA1 Capture",
  6749. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  6750. .platform_name = "msm-pcm-routing",
  6751. .codec_name = "bolero_codec",
  6752. .codec_dai_name = "wsa_macro_echo",
  6753. .no_pcm = 1,
  6754. .dpcm_capture = 1,
  6755. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  6756. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6757. .ignore_suspend = 1,
  6758. .ops = &msm_cdc_dma_be_ops,
  6759. },
  6760. };
  6761. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  6762. /* RX CDC DMA Backend DAI Links */
  6763. {
  6764. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  6765. .stream_name = "RX CDC DMA0 Playback",
  6766. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  6767. .platform_name = "msm-pcm-routing",
  6768. .codec_name = "bolero_codec",
  6769. .codec_dai_name = "rx_macro_rx1",
  6770. .no_pcm = 1,
  6771. .dpcm_playback = 1,
  6772. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  6773. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6774. .ignore_pmdown_time = 1,
  6775. .ignore_suspend = 1,
  6776. .ops = &msm_cdc_dma_be_ops,
  6777. },
  6778. {
  6779. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  6780. .stream_name = "RX CDC DMA1 Playback",
  6781. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  6782. .platform_name = "msm-pcm-routing",
  6783. .codec_name = "bolero_codec",
  6784. .codec_dai_name = "rx_macro_rx2",
  6785. .no_pcm = 1,
  6786. .dpcm_playback = 1,
  6787. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  6788. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6789. .ignore_pmdown_time = 1,
  6790. .ignore_suspend = 1,
  6791. .ops = &msm_cdc_dma_be_ops,
  6792. },
  6793. {
  6794. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  6795. .stream_name = "RX CDC DMA2 Playback",
  6796. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  6797. .platform_name = "msm-pcm-routing",
  6798. .codec_name = "bolero_codec",
  6799. .codec_dai_name = "rx_macro_rx3",
  6800. .no_pcm = 1,
  6801. .dpcm_playback = 1,
  6802. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  6803. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6804. .ignore_pmdown_time = 1,
  6805. .ignore_suspend = 1,
  6806. .ops = &msm_cdc_dma_be_ops,
  6807. },
  6808. {
  6809. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  6810. .stream_name = "RX CDC DMA3 Playback",
  6811. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  6812. .platform_name = "msm-pcm-routing",
  6813. .codec_name = "bolero_codec",
  6814. .codec_dai_name = "rx_macro_rx4",
  6815. .no_pcm = 1,
  6816. .dpcm_playback = 1,
  6817. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  6818. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6819. .ignore_pmdown_time = 1,
  6820. .ignore_suspend = 1,
  6821. .ops = &msm_cdc_dma_be_ops,
  6822. },
  6823. /* TX CDC DMA Backend DAI Links */
  6824. {
  6825. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  6826. .stream_name = "TX CDC DMA3 Capture",
  6827. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  6828. .platform_name = "msm-pcm-routing",
  6829. .codec_name = "bolero_codec",
  6830. .codec_dai_name = "tx_macro_tx1",
  6831. .no_pcm = 1,
  6832. .dpcm_capture = 1,
  6833. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  6834. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6835. .ignore_suspend = 1,
  6836. .ops = &msm_cdc_dma_be_ops,
  6837. },
  6838. {
  6839. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  6840. .stream_name = "TX CDC DMA4 Capture",
  6841. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  6842. .platform_name = "msm-pcm-routing",
  6843. .codec_name = "bolero_codec",
  6844. .codec_dai_name = "tx_macro_tx2",
  6845. .no_pcm = 1,
  6846. .dpcm_capture = 1,
  6847. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  6848. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6849. .ignore_suspend = 1,
  6850. .ops = &msm_cdc_dma_be_ops,
  6851. },
  6852. };
  6853. static struct snd_soc_dai_link msm_sm6150_dai_links[
  6854. ARRAY_SIZE(msm_common_dai_links) +
  6855. ARRAY_SIZE(msm_tavil_fe_dai_links) +
  6856. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  6857. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  6858. ARRAY_SIZE(msm_common_be_dai_links) +
  6859. ARRAY_SIZE(msm_tavil_be_dai_links) +
  6860. ARRAY_SIZE(msm_wcn_be_dai_links) +
  6861. ARRAY_SIZE(ext_disp_be_dai_link) +
  6862. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  6863. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  6864. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  6865. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
  6866. static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
  6867. {
  6868. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  6869. struct snd_soc_pcm_runtime *rtd;
  6870. int ret = 0;
  6871. void *mbhc_calibration;
  6872. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  6873. if (!rtd) {
  6874. dev_err(card->dev,
  6875. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  6876. __func__, be_dl_name);
  6877. ret = -EINVAL;
  6878. goto err_pcm_runtime;
  6879. }
  6880. mbhc_calibration = def_wcd_mbhc_cal();
  6881. if (!mbhc_calibration) {
  6882. ret = -ENOMEM;
  6883. goto err_mbhc_cal;
  6884. }
  6885. wcd_mbhc_cfg.calibration = mbhc_calibration;
  6886. ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
  6887. if (ret) {
  6888. dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
  6889. __func__, ret);
  6890. goto err_hs_detect;
  6891. }
  6892. return 0;
  6893. err_hs_detect:
  6894. kfree(mbhc_calibration);
  6895. err_mbhc_cal:
  6896. err_pcm_runtime:
  6897. return ret;
  6898. }
  6899. static int msm_populate_dai_link_component_of_node(
  6900. struct snd_soc_card *card)
  6901. {
  6902. int i, index, ret = 0;
  6903. struct device *cdev = card->dev;
  6904. struct snd_soc_dai_link *dai_link = card->dai_link;
  6905. struct device_node *np;
  6906. if (!cdev) {
  6907. pr_err("%s: Sound card device memory NULL\n", __func__);
  6908. return -ENODEV;
  6909. }
  6910. for (i = 0; i < card->num_links; i++) {
  6911. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  6912. continue;
  6913. /* populate platform_of_node for snd card dai links */
  6914. if (dai_link[i].platform_name &&
  6915. !dai_link[i].platform_of_node) {
  6916. index = of_property_match_string(cdev->of_node,
  6917. "asoc-platform-names",
  6918. dai_link[i].platform_name);
  6919. if (index < 0) {
  6920. pr_err("%s: No match found for platform name: %s\n",
  6921. __func__, dai_link[i].platform_name);
  6922. ret = index;
  6923. goto err;
  6924. }
  6925. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  6926. index);
  6927. if (!np) {
  6928. pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
  6929. __func__, dai_link[i].platform_name,
  6930. index);
  6931. ret = -ENODEV;
  6932. goto err;
  6933. }
  6934. dai_link[i].platform_of_node = np;
  6935. dai_link[i].platform_name = NULL;
  6936. }
  6937. /* populate cpu_of_node for snd card dai links */
  6938. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  6939. index = of_property_match_string(cdev->of_node,
  6940. "asoc-cpu-names",
  6941. dai_link[i].cpu_dai_name);
  6942. if (index >= 0) {
  6943. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  6944. index);
  6945. if (!np) {
  6946. pr_err("%s: retrieving phandle for cpu dai %s failed\n",
  6947. __func__,
  6948. dai_link[i].cpu_dai_name);
  6949. ret = -ENODEV;
  6950. goto err;
  6951. }
  6952. dai_link[i].cpu_of_node = np;
  6953. dai_link[i].cpu_dai_name = NULL;
  6954. }
  6955. }
  6956. /* populate codec_of_node for snd card dai links */
  6957. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  6958. index = of_property_match_string(cdev->of_node,
  6959. "asoc-codec-names",
  6960. dai_link[i].codec_name);
  6961. if (index < 0)
  6962. continue;
  6963. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  6964. index);
  6965. if (!np) {
  6966. pr_err("%s: retrieving phandle for codec %s failed\n",
  6967. __func__, dai_link[i].codec_name);
  6968. ret = -ENODEV;
  6969. goto err;
  6970. }
  6971. dai_link[i].codec_of_node = np;
  6972. dai_link[i].codec_name = NULL;
  6973. }
  6974. }
  6975. err:
  6976. return ret;
  6977. }
  6978. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  6979. {
  6980. int ret = 0;
  6981. struct snd_soc_codec *codec = rtd->codec;
  6982. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  6983. ARRAY_SIZE(msm_tavil_snd_controls));
  6984. if (ret < 0) {
  6985. dev_err(codec->dev,
  6986. "%s: add_codec_controls failed, err = %d\n",
  6987. __func__, ret);
  6988. return ret;
  6989. }
  6990. return 0;
  6991. }
  6992. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  6993. struct snd_pcm_hw_params *params)
  6994. {
  6995. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  6996. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  6997. int ret = 0;
  6998. unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
  6999. 151};
  7000. unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
  7001. 134, 135, 136, 137, 138, 139,
  7002. 140, 141, 142, 143};
  7003. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  7004. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  7005. slim_rx_cfg[SLIM_RX_0].channels,
  7006. rx_ch);
  7007. if (ret < 0)
  7008. pr_err("%s: RX failed to set cpu chan map error %d\n",
  7009. __func__, ret);
  7010. } else {
  7011. ret = snd_soc_dai_set_channel_map(cpu_dai,
  7012. slim_tx_cfg[SLIM_TX_0].channels,
  7013. tx_ch, 0, 0);
  7014. if (ret < 0)
  7015. pr_err("%s: TX failed to set cpu chan map error %d\n",
  7016. __func__, ret);
  7017. }
  7018. return ret;
  7019. }
  7020. static struct snd_soc_ops msm_stub_be_ops = {
  7021. .hw_params = msm_snd_stub_hw_params,
  7022. };
  7023. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  7024. /* FrontEnd DAI Links */
  7025. {
  7026. .name = "MSMSTUB Media1",
  7027. .stream_name = "MultiMedia1",
  7028. .cpu_dai_name = "MultiMedia1",
  7029. .platform_name = "msm-pcm-dsp.0",
  7030. .dynamic = 1,
  7031. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  7032. .dpcm_playback = 1,
  7033. .dpcm_capture = 1,
  7034. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  7035. SND_SOC_DPCM_TRIGGER_POST},
  7036. .codec_dai_name = "snd-soc-dummy-dai",
  7037. .codec_name = "snd-soc-dummy",
  7038. .ignore_suspend = 1,
  7039. /* this dainlink has playback support */
  7040. .ignore_pmdown_time = 1,
  7041. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  7042. },
  7043. };
  7044. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  7045. /* Backend DAI Links */
  7046. {
  7047. .name = LPASS_BE_SLIMBUS_0_RX,
  7048. .stream_name = "Slimbus Playback",
  7049. .cpu_dai_name = "msm-dai-q6-dev.16384",
  7050. .platform_name = "msm-pcm-routing",
  7051. .codec_name = "msm-stub-codec.1",
  7052. .codec_dai_name = "msm-stub-rx",
  7053. .no_pcm = 1,
  7054. .dpcm_playback = 1,
  7055. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  7056. .init = &msm_audrx_stub_init,
  7057. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7058. .ignore_pmdown_time = 1, /* dai link has playback support */
  7059. .ignore_suspend = 1,
  7060. .ops = &msm_stub_be_ops,
  7061. },
  7062. {
  7063. .name = LPASS_BE_SLIMBUS_0_TX,
  7064. .stream_name = "Slimbus Capture",
  7065. .cpu_dai_name = "msm-dai-q6-dev.16385",
  7066. .platform_name = "msm-pcm-routing",
  7067. .codec_name = "msm-stub-codec.1",
  7068. .codec_dai_name = "msm-stub-tx",
  7069. .no_pcm = 1,
  7070. .dpcm_capture = 1,
  7071. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  7072. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7073. .ignore_suspend = 1,
  7074. .ops = &msm_stub_be_ops,
  7075. },
  7076. };
  7077. static struct snd_soc_dai_link msm_stub_dai_links[
  7078. ARRAY_SIZE(msm_stub_fe_dai_links) +
  7079. ARRAY_SIZE(msm_stub_be_dai_links)];
  7080. struct snd_soc_card snd_soc_card_stub_msm = {
  7081. .name = "sm6150-stub-snd-card",
  7082. };
  7083. static const struct of_device_id sm6150_asoc_machine_of_match[] = {
  7084. { .compatible = "qcom,sm6150-asoc-snd",
  7085. .data = "codec"},
  7086. { .compatible = "qcom,sm6150-asoc-snd-stub",
  7087. .data = "stub_codec"},
  7088. {},
  7089. };
  7090. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  7091. {
  7092. struct snd_soc_card *card = NULL;
  7093. struct snd_soc_dai_link *dailink;
  7094. int total_links = 0, rc = 0;
  7095. u32 tavil_codec = 0, auxpcm_audio_intf = 0;
  7096. u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
  7097. u32 wcn_btfm_intf = 0;
  7098. const struct of_device_id *match;
  7099. match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
  7100. if (!match) {
  7101. dev_err(dev, "%s: No DT match found for sound card\n",
  7102. __func__);
  7103. return NULL;
  7104. }
  7105. if (!strcmp(match->data, "codec")) {
  7106. card = &snd_soc_card_sm6150_msm;
  7107. memcpy(msm_sm6150_dai_links + total_links,
  7108. msm_common_dai_links,
  7109. sizeof(msm_common_dai_links));
  7110. total_links += ARRAY_SIZE(msm_common_dai_links);
  7111. memcpy(msm_sm6150_dai_links + total_links,
  7112. msm_common_misc_fe_dai_links,
  7113. sizeof(msm_common_misc_fe_dai_links));
  7114. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  7115. rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
  7116. &tavil_codec);
  7117. if (rc) {
  7118. dev_dbg(dev, "%s: No DT match for tavil codec\n",
  7119. __func__);
  7120. } else {
  7121. if (tavil_codec) {
  7122. card->late_probe =
  7123. msm_snd_card_tavil_late_probe;
  7124. memcpy(msm_sm6150_dai_links + total_links,
  7125. msm_tavil_fe_dai_links,
  7126. sizeof(msm_tavil_fe_dai_links));
  7127. total_links +=
  7128. ARRAY_SIZE(msm_tavil_fe_dai_links);
  7129. }
  7130. }
  7131. if (!tavil_codec) {
  7132. memcpy(msm_sm6150_dai_links + total_links,
  7133. msm_bolero_fe_dai_links,
  7134. sizeof(msm_bolero_fe_dai_links));
  7135. total_links +=
  7136. ARRAY_SIZE(msm_bolero_fe_dai_links);
  7137. }
  7138. memcpy(msm_sm6150_dai_links + total_links,
  7139. msm_common_be_dai_links,
  7140. sizeof(msm_common_be_dai_links));
  7141. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  7142. if (tavil_codec) {
  7143. memcpy(msm_sm6150_dai_links + total_links,
  7144. msm_tavil_be_dai_links,
  7145. sizeof(msm_tavil_be_dai_links));
  7146. total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
  7147. } else {
  7148. memcpy(msm_sm6150_dai_links + total_links,
  7149. msm_wsa_cdc_dma_be_dai_links,
  7150. sizeof(msm_wsa_cdc_dma_be_dai_links));
  7151. total_links +=
  7152. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  7153. memcpy(msm_sm6150_dai_links + total_links,
  7154. msm_rx_tx_cdc_dma_be_dai_links,
  7155. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  7156. total_links +=
  7157. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  7158. }
  7159. rc = of_property_read_u32(dev->of_node,
  7160. "qcom,ext-disp-audio-rx",
  7161. &ext_disp_audio_intf);
  7162. if (rc) {
  7163. dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
  7164. __func__);
  7165. } else {
  7166. if (ext_disp_audio_intf) {
  7167. memcpy(msm_sm6150_dai_links + total_links,
  7168. ext_disp_be_dai_link,
  7169. sizeof(ext_disp_be_dai_link));
  7170. total_links +=
  7171. ARRAY_SIZE(ext_disp_be_dai_link);
  7172. }
  7173. }
  7174. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  7175. &mi2s_audio_intf);
  7176. if (rc) {
  7177. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  7178. __func__);
  7179. } else {
  7180. if (mi2s_audio_intf) {
  7181. memcpy(msm_sm6150_dai_links + total_links,
  7182. msm_mi2s_be_dai_links,
  7183. sizeof(msm_mi2s_be_dai_links));
  7184. total_links +=
  7185. ARRAY_SIZE(msm_mi2s_be_dai_links);
  7186. }
  7187. }
  7188. rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
  7189. &wcn_btfm_intf);
  7190. if (rc) {
  7191. dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
  7192. __func__);
  7193. } else {
  7194. if (wcn_btfm_intf) {
  7195. memcpy(msm_sm6150_dai_links + total_links,
  7196. msm_wcn_be_dai_links,
  7197. sizeof(msm_wcn_be_dai_links));
  7198. total_links +=
  7199. ARRAY_SIZE(msm_wcn_be_dai_links);
  7200. }
  7201. }
  7202. rc = of_property_read_u32(dev->of_node,
  7203. "qcom,auxpcm-audio-intf",
  7204. &auxpcm_audio_intf);
  7205. if (rc) {
  7206. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  7207. __func__);
  7208. } else {
  7209. if (auxpcm_audio_intf) {
  7210. memcpy(msm_sm6150_dai_links + total_links,
  7211. msm_auxpcm_be_dai_links,
  7212. sizeof(msm_auxpcm_be_dai_links));
  7213. total_links +=
  7214. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  7215. }
  7216. }
  7217. dailink = msm_sm6150_dai_links;
  7218. } else if (!strcmp(match->data, "stub_codec")) {
  7219. card = &snd_soc_card_stub_msm;
  7220. memcpy(msm_stub_dai_links + total_links,
  7221. msm_stub_fe_dai_links,
  7222. sizeof(msm_stub_fe_dai_links));
  7223. total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
  7224. memcpy(msm_stub_dai_links + total_links,
  7225. msm_stub_be_dai_links,
  7226. sizeof(msm_stub_be_dai_links));
  7227. total_links += ARRAY_SIZE(msm_stub_be_dai_links);
  7228. dailink = msm_stub_dai_links;
  7229. }
  7230. if (card) {
  7231. card->dai_link = dailink;
  7232. card->num_links = total_links;
  7233. }
  7234. return card;
  7235. }
  7236. static int msm_wsa881x_init(struct snd_soc_component *component)
  7237. {
  7238. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7239. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7240. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  7241. SPKR_L_BOOST, SPKR_L_VI};
  7242. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  7243. SPKR_R_BOOST, SPKR_R_VI};
  7244. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  7245. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  7246. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7247. struct msm_asoc_mach_data *pdata;
  7248. struct snd_soc_dapm_context *dapm;
  7249. struct snd_card *card = component->card->snd_card;
  7250. struct snd_info_entry *entry;
  7251. int ret = 0;
  7252. if (!codec) {
  7253. pr_err("%s codec is NULL\n", __func__);
  7254. return -EINVAL;
  7255. }
  7256. dapm = snd_soc_codec_get_dapm(codec);
  7257. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  7258. dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
  7259. __func__, codec->component.name);
  7260. wsa881x_set_channel_map(codec, &spkleft_ports[0],
  7261. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7262. &ch_rate[0], &spkleft_port_types[0]);
  7263. if (dapm->component) {
  7264. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  7265. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  7266. }
  7267. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  7268. dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
  7269. __func__, codec->component.name);
  7270. wsa881x_set_channel_map(codec, &spkright_ports[0],
  7271. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7272. &ch_rate[0], &spkright_port_types[0]);
  7273. if (dapm->component) {
  7274. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  7275. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  7276. }
  7277. } else {
  7278. dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
  7279. codec->component.name);
  7280. ret = -EINVAL;
  7281. goto err;
  7282. }
  7283. pdata = snd_soc_card_get_drvdata(component->card);
  7284. if (!pdata->codec_root) {
  7285. entry = snd_info_create_subdir(card->module, "codecs",
  7286. card->proc_root);
  7287. if (!entry) {
  7288. pr_err("%s: Cannot create codecs module entry\n",
  7289. __func__);
  7290. ret = 0;
  7291. goto err;
  7292. }
  7293. pdata->codec_root = entry;
  7294. }
  7295. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  7296. codec);
  7297. err:
  7298. return ret;
  7299. }
  7300. static int msm_aux_codec_init(struct snd_soc_component *component)
  7301. {
  7302. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7303. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  7304. int ret = 0;
  7305. void *mbhc_calibration;
  7306. struct snd_info_entry *entry;
  7307. struct snd_card *card = component->card->snd_card;
  7308. struct msm_asoc_mach_data *pdata;
  7309. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  7310. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  7311. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  7312. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  7313. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  7314. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  7315. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  7316. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  7317. snd_soc_dapm_sync(dapm);
  7318. pdata = snd_soc_card_get_drvdata(component->card);
  7319. if (!pdata->codec_root) {
  7320. entry = snd_info_create_subdir(card->module, "codecs",
  7321. card->proc_root);
  7322. if (!entry) {
  7323. pr_err("%s: Cannot create codecs module entry\n",
  7324. __func__);
  7325. ret = 0;
  7326. goto codec_root_err;
  7327. }
  7328. pdata->codec_root = entry;
  7329. }
  7330. wcd937x_info_create_codec_entry(pdata->codec_root, codec);
  7331. codec_root_err:
  7332. mbhc_calibration = def_wcd_mbhc_cal();
  7333. if (!mbhc_calibration) {
  7334. return -ENOMEM;
  7335. }
  7336. wcd_mbhc_cfg.calibration = mbhc_calibration;
  7337. ret = wcd937x_mbhc_hs_detect(codec, &wcd_mbhc_cfg);
  7338. return ret;
  7339. }
  7340. static int msm_init_aux_dev(struct platform_device *pdev,
  7341. struct snd_soc_card *card)
  7342. {
  7343. struct device_node *wsa_of_node;
  7344. struct device_node *aux_codec_of_node;
  7345. u32 wsa_max_devs;
  7346. u32 wsa_dev_cnt;
  7347. u32 codec_aux_dev_cnt = 0;
  7348. int i;
  7349. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  7350. struct aux_codec_dev_info *aux_cdc_dev_info;
  7351. const char *auxdev_name_prefix[1];
  7352. char *dev_name_str = NULL;
  7353. int found = 0;
  7354. int codecs_found = 0;
  7355. int ret = 0;
  7356. /* Get maximum WSA device count for this platform */
  7357. ret = of_property_read_u32(pdev->dev.of_node,
  7358. "qcom,wsa-max-devs", &wsa_max_devs);
  7359. if (ret) {
  7360. dev_info(&pdev->dev,
  7361. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  7362. __func__, pdev->dev.of_node->full_name, ret);
  7363. wsa_max_devs = 0;
  7364. goto codec_aux_dev;
  7365. }
  7366. if (wsa_max_devs == 0) {
  7367. dev_warn(&pdev->dev,
  7368. "%s: Max WSA devices is 0 for this target?\n",
  7369. __func__);
  7370. goto codec_aux_dev;
  7371. }
  7372. /* Get count of WSA device phandles for this platform */
  7373. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  7374. "qcom,wsa-devs", NULL);
  7375. if (wsa_dev_cnt == -ENOENT) {
  7376. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  7377. __func__);
  7378. goto err;
  7379. } else if (wsa_dev_cnt <= 0) {
  7380. dev_err(&pdev->dev,
  7381. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  7382. __func__, wsa_dev_cnt);
  7383. ret = -EINVAL;
  7384. goto err;
  7385. }
  7386. /*
  7387. * Expect total phandles count to be NOT less than maximum possible
  7388. * WSA count. However, if it is less, then assign same value to
  7389. * max count as well.
  7390. */
  7391. if (wsa_dev_cnt < wsa_max_devs) {
  7392. dev_dbg(&pdev->dev,
  7393. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  7394. __func__, wsa_max_devs, wsa_dev_cnt);
  7395. wsa_max_devs = wsa_dev_cnt;
  7396. }
  7397. /* Make sure prefix string passed for each WSA device */
  7398. ret = of_property_count_strings(pdev->dev.of_node,
  7399. "qcom,wsa-aux-dev-prefix");
  7400. if (ret != wsa_dev_cnt) {
  7401. dev_err(&pdev->dev,
  7402. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  7403. __func__, wsa_dev_cnt, ret);
  7404. ret = -EINVAL;
  7405. goto err;
  7406. }
  7407. /*
  7408. * Alloc mem to store phandle and index info of WSA device, if already
  7409. * registered with ALSA core
  7410. */
  7411. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  7412. sizeof(struct msm_wsa881x_dev_info),
  7413. GFP_KERNEL);
  7414. if (!wsa881x_dev_info) {
  7415. ret = -ENOMEM;
  7416. goto err;
  7417. }
  7418. /*
  7419. * search and check whether all WSA devices are already
  7420. * registered with ALSA core or not. If found a node, store
  7421. * the node and the index in a local array of struct for later
  7422. * use.
  7423. */
  7424. for (i = 0; i < wsa_dev_cnt; i++) {
  7425. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  7426. "qcom,wsa-devs", i);
  7427. if (unlikely(!wsa_of_node)) {
  7428. /* we should not be here */
  7429. dev_err(&pdev->dev,
  7430. "%s: wsa dev node is not present\n",
  7431. __func__);
  7432. ret = -EINVAL;
  7433. goto err;
  7434. }
  7435. if (soc_find_component(wsa_of_node, NULL)) {
  7436. /* WSA device registered with ALSA core */
  7437. wsa881x_dev_info[found].of_node = wsa_of_node;
  7438. wsa881x_dev_info[found].index = i;
  7439. found++;
  7440. if (found == wsa_max_devs)
  7441. break;
  7442. }
  7443. }
  7444. if (found < wsa_max_devs) {
  7445. dev_dbg(&pdev->dev,
  7446. "%s: failed to find %d components. Found only %d\n",
  7447. __func__, wsa_max_devs, found);
  7448. return -EPROBE_DEFER;
  7449. }
  7450. dev_info(&pdev->dev,
  7451. "%s: found %d wsa881x devices registered with ALSA core\n",
  7452. __func__, found);
  7453. codec_aux_dev:
  7454. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7455. /* Get count of aux codec device phandles for this platform */
  7456. codec_aux_dev_cnt = of_count_phandle_with_args(
  7457. pdev->dev.of_node,
  7458. "qcom,codec-aux-devs", NULL);
  7459. if (codec_aux_dev_cnt == -ENOENT) {
  7460. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  7461. __func__);
  7462. goto err;
  7463. } else if (codec_aux_dev_cnt <= 0) {
  7464. dev_err(&pdev->dev,
  7465. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  7466. __func__, codec_aux_dev_cnt);
  7467. ret = -EINVAL;
  7468. goto err;
  7469. }
  7470. /*
  7471. * Alloc mem to store phandle and index info of aux codec
  7472. * if already registered with ALSA core
  7473. */
  7474. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  7475. sizeof(struct aux_codec_dev_info),
  7476. GFP_KERNEL);
  7477. if (!aux_cdc_dev_info) {
  7478. ret = -ENOMEM;
  7479. goto err;
  7480. }
  7481. /*
  7482. * search and check whether all aux codecs are already
  7483. * registered with ALSA core or not. If found a node, store
  7484. * the node and the index in a local array of struct for later
  7485. * use.
  7486. */
  7487. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7488. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  7489. "qcom,codec-aux-devs", i);
  7490. if (unlikely(!aux_codec_of_node)) {
  7491. /* we should not be here */
  7492. dev_err(&pdev->dev,
  7493. "%s: aux codec dev node is not present\n",
  7494. __func__);
  7495. ret = -EINVAL;
  7496. goto err;
  7497. }
  7498. if (soc_find_component(aux_codec_of_node, NULL)) {
  7499. /* AUX codec registered with ALSA core */
  7500. aux_cdc_dev_info[codecs_found].of_node =
  7501. aux_codec_of_node;
  7502. aux_cdc_dev_info[codecs_found].index = i;
  7503. codecs_found++;
  7504. }
  7505. }
  7506. if (codecs_found < codec_aux_dev_cnt) {
  7507. dev_dbg(&pdev->dev,
  7508. "%s: failed to find %d components. Found only %d\n",
  7509. __func__, codec_aux_dev_cnt, codecs_found);
  7510. return -EPROBE_DEFER;
  7511. }
  7512. dev_info(&pdev->dev,
  7513. "%s: found %d AUX codecs registered with ALSA core\n",
  7514. __func__, codecs_found);
  7515. }
  7516. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  7517. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  7518. /* Alloc array of AUX devs struct */
  7519. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  7520. sizeof(struct snd_soc_aux_dev),
  7521. GFP_KERNEL);
  7522. if (!msm_aux_dev) {
  7523. ret = -ENOMEM;
  7524. goto err;
  7525. }
  7526. /* Alloc array of codec conf struct */
  7527. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  7528. sizeof(struct snd_soc_codec_conf),
  7529. GFP_KERNEL);
  7530. if (!msm_codec_conf) {
  7531. ret = -ENOMEM;
  7532. goto err;
  7533. }
  7534. for (i = 0; i < wsa_max_devs; i++) {
  7535. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  7536. GFP_KERNEL);
  7537. if (!dev_name_str) {
  7538. ret = -ENOMEM;
  7539. goto err;
  7540. }
  7541. ret = of_property_read_string_index(pdev->dev.of_node,
  7542. "qcom,wsa-aux-dev-prefix",
  7543. wsa881x_dev_info[i].index,
  7544. auxdev_name_prefix);
  7545. if (ret) {
  7546. dev_err(&pdev->dev,
  7547. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  7548. __func__, ret);
  7549. ret = -EINVAL;
  7550. goto err;
  7551. }
  7552. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  7553. msm_aux_dev[i].name = dev_name_str;
  7554. msm_aux_dev[i].codec_name = NULL;
  7555. msm_aux_dev[i].codec_of_node =
  7556. wsa881x_dev_info[i].of_node;
  7557. msm_aux_dev[i].init = msm_wsa881x_init;
  7558. msm_codec_conf[i].dev_name = NULL;
  7559. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  7560. msm_codec_conf[i].of_node =
  7561. wsa881x_dev_info[i].of_node;
  7562. }
  7563. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7564. msm_aux_dev[wsa_max_devs + i].name = NULL;
  7565. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  7566. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  7567. aux_cdc_dev_info[i].of_node;
  7568. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  7569. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  7570. msm_codec_conf[wsa_max_devs + i].name_prefix =
  7571. NULL;
  7572. msm_codec_conf[wsa_max_devs + i].of_node =
  7573. aux_cdc_dev_info[i].of_node;
  7574. }
  7575. card->codec_conf = msm_codec_conf;
  7576. card->aux_dev = msm_aux_dev;
  7577. err:
  7578. return ret;
  7579. }
  7580. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  7581. {
  7582. int count;
  7583. u32 mi2s_master_slave[MI2S_MAX];
  7584. int ret;
  7585. for (count = 0; count < MI2S_MAX; count++) {
  7586. mutex_init(&mi2s_intf_conf[count].lock);
  7587. mi2s_intf_conf[count].ref_cnt = 0;
  7588. }
  7589. ret = of_property_read_u32_array(pdev->dev.of_node,
  7590. "qcom,msm-mi2s-master",
  7591. mi2s_master_slave, MI2S_MAX);
  7592. if (ret) {
  7593. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  7594. __func__);
  7595. } else {
  7596. for (count = 0; count < MI2S_MAX; count++) {
  7597. mi2s_intf_conf[count].msm_is_mi2s_master =
  7598. mi2s_master_slave[count];
  7599. }
  7600. }
  7601. }
  7602. static void msm_i2s_auxpcm_deinit(void)
  7603. {
  7604. int count;
  7605. for (count = 0; count < MI2S_MAX; count++) {
  7606. mutex_destroy(&mi2s_intf_conf[count].lock);
  7607. mi2s_intf_conf[count].ref_cnt = 0;
  7608. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  7609. }
  7610. }
  7611. static int sm6150_ssr_enable(struct device *dev, void *data)
  7612. {
  7613. struct platform_device *pdev = to_platform_device(dev);
  7614. struct snd_soc_card *card = platform_get_drvdata(pdev);
  7615. struct msm_asoc_mach_data *pdata;
  7616. int ret = 0;
  7617. if (!card) {
  7618. dev_err(dev, "%s: card is NULL\n", __func__);
  7619. ret = -EINVAL;
  7620. goto err;
  7621. }
  7622. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7623. pdata = snd_soc_card_get_drvdata(card);
  7624. if (!pdata->is_afe_config_done) {
  7625. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  7626. struct snd_soc_pcm_runtime *rtd;
  7627. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  7628. if (!rtd) {
  7629. dev_err(dev,
  7630. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  7631. __func__, be_dl_name);
  7632. ret = -EINVAL;
  7633. goto err;
  7634. }
  7635. ret = msm_afe_set_config(rtd->codec);
  7636. if (ret)
  7637. dev_err(dev, "%s: Failed to set AFE config. err %d\n",
  7638. __func__, ret);
  7639. else
  7640. pdata->is_afe_config_done = true;
  7641. }
  7642. }
  7643. snd_soc_card_change_online_state(card, 1);
  7644. dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
  7645. err:
  7646. return ret;
  7647. }
  7648. static void sm6150_ssr_disable(struct device *dev, void *data)
  7649. {
  7650. struct platform_device *pdev = to_platform_device(dev);
  7651. struct snd_soc_card *card = platform_get_drvdata(pdev);
  7652. struct msm_asoc_mach_data *pdata;
  7653. if (!card) {
  7654. dev_err(dev, "%s: card is NULL\n", __func__);
  7655. return;
  7656. }
  7657. dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
  7658. snd_soc_card_change_online_state(card, 0);
  7659. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7660. pdata = snd_soc_card_get_drvdata(card);
  7661. msm_afe_clear_config();
  7662. pdata->is_afe_config_done = false;
  7663. }
  7664. }
  7665. static const struct snd_event_ops sm6150_ssr_ops = {
  7666. .enable = sm6150_ssr_enable,
  7667. .disable = sm6150_ssr_disable,
  7668. };
  7669. static int msm_audio_ssr_compare(struct device *dev, void *data)
  7670. {
  7671. struct device_node *node = data;
  7672. dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
  7673. __func__, dev->of_node, node);
  7674. return (dev->of_node && dev->of_node == node);
  7675. }
  7676. static int msm_audio_ssr_register(struct device *dev)
  7677. {
  7678. struct device_node *np = dev->of_node;
  7679. struct snd_event_clients *ssr_clients = NULL;
  7680. struct device_node *node;
  7681. int ret;
  7682. int i;
  7683. for (i = 0; ; i++) {
  7684. node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
  7685. if (!node)
  7686. break;
  7687. snd_event_mstr_add_client(&ssr_clients,
  7688. msm_audio_ssr_compare, node);
  7689. }
  7690. ret = snd_event_master_register(dev, &sm6150_ssr_ops,
  7691. ssr_clients, NULL);
  7692. if (!ret)
  7693. snd_event_notify(dev, SND_EVENT_UP);
  7694. return ret;
  7695. }
  7696. static int msm_asoc_machine_probe(struct platform_device *pdev)
  7697. {
  7698. struct snd_soc_card *card;
  7699. struct msm_asoc_mach_data *pdata;
  7700. const char *mbhc_audio_jack_type = NULL;
  7701. int ret;
  7702. if (!pdev->dev.of_node) {
  7703. dev_err(&pdev->dev, "No platform supplied from device tree\n");
  7704. return -EINVAL;
  7705. }
  7706. pdata = devm_kzalloc(&pdev->dev,
  7707. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  7708. if (!pdata)
  7709. return -ENOMEM;
  7710. card = populate_snd_card_dailinks(&pdev->dev);
  7711. if (!card) {
  7712. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  7713. ret = -EINVAL;
  7714. goto err;
  7715. }
  7716. card->dev = &pdev->dev;
  7717. platform_set_drvdata(pdev, card);
  7718. snd_soc_card_set_drvdata(card, pdata);
  7719. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  7720. if (ret) {
  7721. dev_err(&pdev->dev, "parse card name failed, err:%d\n",
  7722. ret);
  7723. goto err;
  7724. }
  7725. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  7726. if (ret) {
  7727. dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
  7728. ret);
  7729. goto err;
  7730. }
  7731. ret = msm_populate_dai_link_component_of_node(card);
  7732. if (ret) {
  7733. ret = -EPROBE_DEFER;
  7734. goto err;
  7735. }
  7736. ret = msm_init_aux_dev(pdev, card);
  7737. if (ret)
  7738. goto err;
  7739. ret = devm_snd_soc_register_card(&pdev->dev, card);
  7740. if (ret == -EPROBE_DEFER) {
  7741. if (codec_reg_done)
  7742. ret = -EINVAL;
  7743. goto err;
  7744. } else if (ret) {
  7745. dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
  7746. ret);
  7747. goto err;
  7748. }
  7749. dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
  7750. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7751. "qcom,hph-en1-gpio", 0);
  7752. if (!pdata->hph_en1_gpio_p) {
  7753. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7754. "qcom,hph-en1-gpio",
  7755. pdev->dev.of_node->full_name);
  7756. }
  7757. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7758. "qcom,hph-en0-gpio", 0);
  7759. if (!pdata->hph_en0_gpio_p) {
  7760. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7761. "qcom,hph-en0-gpio",
  7762. pdev->dev.of_node->full_name);
  7763. }
  7764. ret = of_property_read_string(pdev->dev.of_node,
  7765. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  7766. if (ret) {
  7767. dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
  7768. "qcom,mbhc-audio-jack-type",
  7769. pdev->dev.of_node->full_name);
  7770. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  7771. } else {
  7772. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  7773. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7774. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  7775. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  7776. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7777. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  7778. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  7779. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7780. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  7781. } else {
  7782. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7783. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  7784. }
  7785. }
  7786. /*
  7787. * Parse US-Euro gpio info from DT. Report no error if us-euro
  7788. * entry is not found in DT file as some targets do not support
  7789. * US-Euro detection
  7790. */
  7791. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7792. "qcom,us-euro-gpios", 0);
  7793. if (!pdata->us_euro_gpio_p) {
  7794. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  7795. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  7796. } else {
  7797. dev_dbg(&pdev->dev, "%s detected\n",
  7798. "qcom,us-euro-gpios");
  7799. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  7800. }
  7801. /* Parse pinctrl info from devicetree */
  7802. ret = msm_get_pinctrl(pdev);
  7803. if (!ret) {
  7804. pr_debug("%s: pinctrl parsing successful\n", __func__);
  7805. } else {
  7806. dev_dbg(&pdev->dev,
  7807. "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
  7808. __func__, ret);
  7809. ret = 0;
  7810. }
  7811. msm_i2s_auxpcm_init(pdev);
  7812. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7813. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7814. "qcom,cdc-dmic01-gpios",
  7815. 0);
  7816. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7817. "qcom,cdc-dmic23-gpios",
  7818. 0);
  7819. }
  7820. ret = msm_audio_ssr_register(&pdev->dev);
  7821. if (ret)
  7822. pr_err("%s: Registration with SND event FWK failed ret = %d\n",
  7823. __func__, ret);
  7824. err:
  7825. return ret;
  7826. }
  7827. static int msm_asoc_machine_remove(struct platform_device *pdev)
  7828. {
  7829. snd_event_master_deregister(&pdev->dev);
  7830. msm_i2s_auxpcm_deinit();
  7831. return 0;
  7832. }
  7833. static struct platform_driver sm6150_asoc_machine_driver = {
  7834. .driver = {
  7835. .name = DRV_NAME,
  7836. .owner = THIS_MODULE,
  7837. .pm = &snd_soc_pm_ops,
  7838. .of_match_table = sm6150_asoc_machine_of_match,
  7839. },
  7840. .probe = msm_asoc_machine_probe,
  7841. .remove = msm_asoc_machine_remove,
  7842. };
  7843. module_platform_driver(sm6150_asoc_machine_driver);
  7844. MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
  7845. MODULE_LICENSE("GPL v2");
  7846. MODULE_ALIAS("platform:" DRV_NAME);
  7847. MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);