kona.c 188 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/delay.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/slab.h>
  11. #include <linux/io.h>
  12. #include <linux/module.h>
  13. #include <linux/input.h>
  14. #include <linux/of_device.h>
  15. #include <linux/soc/qcom/fsa4480-i2c.h>
  16. #include <sound/core.h>
  17. #include <sound/soc.h>
  18. #include <sound/soc-dapm.h>
  19. #include <sound/pcm.h>
  20. #include <sound/pcm_params.h>
  21. #include <sound/info.h>
  22. #include <soc/snd_event.h>
  23. #include <dsp/audio_notifier.h>
  24. #include <soc/swr-common.h>
  25. #include <dsp/q6afe-v2.h>
  26. #include <dsp/q6core.h>
  27. #include "device_event.h"
  28. #include "msm-pcm-routing-v2.h"
  29. #include "asoc/msm-cdc-pinctrl.h"
  30. #include "asoc/wcd-mbhc-v2.h"
  31. #include "codecs/wcd938x/wcd938x-mbhc.h"
  32. #include "codecs/wsa881x.h"
  33. #include "codecs/wcd938x/wcd938x.h"
  34. #include "codecs/bolero/bolero-cdc.h"
  35. #include <dt-bindings/sound/audio-codec-port-types.h>
  36. #include "codecs/bolero/wsa-macro.h"
  37. #include "kona-port-config.h"
  38. #define DRV_NAME "kona-asoc-snd"
  39. #define __CHIPSET__ "KONA "
  40. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  41. #define SAMPLING_RATE_8KHZ 8000
  42. #define SAMPLING_RATE_11P025KHZ 11025
  43. #define SAMPLING_RATE_16KHZ 16000
  44. #define SAMPLING_RATE_22P05KHZ 22050
  45. #define SAMPLING_RATE_32KHZ 32000
  46. #define SAMPLING_RATE_44P1KHZ 44100
  47. #define SAMPLING_RATE_48KHZ 48000
  48. #define SAMPLING_RATE_88P2KHZ 88200
  49. #define SAMPLING_RATE_96KHZ 96000
  50. #define SAMPLING_RATE_176P4KHZ 176400
  51. #define SAMPLING_RATE_192KHZ 192000
  52. #define SAMPLING_RATE_352P8KHZ 352800
  53. #define SAMPLING_RATE_384KHZ 384000
  54. #define WCD9XXX_MBHC_DEF_RLOADS 5
  55. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  56. #define CODEC_EXT_CLK_RATE 9600000
  57. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  58. #define DEV_NAME_STR_LEN 32
  59. #define WCD_MBHC_HS_V_MAX 1600
  60. #define TDM_CHANNEL_MAX 8
  61. #define DEV_NAME_STR_LEN 32
  62. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  63. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  64. #define WSA8810_NAME_1 "wsa881x.20170211"
  65. #define WSA8810_NAME_2 "wsa881x.20170212"
  66. #define WCN_CDC_SLIM_RX_CH_MAX 2
  67. #define WCN_CDC_SLIM_TX_CH_MAX 2
  68. #define WCN_CDC_SLIM_TX_CH_MAX_LITO 3
  69. enum {
  70. TDM_0 = 0,
  71. TDM_1,
  72. TDM_2,
  73. TDM_3,
  74. TDM_4,
  75. TDM_5,
  76. TDM_6,
  77. TDM_7,
  78. TDM_PORT_MAX,
  79. };
  80. enum {
  81. TDM_PRI = 0,
  82. TDM_SEC,
  83. TDM_TERT,
  84. TDM_INTERFACE_MAX,
  85. };
  86. enum {
  87. PRIM_AUX_PCM = 0,
  88. SEC_AUX_PCM,
  89. TERT_AUX_PCM,
  90. AUX_PCM_MAX,
  91. };
  92. enum {
  93. PRIM_MI2S = 0,
  94. SEC_MI2S,
  95. TERT_MI2S,
  96. MI2S_MAX,
  97. };
  98. enum {
  99. WSA_CDC_DMA_RX_0 = 0,
  100. WSA_CDC_DMA_RX_1,
  101. RX_CDC_DMA_RX_0,
  102. RX_CDC_DMA_RX_1,
  103. RX_CDC_DMA_RX_2,
  104. RX_CDC_DMA_RX_3,
  105. RX_CDC_DMA_RX_5,
  106. CDC_DMA_RX_MAX,
  107. };
  108. enum {
  109. WSA_CDC_DMA_TX_0 = 0,
  110. WSA_CDC_DMA_TX_1,
  111. WSA_CDC_DMA_TX_2,
  112. TX_CDC_DMA_TX_0,
  113. TX_CDC_DMA_TX_3,
  114. TX_CDC_DMA_TX_4,
  115. VA_CDC_DMA_TX_0,
  116. VA_CDC_DMA_TX_1,
  117. VA_CDC_DMA_TX_2,
  118. CDC_DMA_TX_MAX,
  119. };
  120. enum {
  121. SLIM_RX_7 = 0,
  122. SLIM_RX_MAX,
  123. };
  124. enum {
  125. SLIM_TX_7 = 0,
  126. SLIM_TX_8,
  127. SLIM_TX_MAX,
  128. };
  129. enum {
  130. AFE_LOOPBACK_TX_IDX = 0,
  131. AFE_LOOPBACK_TX_IDX_MAX,
  132. };
  133. struct msm_asoc_mach_data {
  134. struct snd_info_entry *codec_root;
  135. int usbc_en2_gpio; /* used by gpio driver API */
  136. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  137. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  138. struct device_node *dmic45_gpio_p; /* used by pinctrl API */
  139. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  140. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  141. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  142. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  143. bool is_afe_config_done;
  144. struct device_node *fsa_handle;
  145. };
  146. struct tdm_port {
  147. u32 mode;
  148. u32 channel;
  149. };
  150. enum {
  151. EXT_DISP_RX_IDX_DP = 0,
  152. EXT_DISP_RX_IDX_MAX,
  153. };
  154. struct msm_wsa881x_dev_info {
  155. struct device_node *of_node;
  156. u32 index;
  157. };
  158. struct aux_codec_dev_info {
  159. struct device_node *of_node;
  160. u32 index;
  161. };
  162. struct dev_config {
  163. u32 sample_rate;
  164. u32 bit_format;
  165. u32 channels;
  166. };
  167. /* Default configuration of slimbus channels */
  168. static struct dev_config slim_rx_cfg[] = {
  169. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  170. };
  171. static struct dev_config slim_tx_cfg[] = {
  172. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  173. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  174. };
  175. /* Default configuration of external display BE */
  176. static struct dev_config ext_disp_rx_cfg[] = {
  177. [EXT_DISP_RX_IDX_DP] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  178. };
  179. static struct dev_config usb_rx_cfg = {
  180. .sample_rate = SAMPLING_RATE_48KHZ,
  181. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  182. .channels = 2,
  183. };
  184. static struct dev_config usb_tx_cfg = {
  185. .sample_rate = SAMPLING_RATE_48KHZ,
  186. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  187. .channels = 1,
  188. };
  189. static struct dev_config proxy_rx_cfg = {
  190. .sample_rate = SAMPLING_RATE_48KHZ,
  191. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  192. .channels = 2,
  193. };
  194. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  195. {
  196. AFE_API_VERSION_I2S_CONFIG,
  197. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  198. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  199. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  200. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  201. 0,
  202. },
  203. {
  204. AFE_API_VERSION_I2S_CONFIG,
  205. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  206. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  207. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  208. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  209. 0,
  210. },
  211. {
  212. AFE_API_VERSION_I2S_CONFIG,
  213. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  214. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  215. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  216. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  217. 0,
  218. },
  219. };
  220. struct mi2s_conf {
  221. struct mutex lock;
  222. u32 ref_cnt;
  223. u32 msm_is_mi2s_master;
  224. };
  225. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  226. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  227. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  228. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  229. };
  230. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  231. /* Default configuration of TDM channels */
  232. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  233. { /* PRI TDM */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  236. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  242. },
  243. { /* SEC TDM */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  252. },
  253. { /* TERT TDM */
  254. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  255. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  256. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  257. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  262. },
  263. };
  264. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  265. { /* PRI TDM */
  266. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  267. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  268. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  269. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  270. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  272. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  273. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  274. },
  275. { /* SEC TDM */
  276. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  277. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  278. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  279. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  280. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  281. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  282. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  284. },
  285. { /* TERT TDM */
  286. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  287. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  288. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  289. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  290. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  291. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  292. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  293. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  294. },
  295. };
  296. /* Default configuration of AUX PCM channels */
  297. static struct dev_config aux_pcm_rx_cfg[] = {
  298. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  299. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  300. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  301. };
  302. static struct dev_config aux_pcm_tx_cfg[] = {
  303. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  304. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  305. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  306. };
  307. /* Default configuration of MI2S channels */
  308. static struct dev_config mi2s_rx_cfg[] = {
  309. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  310. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  311. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  312. };
  313. static struct dev_config mi2s_tx_cfg[] = {
  314. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  315. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  316. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  317. };
  318. /* Default configuration of Codec DMA Interface RX */
  319. static struct dev_config cdc_dma_rx_cfg[] = {
  320. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  321. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  322. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  323. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  324. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  325. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  326. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  327. };
  328. /* Default configuration of Codec DMA Interface TX */
  329. static struct dev_config cdc_dma_tx_cfg[] = {
  330. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  331. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  332. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  333. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  334. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  335. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  336. [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  337. [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  338. [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  339. };
  340. static struct dev_config afe_loopback_tx_cfg[] = {
  341. [AFE_LOOPBACK_TX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  342. };
  343. static int msm_vi_feed_tx_ch = 2;
  344. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  345. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  346. "S32_LE"};
  347. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  348. "Six", "Seven", "Eight"};
  349. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  350. "KHZ_16", "KHZ_22P05",
  351. "KHZ_32", "KHZ_44P1", "KHZ_48",
  352. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  353. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  354. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  355. "Five", "Six", "Seven",
  356. "Eight"};
  357. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  358. "KHZ_48", "KHZ_176P4",
  359. "KHZ_352P8"};
  360. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  361. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  362. "Five", "Six", "Seven", "Eight"};
  363. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  364. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  365. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  366. "KHZ_48", "KHZ_96", "KHZ_192"};
  367. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  368. "Five", "Six", "Seven",
  369. "Eight"};
  370. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  371. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  372. "Five", "Six", "Seven",
  373. "Eight"};
  374. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  375. "KHZ_16", "KHZ_22P05",
  376. "KHZ_32", "KHZ_44P1", "KHZ_48",
  377. "KHZ_88P2", "KHZ_96",
  378. "KHZ_176P4", "KHZ_192",
  379. "KHZ_352P8", "KHZ_384"};
  380. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  381. "S24_3LE"};
  382. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  383. "KHZ_192", "KHZ_32", "KHZ_44P1",
  384. "KHZ_88P2", "KHZ_176P4"};
  385. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  386. "KHZ_44P1", "KHZ_48",
  387. "KHZ_88P2", "KHZ_96"};
  388. static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
  389. "KHZ_44P1", "KHZ_48",
  390. "KHZ_88P2", "KHZ_96"};
  391. static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
  392. "KHZ_44P1", "KHZ_48",
  393. "KHZ_88P2", "KHZ_96"};
  394. static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
  395. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  396. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  397. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  398. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  399. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  400. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  401. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  402. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  403. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  404. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  405. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  406. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  407. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  408. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  409. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  410. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  411. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  412. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  413. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  414. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  415. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  416. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  417. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  418. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  419. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  420. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  421. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  422. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  423. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  424. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  425. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  426. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  427. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  428. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  429. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  430. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  431. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  432. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  433. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  434. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  435. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  436. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  437. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  438. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  439. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  440. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  441. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  442. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  443. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  444. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  445. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  446. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  447. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  448. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  449. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  450. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  451. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  452. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  453. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  454. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  455. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  456. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  457. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  458. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  459. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
  460. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
  461. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
  462. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  463. cdc_dma_sample_rate_text);
  464. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  465. cdc_dma_sample_rate_text);
  466. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  467. cdc_dma_sample_rate_text);
  468. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  469. cdc_dma_sample_rate_text);
  470. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  471. cdc_dma_sample_rate_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  473. cdc_dma_sample_rate_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  475. cdc_dma_sample_rate_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  477. cdc_dma_sample_rate_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  479. cdc_dma_sample_rate_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  481. cdc_dma_sample_rate_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  483. cdc_dma_sample_rate_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  485. cdc_dma_sample_rate_text);
  486. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  487. cdc_dma_sample_rate_text);
  488. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
  489. cdc_dma_sample_rate_text);
  490. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
  491. cdc_dma_sample_rate_text);
  492. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
  493. cdc_dma_sample_rate_text);
  494. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  496. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  497. ext_disp_sample_rate_text);
  498. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  499. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
  500. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
  501. static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
  502. static bool is_initial_boot;
  503. static bool codec_reg_done;
  504. static struct snd_soc_aux_dev *msm_aux_dev;
  505. static struct snd_soc_codec_conf *msm_codec_conf;
  506. static struct snd_soc_card snd_soc_card_kona_msm;
  507. static int dmic_0_1_gpio_cnt;
  508. static int dmic_2_3_gpio_cnt;
  509. static int dmic_4_5_gpio_cnt;
  510. static void *def_wcd_mbhc_cal(void);
  511. /*
  512. * Need to report LINEIN
  513. * if R/L channel impedance is larger than 5K ohm
  514. */
  515. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  516. .read_fw_bin = false,
  517. .calibration = NULL,
  518. .detect_extn_cable = true,
  519. .mono_stero_detection = false,
  520. .swap_gnd_mic = NULL,
  521. .hs_ext_micbias = true,
  522. .key_code[0] = KEY_MEDIA,
  523. .key_code[1] = KEY_VOICECOMMAND,
  524. .key_code[2] = KEY_VOLUMEUP,
  525. .key_code[3] = KEY_VOLUMEDOWN,
  526. .key_code[4] = 0,
  527. .key_code[5] = 0,
  528. .key_code[6] = 0,
  529. .key_code[7] = 0,
  530. .linein_th = 5000,
  531. .moisture_en = true,
  532. .mbhc_micbias = MIC_BIAS_2,
  533. .anc_micbias = MIC_BIAS_2,
  534. .enable_anc_mic_detect = false,
  535. };
  536. static inline int param_is_mask(int p)
  537. {
  538. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  539. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  540. }
  541. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  542. int n)
  543. {
  544. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  545. }
  546. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  547. unsigned int bit)
  548. {
  549. if (bit >= SNDRV_MASK_MAX)
  550. return;
  551. if (param_is_mask(n)) {
  552. struct snd_mask *m = param_to_mask(p, n);
  553. m->bits[0] = 0;
  554. m->bits[1] = 0;
  555. m->bits[bit >> 5] |= (1 << (bit & 31));
  556. }
  557. }
  558. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  559. struct snd_ctl_elem_value *ucontrol)
  560. {
  561. int sample_rate_val = 0;
  562. switch (usb_rx_cfg.sample_rate) {
  563. case SAMPLING_RATE_384KHZ:
  564. sample_rate_val = 12;
  565. break;
  566. case SAMPLING_RATE_352P8KHZ:
  567. sample_rate_val = 11;
  568. break;
  569. case SAMPLING_RATE_192KHZ:
  570. sample_rate_val = 10;
  571. break;
  572. case SAMPLING_RATE_176P4KHZ:
  573. sample_rate_val = 9;
  574. break;
  575. case SAMPLING_RATE_96KHZ:
  576. sample_rate_val = 8;
  577. break;
  578. case SAMPLING_RATE_88P2KHZ:
  579. sample_rate_val = 7;
  580. break;
  581. case SAMPLING_RATE_48KHZ:
  582. sample_rate_val = 6;
  583. break;
  584. case SAMPLING_RATE_44P1KHZ:
  585. sample_rate_val = 5;
  586. break;
  587. case SAMPLING_RATE_32KHZ:
  588. sample_rate_val = 4;
  589. break;
  590. case SAMPLING_RATE_22P05KHZ:
  591. sample_rate_val = 3;
  592. break;
  593. case SAMPLING_RATE_16KHZ:
  594. sample_rate_val = 2;
  595. break;
  596. case SAMPLING_RATE_11P025KHZ:
  597. sample_rate_val = 1;
  598. break;
  599. case SAMPLING_RATE_8KHZ:
  600. default:
  601. sample_rate_val = 0;
  602. break;
  603. }
  604. ucontrol->value.integer.value[0] = sample_rate_val;
  605. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  606. usb_rx_cfg.sample_rate);
  607. return 0;
  608. }
  609. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  610. struct snd_ctl_elem_value *ucontrol)
  611. {
  612. switch (ucontrol->value.integer.value[0]) {
  613. case 12:
  614. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  615. break;
  616. case 11:
  617. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  618. break;
  619. case 10:
  620. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  621. break;
  622. case 9:
  623. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  624. break;
  625. case 8:
  626. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  627. break;
  628. case 7:
  629. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  630. break;
  631. case 6:
  632. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  633. break;
  634. case 5:
  635. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  636. break;
  637. case 4:
  638. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  639. break;
  640. case 3:
  641. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  642. break;
  643. case 2:
  644. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  645. break;
  646. case 1:
  647. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  648. break;
  649. case 0:
  650. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  651. break;
  652. default:
  653. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  654. break;
  655. }
  656. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  657. __func__, ucontrol->value.integer.value[0],
  658. usb_rx_cfg.sample_rate);
  659. return 0;
  660. }
  661. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  662. struct snd_ctl_elem_value *ucontrol)
  663. {
  664. int sample_rate_val = 0;
  665. switch (usb_tx_cfg.sample_rate) {
  666. case SAMPLING_RATE_384KHZ:
  667. sample_rate_val = 12;
  668. break;
  669. case SAMPLING_RATE_352P8KHZ:
  670. sample_rate_val = 11;
  671. break;
  672. case SAMPLING_RATE_192KHZ:
  673. sample_rate_val = 10;
  674. break;
  675. case SAMPLING_RATE_176P4KHZ:
  676. sample_rate_val = 9;
  677. break;
  678. case SAMPLING_RATE_96KHZ:
  679. sample_rate_val = 8;
  680. break;
  681. case SAMPLING_RATE_88P2KHZ:
  682. sample_rate_val = 7;
  683. break;
  684. case SAMPLING_RATE_48KHZ:
  685. sample_rate_val = 6;
  686. break;
  687. case SAMPLING_RATE_44P1KHZ:
  688. sample_rate_val = 5;
  689. break;
  690. case SAMPLING_RATE_32KHZ:
  691. sample_rate_val = 4;
  692. break;
  693. case SAMPLING_RATE_22P05KHZ:
  694. sample_rate_val = 3;
  695. break;
  696. case SAMPLING_RATE_16KHZ:
  697. sample_rate_val = 2;
  698. break;
  699. case SAMPLING_RATE_11P025KHZ:
  700. sample_rate_val = 1;
  701. break;
  702. case SAMPLING_RATE_8KHZ:
  703. sample_rate_val = 0;
  704. break;
  705. default:
  706. sample_rate_val = 6;
  707. break;
  708. }
  709. ucontrol->value.integer.value[0] = sample_rate_val;
  710. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  711. usb_tx_cfg.sample_rate);
  712. return 0;
  713. }
  714. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  715. struct snd_ctl_elem_value *ucontrol)
  716. {
  717. switch (ucontrol->value.integer.value[0]) {
  718. case 12:
  719. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  720. break;
  721. case 11:
  722. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  723. break;
  724. case 10:
  725. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  726. break;
  727. case 9:
  728. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  729. break;
  730. case 8:
  731. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  732. break;
  733. case 7:
  734. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  735. break;
  736. case 6:
  737. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  738. break;
  739. case 5:
  740. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  741. break;
  742. case 4:
  743. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  744. break;
  745. case 3:
  746. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  747. break;
  748. case 2:
  749. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  750. break;
  751. case 1:
  752. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  753. break;
  754. case 0:
  755. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  756. break;
  757. default:
  758. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  759. break;
  760. }
  761. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  762. __func__, ucontrol->value.integer.value[0],
  763. usb_tx_cfg.sample_rate);
  764. return 0;
  765. }
  766. static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
  767. struct snd_ctl_elem_value *ucontrol)
  768. {
  769. pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
  770. afe_loopback_tx_cfg[0].channels);
  771. ucontrol->value.enumerated.item[0] =
  772. afe_loopback_tx_cfg[0].channels - 1;
  773. return 0;
  774. }
  775. static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
  776. struct snd_ctl_elem_value *ucontrol)
  777. {
  778. afe_loopback_tx_cfg[0].channels =
  779. ucontrol->value.enumerated.item[0] + 1;
  780. pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
  781. afe_loopback_tx_cfg[0].channels);
  782. return 1;
  783. }
  784. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  785. struct snd_ctl_elem_value *ucontrol)
  786. {
  787. switch (usb_rx_cfg.bit_format) {
  788. case SNDRV_PCM_FORMAT_S32_LE:
  789. ucontrol->value.integer.value[0] = 3;
  790. break;
  791. case SNDRV_PCM_FORMAT_S24_3LE:
  792. ucontrol->value.integer.value[0] = 2;
  793. break;
  794. case SNDRV_PCM_FORMAT_S24_LE:
  795. ucontrol->value.integer.value[0] = 1;
  796. break;
  797. case SNDRV_PCM_FORMAT_S16_LE:
  798. default:
  799. ucontrol->value.integer.value[0] = 0;
  800. break;
  801. }
  802. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  803. __func__, usb_rx_cfg.bit_format,
  804. ucontrol->value.integer.value[0]);
  805. return 0;
  806. }
  807. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  808. struct snd_ctl_elem_value *ucontrol)
  809. {
  810. int rc = 0;
  811. switch (ucontrol->value.integer.value[0]) {
  812. case 3:
  813. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  814. break;
  815. case 2:
  816. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  817. break;
  818. case 1:
  819. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  820. break;
  821. case 0:
  822. default:
  823. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  824. break;
  825. }
  826. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  827. __func__, usb_rx_cfg.bit_format,
  828. ucontrol->value.integer.value[0]);
  829. return rc;
  830. }
  831. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  832. struct snd_ctl_elem_value *ucontrol)
  833. {
  834. switch (usb_tx_cfg.bit_format) {
  835. case SNDRV_PCM_FORMAT_S32_LE:
  836. ucontrol->value.integer.value[0] = 3;
  837. break;
  838. case SNDRV_PCM_FORMAT_S24_3LE:
  839. ucontrol->value.integer.value[0] = 2;
  840. break;
  841. case SNDRV_PCM_FORMAT_S24_LE:
  842. ucontrol->value.integer.value[0] = 1;
  843. break;
  844. case SNDRV_PCM_FORMAT_S16_LE:
  845. default:
  846. ucontrol->value.integer.value[0] = 0;
  847. break;
  848. }
  849. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  850. __func__, usb_tx_cfg.bit_format,
  851. ucontrol->value.integer.value[0]);
  852. return 0;
  853. }
  854. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  855. struct snd_ctl_elem_value *ucontrol)
  856. {
  857. int rc = 0;
  858. switch (ucontrol->value.integer.value[0]) {
  859. case 3:
  860. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  861. break;
  862. case 2:
  863. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  864. break;
  865. case 1:
  866. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  867. break;
  868. case 0:
  869. default:
  870. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  871. break;
  872. }
  873. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  874. __func__, usb_tx_cfg.bit_format,
  875. ucontrol->value.integer.value[0]);
  876. return rc;
  877. }
  878. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  879. struct snd_ctl_elem_value *ucontrol)
  880. {
  881. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  882. usb_rx_cfg.channels);
  883. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  884. return 0;
  885. }
  886. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  887. struct snd_ctl_elem_value *ucontrol)
  888. {
  889. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  890. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  891. return 1;
  892. }
  893. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  894. struct snd_ctl_elem_value *ucontrol)
  895. {
  896. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  897. usb_tx_cfg.channels);
  898. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  899. return 0;
  900. }
  901. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  902. struct snd_ctl_elem_value *ucontrol)
  903. {
  904. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  905. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  906. return 1;
  907. }
  908. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  909. struct snd_ctl_elem_value *ucontrol)
  910. {
  911. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  912. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  913. ucontrol->value.integer.value[0]);
  914. return 0;
  915. }
  916. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  917. struct snd_ctl_elem_value *ucontrol)
  918. {
  919. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  920. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  921. return 1;
  922. }
  923. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  924. {
  925. int idx = 0;
  926. if (strnstr(kcontrol->id.name, "Display Port RX",
  927. sizeof("Display Port RX"))) {
  928. idx = EXT_DISP_RX_IDX_DP;
  929. } else {
  930. pr_err("%s: unsupported BE: %s\n",
  931. __func__, kcontrol->id.name);
  932. idx = -EINVAL;
  933. }
  934. return idx;
  935. }
  936. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  937. struct snd_ctl_elem_value *ucontrol)
  938. {
  939. int idx = ext_disp_get_port_idx(kcontrol);
  940. if (idx < 0)
  941. return idx;
  942. switch (ext_disp_rx_cfg[idx].bit_format) {
  943. case SNDRV_PCM_FORMAT_S24_3LE:
  944. ucontrol->value.integer.value[0] = 2;
  945. break;
  946. case SNDRV_PCM_FORMAT_S24_LE:
  947. ucontrol->value.integer.value[0] = 1;
  948. break;
  949. case SNDRV_PCM_FORMAT_S16_LE:
  950. default:
  951. ucontrol->value.integer.value[0] = 0;
  952. break;
  953. }
  954. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  955. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  956. ucontrol->value.integer.value[0]);
  957. return 0;
  958. }
  959. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  960. struct snd_ctl_elem_value *ucontrol)
  961. {
  962. int idx = ext_disp_get_port_idx(kcontrol);
  963. if (idx < 0)
  964. return idx;
  965. switch (ucontrol->value.integer.value[0]) {
  966. case 2:
  967. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  968. break;
  969. case 1:
  970. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  971. break;
  972. case 0:
  973. default:
  974. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  975. break;
  976. }
  977. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  978. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  979. ucontrol->value.integer.value[0]);
  980. return 0;
  981. }
  982. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  983. struct snd_ctl_elem_value *ucontrol)
  984. {
  985. int idx = ext_disp_get_port_idx(kcontrol);
  986. if (idx < 0)
  987. return idx;
  988. ucontrol->value.integer.value[0] =
  989. ext_disp_rx_cfg[idx].channels - 2;
  990. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  991. idx, ext_disp_rx_cfg[idx].channels);
  992. return 0;
  993. }
  994. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  995. struct snd_ctl_elem_value *ucontrol)
  996. {
  997. int idx = ext_disp_get_port_idx(kcontrol);
  998. if (idx < 0)
  999. return idx;
  1000. ext_disp_rx_cfg[idx].channels =
  1001. ucontrol->value.integer.value[0] + 2;
  1002. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1003. idx, ext_disp_rx_cfg[idx].channels);
  1004. return 1;
  1005. }
  1006. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1007. struct snd_ctl_elem_value *ucontrol)
  1008. {
  1009. int sample_rate_val;
  1010. int idx = ext_disp_get_port_idx(kcontrol);
  1011. if (idx < 0)
  1012. return idx;
  1013. switch (ext_disp_rx_cfg[idx].sample_rate) {
  1014. case SAMPLING_RATE_176P4KHZ:
  1015. sample_rate_val = 6;
  1016. break;
  1017. case SAMPLING_RATE_88P2KHZ:
  1018. sample_rate_val = 5;
  1019. break;
  1020. case SAMPLING_RATE_44P1KHZ:
  1021. sample_rate_val = 4;
  1022. break;
  1023. case SAMPLING_RATE_32KHZ:
  1024. sample_rate_val = 3;
  1025. break;
  1026. case SAMPLING_RATE_192KHZ:
  1027. sample_rate_val = 2;
  1028. break;
  1029. case SAMPLING_RATE_96KHZ:
  1030. sample_rate_val = 1;
  1031. break;
  1032. case SAMPLING_RATE_48KHZ:
  1033. default:
  1034. sample_rate_val = 0;
  1035. break;
  1036. }
  1037. ucontrol->value.integer.value[0] = sample_rate_val;
  1038. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  1039. idx, ext_disp_rx_cfg[idx].sample_rate);
  1040. return 0;
  1041. }
  1042. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1043. struct snd_ctl_elem_value *ucontrol)
  1044. {
  1045. int idx = ext_disp_get_port_idx(kcontrol);
  1046. if (idx < 0)
  1047. return idx;
  1048. switch (ucontrol->value.integer.value[0]) {
  1049. case 6:
  1050. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  1051. break;
  1052. case 5:
  1053. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  1054. break;
  1055. case 4:
  1056. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  1057. break;
  1058. case 3:
  1059. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  1060. break;
  1061. case 2:
  1062. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  1063. break;
  1064. case 1:
  1065. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  1066. break;
  1067. case 0:
  1068. default:
  1069. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  1070. break;
  1071. }
  1072. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  1073. __func__, ucontrol->value.integer.value[0], idx,
  1074. ext_disp_rx_cfg[idx].sample_rate);
  1075. return 0;
  1076. }
  1077. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  1078. struct snd_ctl_elem_value *ucontrol)
  1079. {
  1080. pr_debug("%s: proxy_rx channels = %d\n",
  1081. __func__, proxy_rx_cfg.channels);
  1082. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  1083. return 0;
  1084. }
  1085. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  1086. struct snd_ctl_elem_value *ucontrol)
  1087. {
  1088. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  1089. pr_debug("%s: proxy_rx channels = %d\n",
  1090. __func__, proxy_rx_cfg.channels);
  1091. return 1;
  1092. }
  1093. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  1094. struct tdm_port *port)
  1095. {
  1096. if (port) {
  1097. if (strnstr(kcontrol->id.name, "PRI",
  1098. sizeof(kcontrol->id.name))) {
  1099. port->mode = TDM_PRI;
  1100. } else if (strnstr(kcontrol->id.name, "SEC",
  1101. sizeof(kcontrol->id.name))) {
  1102. port->mode = TDM_SEC;
  1103. } else if (strnstr(kcontrol->id.name, "TERT",
  1104. sizeof(kcontrol->id.name))) {
  1105. port->mode = TDM_TERT;
  1106. } else {
  1107. pr_err("%s: unsupported mode in: %s\n",
  1108. __func__, kcontrol->id.name);
  1109. return -EINVAL;
  1110. }
  1111. if (strnstr(kcontrol->id.name, "RX_0",
  1112. sizeof(kcontrol->id.name)) ||
  1113. strnstr(kcontrol->id.name, "TX_0",
  1114. sizeof(kcontrol->id.name))) {
  1115. port->channel = TDM_0;
  1116. } else if (strnstr(kcontrol->id.name, "RX_1",
  1117. sizeof(kcontrol->id.name)) ||
  1118. strnstr(kcontrol->id.name, "TX_1",
  1119. sizeof(kcontrol->id.name))) {
  1120. port->channel = TDM_1;
  1121. } else if (strnstr(kcontrol->id.name, "RX_2",
  1122. sizeof(kcontrol->id.name)) ||
  1123. strnstr(kcontrol->id.name, "TX_2",
  1124. sizeof(kcontrol->id.name))) {
  1125. port->channel = TDM_2;
  1126. } else if (strnstr(kcontrol->id.name, "RX_3",
  1127. sizeof(kcontrol->id.name)) ||
  1128. strnstr(kcontrol->id.name, "TX_3",
  1129. sizeof(kcontrol->id.name))) {
  1130. port->channel = TDM_3;
  1131. } else if (strnstr(kcontrol->id.name, "RX_4",
  1132. sizeof(kcontrol->id.name)) ||
  1133. strnstr(kcontrol->id.name, "TX_4",
  1134. sizeof(kcontrol->id.name))) {
  1135. port->channel = TDM_4;
  1136. } else if (strnstr(kcontrol->id.name, "RX_5",
  1137. sizeof(kcontrol->id.name)) ||
  1138. strnstr(kcontrol->id.name, "TX_5",
  1139. sizeof(kcontrol->id.name))) {
  1140. port->channel = TDM_5;
  1141. } else if (strnstr(kcontrol->id.name, "RX_6",
  1142. sizeof(kcontrol->id.name)) ||
  1143. strnstr(kcontrol->id.name, "TX_6",
  1144. sizeof(kcontrol->id.name))) {
  1145. port->channel = TDM_6;
  1146. } else if (strnstr(kcontrol->id.name, "RX_7",
  1147. sizeof(kcontrol->id.name)) ||
  1148. strnstr(kcontrol->id.name, "TX_7",
  1149. sizeof(kcontrol->id.name))) {
  1150. port->channel = TDM_7;
  1151. } else {
  1152. pr_err("%s: unsupported channel in: %s\n",
  1153. __func__, kcontrol->id.name);
  1154. return -EINVAL;
  1155. }
  1156. } else {
  1157. return -EINVAL;
  1158. }
  1159. return 0;
  1160. }
  1161. static int tdm_get_sample_rate(int value)
  1162. {
  1163. int sample_rate = 0;
  1164. switch (value) {
  1165. case 0:
  1166. sample_rate = SAMPLING_RATE_8KHZ;
  1167. break;
  1168. case 1:
  1169. sample_rate = SAMPLING_RATE_16KHZ;
  1170. break;
  1171. case 2:
  1172. sample_rate = SAMPLING_RATE_32KHZ;
  1173. break;
  1174. case 3:
  1175. sample_rate = SAMPLING_RATE_48KHZ;
  1176. break;
  1177. case 4:
  1178. sample_rate = SAMPLING_RATE_176P4KHZ;
  1179. break;
  1180. case 5:
  1181. sample_rate = SAMPLING_RATE_352P8KHZ;
  1182. break;
  1183. default:
  1184. sample_rate = SAMPLING_RATE_48KHZ;
  1185. break;
  1186. }
  1187. return sample_rate;
  1188. }
  1189. static int tdm_get_sample_rate_val(int sample_rate)
  1190. {
  1191. int sample_rate_val = 0;
  1192. switch (sample_rate) {
  1193. case SAMPLING_RATE_8KHZ:
  1194. sample_rate_val = 0;
  1195. break;
  1196. case SAMPLING_RATE_16KHZ:
  1197. sample_rate_val = 1;
  1198. break;
  1199. case SAMPLING_RATE_32KHZ:
  1200. sample_rate_val = 2;
  1201. break;
  1202. case SAMPLING_RATE_48KHZ:
  1203. sample_rate_val = 3;
  1204. break;
  1205. case SAMPLING_RATE_176P4KHZ:
  1206. sample_rate_val = 4;
  1207. break;
  1208. case SAMPLING_RATE_352P8KHZ:
  1209. sample_rate_val = 5;
  1210. break;
  1211. default:
  1212. sample_rate_val = 3;
  1213. break;
  1214. }
  1215. return sample_rate_val;
  1216. }
  1217. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1218. struct snd_ctl_elem_value *ucontrol)
  1219. {
  1220. struct tdm_port port;
  1221. int ret = tdm_get_port_idx(kcontrol, &port);
  1222. if (ret) {
  1223. pr_err("%s: unsupported control: %s\n",
  1224. __func__, kcontrol->id.name);
  1225. } else {
  1226. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  1227. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  1228. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  1229. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  1230. ucontrol->value.enumerated.item[0]);
  1231. }
  1232. return ret;
  1233. }
  1234. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1235. struct snd_ctl_elem_value *ucontrol)
  1236. {
  1237. struct tdm_port port;
  1238. int ret = tdm_get_port_idx(kcontrol, &port);
  1239. if (ret) {
  1240. pr_err("%s: unsupported control: %s\n",
  1241. __func__, kcontrol->id.name);
  1242. } else {
  1243. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  1244. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1245. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  1246. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  1247. ucontrol->value.enumerated.item[0]);
  1248. }
  1249. return ret;
  1250. }
  1251. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1252. struct snd_ctl_elem_value *ucontrol)
  1253. {
  1254. struct tdm_port port;
  1255. int ret = tdm_get_port_idx(kcontrol, &port);
  1256. if (ret) {
  1257. pr_err("%s: unsupported control: %s\n",
  1258. __func__, kcontrol->id.name);
  1259. } else {
  1260. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  1261. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  1262. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1263. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1264. ucontrol->value.enumerated.item[0]);
  1265. }
  1266. return ret;
  1267. }
  1268. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1269. struct snd_ctl_elem_value *ucontrol)
  1270. {
  1271. struct tdm_port port;
  1272. int ret = tdm_get_port_idx(kcontrol, &port);
  1273. if (ret) {
  1274. pr_err("%s: unsupported control: %s\n",
  1275. __func__, kcontrol->id.name);
  1276. } else {
  1277. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  1278. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1279. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1280. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1281. ucontrol->value.enumerated.item[0]);
  1282. }
  1283. return ret;
  1284. }
  1285. static int tdm_get_format(int value)
  1286. {
  1287. int format = 0;
  1288. switch (value) {
  1289. case 0:
  1290. format = SNDRV_PCM_FORMAT_S16_LE;
  1291. break;
  1292. case 1:
  1293. format = SNDRV_PCM_FORMAT_S24_LE;
  1294. break;
  1295. case 2:
  1296. format = SNDRV_PCM_FORMAT_S32_LE;
  1297. break;
  1298. default:
  1299. format = SNDRV_PCM_FORMAT_S16_LE;
  1300. break;
  1301. }
  1302. return format;
  1303. }
  1304. static int tdm_get_format_val(int format)
  1305. {
  1306. int value = 0;
  1307. switch (format) {
  1308. case SNDRV_PCM_FORMAT_S16_LE:
  1309. value = 0;
  1310. break;
  1311. case SNDRV_PCM_FORMAT_S24_LE:
  1312. value = 1;
  1313. break;
  1314. case SNDRV_PCM_FORMAT_S32_LE:
  1315. value = 2;
  1316. break;
  1317. default:
  1318. value = 0;
  1319. break;
  1320. }
  1321. return value;
  1322. }
  1323. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  1324. struct snd_ctl_elem_value *ucontrol)
  1325. {
  1326. struct tdm_port port;
  1327. int ret = tdm_get_port_idx(kcontrol, &port);
  1328. if (ret) {
  1329. pr_err("%s: unsupported control: %s\n",
  1330. __func__, kcontrol->id.name);
  1331. } else {
  1332. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1333. tdm_rx_cfg[port.mode][port.channel].bit_format);
  1334. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1335. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1336. ucontrol->value.enumerated.item[0]);
  1337. }
  1338. return ret;
  1339. }
  1340. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  1341. struct snd_ctl_elem_value *ucontrol)
  1342. {
  1343. struct tdm_port port;
  1344. int ret = tdm_get_port_idx(kcontrol, &port);
  1345. if (ret) {
  1346. pr_err("%s: unsupported control: %s\n",
  1347. __func__, kcontrol->id.name);
  1348. } else {
  1349. tdm_rx_cfg[port.mode][port.channel].bit_format =
  1350. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1351. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1352. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1353. ucontrol->value.enumerated.item[0]);
  1354. }
  1355. return ret;
  1356. }
  1357. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  1358. struct snd_ctl_elem_value *ucontrol)
  1359. {
  1360. struct tdm_port port;
  1361. int ret = tdm_get_port_idx(kcontrol, &port);
  1362. if (ret) {
  1363. pr_err("%s: unsupported control: %s\n",
  1364. __func__, kcontrol->id.name);
  1365. } else {
  1366. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1367. tdm_tx_cfg[port.mode][port.channel].bit_format);
  1368. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1369. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1370. ucontrol->value.enumerated.item[0]);
  1371. }
  1372. return ret;
  1373. }
  1374. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  1375. struct snd_ctl_elem_value *ucontrol)
  1376. {
  1377. struct tdm_port port;
  1378. int ret = tdm_get_port_idx(kcontrol, &port);
  1379. if (ret) {
  1380. pr_err("%s: unsupported control: %s\n",
  1381. __func__, kcontrol->id.name);
  1382. } else {
  1383. tdm_tx_cfg[port.mode][port.channel].bit_format =
  1384. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1385. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1386. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1387. ucontrol->value.enumerated.item[0]);
  1388. }
  1389. return ret;
  1390. }
  1391. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  1392. struct snd_ctl_elem_value *ucontrol)
  1393. {
  1394. struct tdm_port port;
  1395. int ret = tdm_get_port_idx(kcontrol, &port);
  1396. if (ret) {
  1397. pr_err("%s: unsupported control: %s\n",
  1398. __func__, kcontrol->id.name);
  1399. } else {
  1400. ucontrol->value.enumerated.item[0] =
  1401. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  1402. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1403. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  1404. ucontrol->value.enumerated.item[0]);
  1405. }
  1406. return ret;
  1407. }
  1408. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  1409. struct snd_ctl_elem_value *ucontrol)
  1410. {
  1411. struct tdm_port port;
  1412. int ret = tdm_get_port_idx(kcontrol, &port);
  1413. if (ret) {
  1414. pr_err("%s: unsupported control: %s\n",
  1415. __func__, kcontrol->id.name);
  1416. } else {
  1417. tdm_rx_cfg[port.mode][port.channel].channels =
  1418. ucontrol->value.enumerated.item[0] + 1;
  1419. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1420. tdm_rx_cfg[port.mode][port.channel].channels,
  1421. ucontrol->value.enumerated.item[0] + 1);
  1422. }
  1423. return ret;
  1424. }
  1425. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  1426. struct snd_ctl_elem_value *ucontrol)
  1427. {
  1428. struct tdm_port port;
  1429. int ret = tdm_get_port_idx(kcontrol, &port);
  1430. if (ret) {
  1431. pr_err("%s: unsupported control: %s\n",
  1432. __func__, kcontrol->id.name);
  1433. } else {
  1434. ucontrol->value.enumerated.item[0] =
  1435. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  1436. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1437. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  1438. ucontrol->value.enumerated.item[0]);
  1439. }
  1440. return ret;
  1441. }
  1442. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  1443. struct snd_ctl_elem_value *ucontrol)
  1444. {
  1445. struct tdm_port port;
  1446. int ret = tdm_get_port_idx(kcontrol, &port);
  1447. if (ret) {
  1448. pr_err("%s: unsupported control: %s\n",
  1449. __func__, kcontrol->id.name);
  1450. } else {
  1451. tdm_tx_cfg[port.mode][port.channel].channels =
  1452. ucontrol->value.enumerated.item[0] + 1;
  1453. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1454. tdm_tx_cfg[port.mode][port.channel].channels,
  1455. ucontrol->value.enumerated.item[0] + 1);
  1456. }
  1457. return ret;
  1458. }
  1459. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  1460. {
  1461. int idx = 0;
  1462. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  1463. sizeof("PRIM_AUX_PCM"))) {
  1464. idx = PRIM_AUX_PCM;
  1465. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  1466. sizeof("SEC_AUX_PCM"))) {
  1467. idx = SEC_AUX_PCM;
  1468. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  1469. sizeof("TERT_AUX_PCM"))) {
  1470. idx = TERT_AUX_PCM;
  1471. } else {
  1472. pr_err("%s: unsupported port: %s\n",
  1473. __func__, kcontrol->id.name);
  1474. idx = -EINVAL;
  1475. }
  1476. return idx;
  1477. }
  1478. static int aux_pcm_get_sample_rate(int value)
  1479. {
  1480. int sample_rate = 0;
  1481. switch (value) {
  1482. case 1:
  1483. sample_rate = SAMPLING_RATE_16KHZ;
  1484. break;
  1485. case 0:
  1486. default:
  1487. sample_rate = SAMPLING_RATE_8KHZ;
  1488. break;
  1489. }
  1490. return sample_rate;
  1491. }
  1492. static int aux_pcm_get_sample_rate_val(int sample_rate)
  1493. {
  1494. int sample_rate_val = 0;
  1495. switch (sample_rate) {
  1496. case SAMPLING_RATE_16KHZ:
  1497. sample_rate_val = 1;
  1498. break;
  1499. case SAMPLING_RATE_8KHZ:
  1500. default:
  1501. sample_rate_val = 0;
  1502. break;
  1503. }
  1504. return sample_rate_val;
  1505. }
  1506. static int mi2s_auxpcm_get_format(int value)
  1507. {
  1508. int format = 0;
  1509. switch (value) {
  1510. case 0:
  1511. format = SNDRV_PCM_FORMAT_S16_LE;
  1512. break;
  1513. case 1:
  1514. format = SNDRV_PCM_FORMAT_S24_LE;
  1515. break;
  1516. case 2:
  1517. format = SNDRV_PCM_FORMAT_S24_3LE;
  1518. break;
  1519. case 3:
  1520. format = SNDRV_PCM_FORMAT_S32_LE;
  1521. break;
  1522. default:
  1523. format = SNDRV_PCM_FORMAT_S16_LE;
  1524. break;
  1525. }
  1526. return format;
  1527. }
  1528. static int mi2s_auxpcm_get_format_value(int format)
  1529. {
  1530. int value = 0;
  1531. switch (format) {
  1532. case SNDRV_PCM_FORMAT_S16_LE:
  1533. value = 0;
  1534. break;
  1535. case SNDRV_PCM_FORMAT_S24_LE:
  1536. value = 1;
  1537. break;
  1538. case SNDRV_PCM_FORMAT_S24_3LE:
  1539. value = 2;
  1540. break;
  1541. case SNDRV_PCM_FORMAT_S32_LE:
  1542. value = 3;
  1543. break;
  1544. default:
  1545. value = 0;
  1546. break;
  1547. }
  1548. return value;
  1549. }
  1550. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1551. struct snd_ctl_elem_value *ucontrol)
  1552. {
  1553. int idx = aux_pcm_get_port_idx(kcontrol);
  1554. if (idx < 0)
  1555. return idx;
  1556. ucontrol->value.enumerated.item[0] =
  1557. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  1558. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1559. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1560. ucontrol->value.enumerated.item[0]);
  1561. return 0;
  1562. }
  1563. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1564. struct snd_ctl_elem_value *ucontrol)
  1565. {
  1566. int idx = aux_pcm_get_port_idx(kcontrol);
  1567. if (idx < 0)
  1568. return idx;
  1569. aux_pcm_rx_cfg[idx].sample_rate =
  1570. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1571. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1572. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1573. ucontrol->value.enumerated.item[0]);
  1574. return 0;
  1575. }
  1576. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1577. struct snd_ctl_elem_value *ucontrol)
  1578. {
  1579. int idx = aux_pcm_get_port_idx(kcontrol);
  1580. if (idx < 0)
  1581. return idx;
  1582. ucontrol->value.enumerated.item[0] =
  1583. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  1584. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1585. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1586. ucontrol->value.enumerated.item[0]);
  1587. return 0;
  1588. }
  1589. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1590. struct snd_ctl_elem_value *ucontrol)
  1591. {
  1592. int idx = aux_pcm_get_port_idx(kcontrol);
  1593. if (idx < 0)
  1594. return idx;
  1595. aux_pcm_tx_cfg[idx].sample_rate =
  1596. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1597. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1598. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1599. ucontrol->value.enumerated.item[0]);
  1600. return 0;
  1601. }
  1602. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  1603. struct snd_ctl_elem_value *ucontrol)
  1604. {
  1605. int idx = aux_pcm_get_port_idx(kcontrol);
  1606. if (idx < 0)
  1607. return idx;
  1608. ucontrol->value.enumerated.item[0] =
  1609. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  1610. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1611. idx, aux_pcm_rx_cfg[idx].bit_format,
  1612. ucontrol->value.enumerated.item[0]);
  1613. return 0;
  1614. }
  1615. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  1616. struct snd_ctl_elem_value *ucontrol)
  1617. {
  1618. int idx = aux_pcm_get_port_idx(kcontrol);
  1619. if (idx < 0)
  1620. return idx;
  1621. aux_pcm_rx_cfg[idx].bit_format =
  1622. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1623. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1624. idx, aux_pcm_rx_cfg[idx].bit_format,
  1625. ucontrol->value.enumerated.item[0]);
  1626. return 0;
  1627. }
  1628. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  1629. struct snd_ctl_elem_value *ucontrol)
  1630. {
  1631. int idx = aux_pcm_get_port_idx(kcontrol);
  1632. if (idx < 0)
  1633. return idx;
  1634. ucontrol->value.enumerated.item[0] =
  1635. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  1636. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1637. idx, aux_pcm_tx_cfg[idx].bit_format,
  1638. ucontrol->value.enumerated.item[0]);
  1639. return 0;
  1640. }
  1641. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  1642. struct snd_ctl_elem_value *ucontrol)
  1643. {
  1644. int idx = aux_pcm_get_port_idx(kcontrol);
  1645. if (idx < 0)
  1646. return idx;
  1647. aux_pcm_tx_cfg[idx].bit_format =
  1648. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1649. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1650. idx, aux_pcm_tx_cfg[idx].bit_format,
  1651. ucontrol->value.enumerated.item[0]);
  1652. return 0;
  1653. }
  1654. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  1655. {
  1656. int idx = 0;
  1657. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  1658. sizeof("PRIM_MI2S_RX"))) {
  1659. idx = PRIM_MI2S;
  1660. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  1661. sizeof("SEC_MI2S_RX"))) {
  1662. idx = SEC_MI2S;
  1663. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  1664. sizeof("TERT_MI2S_RX"))) {
  1665. idx = TERT_MI2S;
  1666. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  1667. sizeof("PRIM_MI2S_TX"))) {
  1668. idx = PRIM_MI2S;
  1669. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  1670. sizeof("SEC_MI2S_TX"))) {
  1671. idx = SEC_MI2S;
  1672. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  1673. sizeof("TERT_MI2S_TX"))) {
  1674. idx = TERT_MI2S;
  1675. } else {
  1676. pr_err("%s: unsupported channel: %s\n",
  1677. __func__, kcontrol->id.name);
  1678. idx = -EINVAL;
  1679. }
  1680. return idx;
  1681. }
  1682. static int mi2s_get_sample_rate(int value)
  1683. {
  1684. int sample_rate = 0;
  1685. switch (value) {
  1686. case 0:
  1687. sample_rate = SAMPLING_RATE_8KHZ;
  1688. break;
  1689. case 1:
  1690. sample_rate = SAMPLING_RATE_11P025KHZ;
  1691. break;
  1692. case 2:
  1693. sample_rate = SAMPLING_RATE_16KHZ;
  1694. break;
  1695. case 3:
  1696. sample_rate = SAMPLING_RATE_22P05KHZ;
  1697. break;
  1698. case 4:
  1699. sample_rate = SAMPLING_RATE_32KHZ;
  1700. break;
  1701. case 5:
  1702. sample_rate = SAMPLING_RATE_44P1KHZ;
  1703. break;
  1704. case 6:
  1705. sample_rate = SAMPLING_RATE_48KHZ;
  1706. break;
  1707. case 7:
  1708. sample_rate = SAMPLING_RATE_96KHZ;
  1709. break;
  1710. case 8:
  1711. sample_rate = SAMPLING_RATE_192KHZ;
  1712. break;
  1713. default:
  1714. sample_rate = SAMPLING_RATE_48KHZ;
  1715. break;
  1716. }
  1717. return sample_rate;
  1718. }
  1719. static int mi2s_get_sample_rate_val(int sample_rate)
  1720. {
  1721. int sample_rate_val = 0;
  1722. switch (sample_rate) {
  1723. case SAMPLING_RATE_8KHZ:
  1724. sample_rate_val = 0;
  1725. break;
  1726. case SAMPLING_RATE_11P025KHZ:
  1727. sample_rate_val = 1;
  1728. break;
  1729. case SAMPLING_RATE_16KHZ:
  1730. sample_rate_val = 2;
  1731. break;
  1732. case SAMPLING_RATE_22P05KHZ:
  1733. sample_rate_val = 3;
  1734. break;
  1735. case SAMPLING_RATE_32KHZ:
  1736. sample_rate_val = 4;
  1737. break;
  1738. case SAMPLING_RATE_44P1KHZ:
  1739. sample_rate_val = 5;
  1740. break;
  1741. case SAMPLING_RATE_48KHZ:
  1742. sample_rate_val = 6;
  1743. break;
  1744. case SAMPLING_RATE_96KHZ:
  1745. sample_rate_val = 7;
  1746. break;
  1747. case SAMPLING_RATE_192KHZ:
  1748. sample_rate_val = 8;
  1749. break;
  1750. default:
  1751. sample_rate_val = 6;
  1752. break;
  1753. }
  1754. return sample_rate_val;
  1755. }
  1756. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1757. struct snd_ctl_elem_value *ucontrol)
  1758. {
  1759. int idx = mi2s_get_port_idx(kcontrol);
  1760. if (idx < 0)
  1761. return idx;
  1762. ucontrol->value.enumerated.item[0] =
  1763. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  1764. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1765. idx, mi2s_rx_cfg[idx].sample_rate,
  1766. ucontrol->value.enumerated.item[0]);
  1767. return 0;
  1768. }
  1769. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1770. struct snd_ctl_elem_value *ucontrol)
  1771. {
  1772. int idx = mi2s_get_port_idx(kcontrol);
  1773. if (idx < 0)
  1774. return idx;
  1775. mi2s_rx_cfg[idx].sample_rate =
  1776. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1777. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1778. idx, mi2s_rx_cfg[idx].sample_rate,
  1779. ucontrol->value.enumerated.item[0]);
  1780. return 0;
  1781. }
  1782. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1783. struct snd_ctl_elem_value *ucontrol)
  1784. {
  1785. int idx = mi2s_get_port_idx(kcontrol);
  1786. if (idx < 0)
  1787. return idx;
  1788. ucontrol->value.enumerated.item[0] =
  1789. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  1790. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1791. idx, mi2s_tx_cfg[idx].sample_rate,
  1792. ucontrol->value.enumerated.item[0]);
  1793. return 0;
  1794. }
  1795. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1796. struct snd_ctl_elem_value *ucontrol)
  1797. {
  1798. int idx = mi2s_get_port_idx(kcontrol);
  1799. if (idx < 0)
  1800. return idx;
  1801. mi2s_tx_cfg[idx].sample_rate =
  1802. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1803. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1804. idx, mi2s_tx_cfg[idx].sample_rate,
  1805. ucontrol->value.enumerated.item[0]);
  1806. return 0;
  1807. }
  1808. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  1809. struct snd_ctl_elem_value *ucontrol)
  1810. {
  1811. int idx = mi2s_get_port_idx(kcontrol);
  1812. if (idx < 0)
  1813. return idx;
  1814. ucontrol->value.enumerated.item[0] =
  1815. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  1816. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1817. idx, mi2s_rx_cfg[idx].bit_format,
  1818. ucontrol->value.enumerated.item[0]);
  1819. return 0;
  1820. }
  1821. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  1822. struct snd_ctl_elem_value *ucontrol)
  1823. {
  1824. int idx = mi2s_get_port_idx(kcontrol);
  1825. if (idx < 0)
  1826. return idx;
  1827. mi2s_rx_cfg[idx].bit_format =
  1828. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1829. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1830. idx, mi2s_rx_cfg[idx].bit_format,
  1831. ucontrol->value.enumerated.item[0]);
  1832. return 0;
  1833. }
  1834. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  1835. struct snd_ctl_elem_value *ucontrol)
  1836. {
  1837. int idx = mi2s_get_port_idx(kcontrol);
  1838. if (idx < 0)
  1839. return idx;
  1840. ucontrol->value.enumerated.item[0] =
  1841. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  1842. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1843. idx, mi2s_tx_cfg[idx].bit_format,
  1844. ucontrol->value.enumerated.item[0]);
  1845. return 0;
  1846. }
  1847. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  1848. struct snd_ctl_elem_value *ucontrol)
  1849. {
  1850. int idx = mi2s_get_port_idx(kcontrol);
  1851. if (idx < 0)
  1852. return idx;
  1853. mi2s_tx_cfg[idx].bit_format =
  1854. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1855. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1856. idx, mi2s_tx_cfg[idx].bit_format,
  1857. ucontrol->value.enumerated.item[0]);
  1858. return 0;
  1859. }
  1860. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  1861. struct snd_ctl_elem_value *ucontrol)
  1862. {
  1863. int idx = mi2s_get_port_idx(kcontrol);
  1864. if (idx < 0)
  1865. return idx;
  1866. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1867. idx, mi2s_rx_cfg[idx].channels);
  1868. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  1869. return 0;
  1870. }
  1871. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  1872. struct snd_ctl_elem_value *ucontrol)
  1873. {
  1874. int idx = mi2s_get_port_idx(kcontrol);
  1875. if (idx < 0)
  1876. return idx;
  1877. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1878. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1879. idx, mi2s_rx_cfg[idx].channels);
  1880. return 1;
  1881. }
  1882. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  1883. struct snd_ctl_elem_value *ucontrol)
  1884. {
  1885. int idx = mi2s_get_port_idx(kcontrol);
  1886. if (idx < 0)
  1887. return idx;
  1888. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1889. idx, mi2s_tx_cfg[idx].channels);
  1890. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  1891. return 0;
  1892. }
  1893. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  1894. struct snd_ctl_elem_value *ucontrol)
  1895. {
  1896. int idx = mi2s_get_port_idx(kcontrol);
  1897. if (idx < 0)
  1898. return idx;
  1899. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1900. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1901. idx, mi2s_tx_cfg[idx].channels);
  1902. return 1;
  1903. }
  1904. static int msm_get_port_id(int be_id)
  1905. {
  1906. int afe_port_id = 0;
  1907. switch (be_id) {
  1908. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  1909. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  1910. break;
  1911. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  1912. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  1913. break;
  1914. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  1915. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  1916. break;
  1917. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  1918. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  1919. break;
  1920. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  1921. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  1922. break;
  1923. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  1924. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  1925. break;
  1926. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  1927. afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
  1928. break;
  1929. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  1930. afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
  1931. break;
  1932. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  1933. afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
  1934. break;
  1935. default:
  1936. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  1937. afe_port_id = -EINVAL;
  1938. }
  1939. return afe_port_id;
  1940. }
  1941. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  1942. {
  1943. u32 bit_per_sample = 0;
  1944. switch (bit_format) {
  1945. case SNDRV_PCM_FORMAT_S32_LE:
  1946. case SNDRV_PCM_FORMAT_S24_3LE:
  1947. case SNDRV_PCM_FORMAT_S24_LE:
  1948. bit_per_sample = 32;
  1949. break;
  1950. case SNDRV_PCM_FORMAT_S16_LE:
  1951. default:
  1952. bit_per_sample = 16;
  1953. break;
  1954. }
  1955. return bit_per_sample;
  1956. }
  1957. static void update_mi2s_clk_val(int dai_id, int stream)
  1958. {
  1959. u32 bit_per_sample = 0;
  1960. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  1961. bit_per_sample =
  1962. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  1963. mi2s_clk[dai_id].clk_freq_in_hz =
  1964. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  1965. } else {
  1966. bit_per_sample =
  1967. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  1968. mi2s_clk[dai_id].clk_freq_in_hz =
  1969. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  1970. }
  1971. }
  1972. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  1973. {
  1974. int ret = 0;
  1975. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1976. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  1977. int port_id = 0;
  1978. int index = cpu_dai->id;
  1979. port_id = msm_get_port_id(rtd->dai_link->id);
  1980. if (port_id < 0) {
  1981. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  1982. ret = port_id;
  1983. goto err;
  1984. }
  1985. if (enable) {
  1986. update_mi2s_clk_val(index, substream->stream);
  1987. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  1988. mi2s_clk[index].clk_freq_in_hz);
  1989. }
  1990. mi2s_clk[index].enable = enable;
  1991. ret = afe_set_lpass_clock_v2(port_id,
  1992. &mi2s_clk[index]);
  1993. if (ret < 0) {
  1994. dev_err(rtd->card->dev,
  1995. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  1996. __func__, port_id, ret);
  1997. goto err;
  1998. }
  1999. err:
  2000. return ret;
  2001. }
  2002. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  2003. {
  2004. int idx = 0;
  2005. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  2006. sizeof("WSA_CDC_DMA_RX_0")))
  2007. idx = WSA_CDC_DMA_RX_0;
  2008. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  2009. sizeof("WSA_CDC_DMA_RX_0")))
  2010. idx = WSA_CDC_DMA_RX_1;
  2011. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  2012. sizeof("RX_CDC_DMA_RX_0")))
  2013. idx = RX_CDC_DMA_RX_0;
  2014. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  2015. sizeof("RX_CDC_DMA_RX_1")))
  2016. idx = RX_CDC_DMA_RX_1;
  2017. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  2018. sizeof("RX_CDC_DMA_RX_2")))
  2019. idx = RX_CDC_DMA_RX_2;
  2020. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  2021. sizeof("RX_CDC_DMA_RX_3")))
  2022. idx = RX_CDC_DMA_RX_3;
  2023. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  2024. sizeof("RX_CDC_DMA_RX_5")))
  2025. idx = RX_CDC_DMA_RX_5;
  2026. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  2027. sizeof("WSA_CDC_DMA_TX_0")))
  2028. idx = WSA_CDC_DMA_TX_0;
  2029. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  2030. sizeof("WSA_CDC_DMA_TX_1")))
  2031. idx = WSA_CDC_DMA_TX_1;
  2032. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  2033. sizeof("WSA_CDC_DMA_TX_2")))
  2034. idx = WSA_CDC_DMA_TX_2;
  2035. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  2036. sizeof("TX_CDC_DMA_TX_0")))
  2037. idx = TX_CDC_DMA_TX_0;
  2038. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  2039. sizeof("TX_CDC_DMA_TX_3")))
  2040. idx = TX_CDC_DMA_TX_3;
  2041. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  2042. sizeof("TX_CDC_DMA_TX_4")))
  2043. idx = TX_CDC_DMA_TX_4;
  2044. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
  2045. sizeof("VA_CDC_DMA_TX_0")))
  2046. idx = VA_CDC_DMA_TX_0;
  2047. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
  2048. sizeof("VA_CDC_DMA_TX_1")))
  2049. idx = VA_CDC_DMA_TX_1;
  2050. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
  2051. sizeof("VA_CDC_DMA_TX_2")))
  2052. idx = VA_CDC_DMA_TX_2;
  2053. else {
  2054. pr_err("%s: unsupported channel: %s\n",
  2055. __func__, kcontrol->id.name);
  2056. return -EINVAL;
  2057. }
  2058. return idx;
  2059. }
  2060. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  2061. struct snd_ctl_elem_value *ucontrol)
  2062. {
  2063. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2064. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2065. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2066. return ch_num;
  2067. }
  2068. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  2069. cdc_dma_rx_cfg[ch_num].channels - 1);
  2070. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  2071. return 0;
  2072. }
  2073. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  2074. struct snd_ctl_elem_value *ucontrol)
  2075. {
  2076. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2077. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2078. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2079. return ch_num;
  2080. }
  2081. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  2082. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  2083. cdc_dma_rx_cfg[ch_num].channels);
  2084. return 1;
  2085. }
  2086. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  2087. struct snd_ctl_elem_value *ucontrol)
  2088. {
  2089. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2090. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2091. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2092. return ch_num;
  2093. }
  2094. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  2095. case SNDRV_PCM_FORMAT_S32_LE:
  2096. ucontrol->value.integer.value[0] = 3;
  2097. break;
  2098. case SNDRV_PCM_FORMAT_S24_3LE:
  2099. ucontrol->value.integer.value[0] = 2;
  2100. break;
  2101. case SNDRV_PCM_FORMAT_S24_LE:
  2102. ucontrol->value.integer.value[0] = 1;
  2103. break;
  2104. case SNDRV_PCM_FORMAT_S16_LE:
  2105. default:
  2106. ucontrol->value.integer.value[0] = 0;
  2107. break;
  2108. }
  2109. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  2110. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  2111. ucontrol->value.integer.value[0]);
  2112. return 0;
  2113. }
  2114. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  2115. struct snd_ctl_elem_value *ucontrol)
  2116. {
  2117. int rc = 0;
  2118. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2119. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2120. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2121. return ch_num;
  2122. }
  2123. switch (ucontrol->value.integer.value[0]) {
  2124. case 3:
  2125. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  2126. break;
  2127. case 2:
  2128. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2129. break;
  2130. case 1:
  2131. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2132. break;
  2133. case 0:
  2134. default:
  2135. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2136. break;
  2137. }
  2138. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  2139. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  2140. ucontrol->value.integer.value[0]);
  2141. return rc;
  2142. }
  2143. static int cdc_dma_get_sample_rate_val(int sample_rate)
  2144. {
  2145. int sample_rate_val = 0;
  2146. switch (sample_rate) {
  2147. case SAMPLING_RATE_8KHZ:
  2148. sample_rate_val = 0;
  2149. break;
  2150. case SAMPLING_RATE_11P025KHZ:
  2151. sample_rate_val = 1;
  2152. break;
  2153. case SAMPLING_RATE_16KHZ:
  2154. sample_rate_val = 2;
  2155. break;
  2156. case SAMPLING_RATE_22P05KHZ:
  2157. sample_rate_val = 3;
  2158. break;
  2159. case SAMPLING_RATE_32KHZ:
  2160. sample_rate_val = 4;
  2161. break;
  2162. case SAMPLING_RATE_44P1KHZ:
  2163. sample_rate_val = 5;
  2164. break;
  2165. case SAMPLING_RATE_48KHZ:
  2166. sample_rate_val = 6;
  2167. break;
  2168. case SAMPLING_RATE_88P2KHZ:
  2169. sample_rate_val = 7;
  2170. break;
  2171. case SAMPLING_RATE_96KHZ:
  2172. sample_rate_val = 8;
  2173. break;
  2174. case SAMPLING_RATE_176P4KHZ:
  2175. sample_rate_val = 9;
  2176. break;
  2177. case SAMPLING_RATE_192KHZ:
  2178. sample_rate_val = 10;
  2179. break;
  2180. case SAMPLING_RATE_352P8KHZ:
  2181. sample_rate_val = 11;
  2182. break;
  2183. case SAMPLING_RATE_384KHZ:
  2184. sample_rate_val = 12;
  2185. break;
  2186. default:
  2187. sample_rate_val = 6;
  2188. break;
  2189. }
  2190. return sample_rate_val;
  2191. }
  2192. static int cdc_dma_get_sample_rate(int value)
  2193. {
  2194. int sample_rate = 0;
  2195. switch (value) {
  2196. case 0:
  2197. sample_rate = SAMPLING_RATE_8KHZ;
  2198. break;
  2199. case 1:
  2200. sample_rate = SAMPLING_RATE_11P025KHZ;
  2201. break;
  2202. case 2:
  2203. sample_rate = SAMPLING_RATE_16KHZ;
  2204. break;
  2205. case 3:
  2206. sample_rate = SAMPLING_RATE_22P05KHZ;
  2207. break;
  2208. case 4:
  2209. sample_rate = SAMPLING_RATE_32KHZ;
  2210. break;
  2211. case 5:
  2212. sample_rate = SAMPLING_RATE_44P1KHZ;
  2213. break;
  2214. case 6:
  2215. sample_rate = SAMPLING_RATE_48KHZ;
  2216. break;
  2217. case 7:
  2218. sample_rate = SAMPLING_RATE_88P2KHZ;
  2219. break;
  2220. case 8:
  2221. sample_rate = SAMPLING_RATE_96KHZ;
  2222. break;
  2223. case 9:
  2224. sample_rate = SAMPLING_RATE_176P4KHZ;
  2225. break;
  2226. case 10:
  2227. sample_rate = SAMPLING_RATE_192KHZ;
  2228. break;
  2229. case 11:
  2230. sample_rate = SAMPLING_RATE_352P8KHZ;
  2231. break;
  2232. case 12:
  2233. sample_rate = SAMPLING_RATE_384KHZ;
  2234. break;
  2235. default:
  2236. sample_rate = SAMPLING_RATE_48KHZ;
  2237. break;
  2238. }
  2239. return sample_rate;
  2240. }
  2241. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2242. struct snd_ctl_elem_value *ucontrol)
  2243. {
  2244. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2245. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2246. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2247. return ch_num;
  2248. }
  2249. ucontrol->value.enumerated.item[0] =
  2250. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  2251. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  2252. cdc_dma_rx_cfg[ch_num].sample_rate);
  2253. return 0;
  2254. }
  2255. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2256. struct snd_ctl_elem_value *ucontrol)
  2257. {
  2258. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2259. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2260. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2261. return ch_num;
  2262. }
  2263. cdc_dma_rx_cfg[ch_num].sample_rate =
  2264. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2265. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  2266. __func__, ucontrol->value.enumerated.item[0],
  2267. cdc_dma_rx_cfg[ch_num].sample_rate);
  2268. return 0;
  2269. }
  2270. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  2271. struct snd_ctl_elem_value *ucontrol)
  2272. {
  2273. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2274. if (ch_num < 0) {
  2275. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2276. return ch_num;
  2277. }
  2278. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  2279. cdc_dma_tx_cfg[ch_num].channels);
  2280. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  2281. return 0;
  2282. }
  2283. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  2284. struct snd_ctl_elem_value *ucontrol)
  2285. {
  2286. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2287. if (ch_num < 0) {
  2288. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2289. return ch_num;
  2290. }
  2291. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  2292. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  2293. cdc_dma_tx_cfg[ch_num].channels);
  2294. return 1;
  2295. }
  2296. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2297. struct snd_ctl_elem_value *ucontrol)
  2298. {
  2299. int sample_rate_val;
  2300. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2301. if (ch_num < 0) {
  2302. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2303. return ch_num;
  2304. }
  2305. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  2306. case SAMPLING_RATE_384KHZ:
  2307. sample_rate_val = 12;
  2308. break;
  2309. case SAMPLING_RATE_352P8KHZ:
  2310. sample_rate_val = 11;
  2311. break;
  2312. case SAMPLING_RATE_192KHZ:
  2313. sample_rate_val = 10;
  2314. break;
  2315. case SAMPLING_RATE_176P4KHZ:
  2316. sample_rate_val = 9;
  2317. break;
  2318. case SAMPLING_RATE_96KHZ:
  2319. sample_rate_val = 8;
  2320. break;
  2321. case SAMPLING_RATE_88P2KHZ:
  2322. sample_rate_val = 7;
  2323. break;
  2324. case SAMPLING_RATE_48KHZ:
  2325. sample_rate_val = 6;
  2326. break;
  2327. case SAMPLING_RATE_44P1KHZ:
  2328. sample_rate_val = 5;
  2329. break;
  2330. case SAMPLING_RATE_32KHZ:
  2331. sample_rate_val = 4;
  2332. break;
  2333. case SAMPLING_RATE_22P05KHZ:
  2334. sample_rate_val = 3;
  2335. break;
  2336. case SAMPLING_RATE_16KHZ:
  2337. sample_rate_val = 2;
  2338. break;
  2339. case SAMPLING_RATE_11P025KHZ:
  2340. sample_rate_val = 1;
  2341. break;
  2342. case SAMPLING_RATE_8KHZ:
  2343. sample_rate_val = 0;
  2344. break;
  2345. default:
  2346. sample_rate_val = 6;
  2347. break;
  2348. }
  2349. ucontrol->value.integer.value[0] = sample_rate_val;
  2350. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  2351. cdc_dma_tx_cfg[ch_num].sample_rate);
  2352. return 0;
  2353. }
  2354. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2355. struct snd_ctl_elem_value *ucontrol)
  2356. {
  2357. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2358. if (ch_num < 0) {
  2359. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2360. return ch_num;
  2361. }
  2362. switch (ucontrol->value.integer.value[0]) {
  2363. case 12:
  2364. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  2365. break;
  2366. case 11:
  2367. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  2368. break;
  2369. case 10:
  2370. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  2371. break;
  2372. case 9:
  2373. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  2374. break;
  2375. case 8:
  2376. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  2377. break;
  2378. case 7:
  2379. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  2380. break;
  2381. case 6:
  2382. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  2383. break;
  2384. case 5:
  2385. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  2386. break;
  2387. case 4:
  2388. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  2389. break;
  2390. case 3:
  2391. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  2392. break;
  2393. case 2:
  2394. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  2395. break;
  2396. case 1:
  2397. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  2398. break;
  2399. case 0:
  2400. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  2401. break;
  2402. default:
  2403. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  2404. break;
  2405. }
  2406. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  2407. __func__, ucontrol->value.integer.value[0],
  2408. cdc_dma_tx_cfg[ch_num].sample_rate);
  2409. return 0;
  2410. }
  2411. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  2412. struct snd_ctl_elem_value *ucontrol)
  2413. {
  2414. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2415. if (ch_num < 0) {
  2416. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2417. return ch_num;
  2418. }
  2419. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  2420. case SNDRV_PCM_FORMAT_S32_LE:
  2421. ucontrol->value.integer.value[0] = 3;
  2422. break;
  2423. case SNDRV_PCM_FORMAT_S24_3LE:
  2424. ucontrol->value.integer.value[0] = 2;
  2425. break;
  2426. case SNDRV_PCM_FORMAT_S24_LE:
  2427. ucontrol->value.integer.value[0] = 1;
  2428. break;
  2429. case SNDRV_PCM_FORMAT_S16_LE:
  2430. default:
  2431. ucontrol->value.integer.value[0] = 0;
  2432. break;
  2433. }
  2434. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  2435. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  2436. ucontrol->value.integer.value[0]);
  2437. return 0;
  2438. }
  2439. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  2440. struct snd_ctl_elem_value *ucontrol)
  2441. {
  2442. int rc = 0;
  2443. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2444. if (ch_num < 0) {
  2445. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2446. return ch_num;
  2447. }
  2448. switch (ucontrol->value.integer.value[0]) {
  2449. case 3:
  2450. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  2451. break;
  2452. case 2:
  2453. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2454. break;
  2455. case 1:
  2456. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2457. break;
  2458. case 0:
  2459. default:
  2460. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2461. break;
  2462. }
  2463. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  2464. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  2465. ucontrol->value.integer.value[0]);
  2466. return rc;
  2467. }
  2468. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  2469. {
  2470. int idx = 0;
  2471. switch (be_id) {
  2472. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  2473. idx = WSA_CDC_DMA_RX_0;
  2474. break;
  2475. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  2476. idx = WSA_CDC_DMA_TX_0;
  2477. break;
  2478. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  2479. idx = WSA_CDC_DMA_RX_1;
  2480. break;
  2481. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  2482. idx = WSA_CDC_DMA_TX_1;
  2483. break;
  2484. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  2485. idx = WSA_CDC_DMA_TX_2;
  2486. break;
  2487. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  2488. idx = RX_CDC_DMA_RX_0;
  2489. break;
  2490. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  2491. idx = RX_CDC_DMA_RX_1;
  2492. break;
  2493. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  2494. idx = RX_CDC_DMA_RX_2;
  2495. break;
  2496. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  2497. idx = RX_CDC_DMA_RX_3;
  2498. break;
  2499. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  2500. idx = RX_CDC_DMA_RX_5;
  2501. break;
  2502. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  2503. idx = TX_CDC_DMA_TX_0;
  2504. break;
  2505. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  2506. idx = TX_CDC_DMA_TX_3;
  2507. break;
  2508. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  2509. idx = TX_CDC_DMA_TX_4;
  2510. break;
  2511. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  2512. idx = VA_CDC_DMA_TX_0;
  2513. break;
  2514. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  2515. idx = VA_CDC_DMA_TX_1;
  2516. break;
  2517. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  2518. idx = VA_CDC_DMA_TX_2;
  2519. break;
  2520. default:
  2521. idx = RX_CDC_DMA_RX_0;
  2522. break;
  2523. }
  2524. return idx;
  2525. }
  2526. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  2527. struct snd_ctl_elem_value *ucontrol)
  2528. {
  2529. /*
  2530. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  2531. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  2532. * value.
  2533. */
  2534. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  2535. case SAMPLING_RATE_96KHZ:
  2536. ucontrol->value.integer.value[0] = 5;
  2537. break;
  2538. case SAMPLING_RATE_88P2KHZ:
  2539. ucontrol->value.integer.value[0] = 4;
  2540. break;
  2541. case SAMPLING_RATE_48KHZ:
  2542. ucontrol->value.integer.value[0] = 3;
  2543. break;
  2544. case SAMPLING_RATE_44P1KHZ:
  2545. ucontrol->value.integer.value[0] = 2;
  2546. break;
  2547. case SAMPLING_RATE_16KHZ:
  2548. ucontrol->value.integer.value[0] = 1;
  2549. break;
  2550. case SAMPLING_RATE_8KHZ:
  2551. default:
  2552. ucontrol->value.integer.value[0] = 0;
  2553. break;
  2554. }
  2555. pr_debug("%s: sample rate = %d\n", __func__,
  2556. slim_rx_cfg[SLIM_RX_7].sample_rate);
  2557. return 0;
  2558. }
  2559. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  2560. struct snd_ctl_elem_value *ucontrol)
  2561. {
  2562. switch (ucontrol->value.integer.value[0]) {
  2563. case 1:
  2564. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2565. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2566. break;
  2567. case 2:
  2568. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2569. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2570. break;
  2571. case 3:
  2572. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2573. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2574. break;
  2575. case 4:
  2576. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2577. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2578. break;
  2579. case 5:
  2580. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2581. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2582. break;
  2583. case 0:
  2584. default:
  2585. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2586. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2587. break;
  2588. }
  2589. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  2590. __func__,
  2591. slim_rx_cfg[SLIM_RX_7].sample_rate,
  2592. slim_tx_cfg[SLIM_TX_7].sample_rate,
  2593. ucontrol->value.enumerated.item[0]);
  2594. return 0;
  2595. }
  2596. static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
  2597. struct snd_ctl_elem_value *ucontrol)
  2598. {
  2599. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  2600. case SAMPLING_RATE_96KHZ:
  2601. ucontrol->value.integer.value[0] = 5;
  2602. break;
  2603. case SAMPLING_RATE_88P2KHZ:
  2604. ucontrol->value.integer.value[0] = 4;
  2605. break;
  2606. case SAMPLING_RATE_48KHZ:
  2607. ucontrol->value.integer.value[0] = 3;
  2608. break;
  2609. case SAMPLING_RATE_44P1KHZ:
  2610. ucontrol->value.integer.value[0] = 2;
  2611. break;
  2612. case SAMPLING_RATE_16KHZ:
  2613. ucontrol->value.integer.value[0] = 1;
  2614. break;
  2615. case SAMPLING_RATE_8KHZ:
  2616. default:
  2617. ucontrol->value.integer.value[0] = 0;
  2618. break;
  2619. }
  2620. pr_debug("%s: sample rate rx = %d\n", __func__,
  2621. slim_rx_cfg[SLIM_RX_7].sample_rate);
  2622. return 0;
  2623. }
  2624. static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
  2625. struct snd_ctl_elem_value *ucontrol)
  2626. {
  2627. switch (ucontrol->value.integer.value[0]) {
  2628. case 1:
  2629. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2630. break;
  2631. case 2:
  2632. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2633. break;
  2634. case 3:
  2635. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2636. break;
  2637. case 4:
  2638. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2639. break;
  2640. case 5:
  2641. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2642. break;
  2643. case 0:
  2644. default:
  2645. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2646. break;
  2647. }
  2648. pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
  2649. __func__,
  2650. slim_rx_cfg[SLIM_RX_7].sample_rate,
  2651. ucontrol->value.enumerated.item[0]);
  2652. return 0;
  2653. }
  2654. static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
  2655. struct snd_ctl_elem_value *ucontrol)
  2656. {
  2657. switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
  2658. case SAMPLING_RATE_96KHZ:
  2659. ucontrol->value.integer.value[0] = 5;
  2660. break;
  2661. case SAMPLING_RATE_88P2KHZ:
  2662. ucontrol->value.integer.value[0] = 4;
  2663. break;
  2664. case SAMPLING_RATE_48KHZ:
  2665. ucontrol->value.integer.value[0] = 3;
  2666. break;
  2667. case SAMPLING_RATE_44P1KHZ:
  2668. ucontrol->value.integer.value[0] = 2;
  2669. break;
  2670. case SAMPLING_RATE_16KHZ:
  2671. ucontrol->value.integer.value[0] = 1;
  2672. break;
  2673. case SAMPLING_RATE_8KHZ:
  2674. default:
  2675. ucontrol->value.integer.value[0] = 0;
  2676. break;
  2677. }
  2678. pr_debug("%s: sample rate tx = %d\n", __func__,
  2679. slim_tx_cfg[SLIM_TX_7].sample_rate);
  2680. return 0;
  2681. }
  2682. static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
  2683. struct snd_ctl_elem_value *ucontrol)
  2684. {
  2685. switch (ucontrol->value.integer.value[0]) {
  2686. case 1:
  2687. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2688. break;
  2689. case 2:
  2690. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2691. break;
  2692. case 3:
  2693. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2694. break;
  2695. case 4:
  2696. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2697. break;
  2698. case 5:
  2699. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2700. break;
  2701. case 0:
  2702. default:
  2703. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2704. break;
  2705. }
  2706. pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
  2707. __func__,
  2708. slim_tx_cfg[SLIM_TX_7].sample_rate,
  2709. ucontrol->value.enumerated.item[0]);
  2710. return 0;
  2711. }
  2712. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  2713. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  2714. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2715. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  2716. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2717. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  2718. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2719. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  2720. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2721. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  2722. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2723. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  2724. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2725. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  2726. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2727. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  2728. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2729. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  2730. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2731. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  2732. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2733. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  2734. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2735. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  2736. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2737. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  2738. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2739. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
  2740. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2741. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
  2742. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2743. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
  2744. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2745. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  2746. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2747. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  2748. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2749. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  2750. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2751. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  2752. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2753. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  2754. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2755. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  2756. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2757. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  2758. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2759. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  2760. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2761. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  2762. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2763. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  2764. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2765. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  2766. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2767. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  2768. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2769. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
  2770. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2771. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
  2772. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2773. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
  2774. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2775. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  2776. wsa_cdc_dma_rx_0_sample_rate,
  2777. cdc_dma_rx_sample_rate_get,
  2778. cdc_dma_rx_sample_rate_put),
  2779. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  2780. wsa_cdc_dma_rx_1_sample_rate,
  2781. cdc_dma_rx_sample_rate_get,
  2782. cdc_dma_rx_sample_rate_put),
  2783. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  2784. rx_cdc_dma_rx_0_sample_rate,
  2785. cdc_dma_rx_sample_rate_get,
  2786. cdc_dma_rx_sample_rate_put),
  2787. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  2788. rx_cdc_dma_rx_1_sample_rate,
  2789. cdc_dma_rx_sample_rate_get,
  2790. cdc_dma_rx_sample_rate_put),
  2791. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  2792. rx_cdc_dma_rx_2_sample_rate,
  2793. cdc_dma_rx_sample_rate_get,
  2794. cdc_dma_rx_sample_rate_put),
  2795. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  2796. rx_cdc_dma_rx_3_sample_rate,
  2797. cdc_dma_rx_sample_rate_get,
  2798. cdc_dma_rx_sample_rate_put),
  2799. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  2800. rx_cdc_dma_rx_5_sample_rate,
  2801. cdc_dma_rx_sample_rate_get,
  2802. cdc_dma_rx_sample_rate_put),
  2803. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  2804. wsa_cdc_dma_tx_0_sample_rate,
  2805. cdc_dma_tx_sample_rate_get,
  2806. cdc_dma_tx_sample_rate_put),
  2807. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  2808. wsa_cdc_dma_tx_1_sample_rate,
  2809. cdc_dma_tx_sample_rate_get,
  2810. cdc_dma_tx_sample_rate_put),
  2811. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  2812. wsa_cdc_dma_tx_2_sample_rate,
  2813. cdc_dma_tx_sample_rate_get,
  2814. cdc_dma_tx_sample_rate_put),
  2815. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  2816. tx_cdc_dma_tx_0_sample_rate,
  2817. cdc_dma_tx_sample_rate_get,
  2818. cdc_dma_tx_sample_rate_put),
  2819. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  2820. tx_cdc_dma_tx_3_sample_rate,
  2821. cdc_dma_tx_sample_rate_get,
  2822. cdc_dma_tx_sample_rate_put),
  2823. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  2824. tx_cdc_dma_tx_4_sample_rate,
  2825. cdc_dma_tx_sample_rate_get,
  2826. cdc_dma_tx_sample_rate_put),
  2827. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
  2828. va_cdc_dma_tx_0_sample_rate,
  2829. cdc_dma_tx_sample_rate_get,
  2830. cdc_dma_tx_sample_rate_put),
  2831. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
  2832. va_cdc_dma_tx_1_sample_rate,
  2833. cdc_dma_tx_sample_rate_get,
  2834. cdc_dma_tx_sample_rate_put),
  2835. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
  2836. va_cdc_dma_tx_2_sample_rate,
  2837. cdc_dma_tx_sample_rate_get,
  2838. cdc_dma_tx_sample_rate_put),
  2839. };
  2840. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  2841. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  2842. usb_audio_rx_sample_rate_get,
  2843. usb_audio_rx_sample_rate_put),
  2844. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  2845. usb_audio_tx_sample_rate_get,
  2846. usb_audio_tx_sample_rate_put),
  2847. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2848. tdm_rx_sample_rate_get,
  2849. tdm_rx_sample_rate_put),
  2850. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2851. tdm_rx_sample_rate_get,
  2852. tdm_rx_sample_rate_put),
  2853. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2854. tdm_rx_sample_rate_get,
  2855. tdm_rx_sample_rate_put),
  2856. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2857. tdm_tx_sample_rate_get,
  2858. tdm_tx_sample_rate_put),
  2859. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2860. tdm_tx_sample_rate_get,
  2861. tdm_tx_sample_rate_put),
  2862. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2863. tdm_tx_sample_rate_get,
  2864. tdm_tx_sample_rate_put),
  2865. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2866. aux_pcm_rx_sample_rate_get,
  2867. aux_pcm_rx_sample_rate_put),
  2868. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  2869. aux_pcm_rx_sample_rate_get,
  2870. aux_pcm_rx_sample_rate_put),
  2871. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  2872. aux_pcm_rx_sample_rate_get,
  2873. aux_pcm_rx_sample_rate_put),
  2874. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2875. aux_pcm_tx_sample_rate_get,
  2876. aux_pcm_tx_sample_rate_put),
  2877. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  2878. aux_pcm_tx_sample_rate_get,
  2879. aux_pcm_tx_sample_rate_put),
  2880. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  2881. aux_pcm_tx_sample_rate_get,
  2882. aux_pcm_tx_sample_rate_put),
  2883. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  2884. mi2s_rx_sample_rate_get,
  2885. mi2s_rx_sample_rate_put),
  2886. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  2887. mi2s_rx_sample_rate_get,
  2888. mi2s_rx_sample_rate_put),
  2889. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  2890. mi2s_rx_sample_rate_get,
  2891. mi2s_rx_sample_rate_put),
  2892. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  2893. mi2s_tx_sample_rate_get,
  2894. mi2s_tx_sample_rate_put),
  2895. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  2896. mi2s_tx_sample_rate_get,
  2897. mi2s_tx_sample_rate_put),
  2898. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  2899. mi2s_tx_sample_rate_get,
  2900. mi2s_tx_sample_rate_put),
  2901. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  2902. usb_audio_rx_format_get, usb_audio_rx_format_put),
  2903. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  2904. usb_audio_tx_format_get, usb_audio_tx_format_put),
  2905. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  2906. tdm_rx_format_get,
  2907. tdm_rx_format_put),
  2908. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  2909. tdm_rx_format_get,
  2910. tdm_rx_format_put),
  2911. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  2912. tdm_rx_format_get,
  2913. tdm_rx_format_put),
  2914. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  2915. tdm_tx_format_get,
  2916. tdm_tx_format_put),
  2917. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  2918. tdm_tx_format_get,
  2919. tdm_tx_format_put),
  2920. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  2921. tdm_tx_format_get,
  2922. tdm_tx_format_put),
  2923. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2924. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2925. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  2926. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2927. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  2928. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2929. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2930. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2931. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  2932. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2933. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  2934. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2935. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  2936. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2937. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  2938. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2939. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  2940. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2941. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  2942. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2943. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  2944. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2945. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  2946. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2947. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  2948. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  2949. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  2950. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  2951. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  2952. proxy_rx_ch_get, proxy_rx_ch_put),
  2953. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  2954. tdm_rx_ch_get,
  2955. tdm_rx_ch_put),
  2956. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  2957. tdm_rx_ch_get,
  2958. tdm_rx_ch_put),
  2959. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  2960. tdm_rx_ch_get,
  2961. tdm_rx_ch_put),
  2962. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  2963. tdm_tx_ch_get,
  2964. tdm_tx_ch_put),
  2965. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  2966. tdm_tx_ch_get,
  2967. tdm_tx_ch_put),
  2968. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  2969. tdm_tx_ch_get,
  2970. tdm_tx_ch_put),
  2971. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  2972. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2973. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  2974. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2975. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  2976. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2977. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  2978. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2979. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  2980. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2981. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  2982. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2983. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  2984. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  2985. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  2986. ext_disp_rx_format_get, ext_disp_rx_format_put),
  2987. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  2988. ext_disp_rx_sample_rate_get,
  2989. ext_disp_rx_sample_rate_put),
  2990. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  2991. msm_bt_sample_rate_get,
  2992. msm_bt_sample_rate_put),
  2993. SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
  2994. msm_bt_sample_rate_rx_get,
  2995. msm_bt_sample_rate_rx_put),
  2996. SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
  2997. msm_bt_sample_rate_tx_get,
  2998. msm_bt_sample_rate_tx_put),
  2999. SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
  3000. afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
  3001. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  3002. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  3003. };
  3004. static const struct snd_kcontrol_new msm_snd_controls[] = {
  3005. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  3006. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3007. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  3008. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3009. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  3010. aux_pcm_rx_sample_rate_get,
  3011. aux_pcm_rx_sample_rate_put),
  3012. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  3013. aux_pcm_tx_sample_rate_get,
  3014. aux_pcm_tx_sample_rate_put),
  3015. };
  3016. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  3017. {
  3018. int idx;
  3019. switch (be_id) {
  3020. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3021. idx = EXT_DISP_RX_IDX_DP;
  3022. break;
  3023. default:
  3024. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  3025. idx = -EINVAL;
  3026. break;
  3027. }
  3028. return idx;
  3029. }
  3030. static int kona_send_island_va_config(int32_t be_id)
  3031. {
  3032. int rc = 0;
  3033. int port_id = 0xFFFF;
  3034. port_id = msm_get_port_id(be_id);
  3035. if (port_id < 0) {
  3036. pr_err("%s: Invalid island interface, be_id: %d\n",
  3037. __func__, be_id);
  3038. rc = -EINVAL;
  3039. } else {
  3040. /*
  3041. * send island mode config
  3042. * This should be the first configuration
  3043. */
  3044. rc = afe_send_port_island_mode(port_id);
  3045. if (rc)
  3046. pr_err("%s: afe send island mode failed %d\n",
  3047. __func__, rc);
  3048. }
  3049. return rc;
  3050. }
  3051. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3052. struct snd_pcm_hw_params *params)
  3053. {
  3054. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3055. struct snd_interval *rate = hw_param_interval(params,
  3056. SNDRV_PCM_HW_PARAM_RATE);
  3057. struct snd_interval *channels = hw_param_interval(params,
  3058. SNDRV_PCM_HW_PARAM_CHANNELS);
  3059. int idx = 0, rc = 0;
  3060. pr_debug("%s: format = %d, rate = %d\n",
  3061. __func__, params_format(params), params_rate(params));
  3062. switch (dai_link->id) {
  3063. case MSM_BACKEND_DAI_USB_RX:
  3064. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3065. usb_rx_cfg.bit_format);
  3066. rate->min = rate->max = usb_rx_cfg.sample_rate;
  3067. channels->min = channels->max = usb_rx_cfg.channels;
  3068. break;
  3069. case MSM_BACKEND_DAI_USB_TX:
  3070. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3071. usb_tx_cfg.bit_format);
  3072. rate->min = rate->max = usb_tx_cfg.sample_rate;
  3073. channels->min = channels->max = usb_tx_cfg.channels;
  3074. break;
  3075. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3076. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  3077. if (idx < 0) {
  3078. pr_err("%s: Incorrect ext disp idx %d\n",
  3079. __func__, idx);
  3080. rc = idx;
  3081. goto done;
  3082. }
  3083. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3084. ext_disp_rx_cfg[idx].bit_format);
  3085. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  3086. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  3087. break;
  3088. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3089. channels->min = channels->max = proxy_rx_cfg.channels;
  3090. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3091. break;
  3092. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3093. channels->min = channels->max =
  3094. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3095. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3096. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3097. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3098. break;
  3099. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3100. channels->min = channels->max =
  3101. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3102. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3103. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3104. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3105. break;
  3106. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3107. channels->min = channels->max =
  3108. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3109. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3110. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3111. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3112. break;
  3113. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3114. channels->min = channels->max =
  3115. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3116. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3117. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3118. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3119. break;
  3120. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3121. channels->min = channels->max =
  3122. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3123. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3124. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3125. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3126. break;
  3127. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3128. channels->min = channels->max =
  3129. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3130. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3131. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3132. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3133. break;
  3134. case MSM_BACKEND_DAI_AUXPCM_RX:
  3135. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3136. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3137. rate->min = rate->max =
  3138. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3139. channels->min = channels->max =
  3140. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3141. break;
  3142. case MSM_BACKEND_DAI_AUXPCM_TX:
  3143. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3144. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3145. rate->min = rate->max =
  3146. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3147. channels->min = channels->max =
  3148. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3149. break;
  3150. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3151. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3152. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3153. rate->min = rate->max =
  3154. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3155. channels->min = channels->max =
  3156. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3157. break;
  3158. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3159. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3160. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3161. rate->min = rate->max =
  3162. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3163. channels->min = channels->max =
  3164. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3165. break;
  3166. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3167. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3168. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3169. rate->min = rate->max =
  3170. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3171. channels->min = channels->max =
  3172. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3173. break;
  3174. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3175. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3176. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3177. rate->min = rate->max =
  3178. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3179. channels->min = channels->max =
  3180. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3181. break;
  3182. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3183. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3184. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  3185. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  3186. channels->min = channels->max =
  3187. mi2s_rx_cfg[PRIM_MI2S].channels;
  3188. break;
  3189. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3190. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3191. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  3192. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  3193. channels->min = channels->max =
  3194. mi2s_tx_cfg[PRIM_MI2S].channels;
  3195. break;
  3196. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3197. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3198. mi2s_rx_cfg[SEC_MI2S].bit_format);
  3199. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  3200. channels->min = channels->max =
  3201. mi2s_rx_cfg[SEC_MI2S].channels;
  3202. break;
  3203. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3204. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3205. mi2s_tx_cfg[SEC_MI2S].bit_format);
  3206. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  3207. channels->min = channels->max =
  3208. mi2s_tx_cfg[SEC_MI2S].channels;
  3209. break;
  3210. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  3211. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3212. mi2s_rx_cfg[TERT_MI2S].bit_format);
  3213. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  3214. channels->min = channels->max =
  3215. mi2s_rx_cfg[TERT_MI2S].channels;
  3216. break;
  3217. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  3218. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3219. mi2s_tx_cfg[TERT_MI2S].bit_format);
  3220. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  3221. channels->min = channels->max =
  3222. mi2s_tx_cfg[TERT_MI2S].channels;
  3223. break;
  3224. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3225. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3226. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3227. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3228. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3229. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3230. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3231. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3232. cdc_dma_rx_cfg[idx].bit_format);
  3233. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  3234. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  3235. break;
  3236. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3237. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3238. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3239. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3240. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3241. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3242. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3243. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  3244. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3245. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3246. cdc_dma_tx_cfg[idx].bit_format);
  3247. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  3248. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  3249. break;
  3250. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3251. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3252. SNDRV_PCM_FORMAT_S32_LE);
  3253. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3254. channels->min = channels->max = msm_vi_feed_tx_ch;
  3255. break;
  3256. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3257. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3258. slim_rx_cfg[SLIM_RX_7].bit_format);
  3259. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3260. channels->min = channels->max =
  3261. slim_rx_cfg[SLIM_RX_7].channels;
  3262. break;
  3263. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3264. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3265. channels->min = channels->max =
  3266. slim_tx_cfg[SLIM_TX_7].channels;
  3267. break;
  3268. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3269. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3270. channels->min = channels->max =
  3271. slim_tx_cfg[SLIM_TX_8].channels;
  3272. break;
  3273. case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
  3274. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3275. afe_loopback_tx_cfg[idx].bit_format);
  3276. rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
  3277. channels->min = channels->max =
  3278. afe_loopback_tx_cfg[idx].channels;
  3279. break;
  3280. default:
  3281. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3282. break;
  3283. }
  3284. done:
  3285. return rc;
  3286. }
  3287. static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component, bool active)
  3288. {
  3289. struct snd_soc_card *card = component->card;
  3290. struct msm_asoc_mach_data *pdata =
  3291. snd_soc_card_get_drvdata(card);
  3292. if (!pdata->fsa_handle)
  3293. return false;
  3294. return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
  3295. }
  3296. static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
  3297. {
  3298. int value = 0;
  3299. bool ret = false;
  3300. struct snd_soc_card *card;
  3301. struct msm_asoc_mach_data *pdata;
  3302. if (!component) {
  3303. pr_err("%s component is NULL\n", __func__);
  3304. return false;
  3305. }
  3306. card = component->card;
  3307. pdata = snd_soc_card_get_drvdata(card);
  3308. if (!pdata)
  3309. return false;
  3310. if (wcd_mbhc_cfg.enable_usbc_analog)
  3311. return msm_usbc_swap_gnd_mic(component, active);
  3312. /* if usbc is not defined, swap using us_euro_gpio_p */
  3313. if (pdata->us_euro_gpio_p) {
  3314. value = msm_cdc_pinctrl_get_state(
  3315. pdata->us_euro_gpio_p);
  3316. if (value)
  3317. msm_cdc_pinctrl_select_sleep_state(
  3318. pdata->us_euro_gpio_p);
  3319. else
  3320. msm_cdc_pinctrl_select_active_state(
  3321. pdata->us_euro_gpio_p);
  3322. dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
  3323. __func__, value, !value);
  3324. ret = true;
  3325. }
  3326. return ret;
  3327. }
  3328. static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  3329. struct snd_pcm_hw_params *params)
  3330. {
  3331. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3332. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3333. int ret = 0;
  3334. int slot_width = 32;
  3335. int channels, slots;
  3336. unsigned int slot_mask, rate, clk_freq;
  3337. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  3338. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  3339. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  3340. switch (cpu_dai->id) {
  3341. case AFE_PORT_ID_PRIMARY_TDM_RX:
  3342. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3343. break;
  3344. case AFE_PORT_ID_SECONDARY_TDM_RX:
  3345. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3346. break;
  3347. case AFE_PORT_ID_TERTIARY_TDM_RX:
  3348. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3349. break;
  3350. case AFE_PORT_ID_PRIMARY_TDM_TX:
  3351. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3352. break;
  3353. case AFE_PORT_ID_SECONDARY_TDM_TX:
  3354. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3355. break;
  3356. case AFE_PORT_ID_TERTIARY_TDM_TX:
  3357. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3358. break;
  3359. default:
  3360. pr_err("%s: dai id 0x%x not supported\n",
  3361. __func__, cpu_dai->id);
  3362. return -EINVAL;
  3363. }
  3364. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3365. /*2 slot config - bits 0 and 1 set for the first two slots */
  3366. slot_mask = 0x0000FFFF >> (16 - slots);
  3367. channels = slots;
  3368. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  3369. __func__, slot_width, slots);
  3370. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  3371. slots, slot_width);
  3372. if (ret < 0) {
  3373. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  3374. __func__, ret);
  3375. goto end;
  3376. }
  3377. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3378. 0, NULL, channels, slot_offset);
  3379. if (ret < 0) {
  3380. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  3381. __func__, ret);
  3382. goto end;
  3383. }
  3384. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  3385. /*2 slot config - bits 0 and 1 set for the first two slots */
  3386. slot_mask = 0x0000FFFF >> (16 - slots);
  3387. channels = slots;
  3388. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  3389. __func__, slot_width, slots);
  3390. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  3391. slots, slot_width);
  3392. if (ret < 0) {
  3393. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  3394. __func__, ret);
  3395. goto end;
  3396. }
  3397. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3398. channels, slot_offset, 0, NULL);
  3399. if (ret < 0) {
  3400. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  3401. __func__, ret);
  3402. goto end;
  3403. }
  3404. } else {
  3405. ret = -EINVAL;
  3406. pr_err("%s: invalid use case, err:%d\n",
  3407. __func__, ret);
  3408. goto end;
  3409. }
  3410. rate = params_rate(params);
  3411. clk_freq = rate * slot_width * slots;
  3412. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  3413. if (ret < 0)
  3414. pr_err("%s: failed to set tdm clk, err:%d\n",
  3415. __func__, ret);
  3416. end:
  3417. return ret;
  3418. }
  3419. static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
  3420. {
  3421. int ret = 0;
  3422. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3423. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3424. switch (dai_link->id) {
  3425. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3426. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3427. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  3428. ret = kona_send_island_va_config(dai_link->id);
  3429. if (ret)
  3430. pr_err("%s: send island va cfg failed, err: %d\n",
  3431. __func__, ret);
  3432. break;
  3433. }
  3434. return ret;
  3435. }
  3436. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  3437. struct snd_pcm_hw_params *params)
  3438. {
  3439. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3440. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3441. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3442. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3443. int ret = 0;
  3444. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  3445. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3446. u32 user_set_tx_ch = 0;
  3447. u32 user_set_rx_ch = 0;
  3448. u32 ch_id;
  3449. ret = snd_soc_dai_get_channel_map(codec_dai,
  3450. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  3451. &rx_ch_cdc_dma);
  3452. if (ret < 0) {
  3453. pr_err("%s: failed to get codec chan map, err:%d\n",
  3454. __func__, ret);
  3455. goto err;
  3456. }
  3457. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3458. switch (dai_link->id) {
  3459. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3460. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3461. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3462. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3463. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3464. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3465. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  3466. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3467. {
  3468. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3469. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  3470. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  3471. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  3472. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  3473. user_set_rx_ch, &rx_ch_cdc_dma);
  3474. if (ret < 0) {
  3475. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3476. __func__, ret);
  3477. goto err;
  3478. }
  3479. }
  3480. break;
  3481. }
  3482. } else {
  3483. switch (dai_link->id) {
  3484. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3485. {
  3486. user_set_tx_ch = msm_vi_feed_tx_ch;
  3487. }
  3488. break;
  3489. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3490. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3491. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3492. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3493. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3494. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3495. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3496. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  3497. {
  3498. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3499. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  3500. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  3501. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  3502. }
  3503. break;
  3504. }
  3505. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  3506. &tx_ch_cdc_dma, 0, 0);
  3507. if (ret < 0) {
  3508. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3509. __func__, ret);
  3510. goto err;
  3511. }
  3512. }
  3513. err:
  3514. return ret;
  3515. }
  3516. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  3517. {
  3518. cpumask_t mask;
  3519. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  3520. pm_qos_remove_request(&substream->latency_pm_qos_req);
  3521. cpumask_clear(&mask);
  3522. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  3523. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  3524. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  3525. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  3526. pm_qos_add_request(&substream->latency_pm_qos_req,
  3527. PM_QOS_CPU_DMA_LATENCY,
  3528. MSM_LL_QOS_VALUE);
  3529. return 0;
  3530. }
  3531. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  3532. {
  3533. int ret = 0;
  3534. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3535. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3536. int index = cpu_dai->id;
  3537. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  3538. dev_dbg(rtd->card->dev,
  3539. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  3540. __func__, substream->name, substream->stream,
  3541. cpu_dai->name, cpu_dai->id);
  3542. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  3543. ret = -EINVAL;
  3544. dev_err(rtd->card->dev,
  3545. "%s: CPU DAI id (%d) out of range\n",
  3546. __func__, cpu_dai->id);
  3547. goto err;
  3548. }
  3549. /*
  3550. * Mutex protection in case the same MI2S
  3551. * interface using for both TX and RX so
  3552. * that the same clock won't be enable twice.
  3553. */
  3554. mutex_lock(&mi2s_intf_conf[index].lock);
  3555. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  3556. /* Check if msm needs to provide the clock to the interface */
  3557. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  3558. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  3559. fmt = SND_SOC_DAIFMT_CBM_CFM;
  3560. }
  3561. ret = msm_mi2s_set_sclk(substream, true);
  3562. if (ret < 0) {
  3563. dev_err(rtd->card->dev,
  3564. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  3565. __func__, ret);
  3566. goto clean_up;
  3567. }
  3568. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  3569. if (ret < 0) {
  3570. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  3571. __func__, index, ret);
  3572. goto clk_off;
  3573. }
  3574. }
  3575. clk_off:
  3576. if (ret < 0)
  3577. msm_mi2s_set_sclk(substream, false);
  3578. clean_up:
  3579. if (ret < 0)
  3580. mi2s_intf_conf[index].ref_cnt--;
  3581. mutex_unlock(&mi2s_intf_conf[index].lock);
  3582. err:
  3583. return ret;
  3584. }
  3585. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  3586. {
  3587. int ret = 0;
  3588. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3589. int index = rtd->cpu_dai->id;
  3590. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  3591. substream->name, substream->stream);
  3592. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  3593. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  3594. return;
  3595. }
  3596. mutex_lock(&mi2s_intf_conf[index].lock);
  3597. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  3598. ret = msm_mi2s_set_sclk(substream, false);
  3599. if (ret < 0)
  3600. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  3601. __func__, index, ret);
  3602. }
  3603. mutex_unlock(&mi2s_intf_conf[index].lock);
  3604. }
  3605. static int msm_wcn_hw_params_lito(struct snd_pcm_substream *substream,
  3606. struct snd_pcm_hw_params *params)
  3607. {
  3608. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3609. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3610. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3611. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3612. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO];
  3613. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3614. int ret = 0;
  3615. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  3616. codec_dai->name, codec_dai->id);
  3617. ret = snd_soc_dai_get_channel_map(codec_dai,
  3618. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3619. if (ret) {
  3620. dev_err(rtd->dev,
  3621. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  3622. __func__, ret);
  3623. goto err;
  3624. }
  3625. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  3626. __func__, tx_ch_cnt, dai_link->id);
  3627. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3628. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  3629. if (ret)
  3630. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  3631. __func__, ret);
  3632. err:
  3633. return ret;
  3634. }
  3635. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  3636. struct snd_pcm_hw_params *params)
  3637. {
  3638. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3639. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3640. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3641. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3642. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  3643. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3644. int ret = 0;
  3645. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  3646. codec_dai->name, codec_dai->id);
  3647. ret = snd_soc_dai_get_channel_map(codec_dai,
  3648. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3649. if (ret) {
  3650. dev_err(rtd->dev,
  3651. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  3652. __func__, ret);
  3653. goto err;
  3654. }
  3655. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  3656. __func__, tx_ch_cnt, dai_link->id);
  3657. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3658. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  3659. if (ret)
  3660. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  3661. __func__, ret);
  3662. err:
  3663. return ret;
  3664. }
  3665. static struct snd_soc_ops kona_tdm_be_ops = {
  3666. .hw_params = kona_tdm_snd_hw_params,
  3667. };
  3668. static struct snd_soc_ops msm_mi2s_be_ops = {
  3669. .startup = msm_mi2s_snd_startup,
  3670. .shutdown = msm_mi2s_snd_shutdown,
  3671. };
  3672. static struct snd_soc_ops msm_fe_qos_ops = {
  3673. .prepare = msm_fe_qos_prepare,
  3674. };
  3675. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  3676. .startup = msm_snd_cdc_dma_startup,
  3677. .hw_params = msm_snd_cdc_dma_hw_params,
  3678. };
  3679. static struct snd_soc_ops msm_wcn_ops = {
  3680. .hw_params = msm_wcn_hw_params,
  3681. };
  3682. static struct snd_soc_ops msm_wcn_ops_lito = {
  3683. .hw_params = msm_wcn_hw_params_lito,
  3684. };
  3685. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3686. struct snd_kcontrol *kcontrol, int event)
  3687. {
  3688. struct msm_asoc_mach_data *pdata = NULL;
  3689. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  3690. int ret = 0;
  3691. u32 dmic_idx;
  3692. int *dmic_gpio_cnt;
  3693. struct device_node *dmic_gpio;
  3694. char *wname;
  3695. wname = strpbrk(w->name, "012345");
  3696. if (!wname) {
  3697. dev_err(component->dev, "%s: widget not found\n", __func__);
  3698. return -EINVAL;
  3699. }
  3700. ret = kstrtouint(wname, 10, &dmic_idx);
  3701. if (ret < 0) {
  3702. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  3703. __func__);
  3704. return -EINVAL;
  3705. }
  3706. pdata = snd_soc_card_get_drvdata(component->card);
  3707. switch (dmic_idx) {
  3708. case 0:
  3709. case 1:
  3710. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3711. dmic_gpio = pdata->dmic01_gpio_p;
  3712. break;
  3713. case 2:
  3714. case 3:
  3715. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3716. dmic_gpio = pdata->dmic23_gpio_p;
  3717. break;
  3718. case 4:
  3719. case 5:
  3720. dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
  3721. dmic_gpio = pdata->dmic45_gpio_p;
  3722. break;
  3723. default:
  3724. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  3725. __func__);
  3726. return -EINVAL;
  3727. }
  3728. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3729. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3730. switch (event) {
  3731. case SND_SOC_DAPM_PRE_PMU:
  3732. (*dmic_gpio_cnt)++;
  3733. if (*dmic_gpio_cnt == 1) {
  3734. ret = msm_cdc_pinctrl_select_active_state(
  3735. dmic_gpio);
  3736. if (ret < 0) {
  3737. pr_err("%s: gpio set cannot be activated %sd",
  3738. __func__, "dmic_gpio");
  3739. return ret;
  3740. }
  3741. }
  3742. break;
  3743. case SND_SOC_DAPM_POST_PMD:
  3744. (*dmic_gpio_cnt)--;
  3745. if (*dmic_gpio_cnt == 0) {
  3746. ret = msm_cdc_pinctrl_select_sleep_state(
  3747. dmic_gpio);
  3748. if (ret < 0) {
  3749. pr_err("%s: gpio set cannot be de-activated %sd",
  3750. __func__, "dmic_gpio");
  3751. return ret;
  3752. }
  3753. }
  3754. break;
  3755. default:
  3756. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3757. return -EINVAL;
  3758. }
  3759. return 0;
  3760. }
  3761. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3762. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3763. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3764. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3765. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3766. SND_SOC_DAPM_MIC("Analog Mic5", NULL),
  3767. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3768. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3769. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3770. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3771. SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
  3772. SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
  3773. };
  3774. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  3775. {
  3776. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  3777. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160};
  3778. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3779. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  3780. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  3781. }
  3782. static int msm_wcn_init_lito(struct snd_soc_pcm_runtime *rtd)
  3783. {
  3784. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  3785. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO] = {159, 160, 161};
  3786. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3787. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  3788. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  3789. }
  3790. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  3791. {
  3792. int ret = -EINVAL;
  3793. struct snd_soc_component *component;
  3794. struct snd_soc_dapm_context *dapm;
  3795. struct snd_card *card;
  3796. struct snd_info_entry *entry;
  3797. struct snd_soc_component *aux_comp;
  3798. struct msm_asoc_mach_data *pdata =
  3799. snd_soc_card_get_drvdata(rtd->card);
  3800. component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
  3801. if (!component) {
  3802. pr_err("%s: could not find component for bolero_codec\n",
  3803. __func__);
  3804. return ret;
  3805. }
  3806. dapm = snd_soc_component_get_dapm(component);
  3807. ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
  3808. ARRAY_SIZE(msm_int_snd_controls));
  3809. if (ret < 0) {
  3810. pr_err("%s: add_component_controls failed: %d\n",
  3811. __func__, ret);
  3812. return ret;
  3813. }
  3814. ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
  3815. ARRAY_SIZE(msm_common_snd_controls));
  3816. if (ret < 0) {
  3817. pr_err("%s: add common snd controls failed: %d\n",
  3818. __func__, ret);
  3819. return ret;
  3820. }
  3821. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  3822. ARRAY_SIZE(msm_int_dapm_widgets));
  3823. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  3824. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  3825. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  3826. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  3827. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  3828. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  3829. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  3830. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  3831. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  3832. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  3833. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
  3834. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  3835. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  3836. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  3837. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  3838. snd_soc_dapm_sync(dapm);
  3839. /*
  3840. * Send speaker configuration only for WSA8810.
  3841. * Default configuration is for WSA8815.
  3842. */
  3843. dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
  3844. __func__, rtd->card->num_aux_devs);
  3845. if (rtd->card->num_aux_devs &&
  3846. !list_empty(&rtd->card->component_dev_list)) {
  3847. aux_comp = list_first_entry(
  3848. &rtd->card->component_dev_list,
  3849. struct snd_soc_component,
  3850. card_aux_list);
  3851. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  3852. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  3853. wsa_macro_set_spkr_mode(component,
  3854. WSA_MACRO_SPKR_MODE_1);
  3855. wsa_macro_set_spkr_gain_offset(component,
  3856. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  3857. }
  3858. bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
  3859. sm_port_map);
  3860. }
  3861. card = rtd->card->snd_card;
  3862. if (!pdata->codec_root) {
  3863. entry = snd_info_create_subdir(card->module, "codecs",
  3864. card->proc_root);
  3865. if (!entry) {
  3866. pr_debug("%s: Cannot create codecs module entry\n",
  3867. __func__);
  3868. ret = 0;
  3869. goto err;
  3870. }
  3871. pdata->codec_root = entry;
  3872. }
  3873. bolero_info_create_codec_entry(pdata->codec_root, component);
  3874. bolero_register_wake_irq(component, false);
  3875. codec_reg_done = true;
  3876. return 0;
  3877. err:
  3878. return ret;
  3879. }
  3880. static void *def_wcd_mbhc_cal(void)
  3881. {
  3882. void *wcd_mbhc_cal;
  3883. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  3884. u16 *btn_high;
  3885. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  3886. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  3887. if (!wcd_mbhc_cal)
  3888. return NULL;
  3889. WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
  3890. WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
  3891. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  3892. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  3893. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  3894. btn_high[0] = 75;
  3895. btn_high[1] = 150;
  3896. btn_high[2] = 237;
  3897. btn_high[3] = 500;
  3898. btn_high[4] = 500;
  3899. btn_high[5] = 500;
  3900. btn_high[6] = 500;
  3901. btn_high[7] = 500;
  3902. return wcd_mbhc_cal;
  3903. }
  3904. /* Digital audio interface glue - connects codec <---> CPU */
  3905. static struct snd_soc_dai_link msm_common_dai_links[] = {
  3906. /* FrontEnd DAI Links */
  3907. {/* hw:x,0 */
  3908. .name = MSM_DAILINK_NAME(Media1),
  3909. .stream_name = "MultiMedia1",
  3910. .cpu_dai_name = "MultiMedia1",
  3911. .platform_name = "msm-pcm-dsp.0",
  3912. .dynamic = 1,
  3913. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3914. .dpcm_playback = 1,
  3915. .dpcm_capture = 1,
  3916. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3917. SND_SOC_DPCM_TRIGGER_POST},
  3918. .codec_dai_name = "snd-soc-dummy-dai",
  3919. .codec_name = "snd-soc-dummy",
  3920. .ignore_suspend = 1,
  3921. /* this dainlink has playback support */
  3922. .ignore_pmdown_time = 1,
  3923. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  3924. },
  3925. {/* hw:x,1 */
  3926. .name = MSM_DAILINK_NAME(Media2),
  3927. .stream_name = "MultiMedia2",
  3928. .cpu_dai_name = "MultiMedia2",
  3929. .platform_name = "msm-pcm-dsp.0",
  3930. .dynamic = 1,
  3931. .dpcm_playback = 1,
  3932. .dpcm_capture = 1,
  3933. .codec_dai_name = "snd-soc-dummy-dai",
  3934. .codec_name = "snd-soc-dummy",
  3935. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3936. SND_SOC_DPCM_TRIGGER_POST},
  3937. .ignore_suspend = 1,
  3938. /* this dainlink has playback support */
  3939. .ignore_pmdown_time = 1,
  3940. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  3941. },
  3942. {/* hw:x,2 */
  3943. .name = "VoiceMMode1",
  3944. .stream_name = "VoiceMMode1",
  3945. .cpu_dai_name = "VoiceMMode1",
  3946. .platform_name = "msm-pcm-voice",
  3947. .dynamic = 1,
  3948. .dpcm_playback = 1,
  3949. .dpcm_capture = 1,
  3950. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3951. SND_SOC_DPCM_TRIGGER_POST},
  3952. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3953. .ignore_suspend = 1,
  3954. .ignore_pmdown_time = 1,
  3955. .codec_dai_name = "snd-soc-dummy-dai",
  3956. .codec_name = "snd-soc-dummy",
  3957. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  3958. },
  3959. {/* hw:x,3 */
  3960. .name = "MSM VoIP",
  3961. .stream_name = "VoIP",
  3962. .cpu_dai_name = "VoIP",
  3963. .platform_name = "msm-voip-dsp",
  3964. .dynamic = 1,
  3965. .dpcm_playback = 1,
  3966. .dpcm_capture = 1,
  3967. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3968. SND_SOC_DPCM_TRIGGER_POST},
  3969. .codec_dai_name = "snd-soc-dummy-dai",
  3970. .codec_name = "snd-soc-dummy",
  3971. .ignore_suspend = 1,
  3972. /* this dainlink has playback support */
  3973. .ignore_pmdown_time = 1,
  3974. .id = MSM_FRONTEND_DAI_VOIP,
  3975. },
  3976. {/* hw:x,4 */
  3977. .name = MSM_DAILINK_NAME(ULL),
  3978. .stream_name = "MultiMedia3",
  3979. .cpu_dai_name = "MultiMedia3",
  3980. .platform_name = "msm-pcm-dsp.2",
  3981. .dynamic = 1,
  3982. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3983. .dpcm_playback = 1,
  3984. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3985. SND_SOC_DPCM_TRIGGER_POST},
  3986. .codec_dai_name = "snd-soc-dummy-dai",
  3987. .codec_name = "snd-soc-dummy",
  3988. .ignore_suspend = 1,
  3989. /* this dainlink has playback support */
  3990. .ignore_pmdown_time = 1,
  3991. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  3992. },
  3993. {/* hw:x,5 */
  3994. .name = "MSM AFE-PCM RX",
  3995. .stream_name = "AFE-PROXY RX",
  3996. .cpu_dai_name = "msm-dai-q6-dev.241",
  3997. .codec_name = "msm-stub-codec.1",
  3998. .codec_dai_name = "msm-stub-rx",
  3999. .platform_name = "msm-pcm-afe",
  4000. .dpcm_playback = 1,
  4001. .ignore_suspend = 1,
  4002. /* this dainlink has playback support */
  4003. .ignore_pmdown_time = 1,
  4004. },
  4005. {/* hw:x,6 */
  4006. .name = "MSM AFE-PCM TX",
  4007. .stream_name = "AFE-PROXY TX",
  4008. .cpu_dai_name = "msm-dai-q6-dev.240",
  4009. .codec_name = "msm-stub-codec.1",
  4010. .codec_dai_name = "msm-stub-tx",
  4011. .platform_name = "msm-pcm-afe",
  4012. .dpcm_capture = 1,
  4013. .ignore_suspend = 1,
  4014. },
  4015. {/* hw:x,7 */
  4016. .name = MSM_DAILINK_NAME(Compress1),
  4017. .stream_name = "Compress1",
  4018. .cpu_dai_name = "MultiMedia4",
  4019. .platform_name = "msm-compress-dsp",
  4020. .dynamic = 1,
  4021. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  4022. .dpcm_playback = 1,
  4023. .dpcm_capture = 1,
  4024. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4025. SND_SOC_DPCM_TRIGGER_POST},
  4026. .codec_dai_name = "snd-soc-dummy-dai",
  4027. .codec_name = "snd-soc-dummy",
  4028. .ignore_suspend = 1,
  4029. .ignore_pmdown_time = 1,
  4030. /* this dainlink has playback support */
  4031. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  4032. },
  4033. /* Hostless PCM purpose */
  4034. {/* hw:x,8 */
  4035. .name = "AUXPCM Hostless",
  4036. .stream_name = "AUXPCM Hostless",
  4037. .cpu_dai_name = "AUXPCM_HOSTLESS",
  4038. .platform_name = "msm-pcm-hostless",
  4039. .dynamic = 1,
  4040. .dpcm_playback = 1,
  4041. .dpcm_capture = 1,
  4042. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4043. SND_SOC_DPCM_TRIGGER_POST},
  4044. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4045. .ignore_suspend = 1,
  4046. /* this dainlink has playback support */
  4047. .ignore_pmdown_time = 1,
  4048. .codec_dai_name = "snd-soc-dummy-dai",
  4049. .codec_name = "snd-soc-dummy",
  4050. },
  4051. {/* hw:x,9 */
  4052. .name = MSM_DAILINK_NAME(LowLatency),
  4053. .stream_name = "MultiMedia5",
  4054. .cpu_dai_name = "MultiMedia5",
  4055. .platform_name = "msm-pcm-dsp.1",
  4056. .dynamic = 1,
  4057. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  4058. .dpcm_playback = 1,
  4059. .dpcm_capture = 1,
  4060. .codec_dai_name = "snd-soc-dummy-dai",
  4061. .codec_name = "snd-soc-dummy",
  4062. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4063. SND_SOC_DPCM_TRIGGER_POST},
  4064. .ignore_suspend = 1,
  4065. /* this dainlink has playback support */
  4066. .ignore_pmdown_time = 1,
  4067. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  4068. .ops = &msm_fe_qos_ops,
  4069. },
  4070. {/* hw:x,10 */
  4071. .name = "Listen 1 Audio Service",
  4072. .stream_name = "Listen 1 Audio Service",
  4073. .cpu_dai_name = "LSM1",
  4074. .platform_name = "msm-lsm-client",
  4075. .dynamic = 1,
  4076. .dpcm_capture = 1,
  4077. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4078. SND_SOC_DPCM_TRIGGER_POST },
  4079. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4080. .ignore_suspend = 1,
  4081. .codec_dai_name = "snd-soc-dummy-dai",
  4082. .codec_name = "snd-soc-dummy",
  4083. .id = MSM_FRONTEND_DAI_LSM1,
  4084. },
  4085. /* Multiple Tunnel instances */
  4086. {/* hw:x,11 */
  4087. .name = MSM_DAILINK_NAME(Compress2),
  4088. .stream_name = "Compress2",
  4089. .cpu_dai_name = "MultiMedia7",
  4090. .platform_name = "msm-compress-dsp",
  4091. .dynamic = 1,
  4092. .dpcm_playback = 1,
  4093. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4094. SND_SOC_DPCM_TRIGGER_POST},
  4095. .codec_dai_name = "snd-soc-dummy-dai",
  4096. .codec_name = "snd-soc-dummy",
  4097. .ignore_suspend = 1,
  4098. .ignore_pmdown_time = 1,
  4099. /* this dainlink has playback support */
  4100. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  4101. },
  4102. {/* hw:x,12 */
  4103. .name = MSM_DAILINK_NAME(MultiMedia10),
  4104. .stream_name = "MultiMedia10",
  4105. .cpu_dai_name = "MultiMedia10",
  4106. .platform_name = "msm-pcm-dsp.1",
  4107. .dynamic = 1,
  4108. .dpcm_playback = 1,
  4109. .dpcm_capture = 1,
  4110. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4111. SND_SOC_DPCM_TRIGGER_POST},
  4112. .codec_dai_name = "snd-soc-dummy-dai",
  4113. .codec_name = "snd-soc-dummy",
  4114. .ignore_suspend = 1,
  4115. .ignore_pmdown_time = 1,
  4116. /* this dainlink has playback support */
  4117. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  4118. },
  4119. {/* hw:x,13 */
  4120. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  4121. .stream_name = "MM_NOIRQ",
  4122. .cpu_dai_name = "MultiMedia8",
  4123. .platform_name = "msm-pcm-dsp-noirq",
  4124. .dynamic = 1,
  4125. .dpcm_playback = 1,
  4126. .dpcm_capture = 1,
  4127. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4128. SND_SOC_DPCM_TRIGGER_POST},
  4129. .codec_dai_name = "snd-soc-dummy-dai",
  4130. .codec_name = "snd-soc-dummy",
  4131. .ignore_suspend = 1,
  4132. .ignore_pmdown_time = 1,
  4133. /* this dainlink has playback support */
  4134. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  4135. .ops = &msm_fe_qos_ops,
  4136. },
  4137. /* HDMI Hostless */
  4138. {/* hw:x,14 */
  4139. .name = "HDMI_RX_HOSTLESS",
  4140. .stream_name = "HDMI_RX_HOSTLESS",
  4141. .cpu_dai_name = "HDMI_HOSTLESS",
  4142. .platform_name = "msm-pcm-hostless",
  4143. .dynamic = 1,
  4144. .dpcm_playback = 1,
  4145. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4146. SND_SOC_DPCM_TRIGGER_POST},
  4147. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4148. .ignore_suspend = 1,
  4149. .ignore_pmdown_time = 1,
  4150. .codec_dai_name = "snd-soc-dummy-dai",
  4151. .codec_name = "snd-soc-dummy",
  4152. },
  4153. {/* hw:x,15 */
  4154. .name = "VoiceMMode2",
  4155. .stream_name = "VoiceMMode2",
  4156. .cpu_dai_name = "VoiceMMode2",
  4157. .platform_name = "msm-pcm-voice",
  4158. .dynamic = 1,
  4159. .dpcm_playback = 1,
  4160. .dpcm_capture = 1,
  4161. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4162. SND_SOC_DPCM_TRIGGER_POST},
  4163. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4164. .ignore_suspend = 1,
  4165. .ignore_pmdown_time = 1,
  4166. .codec_dai_name = "snd-soc-dummy-dai",
  4167. .codec_name = "snd-soc-dummy",
  4168. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  4169. },
  4170. /* LSM FE */
  4171. {/* hw:x,16 */
  4172. .name = "Listen 2 Audio Service",
  4173. .stream_name = "Listen 2 Audio Service",
  4174. .cpu_dai_name = "LSM2",
  4175. .platform_name = "msm-lsm-client",
  4176. .dynamic = 1,
  4177. .dpcm_capture = 1,
  4178. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4179. SND_SOC_DPCM_TRIGGER_POST },
  4180. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4181. .ignore_suspend = 1,
  4182. .codec_dai_name = "snd-soc-dummy-dai",
  4183. .codec_name = "snd-soc-dummy",
  4184. .id = MSM_FRONTEND_DAI_LSM2,
  4185. },
  4186. {/* hw:x,17 */
  4187. .name = "Listen 3 Audio Service",
  4188. .stream_name = "Listen 3 Audio Service",
  4189. .cpu_dai_name = "LSM3",
  4190. .platform_name = "msm-lsm-client",
  4191. .dynamic = 1,
  4192. .dpcm_capture = 1,
  4193. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4194. SND_SOC_DPCM_TRIGGER_POST },
  4195. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4196. .ignore_suspend = 1,
  4197. .codec_dai_name = "snd-soc-dummy-dai",
  4198. .codec_name = "snd-soc-dummy",
  4199. .id = MSM_FRONTEND_DAI_LSM3,
  4200. },
  4201. {/* hw:x,18 */
  4202. .name = "Listen 4 Audio Service",
  4203. .stream_name = "Listen 4 Audio Service",
  4204. .cpu_dai_name = "LSM4",
  4205. .platform_name = "msm-lsm-client",
  4206. .dynamic = 1,
  4207. .dpcm_capture = 1,
  4208. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4209. SND_SOC_DPCM_TRIGGER_POST },
  4210. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4211. .ignore_suspend = 1,
  4212. .codec_dai_name = "snd-soc-dummy-dai",
  4213. .codec_name = "snd-soc-dummy",
  4214. .id = MSM_FRONTEND_DAI_LSM4,
  4215. },
  4216. {/* hw:x,19 */
  4217. .name = "Listen 5 Audio Service",
  4218. .stream_name = "Listen 5 Audio Service",
  4219. .cpu_dai_name = "LSM5",
  4220. .platform_name = "msm-lsm-client",
  4221. .dynamic = 1,
  4222. .dpcm_capture = 1,
  4223. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4224. SND_SOC_DPCM_TRIGGER_POST },
  4225. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4226. .ignore_suspend = 1,
  4227. .codec_dai_name = "snd-soc-dummy-dai",
  4228. .codec_name = "snd-soc-dummy",
  4229. .id = MSM_FRONTEND_DAI_LSM5,
  4230. },
  4231. {/* hw:x,20 */
  4232. .name = "Listen 6 Audio Service",
  4233. .stream_name = "Listen 6 Audio Service",
  4234. .cpu_dai_name = "LSM6",
  4235. .platform_name = "msm-lsm-client",
  4236. .dynamic = 1,
  4237. .dpcm_capture = 1,
  4238. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4239. SND_SOC_DPCM_TRIGGER_POST },
  4240. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4241. .ignore_suspend = 1,
  4242. .codec_dai_name = "snd-soc-dummy-dai",
  4243. .codec_name = "snd-soc-dummy",
  4244. .id = MSM_FRONTEND_DAI_LSM6,
  4245. },
  4246. {/* hw:x,21 */
  4247. .name = "Listen 7 Audio Service",
  4248. .stream_name = "Listen 7 Audio Service",
  4249. .cpu_dai_name = "LSM7",
  4250. .platform_name = "msm-lsm-client",
  4251. .dynamic = 1,
  4252. .dpcm_capture = 1,
  4253. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4254. SND_SOC_DPCM_TRIGGER_POST },
  4255. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4256. .ignore_suspend = 1,
  4257. .codec_dai_name = "snd-soc-dummy-dai",
  4258. .codec_name = "snd-soc-dummy",
  4259. .id = MSM_FRONTEND_DAI_LSM7,
  4260. },
  4261. {/* hw:x,22 */
  4262. .name = "Listen 8 Audio Service",
  4263. .stream_name = "Listen 8 Audio Service",
  4264. .cpu_dai_name = "LSM8",
  4265. .platform_name = "msm-lsm-client",
  4266. .dynamic = 1,
  4267. .dpcm_capture = 1,
  4268. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4269. SND_SOC_DPCM_TRIGGER_POST },
  4270. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4271. .ignore_suspend = 1,
  4272. .codec_dai_name = "snd-soc-dummy-dai",
  4273. .codec_name = "snd-soc-dummy",
  4274. .id = MSM_FRONTEND_DAI_LSM8,
  4275. },
  4276. {/* hw:x,23 */
  4277. .name = MSM_DAILINK_NAME(Media9),
  4278. .stream_name = "MultiMedia9",
  4279. .cpu_dai_name = "MultiMedia9",
  4280. .platform_name = "msm-pcm-dsp.0",
  4281. .dynamic = 1,
  4282. .dpcm_playback = 1,
  4283. .dpcm_capture = 1,
  4284. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4285. SND_SOC_DPCM_TRIGGER_POST},
  4286. .codec_dai_name = "snd-soc-dummy-dai",
  4287. .codec_name = "snd-soc-dummy",
  4288. .ignore_suspend = 1,
  4289. /* this dainlink has playback support */
  4290. .ignore_pmdown_time = 1,
  4291. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  4292. },
  4293. {/* hw:x,24 */
  4294. .name = MSM_DAILINK_NAME(Compress4),
  4295. .stream_name = "Compress4",
  4296. .cpu_dai_name = "MultiMedia11",
  4297. .platform_name = "msm-compress-dsp",
  4298. .dynamic = 1,
  4299. .dpcm_playback = 1,
  4300. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4301. SND_SOC_DPCM_TRIGGER_POST},
  4302. .codec_dai_name = "snd-soc-dummy-dai",
  4303. .codec_name = "snd-soc-dummy",
  4304. .ignore_suspend = 1,
  4305. .ignore_pmdown_time = 1,
  4306. /* this dainlink has playback support */
  4307. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  4308. },
  4309. {/* hw:x,25 */
  4310. .name = MSM_DAILINK_NAME(Compress5),
  4311. .stream_name = "Compress5",
  4312. .cpu_dai_name = "MultiMedia12",
  4313. .platform_name = "msm-compress-dsp",
  4314. .dynamic = 1,
  4315. .dpcm_playback = 1,
  4316. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4317. SND_SOC_DPCM_TRIGGER_POST},
  4318. .codec_dai_name = "snd-soc-dummy-dai",
  4319. .codec_name = "snd-soc-dummy",
  4320. .ignore_suspend = 1,
  4321. .ignore_pmdown_time = 1,
  4322. /* this dainlink has playback support */
  4323. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  4324. },
  4325. {/* hw:x,26 */
  4326. .name = MSM_DAILINK_NAME(Compress6),
  4327. .stream_name = "Compress6",
  4328. .cpu_dai_name = "MultiMedia13",
  4329. .platform_name = "msm-compress-dsp",
  4330. .dynamic = 1,
  4331. .dpcm_playback = 1,
  4332. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4333. SND_SOC_DPCM_TRIGGER_POST},
  4334. .codec_dai_name = "snd-soc-dummy-dai",
  4335. .codec_name = "snd-soc-dummy",
  4336. .ignore_suspend = 1,
  4337. .ignore_pmdown_time = 1,
  4338. /* this dainlink has playback support */
  4339. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  4340. },
  4341. {/* hw:x,27 */
  4342. .name = MSM_DAILINK_NAME(Compress7),
  4343. .stream_name = "Compress7",
  4344. .cpu_dai_name = "MultiMedia14",
  4345. .platform_name = "msm-compress-dsp",
  4346. .dynamic = 1,
  4347. .dpcm_playback = 1,
  4348. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4349. SND_SOC_DPCM_TRIGGER_POST},
  4350. .codec_dai_name = "snd-soc-dummy-dai",
  4351. .codec_name = "snd-soc-dummy",
  4352. .ignore_suspend = 1,
  4353. .ignore_pmdown_time = 1,
  4354. /* this dainlink has playback support */
  4355. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  4356. },
  4357. {/* hw:x,28 */
  4358. .name = MSM_DAILINK_NAME(Compress8),
  4359. .stream_name = "Compress8",
  4360. .cpu_dai_name = "MultiMedia15",
  4361. .platform_name = "msm-compress-dsp",
  4362. .dynamic = 1,
  4363. .dpcm_playback = 1,
  4364. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4365. SND_SOC_DPCM_TRIGGER_POST},
  4366. .codec_dai_name = "snd-soc-dummy-dai",
  4367. .codec_name = "snd-soc-dummy",
  4368. .ignore_suspend = 1,
  4369. .ignore_pmdown_time = 1,
  4370. /* this dainlink has playback support */
  4371. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  4372. },
  4373. {/* hw:x,29 */
  4374. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  4375. .stream_name = "MM_NOIRQ_2",
  4376. .cpu_dai_name = "MultiMedia16",
  4377. .platform_name = "msm-pcm-dsp-noirq",
  4378. .dynamic = 1,
  4379. .dpcm_playback = 1,
  4380. .dpcm_capture = 1,
  4381. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4382. SND_SOC_DPCM_TRIGGER_POST},
  4383. .codec_dai_name = "snd-soc-dummy-dai",
  4384. .codec_name = "snd-soc-dummy",
  4385. .ignore_suspend = 1,
  4386. .ignore_pmdown_time = 1,
  4387. /* this dainlink has playback support */
  4388. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  4389. },
  4390. {/* hw:x,30 */
  4391. .name = "CDC_DMA Hostless",
  4392. .stream_name = "CDC_DMA Hostless",
  4393. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  4394. .platform_name = "msm-pcm-hostless",
  4395. .dynamic = 1,
  4396. .dpcm_playback = 1,
  4397. .dpcm_capture = 1,
  4398. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4399. SND_SOC_DPCM_TRIGGER_POST},
  4400. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4401. .ignore_suspend = 1,
  4402. /* this dailink has playback support */
  4403. .ignore_pmdown_time = 1,
  4404. .codec_dai_name = "snd-soc-dummy-dai",
  4405. .codec_name = "snd-soc-dummy",
  4406. },
  4407. {/* hw:x,31 */
  4408. .name = "TX3_CDC_DMA Hostless",
  4409. .stream_name = "TX3_CDC_DMA Hostless",
  4410. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  4411. .platform_name = "msm-pcm-hostless",
  4412. .dynamic = 1,
  4413. .dpcm_capture = 1,
  4414. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4415. SND_SOC_DPCM_TRIGGER_POST},
  4416. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4417. .ignore_suspend = 1,
  4418. .codec_dai_name = "snd-soc-dummy-dai",
  4419. .codec_name = "snd-soc-dummy",
  4420. },
  4421. {/* hw:x,32 */
  4422. .name = "Tertiary MI2S TX_Hostless",
  4423. .stream_name = "Tertiary MI2S_TX Hostless Capture",
  4424. .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
  4425. .platform_name = "msm-pcm-hostless",
  4426. .dynamic = 1,
  4427. .dpcm_capture = 1,
  4428. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4429. SND_SOC_DPCM_TRIGGER_POST},
  4430. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4431. .ignore_suspend = 1,
  4432. .ignore_pmdown_time = 1,
  4433. .codec_dai_name = "snd-soc-dummy-dai",
  4434. .codec_name = "snd-soc-dummy",
  4435. },
  4436. };
  4437. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  4438. {/* hw:x,33 */
  4439. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  4440. .stream_name = "WSA CDC DMA0 Capture",
  4441. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  4442. .platform_name = "msm-pcm-hostless",
  4443. .codec_name = "bolero_codec",
  4444. .codec_dai_name = "wsa_macro_vifeedback",
  4445. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  4446. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4447. .ignore_suspend = 1,
  4448. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4449. .ops = &msm_cdc_dma_be_ops,
  4450. },
  4451. };
  4452. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  4453. {/* hw:x,34 */
  4454. .name = MSM_DAILINK_NAME(ASM Loopback),
  4455. .stream_name = "MultiMedia6",
  4456. .cpu_dai_name = "MultiMedia6",
  4457. .platform_name = "msm-pcm-loopback",
  4458. .dynamic = 1,
  4459. .dpcm_playback = 1,
  4460. .dpcm_capture = 1,
  4461. .codec_dai_name = "snd-soc-dummy-dai",
  4462. .codec_name = "snd-soc-dummy",
  4463. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4464. SND_SOC_DPCM_TRIGGER_POST},
  4465. .ignore_suspend = 1,
  4466. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4467. .ignore_pmdown_time = 1,
  4468. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  4469. },
  4470. {/* hw:x,35 */
  4471. .name = "USB Audio Hostless",
  4472. .stream_name = "USB Audio Hostless",
  4473. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  4474. .platform_name = "msm-pcm-hostless",
  4475. .dynamic = 1,
  4476. .dpcm_playback = 1,
  4477. .dpcm_capture = 1,
  4478. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4479. SND_SOC_DPCM_TRIGGER_POST},
  4480. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4481. .ignore_suspend = 1,
  4482. .ignore_pmdown_time = 1,
  4483. .codec_dai_name = "snd-soc-dummy-dai",
  4484. .codec_name = "snd-soc-dummy",
  4485. },
  4486. {/* hw:x,36 */
  4487. .name = "SLIMBUS_7 Hostless",
  4488. .stream_name = "SLIMBUS_7 Hostless",
  4489. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  4490. .platform_name = "msm-pcm-hostless",
  4491. .dynamic = 1,
  4492. .dpcm_capture = 1,
  4493. .dpcm_playback = 1,
  4494. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4495. SND_SOC_DPCM_TRIGGER_POST},
  4496. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4497. .ignore_suspend = 1,
  4498. .ignore_pmdown_time = 1,
  4499. .codec_dai_name = "snd-soc-dummy-dai",
  4500. .codec_name = "snd-soc-dummy",
  4501. },
  4502. {/* hw:x,37 */
  4503. .name = "Compress Capture",
  4504. .stream_name = "Compress9",
  4505. .cpu_dai_name = "MultiMedia17",
  4506. .platform_name = "msm-compress-dsp",
  4507. .dynamic = 1,
  4508. .dpcm_capture = 1,
  4509. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4510. SND_SOC_DPCM_TRIGGER_POST},
  4511. .codec_dai_name = "snd-soc-dummy-dai",
  4512. .codec_name = "snd-soc-dummy",
  4513. .ignore_suspend = 1,
  4514. .ignore_pmdown_time = 1,
  4515. .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
  4516. },
  4517. {/* hw:x,38 */
  4518. .name = "SLIMBUS_8 Hostless",
  4519. .stream_name = "SLIMBUS_8 Hostless",
  4520. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  4521. .platform_name = "msm-pcm-hostless",
  4522. .dynamic = 1,
  4523. .dpcm_capture = 1,
  4524. .dpcm_playback = 1,
  4525. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4526. SND_SOC_DPCM_TRIGGER_POST},
  4527. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4528. .ignore_suspend = 1,
  4529. .ignore_pmdown_time = 1,
  4530. .codec_dai_name = "snd-soc-dummy-dai",
  4531. .codec_name = "snd-soc-dummy",
  4532. },
  4533. };
  4534. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  4535. /* Backend AFE DAI Links */
  4536. {
  4537. .name = LPASS_BE_AFE_PCM_RX,
  4538. .stream_name = "AFE Playback",
  4539. .cpu_dai_name = "msm-dai-q6-dev.224",
  4540. .platform_name = "msm-pcm-routing",
  4541. .codec_name = "msm-stub-codec.1",
  4542. .codec_dai_name = "msm-stub-rx",
  4543. .no_pcm = 1,
  4544. .dpcm_playback = 1,
  4545. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  4546. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4547. /* this dainlink has playback support */
  4548. .ignore_pmdown_time = 1,
  4549. .ignore_suspend = 1,
  4550. },
  4551. {
  4552. .name = LPASS_BE_AFE_PCM_TX,
  4553. .stream_name = "AFE Capture",
  4554. .cpu_dai_name = "msm-dai-q6-dev.225",
  4555. .platform_name = "msm-pcm-routing",
  4556. .codec_name = "msm-stub-codec.1",
  4557. .codec_dai_name = "msm-stub-tx",
  4558. .no_pcm = 1,
  4559. .dpcm_capture = 1,
  4560. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  4561. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4562. .ignore_suspend = 1,
  4563. },
  4564. /* Incall Record Uplink BACK END DAI Link */
  4565. {
  4566. .name = LPASS_BE_INCALL_RECORD_TX,
  4567. .stream_name = "Voice Uplink Capture",
  4568. .cpu_dai_name = "msm-dai-q6-dev.32772",
  4569. .platform_name = "msm-pcm-routing",
  4570. .codec_name = "msm-stub-codec.1",
  4571. .codec_dai_name = "msm-stub-tx",
  4572. .no_pcm = 1,
  4573. .dpcm_capture = 1,
  4574. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  4575. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4576. .ignore_suspend = 1,
  4577. },
  4578. /* Incall Record Downlink BACK END DAI Link */
  4579. {
  4580. .name = LPASS_BE_INCALL_RECORD_RX,
  4581. .stream_name = "Voice Downlink Capture",
  4582. .cpu_dai_name = "msm-dai-q6-dev.32771",
  4583. .platform_name = "msm-pcm-routing",
  4584. .codec_name = "msm-stub-codec.1",
  4585. .codec_dai_name = "msm-stub-tx",
  4586. .no_pcm = 1,
  4587. .dpcm_capture = 1,
  4588. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  4589. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4590. .ignore_suspend = 1,
  4591. },
  4592. /* Incall Music BACK END DAI Link */
  4593. {
  4594. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  4595. .stream_name = "Voice Farend Playback",
  4596. .cpu_dai_name = "msm-dai-q6-dev.32773",
  4597. .platform_name = "msm-pcm-routing",
  4598. .codec_name = "msm-stub-codec.1",
  4599. .codec_dai_name = "msm-stub-rx",
  4600. .no_pcm = 1,
  4601. .dpcm_playback = 1,
  4602. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  4603. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4604. .ignore_suspend = 1,
  4605. .ignore_pmdown_time = 1,
  4606. },
  4607. /* Incall Music 2 BACK END DAI Link */
  4608. {
  4609. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  4610. .stream_name = "Voice2 Farend Playback",
  4611. .cpu_dai_name = "msm-dai-q6-dev.32770",
  4612. .platform_name = "msm-pcm-routing",
  4613. .codec_name = "msm-stub-codec.1",
  4614. .codec_dai_name = "msm-stub-rx",
  4615. .no_pcm = 1,
  4616. .dpcm_playback = 1,
  4617. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  4618. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4619. .ignore_suspend = 1,
  4620. .ignore_pmdown_time = 1,
  4621. },
  4622. {
  4623. .name = LPASS_BE_USB_AUDIO_RX,
  4624. .stream_name = "USB Audio Playback",
  4625. .cpu_dai_name = "msm-dai-q6-dev.28672",
  4626. .platform_name = "msm-pcm-routing",
  4627. .codec_name = "msm-stub-codec.1",
  4628. .codec_dai_name = "msm-stub-rx",
  4629. .no_pcm = 1,
  4630. .dpcm_playback = 1,
  4631. .id = MSM_BACKEND_DAI_USB_RX,
  4632. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4633. .ignore_pmdown_time = 1,
  4634. .ignore_suspend = 1,
  4635. },
  4636. {
  4637. .name = LPASS_BE_USB_AUDIO_TX,
  4638. .stream_name = "USB Audio Capture",
  4639. .cpu_dai_name = "msm-dai-q6-dev.28673",
  4640. .platform_name = "msm-pcm-routing",
  4641. .codec_name = "msm-stub-codec.1",
  4642. .codec_dai_name = "msm-stub-tx",
  4643. .no_pcm = 1,
  4644. .dpcm_capture = 1,
  4645. .id = MSM_BACKEND_DAI_USB_TX,
  4646. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4647. .ignore_suspend = 1,
  4648. },
  4649. {
  4650. .name = LPASS_BE_PRI_TDM_RX_0,
  4651. .stream_name = "Primary TDM0 Playback",
  4652. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  4653. .platform_name = "msm-pcm-routing",
  4654. .codec_name = "msm-stub-codec.1",
  4655. .codec_dai_name = "msm-stub-rx",
  4656. .no_pcm = 1,
  4657. .dpcm_playback = 1,
  4658. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  4659. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4660. .ops = &kona_tdm_be_ops,
  4661. .ignore_suspend = 1,
  4662. .ignore_pmdown_time = 1,
  4663. },
  4664. {
  4665. .name = LPASS_BE_PRI_TDM_TX_0,
  4666. .stream_name = "Primary TDM0 Capture",
  4667. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  4668. .platform_name = "msm-pcm-routing",
  4669. .codec_name = "msm-stub-codec.1",
  4670. .codec_dai_name = "msm-stub-tx",
  4671. .no_pcm = 1,
  4672. .dpcm_capture = 1,
  4673. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  4674. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4675. .ops = &kona_tdm_be_ops,
  4676. .ignore_suspend = 1,
  4677. },
  4678. {
  4679. .name = LPASS_BE_SEC_TDM_RX_0,
  4680. .stream_name = "Secondary TDM0 Playback",
  4681. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  4682. .platform_name = "msm-pcm-routing",
  4683. .codec_name = "msm-stub-codec.1",
  4684. .codec_dai_name = "msm-stub-rx",
  4685. .no_pcm = 1,
  4686. .dpcm_playback = 1,
  4687. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  4688. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4689. .ops = &kona_tdm_be_ops,
  4690. .ignore_suspend = 1,
  4691. .ignore_pmdown_time = 1,
  4692. },
  4693. {
  4694. .name = LPASS_BE_SEC_TDM_TX_0,
  4695. .stream_name = "Secondary TDM0 Capture",
  4696. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  4697. .platform_name = "msm-pcm-routing",
  4698. .codec_name = "msm-stub-codec.1",
  4699. .codec_dai_name = "msm-stub-tx",
  4700. .no_pcm = 1,
  4701. .dpcm_capture = 1,
  4702. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  4703. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4704. .ops = &kona_tdm_be_ops,
  4705. .ignore_suspend = 1,
  4706. },
  4707. {
  4708. .name = LPASS_BE_TERT_TDM_RX_0,
  4709. .stream_name = "Tertiary TDM0 Playback",
  4710. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  4711. .platform_name = "msm-pcm-routing",
  4712. .codec_name = "msm-stub-codec.1",
  4713. .codec_dai_name = "msm-stub-rx",
  4714. .no_pcm = 1,
  4715. .dpcm_playback = 1,
  4716. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  4717. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4718. .ops = &kona_tdm_be_ops,
  4719. .ignore_suspend = 1,
  4720. .ignore_pmdown_time = 1,
  4721. },
  4722. {
  4723. .name = LPASS_BE_TERT_TDM_TX_0,
  4724. .stream_name = "Tertiary TDM0 Capture",
  4725. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  4726. .platform_name = "msm-pcm-routing",
  4727. .codec_name = "msm-stub-codec.1",
  4728. .codec_dai_name = "msm-stub-tx",
  4729. .no_pcm = 1,
  4730. .dpcm_capture = 1,
  4731. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  4732. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4733. .ops = &kona_tdm_be_ops,
  4734. .ignore_suspend = 1,
  4735. },
  4736. };
  4737. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  4738. {
  4739. .name = LPASS_BE_SLIMBUS_7_RX,
  4740. .stream_name = "Slimbus7 Playback",
  4741. .cpu_dai_name = "msm-dai-q6-dev.16398",
  4742. .platform_name = "msm-pcm-routing",
  4743. .codec_name = "btfmslim_slave",
  4744. /* BT codec driver determines capabilities based on
  4745. * dai name, bt codecdai name should always contains
  4746. * supported usecase information
  4747. */
  4748. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  4749. .no_pcm = 1,
  4750. .dpcm_playback = 1,
  4751. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  4752. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4753. .init = &msm_wcn_init,
  4754. .ops = &msm_wcn_ops,
  4755. /* dai link has playback support */
  4756. .ignore_pmdown_time = 1,
  4757. .ignore_suspend = 1,
  4758. },
  4759. {
  4760. .name = LPASS_BE_SLIMBUS_7_TX,
  4761. .stream_name = "Slimbus7 Capture",
  4762. .cpu_dai_name = "msm-dai-q6-dev.16399",
  4763. .platform_name = "msm-pcm-routing",
  4764. .codec_name = "btfmslim_slave",
  4765. .codec_dai_name = "btfm_bt_sco_slim_tx",
  4766. .no_pcm = 1,
  4767. .dpcm_capture = 1,
  4768. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  4769. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4770. .ops = &msm_wcn_ops,
  4771. .ignore_suspend = 1,
  4772. },
  4773. };
  4774. static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
  4775. {
  4776. .name = LPASS_BE_SLIMBUS_7_RX,
  4777. .stream_name = "Slimbus7 Playback",
  4778. .cpu_dai_name = "msm-dai-q6-dev.16398",
  4779. .platform_name = "msm-pcm-routing",
  4780. .codec_name = "btfmslim_slave",
  4781. /* BT codec driver determines capabilities based on
  4782. * dai name, bt codecdai name should always contains
  4783. * supported usecase information
  4784. */
  4785. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  4786. .no_pcm = 1,
  4787. .dpcm_playback = 1,
  4788. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  4789. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4790. .init = &msm_wcn_init_lito,
  4791. .ops = &msm_wcn_ops_lito,
  4792. /* dai link has playback support */
  4793. .ignore_pmdown_time = 1,
  4794. .ignore_suspend = 1,
  4795. },
  4796. {
  4797. .name = LPASS_BE_SLIMBUS_7_TX,
  4798. .stream_name = "Slimbus7 Capture",
  4799. .cpu_dai_name = "msm-dai-q6-dev.16399",
  4800. .platform_name = "msm-pcm-routing",
  4801. .codec_name = "btfmslim_slave",
  4802. .codec_dai_name = "btfm_bt_sco_slim_tx",
  4803. .no_pcm = 1,
  4804. .dpcm_capture = 1,
  4805. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  4806. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4807. .ops = &msm_wcn_ops_lito,
  4808. .ignore_suspend = 1,
  4809. },
  4810. {
  4811. .name = LPASS_BE_SLIMBUS_8_TX,
  4812. .stream_name = "Slimbus8 Capture",
  4813. .cpu_dai_name = "msm-dai-q6-dev.16401",
  4814. .platform_name = "msm-pcm-routing",
  4815. .codec_name = "btfmslim_slave",
  4816. .codec_dai_name = "btfm_fm_slim_tx",
  4817. .no_pcm = 1,
  4818. .dpcm_capture = 1,
  4819. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  4820. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4821. .ops = &msm_wcn_ops_lito,
  4822. .ignore_suspend = 1,
  4823. },
  4824. };
  4825. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  4826. /* DISP PORT BACK END DAI Link */
  4827. {
  4828. .name = LPASS_BE_DISPLAY_PORT,
  4829. .stream_name = "Display Port Playback",
  4830. .cpu_dai_name = "msm-dai-q6-dp.24608",
  4831. .platform_name = "msm-pcm-routing",
  4832. .codec_name = "msm-ext-disp-audio-codec-rx",
  4833. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  4834. .no_pcm = 1,
  4835. .dpcm_playback = 1,
  4836. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  4837. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4838. .ignore_pmdown_time = 1,
  4839. .ignore_suspend = 1,
  4840. },
  4841. /* DISP PORT 1 BACK END DAI Link */
  4842. {
  4843. .name = LPASS_BE_DISPLAY_PORT1,
  4844. .stream_name = "Display Port1 Playback",
  4845. .cpu_dai_name = "msm-dai-q6-dp.24608",
  4846. .platform_name = "msm-pcm-routing",
  4847. .codec_name = "msm-ext-disp-audio-codec-rx",
  4848. .codec_dai_name = "msm_dp_audio_codec_rx1_dai",
  4849. .no_pcm = 1,
  4850. .dpcm_playback = 1,
  4851. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX_1,
  4852. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4853. .ignore_pmdown_time = 1,
  4854. .ignore_suspend = 1,
  4855. },
  4856. };
  4857. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  4858. {
  4859. .name = LPASS_BE_PRI_MI2S_RX,
  4860. .stream_name = "Primary MI2S Playback",
  4861. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  4862. .platform_name = "msm-pcm-routing",
  4863. .codec_name = "msm-stub-codec.1",
  4864. .codec_dai_name = "msm-stub-rx",
  4865. .no_pcm = 1,
  4866. .dpcm_playback = 1,
  4867. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  4868. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4869. .ops = &msm_mi2s_be_ops,
  4870. .ignore_suspend = 1,
  4871. .ignore_pmdown_time = 1,
  4872. },
  4873. {
  4874. .name = LPASS_BE_PRI_MI2S_TX,
  4875. .stream_name = "Primary MI2S Capture",
  4876. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  4877. .platform_name = "msm-pcm-routing",
  4878. .codec_name = "msm-stub-codec.1",
  4879. .codec_dai_name = "msm-stub-tx",
  4880. .no_pcm = 1,
  4881. .dpcm_capture = 1,
  4882. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  4883. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4884. .ops = &msm_mi2s_be_ops,
  4885. .ignore_suspend = 1,
  4886. },
  4887. {
  4888. .name = LPASS_BE_SEC_MI2S_RX,
  4889. .stream_name = "Secondary MI2S Playback",
  4890. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  4891. .platform_name = "msm-pcm-routing",
  4892. .codec_name = "msm-stub-codec.1",
  4893. .codec_dai_name = "msm-stub-rx",
  4894. .no_pcm = 1,
  4895. .dpcm_playback = 1,
  4896. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  4897. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4898. .ops = &msm_mi2s_be_ops,
  4899. .ignore_suspend = 1,
  4900. .ignore_pmdown_time = 1,
  4901. },
  4902. {
  4903. .name = LPASS_BE_SEC_MI2S_TX,
  4904. .stream_name = "Secondary MI2S Capture",
  4905. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  4906. .platform_name = "msm-pcm-routing",
  4907. .codec_name = "msm-stub-codec.1",
  4908. .codec_dai_name = "msm-stub-tx",
  4909. .no_pcm = 1,
  4910. .dpcm_capture = 1,
  4911. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  4912. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4913. .ops = &msm_mi2s_be_ops,
  4914. .ignore_suspend = 1,
  4915. },
  4916. {
  4917. .name = LPASS_BE_TERT_MI2S_RX,
  4918. .stream_name = "Tertiary MI2S Playback",
  4919. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  4920. .platform_name = "msm-pcm-routing",
  4921. .codec_name = "msm-stub-codec.1",
  4922. .codec_dai_name = "msm-stub-rx",
  4923. .no_pcm = 1,
  4924. .dpcm_playback = 1,
  4925. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  4926. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4927. .ops = &msm_mi2s_be_ops,
  4928. .ignore_suspend = 1,
  4929. .ignore_pmdown_time = 1,
  4930. },
  4931. {
  4932. .name = LPASS_BE_TERT_MI2S_TX,
  4933. .stream_name = "Tertiary MI2S Capture",
  4934. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  4935. .platform_name = "msm-pcm-routing",
  4936. .codec_name = "msm-stub-codec.1",
  4937. .codec_dai_name = "msm-stub-tx",
  4938. .no_pcm = 1,
  4939. .dpcm_capture = 1,
  4940. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  4941. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4942. .ops = &msm_mi2s_be_ops,
  4943. .ignore_suspend = 1,
  4944. },
  4945. };
  4946. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  4947. /* Primary AUX PCM Backend DAI Links */
  4948. {
  4949. .name = LPASS_BE_AUXPCM_RX,
  4950. .stream_name = "AUX PCM Playback",
  4951. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4952. .platform_name = "msm-pcm-routing",
  4953. .codec_name = "msm-stub-codec.1",
  4954. .codec_dai_name = "msm-stub-rx",
  4955. .no_pcm = 1,
  4956. .dpcm_playback = 1,
  4957. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  4958. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4959. .ignore_pmdown_time = 1,
  4960. .ignore_suspend = 1,
  4961. },
  4962. {
  4963. .name = LPASS_BE_AUXPCM_TX,
  4964. .stream_name = "AUX PCM Capture",
  4965. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4966. .platform_name = "msm-pcm-routing",
  4967. .codec_name = "msm-stub-codec.1",
  4968. .codec_dai_name = "msm-stub-tx",
  4969. .no_pcm = 1,
  4970. .dpcm_capture = 1,
  4971. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  4972. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4973. .ignore_suspend = 1,
  4974. },
  4975. /* Secondary AUX PCM Backend DAI Links */
  4976. {
  4977. .name = LPASS_BE_SEC_AUXPCM_RX,
  4978. .stream_name = "Sec AUX PCM Playback",
  4979. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  4980. .platform_name = "msm-pcm-routing",
  4981. .codec_name = "msm-stub-codec.1",
  4982. .codec_dai_name = "msm-stub-rx",
  4983. .no_pcm = 1,
  4984. .dpcm_playback = 1,
  4985. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  4986. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4987. .ignore_pmdown_time = 1,
  4988. .ignore_suspend = 1,
  4989. },
  4990. {
  4991. .name = LPASS_BE_SEC_AUXPCM_TX,
  4992. .stream_name = "Sec AUX PCM Capture",
  4993. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  4994. .platform_name = "msm-pcm-routing",
  4995. .codec_name = "msm-stub-codec.1",
  4996. .codec_dai_name = "msm-stub-tx",
  4997. .no_pcm = 1,
  4998. .dpcm_capture = 1,
  4999. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  5000. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5001. .ignore_suspend = 1,
  5002. },
  5003. /* Tertiary AUX PCM Backend DAI Links */
  5004. {
  5005. .name = LPASS_BE_TERT_AUXPCM_RX,
  5006. .stream_name = "Tert AUX PCM Playback",
  5007. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  5008. .platform_name = "msm-pcm-routing",
  5009. .codec_name = "msm-stub-codec.1",
  5010. .codec_dai_name = "msm-stub-rx",
  5011. .no_pcm = 1,
  5012. .dpcm_playback = 1,
  5013. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  5014. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5015. .ignore_suspend = 1,
  5016. },
  5017. {
  5018. .name = LPASS_BE_TERT_AUXPCM_TX,
  5019. .stream_name = "Tert AUX PCM Capture",
  5020. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  5021. .platform_name = "msm-pcm-routing",
  5022. .codec_name = "msm-stub-codec.1",
  5023. .codec_dai_name = "msm-stub-tx",
  5024. .no_pcm = 1,
  5025. .dpcm_capture = 1,
  5026. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  5027. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5028. .ignore_suspend = 1,
  5029. },
  5030. };
  5031. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  5032. /* WSA CDC DMA Backend DAI Links */
  5033. {
  5034. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  5035. .stream_name = "WSA CDC DMA0 Playback",
  5036. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  5037. .platform_name = "msm-pcm-routing",
  5038. .codec_name = "bolero_codec",
  5039. .codec_dai_name = "wsa_macro_rx1",
  5040. .no_pcm = 1,
  5041. .dpcm_playback = 1,
  5042. .init = &msm_int_audrx_init,
  5043. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  5044. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5045. .ignore_pmdown_time = 1,
  5046. .ignore_suspend = 1,
  5047. .ops = &msm_cdc_dma_be_ops,
  5048. },
  5049. {
  5050. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  5051. .stream_name = "WSA CDC DMA1 Playback",
  5052. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  5053. .platform_name = "msm-pcm-routing",
  5054. .codec_name = "bolero_codec",
  5055. .codec_dai_name = "wsa_macro_rx_mix",
  5056. .no_pcm = 1,
  5057. .dpcm_playback = 1,
  5058. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  5059. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5060. .ignore_pmdown_time = 1,
  5061. .ignore_suspend = 1,
  5062. .ops = &msm_cdc_dma_be_ops,
  5063. },
  5064. {
  5065. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  5066. .stream_name = "WSA CDC DMA1 Capture",
  5067. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  5068. .platform_name = "msm-pcm-routing",
  5069. .codec_name = "bolero_codec",
  5070. .codec_dai_name = "wsa_macro_echo",
  5071. .no_pcm = 1,
  5072. .dpcm_capture = 1,
  5073. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  5074. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5075. .ignore_suspend = 1,
  5076. .ops = &msm_cdc_dma_be_ops,
  5077. },
  5078. };
  5079. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  5080. /* RX CDC DMA Backend DAI Links */
  5081. {
  5082. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  5083. .stream_name = "RX CDC DMA0 Playback",
  5084. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  5085. .platform_name = "msm-pcm-routing",
  5086. .codec_name = "bolero_codec",
  5087. .codec_dai_name = "rx_macro_rx1",
  5088. .no_pcm = 1,
  5089. .dpcm_playback = 1,
  5090. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  5091. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5092. .ignore_pmdown_time = 1,
  5093. .ignore_suspend = 1,
  5094. .ops = &msm_cdc_dma_be_ops,
  5095. },
  5096. {
  5097. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  5098. .stream_name = "RX CDC DMA1 Playback",
  5099. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  5100. .platform_name = "msm-pcm-routing",
  5101. .codec_name = "bolero_codec",
  5102. .codec_dai_name = "rx_macro_rx2",
  5103. .no_pcm = 1,
  5104. .dpcm_playback = 1,
  5105. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  5106. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5107. .ignore_pmdown_time = 1,
  5108. .ignore_suspend = 1,
  5109. .ops = &msm_cdc_dma_be_ops,
  5110. },
  5111. {
  5112. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  5113. .stream_name = "RX CDC DMA2 Playback",
  5114. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  5115. .platform_name = "msm-pcm-routing",
  5116. .codec_name = "bolero_codec",
  5117. .codec_dai_name = "rx_macro_rx3",
  5118. .no_pcm = 1,
  5119. .dpcm_playback = 1,
  5120. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  5121. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5122. .ignore_pmdown_time = 1,
  5123. .ignore_suspend = 1,
  5124. .ops = &msm_cdc_dma_be_ops,
  5125. },
  5126. {
  5127. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  5128. .stream_name = "RX CDC DMA3 Playback",
  5129. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  5130. .platform_name = "msm-pcm-routing",
  5131. .codec_name = "bolero_codec",
  5132. .codec_dai_name = "rx_macro_rx4",
  5133. .no_pcm = 1,
  5134. .dpcm_playback = 1,
  5135. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  5136. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5137. .ignore_pmdown_time = 1,
  5138. .ignore_suspend = 1,
  5139. .ops = &msm_cdc_dma_be_ops,
  5140. },
  5141. /* TX CDC DMA Backend DAI Links */
  5142. {
  5143. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  5144. .stream_name = "TX CDC DMA3 Capture",
  5145. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  5146. .platform_name = "msm-pcm-routing",
  5147. .codec_name = "bolero_codec",
  5148. .codec_dai_name = "tx_macro_tx1",
  5149. .no_pcm = 1,
  5150. .dpcm_capture = 1,
  5151. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  5152. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5153. .ignore_suspend = 1,
  5154. .ops = &msm_cdc_dma_be_ops,
  5155. },
  5156. {
  5157. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  5158. .stream_name = "TX CDC DMA4 Capture",
  5159. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  5160. .platform_name = "msm-pcm-routing",
  5161. .codec_name = "bolero_codec",
  5162. .codec_dai_name = "tx_macro_tx2",
  5163. .no_pcm = 1,
  5164. .dpcm_capture = 1,
  5165. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  5166. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5167. .ignore_suspend = 1,
  5168. .ops = &msm_cdc_dma_be_ops,
  5169. },
  5170. };
  5171. static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
  5172. {
  5173. .name = LPASS_BE_VA_CDC_DMA_TX_0,
  5174. .stream_name = "VA CDC DMA0 Capture",
  5175. .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
  5176. .platform_name = "msm-pcm-routing",
  5177. .codec_name = "bolero_codec",
  5178. .codec_dai_name = "va_macro_tx1",
  5179. .no_pcm = 1,
  5180. .dpcm_capture = 1,
  5181. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
  5182. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5183. .ignore_suspend = 1,
  5184. .ops = &msm_cdc_dma_be_ops,
  5185. },
  5186. {
  5187. .name = LPASS_BE_VA_CDC_DMA_TX_1,
  5188. .stream_name = "VA CDC DMA1 Capture",
  5189. .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
  5190. .platform_name = "msm-pcm-routing",
  5191. .codec_name = "bolero_codec",
  5192. .codec_dai_name = "va_macro_tx2",
  5193. .no_pcm = 1,
  5194. .dpcm_capture = 1,
  5195. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
  5196. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5197. .ignore_suspend = 1,
  5198. .ops = &msm_cdc_dma_be_ops,
  5199. },
  5200. {
  5201. .name = LPASS_BE_VA_CDC_DMA_TX_2,
  5202. .stream_name = "VA CDC DMA2 Capture",
  5203. .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
  5204. .platform_name = "msm-pcm-routing",
  5205. .codec_name = "bolero_codec",
  5206. .codec_dai_name = "va_macro_tx3",
  5207. .no_pcm = 1,
  5208. .dpcm_capture = 1,
  5209. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
  5210. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5211. .ignore_suspend = 1,
  5212. .ops = &msm_cdc_dma_be_ops,
  5213. },
  5214. };
  5215. static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
  5216. {
  5217. .name = LPASS_BE_AFE_LOOPBACK_TX,
  5218. .stream_name = "AFE Loopback Capture",
  5219. .cpu_dai_name = "msm-dai-q6-dev.24577",
  5220. .platform_name = "msm-pcm-routing",
  5221. .codec_name = "msm-stub-codec.1",
  5222. .codec_dai_name = "msm-stub-tx",
  5223. .no_pcm = 1,
  5224. .dpcm_capture = 1,
  5225. .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
  5226. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5227. .ignore_pmdown_time = 1,
  5228. .ignore_suspend = 1,
  5229. },
  5230. };
  5231. static struct snd_soc_dai_link msm_kona_dai_links[
  5232. ARRAY_SIZE(msm_common_dai_links) +
  5233. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  5234. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  5235. ARRAY_SIZE(msm_common_be_dai_links) +
  5236. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  5237. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  5238. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  5239. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
  5240. ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
  5241. ARRAY_SIZE(ext_disp_be_dai_link) +
  5242. ARRAY_SIZE(msm_wcn_be_dai_links) +
  5243. ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
  5244. ARRAY_SIZE(msm_wcn_btfm_be_dai_links)];
  5245. static int msm_populate_dai_link_component_of_node(
  5246. struct snd_soc_card *card)
  5247. {
  5248. int i, index, ret = 0;
  5249. struct device *cdev = card->dev;
  5250. struct snd_soc_dai_link *dai_link = card->dai_link;
  5251. struct device_node *np;
  5252. if (!cdev) {
  5253. dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
  5254. return -ENODEV;
  5255. }
  5256. for (i = 0; i < card->num_links; i++) {
  5257. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  5258. continue;
  5259. /* populate platform_of_node for snd card dai links */
  5260. if (dai_link[i].platform_name &&
  5261. !dai_link[i].platform_of_node) {
  5262. index = of_property_match_string(cdev->of_node,
  5263. "asoc-platform-names",
  5264. dai_link[i].platform_name);
  5265. if (index < 0) {
  5266. dev_err(cdev, "%s: No match found for platform name: %s\n",
  5267. __func__, dai_link[i].platform_name);
  5268. ret = index;
  5269. goto err;
  5270. }
  5271. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  5272. index);
  5273. if (!np) {
  5274. dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
  5275. __func__, dai_link[i].platform_name,
  5276. index);
  5277. ret = -ENODEV;
  5278. goto err;
  5279. }
  5280. dai_link[i].platform_of_node = np;
  5281. dai_link[i].platform_name = NULL;
  5282. }
  5283. /* populate cpu_of_node for snd card dai links */
  5284. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  5285. index = of_property_match_string(cdev->of_node,
  5286. "asoc-cpu-names",
  5287. dai_link[i].cpu_dai_name);
  5288. if (index >= 0) {
  5289. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  5290. index);
  5291. if (!np) {
  5292. dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
  5293. __func__,
  5294. dai_link[i].cpu_dai_name);
  5295. ret = -ENODEV;
  5296. goto err;
  5297. }
  5298. dai_link[i].cpu_of_node = np;
  5299. dai_link[i].cpu_dai_name = NULL;
  5300. }
  5301. }
  5302. /* populate codec_of_node for snd card dai links */
  5303. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  5304. index = of_property_match_string(cdev->of_node,
  5305. "asoc-codec-names",
  5306. dai_link[i].codec_name);
  5307. if (index < 0)
  5308. continue;
  5309. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  5310. index);
  5311. if (!np) {
  5312. dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
  5313. __func__, dai_link[i].codec_name);
  5314. ret = -ENODEV;
  5315. goto err;
  5316. }
  5317. dai_link[i].codec_of_node = np;
  5318. dai_link[i].codec_name = NULL;
  5319. }
  5320. }
  5321. err:
  5322. return ret;
  5323. }
  5324. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  5325. {
  5326. int ret = -EINVAL;
  5327. struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
  5328. if (!component) {
  5329. pr_err("* %s: No match for msm-stub-codec component\n", __func__);
  5330. return ret;
  5331. }
  5332. ret = snd_soc_add_component_controls(component, msm_snd_controls,
  5333. ARRAY_SIZE(msm_snd_controls));
  5334. if (ret < 0) {
  5335. dev_err(component->dev,
  5336. "%s: add_codec_controls failed, err = %d\n",
  5337. __func__, ret);
  5338. return ret;
  5339. }
  5340. return ret;
  5341. }
  5342. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  5343. struct snd_pcm_hw_params *params)
  5344. {
  5345. return 0;
  5346. }
  5347. static struct snd_soc_ops msm_stub_be_ops = {
  5348. .hw_params = msm_snd_stub_hw_params,
  5349. };
  5350. struct snd_soc_card snd_soc_card_stub_msm = {
  5351. .name = "kona-stub-snd-card",
  5352. };
  5353. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  5354. /* FrontEnd DAI Links */
  5355. {
  5356. .name = "MSMSTUB Media1",
  5357. .stream_name = "MultiMedia1",
  5358. .cpu_dai_name = "MultiMedia1",
  5359. .platform_name = "msm-pcm-dsp.0",
  5360. .dynamic = 1,
  5361. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5362. .dpcm_playback = 1,
  5363. .dpcm_capture = 1,
  5364. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5365. SND_SOC_DPCM_TRIGGER_POST},
  5366. .codec_dai_name = "snd-soc-dummy-dai",
  5367. .codec_name = "snd-soc-dummy",
  5368. .ignore_suspend = 1,
  5369. /* this dainlink has playback support */
  5370. .ignore_pmdown_time = 1,
  5371. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5372. },
  5373. };
  5374. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  5375. /* Backend DAI Links */
  5376. {
  5377. .name = LPASS_BE_AUXPCM_RX,
  5378. .stream_name = "AUX PCM Playback",
  5379. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  5380. .platform_name = "msm-pcm-routing",
  5381. .codec_name = "msm-stub-codec.1",
  5382. .codec_dai_name = "msm-stub-rx",
  5383. .no_pcm = 1,
  5384. .dpcm_playback = 1,
  5385. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  5386. .init = &msm_audrx_stub_init,
  5387. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5388. .ignore_pmdown_time = 1,
  5389. .ignore_suspend = 1,
  5390. .ops = &msm_stub_be_ops,
  5391. },
  5392. {
  5393. .name = LPASS_BE_AUXPCM_TX,
  5394. .stream_name = "AUX PCM Capture",
  5395. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  5396. .platform_name = "msm-pcm-routing",
  5397. .codec_name = "msm-stub-codec.1",
  5398. .codec_dai_name = "msm-stub-tx",
  5399. .no_pcm = 1,
  5400. .dpcm_capture = 1,
  5401. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  5402. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5403. .ignore_suspend = 1,
  5404. .ops = &msm_stub_be_ops,
  5405. },
  5406. };
  5407. static struct snd_soc_dai_link msm_stub_dai_links[
  5408. ARRAY_SIZE(msm_stub_fe_dai_links) +
  5409. ARRAY_SIZE(msm_stub_be_dai_links)];
  5410. static const struct of_device_id kona_asoc_machine_of_match[] = {
  5411. { .compatible = "qcom,kona-asoc-snd",
  5412. .data = "codec"},
  5413. { .compatible = "qcom,kona-asoc-snd-stub",
  5414. .data = "stub_codec"},
  5415. {},
  5416. };
  5417. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  5418. {
  5419. struct snd_soc_card *card = NULL;
  5420. struct snd_soc_dai_link *dailink = NULL;
  5421. int len_1 = 0;
  5422. int len_2 = 0;
  5423. int total_links = 0;
  5424. int rc = 0;
  5425. u32 mi2s_audio_intf = 0;
  5426. u32 auxpcm_audio_intf = 0;
  5427. u32 val = 0;
  5428. u32 wcn_btfm_intf = 0;
  5429. const struct of_device_id *match;
  5430. match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
  5431. if (!match) {
  5432. dev_err(dev, "%s: No DT match found for sound card\n",
  5433. __func__);
  5434. return NULL;
  5435. }
  5436. if (!strcmp(match->data, "codec")) {
  5437. card = &snd_soc_card_kona_msm;
  5438. memcpy(msm_kona_dai_links + total_links,
  5439. msm_common_dai_links,
  5440. sizeof(msm_common_dai_links));
  5441. total_links += ARRAY_SIZE(msm_common_dai_links);
  5442. memcpy(msm_kona_dai_links + total_links,
  5443. msm_bolero_fe_dai_links,
  5444. sizeof(msm_bolero_fe_dai_links));
  5445. total_links +=
  5446. ARRAY_SIZE(msm_bolero_fe_dai_links);
  5447. memcpy(msm_kona_dai_links + total_links,
  5448. msm_common_misc_fe_dai_links,
  5449. sizeof(msm_common_misc_fe_dai_links));
  5450. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  5451. memcpy(msm_kona_dai_links + total_links,
  5452. msm_common_be_dai_links,
  5453. sizeof(msm_common_be_dai_links));
  5454. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  5455. memcpy(msm_kona_dai_links + total_links,
  5456. msm_wsa_cdc_dma_be_dai_links,
  5457. sizeof(msm_wsa_cdc_dma_be_dai_links));
  5458. total_links +=
  5459. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  5460. memcpy(msm_kona_dai_links + total_links,
  5461. msm_rx_tx_cdc_dma_be_dai_links,
  5462. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  5463. total_links +=
  5464. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  5465. memcpy(msm_kona_dai_links + total_links,
  5466. msm_va_cdc_dma_be_dai_links,
  5467. sizeof(msm_va_cdc_dma_be_dai_links));
  5468. total_links +=
  5469. ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
  5470. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  5471. &mi2s_audio_intf);
  5472. if (rc) {
  5473. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  5474. __func__);
  5475. } else {
  5476. if (mi2s_audio_intf) {
  5477. memcpy(msm_kona_dai_links + total_links,
  5478. msm_mi2s_be_dai_links,
  5479. sizeof(msm_mi2s_be_dai_links));
  5480. total_links +=
  5481. ARRAY_SIZE(msm_mi2s_be_dai_links);
  5482. }
  5483. }
  5484. rc = of_property_read_u32(dev->of_node,
  5485. "qcom,auxpcm-audio-intf",
  5486. &auxpcm_audio_intf);
  5487. if (rc) {
  5488. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  5489. __func__);
  5490. } else {
  5491. if (auxpcm_audio_intf) {
  5492. memcpy(msm_kona_dai_links + total_links,
  5493. msm_auxpcm_be_dai_links,
  5494. sizeof(msm_auxpcm_be_dai_links));
  5495. total_links +=
  5496. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  5497. }
  5498. }
  5499. rc = of_property_read_u32(dev->of_node,
  5500. "qcom,ext-disp-audio-rx", &val);
  5501. if (!rc && val) {
  5502. dev_dbg(dev, "%s(): ext disp audio support present\n",
  5503. __func__);
  5504. memcpy(msm_kona_dai_links + total_links,
  5505. ext_disp_be_dai_link,
  5506. sizeof(ext_disp_be_dai_link));
  5507. total_links += ARRAY_SIZE(ext_disp_be_dai_link);
  5508. }
  5509. rc = of_property_read_u32(dev->of_node, "qcom,wcn-bt", &val);
  5510. if (!rc && val) {
  5511. dev_dbg(dev, "%s(): WCN BT support present\n",
  5512. __func__);
  5513. memcpy(msm_kona_dai_links + total_links,
  5514. msm_wcn_be_dai_links,
  5515. sizeof(msm_wcn_be_dai_links));
  5516. total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
  5517. }
  5518. rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
  5519. &val);
  5520. if (!rc && val) {
  5521. memcpy(msm_kona_dai_links + total_links,
  5522. msm_afe_rxtx_lb_be_dai_link,
  5523. sizeof(msm_afe_rxtx_lb_be_dai_link));
  5524. total_links +=
  5525. ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
  5526. }
  5527. rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
  5528. &wcn_btfm_intf);
  5529. if (rc) {
  5530. dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
  5531. __func__);
  5532. } else {
  5533. if (wcn_btfm_intf) {
  5534. memcpy(msm_kona_dai_links + total_links,
  5535. msm_wcn_btfm_be_dai_links,
  5536. sizeof(msm_wcn_btfm_be_dai_links));
  5537. total_links +=
  5538. ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
  5539. }
  5540. }
  5541. dailink = msm_kona_dai_links;
  5542. } else if(!strcmp(match->data, "stub_codec")) {
  5543. card = &snd_soc_card_stub_msm;
  5544. len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
  5545. len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
  5546. memcpy(msm_stub_dai_links,
  5547. msm_stub_fe_dai_links,
  5548. sizeof(msm_stub_fe_dai_links));
  5549. memcpy(msm_stub_dai_links + len_1,
  5550. msm_stub_be_dai_links,
  5551. sizeof(msm_stub_be_dai_links));
  5552. dailink = msm_stub_dai_links;
  5553. total_links = len_2;
  5554. }
  5555. if (card) {
  5556. card->dai_link = dailink;
  5557. card->num_links = total_links;
  5558. }
  5559. return card;
  5560. }
  5561. static int msm_wsa881x_init(struct snd_soc_component *component)
  5562. {
  5563. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  5564. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  5565. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  5566. SPKR_L_BOOST, SPKR_L_VI};
  5567. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  5568. SPKR_R_BOOST, SPKR_R_VI};
  5569. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  5570. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  5571. struct msm_asoc_mach_data *pdata;
  5572. struct snd_soc_dapm_context *dapm;
  5573. struct snd_card *card;
  5574. struct snd_info_entry *entry;
  5575. int ret = 0;
  5576. if (!component) {
  5577. pr_err("%s component is NULL\n", __func__);
  5578. return -EINVAL;
  5579. }
  5580. card = component->card->snd_card;
  5581. dapm = snd_soc_component_get_dapm(component);
  5582. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  5583. dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
  5584. __func__, component->name);
  5585. wsa881x_set_channel_map(component, &spkleft_ports[0],
  5586. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  5587. &ch_rate[0], &spkleft_port_types[0]);
  5588. if (dapm->component) {
  5589. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  5590. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  5591. }
  5592. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  5593. dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
  5594. __func__, component->name);
  5595. wsa881x_set_channel_map(component, &spkright_ports[0],
  5596. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  5597. &ch_rate[0], &spkright_port_types[0]);
  5598. if (dapm->component) {
  5599. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  5600. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  5601. }
  5602. } else {
  5603. dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
  5604. component->name);
  5605. ret = -EINVAL;
  5606. goto err;
  5607. }
  5608. pdata = snd_soc_card_get_drvdata(component->card);
  5609. if (!pdata->codec_root) {
  5610. entry = snd_info_create_subdir(card->module, "codecs",
  5611. card->proc_root);
  5612. if (!entry) {
  5613. pr_err("%s: Cannot create codecs module entry\n",
  5614. __func__);
  5615. ret = 0;
  5616. goto err;
  5617. }
  5618. pdata->codec_root = entry;
  5619. }
  5620. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  5621. component);
  5622. err:
  5623. return ret;
  5624. }
  5625. static int msm_aux_codec_init(struct snd_soc_component *component)
  5626. {
  5627. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  5628. int ret = 0;
  5629. void *mbhc_calibration;
  5630. struct snd_info_entry *entry;
  5631. struct snd_card *card = component->card->snd_card;
  5632. struct msm_asoc_mach_data *pdata;
  5633. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  5634. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  5635. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  5636. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  5637. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  5638. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  5639. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  5640. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  5641. snd_soc_dapm_sync(dapm);
  5642. pdata = snd_soc_card_get_drvdata(component->card);
  5643. if (!pdata->codec_root) {
  5644. entry = snd_info_create_subdir(card->module, "codecs",
  5645. card->proc_root);
  5646. if (!entry) {
  5647. dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
  5648. __func__);
  5649. ret = 0;
  5650. goto mbhc_cfg_cal;
  5651. }
  5652. pdata->codec_root = entry;
  5653. }
  5654. wcd938x_info_create_codec_entry(pdata->codec_root, component);
  5655. mbhc_cfg_cal:
  5656. mbhc_calibration = def_wcd_mbhc_cal();
  5657. if (!mbhc_calibration)
  5658. return -ENOMEM;
  5659. wcd_mbhc_cfg.calibration = mbhc_calibration;
  5660. ret = wcd938x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
  5661. if (ret) {
  5662. dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
  5663. __func__, ret);
  5664. goto err_hs_detect;
  5665. }
  5666. return 0;
  5667. err_hs_detect:
  5668. kfree(mbhc_calibration);
  5669. return ret;
  5670. }
  5671. static int msm_init_aux_dev(struct platform_device *pdev,
  5672. struct snd_soc_card *card)
  5673. {
  5674. struct device_node *wsa_of_node;
  5675. struct device_node *aux_codec_of_node;
  5676. u32 wsa_max_devs;
  5677. u32 wsa_dev_cnt;
  5678. u32 codec_aux_dev_cnt = 0;
  5679. int i;
  5680. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  5681. struct aux_codec_dev_info *aux_cdc_dev_info;
  5682. const char *auxdev_name_prefix[1];
  5683. char *dev_name_str = NULL;
  5684. int found = 0;
  5685. int codecs_found = 0;
  5686. int ret = 0;
  5687. /* Get maximum WSA device count for this platform */
  5688. ret = of_property_read_u32(pdev->dev.of_node,
  5689. "qcom,wsa-max-devs", &wsa_max_devs);
  5690. if (ret) {
  5691. dev_info(&pdev->dev,
  5692. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  5693. __func__, pdev->dev.of_node->full_name, ret);
  5694. wsa_max_devs = 0;
  5695. goto codec_aux_dev;
  5696. }
  5697. if (wsa_max_devs == 0) {
  5698. dev_warn(&pdev->dev,
  5699. "%s: Max WSA devices is 0 for this target?\n",
  5700. __func__);
  5701. goto codec_aux_dev;
  5702. }
  5703. /* Get count of WSA device phandles for this platform */
  5704. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  5705. "qcom,wsa-devs", NULL);
  5706. if (wsa_dev_cnt == -ENOENT) {
  5707. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  5708. __func__);
  5709. goto err;
  5710. } else if (wsa_dev_cnt <= 0) {
  5711. dev_err(&pdev->dev,
  5712. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  5713. __func__, wsa_dev_cnt);
  5714. ret = -EINVAL;
  5715. goto err;
  5716. }
  5717. /*
  5718. * Expect total phandles count to be NOT less than maximum possible
  5719. * WSA count. However, if it is less, then assign same value to
  5720. * max count as well.
  5721. */
  5722. if (wsa_dev_cnt < wsa_max_devs) {
  5723. dev_dbg(&pdev->dev,
  5724. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  5725. __func__, wsa_max_devs, wsa_dev_cnt);
  5726. wsa_max_devs = wsa_dev_cnt;
  5727. }
  5728. /* Make sure prefix string passed for each WSA device */
  5729. ret = of_property_count_strings(pdev->dev.of_node,
  5730. "qcom,wsa-aux-dev-prefix");
  5731. if (ret != wsa_dev_cnt) {
  5732. dev_err(&pdev->dev,
  5733. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  5734. __func__, wsa_dev_cnt, ret);
  5735. ret = -EINVAL;
  5736. goto err;
  5737. }
  5738. /*
  5739. * Alloc mem to store phandle and index info of WSA device, if already
  5740. * registered with ALSA core
  5741. */
  5742. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  5743. sizeof(struct msm_wsa881x_dev_info),
  5744. GFP_KERNEL);
  5745. if (!wsa881x_dev_info) {
  5746. ret = -ENOMEM;
  5747. goto err;
  5748. }
  5749. /*
  5750. * search and check whether all WSA devices are already
  5751. * registered with ALSA core or not. If found a node, store
  5752. * the node and the index in a local array of struct for later
  5753. * use.
  5754. */
  5755. for (i = 0; i < wsa_dev_cnt; i++) {
  5756. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  5757. "qcom,wsa-devs", i);
  5758. if (unlikely(!wsa_of_node)) {
  5759. /* we should not be here */
  5760. dev_err(&pdev->dev,
  5761. "%s: wsa dev node is not present\n",
  5762. __func__);
  5763. ret = -EINVAL;
  5764. goto err;
  5765. }
  5766. if (soc_find_component(wsa_of_node, NULL)) {
  5767. /* WSA device registered with ALSA core */
  5768. wsa881x_dev_info[found].of_node = wsa_of_node;
  5769. wsa881x_dev_info[found].index = i;
  5770. found++;
  5771. if (found == wsa_max_devs)
  5772. break;
  5773. }
  5774. }
  5775. if (found < wsa_max_devs) {
  5776. dev_dbg(&pdev->dev,
  5777. "%s: failed to find %d components. Found only %d\n",
  5778. __func__, wsa_max_devs, found);
  5779. return -EPROBE_DEFER;
  5780. }
  5781. dev_info(&pdev->dev,
  5782. "%s: found %d wsa881x devices registered with ALSA core\n",
  5783. __func__, found);
  5784. codec_aux_dev:
  5785. /* Get count of aux codec device phandles for this platform */
  5786. codec_aux_dev_cnt = of_count_phandle_with_args(
  5787. pdev->dev.of_node,
  5788. "qcom,codec-aux-devs", NULL);
  5789. if (codec_aux_dev_cnt == -ENOENT) {
  5790. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  5791. __func__);
  5792. goto err;
  5793. } else if (codec_aux_dev_cnt <= 0) {
  5794. dev_err(&pdev->dev,
  5795. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  5796. __func__, codec_aux_dev_cnt);
  5797. ret = -EINVAL;
  5798. goto err;
  5799. }
  5800. /*
  5801. * Alloc mem to store phandle and index info of aux codec
  5802. * if already registered with ALSA core
  5803. */
  5804. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  5805. sizeof(struct aux_codec_dev_info),
  5806. GFP_KERNEL);
  5807. if (!aux_cdc_dev_info) {
  5808. ret = -ENOMEM;
  5809. goto err;
  5810. }
  5811. /*
  5812. * search and check whether all aux codecs are already
  5813. * registered with ALSA core or not. If found a node, store
  5814. * the node and the index in a local array of struct for later
  5815. * use.
  5816. */
  5817. for (i = 0; i < codec_aux_dev_cnt; i++) {
  5818. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  5819. "qcom,codec-aux-devs", i);
  5820. if (unlikely(!aux_codec_of_node)) {
  5821. /* we should not be here */
  5822. dev_err(&pdev->dev,
  5823. "%s: aux codec dev node is not present\n",
  5824. __func__);
  5825. ret = -EINVAL;
  5826. goto err;
  5827. }
  5828. if (soc_find_component(aux_codec_of_node, NULL)) {
  5829. /* AUX codec registered with ALSA core */
  5830. aux_cdc_dev_info[codecs_found].of_node =
  5831. aux_codec_of_node;
  5832. aux_cdc_dev_info[codecs_found].index = i;
  5833. codecs_found++;
  5834. }
  5835. }
  5836. if (codecs_found < codec_aux_dev_cnt) {
  5837. dev_dbg(&pdev->dev,
  5838. "%s: failed to find %d components. Found only %d\n",
  5839. __func__, codec_aux_dev_cnt, codecs_found);
  5840. return -EPROBE_DEFER;
  5841. }
  5842. dev_info(&pdev->dev,
  5843. "%s: found %d AUX codecs registered with ALSA core\n",
  5844. __func__, codecs_found);
  5845. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  5846. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  5847. /* Alloc array of AUX devs struct */
  5848. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  5849. sizeof(struct snd_soc_aux_dev),
  5850. GFP_KERNEL);
  5851. if (!msm_aux_dev) {
  5852. ret = -ENOMEM;
  5853. goto err;
  5854. }
  5855. /* Alloc array of codec conf struct */
  5856. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  5857. sizeof(struct snd_soc_codec_conf),
  5858. GFP_KERNEL);
  5859. if (!msm_codec_conf) {
  5860. ret = -ENOMEM;
  5861. goto err;
  5862. }
  5863. for (i = 0; i < wsa_max_devs; i++) {
  5864. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  5865. GFP_KERNEL);
  5866. if (!dev_name_str) {
  5867. ret = -ENOMEM;
  5868. goto err;
  5869. }
  5870. ret = of_property_read_string_index(pdev->dev.of_node,
  5871. "qcom,wsa-aux-dev-prefix",
  5872. wsa881x_dev_info[i].index,
  5873. auxdev_name_prefix);
  5874. if (ret) {
  5875. dev_err(&pdev->dev,
  5876. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  5877. __func__, ret);
  5878. ret = -EINVAL;
  5879. goto err;
  5880. }
  5881. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  5882. msm_aux_dev[i].name = dev_name_str;
  5883. msm_aux_dev[i].codec_name = NULL;
  5884. msm_aux_dev[i].codec_of_node =
  5885. wsa881x_dev_info[i].of_node;
  5886. msm_aux_dev[i].init = msm_wsa881x_init;
  5887. msm_codec_conf[i].dev_name = NULL;
  5888. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  5889. msm_codec_conf[i].of_node =
  5890. wsa881x_dev_info[i].of_node;
  5891. }
  5892. for (i = 0; i < codec_aux_dev_cnt; i++) {
  5893. msm_aux_dev[wsa_max_devs + i].name = NULL;
  5894. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  5895. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  5896. aux_cdc_dev_info[i].of_node;
  5897. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  5898. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  5899. msm_codec_conf[wsa_max_devs + i].name_prefix =
  5900. NULL;
  5901. msm_codec_conf[wsa_max_devs + i].of_node =
  5902. aux_cdc_dev_info[i].of_node;
  5903. }
  5904. card->codec_conf = msm_codec_conf;
  5905. card->aux_dev = msm_aux_dev;
  5906. err:
  5907. return ret;
  5908. }
  5909. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  5910. {
  5911. int count = 0;
  5912. u32 mi2s_master_slave[MI2S_MAX];
  5913. int ret = 0;
  5914. for (count = 0; count < MI2S_MAX; count++) {
  5915. mutex_init(&mi2s_intf_conf[count].lock);
  5916. mi2s_intf_conf[count].ref_cnt = 0;
  5917. }
  5918. ret = of_property_read_u32_array(pdev->dev.of_node,
  5919. "qcom,msm-mi2s-master",
  5920. mi2s_master_slave, MI2S_MAX);
  5921. if (ret) {
  5922. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  5923. __func__);
  5924. } else {
  5925. for (count = 0; count < MI2S_MAX; count++) {
  5926. mi2s_intf_conf[count].msm_is_mi2s_master =
  5927. mi2s_master_slave[count];
  5928. }
  5929. }
  5930. }
  5931. static void msm_i2s_auxpcm_deinit(void)
  5932. {
  5933. int count = 0;
  5934. for (count = 0; count < MI2S_MAX; count++) {
  5935. mutex_destroy(&mi2s_intf_conf[count].lock);
  5936. mi2s_intf_conf[count].ref_cnt = 0;
  5937. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  5938. }
  5939. }
  5940. static int kona_ssr_enable(struct device *dev, void *data)
  5941. {
  5942. struct platform_device *pdev = to_platform_device(dev);
  5943. struct snd_soc_card *card = platform_get_drvdata(pdev);
  5944. int ret = 0;
  5945. if (!card) {
  5946. dev_err(dev, "%s: card is NULL\n", __func__);
  5947. ret = -EINVAL;
  5948. goto err;
  5949. }
  5950. if (!strcmp(card->name, "kona-stub-snd-card")) {
  5951. /* TODO */
  5952. dev_dbg(dev, "%s: TODO \n", __func__);
  5953. }
  5954. snd_soc_card_change_online_state(card, 1);
  5955. dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
  5956. err:
  5957. return ret;
  5958. }
  5959. static void kona_ssr_disable(struct device *dev, void *data)
  5960. {
  5961. struct platform_device *pdev = to_platform_device(dev);
  5962. struct snd_soc_card *card = platform_get_drvdata(pdev);
  5963. if (!card) {
  5964. dev_err(dev, "%s: card is NULL\n", __func__);
  5965. return;
  5966. }
  5967. dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
  5968. snd_soc_card_change_online_state(card, 0);
  5969. if (!strcmp(card->name, "kona-stub-snd-card")) {
  5970. /* TODO */
  5971. dev_dbg(dev, "%s: TODO \n", __func__);
  5972. }
  5973. }
  5974. static const struct snd_event_ops kona_ssr_ops = {
  5975. .enable = kona_ssr_enable,
  5976. .disable = kona_ssr_disable,
  5977. };
  5978. static int msm_audio_ssr_compare(struct device *dev, void *data)
  5979. {
  5980. struct device_node *node = data;
  5981. dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
  5982. __func__, dev->of_node, node);
  5983. return (dev->of_node && dev->of_node == node);
  5984. }
  5985. static int msm_audio_ssr_register(struct device *dev)
  5986. {
  5987. struct device_node *np = dev->of_node;
  5988. struct snd_event_clients *ssr_clients = NULL;
  5989. struct device_node *node = NULL;
  5990. int ret = 0;
  5991. int i = 0;
  5992. for (i = 0; ; i++) {
  5993. node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
  5994. if (!node)
  5995. break;
  5996. snd_event_mstr_add_client(&ssr_clients,
  5997. msm_audio_ssr_compare, node);
  5998. }
  5999. ret = snd_event_master_register(dev, &kona_ssr_ops,
  6000. ssr_clients, NULL);
  6001. if (!ret)
  6002. snd_event_notify(dev, SND_EVENT_UP);
  6003. return ret;
  6004. }
  6005. static int msm_asoc_machine_probe(struct platform_device *pdev)
  6006. {
  6007. struct snd_soc_card *card = NULL;
  6008. struct msm_asoc_mach_data *pdata = NULL;
  6009. const char *mbhc_audio_jack_type = NULL;
  6010. int ret = 0;
  6011. if (!pdev->dev.of_node) {
  6012. dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
  6013. return -EINVAL;
  6014. }
  6015. pdata = devm_kzalloc(&pdev->dev,
  6016. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  6017. if (!pdata)
  6018. return -ENOMEM;
  6019. card = populate_snd_card_dailinks(&pdev->dev);
  6020. if (!card) {
  6021. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  6022. ret = -EINVAL;
  6023. goto err;
  6024. }
  6025. card->dev = &pdev->dev;
  6026. platform_set_drvdata(pdev, card);
  6027. snd_soc_card_set_drvdata(card, pdata);
  6028. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  6029. if (ret) {
  6030. dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
  6031. __func__, ret);
  6032. goto err;
  6033. }
  6034. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  6035. if (ret) {
  6036. dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
  6037. __func__, ret);
  6038. goto err;
  6039. }
  6040. ret = msm_populate_dai_link_component_of_node(card);
  6041. if (ret) {
  6042. ret = -EPROBE_DEFER;
  6043. goto err;
  6044. }
  6045. ret = msm_init_aux_dev(pdev, card);
  6046. if (ret)
  6047. goto err;
  6048. ret = devm_snd_soc_register_card(&pdev->dev, card);
  6049. if (ret == -EPROBE_DEFER) {
  6050. if (codec_reg_done)
  6051. ret = -EINVAL;
  6052. goto err;
  6053. } else if (ret) {
  6054. dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
  6055. __func__, ret);
  6056. goto err;
  6057. }
  6058. dev_info(&pdev->dev, "%s: Sound card %s registered\n",
  6059. __func__, card->name);
  6060. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6061. "qcom,hph-en1-gpio", 0);
  6062. if (!pdata->hph_en1_gpio_p) {
  6063. dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
  6064. __func__, "qcom,hph-en1-gpio",
  6065. pdev->dev.of_node->full_name);
  6066. }
  6067. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6068. "qcom,hph-en0-gpio", 0);
  6069. if (!pdata->hph_en0_gpio_p) {
  6070. dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
  6071. __func__, "qcom,hph-en0-gpio",
  6072. pdev->dev.of_node->full_name);
  6073. }
  6074. ret = of_property_read_string(pdev->dev.of_node,
  6075. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  6076. if (ret) {
  6077. dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
  6078. __func__, "qcom,mbhc-audio-jack-type",
  6079. pdev->dev.of_node->full_name);
  6080. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  6081. } else {
  6082. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  6083. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  6084. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  6085. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  6086. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  6087. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  6088. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  6089. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  6090. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  6091. } else {
  6092. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  6093. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  6094. }
  6095. }
  6096. /*
  6097. * Parse US-Euro gpio info from DT. Report no error if us-euro
  6098. * entry is not found in DT file as some targets do not support
  6099. * US-Euro detection
  6100. */
  6101. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6102. "qcom,us-euro-gpios", 0);
  6103. if (!pdata->us_euro_gpio_p) {
  6104. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  6105. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  6106. } else {
  6107. dev_dbg(&pdev->dev, "%s detected\n",
  6108. "qcom,us-euro-gpios");
  6109. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  6110. }
  6111. if (wcd_mbhc_cfg.enable_usbc_analog)
  6112. wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
  6113. pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
  6114. "fsa4480-i2c-handle", 0);
  6115. if (!pdata->fsa_handle)
  6116. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  6117. "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
  6118. msm_i2s_auxpcm_init(pdev);
  6119. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6120. "qcom,cdc-dmic01-gpios",
  6121. 0);
  6122. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6123. "qcom,cdc-dmic23-gpios",
  6124. 0);
  6125. pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6126. "qcom,cdc-dmic45-gpios",
  6127. 0);
  6128. ret = msm_audio_ssr_register(&pdev->dev);
  6129. if (ret)
  6130. pr_err("%s: Registration with SND event FWK failed ret = %d\n",
  6131. __func__, ret);
  6132. is_initial_boot = true;
  6133. return 0;
  6134. err:
  6135. devm_kfree(&pdev->dev, pdata);
  6136. return ret;
  6137. }
  6138. static int msm_asoc_machine_remove(struct platform_device *pdev)
  6139. {
  6140. struct snd_soc_card *card = platform_get_drvdata(pdev);
  6141. snd_event_master_deregister(&pdev->dev);
  6142. snd_soc_unregister_card(card);
  6143. msm_i2s_auxpcm_deinit();
  6144. return 0;
  6145. }
  6146. static struct platform_driver kona_asoc_machine_driver = {
  6147. .driver = {
  6148. .name = DRV_NAME,
  6149. .owner = THIS_MODULE,
  6150. .pm = &snd_soc_pm_ops,
  6151. .of_match_table = kona_asoc_machine_of_match,
  6152. },
  6153. .probe = msm_asoc_machine_probe,
  6154. .remove = msm_asoc_machine_remove,
  6155. };
  6156. module_platform_driver(kona_asoc_machine_driver);
  6157. MODULE_DESCRIPTION("ALSA SoC msm");
  6158. MODULE_LICENSE("GPL v2");
  6159. MODULE_ALIAS("platform:" DRV_NAME);
  6160. MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);