dp_rx.h 36 KB

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  1. /*
  2. * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _DP_RX_H
  19. #define _DP_RX_H
  20. #include "hal_rx.h"
  21. #include "dp_tx.h"
  22. #include "dp_peer.h"
  23. #include "dp_internal.h"
  24. #ifdef RXDMA_OPTIMIZATION
  25. #ifdef NO_RX_PKT_HDR_TLV
  26. #define RX_BUFFER_ALIGNMENT 0
  27. #else
  28. #define RX_BUFFER_ALIGNMENT 128
  29. #endif /* NO_RX_PKT_HDR_TLV */
  30. #else /* RXDMA_OPTIMIZATION */
  31. #define RX_BUFFER_ALIGNMENT 4
  32. #endif /* RXDMA_OPTIMIZATION */
  33. #ifdef QCA_HOST2FW_RXBUF_RING
  34. #define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW1_BM
  35. /**
  36. * For MCL cases, allocate as many RX descriptors as buffers in the SW2RXDMA
  37. * ring. This value may need to be tuned later.
  38. */
  39. #define DP_RX_DESC_ALLOC_MULTIPLIER 1
  40. #else
  41. #define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW3_BM
  42. /**
  43. * AP use cases need to allocate more RX Descriptors than the number of
  44. * entries avaialable in the SW2RXDMA buffer replenish ring. This is to account
  45. * for frames sitting in REO queues, HW-HW DMA rings etc. Hence using a
  46. * multiplication factor of 3, to allocate three times as many RX descriptors
  47. * as RX buffers.
  48. */
  49. #define DP_RX_DESC_ALLOC_MULTIPLIER 3
  50. #endif /* QCA_HOST2FW_RXBUF_RING */
  51. #define RX_BUFFER_RESERVATION 0
  52. #define DP_PEER_METADATA_PEER_ID_MASK 0x0000ffff
  53. #define DP_PEER_METADATA_PEER_ID_SHIFT 0
  54. #define DP_PEER_METADATA_VDEV_ID_MASK 0x00070000
  55. #define DP_PEER_METADATA_VDEV_ID_SHIFT 16
  56. #define DP_PEER_METADATA_PEER_ID_GET(_peer_metadata) \
  57. (((_peer_metadata) & DP_PEER_METADATA_PEER_ID_MASK) \
  58. >> DP_PEER_METADATA_PEER_ID_SHIFT)
  59. #define DP_PEER_METADATA_ID_GET(_peer_metadata) \
  60. (((_peer_metadata) & DP_PEER_METADATA_VDEV_ID_MASK) \
  61. >> DP_PEER_METADATA_VDEV_ID_SHIFT)
  62. #define DP_RX_DESC_MAGIC 0xdec0de
  63. /**
  64. * struct dp_rx_desc
  65. *
  66. * @nbuf : VA of the "skb" posted
  67. * @rx_buf_start : VA of the original Rx buffer, before
  68. * movement of any skb->data pointer
  69. * @cookie : index into the sw array which holds
  70. * the sw Rx descriptors
  71. * Cookie space is 21 bits:
  72. * lower 18 bits -- index
  73. * upper 3 bits -- pool_id
  74. * @pool_id : pool Id for which this allocated.
  75. * Can only be used if there is no flow
  76. * steering
  77. * @in_use rx_desc is in use
  78. * @unmapped used to mark rx_desc an unmapped if the corresponding
  79. * nbuf is already unmapped
  80. */
  81. struct dp_rx_desc {
  82. qdf_nbuf_t nbuf;
  83. uint8_t *rx_buf_start;
  84. uint32_t cookie;
  85. uint8_t pool_id;
  86. #ifdef RX_DESC_DEBUG_CHECK
  87. uint32_t magic;
  88. #endif
  89. uint8_t in_use:1,
  90. unmapped:1;
  91. };
  92. /* RX Descriptor Multi Page memory alloc related */
  93. #define DP_RX_DESC_OFFSET_NUM_BITS 8
  94. #define DP_RX_DESC_PAGE_ID_NUM_BITS 8
  95. #define DP_RX_DESC_POOL_ID_NUM_BITS 4
  96. #define DP_RX_DESC_PAGE_ID_SHIFT DP_RX_DESC_OFFSET_NUM_BITS
  97. #define DP_RX_DESC_POOL_ID_SHIFT \
  98. (DP_RX_DESC_OFFSET_NUM_BITS + DP_RX_DESC_PAGE_ID_NUM_BITS)
  99. #define RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK \
  100. (((1 << DP_RX_DESC_POOL_ID_NUM_BITS) - 1) << DP_RX_DESC_POOL_ID_SHIFT)
  101. #define RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK \
  102. (((1 << DP_RX_DESC_PAGE_ID_NUM_BITS) - 1) << \
  103. DP_RX_DESC_PAGE_ID_SHIFT)
  104. #define RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK \
  105. ((1 << DP_RX_DESC_OFFSET_NUM_BITS) - 1)
  106. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(_cookie) \
  107. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK) >> \
  108. DP_RX_DESC_POOL_ID_SHIFT)
  109. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(_cookie) \
  110. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK) >> \
  111. DP_RX_DESC_PAGE_ID_SHIFT)
  112. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(_cookie) \
  113. ((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK)
  114. #define RX_DESC_COOKIE_INDEX_SHIFT 0
  115. #define RX_DESC_COOKIE_INDEX_MASK 0x3ffff /* 18 bits */
  116. #define RX_DESC_COOKIE_POOL_ID_SHIFT 18
  117. #define RX_DESC_COOKIE_POOL_ID_MASK 0x1c0000
  118. #define DP_RX_DESC_COOKIE_MAX \
  119. (RX_DESC_COOKIE_INDEX_MASK | RX_DESC_COOKIE_POOL_ID_MASK)
  120. #define DP_RX_DESC_COOKIE_POOL_ID_GET(_cookie) \
  121. (((_cookie) & RX_DESC_COOKIE_POOL_ID_MASK) >> \
  122. RX_DESC_COOKIE_POOL_ID_SHIFT)
  123. #define DP_RX_DESC_COOKIE_INDEX_GET(_cookie) \
  124. (((_cookie) & RX_DESC_COOKIE_INDEX_MASK) >> \
  125. RX_DESC_COOKIE_INDEX_SHIFT)
  126. /* DOC: Offset to obtain LLC hdr
  127. *
  128. * In the case of Wifi parse error
  129. * to reach LLC header from beginning
  130. * of VLAN tag we need to skip 8 bytes.
  131. * Vlan_tag(4)+length(2)+length added
  132. * by HW(2) = 8 bytes.
  133. */
  134. #define DP_SKIP_VLAN 8
  135. /**
  136. * struct dp_rx_cached_buf - rx cached buffer
  137. * @list: linked list node
  138. * @buf: skb buffer
  139. */
  140. struct dp_rx_cached_buf {
  141. qdf_list_node_t node;
  142. qdf_nbuf_t buf;
  143. };
  144. /*
  145. *dp_rx_xor_block() - xor block of data
  146. *@b: destination data block
  147. *@a: source data block
  148. *@len: length of the data to process
  149. *
  150. *Returns: None
  151. */
  152. static inline void dp_rx_xor_block(uint8_t *b, const uint8_t *a, qdf_size_t len)
  153. {
  154. qdf_size_t i;
  155. for (i = 0; i < len; i++)
  156. b[i] ^= a[i];
  157. }
  158. /*
  159. *dp_rx_rotl() - rotate the bits left
  160. *@val: unsigned integer input value
  161. *@bits: number of bits
  162. *
  163. *Returns: Integer with left rotated by number of 'bits'
  164. */
  165. static inline uint32_t dp_rx_rotl(uint32_t val, int bits)
  166. {
  167. return (val << bits) | (val >> (32 - bits));
  168. }
  169. /*
  170. *dp_rx_rotr() - rotate the bits right
  171. *@val: unsigned integer input value
  172. *@bits: number of bits
  173. *
  174. *Returns: Integer with right rotated by number of 'bits'
  175. */
  176. static inline uint32_t dp_rx_rotr(uint32_t val, int bits)
  177. {
  178. return (val >> bits) | (val << (32 - bits));
  179. }
  180. /*
  181. * dp_set_rx_queue() - set queue_mapping in skb
  182. * @nbuf: skb
  183. * @queue_id: rx queue_id
  184. *
  185. * Return: void
  186. */
  187. #ifdef QCA_OL_RX_MULTIQ_SUPPORT
  188. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  189. {
  190. qdf_nbuf_record_rx_queue(nbuf, queue_id);
  191. return;
  192. }
  193. #else
  194. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  195. {
  196. }
  197. #endif
  198. /*
  199. *dp_rx_xswap() - swap the bits left
  200. *@val: unsigned integer input value
  201. *
  202. *Returns: Integer with bits swapped
  203. */
  204. static inline uint32_t dp_rx_xswap(uint32_t val)
  205. {
  206. return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
  207. }
  208. /*
  209. *dp_rx_get_le32_split() - get little endian 32 bits split
  210. *@b0: byte 0
  211. *@b1: byte 1
  212. *@b2: byte 2
  213. *@b3: byte 3
  214. *
  215. *Returns: Integer with split little endian 32 bits
  216. */
  217. static inline uint32_t dp_rx_get_le32_split(uint8_t b0, uint8_t b1, uint8_t b2,
  218. uint8_t b3)
  219. {
  220. return b0 | (b1 << 8) | (b2 << 16) | (b3 << 24);
  221. }
  222. /*
  223. *dp_rx_get_le32() - get little endian 32 bits
  224. *@b0: byte 0
  225. *@b1: byte 1
  226. *@b2: byte 2
  227. *@b3: byte 3
  228. *
  229. *Returns: Integer with little endian 32 bits
  230. */
  231. static inline uint32_t dp_rx_get_le32(const uint8_t *p)
  232. {
  233. return dp_rx_get_le32_split(p[0], p[1], p[2], p[3]);
  234. }
  235. /*
  236. * dp_rx_put_le32() - put little endian 32 bits
  237. * @p: destination char array
  238. * @v: source 32-bit integer
  239. *
  240. * Returns: None
  241. */
  242. static inline void dp_rx_put_le32(uint8_t *p, uint32_t v)
  243. {
  244. p[0] = (v) & 0xff;
  245. p[1] = (v >> 8) & 0xff;
  246. p[2] = (v >> 16) & 0xff;
  247. p[3] = (v >> 24) & 0xff;
  248. }
  249. /* Extract michal mic block of data */
  250. #define dp_rx_michael_block(l, r) \
  251. do { \
  252. r ^= dp_rx_rotl(l, 17); \
  253. l += r; \
  254. r ^= dp_rx_xswap(l); \
  255. l += r; \
  256. r ^= dp_rx_rotl(l, 3); \
  257. l += r; \
  258. r ^= dp_rx_rotr(l, 2); \
  259. l += r; \
  260. } while (0)
  261. /**
  262. * struct dp_rx_desc_list_elem_t
  263. *
  264. * @next : Next pointer to form free list
  265. * @rx_desc : DP Rx descriptor
  266. */
  267. union dp_rx_desc_list_elem_t {
  268. union dp_rx_desc_list_elem_t *next;
  269. struct dp_rx_desc rx_desc;
  270. };
  271. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  272. /**
  273. * dp_rx_desc_find() - find dp rx descriptor from page ID and offset
  274. * @page_id: Page ID
  275. * @offset: Offset of the descriptor element
  276. *
  277. * Return: RX descriptor element
  278. */
  279. union dp_rx_desc_list_elem_t *dp_rx_desc_find(uint16_t page_id, uint16_t offset,
  280. struct rx_desc_pool *rx_pool);
  281. static inline
  282. struct dp_rx_desc *dp_get_rx_desc_from_cookie(struct dp_soc *soc,
  283. struct rx_desc_pool *pool,
  284. uint32_t cookie)
  285. {
  286. uint8_t pool_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(cookie);
  287. uint16_t page_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(cookie);
  288. uint8_t offset = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(cookie);
  289. struct rx_desc_pool *rx_desc_pool;
  290. union dp_rx_desc_list_elem_t *rx_desc_elem;
  291. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  292. return NULL;
  293. rx_desc_pool = &pool[pool_id];
  294. rx_desc_elem = (union dp_rx_desc_list_elem_t *)
  295. (rx_desc_pool->desc_pages.cacheable_pages[page_id] +
  296. rx_desc_pool->elem_size * offset);
  297. return &rx_desc_elem->rx_desc;
  298. }
  299. /**
  300. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  301. * the Rx descriptor on Rx DMA source ring buffer
  302. * @soc: core txrx main context
  303. * @cookie: cookie used to lookup virtual address
  304. *
  305. * Return: Pointer to the Rx descriptor
  306. */
  307. static inline
  308. struct dp_rx_desc *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc,
  309. uint32_t cookie)
  310. {
  311. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_buf[0], cookie);
  312. }
  313. /**
  314. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  315. * the Rx descriptor on monitor ring buffer
  316. * @soc: core txrx main context
  317. * @cookie: cookie used to lookup virtual address
  318. *
  319. * Return: Pointer to the Rx descriptor
  320. */
  321. static inline
  322. struct dp_rx_desc *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc,
  323. uint32_t cookie)
  324. {
  325. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_mon[0], cookie);
  326. }
  327. /**
  328. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  329. * the Rx descriptor on monitor status ring buffer
  330. * @soc: core txrx main context
  331. * @cookie: cookie used to lookup virtual address
  332. *
  333. * Return: Pointer to the Rx descriptor
  334. */
  335. static inline
  336. struct dp_rx_desc *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc,
  337. uint32_t cookie)
  338. {
  339. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_status[0], cookie);
  340. }
  341. #else
  342. /**
  343. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  344. * the Rx descriptor on Rx DMA source ring buffer
  345. * @soc: core txrx main context
  346. * @cookie: cookie used to lookup virtual address
  347. *
  348. * Return: void *: Virtual Address of the Rx descriptor
  349. */
  350. static inline
  351. void *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc, uint32_t cookie)
  352. {
  353. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  354. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  355. struct rx_desc_pool *rx_desc_pool;
  356. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  357. return NULL;
  358. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  359. if (qdf_unlikely(index >= rx_desc_pool->pool_size))
  360. return NULL;
  361. return &(soc->rx_desc_buf[pool_id].array[index].rx_desc);
  362. }
  363. /**
  364. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  365. * the Rx descriptor on monitor ring buffer
  366. * @soc: core txrx main context
  367. * @cookie: cookie used to lookup virtual address
  368. *
  369. * Return: void *: Virtual Address of the Rx descriptor
  370. */
  371. static inline
  372. void *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc, uint32_t cookie)
  373. {
  374. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  375. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  376. /* TODO */
  377. /* Add sanity for pool_id & index */
  378. return &(soc->rx_desc_mon[pool_id].array[index].rx_desc);
  379. }
  380. /**
  381. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  382. * the Rx descriptor on monitor status ring buffer
  383. * @soc: core txrx main context
  384. * @cookie: cookie used to lookup virtual address
  385. *
  386. * Return: void *: Virtual Address of the Rx descriptor
  387. */
  388. static inline
  389. void *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc, uint32_t cookie)
  390. {
  391. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  392. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  393. /* TODO */
  394. /* Add sanity for pool_id & index */
  395. return &(soc->rx_desc_status[pool_id].array[index].rx_desc);
  396. }
  397. #endif /* RX_DESC_MULTI_PAGE_ALLOC */
  398. void dp_rx_add_desc_list_to_free_list(struct dp_soc *soc,
  399. union dp_rx_desc_list_elem_t **local_desc_list,
  400. union dp_rx_desc_list_elem_t **tail,
  401. uint16_t pool_id,
  402. struct rx_desc_pool *rx_desc_pool);
  403. uint16_t dp_rx_get_free_desc_list(struct dp_soc *soc, uint32_t pool_id,
  404. struct rx_desc_pool *rx_desc_pool,
  405. uint16_t num_descs,
  406. union dp_rx_desc_list_elem_t **desc_list,
  407. union dp_rx_desc_list_elem_t **tail);
  408. QDF_STATUS dp_rx_pdev_attach(struct dp_pdev *pdev);
  409. void dp_rx_pdev_detach(struct dp_pdev *pdev);
  410. uint32_t
  411. dp_rx_process(struct dp_intr *int_ctx, void *hal_ring, uint8_t reo_ring_num,
  412. uint32_t quota);
  413. /**
  414. * dp_rx_err_process() - Processes error frames routed to REO error ring
  415. * @int_ctx: pointer to DP interrupt context
  416. * @soc: core txrx main context
  417. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  418. * @quota: No. of units (packets) that can be serviced in one shot.
  419. *
  420. * This function implements error processing and top level demultiplexer
  421. * for all the frames routed to REO error ring.
  422. *
  423. * Return: uint32_t: No. of elements processed
  424. */
  425. uint32_t dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  426. void *hal_ring, uint32_t quota);
  427. /**
  428. * dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
  429. * @int_ctx: pointer to DP interrupt context
  430. * @soc: core txrx main context
  431. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  432. * @quota: No. of units (packets) that can be serviced in one shot.
  433. *
  434. * This function implements error processing and top level demultiplexer
  435. * for all the frames routed to WBM2HOST sw release ring.
  436. *
  437. * Return: uint32_t: No. of elements processed
  438. */
  439. uint32_t
  440. dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  441. void *hal_ring, uint32_t quota);
  442. /**
  443. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  444. * multiple nbufs.
  445. * @nbuf: pointer to the first msdu of an amsdu.
  446. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  447. *
  448. * This function implements the creation of RX frag_list for cases
  449. * where an MSDU is spread across multiple nbufs.
  450. *
  451. * Return: returns the head nbuf which contains complete frag_list.
  452. */
  453. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr);
  454. /*
  455. * dp_rx_desc_pool_alloc() - create a pool of software rx_descs
  456. * at the time of dp rx initialization
  457. *
  458. * @soc: core txrx main context
  459. * @pool_id: pool_id which is one of 3 mac_ids
  460. * @pool_size: number of Rx descriptor in the pool
  461. * @rx_desc_pool: rx descriptor pool pointer
  462. *
  463. * Return: QDF status
  464. */
  465. QDF_STATUS dp_rx_desc_pool_alloc(struct dp_soc *soc, uint32_t pool_id,
  466. uint32_t pool_size, struct rx_desc_pool *pool);
  467. /*
  468. * dp_rx_desc_nbuf_and_pool_free() - free the sw rx desc pool called during
  469. * de-initialization of wifi module.
  470. *
  471. * @soc: core txrx main context
  472. * @pool_id: pool_id which is one of 3 mac_ids
  473. * @rx_desc_pool: rx descriptor pool pointer
  474. *
  475. * Return: None
  476. */
  477. void dp_rx_desc_nbuf_and_pool_free(struct dp_soc *soc, uint32_t pool_id,
  478. struct rx_desc_pool *rx_desc_pool);
  479. /*
  480. * dp_rx_desc_nbuf_free() - free the sw rx desc nbufs called during
  481. * de-initialization of wifi module.
  482. *
  483. * @soc: core txrx main context
  484. * @pool_id: pool_id which is one of 3 mac_ids
  485. * @rx_desc_pool: rx descriptor pool pointer
  486. *
  487. * Return: None
  488. */
  489. void dp_rx_desc_nbuf_free(struct dp_soc *soc,
  490. struct rx_desc_pool *rx_desc_pool);
  491. /*
  492. * dp_rx_desc_pool_free() - free the sw rx desc array called during
  493. * de-initialization of wifi module.
  494. *
  495. * @soc: core txrx main context
  496. * @rx_desc_pool: rx descriptor pool pointer
  497. *
  498. * Return: None
  499. */
  500. void dp_rx_desc_pool_free(struct dp_soc *soc,
  501. struct rx_desc_pool *rx_desc_pool);
  502. void dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  503. struct dp_peer *peer);
  504. /**
  505. * dp_rx_add_to_free_desc_list() - Adds to a local free descriptor list
  506. *
  507. * @head: pointer to the head of local free list
  508. * @tail: pointer to the tail of local free list
  509. * @new: new descriptor that is added to the free list
  510. *
  511. * Return: void:
  512. */
  513. static inline
  514. void dp_rx_add_to_free_desc_list(union dp_rx_desc_list_elem_t **head,
  515. union dp_rx_desc_list_elem_t **tail,
  516. struct dp_rx_desc *new)
  517. {
  518. qdf_assert(head && new);
  519. new->nbuf = NULL;
  520. new->in_use = 0;
  521. ((union dp_rx_desc_list_elem_t *)new)->next = *head;
  522. *head = (union dp_rx_desc_list_elem_t *)new;
  523. if (!*tail)
  524. *tail = *head;
  525. }
  526. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  527. uint8_t mac_id);
  528. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  529. qdf_nbuf_t mpdu, bool mpdu_done, uint8_t mac_id);
  530. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  531. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  532. void dp_2k_jump_handle(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  533. uint16_t peer_id, uint8_t tid);
  534. #define DP_RX_LIST_APPEND(head, tail, elem) \
  535. do { \
  536. if (!(head)) { \
  537. (head) = (elem); \
  538. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head) = 1;\
  539. } else { \
  540. qdf_nbuf_set_next((tail), (elem)); \
  541. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head)++; \
  542. } \
  543. (tail) = (elem); \
  544. qdf_nbuf_set_next((tail), NULL); \
  545. } while (0)
  546. #ifndef BUILD_X86
  547. static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
  548. qdf_dma_addr_t *paddr, struct dp_pdev *pdev)
  549. {
  550. return QDF_STATUS_SUCCESS;
  551. }
  552. #else
  553. #define MAX_RETRY 100
  554. static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
  555. qdf_dma_addr_t *paddr, struct dp_pdev *pdev)
  556. {
  557. uint32_t nbuf_retry = 0;
  558. int32_t ret;
  559. const uint32_t x86_phy_addr = 0x50000000;
  560. /*
  561. * in M2M emulation platforms (x86) the memory below 0x50000000
  562. * is reserved for target use, so any memory allocated in this
  563. * region should not be used by host
  564. */
  565. do {
  566. if (qdf_likely(*paddr > x86_phy_addr))
  567. return QDF_STATUS_SUCCESS;
  568. else {
  569. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  570. "phy addr %pK exceeded 0x50000000 trying again",
  571. paddr);
  572. nbuf_retry++;
  573. if ((*rx_netbuf)) {
  574. qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
  575. QDF_DMA_FROM_DEVICE);
  576. /* Not freeing buffer intentionally.
  577. * Observed that same buffer is getting
  578. * re-allocated resulting in longer load time
  579. * WMI init timeout.
  580. * This buffer is anyway not useful so skip it.
  581. **/
  582. }
  583. *rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  584. RX_BUFFER_SIZE,
  585. RX_BUFFER_RESERVATION,
  586. RX_BUFFER_ALIGNMENT,
  587. FALSE);
  588. if (qdf_unlikely(!(*rx_netbuf)))
  589. return QDF_STATUS_E_FAILURE;
  590. ret = qdf_nbuf_map_single(dp_soc->osdev, *rx_netbuf,
  591. QDF_DMA_FROM_DEVICE);
  592. if (qdf_unlikely(ret == QDF_STATUS_E_FAILURE)) {
  593. qdf_nbuf_free(*rx_netbuf);
  594. *rx_netbuf = NULL;
  595. continue;
  596. }
  597. *paddr = qdf_nbuf_get_frag_paddr(*rx_netbuf, 0);
  598. }
  599. } while (nbuf_retry < MAX_RETRY);
  600. if ((*rx_netbuf)) {
  601. qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
  602. QDF_DMA_FROM_DEVICE);
  603. qdf_nbuf_free(*rx_netbuf);
  604. }
  605. return QDF_STATUS_E_FAILURE;
  606. }
  607. #endif
  608. /**
  609. * dp_rx_cookie_2_link_desc_va() - Converts cookie to a virtual address of
  610. * the MSDU Link Descriptor
  611. * @soc: core txrx main context
  612. * @buf_info: buf_info include cookie that used to lookup virtual address of
  613. * link descriptor Normally this is just an index into a per SOC array.
  614. *
  615. * This is the VA of the link descriptor, that HAL layer later uses to
  616. * retrieve the list of MSDU's for a given MPDU.
  617. *
  618. * Return: void *: Virtual Address of the Rx descriptor
  619. */
  620. static inline
  621. void *dp_rx_cookie_2_link_desc_va(struct dp_soc *soc,
  622. struct hal_buf_info *buf_info)
  623. {
  624. void *link_desc_va;
  625. uint32_t bank_id = LINK_DESC_COOKIE_BANK_ID(buf_info->sw_cookie);
  626. /* TODO */
  627. /* Add sanity for cookie */
  628. link_desc_va = soc->link_desc_banks[bank_id].base_vaddr +
  629. (buf_info->paddr -
  630. soc->link_desc_banks[bank_id].base_paddr);
  631. return link_desc_va;
  632. }
  633. /**
  634. * dp_rx_cookie_2_mon_link_desc_va() - Converts cookie to a virtual address of
  635. * the MSDU Link Descriptor
  636. * @pdev: core txrx pdev context
  637. * @buf_info: buf_info includes cookie that used to lookup virtual address of
  638. * link descriptor. Normally this is just an index into a per pdev array.
  639. *
  640. * This is the VA of the link descriptor in monitor mode destination ring,
  641. * that HAL layer later uses to retrieve the list of MSDU's for a given MPDU.
  642. *
  643. * Return: void *: Virtual Address of the Rx descriptor
  644. */
  645. static inline
  646. void *dp_rx_cookie_2_mon_link_desc_va(struct dp_pdev *pdev,
  647. struct hal_buf_info *buf_info,
  648. int mac_id)
  649. {
  650. void *link_desc_va;
  651. int mac_for_pdev = dp_get_mac_id_for_mac(pdev->soc, mac_id);
  652. /* TODO */
  653. /* Add sanity for cookie */
  654. link_desc_va =
  655. pdev->link_desc_banks[mac_for_pdev][buf_info->sw_cookie].base_vaddr +
  656. (buf_info->paddr -
  657. pdev->link_desc_banks[mac_for_pdev][buf_info->sw_cookie].base_paddr);
  658. return link_desc_va;
  659. }
  660. /**
  661. * dp_rx_defrag_concat() - Concatenate the fragments
  662. *
  663. * @dst: destination pointer to the buffer
  664. * @src: source pointer from where the fragment payload is to be copied
  665. *
  666. * Return: QDF_STATUS
  667. */
  668. static inline QDF_STATUS dp_rx_defrag_concat(qdf_nbuf_t dst, qdf_nbuf_t src)
  669. {
  670. /*
  671. * Inside qdf_nbuf_cat, if it is necessary to reallocate dst
  672. * to provide space for src, the headroom portion is copied from
  673. * the original dst buffer to the larger new dst buffer.
  674. * (This is needed, because the headroom of the dst buffer
  675. * contains the rx desc.)
  676. */
  677. if (!qdf_nbuf_cat(dst, src)) {
  678. /*
  679. * qdf_nbuf_cat does not free the src memory.
  680. * Free src nbuf before returning
  681. * For failure case the caller takes of freeing the nbuf
  682. */
  683. qdf_nbuf_free(src);
  684. return QDF_STATUS_SUCCESS;
  685. }
  686. return QDF_STATUS_E_DEFRAG_ERROR;
  687. }
  688. #ifndef FEATURE_WDS
  689. static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
  690. {
  691. return QDF_STATUS_SUCCESS;
  692. }
  693. static inline void
  694. dp_rx_wds_srcport_learn(struct dp_soc *soc,
  695. uint8_t *rx_tlv_hdr,
  696. struct dp_peer *ta_peer,
  697. qdf_nbuf_t nbuf)
  698. {
  699. }
  700. #endif
  701. /*
  702. * dp_rx_desc_dump() - dump the sw rx descriptor
  703. *
  704. * @rx_desc: sw rx descriptor
  705. */
  706. static inline void dp_rx_desc_dump(struct dp_rx_desc *rx_desc)
  707. {
  708. dp_info("rx_desc->nbuf: %pK, rx_desc->cookie: %d, rx_desc->pool_id: %d, rx_desc->in_use: %d, rx_desc->unmapped: %d",
  709. rx_desc->nbuf, rx_desc->cookie, rx_desc->pool_id,
  710. rx_desc->in_use, rx_desc->unmapped);
  711. }
  712. /*
  713. * check_qwrap_multicast_loopback() - Check if rx packet is a loopback packet.
  714. * In qwrap mode, packets originated from
  715. * any vdev should not loopback and
  716. * should be dropped.
  717. * @vdev: vdev on which rx packet is received
  718. * @nbuf: rx pkt
  719. *
  720. */
  721. #if ATH_SUPPORT_WRAP
  722. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  723. qdf_nbuf_t nbuf)
  724. {
  725. struct dp_vdev *psta_vdev;
  726. struct dp_pdev *pdev = vdev->pdev;
  727. uint8_t *data = qdf_nbuf_data(nbuf);
  728. if (qdf_unlikely(vdev->proxysta_vdev)) {
  729. /* In qwrap isolation mode, allow loopback packets as all
  730. * packets go to RootAP and Loopback on the mpsta.
  731. */
  732. if (vdev->isolation_vdev)
  733. return false;
  734. TAILQ_FOREACH(psta_vdev, &pdev->vdev_list, vdev_list_elem) {
  735. if (qdf_unlikely(psta_vdev->proxysta_vdev &&
  736. !qdf_mem_cmp(psta_vdev->mac_addr.raw,
  737. &data[QDF_MAC_ADDR_SIZE],
  738. QDF_MAC_ADDR_SIZE))) {
  739. /* Drop packet if source address is equal to
  740. * any of the vdev addresses.
  741. */
  742. return true;
  743. }
  744. }
  745. }
  746. return false;
  747. }
  748. #else
  749. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  750. qdf_nbuf_t nbuf)
  751. {
  752. return false;
  753. }
  754. #endif
  755. #if defined(WLAN_SUPPORT_RX_TAG_STATISTICS) && \
  756. defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG)
  757. /**
  758. * dp_rx_update_rx_protocol_tag_stats() - Increments the protocol tag stats
  759. * for the given protocol type
  760. * @soc: core txrx main context
  761. * @pdev: TXRX pdev context for which stats should be incremented
  762. * @protocol_index: Protocol index for which the stats should be incremented
  763. * @ring_index: REO ring number from which this tag was received.
  764. *
  765. * Since HKv2 is a SMP, two or more cores may simultaneously receive packets
  766. * of same type, and hence attempt to increment counters for the same protocol
  767. * type at the same time. This creates the possibility of missing stats.
  768. *
  769. * For example, when two or more CPUs have each read the old tag value, V,
  770. * for protocol type, P and each increment the value to V+1. Instead, the
  771. * operations should have been sequenced to achieve a final value of V+2.
  772. *
  773. * In order to avoid this scenario, we can either use locks or store stats
  774. * on a per-CPU basis. Since tagging happens in the core data path, locks
  775. * are not preferred. Instead, we use a per-ring counter, since each CPU
  776. * operates on a REO ring.
  777. *
  778. * Return: void
  779. */
  780. static inline void dp_rx_update_rx_protocol_tag_stats(struct dp_pdev *pdev,
  781. uint16_t protocol_index,
  782. uint16_t ring_index)
  783. {
  784. if (ring_index >= MAX_REO_DEST_RINGS)
  785. return;
  786. pdev->reo_proto_tag_stats[ring_index][protocol_index].tag_ctr++;
  787. }
  788. #else
  789. static inline void dp_rx_update_rx_protocol_tag_stats(struct dp_pdev *pdev,
  790. uint16_t protocol_index,
  791. uint16_t ring_index)
  792. {
  793. }
  794. #endif /* WLAN_SUPPORT_RX_TAG_STATISTICS */
  795. #if defined(WLAN_SUPPORT_RX_TAG_STATISTICS) && \
  796. defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG)
  797. /**
  798. * dp_rx_update_rx_err_protocol_tag_stats() - Increments the protocol tag stats
  799. * for the given protocol type
  800. * received from exception ring
  801. * @soc: core txrx main context
  802. * @pdev: TXRX pdev context for which stats should be incremented
  803. * @protocol_index: Protocol index for which the stats should be incremented
  804. *
  805. * In HKv2, all exception packets are received on Ring-0 (along with normal
  806. * Rx). Hence tags are maintained separately for exception ring as well.
  807. *
  808. * Return: void
  809. */
  810. static inline
  811. void dp_rx_update_rx_err_protocol_tag_stats(struct dp_pdev *pdev,
  812. uint16_t protocol_index)
  813. {
  814. pdev->rx_err_proto_tag_stats[protocol_index].tag_ctr++;
  815. }
  816. #else
  817. static inline
  818. void dp_rx_update_rx_err_protocol_tag_stats(struct dp_pdev *pdev,
  819. uint16_t protocol_index)
  820. {
  821. }
  822. #endif /* WLAN_SUPPORT_RX_TAG_STATISTICS */
  823. /**
  824. * dp_rx_update_protocol_tag() - Reads CCE metadata from the RX MSDU end TLV
  825. * and set the corresponding tag in QDF packet
  826. * @soc: core txrx main context
  827. * @vdev: vdev on which the packet is received
  828. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  829. * @rx_tlv_hdr: rBbase address where the RX TLVs starts
  830. * @ring_index: REO ring number, not used for error & monitor ring
  831. * @is_reo_exception: flag to indicate if rx from REO ring or exception ring
  832. * @is_update_stats: flag to indicate whether to update stats or not
  833. * Return: void
  834. */
  835. #ifdef WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG
  836. static inline void
  837. dp_rx_update_protocol_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  838. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  839. uint16_t ring_index,
  840. bool is_reo_exception, bool is_update_stats)
  841. {
  842. uint16_t cce_metadata = RX_PROTOCOL_TAG_START_OFFSET;
  843. bool cce_match = false;
  844. struct dp_pdev *pdev;
  845. uint16_t protocol_tag = 0;
  846. if (qdf_unlikely(!vdev))
  847. return;
  848. pdev = vdev->pdev;
  849. if (qdf_likely(!pdev->is_rx_protocol_tagging_enabled))
  850. return;
  851. /*
  852. * In case of raw frames, rx_attention and rx_msdu_end tlv
  853. * may be stale or invalid. Do not tag such frames.
  854. * Default decap_type is set to ethernet for monitor vdev,
  855. * therefore, cannot check decap_type for monitor mode.
  856. * We will call this only for eth frames from dp_rx_mon_dest.c.
  857. */
  858. if (qdf_likely(!(pdev->monitor_vdev && pdev->monitor_vdev == vdev) &&
  859. (vdev->rx_decap_type != htt_cmn_pkt_type_ethernet)))
  860. return;
  861. /*
  862. * Check whether HW has filled in the CCE metadata in
  863. * this packet, if not filled, just return
  864. */
  865. if (qdf_likely(!hal_rx_msdu_cce_match_get(rx_tlv_hdr)))
  866. return;
  867. cce_match = true;
  868. /* Get the cce_metadata from RX MSDU TLV */
  869. cce_metadata = (hal_rx_msdu_cce_metadata_get(rx_tlv_hdr) &
  870. RX_MSDU_END_16_CCE_METADATA_MASK);
  871. /*
  872. * Received CCE metadata should be within the
  873. * valid limits
  874. */
  875. qdf_assert_always((cce_metadata >= RX_PROTOCOL_TAG_START_OFFSET) &&
  876. (cce_metadata < (RX_PROTOCOL_TAG_START_OFFSET +
  877. RX_PROTOCOL_TAG_MAX)));
  878. /*
  879. * The CCE metadata received is just the
  880. * packet_type + RX_PROTOCOL_TAG_START_OFFSET
  881. */
  882. cce_metadata -= RX_PROTOCOL_TAG_START_OFFSET;
  883. /*
  884. * Update the QDF packet with the user-specified
  885. * tag/metadata by looking up tag value for
  886. * received protocol type.
  887. */
  888. protocol_tag = pdev->rx_proto_tag_map[cce_metadata].tag;
  889. qdf_nbuf_set_rx_protocol_tag(nbuf, protocol_tag);
  890. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  891. "Seq:%u decap:%u CCE Match:%d ProtoID:%u Tag:%u US:%d",
  892. hal_rx_get_rx_sequence(rx_tlv_hdr),
  893. vdev->rx_decap_type, cce_match, cce_metadata,
  894. protocol_tag, is_update_stats);
  895. if (qdf_likely(!is_update_stats))
  896. return;
  897. if (qdf_unlikely(is_reo_exception)) {
  898. dp_rx_update_rx_err_protocol_tag_stats(pdev,
  899. cce_metadata);
  900. } else {
  901. dp_rx_update_rx_protocol_tag_stats(pdev,
  902. cce_metadata,
  903. ring_index);
  904. }
  905. }
  906. #else
  907. static inline void
  908. dp_rx_update_protocol_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  909. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  910. uint16_t ring_index,
  911. bool is_reo_exception, bool is_update_stats)
  912. {
  913. /* Stub API */
  914. }
  915. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG */
  916. /**
  917. * dp_rx_mon_update_protocol_tag() - Performs necessary checks for monitor mode
  918. * and then tags appropriate packets
  919. * @soc: core txrx main context
  920. * @vdev: pdev on which packet is received
  921. * @msdu: QDF packet buffer on which the protocol tag should be set
  922. * @rx_desc: base address where the RX TLVs start
  923. * Return: void
  924. */
  925. #ifdef WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG
  926. static inline
  927. void dp_rx_mon_update_protocol_tag(struct dp_soc *soc, struct dp_pdev *dp_pdev,
  928. qdf_nbuf_t msdu, void *rx_desc)
  929. {
  930. uint32_t msdu_ppdu_id = 0;
  931. struct mon_rx_status *mon_recv_status;
  932. if (qdf_likely(!dp_pdev->is_rx_protocol_tagging_enabled))
  933. return;
  934. if (qdf_likely(!dp_pdev->monitor_vdev))
  935. return;
  936. if (qdf_likely(1 != dp_pdev->ppdu_info.rx_status.rxpcu_filter_pass))
  937. return;
  938. msdu_ppdu_id = HAL_RX_HW_DESC_GET_PPDUID_GET(rx_desc);
  939. if (msdu_ppdu_id != dp_pdev->ppdu_info.com_info.ppdu_id) {
  940. QDF_TRACE(QDF_MODULE_ID_DP,
  941. QDF_TRACE_LEVEL_ERROR,
  942. "msdu_ppdu_id=%x,com_info.ppdu_id=%x",
  943. msdu_ppdu_id,
  944. dp_pdev->ppdu_info.com_info.ppdu_id);
  945. return;
  946. }
  947. /*
  948. * Update the protocol tag in SKB for packets received on BSS.
  949. * Do not update tag stats since it would double actual received count
  950. */
  951. mon_recv_status = &dp_pdev->ppdu_info.rx_status;
  952. if (mon_recv_status->frame_control_info_valid &&
  953. ((mon_recv_status->frame_control & IEEE80211_FC0_TYPE_MASK) ==
  954. IEEE80211_FC0_TYPE_DATA)) {
  955. dp_rx_update_protocol_tag(soc,
  956. dp_pdev->monitor_vdev,
  957. msdu, rx_desc,
  958. MAX_REO_DEST_RINGS,
  959. false, false);
  960. }
  961. }
  962. #else
  963. static inline
  964. void dp_rx_mon_update_protocol_tag(struct dp_soc *soc, struct dp_pdev *dp_pdev,
  965. qdf_nbuf_t msdu, void *rx_desc)
  966. {
  967. /* Stub API */
  968. }
  969. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG */
  970. /*
  971. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  972. * called during dp rx initialization
  973. * and at the end of dp_rx_process.
  974. *
  975. * @soc: core txrx main context
  976. * @mac_id: mac_id which is one of 3 mac_ids
  977. * @dp_rxdma_srng: dp rxdma circular ring
  978. * @rx_desc_pool: Pointer to free Rx descriptor pool
  979. * @num_req_buffers: number of buffer to be replenished
  980. * @desc_list: list of descs if called from dp_rx_process
  981. * or NULL during dp rx initialization or out of buffer
  982. * interrupt.
  983. * @tail: tail of descs list
  984. * Return: return success or failure
  985. */
  986. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  987. struct dp_srng *dp_rxdma_srng,
  988. struct rx_desc_pool *rx_desc_pool,
  989. uint32_t num_req_buffers,
  990. union dp_rx_desc_list_elem_t **desc_list,
  991. union dp_rx_desc_list_elem_t **tail);
  992. /*
  993. * dp_pdev_rx_buffers_attach() - replenish rxdma ring with rx nbufs
  994. * called during dp rx initialization
  995. *
  996. * @soc: core txrx main context
  997. * @mac_id: mac_id which is one of 3 mac_ids
  998. * @dp_rxdma_srng: dp rxdma circular ring
  999. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1000. * @num_req_buffers: number of buffer to be replenished
  1001. *
  1002. * Return: return success or failure
  1003. */
  1004. QDF_STATUS
  1005. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  1006. struct dp_srng *dp_rxdma_srng,
  1007. struct rx_desc_pool *rx_desc_pool,
  1008. uint32_t num_req_buffers);
  1009. /**
  1010. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  1011. * (WBM), following error handling
  1012. *
  1013. * @soc: core DP main context
  1014. * @buf_addr_info: opaque pointer to the REO error ring descriptor
  1015. * @buf_addr_info: void pointer to the buffer_addr_info
  1016. * @bm_action: put to idle_list or release to msdu_list
  1017. * Return: QDF_STATUS
  1018. */
  1019. QDF_STATUS
  1020. dp_rx_link_desc_return(struct dp_soc *soc, void *ring_desc, uint8_t bm_action);
  1021. /**
  1022. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  1023. * (WBM) by address
  1024. *
  1025. * @soc: core DP main context
  1026. * @link_desc_addr: link descriptor addr
  1027. *
  1028. * Return: QDF_STATUS
  1029. */
  1030. QDF_STATUS
  1031. dp_rx_link_desc_return_by_addr(struct dp_soc *soc, void *link_desc_addr,
  1032. uint8_t bm_action);
  1033. /**
  1034. * dp_rxdma_err_process() - RxDMA error processing functionality
  1035. * @soc: core txrx main contex
  1036. * @mac_id: mac id which is one of 3 mac_ids
  1037. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1038. * @quota: No. of units (packets) that can be serviced in one shot.
  1039. *
  1040. * Return: num of buffers processed
  1041. */
  1042. uint32_t
  1043. dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  1044. uint32_t mac_id, uint32_t quota);
  1045. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1046. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  1047. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1048. uint8_t *rx_tlv_hdr);
  1049. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr, struct dp_vdev *vdev,
  1050. struct dp_peer *peer);
  1051. qdf_nbuf_t
  1052. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev);
  1053. /*
  1054. * dp_rx_dump_info_and_assert() - dump RX Ring info and Rx Desc info
  1055. *
  1056. * @soc: core txrx main context
  1057. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1058. * @ring_desc: opaque pointer to the RX ring descriptor
  1059. * @rx_desc: host rs descriptor
  1060. *
  1061. * Return: void
  1062. */
  1063. void dp_rx_dump_info_and_assert(struct dp_soc *soc, void *hal_ring,
  1064. void *ring_desc, struct dp_rx_desc *rx_desc);
  1065. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  1066. #ifdef RX_DESC_DEBUG_CHECK
  1067. /**
  1068. * dp_rx_desc_check_magic() - check the magic value in dp_rx_desc
  1069. * @rx_desc: rx descriptor pointer
  1070. *
  1071. * Return: true, if magic is correct, else false.
  1072. */
  1073. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1074. {
  1075. if (qdf_unlikely(rx_desc->magic != DP_RX_DESC_MAGIC))
  1076. return false;
  1077. rx_desc->magic = 0;
  1078. return true;
  1079. }
  1080. /**
  1081. * dp_rx_desc_prep() - prepare rx desc
  1082. * @rx_desc: rx descriptor pointer to be prepared
  1083. * @nbuf: nbuf to be associated with rx_desc
  1084. *
  1085. * Note: assumption is that we are associating a nbuf which is mapped
  1086. *
  1087. * Return: none
  1088. */
  1089. static inline void dp_rx_desc_prep(struct dp_rx_desc *rx_desc, qdf_nbuf_t nbuf)
  1090. {
  1091. rx_desc->magic = DP_RX_DESC_MAGIC;
  1092. rx_desc->nbuf = nbuf;
  1093. rx_desc->unmapped = 0;
  1094. }
  1095. #else
  1096. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1097. {
  1098. return true;
  1099. }
  1100. static inline void dp_rx_desc_prep(struct dp_rx_desc *rx_desc, qdf_nbuf_t nbuf)
  1101. {
  1102. rx_desc->nbuf = nbuf;
  1103. rx_desc->unmapped = 0;
  1104. }
  1105. #endif /* RX_DESC_DEBUG_CHECK */
  1106. void dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1107. uint8_t *rx_tlv_hdr, struct dp_peer *peer,
  1108. uint8_t err_code, uint8_t mac_id);
  1109. #ifdef PEER_CACHE_RX_PKTS
  1110. /**
  1111. * dp_rx_flush_rx_cached() - flush cached rx frames
  1112. * @peer: peer
  1113. * @drop: set flag to drop frames
  1114. *
  1115. * Return: None
  1116. */
  1117. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop);
  1118. #else
  1119. static inline void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1120. {
  1121. }
  1122. #endif
  1123. #endif /* _DP_RX_H */