dp_rx.c 67 KB

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  1. /*
  2. * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #include "dp_ipa.h"
  31. #ifdef FEATURE_WDS
  32. #include "dp_txrx_wds.h"
  33. #endif
  34. #ifdef ATH_RX_PRI_SAVE
  35. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  36. (qdf_nbuf_set_priority(_nbuf, _tid))
  37. #else
  38. #define DP_RX_TID_SAVE(_nbuf, _tid)
  39. #endif
  40. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  41. {
  42. return vdev->ap_bridge_enabled;
  43. }
  44. #ifdef DUP_RX_DESC_WAR
  45. void dp_rx_dump_info_and_assert(struct dp_soc *soc, void *hal_ring,
  46. void *ring_desc, struct dp_rx_desc *rx_desc)
  47. {
  48. void *hal_soc = soc->hal_soc;
  49. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  50. dp_rx_desc_dump(rx_desc);
  51. }
  52. #else
  53. void dp_rx_dump_info_and_assert(struct dp_soc *soc, void *hal_ring,
  54. void *ring_desc, struct dp_rx_desc *rx_desc)
  55. {
  56. void *hal_soc = soc->hal_soc;
  57. dp_rx_desc_dump(rx_desc);
  58. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  59. hal_srng_dump_ring(hal_soc, hal_ring);
  60. qdf_assert_always(0);
  61. }
  62. #endif
  63. /*
  64. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  65. * called during dp rx initialization
  66. * and at the end of dp_rx_process.
  67. *
  68. * @soc: core txrx main context
  69. * @mac_id: mac_id which is one of 3 mac_ids
  70. * @dp_rxdma_srng: dp rxdma circular ring
  71. * @rx_desc_pool: Pointer to free Rx descriptor pool
  72. * @num_req_buffers: number of buffer to be replenished
  73. * @desc_list: list of descs if called from dp_rx_process
  74. * or NULL during dp rx initialization or out of buffer
  75. * interrupt.
  76. * @tail: tail of descs list
  77. * Return: return success or failure
  78. */
  79. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  80. struct dp_srng *dp_rxdma_srng,
  81. struct rx_desc_pool *rx_desc_pool,
  82. uint32_t num_req_buffers,
  83. union dp_rx_desc_list_elem_t **desc_list,
  84. union dp_rx_desc_list_elem_t **tail)
  85. {
  86. uint32_t num_alloc_desc;
  87. uint16_t num_desc_to_free = 0;
  88. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  89. uint32_t num_entries_avail;
  90. uint32_t count;
  91. int sync_hw_ptr = 1;
  92. qdf_dma_addr_t paddr;
  93. qdf_nbuf_t rx_netbuf;
  94. void *rxdma_ring_entry;
  95. union dp_rx_desc_list_elem_t *next;
  96. QDF_STATUS ret;
  97. void *rxdma_srng;
  98. rxdma_srng = dp_rxdma_srng->hal_srng;
  99. if (!rxdma_srng) {
  100. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  101. "rxdma srng not initialized");
  102. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  103. return QDF_STATUS_E_FAILURE;
  104. }
  105. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  106. "requested %d buffers for replenish", num_req_buffers);
  107. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  108. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  109. rxdma_srng,
  110. sync_hw_ptr);
  111. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  112. "no of available entries in rxdma ring: %d",
  113. num_entries_avail);
  114. if (!(*desc_list) && (num_entries_avail >
  115. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  116. num_req_buffers = num_entries_avail;
  117. } else if (num_entries_avail < num_req_buffers) {
  118. num_desc_to_free = num_req_buffers - num_entries_avail;
  119. num_req_buffers = num_entries_avail;
  120. }
  121. if (qdf_unlikely(!num_req_buffers)) {
  122. num_desc_to_free = num_req_buffers;
  123. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  124. goto free_descs;
  125. }
  126. /*
  127. * if desc_list is NULL, allocate the descs from freelist
  128. */
  129. if (!(*desc_list)) {
  130. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  131. rx_desc_pool,
  132. num_req_buffers,
  133. desc_list,
  134. tail);
  135. if (!num_alloc_desc) {
  136. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  137. "no free rx_descs in freelist");
  138. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  139. num_req_buffers);
  140. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  141. return QDF_STATUS_E_NOMEM;
  142. }
  143. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  144. "%d rx desc allocated", num_alloc_desc);
  145. num_req_buffers = num_alloc_desc;
  146. }
  147. count = 0;
  148. while (count < num_req_buffers) {
  149. rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  150. RX_BUFFER_SIZE,
  151. RX_BUFFER_RESERVATION,
  152. RX_BUFFER_ALIGNMENT,
  153. FALSE);
  154. if (qdf_unlikely(!rx_netbuf)) {
  155. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  156. break;
  157. }
  158. ret = qdf_nbuf_map_single(dp_soc->osdev, rx_netbuf,
  159. QDF_DMA_FROM_DEVICE);
  160. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  161. qdf_nbuf_free(rx_netbuf);
  162. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  163. continue;
  164. }
  165. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  166. /*
  167. * check if the physical address of nbuf->data is
  168. * less then 0x50000000 then free the nbuf and try
  169. * allocating new nbuf. We can try for 100 times.
  170. * this is a temp WAR till we fix it properly.
  171. */
  172. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, dp_pdev);
  173. if (ret == QDF_STATUS_E_FAILURE) {
  174. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  175. break;
  176. }
  177. count++;
  178. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  179. rxdma_srng);
  180. qdf_assert_always(rxdma_ring_entry);
  181. next = (*desc_list)->next;
  182. dp_rx_desc_prep(&((*desc_list)->rx_desc), rx_netbuf);
  183. /* rx_desc.in_use should be zero at this time*/
  184. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  185. (*desc_list)->rx_desc.in_use = 1;
  186. dp_verbose_debug("rx_netbuf=%pK, buf=%pK, paddr=0x%llx, cookie=%d",
  187. rx_netbuf, qdf_nbuf_data(rx_netbuf),
  188. (unsigned long long)paddr,
  189. (*desc_list)->rx_desc.cookie);
  190. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  191. (*desc_list)->rx_desc.cookie,
  192. rx_desc_pool->owner);
  193. *desc_list = next;
  194. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, rx_netbuf, true);
  195. }
  196. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  197. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  198. count, num_desc_to_free);
  199. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count,
  200. (RX_BUFFER_SIZE * count));
  201. free_descs:
  202. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  203. /*
  204. * add any available free desc back to the free list
  205. */
  206. if (*desc_list)
  207. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  208. mac_id, rx_desc_pool);
  209. return QDF_STATUS_SUCCESS;
  210. }
  211. /*
  212. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  213. * pkts to RAW mode simulation to
  214. * decapsulate the pkt.
  215. *
  216. * @vdev: vdev on which RAW mode is enabled
  217. * @nbuf_list: list of RAW pkts to process
  218. * @peer: peer object from which the pkt is rx
  219. *
  220. * Return: void
  221. */
  222. void
  223. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  224. struct dp_peer *peer)
  225. {
  226. qdf_nbuf_t deliver_list_head = NULL;
  227. qdf_nbuf_t deliver_list_tail = NULL;
  228. qdf_nbuf_t nbuf;
  229. nbuf = nbuf_list;
  230. while (nbuf) {
  231. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  232. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  233. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  234. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  235. /*
  236. * reset the chfrag_start and chfrag_end bits in nbuf cb
  237. * as this is a non-amsdu pkt and RAW mode simulation expects
  238. * these bit s to be 0 for non-amsdu pkt.
  239. */
  240. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  241. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  242. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  243. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  244. }
  245. nbuf = next;
  246. }
  247. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  248. &deliver_list_tail, (struct cdp_peer*) peer);
  249. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  250. }
  251. #ifdef DP_LFR
  252. /*
  253. * In case of LFR, data of a new peer might be sent up
  254. * even before peer is added.
  255. */
  256. static inline struct dp_vdev *
  257. dp_get_vdev_from_peer(struct dp_soc *soc,
  258. uint16_t peer_id,
  259. struct dp_peer *peer,
  260. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  261. {
  262. struct dp_vdev *vdev;
  263. uint8_t vdev_id;
  264. if (unlikely(!peer)) {
  265. if (peer_id != HTT_INVALID_PEER) {
  266. vdev_id = DP_PEER_METADATA_ID_GET(
  267. mpdu_desc_info.peer_meta_data);
  268. QDF_TRACE(QDF_MODULE_ID_DP,
  269. QDF_TRACE_LEVEL_DEBUG,
  270. FL("PeerID %d not found use vdevID %d"),
  271. peer_id, vdev_id);
  272. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  273. vdev_id);
  274. } else {
  275. QDF_TRACE(QDF_MODULE_ID_DP,
  276. QDF_TRACE_LEVEL_DEBUG,
  277. FL("Invalid PeerID %d"),
  278. peer_id);
  279. return NULL;
  280. }
  281. } else {
  282. vdev = peer->vdev;
  283. }
  284. return vdev;
  285. }
  286. #else
  287. static inline struct dp_vdev *
  288. dp_get_vdev_from_peer(struct dp_soc *soc,
  289. uint16_t peer_id,
  290. struct dp_peer *peer,
  291. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  292. {
  293. if (unlikely(!peer)) {
  294. QDF_TRACE(QDF_MODULE_ID_DP,
  295. QDF_TRACE_LEVEL_DEBUG,
  296. FL("Peer not found for peerID %d"),
  297. peer_id);
  298. return NULL;
  299. } else {
  300. return peer->vdev;
  301. }
  302. }
  303. #endif
  304. #ifndef FEATURE_WDS
  305. static void
  306. dp_rx_da_learn(struct dp_soc *soc,
  307. uint8_t *rx_tlv_hdr,
  308. struct dp_peer *ta_peer,
  309. qdf_nbuf_t nbuf)
  310. {
  311. }
  312. #endif
  313. /*
  314. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  315. *
  316. * @soc: core txrx main context
  317. * @ta_peer : source peer entry
  318. * @rx_tlv_hdr : start address of rx tlvs
  319. * @nbuf : nbuf that has to be intrabss forwarded
  320. *
  321. * Return: bool: true if it is forwarded else false
  322. */
  323. static bool
  324. dp_rx_intrabss_fwd(struct dp_soc *soc,
  325. struct dp_peer *ta_peer,
  326. uint8_t *rx_tlv_hdr,
  327. qdf_nbuf_t nbuf)
  328. {
  329. uint16_t da_idx;
  330. uint16_t len;
  331. uint8_t is_frag;
  332. struct dp_peer *da_peer;
  333. struct dp_ast_entry *ast_entry;
  334. qdf_nbuf_t nbuf_copy;
  335. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  336. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  337. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  338. tid_stats.tid_rx_stats[ring_id][tid];
  339. /* check if the destination peer is available in peer table
  340. * and also check if the source peer and destination peer
  341. * belong to the same vap and destination peer is not bss peer.
  342. */
  343. if ((qdf_nbuf_is_da_valid(nbuf) && !qdf_nbuf_is_da_mcbc(nbuf))) {
  344. da_idx = hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr);
  345. ast_entry = soc->ast_table[da_idx];
  346. if (!ast_entry)
  347. return false;
  348. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  349. ast_entry->is_active = TRUE;
  350. return false;
  351. }
  352. da_peer = ast_entry->peer;
  353. if (!da_peer)
  354. return false;
  355. /* TA peer cannot be same as peer(DA) on which AST is present
  356. * this indicates a change in topology and that AST entries
  357. * are yet to be updated.
  358. */
  359. if (da_peer == ta_peer)
  360. return false;
  361. if (da_peer->vdev == ta_peer->vdev && !da_peer->bss_peer) {
  362. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  363. is_frag = qdf_nbuf_is_frag(nbuf);
  364. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  365. /* linearize the nbuf just before we send to
  366. * dp_tx_send()
  367. */
  368. if (qdf_unlikely(is_frag)) {
  369. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  370. return false;
  371. nbuf = qdf_nbuf_unshare(nbuf);
  372. if (!nbuf) {
  373. DP_STATS_INC_PKT(ta_peer,
  374. rx.intra_bss.fail,
  375. 1,
  376. len);
  377. /* return true even though the pkt is
  378. * not forwarded. Basically skb_unshare
  379. * failed and we want to continue with
  380. * next nbuf.
  381. */
  382. tid_stats->fail_cnt[INTRABSS_DROP]++;
  383. return true;
  384. }
  385. }
  386. if (!dp_tx_send(dp_vdev_to_cdp_vdev(ta_peer->vdev),
  387. nbuf)) {
  388. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  389. len);
  390. return true;
  391. } else {
  392. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  393. len);
  394. tid_stats->fail_cnt[INTRABSS_DROP]++;
  395. return false;
  396. }
  397. }
  398. }
  399. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  400. * source, then clone the pkt and send the cloned pkt for
  401. * intra BSS forwarding and original pkt up the network stack
  402. * Note: how do we handle multicast pkts. do we forward
  403. * all multicast pkts as is or let a higher layer module
  404. * like igmpsnoop decide whether to forward or not with
  405. * Mcast enhancement.
  406. */
  407. else if (qdf_unlikely((qdf_nbuf_is_da_mcbc(nbuf) &&
  408. !ta_peer->bss_peer))) {
  409. nbuf_copy = qdf_nbuf_copy(nbuf);
  410. if (!nbuf_copy)
  411. return false;
  412. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  413. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  414. if (dp_tx_send(dp_vdev_to_cdp_vdev(ta_peer->vdev), nbuf_copy)) {
  415. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  416. tid_stats->fail_cnt[INTRABSS_DROP]++;
  417. qdf_nbuf_free(nbuf_copy);
  418. } else {
  419. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  420. tid_stats->intrabss_cnt++;
  421. }
  422. }
  423. /* return false as we have to still send the original pkt
  424. * up the stack
  425. */
  426. return false;
  427. }
  428. #ifdef MESH_MODE_SUPPORT
  429. /**
  430. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  431. *
  432. * @vdev: DP Virtual device handle
  433. * @nbuf: Buffer pointer
  434. * @rx_tlv_hdr: start of rx tlv header
  435. * @peer: pointer to peer
  436. *
  437. * This function allocated memory for mesh receive stats and fill the
  438. * required stats. Stores the memory address in skb cb.
  439. *
  440. * Return: void
  441. */
  442. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  443. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  444. {
  445. struct mesh_recv_hdr_s *rx_info = NULL;
  446. uint32_t pkt_type;
  447. uint32_t nss;
  448. uint32_t rate_mcs;
  449. uint32_t bw;
  450. /* fill recv mesh stats */
  451. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  452. /* upper layers are resposible to free this memory */
  453. if (!rx_info) {
  454. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  455. "Memory allocation failed for mesh rx stats");
  456. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  457. return;
  458. }
  459. rx_info->rs_flags = MESH_RXHDR_VER1;
  460. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  461. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  462. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  463. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  464. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  465. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  466. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  467. if (vdev->osif_get_key)
  468. vdev->osif_get_key(vdev->osif_vdev,
  469. &rx_info->rs_decryptkey[0],
  470. &peer->mac_addr.raw[0],
  471. rx_info->rs_keyix);
  472. }
  473. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  474. rx_info->rs_channel = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  475. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  476. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  477. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  478. nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
  479. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  480. (bw << 24);
  481. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  482. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  483. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  484. rx_info->rs_flags,
  485. rx_info->rs_rssi,
  486. rx_info->rs_channel,
  487. rx_info->rs_ratephy1,
  488. rx_info->rs_keyix);
  489. }
  490. /**
  491. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  492. *
  493. * @vdev: DP Virtual device handle
  494. * @nbuf: Buffer pointer
  495. * @rx_tlv_hdr: start of rx tlv header
  496. *
  497. * This checks if the received packet is matching any filter out
  498. * catogery and and drop the packet if it matches.
  499. *
  500. * Return: status(0 indicates drop, 1 indicate to no drop)
  501. */
  502. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  503. uint8_t *rx_tlv_hdr)
  504. {
  505. union dp_align_mac_addr mac_addr;
  506. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  507. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  508. if (hal_rx_mpdu_get_fr_ds(rx_tlv_hdr))
  509. return QDF_STATUS_SUCCESS;
  510. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  511. if (hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  512. return QDF_STATUS_SUCCESS;
  513. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  514. if (!hal_rx_mpdu_get_fr_ds(rx_tlv_hdr)
  515. && !hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  516. return QDF_STATUS_SUCCESS;
  517. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  518. if (hal_rx_mpdu_get_addr1(rx_tlv_hdr,
  519. &mac_addr.raw[0]))
  520. return QDF_STATUS_E_FAILURE;
  521. if (!qdf_mem_cmp(&mac_addr.raw[0],
  522. &vdev->mac_addr.raw[0],
  523. QDF_MAC_ADDR_SIZE))
  524. return QDF_STATUS_SUCCESS;
  525. }
  526. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  527. if (hal_rx_mpdu_get_addr2(rx_tlv_hdr,
  528. &mac_addr.raw[0]))
  529. return QDF_STATUS_E_FAILURE;
  530. if (!qdf_mem_cmp(&mac_addr.raw[0],
  531. &vdev->mac_addr.raw[0],
  532. QDF_MAC_ADDR_SIZE))
  533. return QDF_STATUS_SUCCESS;
  534. }
  535. }
  536. return QDF_STATUS_E_FAILURE;
  537. }
  538. #else
  539. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  540. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  541. {
  542. }
  543. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  544. uint8_t *rx_tlv_hdr)
  545. {
  546. return QDF_STATUS_E_FAILURE;
  547. }
  548. #endif
  549. #ifdef FEATURE_NAC_RSSI
  550. /**
  551. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  552. * clients
  553. * @pdev: DP pdev handle
  554. * @rx_pkt_hdr: Rx packet Header
  555. *
  556. * return: dp_vdev*
  557. */
  558. static
  559. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  560. uint8_t *rx_pkt_hdr)
  561. {
  562. struct ieee80211_frame *wh;
  563. struct dp_neighbour_peer *peer = NULL;
  564. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  565. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  566. return NULL;
  567. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  568. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  569. neighbour_peer_list_elem) {
  570. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  571. wh->i_addr2, QDF_MAC_ADDR_SIZE) == 0) {
  572. QDF_TRACE(
  573. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  574. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  575. peer->neighbour_peers_macaddr.raw[0],
  576. peer->neighbour_peers_macaddr.raw[1],
  577. peer->neighbour_peers_macaddr.raw[2],
  578. peer->neighbour_peers_macaddr.raw[3],
  579. peer->neighbour_peers_macaddr.raw[4],
  580. peer->neighbour_peers_macaddr.raw[5]);
  581. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  582. return pdev->monitor_vdev;
  583. }
  584. }
  585. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  586. return NULL;
  587. }
  588. /**
  589. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  590. * @soc: DP SOC handle
  591. * @mpdu: mpdu for which peer is invalid
  592. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  593. * pool_id has same mapping)
  594. *
  595. * return: integer type
  596. */
  597. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  598. uint8_t mac_id)
  599. {
  600. struct dp_invalid_peer_msg msg;
  601. struct dp_vdev *vdev = NULL;
  602. struct dp_pdev *pdev = NULL;
  603. struct ieee80211_frame *wh;
  604. qdf_nbuf_t curr_nbuf, next_nbuf;
  605. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  606. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  607. rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  608. if (!HAL_IS_DECAP_FORMAT_RAW(rx_tlv_hdr)) {
  609. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  610. "Drop decapped frames");
  611. goto free;
  612. }
  613. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  614. if (!DP_FRAME_IS_DATA(wh)) {
  615. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  616. "NAWDS valid only for data frames");
  617. goto free;
  618. }
  619. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  620. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  621. "Invalid nbuf length");
  622. goto free;
  623. }
  624. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  625. if (!pdev) {
  626. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  627. "PDEV not found");
  628. goto free;
  629. }
  630. if (pdev->filter_neighbour_peers) {
  631. /* Next Hop scenario not yet handle */
  632. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  633. if (vdev) {
  634. dp_rx_mon_deliver(soc, pdev->pdev_id,
  635. pdev->invalid_peer_head_msdu,
  636. pdev->invalid_peer_tail_msdu);
  637. pdev->invalid_peer_head_msdu = NULL;
  638. pdev->invalid_peer_tail_msdu = NULL;
  639. return 0;
  640. }
  641. }
  642. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  643. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  644. QDF_MAC_ADDR_SIZE) == 0) {
  645. goto out;
  646. }
  647. }
  648. if (!vdev) {
  649. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  650. "VDEV not found");
  651. goto free;
  652. }
  653. out:
  654. msg.wh = wh;
  655. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  656. msg.nbuf = mpdu;
  657. msg.vdev_id = vdev->vdev_id;
  658. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  659. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(pdev->ctrl_pdev,
  660. &msg);
  661. free:
  662. /* Drop and free packet */
  663. curr_nbuf = mpdu;
  664. while (curr_nbuf) {
  665. next_nbuf = qdf_nbuf_next(curr_nbuf);
  666. qdf_nbuf_free(curr_nbuf);
  667. curr_nbuf = next_nbuf;
  668. }
  669. return 0;
  670. }
  671. /**
  672. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  673. * @soc: DP SOC handle
  674. * @mpdu: mpdu for which peer is invalid
  675. * @mpdu_done: if an mpdu is completed
  676. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  677. * pool_id has same mapping)
  678. *
  679. * return: integer type
  680. */
  681. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  682. qdf_nbuf_t mpdu, bool mpdu_done,
  683. uint8_t mac_id)
  684. {
  685. /* Only trigger the process when mpdu is completed */
  686. if (mpdu_done)
  687. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  688. }
  689. #else
  690. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  691. uint8_t mac_id)
  692. {
  693. qdf_nbuf_t curr_nbuf, next_nbuf;
  694. struct dp_pdev *pdev;
  695. struct dp_vdev *vdev = NULL;
  696. struct ieee80211_frame *wh;
  697. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  698. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  699. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  700. if (!DP_FRAME_IS_DATA(wh)) {
  701. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  702. "only for data frames");
  703. goto free;
  704. }
  705. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  706. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  707. "Invalid nbuf length");
  708. goto free;
  709. }
  710. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  711. if (!pdev) {
  712. QDF_TRACE(QDF_MODULE_ID_DP,
  713. QDF_TRACE_LEVEL_ERROR,
  714. "PDEV not found");
  715. goto free;
  716. }
  717. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  718. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  719. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  720. QDF_MAC_ADDR_SIZE) == 0) {
  721. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  722. goto out;
  723. }
  724. }
  725. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  726. if (!vdev) {
  727. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  728. "VDEV not found");
  729. goto free;
  730. }
  731. out:
  732. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  733. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  734. free:
  735. /* reset the head and tail pointers */
  736. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  737. if (pdev) {
  738. pdev->invalid_peer_head_msdu = NULL;
  739. pdev->invalid_peer_tail_msdu = NULL;
  740. }
  741. /* Drop and free packet */
  742. curr_nbuf = mpdu;
  743. while (curr_nbuf) {
  744. next_nbuf = qdf_nbuf_next(curr_nbuf);
  745. qdf_nbuf_free(curr_nbuf);
  746. curr_nbuf = next_nbuf;
  747. }
  748. return 0;
  749. }
  750. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  751. qdf_nbuf_t mpdu, bool mpdu_done,
  752. uint8_t mac_id)
  753. {
  754. /* Process the nbuf */
  755. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  756. }
  757. #endif
  758. #ifdef RECEIVE_OFFLOAD
  759. /**
  760. * dp_rx_print_offload_info() - Print offload info from RX TLV
  761. * @rx_tlv: RX TLV for which offload information is to be printed
  762. *
  763. * Return: None
  764. */
  765. static void dp_rx_print_offload_info(uint8_t *rx_tlv)
  766. {
  767. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  768. dp_verbose_debug("lro_eligible 0x%x", HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  769. dp_verbose_debug("pure_ack 0x%x", HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  770. dp_verbose_debug("chksum 0x%x", HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv));
  771. dp_verbose_debug("TCP seq num 0x%x", HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  772. dp_verbose_debug("TCP ack num 0x%x", HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  773. dp_verbose_debug("TCP window 0x%x", HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  774. dp_verbose_debug("TCP protocol 0x%x", HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  775. dp_verbose_debug("TCP offset 0x%x", HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  776. dp_verbose_debug("toeplitz 0x%x", HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  777. dp_verbose_debug("---------------------------------------------------------");
  778. }
  779. /**
  780. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  781. * @soc: DP SOC handle
  782. * @rx_tlv: RX TLV received for the msdu
  783. * @msdu: msdu for which GRO info needs to be filled
  784. *
  785. * Return: None
  786. */
  787. static
  788. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  789. qdf_nbuf_t msdu)
  790. {
  791. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  792. return;
  793. /* Filling up RX offload info only for TCP packets */
  794. if (!HAL_RX_TLV_GET_TCP_PROTO(rx_tlv))
  795. return;
  796. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  797. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  798. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  799. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  800. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  801. HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv);
  802. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  803. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  804. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  805. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  806. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  807. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  808. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  809. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  810. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  811. HAL_RX_TLV_GET_IPV6(rx_tlv);
  812. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  813. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  814. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  815. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  816. dp_rx_print_offload_info(rx_tlv);
  817. }
  818. #else
  819. static void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  820. qdf_nbuf_t msdu)
  821. {
  822. }
  823. #endif /* RECEIVE_OFFLOAD */
  824. /**
  825. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  826. *
  827. * @nbuf: pointer to msdu.
  828. * @mpdu_len: mpdu length
  829. *
  830. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  831. */
  832. static inline bool dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  833. {
  834. bool last_nbuf;
  835. if (*mpdu_len > (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  836. qdf_nbuf_set_pktlen(nbuf, RX_BUFFER_SIZE);
  837. last_nbuf = false;
  838. } else {
  839. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  840. last_nbuf = true;
  841. }
  842. *mpdu_len -= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  843. return last_nbuf;
  844. }
  845. /**
  846. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  847. * multiple nbufs.
  848. * @nbuf: pointer to the first msdu of an amsdu.
  849. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  850. *
  851. *
  852. * This function implements the creation of RX frag_list for cases
  853. * where an MSDU is spread across multiple nbufs.
  854. *
  855. * Return: returns the head nbuf which contains complete frag_list.
  856. */
  857. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  858. {
  859. qdf_nbuf_t parent, next, frag_list;
  860. uint16_t frag_list_len = 0;
  861. uint16_t mpdu_len;
  862. bool last_nbuf;
  863. mpdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  864. /*
  865. * this is a case where the complete msdu fits in one single nbuf.
  866. * in this case HW sets both start and end bit and we only need to
  867. * reset these bits for RAW mode simulator to decap the pkt
  868. */
  869. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  870. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  871. qdf_nbuf_set_pktlen(nbuf, mpdu_len + RX_PKT_TLVS_LEN);
  872. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  873. return nbuf;
  874. }
  875. /*
  876. * This is a case where we have multiple msdus (A-MSDU) spread across
  877. * multiple nbufs. here we create a fraglist out of these nbufs.
  878. *
  879. * the moment we encounter a nbuf with continuation bit set we
  880. * know for sure we have an MSDU which is spread across multiple
  881. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  882. */
  883. parent = nbuf;
  884. frag_list = nbuf->next;
  885. nbuf = nbuf->next;
  886. /*
  887. * set the start bit in the first nbuf we encounter with continuation
  888. * bit set. This has the proper mpdu length set as it is the first
  889. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  890. * nbufs will form the frag_list of the parent nbuf.
  891. */
  892. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  893. last_nbuf = dp_rx_adjust_nbuf_len(parent, &mpdu_len);
  894. /*
  895. * this is where we set the length of the fragments which are
  896. * associated to the parent nbuf. We iterate through the frag_list
  897. * till we hit the last_nbuf of the list.
  898. */
  899. do {
  900. last_nbuf = dp_rx_adjust_nbuf_len(nbuf, &mpdu_len);
  901. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  902. frag_list_len += qdf_nbuf_len(nbuf);
  903. if (last_nbuf) {
  904. next = nbuf->next;
  905. nbuf->next = NULL;
  906. break;
  907. }
  908. nbuf = nbuf->next;
  909. } while (!last_nbuf);
  910. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  911. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  912. parent->next = next;
  913. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  914. return parent;
  915. }
  916. /**
  917. * dp_rx_compute_delay() - Compute and fill in all timestamps
  918. * to pass in correct fields
  919. *
  920. * @vdev: pdev handle
  921. * @tx_desc: tx descriptor
  922. * @tid: tid value
  923. * Return: none
  924. */
  925. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  926. {
  927. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  928. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  929. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  930. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  931. uint32_t interframe_delay =
  932. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  933. dp_update_delay_stats(vdev->pdev, to_stack, tid,
  934. CDP_DELAY_STATS_REAP_STACK, ring_id);
  935. /*
  936. * Update interframe delay stats calculated at deliver_data_ol point.
  937. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  938. * interframe delay will not be calculate correctly for 1st frame.
  939. * On the other side, this will help in avoiding extra per packet check
  940. * of vdev->prev_rx_deliver_tstamp.
  941. */
  942. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  943. CDP_DELAY_STATS_RX_INTERFRAME, ring_id);
  944. vdev->prev_rx_deliver_tstamp = current_ts;
  945. }
  946. /**
  947. * dp_rx_drop_nbuf_list() - drop an nbuf list
  948. * @pdev: dp pdev reference
  949. * @buf_list: buffer list to be dropepd
  950. *
  951. * Return: int (number of bufs dropped)
  952. */
  953. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  954. qdf_nbuf_t buf_list)
  955. {
  956. struct cdp_tid_rx_stats *stats = NULL;
  957. uint8_t tid = 0, ring_id = 0;
  958. int num_dropped = 0;
  959. qdf_nbuf_t buf, next_buf;
  960. buf = buf_list;
  961. while (buf) {
  962. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  963. next_buf = qdf_nbuf_queue_next(buf);
  964. tid = qdf_nbuf_get_tid_val(buf);
  965. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  966. stats->fail_cnt[INVALID_PEER_VDEV]++;
  967. stats->delivered_to_stack--;
  968. qdf_nbuf_free(buf);
  969. buf = next_buf;
  970. num_dropped++;
  971. }
  972. return num_dropped;
  973. }
  974. #ifdef PEER_CACHE_RX_PKTS
  975. /**
  976. * dp_rx_flush_rx_cached() - flush cached rx frames
  977. * @peer: peer
  978. * @drop: flag to drop frames or forward to net stack
  979. *
  980. * Return: None
  981. */
  982. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  983. {
  984. struct dp_peer_cached_bufq *bufqi;
  985. struct dp_rx_cached_buf *cache_buf = NULL;
  986. ol_txrx_rx_fp data_rx = NULL;
  987. int num_buff_elem;
  988. QDF_STATUS status;
  989. if (qdf_atomic_inc_return(&peer->flush_in_progress) > 1) {
  990. qdf_atomic_dec(&peer->flush_in_progress);
  991. return;
  992. }
  993. qdf_spin_lock_bh(&peer->peer_info_lock);
  994. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  995. data_rx = peer->vdev->osif_rx;
  996. else
  997. drop = true;
  998. qdf_spin_unlock_bh(&peer->peer_info_lock);
  999. bufqi = &peer->bufq_info;
  1000. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1001. qdf_list_remove_front(&bufqi->cached_bufq,
  1002. (qdf_list_node_t **)&cache_buf);
  1003. while (cache_buf) {
  1004. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1005. cache_buf->buf);
  1006. bufqi->entries -= num_buff_elem;
  1007. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1008. if (drop) {
  1009. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1010. cache_buf->buf);
  1011. } else {
  1012. /* Flush the cached frames to OSIF DEV */
  1013. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1014. if (status != QDF_STATUS_SUCCESS)
  1015. bufqi->dropped = dp_rx_drop_nbuf_list(
  1016. peer->vdev->pdev,
  1017. cache_buf->buf);
  1018. }
  1019. qdf_mem_free(cache_buf);
  1020. cache_buf = NULL;
  1021. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1022. qdf_list_remove_front(&bufqi->cached_bufq,
  1023. (qdf_list_node_t **)&cache_buf);
  1024. }
  1025. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1026. qdf_atomic_dec(&peer->flush_in_progress);
  1027. }
  1028. /**
  1029. * dp_rx_enqueue_rx() - cache rx frames
  1030. * @peer: peer
  1031. * @rx_buf_list: cache buffer list
  1032. *
  1033. * Return: None
  1034. */
  1035. static QDF_STATUS
  1036. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1037. {
  1038. struct dp_rx_cached_buf *cache_buf;
  1039. struct dp_peer_cached_bufq *bufqi = &peer->bufq_info;
  1040. int num_buff_elem;
  1041. QDF_TRACE_DEBUG_RL(QDF_MODULE_ID_TXRX, "bufq->curr %d bufq->drops %d",
  1042. bufqi->entries, bufqi->dropped);
  1043. if (!peer->valid) {
  1044. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1045. rx_buf_list);
  1046. return QDF_STATUS_E_INVAL;
  1047. }
  1048. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1049. if (bufqi->entries >= bufqi->thresh) {
  1050. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1051. rx_buf_list);
  1052. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1053. return QDF_STATUS_E_RESOURCES;
  1054. }
  1055. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1056. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1057. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1058. if (!cache_buf) {
  1059. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1060. "Failed to allocate buf to cache rx frames");
  1061. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1062. rx_buf_list);
  1063. return QDF_STATUS_E_NOMEM;
  1064. }
  1065. cache_buf->buf = rx_buf_list;
  1066. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1067. qdf_list_insert_back(&bufqi->cached_bufq,
  1068. &cache_buf->node);
  1069. bufqi->entries += num_buff_elem;
  1070. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1071. return QDF_STATUS_SUCCESS;
  1072. }
  1073. static inline
  1074. bool dp_rx_is_peer_cache_bufq_supported(void)
  1075. {
  1076. return true;
  1077. }
  1078. #else
  1079. static inline
  1080. bool dp_rx_is_peer_cache_bufq_supported(void)
  1081. {
  1082. return false;
  1083. }
  1084. static inline QDF_STATUS
  1085. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1086. {
  1087. return QDF_STATUS_SUCCESS;
  1088. }
  1089. #endif
  1090. static inline void dp_rx_deliver_to_stack(struct dp_vdev *vdev,
  1091. struct dp_peer *peer,
  1092. qdf_nbuf_t nbuf_head,
  1093. qdf_nbuf_t nbuf_tail)
  1094. {
  1095. /*
  1096. * highly unlikely to have a vdev without a registered rx
  1097. * callback function. if so let us free the nbuf_list.
  1098. */
  1099. if (qdf_unlikely(!vdev->osif_rx)) {
  1100. if (dp_rx_is_peer_cache_bufq_supported())
  1101. dp_rx_enqueue_rx(peer, nbuf_head);
  1102. else
  1103. dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1104. return;
  1105. }
  1106. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1107. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1108. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1109. &nbuf_tail, (struct cdp_peer *) peer);
  1110. }
  1111. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1112. }
  1113. /**
  1114. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1115. * @nbuf: pointer to the first msdu of an amsdu.
  1116. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1117. *
  1118. * The ipsumed field of the skb is set based on whether HW validated the
  1119. * IP/TCP/UDP checksum.
  1120. *
  1121. * Return: void
  1122. */
  1123. static inline void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1124. qdf_nbuf_t nbuf,
  1125. uint8_t *rx_tlv_hdr)
  1126. {
  1127. qdf_nbuf_rx_cksum_t cksum = {0};
  1128. bool ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  1129. bool tcp_udp_csum_er = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  1130. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1131. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1132. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1133. } else {
  1134. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1135. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1136. }
  1137. }
  1138. /**
  1139. * dp_rx_msdu_stats_update() - update per msdu stats.
  1140. * @soc: core txrx main context
  1141. * @nbuf: pointer to the first msdu of an amsdu.
  1142. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1143. * @peer: pointer to the peer object.
  1144. * @ring_id: reo dest ring number on which pkt is reaped.
  1145. * @tid_stats: per tid rx stats.
  1146. *
  1147. * update all the per msdu stats for that nbuf.
  1148. * Return: void
  1149. */
  1150. static void dp_rx_msdu_stats_update(struct dp_soc *soc,
  1151. qdf_nbuf_t nbuf,
  1152. uint8_t *rx_tlv_hdr,
  1153. struct dp_peer *peer,
  1154. uint8_t ring_id,
  1155. struct cdp_tid_rx_stats *tid_stats)
  1156. {
  1157. bool is_ampdu, is_not_amsdu;
  1158. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1159. struct dp_vdev *vdev = peer->vdev;
  1160. qdf_ether_header_t *eh;
  1161. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1162. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1163. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1164. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1165. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1166. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1167. tid_stats->msdu_cnt++;
  1168. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  1169. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1170. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1171. DP_STATS_INC_PKT(peer, rx.multicast, 1, msdu_len);
  1172. tid_stats->mcast_msdu_cnt++;
  1173. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1174. DP_STATS_INC_PKT(peer, rx.bcast, 1, msdu_len);
  1175. tid_stats->bcast_msdu_cnt++;
  1176. }
  1177. }
  1178. /*
  1179. * currently we can return from here as we have similar stats
  1180. * updated at per ppdu level instead of msdu level
  1181. */
  1182. if (!soc->process_rx_status)
  1183. return;
  1184. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(rx_tlv_hdr);
  1185. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1186. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1187. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  1188. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  1189. tid = qdf_nbuf_get_tid_val(nbuf);
  1190. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1191. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1192. rx_tlv_hdr);
  1193. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1194. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1195. DP_STATS_INC(peer, rx.bw[bw], 1);
  1196. /*
  1197. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1198. * then increase index [nss - 1] in array counter.
  1199. */
  1200. if (nss > 0 && (pkt_type == DOT11_N ||
  1201. pkt_type == DOT11_AC ||
  1202. pkt_type == DOT11_AX))
  1203. DP_STATS_INC(peer, rx.nss[nss - 1], 1);
  1204. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1205. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1206. hal_rx_mpdu_end_mic_err_get(rx_tlv_hdr));
  1207. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1208. hal_rx_mpdu_end_decrypt_err_get(rx_tlv_hdr));
  1209. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1210. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1211. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1212. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1213. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1214. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1215. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1216. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1217. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1218. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1219. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1220. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1221. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1222. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1223. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1224. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1225. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1226. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1227. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1228. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1229. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1230. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1231. if ((soc->process_rx_status) &&
  1232. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1233. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  1234. if (!vdev->pdev)
  1235. return;
  1236. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  1237. &peer->stats, peer->peer_ids[0],
  1238. UPDATE_PEER_STATS,
  1239. vdev->pdev->pdev_id);
  1240. #endif
  1241. }
  1242. }
  1243. static inline bool is_sa_da_idx_valid(struct dp_soc *soc,
  1244. uint8_t *rx_tlv_hdr,
  1245. qdf_nbuf_t nbuf)
  1246. {
  1247. if ((qdf_nbuf_is_sa_valid(nbuf) &&
  1248. (hal_rx_msdu_end_sa_idx_get(rx_tlv_hdr) >
  1249. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) ||
  1250. (!qdf_nbuf_is_da_mcbc(nbuf) &&
  1251. qdf_nbuf_is_da_valid(nbuf) &&
  1252. (hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr) >
  1253. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))))
  1254. return false;
  1255. return true;
  1256. }
  1257. #ifndef WDS_VENDOR_EXTENSION
  1258. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  1259. struct dp_vdev *vdev,
  1260. struct dp_peer *peer)
  1261. {
  1262. return 1;
  1263. }
  1264. #endif
  1265. #ifdef RX_DESC_DEBUG_CHECK
  1266. /**
  1267. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  1268. * corruption
  1269. *
  1270. * @ring_desc: REO ring descriptor
  1271. * @rx_desc: Rx descriptor
  1272. *
  1273. * Return: NONE
  1274. */
  1275. static inline void dp_rx_desc_nbuf_sanity_check(void *ring_desc,
  1276. struct dp_rx_desc *rx_desc)
  1277. {
  1278. struct hal_buf_info hbi;
  1279. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1280. /* Sanity check for possible buffer paddr corruption */
  1281. qdf_assert_always((&hbi)->paddr ==
  1282. qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  1283. }
  1284. #else
  1285. static inline void dp_rx_desc_nbuf_sanity_check(void *ring_desc,
  1286. struct dp_rx_desc *rx_desc)
  1287. {
  1288. }
  1289. #endif
  1290. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1291. static inline
  1292. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1293. {
  1294. bool limit_hit = false;
  1295. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1296. limit_hit =
  1297. (num_reaped >= cfg->rx_reap_loop_pkt_limit) ? true : false;
  1298. if (limit_hit)
  1299. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1300. return limit_hit;
  1301. }
  1302. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1303. {
  1304. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1305. }
  1306. #else
  1307. static inline
  1308. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1309. {
  1310. return false;
  1311. }
  1312. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1313. {
  1314. return false;
  1315. }
  1316. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1317. /**
  1318. * dp_is_special_data() - check is the pkt special like eapol, dhcp, etc
  1319. *
  1320. * @nbuf: pkt skb pointer
  1321. *
  1322. * Return: true if matched, false if not
  1323. */
  1324. static inline
  1325. bool dp_is_special_data(qdf_nbuf_t nbuf)
  1326. {
  1327. if (qdf_nbuf_is_ipv4_arp_pkt(nbuf) ||
  1328. qdf_nbuf_is_ipv4_dhcp_pkt(nbuf) ||
  1329. qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  1330. qdf_nbuf_is_ipv6_dhcp_pkt(nbuf))
  1331. return true;
  1332. else
  1333. return false;
  1334. }
  1335. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  1336. /**
  1337. * dp_rx_deliver_to_stack_no_peer() - try deliver rx data even if
  1338. * no corresbonding peer found
  1339. * @soc: core txrx main context
  1340. * @nbuf: pkt skb pointer
  1341. *
  1342. * This function will try to deliver some RX special frames to stack
  1343. * even there is no peer matched found. for instance, LFR case, some
  1344. * eapol data will be sent to host before peer_map done.
  1345. *
  1346. * Return: None
  1347. */
  1348. static inline
  1349. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1350. {
  1351. uint32_t peer_mdata;
  1352. uint16_t peer_id;
  1353. uint8_t vdev_id;
  1354. struct dp_vdev *vdev;
  1355. uint32_t l2_hdr_offset = 0;
  1356. uint16_t msdu_len = 0;
  1357. uint32_t pkt_len = 0;
  1358. uint8_t *rx_tlv_hdr;
  1359. peer_mdata = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1360. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1361. if (peer_id > soc->max_peers)
  1362. goto deliver_fail;
  1363. vdev_id = DP_PEER_METADATA_ID_GET(peer_mdata);
  1364. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc, vdev_id);
  1365. if (!vdev || !vdev->osif_rx)
  1366. goto deliver_fail;
  1367. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1368. l2_hdr_offset =
  1369. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  1370. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1371. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1372. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1373. qdf_nbuf_pull_head(nbuf,
  1374. RX_PKT_TLVS_LEN +
  1375. l2_hdr_offset);
  1376. /* only allow special frames */
  1377. if (!dp_is_special_data(nbuf))
  1378. goto deliver_fail;
  1379. vdev->osif_rx(vdev->osif_vdev, nbuf);
  1380. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  1381. return;
  1382. deliver_fail:
  1383. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1384. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1385. qdf_nbuf_free(nbuf);
  1386. }
  1387. #else
  1388. static inline
  1389. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1390. {
  1391. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1392. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1393. qdf_nbuf_free(nbuf);
  1394. }
  1395. #endif
  1396. /**
  1397. * dp_rx_process() - Brain of the Rx processing functionality
  1398. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1399. * @soc: core txrx main context
  1400. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1401. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  1402. * @quota: No. of units (packets) that can be serviced in one shot.
  1403. *
  1404. * This function implements the core of Rx functionality. This is
  1405. * expected to handle only non-error frames.
  1406. *
  1407. * Return: uint32_t: No. of elements processed
  1408. */
  1409. uint32_t dp_rx_process(struct dp_intr *int_ctx, void *hal_ring,
  1410. uint8_t reo_ring_num, uint32_t quota)
  1411. {
  1412. void *hal_soc;
  1413. void *ring_desc;
  1414. struct dp_rx_desc *rx_desc = NULL;
  1415. qdf_nbuf_t nbuf, next;
  1416. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  1417. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  1418. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  1419. uint32_t l2_hdr_offset = 0;
  1420. uint16_t msdu_len = 0;
  1421. uint16_t peer_id;
  1422. struct dp_peer *peer;
  1423. struct dp_vdev *vdev;
  1424. uint32_t pkt_len = 0;
  1425. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1426. struct hal_rx_msdu_desc_info msdu_desc_info;
  1427. enum hal_reo_error_status error;
  1428. uint32_t peer_mdata;
  1429. uint8_t *rx_tlv_hdr;
  1430. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  1431. uint8_t mac_id = 0;
  1432. struct dp_pdev *pdev;
  1433. struct dp_pdev *rx_pdev;
  1434. struct dp_srng *dp_rxdma_srng;
  1435. struct rx_desc_pool *rx_desc_pool;
  1436. struct dp_soc *soc = int_ctx->soc;
  1437. uint8_t ring_id = 0;
  1438. uint8_t core_id = 0;
  1439. struct cdp_tid_rx_stats *tid_stats;
  1440. qdf_nbuf_t nbuf_head;
  1441. qdf_nbuf_t nbuf_tail;
  1442. qdf_nbuf_t deliver_list_head;
  1443. qdf_nbuf_t deliver_list_tail;
  1444. uint32_t num_rx_bufs_reaped = 0;
  1445. uint32_t intr_id;
  1446. struct hif_opaque_softc *scn;
  1447. int32_t tid = 0;
  1448. bool is_prev_msdu_last = true;
  1449. uint32_t num_entries_avail = 0;
  1450. DP_HIST_INIT();
  1451. qdf_assert_always(soc && hal_ring);
  1452. hal_soc = soc->hal_soc;
  1453. qdf_assert_always(hal_soc);
  1454. scn = soc->hif_handle;
  1455. hif_pm_runtime_mark_last_busy(scn);
  1456. intr_id = int_ctx->dp_intr_id;
  1457. more_data:
  1458. /* reset local variables here to be re-used in the function */
  1459. nbuf_head = NULL;
  1460. nbuf_tail = NULL;
  1461. deliver_list_head = NULL;
  1462. deliver_list_tail = NULL;
  1463. peer = NULL;
  1464. vdev = NULL;
  1465. num_rx_bufs_reaped = 0;
  1466. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  1467. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  1468. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  1469. qdf_mem_zero(head, sizeof(head));
  1470. qdf_mem_zero(tail, sizeof(tail));
  1471. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring))) {
  1472. /*
  1473. * Need API to convert from hal_ring pointer to
  1474. * Ring Type / Ring Id combo
  1475. */
  1476. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1477. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1478. FL("HAL RING Access Failed -- %pK"), hal_ring);
  1479. goto done;
  1480. }
  1481. /*
  1482. * start reaping the buffers from reo ring and queue
  1483. * them in per vdev queue.
  1484. * Process the received pkts in a different per vdev loop.
  1485. */
  1486. while (qdf_likely(quota &&
  1487. (ring_desc = hal_srng_dst_peek(hal_soc, hal_ring)))) {
  1488. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  1489. ring_id = hal_srng_ring_id_get(hal_ring);
  1490. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  1491. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1492. FL("HAL RING 0x%pK:error %d"), hal_ring, error);
  1493. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  1494. /* Don't know how to deal with this -- assert */
  1495. qdf_assert(0);
  1496. }
  1497. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  1498. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  1499. qdf_assert(rx_desc);
  1500. /*
  1501. * this is a unlikely scenario where the host is reaping
  1502. * a descriptor which it already reaped just a while ago
  1503. * but is yet to replenish it back to HW.
  1504. * In this case host will dump the last 128 descriptors
  1505. * including the software descriptor rx_desc and assert.
  1506. */
  1507. if (qdf_unlikely(!rx_desc->in_use)) {
  1508. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1509. dp_info_rl("Reaping rx_desc not in use!");
  1510. dp_rx_dump_info_and_assert(soc, hal_ring,
  1511. ring_desc, rx_desc);
  1512. /* ignore duplicate RX desc and continue to process */
  1513. /* Pop out the descriptor */
  1514. hal_srng_dst_get_next(hal_soc, hal_ring);
  1515. continue;
  1516. }
  1517. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  1518. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  1519. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  1520. dp_rx_dump_info_and_assert(soc, hal_ring,
  1521. ring_desc, rx_desc);
  1522. }
  1523. dp_rx_desc_nbuf_sanity_check(ring_desc, rx_desc);
  1524. /* TODO */
  1525. /*
  1526. * Need a separate API for unmapping based on
  1527. * phyiscal address
  1528. */
  1529. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  1530. QDF_DMA_FROM_DEVICE);
  1531. rx_desc->unmapped = 1;
  1532. core_id = smp_processor_id();
  1533. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  1534. /* Get MPDU DESC info */
  1535. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  1536. /* Get MSDU DESC info */
  1537. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  1538. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  1539. HAL_MPDU_F_RAW_AMPDU)) {
  1540. /* previous msdu has end bit set, so current one is
  1541. * the new MPDU
  1542. */
  1543. if (is_prev_msdu_last) {
  1544. is_prev_msdu_last = false;
  1545. /* Get number of entries available in HW ring */
  1546. num_entries_avail =
  1547. hal_srng_dst_num_valid(hal_soc, hal_ring, 1);
  1548. /* For new MPDU check if we can read complete
  1549. * MPDU by comparing the number of buffers
  1550. * available and number of buffers needed to
  1551. * reap this MPDU
  1552. */
  1553. if (((msdu_desc_info.msdu_len /
  1554. (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN) + 1)) >
  1555. num_entries_avail)
  1556. break;
  1557. } else {
  1558. if (msdu_desc_info.msdu_flags &
  1559. HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1560. is_prev_msdu_last = true;
  1561. }
  1562. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  1563. }
  1564. /* Pop out the descriptor*/
  1565. hal_srng_dst_get_next(hal_soc, hal_ring);
  1566. rx_bufs_reaped[rx_desc->pool_id]++;
  1567. peer_mdata = mpdu_desc_info.peer_meta_data;
  1568. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  1569. DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1570. /*
  1571. * save msdu flags first, last and continuation msdu in
  1572. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  1573. * length to nbuf->cb. This ensures the info required for
  1574. * per pkt processing is always in the same cache line.
  1575. * This helps in improving throughput for smaller pkt
  1576. * sizes.
  1577. */
  1578. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  1579. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  1580. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  1581. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  1582. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1583. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  1584. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  1585. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  1586. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  1587. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  1588. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  1589. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  1590. qdf_nbuf_set_tid_val(rx_desc->nbuf,
  1591. HAL_RX_REO_QUEUE_NUMBER_GET(ring_desc));
  1592. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  1593. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  1594. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, rx_desc->nbuf);
  1595. /*
  1596. * if continuation bit is set then we have MSDU spread
  1597. * across multiple buffers, let us not decrement quota
  1598. * till we reap all buffers of that MSDU.
  1599. */
  1600. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  1601. quota -= 1;
  1602. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  1603. &tail[rx_desc->pool_id],
  1604. rx_desc);
  1605. num_rx_bufs_reaped++;
  1606. if (dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped))
  1607. break;
  1608. }
  1609. done:
  1610. dp_srng_access_end(int_ctx, soc, hal_ring);
  1611. if (nbuf_tail)
  1612. QDF_NBUF_CB_RX_FLUSH_IND(nbuf_tail) = 1;
  1613. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1614. /*
  1615. * continue with next mac_id if no pkts were reaped
  1616. * from that pool
  1617. */
  1618. if (!rx_bufs_reaped[mac_id])
  1619. continue;
  1620. pdev = soc->pdev_list[mac_id];
  1621. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1622. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1623. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1624. rx_desc_pool, rx_bufs_reaped[mac_id],
  1625. &head[mac_id], &tail[mac_id]);
  1626. }
  1627. dp_verbose_debug("replenished %u\n", rx_bufs_reaped[0]);
  1628. /* Peer can be NULL is case of LFR */
  1629. if (qdf_likely(peer))
  1630. vdev = NULL;
  1631. /*
  1632. * BIG loop where each nbuf is dequeued from global queue,
  1633. * processed and queued back on a per vdev basis. These nbufs
  1634. * are sent to stack as and when we run out of nbufs
  1635. * or a new nbuf dequeued from global queue has a different
  1636. * vdev when compared to previous nbuf.
  1637. */
  1638. nbuf = nbuf_head;
  1639. while (nbuf) {
  1640. next = nbuf->next;
  1641. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1642. /* Get TID from struct cb->tid_val, save to tid */
  1643. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  1644. tid = qdf_nbuf_get_tid_val(nbuf);
  1645. peer_mdata = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1646. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1647. peer = dp_peer_find_by_id(soc, peer_id);
  1648. if (peer) {
  1649. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  1650. qdf_dp_trace_set_track(nbuf, QDF_RX);
  1651. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  1652. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  1653. QDF_NBUF_RX_PKT_DATA_TRACK;
  1654. }
  1655. rx_bufs_used++;
  1656. if (deliver_list_head && peer && (vdev != peer->vdev)) {
  1657. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1658. deliver_list_tail);
  1659. deliver_list_head = NULL;
  1660. deliver_list_tail = NULL;
  1661. }
  1662. if (qdf_likely(peer)) {
  1663. vdev = peer->vdev;
  1664. } else {
  1665. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  1666. nbuf = next;
  1667. continue;
  1668. }
  1669. if (qdf_unlikely(!vdev)) {
  1670. qdf_nbuf_free(nbuf);
  1671. nbuf = next;
  1672. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1673. dp_peer_unref_del_find_by_id(peer);
  1674. continue;
  1675. }
  1676. rx_pdev = vdev->pdev;
  1677. DP_RX_TID_SAVE(nbuf, tid);
  1678. if (qdf_unlikely(rx_pdev->delay_stats_flag))
  1679. qdf_nbuf_set_timestamp(nbuf);
  1680. ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1681. tid_stats =
  1682. &rx_pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1683. /*
  1684. * Check if DMA completed -- msdu_done is the last bit
  1685. * to be written
  1686. */
  1687. if (qdf_unlikely(!qdf_nbuf_is_raw_frame(nbuf) &&
  1688. !hal_rx_attn_msdu_done_get(rx_tlv_hdr))) {
  1689. dp_err("MSDU DONE failure");
  1690. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  1691. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  1692. QDF_TRACE_LEVEL_INFO);
  1693. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  1694. qdf_nbuf_free(nbuf);
  1695. qdf_assert(0);
  1696. nbuf = next;
  1697. continue;
  1698. }
  1699. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  1700. /*
  1701. * First IF condition:
  1702. * 802.11 Fragmented pkts are reinjected to REO
  1703. * HW block as SG pkts and for these pkts we only
  1704. * need to pull the RX TLVS header length.
  1705. * Second IF condition:
  1706. * The below condition happens when an MSDU is spread
  1707. * across multiple buffers. This can happen in two cases
  1708. * 1. The nbuf size is smaller then the received msdu.
  1709. * ex: we have set the nbuf size to 2048 during
  1710. * nbuf_alloc. but we received an msdu which is
  1711. * 2304 bytes in size then this msdu is spread
  1712. * across 2 nbufs.
  1713. *
  1714. * 2. AMSDUs when RAW mode is enabled.
  1715. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  1716. * across 1st nbuf and 2nd nbuf and last MSDU is
  1717. * spread across 2nd nbuf and 3rd nbuf.
  1718. *
  1719. * for these scenarios let us create a skb frag_list and
  1720. * append these buffers till the last MSDU of the AMSDU
  1721. * Third condition:
  1722. * This is the most likely case, we receive 802.3 pkts
  1723. * decapsulated by HW, here we need to set the pkt length.
  1724. */
  1725. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  1726. bool is_mcbc, is_sa_vld, is_da_vld;
  1727. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr);
  1728. is_sa_vld = hal_rx_msdu_end_sa_is_valid_get(rx_tlv_hdr);
  1729. is_da_vld = hal_rx_msdu_end_da_is_valid_get(rx_tlv_hdr);
  1730. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  1731. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  1732. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  1733. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1734. } else if (qdf_nbuf_is_raw_frame(nbuf)) {
  1735. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1736. nbuf = dp_rx_sg_create(nbuf, rx_tlv_hdr);
  1737. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  1738. DP_STATS_INC_PKT(peer, rx.raw, 1, msdu_len);
  1739. next = nbuf->next;
  1740. } else {
  1741. l2_hdr_offset =
  1742. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  1743. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1744. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1745. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1746. qdf_nbuf_pull_head(nbuf,
  1747. RX_PKT_TLVS_LEN +
  1748. l2_hdr_offset);
  1749. }
  1750. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  1751. QDF_TRACE(QDF_MODULE_ID_DP,
  1752. QDF_TRACE_LEVEL_ERROR,
  1753. FL("Policy Check Drop pkt"));
  1754. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  1755. /* Drop & free packet */
  1756. qdf_nbuf_free(nbuf);
  1757. /* Statistics */
  1758. nbuf = next;
  1759. dp_peer_unref_del_find_by_id(peer);
  1760. continue;
  1761. }
  1762. if (qdf_unlikely(peer && (peer->nawds_enabled) &&
  1763. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  1764. (hal_rx_get_mpdu_mac_ad4_valid(rx_tlv_hdr) ==
  1765. false))) {
  1766. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  1767. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  1768. qdf_nbuf_free(nbuf);
  1769. nbuf = next;
  1770. dp_peer_unref_del_find_by_id(peer);
  1771. continue;
  1772. }
  1773. if (soc->process_rx_status)
  1774. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  1775. /* Update the protocol tag in SKB based on CCE metadata */
  1776. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1777. reo_ring_num, false, true);
  1778. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer,
  1779. ring_id, tid_stats);
  1780. if (qdf_unlikely(vdev->mesh_vdev)) {
  1781. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  1782. == QDF_STATUS_SUCCESS) {
  1783. QDF_TRACE(QDF_MODULE_ID_DP,
  1784. QDF_TRACE_LEVEL_INFO_MED,
  1785. FL("mesh pkt filtered"));
  1786. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  1787. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  1788. 1);
  1789. qdf_nbuf_free(nbuf);
  1790. nbuf = next;
  1791. dp_peer_unref_del_find_by_id(peer);
  1792. continue;
  1793. }
  1794. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  1795. }
  1796. if (qdf_likely(vdev->rx_decap_type ==
  1797. htt_cmn_pkt_type_ethernet) &&
  1798. qdf_likely(!vdev->mesh_vdev)) {
  1799. /* WDS Destination Address Learning */
  1800. dp_rx_da_learn(soc, rx_tlv_hdr, peer, nbuf);
  1801. /* Due to HW issue, sometimes we see that the sa_idx
  1802. * and da_idx are invalid with sa_valid and da_valid
  1803. * bits set
  1804. *
  1805. * in this case we also see that value of
  1806. * sa_sw_peer_id is set as 0
  1807. *
  1808. * Drop the packet if sa_idx and da_idx OOB or
  1809. * sa_sw_peerid is 0
  1810. */
  1811. if (!is_sa_da_idx_valid(soc, rx_tlv_hdr, nbuf)) {
  1812. qdf_nbuf_free(nbuf);
  1813. nbuf = next;
  1814. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1815. dp_peer_unref_del_find_by_id(peer);
  1816. continue;
  1817. }
  1818. /* WDS Source Port Learning */
  1819. if (qdf_likely(vdev->wds_enabled))
  1820. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr,
  1821. peer, nbuf);
  1822. /* Intrabss-fwd */
  1823. if (dp_rx_check_ap_bridge(vdev))
  1824. if (dp_rx_intrabss_fwd(soc,
  1825. peer,
  1826. rx_tlv_hdr,
  1827. nbuf)) {
  1828. nbuf = next;
  1829. dp_peer_unref_del_find_by_id(peer);
  1830. tid_stats->intrabss_cnt++;
  1831. continue; /* Get next desc */
  1832. }
  1833. }
  1834. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf);
  1835. qdf_nbuf_cb_update_peer_local_id(nbuf, peer->local_id);
  1836. DP_RX_LIST_APPEND(deliver_list_head,
  1837. deliver_list_tail,
  1838. nbuf);
  1839. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  1840. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1841. tid_stats->delivered_to_stack++;
  1842. nbuf = next;
  1843. dp_peer_unref_del_find_by_id(peer);
  1844. }
  1845. if (deliver_list_head && peer)
  1846. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1847. deliver_list_tail);
  1848. if (dp_rx_enable_eol_data_check(soc)) {
  1849. if (quota &&
  1850. hal_srng_dst_peek_sync_locked(soc, hal_ring)) {
  1851. DP_STATS_INC(soc, rx.hp_oos2, 1);
  1852. if (!hif_exec_should_yield(scn, intr_id))
  1853. goto more_data;
  1854. }
  1855. }
  1856. /* Update histogram statistics by looping through pdev's */
  1857. DP_RX_HIST_STATS_PER_PDEV();
  1858. return rx_bufs_used; /* Assume no scale factor for now */
  1859. }
  1860. /**
  1861. * dp_rx_detach() - detach dp rx
  1862. * @pdev: core txrx pdev context
  1863. *
  1864. * This function will detach DP RX into main device context
  1865. * will free DP Rx resources.
  1866. *
  1867. * Return: void
  1868. */
  1869. void
  1870. dp_rx_pdev_detach(struct dp_pdev *pdev)
  1871. {
  1872. uint8_t pdev_id = pdev->pdev_id;
  1873. struct dp_soc *soc = pdev->soc;
  1874. struct rx_desc_pool *rx_desc_pool;
  1875. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1876. if (rx_desc_pool->pool_size != 0) {
  1877. if (!dp_is_soc_reinit(soc))
  1878. dp_rx_desc_nbuf_and_pool_free(soc, pdev_id,
  1879. rx_desc_pool);
  1880. else
  1881. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  1882. }
  1883. return;
  1884. }
  1885. static QDF_STATUS
  1886. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc, qdf_nbuf_t *nbuf,
  1887. struct dp_pdev *dp_pdev)
  1888. {
  1889. qdf_dma_addr_t paddr;
  1890. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  1891. *nbuf = qdf_nbuf_alloc(dp_soc->osdev, RX_BUFFER_SIZE,
  1892. RX_BUFFER_RESERVATION, RX_BUFFER_ALIGNMENT,
  1893. FALSE);
  1894. if (!(*nbuf)) {
  1895. dp_err("nbuf alloc failed");
  1896. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  1897. return ret;
  1898. }
  1899. ret = qdf_nbuf_map_single(dp_soc->osdev, *nbuf,
  1900. QDF_DMA_FROM_DEVICE);
  1901. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  1902. qdf_nbuf_free(*nbuf);
  1903. dp_err("nbuf map failed");
  1904. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  1905. return ret;
  1906. }
  1907. paddr = qdf_nbuf_get_frag_paddr(*nbuf, 0);
  1908. ret = check_x86_paddr(dp_soc, nbuf, &paddr, dp_pdev);
  1909. if (ret == QDF_STATUS_E_FAILURE) {
  1910. qdf_nbuf_unmap_single(dp_soc->osdev, *nbuf,
  1911. QDF_DMA_FROM_DEVICE);
  1912. qdf_nbuf_free(*nbuf);
  1913. dp_err("nbuf check x86 failed");
  1914. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  1915. return ret;
  1916. }
  1917. return QDF_STATUS_SUCCESS;
  1918. }
  1919. QDF_STATUS
  1920. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  1921. struct dp_srng *dp_rxdma_srng,
  1922. struct rx_desc_pool *rx_desc_pool,
  1923. uint32_t num_req_buffers)
  1924. {
  1925. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  1926. void *rxdma_srng = dp_rxdma_srng->hal_srng;
  1927. union dp_rx_desc_list_elem_t *next;
  1928. void *rxdma_ring_entry;
  1929. qdf_dma_addr_t paddr;
  1930. qdf_nbuf_t *rx_nbuf_arr;
  1931. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  1932. uint32_t buffer_index, nbuf_ptrs_per_page;
  1933. qdf_nbuf_t nbuf;
  1934. QDF_STATUS ret;
  1935. int page_idx, total_pages;
  1936. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1937. union dp_rx_desc_list_elem_t *tail = NULL;
  1938. if (qdf_unlikely(!rxdma_srng)) {
  1939. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  1940. return QDF_STATUS_E_FAILURE;
  1941. }
  1942. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  1943. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  1944. num_req_buffers, &desc_list, &tail);
  1945. if (!nr_descs) {
  1946. dp_err("no free rx_descs in freelist");
  1947. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  1948. return QDF_STATUS_E_NOMEM;
  1949. }
  1950. dp_debug("got %u RX descs for driver attach", nr_descs);
  1951. /*
  1952. * Try to allocate pointers to the nbuf one page at a time.
  1953. * Take pointers that can fit in one page of memory and
  1954. * iterate through the total descriptors that need to be
  1955. * allocated in order of pages. Reuse the pointers that
  1956. * have been allocated to fit in one page across each
  1957. * iteration to index into the nbuf.
  1958. */
  1959. total_pages = (nr_descs * sizeof(*rx_nbuf_arr)) / PAGE_SIZE;
  1960. /*
  1961. * Add an extra page to store the remainder if any
  1962. */
  1963. if ((nr_descs * sizeof(*rx_nbuf_arr)) % PAGE_SIZE)
  1964. total_pages++;
  1965. rx_nbuf_arr = qdf_mem_malloc(PAGE_SIZE);
  1966. if (!rx_nbuf_arr) {
  1967. dp_err("failed to allocate nbuf array");
  1968. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  1969. QDF_BUG(0);
  1970. return QDF_STATUS_E_NOMEM;
  1971. }
  1972. nbuf_ptrs_per_page = PAGE_SIZE / sizeof(*rx_nbuf_arr);
  1973. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  1974. qdf_mem_zero(rx_nbuf_arr, PAGE_SIZE);
  1975. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  1976. /*
  1977. * The last page of buffer pointers may not be required
  1978. * completely based on the number of descriptors. Below
  1979. * check will ensure we are allocating only the
  1980. * required number of descriptors.
  1981. */
  1982. if (nr_nbuf_total >= nr_descs)
  1983. break;
  1984. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  1985. &rx_nbuf_arr[nr_nbuf],
  1986. dp_pdev);
  1987. if (QDF_IS_STATUS_ERROR(ret))
  1988. break;
  1989. nr_nbuf_total++;
  1990. }
  1991. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  1992. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  1993. rxdma_ring_entry =
  1994. hal_srng_src_get_next(dp_soc->hal_soc,
  1995. rxdma_srng);
  1996. qdf_assert_always(rxdma_ring_entry);
  1997. next = desc_list->next;
  1998. nbuf = rx_nbuf_arr[buffer_index];
  1999. paddr = qdf_nbuf_get_frag_paddr(nbuf, 0);
  2000. dp_rx_desc_prep(&desc_list->rx_desc, nbuf);
  2001. desc_list->rx_desc.in_use = 1;
  2002. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  2003. desc_list->rx_desc.cookie,
  2004. rx_desc_pool->owner);
  2005. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, nbuf, true);
  2006. desc_list = next;
  2007. }
  2008. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2009. }
  2010. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2011. qdf_mem_free(rx_nbuf_arr);
  2012. if (!nr_nbuf_total) {
  2013. dp_err("No nbuf's allocated");
  2014. QDF_BUG(0);
  2015. return QDF_STATUS_E_RESOURCES;
  2016. }
  2017. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf,
  2018. RX_BUFFER_SIZE * nr_nbuf_total);
  2019. return QDF_STATUS_SUCCESS;
  2020. }
  2021. /**
  2022. * dp_rx_attach() - attach DP RX
  2023. * @pdev: core txrx pdev context
  2024. *
  2025. * This function will attach a DP RX instance into the main
  2026. * device (SOC) context. Will allocate dp rx resource and
  2027. * initialize resources.
  2028. *
  2029. * Return: QDF_STATUS_SUCCESS: success
  2030. * QDF_STATUS_E_RESOURCES: Error return
  2031. */
  2032. QDF_STATUS
  2033. dp_rx_pdev_attach(struct dp_pdev *pdev)
  2034. {
  2035. uint8_t pdev_id = pdev->pdev_id;
  2036. struct dp_soc *soc = pdev->soc;
  2037. uint32_t rxdma_entries;
  2038. struct dp_srng *dp_rxdma_srng;
  2039. struct rx_desc_pool *rx_desc_pool;
  2040. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2041. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2042. "nss-wifi<4> skip Rx refil %d", pdev_id);
  2043. return QDF_STATUS_SUCCESS;
  2044. }
  2045. pdev = soc->pdev_list[pdev_id];
  2046. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  2047. rxdma_entries = dp_rxdma_srng->num_entries;
  2048. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2049. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  2050. dp_rx_desc_pool_alloc(soc, pdev_id,
  2051. DP_RX_DESC_ALLOC_MULTIPLIER * rxdma_entries,
  2052. rx_desc_pool);
  2053. rx_desc_pool->owner = DP_WBM2SW_RBM;
  2054. /* For Rx buffers, WBM release ring is SW RING 3,for all pdev's */
  2055. return dp_pdev_rx_buffers_attach(soc, pdev_id, dp_rxdma_srng,
  2056. rx_desc_pool, rxdma_entries - 1);
  2057. }
  2058. /*
  2059. * dp_rx_nbuf_prepare() - prepare RX nbuf
  2060. * @soc: core txrx main context
  2061. * @pdev: core txrx pdev context
  2062. *
  2063. * This function alloc & map nbuf for RX dma usage, retry it if failed
  2064. * until retry times reaches max threshold or succeeded.
  2065. *
  2066. * Return: qdf_nbuf_t pointer if succeeded, NULL if failed.
  2067. */
  2068. qdf_nbuf_t
  2069. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev)
  2070. {
  2071. uint8_t *buf;
  2072. int32_t nbuf_retry_count;
  2073. QDF_STATUS ret;
  2074. qdf_nbuf_t nbuf = NULL;
  2075. for (nbuf_retry_count = 0; nbuf_retry_count <
  2076. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD;
  2077. nbuf_retry_count++) {
  2078. /* Allocate a new skb */
  2079. nbuf = qdf_nbuf_alloc(soc->osdev,
  2080. RX_BUFFER_SIZE,
  2081. RX_BUFFER_RESERVATION,
  2082. RX_BUFFER_ALIGNMENT,
  2083. FALSE);
  2084. if (!nbuf) {
  2085. DP_STATS_INC(pdev,
  2086. replenish.nbuf_alloc_fail, 1);
  2087. continue;
  2088. }
  2089. buf = qdf_nbuf_data(nbuf);
  2090. memset(buf, 0, RX_BUFFER_SIZE);
  2091. ret = qdf_nbuf_map_single(soc->osdev, nbuf,
  2092. QDF_DMA_FROM_DEVICE);
  2093. /* nbuf map failed */
  2094. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2095. qdf_nbuf_free(nbuf);
  2096. DP_STATS_INC(pdev, replenish.map_err, 1);
  2097. continue;
  2098. }
  2099. /* qdf_nbuf alloc and map succeeded */
  2100. break;
  2101. }
  2102. /* qdf_nbuf still alloc or map failed */
  2103. if (qdf_unlikely(nbuf_retry_count >=
  2104. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD))
  2105. return NULL;
  2106. return nbuf;
  2107. }