q6core.c 32 KB

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  1. /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/string.h>
  15. #include <linux/types.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/mutex.h>
  18. #include <linux/sched.h>
  19. #include <linux/slab.h>
  20. #include <dsp/q6core.h>
  21. #include <dsp/audio_cal_utils.h>
  22. #include <dsp/apr_audio-v2.h>
  23. #include <ipc/apr.h>
  24. #include "adsp_err.h"
  25. #define TIMEOUT_MS 1000
  26. /*
  27. * AVS bring up in the modem is optimitized for the new
  28. * Sub System Restart design and 100 milliseconds timeout
  29. * is sufficient to make sure the Q6 will be ready.
  30. */
  31. #define Q6_READY_TIMEOUT_MS 100
  32. enum {
  33. META_CAL,
  34. CUST_TOP_CAL,
  35. CORE_MAX_CAL
  36. };
  37. enum ver_query_status {
  38. VER_QUERY_UNATTEMPTED,
  39. VER_QUERY_UNSUPPORTED,
  40. VER_QUERY_SUPPORTED
  41. };
  42. struct q6core_avcs_ver_info {
  43. enum ver_query_status status;
  44. struct avcs_fwk_ver_info *ver_info;
  45. };
  46. struct q6core_str {
  47. struct apr_svc *core_handle_q;
  48. wait_queue_head_t bus_bw_req_wait;
  49. wait_queue_head_t cmd_req_wait;
  50. wait_queue_head_t avcs_fwk_ver_req_wait;
  51. u32 bus_bw_resp_received;
  52. enum cmd_flags {
  53. FLAG_NONE,
  54. FLAG_CMDRSP_LICENSE_RESULT
  55. } cmd_resp_received_flag;
  56. u32 avcs_fwk_ver_resp_received;
  57. struct mutex cmd_lock;
  58. struct mutex ver_lock;
  59. union {
  60. struct avcs_cmdrsp_get_license_validation_result
  61. cmdrsp_license_result;
  62. } cmd_resp_payload;
  63. u32 param;
  64. struct cal_type_data *cal_data[CORE_MAX_CAL];
  65. uint32_t mem_map_cal_handle;
  66. int32_t adsp_status;
  67. struct q6core_avcs_ver_info q6core_avcs_ver_info;
  68. };
  69. static struct q6core_str q6core_lcl;
  70. struct generic_get_data_ {
  71. int valid;
  72. int size_in_ints;
  73. int ints[];
  74. };
  75. static struct generic_get_data_ *generic_get_data;
  76. static int parse_fwk_version_info(uint32_t *payload)
  77. {
  78. size_t ver_size;
  79. int num_services;
  80. pr_debug("%s: Payload info num services %d\n",
  81. __func__, payload[4]);
  82. /*
  83. * payload1[4] is the number of services running on DSP
  84. * Based on this info, we copy the payload into core
  85. * avcs version info structure.
  86. */
  87. num_services = payload[4];
  88. if (num_services > VSS_MAX_AVCS_NUM_SERVICES) {
  89. pr_err("%s: num_services: %d greater than max services: %d\n",
  90. __func__, num_services, VSS_MAX_AVCS_NUM_SERVICES);
  91. return -EINVAL;
  92. }
  93. /*
  94. * Dynamically allocate memory for all
  95. * the services based on num_services
  96. */
  97. ver_size = sizeof(struct avcs_get_fwk_version) +
  98. num_services * sizeof(struct avs_svc_api_info);
  99. q6core_lcl.q6core_avcs_ver_info.ver_info =
  100. kzalloc(ver_size, GFP_ATOMIC);
  101. if (q6core_lcl.q6core_avcs_ver_info.ver_info == NULL)
  102. return -ENOMEM;
  103. memcpy(q6core_lcl.q6core_avcs_ver_info.ver_info, (uint8_t *) payload,
  104. ver_size);
  105. return 0;
  106. }
  107. static int32_t aprv2_core_fn_q(struct apr_client_data *data, void *priv)
  108. {
  109. uint32_t *payload1;
  110. int ret = 0;
  111. if (data == NULL) {
  112. pr_err("%s: data argument is null\n", __func__);
  113. return -EINVAL;
  114. }
  115. pr_debug("%s: core msg: payload len = %u, apr resp opcode = 0x%x\n",
  116. __func__,
  117. data->payload_size, data->opcode);
  118. switch (data->opcode) {
  119. case APR_BASIC_RSP_RESULT:{
  120. if (data->payload_size == 0) {
  121. pr_err("%s: APR_BASIC_RSP_RESULT No Payload ",
  122. __func__);
  123. return 0;
  124. }
  125. payload1 = data->payload;
  126. switch (payload1[0]) {
  127. case AVCS_CMD_SHARED_MEM_UNMAP_REGIONS:
  128. pr_debug("%s: Cmd = AVCS_CMD_SHARED_MEM_UNMAP_REGIONS status[0x%x]\n",
  129. __func__, payload1[1]);
  130. q6core_lcl.bus_bw_resp_received = 1;
  131. wake_up(&q6core_lcl.bus_bw_req_wait);
  132. break;
  133. case AVCS_CMD_SHARED_MEM_MAP_REGIONS:
  134. pr_debug("%s: Cmd = AVCS_CMD_SHARED_MEM_MAP_REGIONS status[0x%x]\n",
  135. __func__, payload1[1]);
  136. q6core_lcl.bus_bw_resp_received = 1;
  137. wake_up(&q6core_lcl.bus_bw_req_wait);
  138. break;
  139. case AVCS_CMD_REGISTER_TOPOLOGIES:
  140. pr_debug("%s: Cmd = AVCS_CMD_REGISTER_TOPOLOGIES status[0x%x]\n",
  141. __func__, payload1[1]);
  142. /* -ADSP status to match Linux error standard */
  143. q6core_lcl.adsp_status = -payload1[1];
  144. q6core_lcl.bus_bw_resp_received = 1;
  145. wake_up(&q6core_lcl.bus_bw_req_wait);
  146. break;
  147. case AVCS_CMD_DEREGISTER_TOPOLOGIES:
  148. pr_debug("%s: Cmd = AVCS_CMD_DEREGISTER_TOPOLOGIES status[0x%x]\n",
  149. __func__, payload1[1]);
  150. q6core_lcl.bus_bw_resp_received = 1;
  151. wake_up(&q6core_lcl.bus_bw_req_wait);
  152. break;
  153. case AVCS_CMD_GET_FWK_VERSION:
  154. pr_debug("%s: Cmd = AVCS_CMD_GET_FWK_VERSION status[%s]\n",
  155. __func__, adsp_err_get_err_str(payload1[1]));
  156. /* ADSP status to match Linux error standard */
  157. q6core_lcl.adsp_status = -payload1[1];
  158. if (payload1[1] == ADSP_EUNSUPPORTED)
  159. q6core_lcl.q6core_avcs_ver_info.status =
  160. VER_QUERY_UNSUPPORTED;
  161. q6core_lcl.avcs_fwk_ver_resp_received = 1;
  162. wake_up(&q6core_lcl.avcs_fwk_ver_req_wait);
  163. break;
  164. case AVCS_CMD_LOAD_TOPO_MODULES:
  165. case AVCS_CMD_UNLOAD_TOPO_MODULES:
  166. pr_debug("%s: Cmd = %s status[%s]\n",
  167. __func__,
  168. (payload1[0] == AVCS_CMD_LOAD_TOPO_MODULES) ?
  169. "AVCS_CMD_LOAD_TOPO_MODULES" :
  170. "AVCS_CMD_UNLOAD_TOPO_MODULES",
  171. adsp_err_get_err_str(payload1[1]));
  172. q6core_lcl.bus_bw_resp_received = 1;
  173. wake_up(&q6core_lcl.bus_bw_req_wait);
  174. break;
  175. default:
  176. pr_err("%s: Invalid cmd rsp[0x%x][0x%x] opcode %d\n",
  177. __func__,
  178. payload1[0], payload1[1], data->opcode);
  179. break;
  180. }
  181. break;
  182. }
  183. case RESET_EVENTS:{
  184. pr_debug("%s: Reset event received in Core service\n",
  185. __func__);
  186. /*
  187. * no reset for q6core_avcs_ver_info done as
  188. * the data will not change after SSR
  189. */
  190. apr_reset(q6core_lcl.core_handle_q);
  191. q6core_lcl.core_handle_q = NULL;
  192. break;
  193. }
  194. case AVCS_CMDRSP_SHARED_MEM_MAP_REGIONS:
  195. payload1 = data->payload;
  196. pr_debug("%s: AVCS_CMDRSP_SHARED_MEM_MAP_REGIONS handle %d\n",
  197. __func__, payload1[0]);
  198. q6core_lcl.mem_map_cal_handle = payload1[0];
  199. q6core_lcl.bus_bw_resp_received = 1;
  200. wake_up(&q6core_lcl.bus_bw_req_wait);
  201. break;
  202. case AVCS_CMDRSP_ADSP_EVENT_GET_STATE:
  203. payload1 = data->payload;
  204. q6core_lcl.param = payload1[0];
  205. pr_debug("%s: Received ADSP get state response 0x%x\n",
  206. __func__, q6core_lcl.param);
  207. /* ensure .param is updated prior to .bus_bw_resp_received */
  208. wmb();
  209. q6core_lcl.bus_bw_resp_received = 1;
  210. wake_up(&q6core_lcl.bus_bw_req_wait);
  211. break;
  212. case AVCS_CMDRSP_GET_LICENSE_VALIDATION_RESULT:
  213. payload1 = data->payload;
  214. pr_debug("%s: cmd = LICENSE_VALIDATION_RESULT, result = 0x%x\n",
  215. __func__, payload1[0]);
  216. q6core_lcl.cmd_resp_payload.cmdrsp_license_result.result
  217. = payload1[0];
  218. q6core_lcl.cmd_resp_received_flag = FLAG_CMDRSP_LICENSE_RESULT;
  219. wake_up(&q6core_lcl.cmd_req_wait);
  220. break;
  221. case AVCS_CMDRSP_GET_FWK_VERSION:
  222. pr_debug("%s: Received AVCS_CMDRSP_GET_FWK_VERSION\n",
  223. __func__);
  224. payload1 = data->payload;
  225. ret = parse_fwk_version_info(payload1);
  226. if (ret < 0) {
  227. q6core_lcl.adsp_status = ret;
  228. pr_err("%s: Failed to parse payload:%d\n",
  229. __func__, ret);
  230. } else {
  231. q6core_lcl.q6core_avcs_ver_info.status =
  232. VER_QUERY_SUPPORTED;
  233. }
  234. q6core_lcl.avcs_fwk_ver_resp_received = 1;
  235. wake_up(&q6core_lcl.avcs_fwk_ver_req_wait);
  236. break;
  237. default:
  238. pr_err("%s: Message id from adsp core svc: 0x%x\n",
  239. __func__, data->opcode);
  240. if (generic_get_data) {
  241. generic_get_data->valid = 1;
  242. generic_get_data->size_in_ints =
  243. data->payload_size/sizeof(int);
  244. pr_debug("callback size = %i\n",
  245. data->payload_size);
  246. memcpy(generic_get_data->ints, data->payload,
  247. data->payload_size);
  248. q6core_lcl.bus_bw_resp_received = 1;
  249. wake_up(&q6core_lcl.bus_bw_req_wait);
  250. break;
  251. }
  252. break;
  253. }
  254. return 0;
  255. }
  256. void ocm_core_open(void)
  257. {
  258. if (q6core_lcl.core_handle_q == NULL)
  259. q6core_lcl.core_handle_q = apr_register("ADSP", "CORE",
  260. aprv2_core_fn_q, 0xFFFFFFFF, NULL);
  261. pr_debug("%s: Open_q %pK\n", __func__, q6core_lcl.core_handle_q);
  262. if (q6core_lcl.core_handle_q == NULL)
  263. pr_err("%s: Unable to register CORE\n", __func__);
  264. }
  265. struct cal_block_data *cal_utils_get_cal_block_by_key(
  266. struct cal_type_data *cal_type, uint32_t key)
  267. {
  268. struct list_head *ptr, *next;
  269. struct cal_block_data *cal_block = NULL;
  270. struct audio_cal_info_metainfo *metainfo;
  271. list_for_each_safe(ptr, next,
  272. &cal_type->cal_blocks) {
  273. cal_block = list_entry(ptr,
  274. struct cal_block_data, list);
  275. metainfo = (struct audio_cal_info_metainfo *)
  276. cal_block->cal_info;
  277. if (metainfo->nKey != key) {
  278. pr_debug("%s: metainfo key mismatch!!! found:%x, needed:%x\n",
  279. __func__, metainfo->nKey, key);
  280. } else {
  281. pr_debug("%s: metainfo key match found", __func__);
  282. return cal_block;
  283. }
  284. }
  285. return NULL;
  286. }
  287. static int q6core_send_get_avcs_fwk_ver_cmd(void)
  288. {
  289. struct apr_hdr avcs_ver_cmd;
  290. int ret;
  291. avcs_ver_cmd.hdr_field =
  292. APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD, APR_HDR_LEN(APR_HDR_SIZE),
  293. APR_PKT_VER);
  294. avcs_ver_cmd.pkt_size = sizeof(struct apr_hdr);
  295. avcs_ver_cmd.src_port = 0;
  296. avcs_ver_cmd.dest_port = 0;
  297. avcs_ver_cmd.token = 0;
  298. avcs_ver_cmd.opcode = AVCS_CMD_GET_FWK_VERSION;
  299. q6core_lcl.adsp_status = 0;
  300. q6core_lcl.avcs_fwk_ver_resp_received = 0;
  301. ret = apr_send_pkt(q6core_lcl.core_handle_q,
  302. (uint32_t *) &avcs_ver_cmd);
  303. if (ret < 0) {
  304. pr_err("%s: failed to send apr packet, ret=%d\n", __func__,
  305. ret);
  306. goto done;
  307. }
  308. ret = wait_event_timeout(q6core_lcl.avcs_fwk_ver_req_wait,
  309. (q6core_lcl.avcs_fwk_ver_resp_received == 1),
  310. msecs_to_jiffies(TIMEOUT_MS));
  311. if (!ret) {
  312. pr_err("%s: wait_event timeout for AVCS fwk version info\n",
  313. __func__);
  314. ret = -ETIMEDOUT;
  315. goto done;
  316. }
  317. if (q6core_lcl.adsp_status < 0) {
  318. /*
  319. * adsp_err_get_err_str expects a positive value but we store
  320. * the DSP error as negative to match the Linux error standard.
  321. * Pass in the negated value so adsp_err_get_err_str returns
  322. * the correct string.
  323. */
  324. pr_err("%s: DSP returned error[%s]\n", __func__,
  325. adsp_err_get_err_str(-q6core_lcl.adsp_status));
  326. ret = adsp_err_get_lnx_err_code(q6core_lcl.adsp_status);
  327. goto done;
  328. }
  329. ret = 0;
  330. done:
  331. return ret;
  332. }
  333. int q6core_get_service_version(uint32_t service_id,
  334. struct avcs_fwk_ver_info *ver_info,
  335. size_t size)
  336. {
  337. struct avcs_fwk_ver_info *cached_ver_info = NULL;
  338. int i;
  339. uint32_t num_services;
  340. size_t ver_size;
  341. int ret;
  342. if (ver_info == NULL) {
  343. pr_err("%s: ver_info is NULL\n", __func__);
  344. return -EINVAL;
  345. }
  346. ret = q6core_get_fwk_version_size(service_id);
  347. if (ret < 0) {
  348. pr_err("%s: Failed to get service size for service id %d with error %d\n",
  349. __func__, service_id, ret);
  350. return ret;
  351. }
  352. ver_size = ret;
  353. if (ver_size != size) {
  354. pr_err("%s: Expected size %zu and provided size %zu do not match\n",
  355. __func__, ver_size, size);
  356. return -EINVAL;
  357. }
  358. cached_ver_info = q6core_lcl.q6core_avcs_ver_info.ver_info;
  359. num_services = cached_ver_info->avcs_fwk_version.num_services;
  360. if (service_id == AVCS_SERVICE_ID_ALL) {
  361. memcpy(ver_info, cached_ver_info, ver_size);
  362. return 0;
  363. }
  364. ver_info->avcs_fwk_version = cached_ver_info->avcs_fwk_version;
  365. for (i = 0; i < num_services; i++) {
  366. if (cached_ver_info->services[i].service_id == service_id) {
  367. ver_info->services[0] = cached_ver_info->services[i];
  368. return 0;
  369. }
  370. }
  371. pr_err("%s: No service matching service ID %d\n", __func__, service_id);
  372. return -EINVAL;
  373. }
  374. EXPORT_SYMBOL(q6core_get_service_version);
  375. size_t q6core_get_fwk_version_size(uint32_t service_id)
  376. {
  377. int ret = 0;
  378. uint32_t num_services;
  379. mutex_lock(&(q6core_lcl.ver_lock));
  380. pr_debug("%s: q6core_avcs_ver_info.status(%d)\n", __func__,
  381. q6core_lcl.q6core_avcs_ver_info.status);
  382. switch (q6core_lcl.q6core_avcs_ver_info.status) {
  383. case VER_QUERY_SUPPORTED:
  384. pr_debug("%s: AVCS FWK version query already attempted\n",
  385. __func__);
  386. break;
  387. case VER_QUERY_UNSUPPORTED:
  388. ret = -EOPNOTSUPP;
  389. break;
  390. case VER_QUERY_UNATTEMPTED:
  391. pr_debug("%s: Attempting AVCS FWK version query\n", __func__);
  392. if (q6core_is_adsp_ready()) {
  393. ret = q6core_send_get_avcs_fwk_ver_cmd();
  394. } else {
  395. pr_err("%s: ADSP is not ready to query version\n",
  396. __func__);
  397. ret = -ENODEV;
  398. }
  399. break;
  400. default:
  401. pr_err("%s: Invalid version query status %d\n", __func__,
  402. q6core_lcl.q6core_avcs_ver_info.status);
  403. ret = -EINVAL;
  404. break;
  405. }
  406. mutex_unlock(&(q6core_lcl.ver_lock));
  407. if (ret)
  408. goto done;
  409. if (q6core_lcl.q6core_avcs_ver_info.ver_info != NULL) {
  410. num_services = q6core_lcl.q6core_avcs_ver_info.ver_info
  411. ->avcs_fwk_version.num_services;
  412. } else {
  413. pr_err("%s: ver_info is NULL\n", __func__);
  414. ret = -EINVAL;
  415. goto done;
  416. }
  417. ret = sizeof(struct avcs_get_fwk_version);
  418. if (service_id == AVCS_SERVICE_ID_ALL)
  419. ret += num_services * sizeof(struct avs_svc_api_info);
  420. else
  421. ret += sizeof(struct avs_svc_api_info);
  422. done:
  423. return ret;
  424. }
  425. EXPORT_SYMBOL(q6core_get_fwk_version_size);
  426. /**
  427. * core_set_license -
  428. * command to set license for module
  429. *
  430. * @key: license key hash
  431. * @module_id: DSP Module ID
  432. *
  433. * Returns 0 on success or error on failure
  434. */
  435. int32_t core_set_license(uint32_t key, uint32_t module_id)
  436. {
  437. struct avcs_cmd_set_license *cmd_setl = NULL;
  438. struct cal_block_data *cal_block = NULL;
  439. int rc = 0, packet_size = 0;
  440. pr_debug("%s: key:0x%x, id:0x%x\n", __func__, key, module_id);
  441. mutex_lock(&(q6core_lcl.cmd_lock));
  442. if (q6core_lcl.cal_data[META_CAL] == NULL) {
  443. pr_err("%s: cal_data not initialized yet!!\n", __func__);
  444. rc = -EINVAL;
  445. goto cmd_unlock;
  446. }
  447. mutex_lock(&((q6core_lcl.cal_data[META_CAL])->lock));
  448. cal_block = cal_utils_get_cal_block_by_key(
  449. q6core_lcl.cal_data[META_CAL], key);
  450. if (cal_block == NULL ||
  451. cal_block->cal_data.kvaddr == NULL ||
  452. cal_block->cal_data.size <= 0) {
  453. pr_err("%s: Invalid cal block to send", __func__);
  454. rc = -EINVAL;
  455. goto cal_data_unlock;
  456. }
  457. packet_size = sizeof(struct avcs_cmd_set_license) +
  458. cal_block->cal_data.size;
  459. /*round up total packet_size to next 4 byte boundary*/
  460. packet_size = ((packet_size + 0x3)>>2)<<2;
  461. cmd_setl = kzalloc(packet_size, GFP_KERNEL);
  462. if (cmd_setl == NULL) {
  463. rc = -ENOMEM;
  464. goto cal_data_unlock;
  465. }
  466. ocm_core_open();
  467. if (q6core_lcl.core_handle_q == NULL) {
  468. pr_err("%s: apr registration for CORE failed\n", __func__);
  469. rc = -ENODEV;
  470. goto fail_cmd;
  471. }
  472. cmd_setl->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_EVENT,
  473. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  474. cmd_setl->hdr.pkt_size = packet_size;
  475. cmd_setl->hdr.src_port = 0;
  476. cmd_setl->hdr.dest_port = 0;
  477. cmd_setl->hdr.token = 0;
  478. cmd_setl->hdr.opcode = AVCS_CMD_SET_LICENSE;
  479. cmd_setl->id = module_id;
  480. cmd_setl->overwrite = 1;
  481. cmd_setl->size = cal_block->cal_data.size;
  482. memcpy((uint8_t *)cmd_setl + sizeof(struct avcs_cmd_set_license),
  483. cal_block->cal_data.kvaddr,
  484. cal_block->cal_data.size);
  485. pr_info("%s: Set license opcode=0x%x, id =0x%x, size = %d\n",
  486. __func__, cmd_setl->hdr.opcode,
  487. cmd_setl->id, cmd_setl->size);
  488. rc = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)cmd_setl);
  489. if (rc < 0)
  490. pr_err("%s: SET_LICENSE failed op[0x%x]rc[%d]\n",
  491. __func__, cmd_setl->hdr.opcode, rc);
  492. fail_cmd:
  493. kfree(cmd_setl);
  494. cal_data_unlock:
  495. mutex_unlock(&((q6core_lcl.cal_data[META_CAL])->lock));
  496. cmd_unlock:
  497. mutex_unlock(&(q6core_lcl.cmd_lock));
  498. return rc;
  499. }
  500. EXPORT_SYMBOL(core_set_license);
  501. /**
  502. * core_get_license_status -
  503. * command to retrieve license status for module
  504. *
  505. * @module_id: DSP Module ID
  506. *
  507. * Returns 0 on success or error on failure
  508. */
  509. int32_t core_get_license_status(uint32_t module_id)
  510. {
  511. struct avcs_cmd_get_license_validation_result get_lvr_cmd;
  512. int ret = 0;
  513. pr_debug("%s: module_id 0x%x", __func__, module_id);
  514. mutex_lock(&(q6core_lcl.cmd_lock));
  515. ocm_core_open();
  516. if (q6core_lcl.core_handle_q == NULL) {
  517. pr_err("%s: apr registration for CORE failed\n", __func__);
  518. ret = -ENODEV;
  519. goto fail_cmd;
  520. }
  521. get_lvr_cmd.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  522. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  523. get_lvr_cmd.hdr.pkt_size =
  524. sizeof(struct avcs_cmd_get_license_validation_result);
  525. get_lvr_cmd.hdr.src_port = 0;
  526. get_lvr_cmd.hdr.dest_port = 0;
  527. get_lvr_cmd.hdr.token = 0;
  528. get_lvr_cmd.hdr.opcode = AVCS_CMD_GET_LICENSE_VALIDATION_RESULT;
  529. get_lvr_cmd.id = module_id;
  530. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &get_lvr_cmd);
  531. if (ret < 0) {
  532. pr_err("%s: license_validation request failed, err %d\n",
  533. __func__, ret);
  534. ret = -EREMOTE;
  535. goto fail_cmd;
  536. }
  537. q6core_lcl.cmd_resp_received_flag &= ~(FLAG_CMDRSP_LICENSE_RESULT);
  538. mutex_unlock(&(q6core_lcl.cmd_lock));
  539. ret = wait_event_timeout(q6core_lcl.cmd_req_wait,
  540. (q6core_lcl.cmd_resp_received_flag ==
  541. FLAG_CMDRSP_LICENSE_RESULT),
  542. msecs_to_jiffies(TIMEOUT_MS));
  543. mutex_lock(&(q6core_lcl.cmd_lock));
  544. if (!ret) {
  545. pr_err("%s: wait_event timeout for CMDRSP_LICENSE_RESULT\n",
  546. __func__);
  547. ret = -ETIME;
  548. goto fail_cmd;
  549. }
  550. q6core_lcl.cmd_resp_received_flag &= ~(FLAG_CMDRSP_LICENSE_RESULT);
  551. ret = q6core_lcl.cmd_resp_payload.cmdrsp_license_result.result;
  552. fail_cmd:
  553. mutex_unlock(&(q6core_lcl.cmd_lock));
  554. pr_info("%s: cmdrsp_license_result.result = 0x%x for module 0x%x\n",
  555. __func__, ret, module_id);
  556. return ret;
  557. }
  558. EXPORT_SYMBOL(core_get_license_status);
  559. /**
  560. * core_set_dolby_manufacturer_id -
  561. * command to set dolby manufacturer id
  562. *
  563. * @manufacturer_id: Dolby manufacturer id
  564. *
  565. * Returns 0 on success or error on failure
  566. */
  567. uint32_t core_set_dolby_manufacturer_id(int manufacturer_id)
  568. {
  569. struct adsp_dolby_manufacturer_id payload;
  570. int rc = 0;
  571. pr_debug("%s: manufacturer_id :%d\n", __func__, manufacturer_id);
  572. mutex_lock(&(q6core_lcl.cmd_lock));
  573. ocm_core_open();
  574. if (q6core_lcl.core_handle_q) {
  575. payload.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_EVENT,
  576. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  577. payload.hdr.pkt_size =
  578. sizeof(struct adsp_dolby_manufacturer_id);
  579. payload.hdr.src_port = 0;
  580. payload.hdr.dest_port = 0;
  581. payload.hdr.token = 0;
  582. payload.hdr.opcode = ADSP_CMD_SET_DOLBY_MANUFACTURER_ID;
  583. payload.manufacturer_id = manufacturer_id;
  584. pr_debug("%s: Send Dolby security opcode=0x%x manufacturer ID = %d\n",
  585. __func__,
  586. payload.hdr.opcode, payload.manufacturer_id);
  587. rc = apr_send_pkt(q6core_lcl.core_handle_q,
  588. (uint32_t *)&payload);
  589. if (rc < 0)
  590. pr_err("%s: SET_DOLBY_MANUFACTURER_ID failed op[0x%x]rc[%d]\n",
  591. __func__, payload.hdr.opcode, rc);
  592. }
  593. mutex_unlock(&(q6core_lcl.cmd_lock));
  594. return rc;
  595. }
  596. EXPORT_SYMBOL(core_set_dolby_manufacturer_id);
  597. int32_t q6core_load_unload_topo_modules(uint32_t topo_id,
  598. bool preload_type)
  599. {
  600. struct avcs_cmd_load_unload_topo_modules load_unload_topo_modules;
  601. int ret = 0;
  602. mutex_lock(&(q6core_lcl.cmd_lock));
  603. ocm_core_open();
  604. if (q6core_lcl.core_handle_q == NULL) {
  605. pr_err("%s: apr registration for CORE failed\n", __func__);
  606. ret = -ENODEV;
  607. goto done;
  608. }
  609. memset(&load_unload_topo_modules, 0, sizeof(load_unload_topo_modules));
  610. load_unload_topo_modules.hdr.hdr_field =
  611. APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  612. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  613. load_unload_topo_modules.hdr.pkt_size =
  614. sizeof(struct avcs_cmd_load_unload_topo_modules);
  615. load_unload_topo_modules.hdr.src_port = 0;
  616. load_unload_topo_modules.hdr.dest_port = 0;
  617. load_unload_topo_modules.hdr.token = 0;
  618. if (preload_type == CORE_LOAD_TOPOLOGY)
  619. load_unload_topo_modules.hdr.opcode =
  620. AVCS_CMD_LOAD_TOPO_MODULES;
  621. else
  622. load_unload_topo_modules.hdr.opcode =
  623. AVCS_CMD_UNLOAD_TOPO_MODULES;
  624. load_unload_topo_modules.topology_id = topo_id;
  625. q6core_lcl.bus_bw_resp_received = 0;
  626. ret = apr_send_pkt(q6core_lcl.core_handle_q,
  627. (uint32_t *) &load_unload_topo_modules);
  628. if (ret < 0) {
  629. pr_err("%s: Load/unload topo modules failed for topology = %d ret = %d\n",
  630. __func__, topo_id, ret);
  631. ret = -EINVAL;
  632. goto done;
  633. }
  634. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  635. (q6core_lcl.bus_bw_resp_received == 1),
  636. msecs_to_jiffies(TIMEOUT_MS));
  637. if (!ret) {
  638. pr_err("%s: wait_event timeout for load/unload topo modules\n",
  639. __func__);
  640. ret = -ETIME;
  641. goto done;
  642. }
  643. done:
  644. mutex_unlock(&(q6core_lcl.cmd_lock));
  645. return ret;
  646. }
  647. EXPORT_SYMBOL(q6core_load_unload_topo_modules);
  648. /**
  649. * q6core_is_adsp_ready - check adsp ready status
  650. *
  651. * Returns true if adsp is ready otherwise returns false
  652. */
  653. bool q6core_is_adsp_ready(void)
  654. {
  655. int rc = 0;
  656. bool ret = false;
  657. struct apr_hdr hdr;
  658. pr_debug("%s: enter\n", __func__);
  659. memset(&hdr, 0, sizeof(hdr));
  660. hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  661. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  662. hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE, 0);
  663. hdr.opcode = AVCS_CMD_ADSP_EVENT_GET_STATE;
  664. mutex_lock(&(q6core_lcl.cmd_lock));
  665. ocm_core_open();
  666. if (q6core_lcl.core_handle_q) {
  667. q6core_lcl.bus_bw_resp_received = 0;
  668. rc = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)&hdr);
  669. if (rc < 0) {
  670. pr_err("%s: Get ADSP state APR packet send event %d\n",
  671. __func__, rc);
  672. goto bail;
  673. }
  674. rc = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  675. (q6core_lcl.bus_bw_resp_received == 1),
  676. msecs_to_jiffies(Q6_READY_TIMEOUT_MS));
  677. if (rc > 0 && q6core_lcl.bus_bw_resp_received) {
  678. /* ensure to read updated param by callback thread */
  679. rmb();
  680. ret = !!q6core_lcl.param;
  681. }
  682. }
  683. bail:
  684. pr_debug("%s: leave, rc %d, adsp ready %d\n", __func__, rc, ret);
  685. mutex_unlock(&(q6core_lcl.cmd_lock));
  686. return ret;
  687. }
  688. EXPORT_SYMBOL(q6core_is_adsp_ready);
  689. static int q6core_map_memory_regions(phys_addr_t *buf_add, uint32_t mempool_id,
  690. uint32_t *bufsz, uint32_t bufcnt, uint32_t *map_handle)
  691. {
  692. struct avs_cmd_shared_mem_map_regions *mmap_regions = NULL;
  693. struct avs_shared_map_region_payload *mregions = NULL;
  694. void *mmap_region_cmd = NULL;
  695. void *payload = NULL;
  696. int ret = 0;
  697. int i = 0;
  698. int cmd_size = 0;
  699. cmd_size = sizeof(struct avs_cmd_shared_mem_map_regions)
  700. + sizeof(struct avs_shared_map_region_payload)
  701. * bufcnt;
  702. mmap_region_cmd = kzalloc(cmd_size, GFP_KERNEL);
  703. if (mmap_region_cmd == NULL)
  704. return -ENOMEM;
  705. mmap_regions = (struct avs_cmd_shared_mem_map_regions *)mmap_region_cmd;
  706. mmap_regions->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  707. APR_HDR_LEN(APR_HDR_SIZE),
  708. APR_PKT_VER);
  709. mmap_regions->hdr.pkt_size = cmd_size;
  710. mmap_regions->hdr.src_port = 0;
  711. mmap_regions->hdr.dest_port = 0;
  712. mmap_regions->hdr.token = 0;
  713. mmap_regions->hdr.opcode = AVCS_CMD_SHARED_MEM_MAP_REGIONS;
  714. mmap_regions->mem_pool_id = ADSP_MEMORY_MAP_SHMEM8_4K_POOL & 0x00ff;
  715. mmap_regions->num_regions = bufcnt & 0x00ff;
  716. mmap_regions->property_flag = 0x00;
  717. payload = ((u8 *) mmap_region_cmd +
  718. sizeof(struct avs_cmd_shared_mem_map_regions));
  719. mregions = (struct avs_shared_map_region_payload *)payload;
  720. for (i = 0; i < bufcnt; i++) {
  721. mregions->shm_addr_lsw = lower_32_bits(buf_add[i]);
  722. mregions->shm_addr_msw =
  723. msm_audio_populate_upper_32_bits(buf_add[i]);
  724. mregions->mem_size_bytes = bufsz[i];
  725. ++mregions;
  726. }
  727. pr_debug("%s: sending memory map, addr %pK, size %d, bufcnt = %d\n",
  728. __func__, buf_add, bufsz[0], mmap_regions->num_regions);
  729. *map_handle = 0;
  730. q6core_lcl.bus_bw_resp_received = 0;
  731. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  732. mmap_regions);
  733. if (ret < 0) {
  734. pr_err("%s: mmap regions failed %d\n",
  735. __func__, ret);
  736. ret = -EINVAL;
  737. goto done;
  738. }
  739. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  740. (q6core_lcl.bus_bw_resp_received == 1),
  741. msecs_to_jiffies(TIMEOUT_MS));
  742. if (!ret) {
  743. pr_err("%s: timeout. waited for memory map\n", __func__);
  744. ret = -ETIME;
  745. goto done;
  746. }
  747. *map_handle = q6core_lcl.mem_map_cal_handle;
  748. done:
  749. kfree(mmap_region_cmd);
  750. return ret;
  751. }
  752. static int q6core_memory_unmap_regions(uint32_t mem_map_handle)
  753. {
  754. struct avs_cmd_shared_mem_unmap_regions unmap_regions;
  755. int ret = 0;
  756. memset(&unmap_regions, 0, sizeof(unmap_regions));
  757. unmap_regions.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  758. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  759. unmap_regions.hdr.pkt_size = sizeof(unmap_regions);
  760. unmap_regions.hdr.src_svc = APR_SVC_ADSP_CORE;
  761. unmap_regions.hdr.src_domain = APR_DOMAIN_APPS;
  762. unmap_regions.hdr.src_port = 0;
  763. unmap_regions.hdr.dest_svc = APR_SVC_ADSP_CORE;
  764. unmap_regions.hdr.dest_domain = APR_DOMAIN_ADSP;
  765. unmap_regions.hdr.dest_port = 0;
  766. unmap_regions.hdr.token = 0;
  767. unmap_regions.hdr.opcode = AVCS_CMD_SHARED_MEM_UNMAP_REGIONS;
  768. unmap_regions.mem_map_handle = mem_map_handle;
  769. q6core_lcl.bus_bw_resp_received = 0;
  770. pr_debug("%s: unmap regions map handle %d\n",
  771. __func__, mem_map_handle);
  772. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  773. &unmap_regions);
  774. if (ret < 0) {
  775. pr_err("%s: unmap regions failed %d\n",
  776. __func__, ret);
  777. ret = -EINVAL;
  778. goto done;
  779. }
  780. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  781. (q6core_lcl.bus_bw_resp_received == 1),
  782. msecs_to_jiffies(TIMEOUT_MS));
  783. if (!ret) {
  784. pr_err("%s: timeout. waited for memory_unmap\n",
  785. __func__);
  786. ret = -ETIME;
  787. goto done;
  788. }
  789. done:
  790. return ret;
  791. }
  792. static int q6core_dereg_all_custom_topologies(void)
  793. {
  794. int ret = 0;
  795. struct avcs_cmd_deregister_topologies dereg_top;
  796. memset(&dereg_top, 0, sizeof(dereg_top));
  797. dereg_top.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  798. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  799. dereg_top.hdr.pkt_size = sizeof(dereg_top);
  800. dereg_top.hdr.src_svc = APR_SVC_ADSP_CORE;
  801. dereg_top.hdr.src_domain = APR_DOMAIN_APPS;
  802. dereg_top.hdr.src_port = 0;
  803. dereg_top.hdr.dest_svc = APR_SVC_ADSP_CORE;
  804. dereg_top.hdr.dest_domain = APR_DOMAIN_ADSP;
  805. dereg_top.hdr.dest_port = 0;
  806. dereg_top.hdr.token = 0;
  807. dereg_top.hdr.opcode = AVCS_CMD_DEREGISTER_TOPOLOGIES;
  808. dereg_top.payload_addr_lsw = 0;
  809. dereg_top.payload_addr_msw = 0;
  810. dereg_top.mem_map_handle = 0;
  811. dereg_top.payload_size = 0;
  812. dereg_top.mode = AVCS_MODE_DEREGISTER_ALL_CUSTOM_TOPOLOGIES;
  813. q6core_lcl.bus_bw_resp_received = 0;
  814. pr_debug("%s: Deregister topologies mode %d\n",
  815. __func__, dereg_top.mode);
  816. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &dereg_top);
  817. if (ret < 0) {
  818. pr_err("%s: Deregister topologies failed %d\n",
  819. __func__, ret);
  820. goto done;
  821. }
  822. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  823. (q6core_lcl.bus_bw_resp_received == 1),
  824. msecs_to_jiffies(TIMEOUT_MS));
  825. if (!ret) {
  826. pr_err("%s: wait_event timeout for Deregister topologies\n",
  827. __func__);
  828. goto done;
  829. }
  830. done:
  831. return ret;
  832. }
  833. static int q6core_send_custom_topologies(void)
  834. {
  835. int ret = 0;
  836. int ret2 = 0;
  837. struct cal_block_data *cal_block = NULL;
  838. struct avcs_cmd_register_topologies reg_top;
  839. if (!q6core_is_adsp_ready()) {
  840. pr_err("%s: ADSP is not ready!\n", __func__);
  841. return -ENODEV;
  842. }
  843. memset(&reg_top, 0, sizeof(reg_top));
  844. mutex_lock(&q6core_lcl.cal_data[CUST_TOP_CAL]->lock);
  845. mutex_lock(&q6core_lcl.cmd_lock);
  846. cal_block = cal_utils_get_only_cal_block(
  847. q6core_lcl.cal_data[CUST_TOP_CAL]);
  848. if (cal_block == NULL) {
  849. pr_debug("%s: cal block is NULL!\n", __func__);
  850. goto unlock;
  851. }
  852. if (cal_block->cal_data.size <= 0) {
  853. pr_debug("%s: cal size is %zd not sending\n",
  854. __func__, cal_block->cal_data.size);
  855. goto unlock;
  856. }
  857. q6core_dereg_all_custom_topologies();
  858. ret = q6core_map_memory_regions(&cal_block->cal_data.paddr, 0,
  859. (uint32_t *)&cal_block->map_data.map_size, 1,
  860. &cal_block->map_data.q6map_handle);
  861. if (!ret) {
  862. pr_err("%s: q6core_map_memory_regions failed\n", __func__);
  863. goto unlock;
  864. }
  865. reg_top.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  866. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  867. reg_top.hdr.pkt_size = sizeof(reg_top);
  868. reg_top.hdr.src_svc = APR_SVC_ADSP_CORE;
  869. reg_top.hdr.src_domain = APR_DOMAIN_APPS;
  870. reg_top.hdr.src_port = 0;
  871. reg_top.hdr.dest_svc = APR_SVC_ADSP_CORE;
  872. reg_top.hdr.dest_domain = APR_DOMAIN_ADSP;
  873. reg_top.hdr.dest_port = 0;
  874. reg_top.hdr.token = 0;
  875. reg_top.hdr.opcode = AVCS_CMD_REGISTER_TOPOLOGIES;
  876. reg_top.payload_addr_lsw =
  877. lower_32_bits(cal_block->cal_data.paddr);
  878. reg_top.payload_addr_msw =
  879. msm_audio_populate_upper_32_bits(cal_block->cal_data.paddr);
  880. reg_top.mem_map_handle = cal_block->map_data.q6map_handle;
  881. reg_top.payload_size = cal_block->cal_data.size;
  882. q6core_lcl.adsp_status = 0;
  883. q6core_lcl.bus_bw_resp_received = 0;
  884. pr_debug("%s: Register topologies addr %pK, size %zd, map handle %d\n",
  885. __func__, &cal_block->cal_data.paddr, cal_block->cal_data.size,
  886. cal_block->map_data.q6map_handle);
  887. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &reg_top);
  888. if (ret < 0) {
  889. pr_err("%s: Register topologies failed %d\n",
  890. __func__, ret);
  891. goto unmap;
  892. }
  893. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  894. (q6core_lcl.bus_bw_resp_received == 1),
  895. msecs_to_jiffies(TIMEOUT_MS));
  896. if (!ret) {
  897. pr_err("%s: wait_event timeout for Register topologies\n",
  898. __func__);
  899. goto unmap;
  900. }
  901. if (q6core_lcl.adsp_status < 0)
  902. ret = q6core_lcl.adsp_status;
  903. unmap:
  904. ret2 = q6core_memory_unmap_regions(cal_block->map_data.q6map_handle);
  905. if (!ret2) {
  906. pr_err("%s: q6core_memory_unmap_regions failed for map handle %d\n",
  907. __func__, cal_block->map_data.q6map_handle);
  908. ret = ret2;
  909. goto unlock;
  910. }
  911. unlock:
  912. mutex_unlock(&q6core_lcl.cmd_lock);
  913. mutex_unlock(&q6core_lcl.cal_data[CUST_TOP_CAL]->lock);
  914. return ret;
  915. }
  916. static int get_cal_type_index(int32_t cal_type)
  917. {
  918. int ret = -EINVAL;
  919. switch (cal_type) {
  920. case AUDIO_CORE_METAINFO_CAL_TYPE:
  921. ret = META_CAL;
  922. break;
  923. case CORE_CUSTOM_TOPOLOGIES_CAL_TYPE:
  924. ret = CUST_TOP_CAL;
  925. break;
  926. default:
  927. pr_err("%s: invalid cal type %d!\n", __func__, cal_type);
  928. }
  929. return ret;
  930. }
  931. static int q6core_alloc_cal(int32_t cal_type,
  932. size_t data_size, void *data)
  933. {
  934. int ret = 0;
  935. int cal_index;
  936. cal_index = get_cal_type_index(cal_type);
  937. if (cal_index < 0) {
  938. pr_err("%s: could not get cal index %d!\n",
  939. __func__, cal_index);
  940. ret = -EINVAL;
  941. goto done;
  942. }
  943. ret = cal_utils_alloc_cal(data_size, data,
  944. q6core_lcl.cal_data[cal_index], 0, NULL);
  945. if (ret < 0) {
  946. pr_err("%s: cal_utils_alloc_block failed, ret = %d, cal type = %d!\n",
  947. __func__, ret, cal_type);
  948. goto done;
  949. }
  950. done:
  951. return ret;
  952. }
  953. static int q6core_dealloc_cal(int32_t cal_type,
  954. size_t data_size, void *data)
  955. {
  956. int ret = 0;
  957. int cal_index;
  958. cal_index = get_cal_type_index(cal_type);
  959. if (cal_index < 0) {
  960. pr_err("%s: could not get cal index %d!\n",
  961. __func__, cal_index);
  962. ret = -EINVAL;
  963. goto done;
  964. }
  965. ret = cal_utils_dealloc_cal(data_size, data,
  966. q6core_lcl.cal_data[cal_index]);
  967. if (ret < 0) {
  968. pr_err("%s: cal_utils_dealloc_block failed, ret = %d, cal type = %d!\n",
  969. __func__, ret, cal_type);
  970. goto done;
  971. }
  972. done:
  973. return ret;
  974. }
  975. static int q6core_set_cal(int32_t cal_type,
  976. size_t data_size, void *data)
  977. {
  978. int ret = 0;
  979. int cal_index;
  980. cal_index = get_cal_type_index(cal_type);
  981. if (cal_index < 0) {
  982. pr_err("%s: could not get cal index %d!\n",
  983. __func__, cal_index);
  984. ret = -EINVAL;
  985. goto done;
  986. }
  987. ret = cal_utils_set_cal(data_size, data,
  988. q6core_lcl.cal_data[cal_index], 0, NULL);
  989. if (ret < 0) {
  990. pr_err("%s: cal_utils_set_cal failed, ret = %d, cal type = %d!\n",
  991. __func__, ret, cal_type);
  992. goto done;
  993. }
  994. if (cal_index == CUST_TOP_CAL)
  995. ret = q6core_send_custom_topologies();
  996. done:
  997. return ret;
  998. }
  999. static void q6core_delete_cal_data(void)
  1000. {
  1001. pr_debug("%s:\n", __func__);
  1002. cal_utils_destroy_cal_types(CORE_MAX_CAL, q6core_lcl.cal_data);
  1003. }
  1004. static int q6core_init_cal_data(void)
  1005. {
  1006. int ret = 0;
  1007. struct cal_type_info cal_type_info[] = {
  1008. {{AUDIO_CORE_METAINFO_CAL_TYPE,
  1009. {q6core_alloc_cal, q6core_dealloc_cal, NULL,
  1010. q6core_set_cal, NULL, NULL} },
  1011. {NULL, NULL, cal_utils_match_buf_num} },
  1012. {{CORE_CUSTOM_TOPOLOGIES_CAL_TYPE,
  1013. {q6core_alloc_cal, q6core_dealloc_cal, NULL,
  1014. q6core_set_cal, NULL, NULL} },
  1015. {NULL, NULL, cal_utils_match_buf_num} }
  1016. };
  1017. pr_debug("%s:\n", __func__);
  1018. ret = cal_utils_create_cal_types(CORE_MAX_CAL,
  1019. q6core_lcl.cal_data, cal_type_info);
  1020. if (ret < 0) {
  1021. pr_err("%s: could not create cal type!\n",
  1022. __func__);
  1023. goto err;
  1024. }
  1025. return ret;
  1026. err:
  1027. q6core_delete_cal_data();
  1028. return ret;
  1029. }
  1030. int __init core_init(void)
  1031. {
  1032. memset(&q6core_lcl, 0, sizeof(struct q6core_str));
  1033. init_waitqueue_head(&q6core_lcl.bus_bw_req_wait);
  1034. init_waitqueue_head(&q6core_lcl.cmd_req_wait);
  1035. init_waitqueue_head(&q6core_lcl.avcs_fwk_ver_req_wait);
  1036. q6core_lcl.cmd_resp_received_flag = FLAG_NONE;
  1037. mutex_init(&q6core_lcl.cmd_lock);
  1038. mutex_init(&q6core_lcl.ver_lock);
  1039. q6core_init_cal_data();
  1040. return 0;
  1041. }
  1042. void core_exit(void)
  1043. {
  1044. mutex_destroy(&q6core_lcl.cmd_lock);
  1045. mutex_destroy(&q6core_lcl.ver_lock);
  1046. q6core_delete_cal_data();
  1047. }
  1048. MODULE_DESCRIPTION("ADSP core driver");
  1049. MODULE_LICENSE("GPL v2");