main.c 94 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/pm_wakeup.h>
  14. #include <linux/reboot.h>
  15. #include <linux/rwsem.h>
  16. #include <linux/suspend.h>
  17. #include <linux/timer.h>
  18. #include <linux/version.h>
  19. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  20. #include <linux/panic_notifier.h>
  21. #endif
  22. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  23. #include <soc/qcom/minidump.h>
  24. #endif
  25. #include "cnss_plat_ipc_qmi.h"
  26. #include "main.h"
  27. #include "bus.h"
  28. #include "debug.h"
  29. #include "genl.h"
  30. #define CNSS_DUMP_FORMAT_VER 0x11
  31. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  32. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  33. #define CNSS_DUMP_NAME "CNSS_WLAN"
  34. #define CNSS_DUMP_DESC_SIZE 0x1000
  35. #define CNSS_DUMP_SEG_VER 0x1
  36. #define FILE_SYSTEM_READY 1
  37. #define FW_READY_TIMEOUT 20000
  38. #define FW_ASSERT_TIMEOUT 5000
  39. #define CNSS_EVENT_PENDING 2989
  40. #define POWER_RESET_MIN_DELAY_MS 100
  41. #define CNSS_QUIRKS_DEFAULT 0
  42. #ifdef CONFIG_CNSS_EMULATION
  43. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  44. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  45. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  46. #else
  47. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  48. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  49. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  50. #endif
  51. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  52. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  53. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  54. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  55. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  56. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  57. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  58. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  59. enum cnss_cal_db_op {
  60. CNSS_CAL_DB_UPLOAD,
  61. CNSS_CAL_DB_DOWNLOAD,
  62. CNSS_CAL_DB_INVALID_OP,
  63. };
  64. static struct cnss_plat_data *plat_env;
  65. static DECLARE_RWSEM(cnss_pm_sem);
  66. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  67. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  68. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  69. };
  70. static struct cnss_fw_files FW_FILES_DEFAULT = {
  71. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  72. "utfbd.bin", "epping.bin", "evicted.bin"
  73. };
  74. struct cnss_driver_event {
  75. struct list_head list;
  76. enum cnss_driver_event_type type;
  77. bool sync;
  78. struct completion complete;
  79. int ret;
  80. void *data;
  81. };
  82. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  83. struct cnss_plat_data *plat_priv)
  84. {
  85. plat_env = plat_priv;
  86. }
  87. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  88. {
  89. return plat_env;
  90. }
  91. /**
  92. * cnss_get_mem_seg_count - Get segment count of memory
  93. * @type: memory type
  94. * @seg: segment count
  95. *
  96. * Return: 0 on success, negative value on failure
  97. */
  98. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  99. {
  100. struct cnss_plat_data *plat_priv;
  101. plat_priv = cnss_get_plat_priv(NULL);
  102. if (!plat_priv)
  103. return -ENODEV;
  104. switch (type) {
  105. case CNSS_REMOTE_MEM_TYPE_FW:
  106. *seg = plat_priv->fw_mem_seg_len;
  107. break;
  108. case CNSS_REMOTE_MEM_TYPE_QDSS:
  109. *seg = plat_priv->qdss_mem_seg_len;
  110. break;
  111. default:
  112. return -EINVAL;
  113. }
  114. return 0;
  115. }
  116. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  117. /**
  118. * cnss_get_mem_segment_info - Get memory info of different type
  119. * @type: memory type
  120. * @segment: array to save the segment info
  121. * @seg: segment count
  122. *
  123. * Return: 0 on success, negative value on failure
  124. */
  125. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  126. struct cnss_mem_segment segment[],
  127. u32 segment_count)
  128. {
  129. struct cnss_plat_data *plat_priv;
  130. u32 i;
  131. plat_priv = cnss_get_plat_priv(NULL);
  132. if (!plat_priv)
  133. return -ENODEV;
  134. switch (type) {
  135. case CNSS_REMOTE_MEM_TYPE_FW:
  136. if (segment_count > plat_priv->fw_mem_seg_len)
  137. segment_count = plat_priv->fw_mem_seg_len;
  138. for (i = 0; i < segment_count; i++) {
  139. segment[i].size = plat_priv->fw_mem[i].size;
  140. segment[i].va = plat_priv->fw_mem[i].va;
  141. segment[i].pa = plat_priv->fw_mem[i].pa;
  142. }
  143. break;
  144. case CNSS_REMOTE_MEM_TYPE_QDSS:
  145. if (segment_count > plat_priv->qdss_mem_seg_len)
  146. segment_count = plat_priv->qdss_mem_seg_len;
  147. for (i = 0; i < segment_count; i++) {
  148. segment[i].size = plat_priv->qdss_mem[i].size;
  149. segment[i].va = plat_priv->qdss_mem[i].va;
  150. segment[i].pa = plat_priv->qdss_mem[i].pa;
  151. }
  152. break;
  153. default:
  154. return -EINVAL;
  155. }
  156. return 0;
  157. }
  158. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  159. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  160. enum cnss_feature_v01 feature)
  161. {
  162. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  163. return -EINVAL;
  164. plat_priv->feature_list |= 1 << feature;
  165. return 0;
  166. }
  167. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  168. u64 *feature_list)
  169. {
  170. if (unlikely(!plat_priv))
  171. return -EINVAL;
  172. *feature_list = plat_priv->feature_list;
  173. return 0;
  174. }
  175. static int cnss_pm_notify(struct notifier_block *b,
  176. unsigned long event, void *p)
  177. {
  178. switch (event) {
  179. case PM_SUSPEND_PREPARE:
  180. down_write(&cnss_pm_sem);
  181. break;
  182. case PM_POST_SUSPEND:
  183. up_write(&cnss_pm_sem);
  184. break;
  185. }
  186. return NOTIFY_DONE;
  187. }
  188. static struct notifier_block cnss_pm_notifier = {
  189. .notifier_call = cnss_pm_notify,
  190. };
  191. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  192. {
  193. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  194. return;
  195. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  196. plat_priv->driver_state,
  197. atomic_read(&plat_priv->pm_count));
  198. pm_stay_awake(&plat_priv->plat_dev->dev);
  199. }
  200. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  201. {
  202. int r = atomic_dec_return(&plat_priv->pm_count);
  203. WARN_ON(r < 0);
  204. if (r != 0)
  205. return;
  206. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  207. plat_priv->driver_state,
  208. atomic_read(&plat_priv->pm_count));
  209. pm_relax(&plat_priv->plat_dev->dev);
  210. }
  211. void cnss_lock_pm_sem(struct device *dev)
  212. {
  213. down_read(&cnss_pm_sem);
  214. }
  215. EXPORT_SYMBOL(cnss_lock_pm_sem);
  216. void cnss_release_pm_sem(struct device *dev)
  217. {
  218. up_read(&cnss_pm_sem);
  219. }
  220. EXPORT_SYMBOL(cnss_release_pm_sem);
  221. int cnss_get_fw_files_for_target(struct device *dev,
  222. struct cnss_fw_files *pfw_files,
  223. u32 target_type, u32 target_version)
  224. {
  225. if (!pfw_files)
  226. return -ENODEV;
  227. switch (target_version) {
  228. case QCA6174_REV3_VERSION:
  229. case QCA6174_REV3_2_VERSION:
  230. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  231. break;
  232. default:
  233. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  234. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  235. target_type, target_version);
  236. break;
  237. }
  238. return 0;
  239. }
  240. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  241. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  242. {
  243. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  244. if (!plat_priv)
  245. return -ENODEV;
  246. if (!cap)
  247. return -EINVAL;
  248. *cap = plat_priv->cap;
  249. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  250. return 0;
  251. }
  252. EXPORT_SYMBOL(cnss_get_platform_cap);
  253. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  254. {
  255. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  256. if (!plat_priv)
  257. return;
  258. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  259. }
  260. EXPORT_SYMBOL(cnss_request_pm_qos);
  261. void cnss_remove_pm_qos(struct device *dev)
  262. {
  263. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  264. if (!plat_priv)
  265. return;
  266. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  267. }
  268. EXPORT_SYMBOL(cnss_remove_pm_qos);
  269. int cnss_wlan_enable(struct device *dev,
  270. struct cnss_wlan_enable_cfg *config,
  271. enum cnss_driver_mode mode,
  272. const char *host_version)
  273. {
  274. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  275. int ret = 0;
  276. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  277. return 0;
  278. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  279. return 0;
  280. if (!config || !host_version) {
  281. cnss_pr_err("Invalid config or host_version pointer\n");
  282. return -EINVAL;
  283. }
  284. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  285. mode, config, host_version);
  286. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  287. goto skip_cfg;
  288. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  289. if (ret)
  290. goto out;
  291. skip_cfg:
  292. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  293. out:
  294. return ret;
  295. }
  296. EXPORT_SYMBOL(cnss_wlan_enable);
  297. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  298. {
  299. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  300. int ret = 0;
  301. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  302. return 0;
  303. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  304. return 0;
  305. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  306. cnss_bus_free_qdss_mem(plat_priv);
  307. return ret;
  308. }
  309. EXPORT_SYMBOL(cnss_wlan_disable);
  310. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  311. u32 data_len, u8 *output)
  312. {
  313. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  314. int ret = 0;
  315. if (!plat_priv) {
  316. cnss_pr_err("plat_priv is NULL!\n");
  317. return -EINVAL;
  318. }
  319. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  320. return 0;
  321. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  322. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  323. plat_priv->driver_state);
  324. ret = -EINVAL;
  325. goto out;
  326. }
  327. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  328. data_len, output);
  329. out:
  330. return ret;
  331. }
  332. EXPORT_SYMBOL(cnss_athdiag_read);
  333. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  334. u32 data_len, u8 *input)
  335. {
  336. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  337. int ret = 0;
  338. if (!plat_priv) {
  339. cnss_pr_err("plat_priv is NULL!\n");
  340. return -EINVAL;
  341. }
  342. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  343. return 0;
  344. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  345. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  346. plat_priv->driver_state);
  347. ret = -EINVAL;
  348. goto out;
  349. }
  350. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  351. data_len, input);
  352. out:
  353. return ret;
  354. }
  355. EXPORT_SYMBOL(cnss_athdiag_write);
  356. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  357. {
  358. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  359. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  360. return 0;
  361. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  362. }
  363. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  364. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  365. {
  366. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  367. if (!plat_priv)
  368. return -EINVAL;
  369. if (plat_priv->device_id != QCA6490_DEVICE_ID ||
  370. !plat_priv->fw_pcie_gen_switch)
  371. return -EOPNOTSUPP;
  372. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  373. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  374. return -EINVAL;
  375. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  376. plat_priv->pcie_gen_speed = pcie_gen_speed;
  377. return 0;
  378. }
  379. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  380. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  381. {
  382. int ret = 0;
  383. if (!plat_priv)
  384. return -ENODEV;
  385. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  386. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  387. if (ret)
  388. goto out;
  389. if (plat_priv->hds_enabled)
  390. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  391. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  392. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  393. plat_priv->ctrl_params.bdf_type);
  394. if (ret)
  395. goto out;
  396. ret = cnss_bus_load_m3(plat_priv);
  397. if (ret)
  398. goto out;
  399. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  400. if (ret)
  401. goto out;
  402. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  403. return 0;
  404. out:
  405. return ret;
  406. }
  407. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  408. {
  409. int ret = 0;
  410. if (!plat_priv->antenna) {
  411. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  412. if (ret)
  413. goto out;
  414. }
  415. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  416. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  417. if (ret)
  418. goto out;
  419. }
  420. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  421. if (ret)
  422. goto out;
  423. return 0;
  424. out:
  425. return ret;
  426. }
  427. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  428. {
  429. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  430. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  431. }
  432. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  433. {
  434. u32 i;
  435. int ret = 0;
  436. struct cnss_plat_ipc_daemon_config *cfg;
  437. ret = cnss_qmi_get_dms_mac(plat_priv);
  438. if (ret == 0 && plat_priv->dms.mac_valid)
  439. goto qmi_send;
  440. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  441. * Thus assert on failure to get MAC from DMS even after retries
  442. */
  443. if (plat_priv->use_nv_mac) {
  444. /* Check if Daemon says platform support DMS MAC provisioning */
  445. cfg = cnss_plat_ipc_qmi_daemon_config();
  446. if (cfg) {
  447. if (!cfg->dms_mac_addr_supported) {
  448. cnss_pr_err("DMS MAC address not supported\n");
  449. CNSS_ASSERT(0);
  450. return -EINVAL;
  451. }
  452. }
  453. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  454. if (plat_priv->dms.mac_valid)
  455. break;
  456. ret = cnss_qmi_get_dms_mac(plat_priv);
  457. if (ret == 0)
  458. break;
  459. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  460. }
  461. if (!plat_priv->dms.mac_valid) {
  462. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  463. CNSS_ASSERT(0);
  464. return -EINVAL;
  465. }
  466. }
  467. qmi_send:
  468. if (plat_priv->dms.mac_valid)
  469. ret =
  470. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  471. ARRAY_SIZE(plat_priv->dms.mac));
  472. return ret;
  473. }
  474. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  475. enum cnss_cal_db_op op, u32 *size)
  476. {
  477. int ret = 0;
  478. u32 timeout = cnss_get_timeout(plat_priv,
  479. CNSS_TIMEOUT_DAEMON_CONNECTION);
  480. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  481. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  482. if (op >= CNSS_CAL_DB_INVALID_OP)
  483. return -EINVAL;
  484. if (!plat_priv->cbc_file_download) {
  485. cnss_pr_info("CAL DB file not required as per BDF\n");
  486. return 0;
  487. }
  488. if (*size == 0) {
  489. cnss_pr_err("Invalid cal file size\n");
  490. return -EINVAL;
  491. }
  492. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  493. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  494. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  495. msecs_to_jiffies(timeout));
  496. if (!ret) {
  497. cnss_pr_err("Daemon not yet connected\n");
  498. CNSS_ASSERT(0);
  499. return ret;
  500. }
  501. }
  502. if (!plat_priv->cal_mem->va) {
  503. cnss_pr_err("CAL DB Memory not setup for FW\n");
  504. return -EINVAL;
  505. }
  506. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  507. if (op == CNSS_CAL_DB_DOWNLOAD) {
  508. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  509. ret = cnss_plat_ipc_qmi_file_download(client_id,
  510. CNSS_CAL_DB_FILE_NAME,
  511. plat_priv->cal_mem->va,
  512. size);
  513. } else {
  514. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  515. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  516. CNSS_CAL_DB_FILE_NAME,
  517. plat_priv->cal_mem->va,
  518. *size);
  519. }
  520. if (ret)
  521. cnss_pr_err("Cal DB file %s %s failure\n",
  522. CNSS_CAL_DB_FILE_NAME,
  523. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  524. else
  525. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  526. CNSS_CAL_DB_FILE_NAME,
  527. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  528. *size);
  529. return ret;
  530. }
  531. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  532. {
  533. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  534. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  535. return -EINVAL;
  536. }
  537. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  538. &plat_priv->cal_file_size);
  539. }
  540. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  541. u32 *cal_file_size)
  542. {
  543. /* To download pass the total size of cal DB mem allocated.
  544. * After cal file is download to mem, its size is updated in
  545. * return pointer
  546. */
  547. *cal_file_size = plat_priv->cal_mem->size;
  548. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  549. cal_file_size);
  550. }
  551. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  552. {
  553. int ret = 0;
  554. u32 cal_file_size = 0;
  555. if (!plat_priv)
  556. return -ENODEV;
  557. cnss_pr_dbg("Processing FW Init Done..\n");
  558. del_timer(&plat_priv->fw_boot_timer);
  559. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  560. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  561. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  562. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  563. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  564. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  565. }
  566. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  567. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  568. CNSS_WALTEST);
  569. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  570. cnss_request_antenna_sharing(plat_priv);
  571. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  572. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  573. plat_priv->cal_time = jiffies;
  574. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  575. CNSS_CALIBRATION);
  576. } else {
  577. ret = cnss_setup_dms_mac(plat_priv);
  578. ret = cnss_bus_call_driver_probe(plat_priv);
  579. }
  580. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  581. goto out;
  582. else if (ret)
  583. goto shutdown;
  584. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  585. return 0;
  586. shutdown:
  587. cnss_bus_dev_shutdown(plat_priv);
  588. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  589. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  590. out:
  591. return ret;
  592. }
  593. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  594. {
  595. switch (type) {
  596. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  597. return "SERVER_ARRIVE";
  598. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  599. return "SERVER_EXIT";
  600. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  601. return "REQUEST_MEM";
  602. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  603. return "FW_MEM_READY";
  604. case CNSS_DRIVER_EVENT_FW_READY:
  605. return "FW_READY";
  606. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  607. return "COLD_BOOT_CAL_START";
  608. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  609. return "COLD_BOOT_CAL_DONE";
  610. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  611. return "REGISTER_DRIVER";
  612. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  613. return "UNREGISTER_DRIVER";
  614. case CNSS_DRIVER_EVENT_RECOVERY:
  615. return "RECOVERY";
  616. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  617. return "FORCE_FW_ASSERT";
  618. case CNSS_DRIVER_EVENT_POWER_UP:
  619. return "POWER_UP";
  620. case CNSS_DRIVER_EVENT_POWER_DOWN:
  621. return "POWER_DOWN";
  622. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  623. return "IDLE_RESTART";
  624. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  625. return "IDLE_SHUTDOWN";
  626. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  627. return "IMS_WFC_CALL_IND";
  628. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  629. return "WLFW_TWC_CFG_IND";
  630. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  631. return "QDSS_TRACE_REQ_MEM";
  632. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  633. return "FW_MEM_FILE_SAVE";
  634. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  635. return "QDSS_TRACE_FREE";
  636. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  637. return "QDSS_TRACE_REQ_DATA";
  638. case CNSS_DRIVER_EVENT_MAX:
  639. return "EVENT_MAX";
  640. }
  641. return "UNKNOWN";
  642. };
  643. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  644. enum cnss_driver_event_type type,
  645. u32 flags, void *data)
  646. {
  647. struct cnss_driver_event *event;
  648. unsigned long irq_flags;
  649. int gfp = GFP_KERNEL;
  650. int ret = 0;
  651. if (!plat_priv)
  652. return -ENODEV;
  653. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  654. cnss_driver_event_to_str(type), type,
  655. flags ? "-sync" : "", plat_priv->driver_state, flags);
  656. if (type >= CNSS_DRIVER_EVENT_MAX) {
  657. cnss_pr_err("Invalid Event type: %d, can't post", type);
  658. return -EINVAL;
  659. }
  660. if (in_interrupt() || irqs_disabled())
  661. gfp = GFP_ATOMIC;
  662. event = kzalloc(sizeof(*event), gfp);
  663. if (!event)
  664. return -ENOMEM;
  665. cnss_pm_stay_awake(plat_priv);
  666. event->type = type;
  667. event->data = data;
  668. init_completion(&event->complete);
  669. event->ret = CNSS_EVENT_PENDING;
  670. event->sync = !!(flags & CNSS_EVENT_SYNC);
  671. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  672. list_add_tail(&event->list, &plat_priv->event_list);
  673. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  674. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  675. if (!(flags & CNSS_EVENT_SYNC))
  676. goto out;
  677. if (flags & CNSS_EVENT_UNKILLABLE)
  678. wait_for_completion(&event->complete);
  679. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  680. ret = wait_for_completion_killable(&event->complete);
  681. else
  682. ret = wait_for_completion_interruptible(&event->complete);
  683. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  684. cnss_driver_event_to_str(type), type,
  685. plat_priv->driver_state, ret, event->ret);
  686. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  687. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  688. event->sync = false;
  689. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  690. ret = -EINTR;
  691. goto out;
  692. }
  693. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  694. ret = event->ret;
  695. kfree(event);
  696. out:
  697. cnss_pm_relax(plat_priv);
  698. return ret;
  699. }
  700. /**
  701. * cnss_get_timeout - Get timeout for corresponding type.
  702. * @plat_priv: Pointer to platform driver context.
  703. * @cnss_timeout_type: Timeout type.
  704. *
  705. * Return: Timeout in milliseconds.
  706. */
  707. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  708. enum cnss_timeout_type timeout_type)
  709. {
  710. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  711. switch (timeout_type) {
  712. case CNSS_TIMEOUT_QMI:
  713. return qmi_timeout;
  714. case CNSS_TIMEOUT_POWER_UP:
  715. return (qmi_timeout << 2);
  716. case CNSS_TIMEOUT_IDLE_RESTART:
  717. /* In idle restart power up sequence, we have fw_boot_timer to
  718. * handle FW initialization failure.
  719. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  720. * account for FW dump collection and FW re-initialization on
  721. * retry.
  722. */
  723. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  724. case CNSS_TIMEOUT_CALIBRATION:
  725. /* Similar to mission mode, in CBC if FW init fails
  726. * fw recovery is tried. Thus return 2x the CBC timeout.
  727. */
  728. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  729. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  730. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  731. case CNSS_TIMEOUT_RDDM:
  732. return CNSS_RDDM_TIMEOUT_MS;
  733. case CNSS_TIMEOUT_RECOVERY:
  734. return RECOVERY_TIMEOUT;
  735. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  736. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  737. default:
  738. return qmi_timeout;
  739. }
  740. }
  741. unsigned int cnss_get_boot_timeout(struct device *dev)
  742. {
  743. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  744. if (!plat_priv) {
  745. cnss_pr_err("plat_priv is NULL\n");
  746. return 0;
  747. }
  748. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  749. }
  750. EXPORT_SYMBOL(cnss_get_boot_timeout);
  751. int cnss_power_up(struct device *dev)
  752. {
  753. int ret = 0;
  754. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  755. unsigned int timeout;
  756. if (!plat_priv) {
  757. cnss_pr_err("plat_priv is NULL\n");
  758. return -ENODEV;
  759. }
  760. cnss_pr_dbg("Powering up device\n");
  761. ret = cnss_driver_event_post(plat_priv,
  762. CNSS_DRIVER_EVENT_POWER_UP,
  763. CNSS_EVENT_SYNC, NULL);
  764. if (ret)
  765. goto out;
  766. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  767. goto out;
  768. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  769. reinit_completion(&plat_priv->power_up_complete);
  770. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  771. msecs_to_jiffies(timeout));
  772. if (!ret) {
  773. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  774. timeout);
  775. ret = -EAGAIN;
  776. goto out;
  777. }
  778. return 0;
  779. out:
  780. return ret;
  781. }
  782. EXPORT_SYMBOL(cnss_power_up);
  783. int cnss_power_down(struct device *dev)
  784. {
  785. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  786. if (!plat_priv) {
  787. cnss_pr_err("plat_priv is NULL\n");
  788. return -ENODEV;
  789. }
  790. cnss_pr_dbg("Powering down device\n");
  791. return cnss_driver_event_post(plat_priv,
  792. CNSS_DRIVER_EVENT_POWER_DOWN,
  793. CNSS_EVENT_SYNC, NULL);
  794. }
  795. EXPORT_SYMBOL(cnss_power_down);
  796. int cnss_idle_restart(struct device *dev)
  797. {
  798. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  799. unsigned int timeout;
  800. int ret = 0;
  801. if (!plat_priv) {
  802. cnss_pr_err("plat_priv is NULL\n");
  803. return -ENODEV;
  804. }
  805. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  806. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  807. return -EBUSY;
  808. }
  809. cnss_pr_dbg("Doing idle restart\n");
  810. reinit_completion(&plat_priv->power_up_complete);
  811. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  812. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  813. ret = -EINVAL;
  814. goto out;
  815. }
  816. ret = cnss_driver_event_post(plat_priv,
  817. CNSS_DRIVER_EVENT_IDLE_RESTART,
  818. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  819. if (ret)
  820. goto out;
  821. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  822. ret = cnss_bus_call_driver_probe(plat_priv);
  823. goto out;
  824. }
  825. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  826. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  827. msecs_to_jiffies(timeout));
  828. if (plat_priv->power_up_error) {
  829. ret = plat_priv->power_up_error;
  830. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  831. cnss_pr_dbg("Power up error:%d, exiting\n",
  832. plat_priv->power_up_error);
  833. goto out;
  834. }
  835. if (!ret) {
  836. /* This exception occurs after attempting retry of FW recovery.
  837. * Thus we can safely power off the device.
  838. */
  839. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  840. timeout);
  841. ret = -ETIMEDOUT;
  842. cnss_power_down(dev);
  843. CNSS_ASSERT(0);
  844. goto out;
  845. }
  846. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  847. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  848. del_timer(&plat_priv->fw_boot_timer);
  849. ret = -EINVAL;
  850. goto out;
  851. }
  852. mutex_unlock(&plat_priv->driver_ops_lock);
  853. return 0;
  854. out:
  855. mutex_unlock(&plat_priv->driver_ops_lock);
  856. return ret;
  857. }
  858. EXPORT_SYMBOL(cnss_idle_restart);
  859. int cnss_idle_shutdown(struct device *dev)
  860. {
  861. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  862. unsigned int timeout;
  863. int ret;
  864. if (!plat_priv) {
  865. cnss_pr_err("plat_priv is NULL\n");
  866. return -ENODEV;
  867. }
  868. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  869. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  870. return -EAGAIN;
  871. }
  872. cnss_pr_dbg("Doing idle shutdown\n");
  873. if (!test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) &&
  874. !test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  875. goto skip_wait;
  876. reinit_completion(&plat_priv->recovery_complete);
  877. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY);
  878. ret = wait_for_completion_timeout(&plat_priv->recovery_complete,
  879. msecs_to_jiffies(timeout));
  880. if (!ret) {
  881. cnss_pr_err("Timeout (%ums) waiting for recovery to complete\n",
  882. timeout);
  883. CNSS_ASSERT(0);
  884. }
  885. skip_wait:
  886. return cnss_driver_event_post(plat_priv,
  887. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  888. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  889. }
  890. EXPORT_SYMBOL(cnss_idle_shutdown);
  891. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  892. {
  893. int ret = 0;
  894. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  895. if (ret) {
  896. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  897. goto out;
  898. }
  899. ret = cnss_get_clk(plat_priv);
  900. if (ret) {
  901. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  902. goto put_vreg;
  903. }
  904. ret = cnss_get_pinctrl(plat_priv);
  905. if (ret) {
  906. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  907. goto put_clk;
  908. }
  909. return 0;
  910. put_clk:
  911. cnss_put_clk(plat_priv);
  912. put_vreg:
  913. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  914. out:
  915. return ret;
  916. }
  917. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  918. {
  919. cnss_put_clk(plat_priv);
  920. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  921. }
  922. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  923. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  924. unsigned long code,
  925. void *ss_handle)
  926. {
  927. struct cnss_plat_data *plat_priv =
  928. container_of(nb, struct cnss_plat_data, modem_nb);
  929. struct cnss_esoc_info *esoc_info;
  930. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  931. if (!plat_priv)
  932. return NOTIFY_DONE;
  933. esoc_info = &plat_priv->esoc_info;
  934. if (code == SUBSYS_AFTER_POWERUP)
  935. esoc_info->modem_current_status = 1;
  936. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  937. esoc_info->modem_current_status = 0;
  938. else
  939. return NOTIFY_DONE;
  940. if (!cnss_bus_call_driver_modem_status(plat_priv,
  941. esoc_info->modem_current_status))
  942. return NOTIFY_DONE;
  943. return NOTIFY_OK;
  944. }
  945. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  946. {
  947. int ret = 0;
  948. struct device *dev;
  949. struct cnss_esoc_info *esoc_info;
  950. struct esoc_desc *esoc_desc;
  951. const char *client_desc;
  952. dev = &plat_priv->plat_dev->dev;
  953. esoc_info = &plat_priv->esoc_info;
  954. esoc_info->notify_modem_status =
  955. of_property_read_bool(dev->of_node,
  956. "qcom,notify-modem-status");
  957. if (!esoc_info->notify_modem_status)
  958. goto out;
  959. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  960. &client_desc);
  961. if (ret) {
  962. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  963. } else {
  964. esoc_desc = devm_register_esoc_client(dev, client_desc);
  965. if (IS_ERR_OR_NULL(esoc_desc)) {
  966. ret = PTR_RET(esoc_desc);
  967. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  968. ret);
  969. goto out;
  970. }
  971. esoc_info->esoc_desc = esoc_desc;
  972. }
  973. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  974. esoc_info->modem_current_status = 0;
  975. esoc_info->modem_notify_handler =
  976. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  977. esoc_info->esoc_desc->name :
  978. "modem", &plat_priv->modem_nb);
  979. if (IS_ERR(esoc_info->modem_notify_handler)) {
  980. ret = PTR_ERR(esoc_info->modem_notify_handler);
  981. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  982. ret);
  983. goto unreg_esoc;
  984. }
  985. return 0;
  986. unreg_esoc:
  987. if (esoc_info->esoc_desc)
  988. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  989. out:
  990. return ret;
  991. }
  992. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  993. {
  994. struct device *dev;
  995. struct cnss_esoc_info *esoc_info;
  996. dev = &plat_priv->plat_dev->dev;
  997. esoc_info = &plat_priv->esoc_info;
  998. if (esoc_info->notify_modem_status)
  999. subsys_notif_unregister_notifier
  1000. (esoc_info->modem_notify_handler,
  1001. &plat_priv->modem_nb);
  1002. if (esoc_info->esoc_desc)
  1003. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1004. }
  1005. #else
  1006. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1007. {
  1008. return 0;
  1009. }
  1010. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1011. #endif
  1012. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1013. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1014. {
  1015. struct cnss_plat_data *plat_priv;
  1016. int ret = 0;
  1017. if (!subsys_desc->dev) {
  1018. cnss_pr_err("dev from subsys_desc is NULL\n");
  1019. return -ENODEV;
  1020. }
  1021. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1022. if (!plat_priv) {
  1023. cnss_pr_err("plat_priv is NULL\n");
  1024. return -ENODEV;
  1025. }
  1026. if (!plat_priv->driver_state) {
  1027. cnss_pr_dbg("Powerup is ignored\n");
  1028. return 0;
  1029. }
  1030. ret = cnss_bus_dev_powerup(plat_priv);
  1031. if (ret)
  1032. __pm_relax(plat_priv->recovery_ws);
  1033. return ret;
  1034. }
  1035. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1036. bool force_stop)
  1037. {
  1038. struct cnss_plat_data *plat_priv;
  1039. if (!subsys_desc->dev) {
  1040. cnss_pr_err("dev from subsys_desc is NULL\n");
  1041. return -ENODEV;
  1042. }
  1043. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1044. if (!plat_priv) {
  1045. cnss_pr_err("plat_priv is NULL\n");
  1046. return -ENODEV;
  1047. }
  1048. if (!plat_priv->driver_state) {
  1049. cnss_pr_dbg("shutdown is ignored\n");
  1050. return 0;
  1051. }
  1052. return cnss_bus_dev_shutdown(plat_priv);
  1053. }
  1054. void cnss_device_crashed(struct device *dev)
  1055. {
  1056. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1057. struct cnss_subsys_info *subsys_info;
  1058. if (!plat_priv)
  1059. return;
  1060. subsys_info = &plat_priv->subsys_info;
  1061. if (subsys_info->subsys_device) {
  1062. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1063. subsys_set_crash_status(subsys_info->subsys_device, true);
  1064. subsystem_restart_dev(subsys_info->subsys_device);
  1065. }
  1066. }
  1067. EXPORT_SYMBOL(cnss_device_crashed);
  1068. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1069. {
  1070. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1071. if (!plat_priv) {
  1072. cnss_pr_err("plat_priv is NULL\n");
  1073. return;
  1074. }
  1075. cnss_bus_dev_crash_shutdown(plat_priv);
  1076. }
  1077. static int cnss_subsys_ramdump(int enable,
  1078. const struct subsys_desc *subsys_desc)
  1079. {
  1080. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1081. if (!plat_priv) {
  1082. cnss_pr_err("plat_priv is NULL\n");
  1083. return -ENODEV;
  1084. }
  1085. if (!enable)
  1086. return 0;
  1087. return cnss_bus_dev_ramdump(plat_priv);
  1088. }
  1089. static void cnss_recovery_work_handler(struct work_struct *work)
  1090. {
  1091. }
  1092. #else
  1093. static void cnss_recovery_work_handler(struct work_struct *work)
  1094. {
  1095. int ret;
  1096. struct cnss_plat_data *plat_priv =
  1097. container_of(work, struct cnss_plat_data, recovery_work);
  1098. if (!plat_priv->recovery_enabled)
  1099. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1100. cnss_bus_dev_shutdown(plat_priv);
  1101. cnss_bus_dev_ramdump(plat_priv);
  1102. msleep(POWER_RESET_MIN_DELAY_MS);
  1103. ret = cnss_bus_dev_powerup(plat_priv);
  1104. if (ret)
  1105. __pm_relax(plat_priv->recovery_ws);
  1106. return;
  1107. }
  1108. void cnss_device_crashed(struct device *dev)
  1109. {
  1110. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1111. if (!plat_priv)
  1112. return;
  1113. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1114. schedule_work(&plat_priv->recovery_work);
  1115. }
  1116. EXPORT_SYMBOL(cnss_device_crashed);
  1117. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1118. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1119. {
  1120. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1121. struct cnss_ramdump_info *ramdump_info;
  1122. if (!plat_priv)
  1123. return NULL;
  1124. ramdump_info = &plat_priv->ramdump_info;
  1125. *size = ramdump_info->ramdump_size;
  1126. return ramdump_info->ramdump_va;
  1127. }
  1128. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1129. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1130. {
  1131. switch (reason) {
  1132. case CNSS_REASON_DEFAULT:
  1133. return "DEFAULT";
  1134. case CNSS_REASON_LINK_DOWN:
  1135. return "LINK_DOWN";
  1136. case CNSS_REASON_RDDM:
  1137. return "RDDM";
  1138. case CNSS_REASON_TIMEOUT:
  1139. return "TIMEOUT";
  1140. }
  1141. return "UNKNOWN";
  1142. };
  1143. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1144. enum cnss_recovery_reason reason)
  1145. {
  1146. plat_priv->recovery_count++;
  1147. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1148. goto self_recovery;
  1149. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1150. cnss_pr_dbg("Skip device recovery\n");
  1151. return 0;
  1152. }
  1153. /* FW recovery sequence has multiple steps and firmware load requires
  1154. * linux PM in awake state. Thus hold the cnss wake source until
  1155. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1156. * time taken in this process.
  1157. */
  1158. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1159. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1160. true);
  1161. switch (reason) {
  1162. case CNSS_REASON_LINK_DOWN:
  1163. if (!cnss_bus_check_link_status(plat_priv)) {
  1164. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1165. return 0;
  1166. }
  1167. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1168. &plat_priv->ctrl_params.quirks))
  1169. goto self_recovery;
  1170. if (!cnss_bus_recover_link_down(plat_priv)) {
  1171. /* clear recovery bit here to avoid skipping
  1172. * the recovery work for RDDM later
  1173. */
  1174. clear_bit(CNSS_DRIVER_RECOVERY,
  1175. &plat_priv->driver_state);
  1176. return 0;
  1177. }
  1178. break;
  1179. case CNSS_REASON_RDDM:
  1180. cnss_bus_collect_dump_info(plat_priv, false);
  1181. break;
  1182. case CNSS_REASON_DEFAULT:
  1183. case CNSS_REASON_TIMEOUT:
  1184. break;
  1185. default:
  1186. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1187. cnss_recovery_reason_to_str(reason), reason);
  1188. break;
  1189. }
  1190. cnss_bus_device_crashed(plat_priv);
  1191. return 0;
  1192. self_recovery:
  1193. cnss_pr_dbg("Going for self recovery\n");
  1194. cnss_bus_dev_shutdown(plat_priv);
  1195. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1196. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1197. &plat_priv->ctrl_params.quirks);
  1198. cnss_bus_dev_powerup(plat_priv);
  1199. return 0;
  1200. }
  1201. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1202. void *data)
  1203. {
  1204. struct cnss_recovery_data *recovery_data = data;
  1205. int ret = 0;
  1206. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1207. cnss_recovery_reason_to_str(recovery_data->reason),
  1208. recovery_data->reason);
  1209. if (!plat_priv->driver_state) {
  1210. cnss_pr_err("Improper driver state, ignore recovery\n");
  1211. ret = -EINVAL;
  1212. goto out;
  1213. }
  1214. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1215. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1216. ret = -EINVAL;
  1217. goto out;
  1218. }
  1219. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1220. cnss_pr_err("Recovery is already in progress\n");
  1221. CNSS_ASSERT(0);
  1222. ret = -EINVAL;
  1223. goto out;
  1224. }
  1225. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1226. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1227. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1228. ret = -EINVAL;
  1229. goto out;
  1230. }
  1231. switch (plat_priv->device_id) {
  1232. case QCA6174_DEVICE_ID:
  1233. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1234. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1235. &plat_priv->driver_state)) {
  1236. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1237. ret = -EINVAL;
  1238. goto out;
  1239. }
  1240. break;
  1241. default:
  1242. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1243. set_bit(CNSS_FW_BOOT_RECOVERY,
  1244. &plat_priv->driver_state);
  1245. }
  1246. break;
  1247. }
  1248. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1249. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1250. out:
  1251. kfree(data);
  1252. return ret;
  1253. }
  1254. int cnss_self_recovery(struct device *dev,
  1255. enum cnss_recovery_reason reason)
  1256. {
  1257. cnss_schedule_recovery(dev, reason);
  1258. return 0;
  1259. }
  1260. EXPORT_SYMBOL(cnss_self_recovery);
  1261. void cnss_schedule_recovery(struct device *dev,
  1262. enum cnss_recovery_reason reason)
  1263. {
  1264. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1265. struct cnss_recovery_data *data;
  1266. int gfp = GFP_KERNEL;
  1267. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1268. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1269. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1270. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1271. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1272. return;
  1273. }
  1274. if (in_interrupt() || irqs_disabled())
  1275. gfp = GFP_ATOMIC;
  1276. data = kzalloc(sizeof(*data), gfp);
  1277. if (!data)
  1278. return;
  1279. data->reason = reason;
  1280. cnss_driver_event_post(plat_priv,
  1281. CNSS_DRIVER_EVENT_RECOVERY,
  1282. 0, data);
  1283. }
  1284. EXPORT_SYMBOL(cnss_schedule_recovery);
  1285. int cnss_force_fw_assert(struct device *dev)
  1286. {
  1287. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1288. if (!plat_priv) {
  1289. cnss_pr_err("plat_priv is NULL\n");
  1290. return -ENODEV;
  1291. }
  1292. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1293. cnss_pr_info("Forced FW assert is not supported\n");
  1294. return -EOPNOTSUPP;
  1295. }
  1296. if (cnss_bus_is_device_down(plat_priv)) {
  1297. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1298. return 0;
  1299. }
  1300. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1301. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1302. return 0;
  1303. }
  1304. if (in_interrupt() || irqs_disabled())
  1305. cnss_driver_event_post(plat_priv,
  1306. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1307. 0, NULL);
  1308. else
  1309. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1310. return 0;
  1311. }
  1312. EXPORT_SYMBOL(cnss_force_fw_assert);
  1313. int cnss_force_collect_rddm(struct device *dev)
  1314. {
  1315. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1316. unsigned int timeout;
  1317. int ret = 0;
  1318. if (!plat_priv) {
  1319. cnss_pr_err("plat_priv is NULL\n");
  1320. return -ENODEV;
  1321. }
  1322. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1323. cnss_pr_info("Force collect rddm is not supported\n");
  1324. return -EOPNOTSUPP;
  1325. }
  1326. if (cnss_bus_is_device_down(plat_priv)) {
  1327. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1328. goto wait_rddm;
  1329. }
  1330. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1331. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1332. goto wait_rddm;
  1333. }
  1334. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1335. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1336. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1337. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1338. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1339. return 0;
  1340. }
  1341. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1342. if (ret)
  1343. return ret;
  1344. wait_rddm:
  1345. reinit_completion(&plat_priv->rddm_complete);
  1346. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1347. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1348. msecs_to_jiffies(timeout));
  1349. if (!ret) {
  1350. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1351. timeout);
  1352. ret = -ETIMEDOUT;
  1353. } else if (ret > 0) {
  1354. ret = 0;
  1355. }
  1356. return ret;
  1357. }
  1358. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1359. int cnss_qmi_send_get(struct device *dev)
  1360. {
  1361. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1362. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1363. return 0;
  1364. return cnss_bus_qmi_send_get(plat_priv);
  1365. }
  1366. EXPORT_SYMBOL(cnss_qmi_send_get);
  1367. int cnss_qmi_send_put(struct device *dev)
  1368. {
  1369. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1370. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1371. return 0;
  1372. return cnss_bus_qmi_send_put(plat_priv);
  1373. }
  1374. EXPORT_SYMBOL(cnss_qmi_send_put);
  1375. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1376. int cmd_len, void *cb_ctx,
  1377. int (*cb)(void *ctx, void *event, int event_len))
  1378. {
  1379. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1380. int ret;
  1381. if (!plat_priv)
  1382. return -ENODEV;
  1383. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1384. return -EINVAL;
  1385. plat_priv->get_info_cb = cb;
  1386. plat_priv->get_info_cb_ctx = cb_ctx;
  1387. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1388. if (ret) {
  1389. plat_priv->get_info_cb = NULL;
  1390. plat_priv->get_info_cb_ctx = NULL;
  1391. }
  1392. return ret;
  1393. }
  1394. EXPORT_SYMBOL(cnss_qmi_send);
  1395. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1396. {
  1397. int ret = 0;
  1398. u32 retry = 0;
  1399. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1400. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1401. goto out;
  1402. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1403. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1404. goto out;
  1405. }
  1406. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1407. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1408. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1409. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1410. CNSS_ASSERT(0);
  1411. return -EINVAL;
  1412. }
  1413. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1414. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1415. break;
  1416. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1417. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1418. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1419. CNSS_ASSERT(0);
  1420. ret = -EINVAL;
  1421. goto mark_cal_fail;
  1422. }
  1423. }
  1424. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1425. reinit_completion(&plat_priv->cal_complete);
  1426. ret = cnss_bus_dev_powerup(plat_priv);
  1427. mark_cal_fail:
  1428. if (ret) {
  1429. complete(&plat_priv->cal_complete);
  1430. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1431. /* Set CBC done in driver state to mark attempt and note error
  1432. * since calibration cannot be retried at boot.
  1433. */
  1434. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1435. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1436. }
  1437. out:
  1438. return ret;
  1439. }
  1440. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  1441. void *data)
  1442. {
  1443. struct cnss_cal_info *cal_info = data;
  1444. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  1445. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  1446. goto out;
  1447. switch (cal_info->cal_status) {
  1448. case CNSS_CAL_DONE:
  1449. cnss_pr_dbg("Calibration completed successfully\n");
  1450. plat_priv->cal_done = true;
  1451. break;
  1452. case CNSS_CAL_TIMEOUT:
  1453. case CNSS_CAL_FAILURE:
  1454. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  1455. cal_info->cal_status);
  1456. break;
  1457. default:
  1458. cnss_pr_err("Unknown calibration status: %u\n",
  1459. cal_info->cal_status);
  1460. break;
  1461. }
  1462. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  1463. cnss_bus_free_qdss_mem(plat_priv);
  1464. cnss_release_antenna_sharing(plat_priv);
  1465. cnss_bus_dev_shutdown(plat_priv);
  1466. msleep(POWER_RESET_MIN_DELAY_MS);
  1467. complete(&plat_priv->cal_complete);
  1468. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1469. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1470. if (cal_info->cal_status == CNSS_CAL_DONE) {
  1471. cnss_cal_mem_upload_to_file(plat_priv);
  1472. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work)
  1473. ) {
  1474. cnss_pr_dbg("Schedule WLAN driver load\n");
  1475. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1476. 0);
  1477. }
  1478. }
  1479. out:
  1480. kfree(data);
  1481. return 0;
  1482. }
  1483. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  1484. {
  1485. int ret;
  1486. ret = cnss_bus_dev_powerup(plat_priv);
  1487. if (ret)
  1488. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1489. return ret;
  1490. }
  1491. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  1492. {
  1493. cnss_bus_dev_shutdown(plat_priv);
  1494. return 0;
  1495. }
  1496. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  1497. {
  1498. int ret = 0;
  1499. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  1500. if (ret < 0)
  1501. return ret;
  1502. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  1503. }
  1504. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  1505. u32 mem_seg_len, u64 pa, u32 size)
  1506. {
  1507. int i = 0;
  1508. u64 offset = 0;
  1509. void *va = NULL;
  1510. u64 local_pa;
  1511. u32 local_size;
  1512. for (i = 0; i < mem_seg_len; i++) {
  1513. local_pa = (u64)fw_mem[i].pa;
  1514. local_size = (u32)fw_mem[i].size;
  1515. if (pa == local_pa && size <= local_size) {
  1516. va = fw_mem[i].va;
  1517. break;
  1518. }
  1519. if (pa > local_pa &&
  1520. pa < local_pa + local_size &&
  1521. pa + size <= local_pa + local_size) {
  1522. offset = pa - local_pa;
  1523. va = fw_mem[i].va + offset;
  1524. break;
  1525. }
  1526. }
  1527. return va;
  1528. }
  1529. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  1530. void *data)
  1531. {
  1532. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1533. struct cnss_fw_mem *fw_mem_seg;
  1534. int ret = 0L;
  1535. void *va = NULL;
  1536. u32 i, fw_mem_seg_len;
  1537. switch (event_data->mem_type) {
  1538. case QMI_WLFW_MEM_TYPE_DDR_V01:
  1539. if (!plat_priv->fw_mem_seg_len)
  1540. goto invalid_mem_save;
  1541. fw_mem_seg = plat_priv->fw_mem;
  1542. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  1543. break;
  1544. case QMI_WLFW_MEM_QDSS_V01:
  1545. if (!plat_priv->qdss_mem_seg_len)
  1546. goto invalid_mem_save;
  1547. fw_mem_seg = plat_priv->qdss_mem;
  1548. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  1549. break;
  1550. default:
  1551. goto invalid_mem_save;
  1552. }
  1553. for (i = 0; i < event_data->mem_seg_len; i++) {
  1554. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  1555. event_data->mem_seg[i].addr,
  1556. event_data->mem_seg[i].size);
  1557. if (!va) {
  1558. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  1559. &event_data->mem_seg[i].addr,
  1560. event_data->mem_type);
  1561. ret = -EINVAL;
  1562. break;
  1563. }
  1564. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  1565. event_data->file_name,
  1566. event_data->mem_seg[i].size);
  1567. if (ret < 0) {
  1568. cnss_pr_err("Fail to save fw mem data: %d\n",
  1569. ret);
  1570. break;
  1571. }
  1572. }
  1573. kfree(data);
  1574. return ret;
  1575. invalid_mem_save:
  1576. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  1577. event_data->mem_type);
  1578. kfree(data);
  1579. return -EINVAL;
  1580. }
  1581. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  1582. {
  1583. cnss_bus_free_qdss_mem(plat_priv);
  1584. return 0;
  1585. }
  1586. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  1587. void *data)
  1588. {
  1589. int ret = 0;
  1590. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1591. if (!plat_priv)
  1592. return -ENODEV;
  1593. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  1594. event_data->total_size);
  1595. kfree(data);
  1596. return ret;
  1597. }
  1598. static void cnss_driver_event_work(struct work_struct *work)
  1599. {
  1600. struct cnss_plat_data *plat_priv =
  1601. container_of(work, struct cnss_plat_data, event_work);
  1602. struct cnss_driver_event *event;
  1603. unsigned long flags;
  1604. int ret = 0;
  1605. if (!plat_priv) {
  1606. cnss_pr_err("plat_priv is NULL!\n");
  1607. return;
  1608. }
  1609. cnss_pm_stay_awake(plat_priv);
  1610. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1611. while (!list_empty(&plat_priv->event_list)) {
  1612. event = list_first_entry(&plat_priv->event_list,
  1613. struct cnss_driver_event, list);
  1614. list_del(&event->list);
  1615. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1616. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  1617. cnss_driver_event_to_str(event->type),
  1618. event->sync ? "-sync" : "", event->type,
  1619. plat_priv->driver_state);
  1620. switch (event->type) {
  1621. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1622. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  1623. break;
  1624. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  1625. ret = cnss_wlfw_server_exit(plat_priv);
  1626. break;
  1627. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  1628. ret = cnss_bus_alloc_fw_mem(plat_priv);
  1629. if (ret)
  1630. break;
  1631. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  1632. break;
  1633. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  1634. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  1635. break;
  1636. case CNSS_DRIVER_EVENT_FW_READY:
  1637. ret = cnss_fw_ready_hdlr(plat_priv);
  1638. break;
  1639. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  1640. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  1641. break;
  1642. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  1643. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  1644. event->data);
  1645. break;
  1646. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1647. ret = cnss_bus_register_driver_hdlr(plat_priv,
  1648. event->data);
  1649. break;
  1650. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1651. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  1652. break;
  1653. case CNSS_DRIVER_EVENT_RECOVERY:
  1654. ret = cnss_driver_recovery_hdlr(plat_priv,
  1655. event->data);
  1656. break;
  1657. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  1658. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1659. break;
  1660. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  1661. set_bit(CNSS_DRIVER_IDLE_RESTART,
  1662. &plat_priv->driver_state);
  1663. /* fall through */
  1664. case CNSS_DRIVER_EVENT_POWER_UP:
  1665. ret = cnss_power_up_hdlr(plat_priv);
  1666. break;
  1667. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1668. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  1669. &plat_priv->driver_state);
  1670. /* fall through */
  1671. case CNSS_DRIVER_EVENT_POWER_DOWN:
  1672. ret = cnss_power_down_hdlr(plat_priv);
  1673. break;
  1674. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1675. ret = cnss_process_wfc_call_ind_event(plat_priv,
  1676. event->data);
  1677. break;
  1678. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1679. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  1680. event->data);
  1681. break;
  1682. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1683. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  1684. break;
  1685. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  1686. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  1687. event->data);
  1688. break;
  1689. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1690. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  1691. break;
  1692. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1693. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  1694. event->data);
  1695. break;
  1696. default:
  1697. cnss_pr_err("Invalid driver event type: %d",
  1698. event->type);
  1699. kfree(event);
  1700. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1701. continue;
  1702. }
  1703. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1704. if (event->sync) {
  1705. event->ret = ret;
  1706. complete(&event->complete);
  1707. continue;
  1708. }
  1709. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1710. kfree(event);
  1711. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1712. }
  1713. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1714. cnss_pm_relax(plat_priv);
  1715. }
  1716. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1717. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  1718. {
  1719. int ret = 0;
  1720. struct cnss_subsys_info *subsys_info;
  1721. subsys_info = &plat_priv->subsys_info;
  1722. subsys_info->subsys_desc.name = "wlan";
  1723. subsys_info->subsys_desc.owner = THIS_MODULE;
  1724. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  1725. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  1726. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  1727. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  1728. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  1729. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  1730. if (IS_ERR(subsys_info->subsys_device)) {
  1731. ret = PTR_ERR(subsys_info->subsys_device);
  1732. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  1733. goto out;
  1734. }
  1735. subsys_info->subsys_handle =
  1736. subsystem_get(subsys_info->subsys_desc.name);
  1737. if (!subsys_info->subsys_handle) {
  1738. cnss_pr_err("Failed to get subsys_handle!\n");
  1739. ret = -EINVAL;
  1740. goto unregister_subsys;
  1741. } else if (IS_ERR(subsys_info->subsys_handle)) {
  1742. ret = PTR_ERR(subsys_info->subsys_handle);
  1743. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  1744. goto unregister_subsys;
  1745. }
  1746. return 0;
  1747. unregister_subsys:
  1748. subsys_unregister(subsys_info->subsys_device);
  1749. out:
  1750. return ret;
  1751. }
  1752. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  1753. {
  1754. struct cnss_subsys_info *subsys_info;
  1755. subsys_info = &plat_priv->subsys_info;
  1756. subsystem_put(subsys_info->subsys_handle);
  1757. subsys_unregister(subsys_info->subsys_device);
  1758. }
  1759. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  1760. {
  1761. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  1762. return create_ramdump_device(subsys_info->subsys_desc.name,
  1763. subsys_info->subsys_desc.dev);
  1764. }
  1765. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  1766. void *ramdump_dev)
  1767. {
  1768. destroy_ramdump_device(ramdump_dev);
  1769. }
  1770. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  1771. {
  1772. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  1773. struct ramdump_segment segment;
  1774. memset(&segment, 0, sizeof(segment));
  1775. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  1776. segment.size = ramdump_info->ramdump_size;
  1777. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  1778. }
  1779. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  1780. {
  1781. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  1782. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  1783. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  1784. struct ramdump_segment *ramdump_segs, *s;
  1785. struct cnss_dump_meta_info meta_info = {0};
  1786. int i, ret = 0;
  1787. ramdump_segs = kcalloc(dump_data->nentries + 1,
  1788. sizeof(*ramdump_segs),
  1789. GFP_KERNEL);
  1790. if (!ramdump_segs)
  1791. return -ENOMEM;
  1792. s = ramdump_segs + 1;
  1793. for (i = 0; i < dump_data->nentries; i++) {
  1794. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  1795. cnss_pr_err("Unsupported dump type: %d",
  1796. dump_seg->type);
  1797. continue;
  1798. }
  1799. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  1800. meta_info.entry[dump_seg->type].type = dump_seg->type;
  1801. meta_info.entry[dump_seg->type].entry_start = i + 1;
  1802. }
  1803. meta_info.entry[dump_seg->type].entry_num++;
  1804. s->address = dump_seg->address;
  1805. s->v_address = (void __iomem *)dump_seg->v_address;
  1806. s->size = dump_seg->size;
  1807. s++;
  1808. dump_seg++;
  1809. }
  1810. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  1811. meta_info.version = CNSS_RAMDUMP_VERSION;
  1812. meta_info.chipset = plat_priv->device_id;
  1813. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  1814. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  1815. ramdump_segs->size = sizeof(meta_info);
  1816. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  1817. dump_data->nentries + 1);
  1818. kfree(ramdump_segs);
  1819. return ret;
  1820. }
  1821. #else
  1822. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  1823. void *data)
  1824. {
  1825. struct cnss_plat_data *plat_priv =
  1826. container_of(nb, struct cnss_plat_data, panic_nb);
  1827. cnss_bus_dev_crash_shutdown(plat_priv);
  1828. return NOTIFY_DONE;
  1829. }
  1830. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  1831. {
  1832. int ret;
  1833. if (!plat_priv)
  1834. return -ENODEV;
  1835. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  1836. ret = atomic_notifier_chain_register(&panic_notifier_list,
  1837. &plat_priv->panic_nb);
  1838. if (ret) {
  1839. cnss_pr_err("Failed to register panic handler\n");
  1840. return -EINVAL;
  1841. }
  1842. return 0;
  1843. }
  1844. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  1845. {
  1846. int ret;
  1847. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  1848. &plat_priv->panic_nb);
  1849. if (ret)
  1850. cnss_pr_err("Failed to unregister panic handler\n");
  1851. }
  1852. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  1853. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  1854. {
  1855. return &plat_priv->plat_dev->dev;
  1856. }
  1857. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  1858. void *ramdump_dev)
  1859. {
  1860. }
  1861. #endif
  1862. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  1863. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  1864. {
  1865. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  1866. struct qcom_dump_segment segment;
  1867. struct list_head head;
  1868. INIT_LIST_HEAD(&head);
  1869. memset(&segment, 0, sizeof(segment));
  1870. segment.va = ramdump_info->ramdump_va;
  1871. segment.size = ramdump_info->ramdump_size;
  1872. list_add(&segment.node, &head);
  1873. return qcom_dump(&head, ramdump_info->ramdump_dev);
  1874. }
  1875. #else
  1876. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  1877. {
  1878. return 0;
  1879. }
  1880. /* Using completion event inside dynamically allocated ramdump_desc
  1881. * may result a race between freeing the event after setting it to
  1882. * complete inside dev coredump free callback and the thread that is
  1883. * waiting for completion.
  1884. */
  1885. DECLARE_COMPLETION(dump_done);
  1886. #define TIMEOUT_SAVE_DUMP_MS 30000
  1887. #define SIZEOF_ELF_STRUCT(__xhdr) \
  1888. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  1889. { \
  1890. if (class == ELFCLASS32) \
  1891. return sizeof(struct elf32_##__xhdr); \
  1892. else \
  1893. return sizeof(struct elf64_##__xhdr); \
  1894. }
  1895. SIZEOF_ELF_STRUCT(phdr)
  1896. SIZEOF_ELF_STRUCT(hdr)
  1897. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  1898. do { \
  1899. if (class == ELFCLASS32) \
  1900. ((struct elf32_##__xhdr *)arg)->member = value; \
  1901. else \
  1902. ((struct elf64_##__xhdr *)arg)->member = value; \
  1903. } while (0)
  1904. #define set_ehdr_property(arg, class, member, value) \
  1905. set_xhdr_property(hdr, arg, class, member, value)
  1906. #define set_phdr_property(arg, class, member, value) \
  1907. set_xhdr_property(phdr, arg, class, member, value)
  1908. /* These replace qcom_ramdump driver APIs called from common API
  1909. * cnss_do_elf_dump() by the ones defined here.
  1910. */
  1911. #define qcom_dump_segment cnss_qcom_dump_segment
  1912. #define qcom_elf_dump cnss_qcom_elf_dump
  1913. #define dump_enabled cnss_dump_enabled
  1914. struct cnss_qcom_dump_segment {
  1915. struct list_head node;
  1916. dma_addr_t da;
  1917. void *va;
  1918. size_t size;
  1919. };
  1920. struct cnss_qcom_ramdump_desc {
  1921. void *data;
  1922. struct completion dump_done;
  1923. };
  1924. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  1925. void *data, size_t datalen)
  1926. {
  1927. struct cnss_qcom_ramdump_desc *desc = data;
  1928. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  1929. datalen);
  1930. }
  1931. static void cnss_qcom_devcd_freev(void *data)
  1932. {
  1933. struct cnss_qcom_ramdump_desc *desc = data;
  1934. cnss_pr_dbg("Free dump data for dev coredump\n");
  1935. complete(&dump_done);
  1936. vfree(desc->data);
  1937. kfree(desc);
  1938. }
  1939. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  1940. gfp_t gfp)
  1941. {
  1942. struct cnss_qcom_ramdump_desc *desc;
  1943. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  1944. int ret;
  1945. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  1946. if (!desc)
  1947. return -ENOMEM;
  1948. desc->data = data;
  1949. reinit_completion(&dump_done);
  1950. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  1951. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  1952. ret = wait_for_completion_timeout(&dump_done,
  1953. msecs_to_jiffies(timeout));
  1954. if (!ret)
  1955. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  1956. timeout);
  1957. return ret ? 0 : -ETIMEDOUT;
  1958. }
  1959. /* Since the elf32 and elf64 identification is identical apart from
  1960. * the class, use elf32 by default.
  1961. */
  1962. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  1963. {
  1964. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  1965. ehdr->e_ident[EI_CLASS] = class;
  1966. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  1967. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  1968. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  1969. }
  1970. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  1971. unsigned char class)
  1972. {
  1973. struct cnss_qcom_dump_segment *segment;
  1974. void *phdr, *ehdr;
  1975. size_t data_size, offset;
  1976. int phnum = 0;
  1977. void *data;
  1978. void __iomem *ptr;
  1979. if (!segs || list_empty(segs))
  1980. return -EINVAL;
  1981. data_size = sizeof_elf_hdr(class);
  1982. list_for_each_entry(segment, segs, node) {
  1983. data_size += sizeof_elf_phdr(class) + segment->size;
  1984. phnum++;
  1985. }
  1986. data = vmalloc(data_size);
  1987. if (!data)
  1988. return -ENOMEM;
  1989. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  1990. ehdr = data;
  1991. memset(ehdr, 0, sizeof_elf_hdr(class));
  1992. init_elf_identification(ehdr, class);
  1993. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  1994. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  1995. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  1996. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  1997. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  1998. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  1999. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2000. phdr = data + sizeof_elf_hdr(class);
  2001. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2002. list_for_each_entry(segment, segs, node) {
  2003. memset(phdr, 0, sizeof_elf_phdr(class));
  2004. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2005. set_phdr_property(phdr, class, p_offset, offset);
  2006. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2007. set_phdr_property(phdr, class, p_paddr, segment->da);
  2008. set_phdr_property(phdr, class, p_filesz, segment->size);
  2009. set_phdr_property(phdr, class, p_memsz, segment->size);
  2010. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2011. set_phdr_property(phdr, class, p_align, 0);
  2012. if (segment->va) {
  2013. memcpy(data + offset, segment->va, segment->size);
  2014. } else {
  2015. ptr = devm_ioremap(dev, segment->da, segment->size);
  2016. if (!ptr) {
  2017. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2018. &segment->da, segment->size);
  2019. memset(data + offset, 0xff, segment->size);
  2020. } else {
  2021. memcpy_fromio(data + offset, ptr,
  2022. segment->size);
  2023. }
  2024. }
  2025. offset += segment->size;
  2026. phdr += sizeof_elf_phdr(class);
  2027. }
  2028. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2029. }
  2030. /* Saving dump to file system is always needed in this case. */
  2031. static bool cnss_dump_enabled(void)
  2032. {
  2033. return true;
  2034. }
  2035. #endif /* CONFIG_QCOM_RAMDUMP */
  2036. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2037. {
  2038. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2039. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2040. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2041. struct qcom_dump_segment *seg;
  2042. struct cnss_dump_meta_info meta_info = {0};
  2043. struct list_head head;
  2044. int i, ret = 0;
  2045. if (!dump_enabled()) {
  2046. cnss_pr_info("Dump collection is not enabled\n");
  2047. return ret;
  2048. }
  2049. INIT_LIST_HEAD(&head);
  2050. for (i = 0; i < dump_data->nentries; i++) {
  2051. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2052. cnss_pr_err("Unsupported dump type: %d",
  2053. dump_seg->type);
  2054. continue;
  2055. }
  2056. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2057. if (!seg)
  2058. continue;
  2059. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2060. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2061. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2062. }
  2063. meta_info.entry[dump_seg->type].entry_num++;
  2064. seg->da = dump_seg->address;
  2065. seg->va = dump_seg->v_address;
  2066. seg->size = dump_seg->size;
  2067. list_add_tail(&seg->node, &head);
  2068. dump_seg++;
  2069. }
  2070. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2071. if (!seg)
  2072. goto do_elf_dump;
  2073. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2074. meta_info.version = CNSS_RAMDUMP_VERSION;
  2075. meta_info.chipset = plat_priv->device_id;
  2076. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2077. seg->va = &meta_info;
  2078. seg->size = sizeof(meta_info);
  2079. list_add(&seg->node, &head);
  2080. do_elf_dump:
  2081. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2082. while (!list_empty(&head)) {
  2083. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2084. list_del(&seg->node);
  2085. kfree(seg);
  2086. }
  2087. return ret;
  2088. }
  2089. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2090. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2091. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2092. {
  2093. struct cnss_ramdump_info *ramdump_info;
  2094. struct msm_dump_entry dump_entry;
  2095. ramdump_info = &plat_priv->ramdump_info;
  2096. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2097. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2098. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2099. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2100. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2101. sizeof(ramdump_info->dump_data.name));
  2102. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2103. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2104. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2105. &dump_entry);
  2106. }
  2107. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2108. {
  2109. int ret = 0;
  2110. struct device *dev;
  2111. struct cnss_ramdump_info *ramdump_info;
  2112. u32 ramdump_size = 0;
  2113. dev = &plat_priv->plat_dev->dev;
  2114. ramdump_info = &plat_priv->ramdump_info;
  2115. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2116. &ramdump_size) == 0) {
  2117. ramdump_info->ramdump_va =
  2118. dma_alloc_coherent(dev, ramdump_size,
  2119. &ramdump_info->ramdump_pa,
  2120. GFP_KERNEL);
  2121. if (ramdump_info->ramdump_va)
  2122. ramdump_info->ramdump_size = ramdump_size;
  2123. }
  2124. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2125. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2126. if (ramdump_info->ramdump_size == 0) {
  2127. cnss_pr_info("Ramdump will not be collected");
  2128. goto out;
  2129. }
  2130. ret = cnss_init_dump_entry(plat_priv);
  2131. if (ret) {
  2132. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2133. goto free_ramdump;
  2134. }
  2135. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2136. if (!ramdump_info->ramdump_dev) {
  2137. cnss_pr_err("Failed to create ramdump device!");
  2138. ret = -ENOMEM;
  2139. goto free_ramdump;
  2140. }
  2141. return 0;
  2142. free_ramdump:
  2143. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2144. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2145. out:
  2146. return ret;
  2147. }
  2148. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2149. {
  2150. struct device *dev;
  2151. struct cnss_ramdump_info *ramdump_info;
  2152. dev = &plat_priv->plat_dev->dev;
  2153. ramdump_info = &plat_priv->ramdump_info;
  2154. if (ramdump_info->ramdump_dev)
  2155. cnss_destroy_ramdump_device(plat_priv,
  2156. ramdump_info->ramdump_dev);
  2157. if (ramdump_info->ramdump_va)
  2158. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2159. ramdump_info->ramdump_va,
  2160. ramdump_info->ramdump_pa);
  2161. }
  2162. /**
  2163. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2164. * @ret: Error returned by msm_dump_data_register_nominidump
  2165. *
  2166. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2167. * ignore failure.
  2168. *
  2169. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2170. */
  2171. static int cnss_ignore_dump_data_reg_fail(int ret)
  2172. {
  2173. return ret;
  2174. }
  2175. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2176. {
  2177. int ret = 0;
  2178. struct cnss_ramdump_info_v2 *info_v2;
  2179. struct cnss_dump_data *dump_data;
  2180. struct msm_dump_entry dump_entry;
  2181. struct device *dev = &plat_priv->plat_dev->dev;
  2182. u32 ramdump_size = 0;
  2183. info_v2 = &plat_priv->ramdump_info_v2;
  2184. dump_data = &info_v2->dump_data;
  2185. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2186. &ramdump_size) == 0)
  2187. info_v2->ramdump_size = ramdump_size;
  2188. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2189. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2190. if (!info_v2->dump_data_vaddr)
  2191. return -ENOMEM;
  2192. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2193. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2194. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2195. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2196. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2197. sizeof(dump_data->name));
  2198. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2199. dump_entry.addr = virt_to_phys(dump_data);
  2200. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2201. &dump_entry);
  2202. if (ret) {
  2203. ret = cnss_ignore_dump_data_reg_fail(ret);
  2204. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2205. ret ? "Error" : "Ignoring", ret);
  2206. goto free_ramdump;
  2207. }
  2208. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2209. if (!info_v2->ramdump_dev) {
  2210. cnss_pr_err("Failed to create ramdump device!\n");
  2211. ret = -ENOMEM;
  2212. goto free_ramdump;
  2213. }
  2214. return 0;
  2215. free_ramdump:
  2216. kfree(info_v2->dump_data_vaddr);
  2217. info_v2->dump_data_vaddr = NULL;
  2218. return ret;
  2219. }
  2220. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2221. {
  2222. struct cnss_ramdump_info_v2 *info_v2;
  2223. info_v2 = &plat_priv->ramdump_info_v2;
  2224. if (info_v2->ramdump_dev)
  2225. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2226. kfree(info_v2->dump_data_vaddr);
  2227. info_v2->dump_data_vaddr = NULL;
  2228. info_v2->dump_data_valid = false;
  2229. }
  2230. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2231. {
  2232. int ret = 0;
  2233. switch (plat_priv->device_id) {
  2234. case QCA6174_DEVICE_ID:
  2235. ret = cnss_register_ramdump_v1(plat_priv);
  2236. break;
  2237. case QCA6290_DEVICE_ID:
  2238. case QCA6390_DEVICE_ID:
  2239. case QCA6490_DEVICE_ID:
  2240. case KIWI_DEVICE_ID:
  2241. ret = cnss_register_ramdump_v2(plat_priv);
  2242. break;
  2243. default:
  2244. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2245. ret = -ENODEV;
  2246. break;
  2247. }
  2248. return ret;
  2249. }
  2250. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2251. {
  2252. switch (plat_priv->device_id) {
  2253. case QCA6174_DEVICE_ID:
  2254. cnss_unregister_ramdump_v1(plat_priv);
  2255. break;
  2256. case QCA6290_DEVICE_ID:
  2257. case QCA6390_DEVICE_ID:
  2258. case QCA6490_DEVICE_ID:
  2259. case KIWI_DEVICE_ID:
  2260. cnss_unregister_ramdump_v2(plat_priv);
  2261. break;
  2262. default:
  2263. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2264. break;
  2265. }
  2266. }
  2267. #else
  2268. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2269. {
  2270. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2271. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2272. struct device *dev = &plat_priv->plat_dev->dev;
  2273. u32 ramdump_size = 0;
  2274. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2275. &ramdump_size) == 0)
  2276. info_v2->ramdump_size = ramdump_size;
  2277. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2278. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2279. if (!info_v2->dump_data_vaddr)
  2280. return -ENOMEM;
  2281. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2282. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2283. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2284. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2285. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2286. sizeof(dump_data->name));
  2287. info_v2->ramdump_dev = dev;
  2288. return 0;
  2289. }
  2290. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2291. {
  2292. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2293. info_v2->ramdump_dev = NULL;
  2294. kfree(info_v2->dump_data_vaddr);
  2295. info_v2->dump_data_vaddr = NULL;
  2296. info_v2->dump_data_valid = false;
  2297. }
  2298. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2299. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2300. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2301. phys_addr_t *pa, unsigned long attrs)
  2302. {
  2303. struct sg_table sgt;
  2304. int ret;
  2305. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  2306. if (ret) {
  2307. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  2308. va, &dma, size, attrs);
  2309. return -EINVAL;
  2310. }
  2311. *pa = page_to_phys(sg_page(sgt.sgl));
  2312. sg_free_table(&sgt);
  2313. return 0;
  2314. }
  2315. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2316. enum cnss_fw_dump_type type, int seg_no,
  2317. void *va, phys_addr_t pa, size_t size)
  2318. {
  2319. struct md_region md_entry;
  2320. int ret;
  2321. switch (type) {
  2322. case CNSS_FW_IMAGE:
  2323. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2324. seg_no);
  2325. break;
  2326. case CNSS_FW_RDDM:
  2327. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2328. seg_no);
  2329. break;
  2330. case CNSS_FW_REMOTE_HEAP:
  2331. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2332. seg_no);
  2333. break;
  2334. default:
  2335. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2336. return -EINVAL;
  2337. }
  2338. md_entry.phys_addr = pa;
  2339. md_entry.virt_addr = (uintptr_t)va;
  2340. md_entry.size = size;
  2341. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2342. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2343. md_entry.name, va, &pa, size);
  2344. ret = msm_minidump_add_region(&md_entry);
  2345. if (ret < 0)
  2346. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  2347. return ret;
  2348. }
  2349. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2350. enum cnss_fw_dump_type type, int seg_no,
  2351. void *va, phys_addr_t pa, size_t size)
  2352. {
  2353. struct md_region md_entry;
  2354. int ret;
  2355. switch (type) {
  2356. case CNSS_FW_IMAGE:
  2357. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2358. seg_no);
  2359. break;
  2360. case CNSS_FW_RDDM:
  2361. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2362. seg_no);
  2363. break;
  2364. case CNSS_FW_REMOTE_HEAP:
  2365. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2366. seg_no);
  2367. break;
  2368. default:
  2369. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2370. return -EINVAL;
  2371. }
  2372. md_entry.phys_addr = pa;
  2373. md_entry.virt_addr = (uintptr_t)va;
  2374. md_entry.size = size;
  2375. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2376. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2377. md_entry.name, va, &pa, size);
  2378. ret = msm_minidump_remove_region(&md_entry);
  2379. if (ret)
  2380. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  2381. ret);
  2382. return ret;
  2383. }
  2384. #else
  2385. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2386. phys_addr_t *pa, unsigned long attrs)
  2387. {
  2388. return 0;
  2389. }
  2390. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2391. enum cnss_fw_dump_type type, int seg_no,
  2392. void *va, phys_addr_t pa, size_t size)
  2393. {
  2394. return 0;
  2395. }
  2396. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2397. enum cnss_fw_dump_type type, int seg_no,
  2398. void *va, phys_addr_t pa, size_t size)
  2399. {
  2400. return 0;
  2401. }
  2402. #endif /* CONFIG_QCOM_MINIDUMP */
  2403. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  2404. const struct firmware **fw_entry,
  2405. const char *filename)
  2406. {
  2407. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  2408. return request_firmware_direct(fw_entry, filename,
  2409. &plat_priv->plat_dev->dev);
  2410. else
  2411. return firmware_request_nowarn(fw_entry, filename,
  2412. &plat_priv->plat_dev->dev);
  2413. }
  2414. #if IS_ENABLED(CONFIG_INTERCONNECT)
  2415. /**
  2416. * cnss_register_bus_scale() - Setup interconnect voting data
  2417. * @plat_priv: Platform data structure
  2418. *
  2419. * For different interconnect path configured in device tree setup voting data
  2420. * for list of bandwidth requirements.
  2421. *
  2422. * Result: 0 for success. -EINVAL if not configured
  2423. */
  2424. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2425. {
  2426. int ret = -EINVAL;
  2427. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  2428. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2429. struct device *dev = &plat_priv->plat_dev->dev;
  2430. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  2431. ret = of_property_read_u32(dev->of_node,
  2432. "qcom,icc-path-count",
  2433. &plat_priv->icc.path_count);
  2434. if (ret) {
  2435. cnss_pr_err("Platform Bus Interconnect path not configured\n");
  2436. return -EINVAL;
  2437. }
  2438. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  2439. "qcom,bus-bw-cfg-count",
  2440. &plat_priv->icc.bus_bw_cfg_count);
  2441. if (ret) {
  2442. cnss_pr_err("Failed to get Bus BW Config table size\n");
  2443. goto cleanup;
  2444. }
  2445. cfg_arr_size = plat_priv->icc.path_count *
  2446. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  2447. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  2448. if (!cfg_arr) {
  2449. cnss_pr_err("Failed to alloc cfg table mem\n");
  2450. ret = -ENOMEM;
  2451. goto cleanup;
  2452. }
  2453. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  2454. "qcom,bus-bw-cfg", cfg_arr,
  2455. cfg_arr_size);
  2456. if (ret) {
  2457. cnss_pr_err("Invalid Bus BW Config Table\n");
  2458. goto cleanup;
  2459. }
  2460. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  2461. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  2462. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  2463. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  2464. GFP_KERNEL);
  2465. if (!bus_bw_info) {
  2466. ret = -ENOMEM;
  2467. goto out;
  2468. }
  2469. ret = of_property_read_string_index(dev->of_node,
  2470. "interconnect-names", idx,
  2471. &bus_bw_info->icc_name);
  2472. if (ret)
  2473. goto out;
  2474. bus_bw_info->icc_path =
  2475. of_icc_get(&plat_priv->plat_dev->dev,
  2476. bus_bw_info->icc_name);
  2477. if (IS_ERR(bus_bw_info->icc_path)) {
  2478. ret = PTR_ERR(bus_bw_info->icc_path);
  2479. if (ret != -EPROBE_DEFER) {
  2480. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  2481. bus_bw_info->icc_name, ret);
  2482. goto out;
  2483. }
  2484. }
  2485. bus_bw_info->cfg_table =
  2486. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  2487. sizeof(*bus_bw_info->cfg_table),
  2488. GFP_KERNEL);
  2489. if (!bus_bw_info->cfg_table) {
  2490. ret = -ENOMEM;
  2491. goto out;
  2492. }
  2493. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  2494. bus_bw_info->icc_name);
  2495. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  2496. CNSS_ICC_VOTE_MAX);
  2497. i < plat_priv->icc.bus_bw_cfg_count;
  2498. i++, j += 2) {
  2499. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  2500. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  2501. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  2502. i, bus_bw_info->cfg_table[i].avg_bw,
  2503. bus_bw_info->cfg_table[i].peak_bw);
  2504. }
  2505. list_add_tail(&bus_bw_info->list,
  2506. &plat_priv->icc.list_head);
  2507. }
  2508. kfree(cfg_arr);
  2509. return 0;
  2510. out:
  2511. list_for_each_entry_safe(bus_bw_info, tmp,
  2512. &plat_priv->icc.list_head, list) {
  2513. list_del(&bus_bw_info->list);
  2514. }
  2515. cleanup:
  2516. kfree(cfg_arr);
  2517. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2518. return ret;
  2519. }
  2520. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  2521. {
  2522. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2523. list_for_each_entry_safe(bus_bw_info, tmp,
  2524. &plat_priv->icc.list_head, list) {
  2525. list_del(&bus_bw_info->list);
  2526. if (bus_bw_info->icc_path)
  2527. icc_put(bus_bw_info->icc_path);
  2528. }
  2529. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2530. }
  2531. #else
  2532. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2533. {
  2534. return 0;
  2535. }
  2536. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  2537. #endif /* CONFIG_INTERCONNECT */
  2538. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  2539. {
  2540. struct cnss_plat_data *plat_priv = cb_ctx;
  2541. if (!plat_priv) {
  2542. cnss_pr_err("%s: Invalid context\n", __func__);
  2543. return;
  2544. }
  2545. if (status) {
  2546. cnss_pr_info("CNSS Daemon connected\n");
  2547. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2548. complete(&plat_priv->daemon_connected);
  2549. } else {
  2550. cnss_pr_info("CNSS Daemon disconnected\n");
  2551. reinit_completion(&plat_priv->daemon_connected);
  2552. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2553. }
  2554. }
  2555. static ssize_t enable_hds_store(struct device *dev,
  2556. struct device_attribute *attr,
  2557. const char *buf, size_t count)
  2558. {
  2559. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2560. unsigned int enable_hds = 0;
  2561. if (!plat_priv)
  2562. return -ENODEV;
  2563. if (sscanf(buf, "%du", &enable_hds) != 1) {
  2564. cnss_pr_err("Invalid enable_hds sysfs command\n");
  2565. return -EINVAL;
  2566. }
  2567. if (enable_hds)
  2568. plat_priv->hds_enabled = true;
  2569. else
  2570. plat_priv->hds_enabled = false;
  2571. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  2572. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  2573. return count;
  2574. }
  2575. static ssize_t recovery_store(struct device *dev,
  2576. struct device_attribute *attr,
  2577. const char *buf, size_t count)
  2578. {
  2579. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2580. unsigned int recovery = 0;
  2581. if (!plat_priv)
  2582. return -ENODEV;
  2583. if (sscanf(buf, "%du", &recovery) != 1) {
  2584. cnss_pr_err("Invalid recovery sysfs command\n");
  2585. return -EINVAL;
  2586. }
  2587. if (recovery)
  2588. plat_priv->recovery_enabled = true;
  2589. else
  2590. plat_priv->recovery_enabled = false;
  2591. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  2592. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  2593. return count;
  2594. }
  2595. static ssize_t shutdown_store(struct device *dev,
  2596. struct device_attribute *attr,
  2597. const char *buf, size_t count)
  2598. {
  2599. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2600. if (plat_priv) {
  2601. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  2602. del_timer(&plat_priv->fw_boot_timer);
  2603. complete_all(&plat_priv->power_up_complete);
  2604. complete_all(&plat_priv->cal_complete);
  2605. }
  2606. cnss_pr_dbg("Received shutdown notification\n");
  2607. return count;
  2608. }
  2609. static ssize_t fs_ready_store(struct device *dev,
  2610. struct device_attribute *attr,
  2611. const char *buf, size_t count)
  2612. {
  2613. int fs_ready = 0;
  2614. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2615. if (sscanf(buf, "%du", &fs_ready) != 1)
  2616. return -EINVAL;
  2617. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  2618. fs_ready, count);
  2619. if (!plat_priv) {
  2620. cnss_pr_err("plat_priv is NULL\n");
  2621. return count;
  2622. }
  2623. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  2624. cnss_pr_dbg("QMI is bypassed\n");
  2625. return count;
  2626. }
  2627. switch (plat_priv->device_id) {
  2628. case QCA6290_DEVICE_ID:
  2629. case QCA6390_DEVICE_ID:
  2630. case QCA6490_DEVICE_ID:
  2631. case KIWI_DEVICE_ID:
  2632. break;
  2633. default:
  2634. cnss_pr_err("Not supported for device ID 0x%lx\n",
  2635. plat_priv->device_id);
  2636. return count;
  2637. }
  2638. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  2639. cnss_driver_event_post(plat_priv,
  2640. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  2641. 0, NULL);
  2642. }
  2643. return count;
  2644. }
  2645. static ssize_t qdss_trace_start_store(struct device *dev,
  2646. struct device_attribute *attr,
  2647. const char *buf, size_t count)
  2648. {
  2649. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2650. wlfw_qdss_trace_start(plat_priv);
  2651. cnss_pr_dbg("Received QDSS start command\n");
  2652. return count;
  2653. }
  2654. static ssize_t qdss_trace_stop_store(struct device *dev,
  2655. struct device_attribute *attr,
  2656. const char *buf, size_t count)
  2657. {
  2658. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2659. u32 option = 0;
  2660. if (sscanf(buf, "%du", &option) != 1)
  2661. return -EINVAL;
  2662. wlfw_qdss_trace_stop(plat_priv, option);
  2663. cnss_pr_dbg("Received QDSS stop command\n");
  2664. return count;
  2665. }
  2666. static ssize_t qdss_conf_download_store(struct device *dev,
  2667. struct device_attribute *attr,
  2668. const char *buf, size_t count)
  2669. {
  2670. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2671. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  2672. cnss_pr_dbg("Received QDSS download config command\n");
  2673. return count;
  2674. }
  2675. static ssize_t hw_trace_override_store(struct device *dev,
  2676. struct device_attribute *attr,
  2677. const char *buf, size_t count)
  2678. {
  2679. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2680. int tmp = 0;
  2681. if (sscanf(buf, "%du", &tmp) != 1)
  2682. return -EINVAL;
  2683. plat_priv->hw_trc_override = tmp;
  2684. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  2685. return count;
  2686. }
  2687. static DEVICE_ATTR_WO(fs_ready);
  2688. static DEVICE_ATTR_WO(shutdown);
  2689. static DEVICE_ATTR_WO(recovery);
  2690. static DEVICE_ATTR_WO(enable_hds);
  2691. static DEVICE_ATTR_WO(qdss_trace_start);
  2692. static DEVICE_ATTR_WO(qdss_trace_stop);
  2693. static DEVICE_ATTR_WO(qdss_conf_download);
  2694. static DEVICE_ATTR_WO(hw_trace_override);
  2695. static struct attribute *cnss_attrs[] = {
  2696. &dev_attr_fs_ready.attr,
  2697. &dev_attr_shutdown.attr,
  2698. &dev_attr_recovery.attr,
  2699. &dev_attr_enable_hds.attr,
  2700. &dev_attr_qdss_trace_start.attr,
  2701. &dev_attr_qdss_trace_stop.attr,
  2702. &dev_attr_qdss_conf_download.attr,
  2703. &dev_attr_hw_trace_override.attr,
  2704. NULL,
  2705. };
  2706. static struct attribute_group cnss_attr_group = {
  2707. .attrs = cnss_attrs,
  2708. };
  2709. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  2710. {
  2711. struct device *dev = &plat_priv->plat_dev->dev;
  2712. int ret;
  2713. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "cnss");
  2714. if (ret) {
  2715. cnss_pr_err("Failed to create cnss link, err = %d\n",
  2716. ret);
  2717. goto out;
  2718. }
  2719. /* This is only for backward compatibility. */
  2720. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "shutdown_wlan");
  2721. if (ret) {
  2722. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  2723. ret);
  2724. goto rm_cnss_link;
  2725. }
  2726. return 0;
  2727. rm_cnss_link:
  2728. sysfs_remove_link(kernel_kobj, "cnss");
  2729. out:
  2730. return ret;
  2731. }
  2732. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  2733. {
  2734. sysfs_remove_link(kernel_kobj, "shutdown_wlan");
  2735. sysfs_remove_link(kernel_kobj, "cnss");
  2736. }
  2737. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  2738. {
  2739. int ret = 0;
  2740. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  2741. &cnss_attr_group);
  2742. if (ret) {
  2743. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  2744. ret);
  2745. goto out;
  2746. }
  2747. cnss_create_sysfs_link(plat_priv);
  2748. return 0;
  2749. out:
  2750. return ret;
  2751. }
  2752. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  2753. {
  2754. cnss_remove_sysfs_link(plat_priv);
  2755. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  2756. }
  2757. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  2758. {
  2759. spin_lock_init(&plat_priv->event_lock);
  2760. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  2761. WQ_UNBOUND, 1);
  2762. if (!plat_priv->event_wq) {
  2763. cnss_pr_err("Failed to create event workqueue!\n");
  2764. return -EFAULT;
  2765. }
  2766. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  2767. INIT_LIST_HEAD(&plat_priv->event_list);
  2768. return 0;
  2769. }
  2770. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  2771. {
  2772. destroy_workqueue(plat_priv->event_wq);
  2773. }
  2774. static int cnss_reboot_notifier(struct notifier_block *nb,
  2775. unsigned long action,
  2776. void *data)
  2777. {
  2778. struct cnss_plat_data *plat_priv =
  2779. container_of(nb, struct cnss_plat_data, reboot_nb);
  2780. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  2781. del_timer(&plat_priv->fw_boot_timer);
  2782. complete_all(&plat_priv->power_up_complete);
  2783. complete_all(&plat_priv->cal_complete);
  2784. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  2785. return NOTIFY_DONE;
  2786. }
  2787. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  2788. {
  2789. int ret;
  2790. timer_setup(&plat_priv->fw_boot_timer,
  2791. cnss_bus_fw_boot_timeout_hdlr, 0);
  2792. ret = register_pm_notifier(&cnss_pm_notifier);
  2793. if (ret)
  2794. cnss_pr_err("Failed to register PM notifier, err = %d\n", ret);
  2795. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  2796. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  2797. if (ret)
  2798. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  2799. ret);
  2800. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  2801. if (ret)
  2802. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  2803. ret);
  2804. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  2805. init_completion(&plat_priv->power_up_complete);
  2806. init_completion(&plat_priv->cal_complete);
  2807. init_completion(&plat_priv->rddm_complete);
  2808. init_completion(&plat_priv->recovery_complete);
  2809. init_completion(&plat_priv->daemon_connected);
  2810. mutex_init(&plat_priv->dev_lock);
  2811. mutex_init(&plat_priv->driver_ops_lock);
  2812. plat_priv->recovery_ws =
  2813. wakeup_source_register(&plat_priv->plat_dev->dev,
  2814. "CNSS_FW_RECOVERY");
  2815. if (!plat_priv->recovery_ws)
  2816. cnss_pr_err("Failed to setup FW recovery wake source\n");
  2817. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  2818. cnss_daemon_connection_update_cb,
  2819. plat_priv);
  2820. if (ret)
  2821. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  2822. ret);
  2823. return 0;
  2824. }
  2825. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  2826. {
  2827. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  2828. plat_priv);
  2829. complete_all(&plat_priv->recovery_complete);
  2830. complete_all(&plat_priv->rddm_complete);
  2831. complete_all(&plat_priv->cal_complete);
  2832. complete_all(&plat_priv->power_up_complete);
  2833. complete_all(&plat_priv->daemon_connected);
  2834. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  2835. unregister_reboot_notifier(&plat_priv->reboot_nb);
  2836. unregister_pm_notifier(&cnss_pm_notifier);
  2837. del_timer(&plat_priv->fw_boot_timer);
  2838. wakeup_source_unregister(plat_priv->recovery_ws);
  2839. }
  2840. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  2841. {
  2842. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  2843. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  2844. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  2845. "qcom,wlan-cbc-enabled");
  2846. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  2847. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  2848. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  2849. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  2850. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  2851. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  2852. * enabled by default
  2853. */
  2854. plat_priv->adsp_pc_enabled = true;
  2855. }
  2856. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  2857. {
  2858. struct device *dev = &plat_priv->plat_dev->dev;
  2859. plat_priv->use_pm_domain =
  2860. of_property_read_bool(dev->of_node, "use-pm-domain");
  2861. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  2862. }
  2863. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  2864. {
  2865. struct device *dev = &plat_priv->plat_dev->dev;
  2866. plat_priv->set_wlaon_pwr_ctrl =
  2867. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  2868. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  2869. plat_priv->set_wlaon_pwr_ctrl);
  2870. }
  2871. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  2872. {
  2873. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  2874. "qcom,converged-dt") ||
  2875. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  2876. "qcom,same-dt-multi-dev"));
  2877. }
  2878. static const struct platform_device_id cnss_platform_id_table[] = {
  2879. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  2880. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  2881. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  2882. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  2883. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  2884. { },
  2885. };
  2886. static const struct of_device_id cnss_of_match_table[] = {
  2887. {
  2888. .compatible = "qcom,cnss",
  2889. .data = (void *)&cnss_platform_id_table[0]},
  2890. {
  2891. .compatible = "qcom,cnss-qca6290",
  2892. .data = (void *)&cnss_platform_id_table[1]},
  2893. {
  2894. .compatible = "qcom,cnss-qca6390",
  2895. .data = (void *)&cnss_platform_id_table[2]},
  2896. {
  2897. .compatible = "qcom,cnss-qca6490",
  2898. .data = (void *)&cnss_platform_id_table[3]},
  2899. {
  2900. .compatible = "qcom,cnss-kiwi",
  2901. .data = (void *)&cnss_platform_id_table[4]},
  2902. { },
  2903. };
  2904. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  2905. static inline bool
  2906. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  2907. {
  2908. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  2909. "use-nv-mac");
  2910. }
  2911. static int cnss_probe(struct platform_device *plat_dev)
  2912. {
  2913. int ret = 0;
  2914. struct cnss_plat_data *plat_priv;
  2915. const struct of_device_id *of_id;
  2916. const struct platform_device_id *device_id;
  2917. int retry = 0;
  2918. if (cnss_get_plat_priv(plat_dev)) {
  2919. cnss_pr_err("Driver is already initialized!\n");
  2920. ret = -EEXIST;
  2921. goto out;
  2922. }
  2923. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  2924. if (!of_id || !of_id->data) {
  2925. cnss_pr_err("Failed to find of match device!\n");
  2926. ret = -ENODEV;
  2927. goto out;
  2928. }
  2929. device_id = of_id->data;
  2930. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  2931. GFP_KERNEL);
  2932. if (!plat_priv) {
  2933. ret = -ENOMEM;
  2934. goto out;
  2935. }
  2936. plat_priv->plat_dev = plat_dev;
  2937. plat_priv->device_id = device_id->driver_data;
  2938. plat_priv->bus_type = cnss_get_bus_type(plat_priv->device_id);
  2939. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  2940. plat_priv->use_fw_path_with_prefix =
  2941. cnss_use_fw_path_with_prefix(plat_priv);
  2942. cnss_set_plat_priv(plat_dev, plat_priv);
  2943. platform_set_drvdata(plat_dev, plat_priv);
  2944. INIT_LIST_HEAD(&plat_priv->vreg_list);
  2945. INIT_LIST_HEAD(&plat_priv->clk_list);
  2946. cnss_get_pm_domain_info(plat_priv);
  2947. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  2948. cnss_get_tcs_info(plat_priv);
  2949. cnss_get_cpr_info(plat_priv);
  2950. cnss_aop_mbox_init(plat_priv);
  2951. cnss_init_control_params(plat_priv);
  2952. ret = cnss_get_resources(plat_priv);
  2953. if (ret)
  2954. goto reset_ctx;
  2955. ret = cnss_register_esoc(plat_priv);
  2956. if (ret)
  2957. goto free_res;
  2958. ret = cnss_register_bus_scale(plat_priv);
  2959. if (ret)
  2960. goto unreg_esoc;
  2961. ret = cnss_create_sysfs(plat_priv);
  2962. if (ret)
  2963. goto unreg_bus_scale;
  2964. ret = cnss_event_work_init(plat_priv);
  2965. if (ret)
  2966. goto remove_sysfs;
  2967. ret = cnss_qmi_init(plat_priv);
  2968. if (ret)
  2969. goto deinit_event_work;
  2970. ret = cnss_dms_init(plat_priv);
  2971. if (ret)
  2972. goto deinit_qmi;
  2973. ret = cnss_debugfs_create(plat_priv);
  2974. if (ret)
  2975. goto deinit_dms;
  2976. ret = cnss_misc_init(plat_priv);
  2977. if (ret)
  2978. goto destroy_debugfs;
  2979. /* Make sure all platform related init are done before
  2980. * device power on and bus init.
  2981. */
  2982. if (!test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks)) {
  2983. retry:
  2984. ret = cnss_power_on_device(plat_priv);
  2985. if (ret)
  2986. goto deinit_misc;
  2987. ret = cnss_bus_init(plat_priv);
  2988. if (ret) {
  2989. if ((ret != -EPROBE_DEFER) &&
  2990. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  2991. cnss_power_off_device(plat_priv);
  2992. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  2993. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  2994. goto retry;
  2995. }
  2996. goto power_off;
  2997. }
  2998. }
  2999. cnss_register_coex_service(plat_priv);
  3000. cnss_register_ims_service(plat_priv);
  3001. ret = cnss_genl_init();
  3002. if (ret < 0)
  3003. cnss_pr_err("CNSS genl init failed %d\n", ret);
  3004. cnss_pr_info("Platform driver probed successfully.\n");
  3005. return 0;
  3006. power_off:
  3007. if (!test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  3008. cnss_power_off_device(plat_priv);
  3009. deinit_misc:
  3010. cnss_misc_deinit(plat_priv);
  3011. destroy_debugfs:
  3012. cnss_debugfs_destroy(plat_priv);
  3013. deinit_dms:
  3014. cnss_dms_deinit(plat_priv);
  3015. deinit_qmi:
  3016. cnss_qmi_deinit(plat_priv);
  3017. deinit_event_work:
  3018. cnss_event_work_deinit(plat_priv);
  3019. remove_sysfs:
  3020. cnss_remove_sysfs(plat_priv);
  3021. unreg_bus_scale:
  3022. cnss_unregister_bus_scale(plat_priv);
  3023. unreg_esoc:
  3024. cnss_unregister_esoc(plat_priv);
  3025. free_res:
  3026. cnss_put_resources(plat_priv);
  3027. reset_ctx:
  3028. platform_set_drvdata(plat_dev, NULL);
  3029. cnss_set_plat_priv(plat_dev, NULL);
  3030. out:
  3031. return ret;
  3032. }
  3033. static int cnss_remove(struct platform_device *plat_dev)
  3034. {
  3035. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  3036. cnss_genl_exit();
  3037. cnss_unregister_ims_service(plat_priv);
  3038. cnss_unregister_coex_service(plat_priv);
  3039. cnss_bus_deinit(plat_priv);
  3040. cnss_misc_deinit(plat_priv);
  3041. cnss_debugfs_destroy(plat_priv);
  3042. cnss_dms_deinit(plat_priv);
  3043. cnss_qmi_deinit(plat_priv);
  3044. cnss_event_work_deinit(plat_priv);
  3045. cnss_remove_sysfs(plat_priv);
  3046. cnss_unregister_bus_scale(plat_priv);
  3047. cnss_unregister_esoc(plat_priv);
  3048. cnss_put_resources(plat_priv);
  3049. if (!IS_ERR_OR_NULL(plat_priv->mbox_chan))
  3050. mbox_free_channel(plat_priv->mbox_chan);
  3051. platform_set_drvdata(plat_dev, NULL);
  3052. plat_env = NULL;
  3053. return 0;
  3054. }
  3055. static struct platform_driver cnss_platform_driver = {
  3056. .probe = cnss_probe,
  3057. .remove = cnss_remove,
  3058. .driver = {
  3059. .name = "cnss2",
  3060. .of_match_table = cnss_of_match_table,
  3061. #ifdef CONFIG_CNSS_ASYNC
  3062. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3063. #endif
  3064. },
  3065. };
  3066. /**
  3067. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  3068. *
  3069. * Valid device tree node means a node with "compatible" property from the
  3070. * device match table and "status" property is not disabled.
  3071. *
  3072. * Return: true if valid device tree node found, false if not found
  3073. */
  3074. static bool cnss_is_valid_dt_node_found(void)
  3075. {
  3076. struct device_node *dn = NULL;
  3077. for_each_matching_node(dn, cnss_of_match_table) {
  3078. if (of_device_is_available(dn))
  3079. break;
  3080. }
  3081. if (dn)
  3082. return true;
  3083. return false;
  3084. }
  3085. static int __init cnss_initialize(void)
  3086. {
  3087. int ret = 0;
  3088. if (!cnss_is_valid_dt_node_found())
  3089. return -ENODEV;
  3090. cnss_debug_init();
  3091. ret = platform_driver_register(&cnss_platform_driver);
  3092. if (ret)
  3093. cnss_debug_deinit();
  3094. return ret;
  3095. }
  3096. static void __exit cnss_exit(void)
  3097. {
  3098. platform_driver_unregister(&cnss_platform_driver);
  3099. cnss_debug_deinit();
  3100. }
  3101. module_init(cnss_initialize);
  3102. module_exit(cnss_exit);
  3103. MODULE_LICENSE("GPL v2");
  3104. MODULE_DESCRIPTION("CNSS2 Platform Driver");