bus.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include "bus.h"
  7. #include "debug.h"
  8. #include "pci.h"
  9. enum cnss_dev_bus_type cnss_get_dev_bus_type(struct device *dev)
  10. {
  11. if (!dev)
  12. return CNSS_BUS_NONE;
  13. if (!dev->bus)
  14. return CNSS_BUS_NONE;
  15. if (memcmp(dev->bus->name, "pci", 3) == 0)
  16. return CNSS_BUS_PCI;
  17. else
  18. return CNSS_BUS_NONE;
  19. }
  20. enum cnss_dev_bus_type cnss_get_bus_type(unsigned long device_id)
  21. {
  22. switch (device_id) {
  23. case QCA6174_DEVICE_ID:
  24. case QCA6290_DEVICE_ID:
  25. case QCA6390_DEVICE_ID:
  26. case QCA6490_DEVICE_ID:
  27. case KIWI_DEVICE_ID:
  28. return CNSS_BUS_PCI;
  29. default:
  30. cnss_pr_err("Unknown device_id: 0x%lx\n", device_id);
  31. return CNSS_BUS_NONE;
  32. }
  33. }
  34. void *cnss_bus_dev_to_bus_priv(struct device *dev)
  35. {
  36. if (!dev)
  37. return NULL;
  38. switch (cnss_get_dev_bus_type(dev)) {
  39. case CNSS_BUS_PCI:
  40. return cnss_get_pci_priv(to_pci_dev(dev));
  41. default:
  42. return NULL;
  43. }
  44. }
  45. struct cnss_plat_data *cnss_bus_dev_to_plat_priv(struct device *dev)
  46. {
  47. void *bus_priv;
  48. if (!dev)
  49. return cnss_get_plat_priv(NULL);
  50. bus_priv = cnss_bus_dev_to_bus_priv(dev);
  51. if (!bus_priv)
  52. return NULL;
  53. switch (cnss_get_dev_bus_type(dev)) {
  54. case CNSS_BUS_PCI:
  55. return cnss_pci_priv_to_plat_priv(bus_priv);
  56. default:
  57. return NULL;
  58. }
  59. }
  60. int cnss_bus_init(struct cnss_plat_data *plat_priv)
  61. {
  62. if (!plat_priv)
  63. return -ENODEV;
  64. switch (plat_priv->bus_type) {
  65. case CNSS_BUS_PCI:
  66. return cnss_pci_init(plat_priv);
  67. default:
  68. cnss_pr_err("Unsupported bus type: %d\n",
  69. plat_priv->bus_type);
  70. return -EINVAL;
  71. }
  72. }
  73. void cnss_bus_deinit(struct cnss_plat_data *plat_priv)
  74. {
  75. if (!plat_priv)
  76. return;
  77. switch (plat_priv->bus_type) {
  78. case CNSS_BUS_PCI:
  79. return cnss_pci_deinit(plat_priv);
  80. default:
  81. cnss_pr_err("Unsupported bus type: %d\n",
  82. plat_priv->bus_type);
  83. return;
  84. }
  85. }
  86. void cnss_bus_add_fw_prefix_name(struct cnss_plat_data *plat_priv,
  87. char *prefix_name, char *name)
  88. {
  89. if (!plat_priv)
  90. return;
  91. switch (plat_priv->bus_type) {
  92. case CNSS_BUS_PCI:
  93. return cnss_pci_add_fw_prefix_name(plat_priv->bus_priv,
  94. prefix_name, name);
  95. default:
  96. cnss_pr_err("Unsupported bus type: %d\n",
  97. plat_priv->bus_type);
  98. return;
  99. }
  100. }
  101. int cnss_bus_load_m3(struct cnss_plat_data *plat_priv)
  102. {
  103. if (!plat_priv)
  104. return -ENODEV;
  105. switch (plat_priv->bus_type) {
  106. case CNSS_BUS_PCI:
  107. return cnss_pci_load_m3(plat_priv->bus_priv);
  108. default:
  109. cnss_pr_err("Unsupported bus type: %d\n",
  110. plat_priv->bus_type);
  111. return -EINVAL;
  112. }
  113. }
  114. int cnss_bus_alloc_fw_mem(struct cnss_plat_data *plat_priv)
  115. {
  116. if (!plat_priv)
  117. return -ENODEV;
  118. switch (plat_priv->bus_type) {
  119. case CNSS_BUS_PCI:
  120. return cnss_pci_alloc_fw_mem(plat_priv->bus_priv);
  121. default:
  122. cnss_pr_err("Unsupported bus type: %d\n",
  123. plat_priv->bus_type);
  124. return -EINVAL;
  125. }
  126. }
  127. int cnss_bus_alloc_qdss_mem(struct cnss_plat_data *plat_priv)
  128. {
  129. if (!plat_priv)
  130. return -ENODEV;
  131. switch (plat_priv->bus_type) {
  132. case CNSS_BUS_PCI:
  133. return cnss_pci_alloc_qdss_mem(plat_priv->bus_priv);
  134. default:
  135. cnss_pr_err("Unsupported bus type: %d\n",
  136. plat_priv->bus_type);
  137. return -EINVAL;
  138. }
  139. }
  140. void cnss_bus_free_qdss_mem(struct cnss_plat_data *plat_priv)
  141. {
  142. if (!plat_priv)
  143. return;
  144. switch (plat_priv->bus_type) {
  145. case CNSS_BUS_PCI:
  146. cnss_pci_free_qdss_mem(plat_priv->bus_priv);
  147. return;
  148. default:
  149. cnss_pr_err("Unsupported bus type: %d\n",
  150. plat_priv->bus_type);
  151. return;
  152. }
  153. }
  154. u32 cnss_bus_get_wake_irq(struct cnss_plat_data *plat_priv)
  155. {
  156. if (!plat_priv)
  157. return -ENODEV;
  158. switch (plat_priv->bus_type) {
  159. case CNSS_BUS_PCI:
  160. return cnss_pci_get_wake_msi(plat_priv->bus_priv);
  161. default:
  162. cnss_pr_err("Unsupported bus type: %d\n",
  163. plat_priv->bus_type);
  164. return -EINVAL;
  165. }
  166. }
  167. int cnss_bus_force_fw_assert_hdlr(struct cnss_plat_data *plat_priv)
  168. {
  169. if (!plat_priv)
  170. return -ENODEV;
  171. switch (plat_priv->bus_type) {
  172. case CNSS_BUS_PCI:
  173. return cnss_pci_force_fw_assert_hdlr(plat_priv->bus_priv);
  174. default:
  175. cnss_pr_err("Unsupported bus type: %d\n",
  176. plat_priv->bus_type);
  177. return -EINVAL;
  178. }
  179. }
  180. int cnss_bus_qmi_send_get(struct cnss_plat_data *plat_priv)
  181. {
  182. if (!plat_priv)
  183. return -ENODEV;
  184. switch (plat_priv->bus_type) {
  185. case CNSS_BUS_PCI:
  186. return cnss_pci_qmi_send_get(plat_priv->bus_priv);
  187. default:
  188. cnss_pr_err("Unsupported bus type: %d\n",
  189. plat_priv->bus_type);
  190. return -EINVAL;
  191. }
  192. }
  193. int cnss_bus_qmi_send_put(struct cnss_plat_data *plat_priv)
  194. {
  195. if (!plat_priv)
  196. return -ENODEV;
  197. switch (plat_priv->bus_type) {
  198. case CNSS_BUS_PCI:
  199. return cnss_pci_qmi_send_put(plat_priv->bus_priv);
  200. default:
  201. cnss_pr_err("Unsupported bus type: %d\n",
  202. plat_priv->bus_type);
  203. return -EINVAL;
  204. }
  205. }
  206. void cnss_bus_fw_boot_timeout_hdlr(struct timer_list *t)
  207. {
  208. struct cnss_plat_data *plat_priv =
  209. from_timer(plat_priv, t, fw_boot_timer);
  210. if (!plat_priv)
  211. return;
  212. switch (plat_priv->bus_type) {
  213. case CNSS_BUS_PCI:
  214. return cnss_pci_fw_boot_timeout_hdlr(plat_priv->bus_priv);
  215. default:
  216. cnss_pr_err("Unsupported bus type: %d\n",
  217. plat_priv->bus_type);
  218. return;
  219. }
  220. }
  221. void cnss_bus_collect_dump_info(struct cnss_plat_data *plat_priv, bool in_panic)
  222. {
  223. if (!plat_priv)
  224. return;
  225. switch (plat_priv->bus_type) {
  226. case CNSS_BUS_PCI:
  227. return cnss_pci_collect_dump_info(plat_priv->bus_priv,
  228. in_panic);
  229. default:
  230. cnss_pr_err("Unsupported bus type: %d\n",
  231. plat_priv->bus_type);
  232. return;
  233. }
  234. }
  235. void cnss_bus_device_crashed(struct cnss_plat_data *plat_priv)
  236. {
  237. if (!plat_priv)
  238. return;
  239. switch (plat_priv->bus_type) {
  240. case CNSS_BUS_PCI:
  241. return cnss_pci_device_crashed(plat_priv->bus_priv);
  242. default:
  243. cnss_pr_err("Unsupported bus type: %d\n",
  244. plat_priv->bus_type);
  245. return;
  246. }
  247. }
  248. int cnss_bus_call_driver_probe(struct cnss_plat_data *plat_priv)
  249. {
  250. if (!plat_priv)
  251. return -ENODEV;
  252. switch (plat_priv->bus_type) {
  253. case CNSS_BUS_PCI:
  254. return cnss_pci_call_driver_probe(plat_priv->bus_priv);
  255. default:
  256. cnss_pr_err("Unsupported bus type: %d\n",
  257. plat_priv->bus_type);
  258. return -EINVAL;
  259. }
  260. }
  261. int cnss_bus_call_driver_remove(struct cnss_plat_data *plat_priv)
  262. {
  263. if (!plat_priv)
  264. return -ENODEV;
  265. switch (plat_priv->bus_type) {
  266. case CNSS_BUS_PCI:
  267. return cnss_pci_call_driver_remove(plat_priv->bus_priv);
  268. default:
  269. cnss_pr_err("Unsupported bus type: %d\n",
  270. plat_priv->bus_type);
  271. return -EINVAL;
  272. }
  273. }
  274. int cnss_bus_dev_powerup(struct cnss_plat_data *plat_priv)
  275. {
  276. if (!plat_priv)
  277. return -ENODEV;
  278. switch (plat_priv->bus_type) {
  279. case CNSS_BUS_PCI:
  280. return cnss_pci_dev_powerup(plat_priv->bus_priv);
  281. default:
  282. cnss_pr_err("Unsupported bus type: %d\n",
  283. plat_priv->bus_type);
  284. return -EINVAL;
  285. }
  286. }
  287. int cnss_bus_dev_shutdown(struct cnss_plat_data *plat_priv)
  288. {
  289. if (!plat_priv)
  290. return -ENODEV;
  291. switch (plat_priv->bus_type) {
  292. case CNSS_BUS_PCI:
  293. return cnss_pci_dev_shutdown(plat_priv->bus_priv);
  294. default:
  295. cnss_pr_err("Unsupported bus type: %d\n",
  296. plat_priv->bus_type);
  297. return -EINVAL;
  298. }
  299. }
  300. int cnss_bus_dev_crash_shutdown(struct cnss_plat_data *plat_priv)
  301. {
  302. if (!plat_priv)
  303. return -ENODEV;
  304. switch (plat_priv->bus_type) {
  305. case CNSS_BUS_PCI:
  306. return cnss_pci_dev_crash_shutdown(plat_priv->bus_priv);
  307. default:
  308. cnss_pr_err("Unsupported bus type: %d\n",
  309. plat_priv->bus_type);
  310. return -EINVAL;
  311. }
  312. }
  313. int cnss_bus_dev_ramdump(struct cnss_plat_data *plat_priv)
  314. {
  315. if (!plat_priv)
  316. return -ENODEV;
  317. switch (plat_priv->bus_type) {
  318. case CNSS_BUS_PCI:
  319. return cnss_pci_dev_ramdump(plat_priv->bus_priv);
  320. default:
  321. cnss_pr_err("Unsupported bus type: %d\n",
  322. plat_priv->bus_type);
  323. return -EINVAL;
  324. }
  325. }
  326. int cnss_bus_register_driver_hdlr(struct cnss_plat_data *plat_priv, void *data)
  327. {
  328. if (!plat_priv)
  329. return -ENODEV;
  330. switch (plat_priv->bus_type) {
  331. case CNSS_BUS_PCI:
  332. return cnss_pci_register_driver_hdlr(plat_priv->bus_priv, data);
  333. default:
  334. cnss_pr_err("Unsupported bus type: %d\n",
  335. plat_priv->bus_type);
  336. return -EINVAL;
  337. }
  338. }
  339. int cnss_bus_unregister_driver_hdlr(struct cnss_plat_data *plat_priv)
  340. {
  341. if (!plat_priv)
  342. return -ENODEV;
  343. switch (plat_priv->bus_type) {
  344. case CNSS_BUS_PCI:
  345. return cnss_pci_unregister_driver_hdlr(plat_priv->bus_priv);
  346. default:
  347. cnss_pr_err("Unsupported bus type: %d\n",
  348. plat_priv->bus_type);
  349. return -EINVAL;
  350. }
  351. }
  352. int cnss_bus_call_driver_modem_status(struct cnss_plat_data *plat_priv,
  353. int modem_current_status)
  354. {
  355. if (!plat_priv)
  356. return -ENODEV;
  357. switch (plat_priv->bus_type) {
  358. case CNSS_BUS_PCI:
  359. return cnss_pci_call_driver_modem_status(plat_priv->bus_priv,
  360. modem_current_status);
  361. default:
  362. cnss_pr_err("Unsupported bus type: %d\n",
  363. plat_priv->bus_type);
  364. return -EINVAL;
  365. }
  366. }
  367. int cnss_bus_update_status(struct cnss_plat_data *plat_priv,
  368. enum cnss_driver_status status)
  369. {
  370. if (!plat_priv)
  371. return -ENODEV;
  372. switch (plat_priv->bus_type) {
  373. case CNSS_BUS_PCI:
  374. return cnss_pci_update_status(plat_priv->bus_priv, status);
  375. default:
  376. cnss_pr_err("Unsupported bus type: %d\n",
  377. plat_priv->bus_type);
  378. return -EINVAL;
  379. }
  380. }
  381. int cnss_bus_update_uevent(struct cnss_plat_data *plat_priv,
  382. enum cnss_driver_status status, void *data)
  383. {
  384. if (!plat_priv)
  385. return -ENODEV;
  386. switch (plat_priv->bus_type) {
  387. case CNSS_BUS_PCI:
  388. return cnss_pci_call_driver_uevent(plat_priv->bus_priv,
  389. status, data);
  390. default:
  391. cnss_pr_err("Unsupported bus type: %d\n",
  392. plat_priv->bus_type);
  393. return -EINVAL;
  394. }
  395. }
  396. int cnss_bus_is_device_down(struct cnss_plat_data *plat_priv)
  397. {
  398. if (!plat_priv)
  399. return -ENODEV;
  400. switch (plat_priv->bus_type) {
  401. case CNSS_BUS_PCI:
  402. return cnss_pcie_is_device_down(plat_priv->bus_priv);
  403. default:
  404. cnss_pr_dbg("Unsupported bus type: %d\n",
  405. plat_priv->bus_type);
  406. return 0;
  407. }
  408. }
  409. int cnss_bus_check_link_status(struct cnss_plat_data *plat_priv)
  410. {
  411. if (!plat_priv)
  412. return -ENODEV;
  413. switch (plat_priv->bus_type) {
  414. case CNSS_BUS_PCI:
  415. return cnss_pci_check_link_status(plat_priv->bus_priv);
  416. default:
  417. cnss_pr_dbg("Unsupported bus type: %d\n",
  418. plat_priv->bus_type);
  419. return 0;
  420. }
  421. }
  422. int cnss_bus_recover_link_down(struct cnss_plat_data *plat_priv)
  423. {
  424. if (!plat_priv)
  425. return -ENODEV;
  426. switch (plat_priv->bus_type) {
  427. case CNSS_BUS_PCI:
  428. return cnss_pci_recover_link_down(plat_priv->bus_priv);
  429. default:
  430. cnss_pr_dbg("Unsupported bus type: %d\n",
  431. plat_priv->bus_type);
  432. return -EINVAL;
  433. }
  434. }
  435. int cnss_bus_debug_reg_read(struct cnss_plat_data *plat_priv, u32 offset,
  436. u32 *val, bool raw_access)
  437. {
  438. if (!plat_priv)
  439. return -ENODEV;
  440. switch (plat_priv->bus_type) {
  441. case CNSS_BUS_PCI:
  442. return cnss_pci_debug_reg_read(plat_priv->bus_priv, offset,
  443. val, raw_access);
  444. default:
  445. cnss_pr_dbg("Unsupported bus type: %d\n",
  446. plat_priv->bus_type);
  447. return 0;
  448. }
  449. }
  450. int cnss_bus_debug_reg_write(struct cnss_plat_data *plat_priv, u32 offset,
  451. u32 val, bool raw_access)
  452. {
  453. if (!plat_priv)
  454. return -ENODEV;
  455. switch (plat_priv->bus_type) {
  456. case CNSS_BUS_PCI:
  457. return cnss_pci_debug_reg_write(plat_priv->bus_priv, offset,
  458. val, raw_access);
  459. default:
  460. cnss_pr_dbg("Unsupported bus type: %d\n",
  461. plat_priv->bus_type);
  462. return 0;
  463. }
  464. }
  465. int cnss_bus_get_iova(struct cnss_plat_data *plat_priv, u64 *addr, u64 *size)
  466. {
  467. if (!plat_priv)
  468. return -ENODEV;
  469. switch (plat_priv->bus_type) {
  470. case CNSS_BUS_PCI:
  471. return cnss_pci_get_iova(plat_priv->bus_priv, addr, size);
  472. default:
  473. cnss_pr_err("Unsupported bus type: %d\n",
  474. plat_priv->bus_type);
  475. return -EINVAL;
  476. }
  477. }
  478. int cnss_bus_get_iova_ipa(struct cnss_plat_data *plat_priv, u64 *addr,
  479. u64 *size)
  480. {
  481. if (!plat_priv)
  482. return -ENODEV;
  483. switch (plat_priv->bus_type) {
  484. case CNSS_BUS_PCI:
  485. return cnss_pci_get_iova_ipa(plat_priv->bus_priv, addr, size);
  486. default:
  487. cnss_pr_err("Unsupported bus type: %d\n",
  488. plat_priv->bus_type);
  489. return -EINVAL;
  490. }
  491. }