cam_sync_dma_fence.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  4. */
  5. #include "cam_sync_dma_fence.h"
  6. #include "cam_sync_util.h"
  7. extern unsigned long cam_sync_monitor_mask;
  8. /**
  9. * struct cam_dma_fence_row - DMA fence row
  10. */
  11. struct cam_dma_fence_row {
  12. char name[CAM_DMA_FENCE_NAME_LEN];
  13. struct dma_fence *fence;
  14. int32_t fd;
  15. enum cam_dma_fence_state state;
  16. struct dma_fence_cb fence_cb;
  17. int32_t sync_obj;
  18. cam_sync_callback_for_dma_fence sync_cb;
  19. bool cb_registered_for_sync;
  20. bool ext_dma_fence;
  21. bool sync_signal_dma;
  22. };
  23. /**
  24. * struct cam_dma_fence_device - DMA fence device
  25. */
  26. struct cam_dma_fence_device {
  27. uint64_t dma_fence_context;
  28. struct cam_dma_fence_row rows[CAM_DMA_FENCE_MAX_FENCES];
  29. spinlock_t row_spinlocks[CAM_DMA_FENCE_MAX_FENCES];
  30. struct mutex dev_lock;
  31. DECLARE_BITMAP(bitmap, CAM_DMA_FENCE_MAX_FENCES);
  32. struct cam_generic_fence_monitor_data **monitor_data;
  33. };
  34. static atomic64_t g_cam_dma_fence_seq_no;
  35. static struct cam_dma_fence_device *g_cam_dma_fence_dev;
  36. bool __cam_dma_fence_enable_signaling(
  37. struct dma_fence *fence)
  38. {
  39. return true;
  40. }
  41. const char *__cam_dma_fence_get_driver_name(
  42. struct dma_fence *fence)
  43. {
  44. return "Camera DMA fence driver";
  45. }
  46. void __cam_dma_fence_free(struct dma_fence *fence)
  47. {
  48. CAM_DBG(CAM_DMA_FENCE,
  49. "Free memory for dma fence context: %llu seqno: %llu",
  50. fence->context, fence->seqno);
  51. kfree(fence->lock);
  52. kfree(fence);
  53. }
  54. static struct dma_fence_ops cam_sync_dma_fence_ops = {
  55. .enable_signaling = __cam_dma_fence_enable_signaling,
  56. .get_driver_name = __cam_dma_fence_get_driver_name,
  57. .get_timeline_name = __cam_dma_fence_get_driver_name,
  58. .release = __cam_dma_fence_free,
  59. };
  60. static inline struct cam_generic_fence_monitor_entry *
  61. __cam_dma_fence_get_monitor_entries(int idx)
  62. {
  63. struct cam_generic_fence_monitor_data *monitor_data;
  64. monitor_data = CAM_GENERIC_MONITOR_GET_DATA(g_cam_dma_fence_dev->monitor_data, idx);
  65. if (monitor_data->swap_monitor_entries)
  66. return monitor_data->prev_monitor_entries;
  67. else
  68. return monitor_data->monitor_entries;
  69. }
  70. static inline struct cam_generic_fence_monitor_entry *
  71. __cam_dma_fence_get_prev_monitor_entries(int idx)
  72. {
  73. struct cam_generic_fence_monitor_data *monitor_data;
  74. monitor_data = CAM_GENERIC_MONITOR_GET_DATA(g_cam_dma_fence_dev->monitor_data, idx);
  75. if (monitor_data->swap_monitor_entries)
  76. return monitor_data->monitor_entries;
  77. else
  78. return monitor_data->prev_monitor_entries;
  79. }
  80. static void __cam_dma_fence_print_table(void)
  81. {
  82. int i;
  83. struct cam_dma_fence_row *row;
  84. struct dma_fence *fence;
  85. for (i = 0; i < CAM_DMA_FENCE_MAX_FENCES; i++) {
  86. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[i]);
  87. row = &g_cam_dma_fence_dev->rows[i];
  88. fence = row->fence;
  89. CAM_INFO(CAM_DMA_FENCE,
  90. "Idx: %d seqno: %llu name: %s state: %d",
  91. i, fence->seqno, row->name, row->state);
  92. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[i]);
  93. }
  94. }
  95. static int __cam_dma_fence_find_free_idx(uint32_t *idx)
  96. {
  97. int rc = 0;
  98. bool bit;
  99. do {
  100. *idx = find_first_zero_bit(g_cam_dma_fence_dev->bitmap, CAM_DMA_FENCE_MAX_FENCES);
  101. if (*idx >= CAM_DMA_FENCE_MAX_FENCES) {
  102. rc = -ENOMEM;
  103. break;
  104. }
  105. bit = test_and_set_bit(*idx, g_cam_dma_fence_dev->bitmap);
  106. } while (bit);
  107. if (rc) {
  108. CAM_ERR(CAM_DMA_FENCE, "No free idx, printing dma fence table......");
  109. __cam_dma_fence_print_table();
  110. }
  111. return rc;
  112. }
  113. static struct dma_fence *__cam_dma_fence_find_fence_in_table(
  114. int32_t fd, int32_t *idx)
  115. {
  116. int i;
  117. struct dma_fence *fence = NULL;
  118. struct cam_dma_fence_row *row = NULL;
  119. for (i = 0; i < CAM_DMA_FENCE_MAX_FENCES; i++) {
  120. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[i]);
  121. row = &g_cam_dma_fence_dev->rows[i];
  122. if ((row->state != CAM_DMA_FENCE_STATE_INVALID) && (row->fd == fd)) {
  123. *idx = i;
  124. fence = row->fence;
  125. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[i]);
  126. break;
  127. }
  128. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[i]);
  129. }
  130. return fence;
  131. }
  132. static void __cam_dma_fence_init_row(const char *name,
  133. struct dma_fence *dma_fence, int32_t fd, uint32_t idx,
  134. bool ext_dma_fence)
  135. {
  136. struct cam_dma_fence_row *row;
  137. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[idx]);
  138. row = &g_cam_dma_fence_dev->rows[idx];
  139. row->fence = dma_fence;
  140. row->fd = fd;
  141. row->state = CAM_DMA_FENCE_STATE_ACTIVE;
  142. row->ext_dma_fence = ext_dma_fence;
  143. strscpy(row->name, name, CAM_DMA_FENCE_NAME_LEN);
  144. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE, &cam_sync_monitor_mask)) {
  145. cam_generic_fence_update_monitor_array(idx,
  146. &g_cam_dma_fence_dev->dev_lock, g_cam_dma_fence_dev->monitor_data,
  147. CAM_FENCE_OP_CREATE);
  148. }
  149. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[idx]);
  150. }
  151. void __cam_dma_fence_signal_cb(
  152. struct dma_fence *fence, struct dma_fence_cb *cb)
  153. {
  154. struct cam_dma_fence_signal_sync_obj signal_sync_obj;
  155. struct cam_dma_fence_row *dma_fence_row =
  156. container_of(cb, struct cam_dma_fence_row, fence_cb);
  157. uint32_t idx;
  158. if (dma_fence_row->state == CAM_DMA_FENCE_STATE_INVALID) {
  159. CAM_ERR(CAM_DMA_FENCE, "dma fence seqno: %llu is in invalid state: %d",
  160. fence->seqno, dma_fence_row->state);
  161. return;
  162. }
  163. /* If this dma fence is signaled by sync obj, skip cb */
  164. if (dma_fence_row->sync_signal_dma)
  165. return;
  166. CAM_DBG(CAM_DMA_FENCE, "dma fence seqno: %llu fd: %d signaled, signal sync obj: %d",
  167. fence->seqno, dma_fence_row->fd, dma_fence_row->sync_obj);
  168. if ((dma_fence_row->cb_registered_for_sync) && (dma_fence_row->sync_cb)) {
  169. signal_sync_obj.fd = dma_fence_row->fd;
  170. /*
  171. * Signal is invoked with the fence lock held,
  172. * lock not needed to query status
  173. */
  174. signal_sync_obj.status = dma_fence_get_status_locked(fence);
  175. dma_fence_row->state = CAM_DMA_FENCE_STATE_SIGNALED;
  176. dma_fence_row->sync_cb(dma_fence_row->sync_obj, &signal_sync_obj);
  177. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE,
  178. &cam_sync_monitor_mask)) {
  179. __cam_dma_fence_find_fence_in_table(dma_fence_row->fd, &idx);
  180. cam_generic_fence_update_monitor_array(idx,
  181. &g_cam_dma_fence_dev->dev_lock,
  182. g_cam_dma_fence_dev->monitor_data,
  183. CAM_FENCE_OP_UNREGISTER_ON_SIGNAL);
  184. }
  185. }
  186. }
  187. static void __cam_dma_fence_dump_monitor_array(int dma_row_idx)
  188. {
  189. struct dma_fence *fence;
  190. struct cam_generic_fence_monitor_obj_info obj_info;
  191. struct cam_dma_fence_row *row;
  192. if (!g_cam_dma_fence_dev->monitor_data ||
  193. !test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE, &cam_sync_monitor_mask))
  194. return;
  195. if (!CAM_GENERIC_MONITOR_GET_DATA(g_cam_dma_fence_dev->monitor_data,
  196. dma_row_idx)->prev_obj_id)
  197. return;
  198. row = &g_cam_dma_fence_dev->rows[dma_row_idx];
  199. fence = row->fence;
  200. obj_info.name = row->name;
  201. obj_info.obj_id = row->fd;
  202. obj_info.state = row->state;
  203. obj_info.ref_cnt = kref_read(&fence->refcount);
  204. obj_info.monitor_data = CAM_GENERIC_MONITOR_GET_DATA(
  205. g_cam_dma_fence_dev->monitor_data, dma_row_idx);
  206. obj_info.fence_type = CAM_GENERIC_FENCE_TYPE_DMA_FENCE;
  207. obj_info.sync_id = row->sync_obj;
  208. obj_info.monitor_entries =
  209. __cam_dma_fence_get_monitor_entries(dma_row_idx);
  210. obj_info.prev_monitor_entries =
  211. __cam_dma_fence_get_prev_monitor_entries(dma_row_idx);
  212. cam_generic_fence_dump_monitor_array(&obj_info);
  213. }
  214. int cam_dma_fence_get_put_ref(
  215. bool get_or_put, int32_t dma_fence_row_idx)
  216. {
  217. struct dma_fence *dma_fence;
  218. struct cam_dma_fence_row *row;
  219. int rc = 0;
  220. if ((dma_fence_row_idx < 0) ||
  221. (dma_fence_row_idx >= CAM_DMA_FENCE_MAX_FENCES)) {
  222. CAM_ERR(CAM_DMA_FENCE, "dma fence idx: %d is invalid",
  223. dma_fence_row_idx);
  224. return -EINVAL;
  225. }
  226. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  227. row = &g_cam_dma_fence_dev->rows[dma_fence_row_idx];
  228. if (row->state == CAM_DMA_FENCE_STATE_INVALID) {
  229. CAM_ERR(CAM_DMA_FENCE,
  230. "dma fence at idx: %d is in invalid state: %d",
  231. dma_fence_row_idx, row->state);
  232. rc = -EINVAL;
  233. goto monitor_dump;
  234. }
  235. dma_fence = row->fence;
  236. if (get_or_put)
  237. dma_fence_get(dma_fence);
  238. else
  239. dma_fence_put(dma_fence);
  240. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  241. CAM_DBG(CAM_DMA_FENCE, "Refcnt: %u after %s for dma fence with seqno: %llu",
  242. kref_read(&dma_fence->refcount), (get_or_put ? "getref" : "putref"),
  243. dma_fence->seqno);
  244. return rc;
  245. monitor_dump:
  246. __cam_dma_fence_dump_monitor_array(dma_fence_row_idx);
  247. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  248. return rc;
  249. }
  250. static struct dma_fence *cam_dma_fence_get_fence_from_sync_file(
  251. int32_t fd, int32_t *dma_fence_row_idx)
  252. {
  253. uint32_t idx;
  254. struct dma_fence *dma_fence = NULL;
  255. dma_fence = sync_file_get_fence(fd);
  256. if (IS_ERR_OR_NULL(dma_fence)) {
  257. CAM_ERR(CAM_DMA_FENCE, "Invalid fd: %d no dma fence found", fd);
  258. return ERR_PTR(-EINVAL);
  259. }
  260. if (__cam_dma_fence_find_free_idx(&idx)) {
  261. CAM_ERR(CAM_DMA_FENCE, "No free idx");
  262. goto end;
  263. }
  264. __cam_dma_fence_init_row(dma_fence->ops->get_driver_name(dma_fence),
  265. dma_fence, fd, idx, true);
  266. *dma_fence_row_idx = idx;
  267. CAM_DBG(CAM_DMA_FENCE,
  268. "External dma fence with fd: %d seqno: %llu ref_cnt: %u updated in tbl",
  269. fd, dma_fence->seqno, kref_read(&dma_fence->refcount));
  270. return dma_fence;
  271. end:
  272. dma_fence_put(dma_fence);
  273. return NULL;
  274. }
  275. struct dma_fence *cam_dma_fence_get_fence_from_fd(
  276. int32_t fd, int32_t *dma_fence_row_idx)
  277. {
  278. struct dma_fence *dma_fence = NULL;
  279. struct cam_dma_fence_row *row;
  280. dma_fence = __cam_dma_fence_find_fence_in_table(fd, dma_fence_row_idx);
  281. if (IS_ERR_OR_NULL(dma_fence)) {
  282. CAM_WARN(CAM_DMA_FENCE,
  283. "dma fence with fd: %d is an external fence, querying sync file",
  284. fd);
  285. return cam_dma_fence_get_fence_from_sync_file(fd, dma_fence_row_idx);
  286. }
  287. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[*dma_fence_row_idx]);
  288. row = &g_cam_dma_fence_dev->rows[*dma_fence_row_idx];
  289. if (row->state == CAM_DMA_FENCE_STATE_INVALID) {
  290. CAM_ERR(CAM_DMA_FENCE,
  291. "dma fence at idx: %d is in invalid state: %d",
  292. dma_fence_row_idx, row->state);
  293. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[*dma_fence_row_idx]);
  294. return ERR_PTR(-EINVAL);
  295. }
  296. dma_fence_get(dma_fence);
  297. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[*dma_fence_row_idx]);
  298. CAM_DBG(CAM_DMA_FENCE, "dma fence found for fd: %d with seqno: %llu ref_cnt: %u",
  299. fd, dma_fence->seqno, kref_read(&dma_fence->refcount));
  300. return dma_fence;
  301. }
  302. int cam_dma_fence_register_cb(int32_t *sync_obj, int32_t *dma_fence_idx,
  303. cam_sync_callback_for_dma_fence sync_cb)
  304. {
  305. int rc = 0, dma_fence_row_idx;
  306. struct cam_dma_fence_row *row = NULL;
  307. struct dma_fence *dma_fence = NULL;
  308. if (!sync_obj || !dma_fence_idx || !sync_cb) {
  309. CAM_ERR(CAM_DMA_FENCE,
  310. "Invalid args sync_obj: %p dma_fence_idx: %p sync_cb: %p",
  311. sync_obj, dma_fence_idx, sync_cb);
  312. return -EINVAL;
  313. }
  314. dma_fence_row_idx = *dma_fence_idx;
  315. if ((dma_fence_row_idx < 0) ||
  316. (dma_fence_row_idx >= CAM_DMA_FENCE_MAX_FENCES)) {
  317. CAM_ERR(CAM_DMA_FENCE, "dma fence idx: %d is invalid",
  318. dma_fence_row_idx);
  319. return -EINVAL;
  320. }
  321. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  322. row = &g_cam_dma_fence_dev->rows[dma_fence_row_idx];
  323. dma_fence = row->fence;
  324. if (row->state != CAM_DMA_FENCE_STATE_ACTIVE) {
  325. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE,
  326. &cam_sync_monitor_mask))
  327. cam_generic_fence_update_monitor_array(dma_fence_row_idx,
  328. &g_cam_dma_fence_dev->dev_lock,
  329. g_cam_dma_fence_dev->monitor_data,
  330. CAM_FENCE_OP_SKIP_REGISTER_CB);
  331. CAM_ERR(CAM_DMA_FENCE,
  332. "dma fence at idx: %d fd: %d seqno: %llu is not active, current state: %d",
  333. dma_fence_row_idx, row->fd, dma_fence->seqno, row->state);
  334. rc = -EINVAL;
  335. goto monitor_dump;
  336. }
  337. /**
  338. * If the cb is already registered, return
  339. * If a fd is closed by userspace without releasing the dma fence, it is
  340. * possible that same fd is returned to a new fence.
  341. */
  342. if (row->cb_registered_for_sync) {
  343. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE,
  344. &cam_sync_monitor_mask))
  345. cam_generic_fence_update_monitor_array(dma_fence_row_idx,
  346. &g_cam_dma_fence_dev->dev_lock, g_cam_dma_fence_dev->monitor_data,
  347. CAM_FENCE_OP_ALREADY_REGISTERED_CB);
  348. CAM_WARN(CAM_DMA_FENCE,
  349. "dma fence at idx: %d fd: %d seqno: %llu has already registered a cb for sync: %d - same fd for 2 fences?",
  350. dma_fence_row_idx, row->fd, dma_fence->seqno, row->sync_obj);
  351. goto monitor_dump;
  352. }
  353. rc = dma_fence_add_callback(row->fence, &row->fence_cb,
  354. __cam_dma_fence_signal_cb);
  355. if (rc) {
  356. CAM_ERR(CAM_DMA_FENCE,
  357. "Failed to register cb for dma fence fd: %d seqno: %llu rc: %d",
  358. row->fd, dma_fence->seqno, rc);
  359. goto monitor_dump;
  360. }
  361. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE, &cam_sync_monitor_mask))
  362. cam_generic_fence_update_monitor_array(dma_fence_row_idx,
  363. &g_cam_dma_fence_dev->dev_lock, g_cam_dma_fence_dev->monitor_data,
  364. CAM_FENCE_OP_REGISTER_CB);
  365. row->cb_registered_for_sync = true;
  366. row->sync_obj = *sync_obj;
  367. row->sync_cb = sync_cb;
  368. CAM_DBG(CAM_DMA_FENCE,
  369. "CB successfully registered for dma fence fd: %d seqno: %llu for sync_obj: %d",
  370. row->fd, dma_fence->seqno, *sync_obj);
  371. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  372. return rc;
  373. monitor_dump:
  374. __cam_dma_fence_dump_monitor_array(dma_fence_row_idx);
  375. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  376. return rc;
  377. }
  378. static int __cam_dma_fence_signal_fence(
  379. struct dma_fence *dma_fence,
  380. int32_t status)
  381. {
  382. int rc;
  383. bool fence_signaled = false;
  384. spin_lock_bh(dma_fence->lock);
  385. fence_signaled = dma_fence_is_signaled_locked(dma_fence);
  386. if (fence_signaled) {
  387. rc = -EPERM;
  388. CAM_DBG(CAM_DMA_FENCE,
  389. "dma fence seqno: %llu is already signaled",
  390. dma_fence->seqno);
  391. goto end;
  392. }
  393. if (status)
  394. dma_fence_set_error(dma_fence, status);
  395. rc = dma_fence_signal_locked(dma_fence);
  396. end:
  397. spin_unlock_bh(dma_fence->lock);
  398. return rc;
  399. }
  400. int cam_dma_fence_internal_signal(
  401. int32_t dma_fence_row_idx,
  402. struct cam_dma_fence_signal *signal_dma_fence)
  403. {
  404. int rc;
  405. struct dma_fence *dma_fence = NULL;
  406. struct cam_dma_fence_row *row = NULL;
  407. if ((dma_fence_row_idx < 0) ||
  408. (dma_fence_row_idx >= CAM_DMA_FENCE_MAX_FENCES)) {
  409. CAM_ERR(CAM_DMA_FENCE, "dma fence idx: %d is invalid",
  410. dma_fence_row_idx);
  411. return -EINVAL;
  412. }
  413. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  414. row = &g_cam_dma_fence_dev->rows[dma_fence_row_idx];
  415. /* Ensures sync obj cb is not invoked */
  416. row->sync_signal_dma = true;
  417. dma_fence = row->fence;
  418. if (IS_ERR_OR_NULL(dma_fence)) {
  419. CAM_ERR(CAM_DMA_FENCE, "DMA fence in row: %d is invalid",
  420. dma_fence_row_idx);
  421. rc = -EINVAL;
  422. goto monitor_dump;
  423. }
  424. if (row->state == CAM_DMA_FENCE_STATE_SIGNALED) {
  425. CAM_WARN(CAM_DMA_FENCE,
  426. "dma fence fd: %d[seqno: %llu] already in signaled state",
  427. signal_dma_fence->dma_fence_fd, dma_fence->seqno);
  428. rc = 0;
  429. goto monitor_dump;
  430. }
  431. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE, &cam_sync_monitor_mask))
  432. cam_generic_fence_update_monitor_array(dma_fence_row_idx,
  433. &g_cam_dma_fence_dev->dev_lock, g_cam_dma_fence_dev->monitor_data,
  434. CAM_FENCE_OP_SIGNAL);
  435. if (row->cb_registered_for_sync) {
  436. if (!dma_fence_remove_callback(row->fence, &row->fence_cb)) {
  437. CAM_ERR(CAM_DMA_FENCE,
  438. "Failed to remove cb for dma fence seqno: %llu fd: %d",
  439. dma_fence->seqno, row->fd);
  440. rc = -EINVAL;
  441. goto monitor_dump;
  442. }
  443. }
  444. rc = __cam_dma_fence_signal_fence(dma_fence, signal_dma_fence->status);
  445. if (rc)
  446. CAM_WARN(CAM_DMA_FENCE,
  447. "dma fence seqno: %llu fd: %d already signaled rc: %d",
  448. dma_fence->seqno, row->fd, rc);
  449. row->state = CAM_DMA_FENCE_STATE_SIGNALED;
  450. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  451. CAM_DBG(CAM_DMA_FENCE,
  452. "dma fence fd: %d[seqno: %llu] signaled with status: %d rc: %d",
  453. signal_dma_fence->dma_fence_fd, dma_fence->seqno,
  454. signal_dma_fence->status, rc);
  455. return 0;
  456. monitor_dump:
  457. __cam_dma_fence_dump_monitor_array(dma_fence_row_idx);
  458. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_fence_row_idx]);
  459. return rc;
  460. }
  461. int cam_dma_fence_signal_fd(struct cam_dma_fence_signal *signal_dma_fence)
  462. {
  463. uint32_t idx;
  464. struct dma_fence *dma_fence = NULL;
  465. dma_fence = __cam_dma_fence_find_fence_in_table(
  466. signal_dma_fence->dma_fence_fd, &idx);
  467. if (IS_ERR_OR_NULL(dma_fence)) {
  468. CAM_ERR(CAM_DMA_FENCE, "Failed to find dma fence for fd: %d",
  469. signal_dma_fence->dma_fence_fd);
  470. return -EINVAL;
  471. }
  472. return cam_dma_fence_internal_signal(idx, signal_dma_fence);
  473. }
  474. static int __cam_dma_fence_get_fd(int32_t *row_idx,
  475. const char *name)
  476. {
  477. int fd = -1;
  478. uint32_t idx;
  479. struct dma_fence *dma_fence = NULL;
  480. spinlock_t *dma_fence_lock = NULL;
  481. struct sync_file *sync_file = NULL;
  482. if (__cam_dma_fence_find_free_idx(&idx))
  483. goto end;
  484. dma_fence_lock = kzalloc(sizeof(spinlock_t), GFP_KERNEL);
  485. if (!dma_fence_lock)
  486. goto free_idx;
  487. dma_fence = kzalloc(sizeof(struct dma_fence), GFP_KERNEL);
  488. if (!dma_fence) {
  489. kfree(dma_fence_lock);
  490. goto free_idx;
  491. }
  492. spin_lock_init(dma_fence_lock);
  493. dma_fence_init(dma_fence, &cam_sync_dma_fence_ops, dma_fence_lock,
  494. g_cam_dma_fence_dev->dma_fence_context,
  495. atomic64_inc_return(&g_cam_dma_fence_seq_no));
  496. fd = get_unused_fd_flags(O_CLOEXEC);
  497. if (fd < 0) {
  498. CAM_ERR(CAM_DMA_FENCE, "failed to get a unused fd: %d", fd);
  499. dma_fence_put(dma_fence);
  500. goto free_idx;
  501. }
  502. sync_file = sync_file_create(dma_fence);
  503. if (!sync_file) {
  504. put_unused_fd(fd);
  505. fd = -1;
  506. dma_fence_put(dma_fence);
  507. goto free_idx;
  508. }
  509. fd_install(fd, sync_file->file);
  510. *row_idx = idx;
  511. __cam_dma_fence_init_row(name, dma_fence, fd, idx, false);
  512. CAM_DBG(CAM_DMA_FENCE, "Created dma fence fd: %d[%s] seqno: %llu row_idx: %u ref_cnt: %u",
  513. fd, name, dma_fence->seqno, idx, kref_read(&dma_fence->refcount));
  514. return fd;
  515. free_idx:
  516. clear_bit(idx, g_cam_dma_fence_dev->bitmap);
  517. end:
  518. return fd;
  519. }
  520. int cam_dma_fence_create_fd(
  521. int32_t *dma_fence_fd, int32_t *dma_fence_row_idx, const char *name)
  522. {
  523. int fd = -1, rc = 0;
  524. if (!dma_fence_fd || !dma_fence_row_idx) {
  525. CAM_ERR(CAM_DMA_FENCE, "Invalid args fd: %pK dma_fence_row_idx: %pK",
  526. dma_fence_fd, dma_fence_row_idx);
  527. return -EINVAL;
  528. }
  529. fd = __cam_dma_fence_get_fd(dma_fence_row_idx, name);
  530. if (fd < 0) {
  531. rc = -EBADFD;
  532. goto end;
  533. }
  534. *dma_fence_fd = fd;
  535. end:
  536. return rc;
  537. }
  538. void __cam_dma_fence_save_previous_monitor_data(int dma_row_idx)
  539. {
  540. struct cam_generic_fence_monitor_data *row_mon_data;
  541. struct cam_dma_fence_row *row;
  542. if (!g_cam_dma_fence_dev->monitor_data)
  543. return;
  544. row = &g_cam_dma_fence_dev->rows[dma_row_idx];
  545. row_mon_data = CAM_GENERIC_MONITOR_GET_DATA(
  546. g_cam_dma_fence_dev->monitor_data, dma_row_idx);
  547. /* save current usage details into prev variables */
  548. strscpy(row_mon_data->prev_name, row->name, CAM_DMA_FENCE_NAME_LEN);
  549. row_mon_data->prev_obj_id = row->fd;
  550. row_mon_data->prev_sync_id = row->sync_obj;
  551. row_mon_data->prev_state = row->state;
  552. row_mon_data->swap_monitor_entries = !row_mon_data->swap_monitor_entries;
  553. row_mon_data->prev_monitor_head = atomic64_read(&row_mon_data->monitor_head);
  554. }
  555. static int __cam_dma_fence_release(int32_t dma_row_idx)
  556. {
  557. struct dma_fence *dma_fence = NULL;
  558. struct cam_dma_fence_row *row = NULL;
  559. int rc;
  560. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_row_idx]);
  561. row = &g_cam_dma_fence_dev->rows[dma_row_idx];
  562. dma_fence = row->fence;
  563. if (row->state == CAM_DMA_FENCE_STATE_INVALID) {
  564. CAM_ERR(CAM_DMA_FENCE, "Invalid row index: %u, state: %u",
  565. dma_row_idx, row->state);
  566. rc = -EINVAL;
  567. goto monitor_dump;
  568. }
  569. if (row->state == CAM_DMA_FENCE_STATE_ACTIVE) {
  570. CAM_WARN(CAM_DMA_FENCE,
  571. "Unsignaled fence being released name: %s seqno: %llu fd: %d",
  572. row->name, dma_fence->seqno, row->fd);
  573. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE,
  574. &cam_sync_monitor_mask))
  575. cam_generic_fence_update_monitor_array(dma_row_idx,
  576. &g_cam_dma_fence_dev->dev_lock,
  577. g_cam_dma_fence_dev->monitor_data,
  578. CAM_FENCE_OP_SIGNAL);
  579. }
  580. /* Ensure dma fence is signaled prior to release */
  581. if (!row->ext_dma_fence) {
  582. rc = __cam_dma_fence_signal_fence(dma_fence, -ECANCELED);
  583. if ((!rc) && (row->state == CAM_DMA_FENCE_STATE_SIGNALED))
  584. CAM_WARN(CAM_DMA_FENCE,
  585. "Unsignaled fence being released name: %s seqno: %llu fd: %d, row was marked as signaled",
  586. row->name, dma_fence->seqno, row->fd);
  587. }
  588. CAM_DBG(CAM_DMA_FENCE,
  589. "Releasing dma fence with fd: %d[%s] row_idx: %u current ref_cnt: %u",
  590. row->fd, row->name, dma_row_idx, kref_read(&dma_fence->refcount));
  591. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE, &cam_sync_monitor_mask)) {
  592. /* Update monitor entries & save data before row memset to 0 */
  593. cam_generic_fence_update_monitor_array(dma_row_idx,
  594. &g_cam_dma_fence_dev->dev_lock, g_cam_dma_fence_dev->monitor_data,
  595. CAM_FENCE_OP_DESTROY);
  596. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE_DUMP, &cam_sync_monitor_mask))
  597. __cam_dma_fence_dump_monitor_array(dma_row_idx);
  598. __cam_dma_fence_save_previous_monitor_data(dma_row_idx);
  599. }
  600. /* putref on dma fence */
  601. dma_fence_put(dma_fence);
  602. /* deinit row */
  603. memset(row, 0, sizeof(struct cam_dma_fence_row));
  604. clear_bit(dma_row_idx, g_cam_dma_fence_dev->bitmap);
  605. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_row_idx]);
  606. return 0;
  607. monitor_dump:
  608. __cam_dma_fence_dump_monitor_array(dma_row_idx);
  609. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[dma_row_idx]);
  610. return rc;
  611. }
  612. static int __cam_dma_fence_release_fd(int fd)
  613. {
  614. int32_t idx;
  615. struct dma_fence *dma_fence = NULL;
  616. dma_fence = __cam_dma_fence_find_fence_in_table(fd, &idx);
  617. if (IS_ERR_OR_NULL(dma_fence)) {
  618. CAM_ERR(CAM_DMA_FENCE, "Failed to find dma fence for fd: %d", fd);
  619. return -EINVAL;
  620. }
  621. return __cam_dma_fence_release(idx);
  622. }
  623. static int __cam_dma_fence_release_row(
  624. int32_t dma_fence_row_idx)
  625. {
  626. if ((dma_fence_row_idx < 0) ||
  627. (dma_fence_row_idx >= CAM_DMA_FENCE_MAX_FENCES)) {
  628. CAM_ERR(CAM_DMA_FENCE, "dma fence idx: %d is invalid",
  629. dma_fence_row_idx);
  630. return -EINVAL;
  631. }
  632. return __cam_dma_fence_release(dma_fence_row_idx);
  633. }
  634. int cam_dma_fence_release(
  635. struct cam_dma_fence_release_params *release_params)
  636. {
  637. if (release_params->use_row_idx)
  638. return __cam_dma_fence_release_row(release_params->u.dma_row_idx);
  639. else
  640. return __cam_dma_fence_release_fd(release_params->u.dma_fence_fd);
  641. }
  642. void cam_dma_fence_close(void)
  643. {
  644. int i;
  645. struct cam_dma_fence_row *row = NULL;
  646. mutex_lock(&g_cam_dma_fence_dev->dev_lock);
  647. for (i = 0; i < CAM_DMA_FENCE_MAX_FENCES; i++) {
  648. spin_lock_bh(&g_cam_dma_fence_dev->row_spinlocks[i]);
  649. row = &g_cam_dma_fence_dev->rows[i];
  650. if (row->state != CAM_DMA_FENCE_STATE_INVALID) {
  651. CAM_DBG(CAM_DMA_FENCE,
  652. "Releasing dma fence seqno: %llu associated with fd: %d[%s] ref_cnt: %u",
  653. row->fence->seqno, row->fd, row->name,
  654. kref_read(&row->fence->refcount));
  655. /* If registered for cb, remove cb */
  656. if (row->cb_registered_for_sync) {
  657. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE,
  658. &cam_sync_monitor_mask))
  659. cam_generic_fence_update_monitor_array(i,
  660. NULL,
  661. g_cam_dma_fence_dev->monitor_data,
  662. CAM_FENCE_OP_UNREGISTER_CB);
  663. dma_fence_remove_callback(row->fence, &row->fence_cb);
  664. }
  665. /* Signal and put if the dma fence is created from camera */
  666. if (!row->ext_dma_fence) {
  667. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE,
  668. &cam_sync_monitor_mask))
  669. cam_generic_fence_update_monitor_array(i,
  670. NULL,
  671. g_cam_dma_fence_dev->monitor_data,
  672. CAM_FENCE_OP_SIGNAL);
  673. __cam_dma_fence_signal_fence(row->fence, -EADV);
  674. }
  675. dma_fence_put(row->fence);
  676. memset(row, 0, sizeof(struct cam_dma_fence_row));
  677. clear_bit(i, g_cam_dma_fence_dev->bitmap);
  678. }
  679. spin_unlock_bh(&g_cam_dma_fence_dev->row_spinlocks[i]);
  680. }
  681. if (g_cam_dma_fence_dev->monitor_data) {
  682. for (i = 0; i < CAM_DMA_FENCE_TABLE_SZ; i++) {
  683. kfree(g_cam_dma_fence_dev->monitor_data[i]);
  684. g_cam_dma_fence_dev->monitor_data[i] = NULL;
  685. }
  686. }
  687. kfree(g_cam_dma_fence_dev->monitor_data);
  688. g_cam_dma_fence_dev->monitor_data = NULL;
  689. mutex_unlock(&g_cam_dma_fence_dev->dev_lock);
  690. CAM_DBG(CAM_DMA_FENCE, "Close on Camera DMA fence driver");
  691. }
  692. void cam_dma_fence_open(void)
  693. {
  694. mutex_lock(&g_cam_dma_fence_dev->dev_lock);
  695. if (test_bit(CAM_GENERIC_FENCE_TYPE_DMA_FENCE, &cam_sync_monitor_mask)) {
  696. g_cam_dma_fence_dev->monitor_data = kzalloc(
  697. sizeof(struct cam_generic_fence_monitor_data *) *
  698. CAM_DMA_FENCE_TABLE_SZ, GFP_KERNEL);
  699. if (!g_cam_dma_fence_dev->monitor_data) {
  700. CAM_WARN(CAM_DMA_FENCE, "Failed to allocate memory %d",
  701. sizeof(struct cam_generic_fence_monitor_data *) *
  702. CAM_DMA_FENCE_TABLE_SZ);
  703. }
  704. }
  705. /* DMA fence seqno reset */
  706. atomic64_set(&g_cam_dma_fence_seq_no, 0);
  707. mutex_unlock(&g_cam_dma_fence_dev->dev_lock);
  708. CAM_DBG(CAM_DMA_FENCE, "Camera DMA fence driver opened");
  709. }
  710. int cam_dma_fence_driver_init(void)
  711. {
  712. int i;
  713. g_cam_dma_fence_dev = kzalloc(sizeof(struct cam_dma_fence_device), GFP_KERNEL);
  714. if (!g_cam_dma_fence_dev)
  715. return -ENOMEM;
  716. mutex_init(&g_cam_dma_fence_dev->dev_lock);
  717. for (i = 0; i < CAM_DMA_FENCE_MAX_FENCES; i++)
  718. spin_lock_init(&g_cam_dma_fence_dev->row_spinlocks[i]);
  719. bitmap_zero(g_cam_dma_fence_dev->bitmap, CAM_DMA_FENCE_MAX_FENCES);
  720. /* zero will be considered an invalid slot */
  721. set_bit(0, g_cam_dma_fence_dev->bitmap);
  722. g_cam_dma_fence_dev->dma_fence_context = dma_fence_context_alloc(1);
  723. CAM_DBG(CAM_DMA_FENCE, "Camera DMA fence driver initialized");
  724. return 0;
  725. }
  726. void cam_dma_fence_driver_deinit(void)
  727. {
  728. kfree(g_cam_dma_fence_dev);
  729. g_cam_dma_fence_dev = NULL;
  730. CAM_DBG(CAM_DMA_FENCE, "Camera DMA fence driver deinitialized");
  731. }