sm6150.c 236 KB

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  1. /*
  2. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/delay.h>
  15. #include <linux/gpio.h>
  16. #include <linux/of_gpio.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/slab.h>
  19. #include <linux/io.h>
  20. #include <linux/module.h>
  21. #include <linux/input.h>
  22. #include <linux/of_device.h>
  23. #include <linux/pm_qos.h>
  24. #include <sound/core.h>
  25. #include <sound/soc.h>
  26. #include <sound/soc-dapm.h>
  27. #include <sound/pcm.h>
  28. #include <sound/pcm_params.h>
  29. #include <sound/info.h>
  30. #include <dsp/audio_notifier.h>
  31. #include <dsp/q6afe-v2.h>
  32. #include <dsp/q6core.h>
  33. #include "device_event.h"
  34. #include "msm-pcm-routing-v2.h"
  35. #include "codecs/msm-cdc-pinctrl.h"
  36. #include "codecs/wcd934x/wcd934x.h"
  37. #include "codecs/wcd934x/wcd934x-mbhc.h"
  38. #include "codecs/wcd937x/wcd937x-mbhc.h"
  39. #include "codecs/wsa881x.h"
  40. #include "codecs/bolero/bolero-cdc.h"
  41. #include <dt-bindings/sound/audio-codec-port-types.h>
  42. #include "codecs/bolero/wsa-macro.h"
  43. #define DRV_NAME "sm6150-asoc-snd"
  44. #define __CHIPSET__ "SM6150 "
  45. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  46. #define SAMPLING_RATE_8KHZ 8000
  47. #define SAMPLING_RATE_11P025KHZ 11025
  48. #define SAMPLING_RATE_16KHZ 16000
  49. #define SAMPLING_RATE_22P05KHZ 22050
  50. #define SAMPLING_RATE_32KHZ 32000
  51. #define SAMPLING_RATE_44P1KHZ 44100
  52. #define SAMPLING_RATE_48KHZ 48000
  53. #define SAMPLING_RATE_88P2KHZ 88200
  54. #define SAMPLING_RATE_96KHZ 96000
  55. #define SAMPLING_RATE_176P4KHZ 176400
  56. #define SAMPLING_RATE_192KHZ 192000
  57. #define SAMPLING_RATE_352P8KHZ 352800
  58. #define SAMPLING_RATE_384KHZ 384000
  59. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  60. #define WCD9XXX_MBHC_DEF_RLOADS 5
  61. #define CODEC_EXT_CLK_RATE 9600000
  62. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  63. #define DEV_NAME_STR_LEN 32
  64. #define WSA8810_NAME_1 "wsa881x.20170211"
  65. #define WSA8810_NAME_2 "wsa881x.20170212"
  66. #define WCN_CDC_SLIM_RX_CH_MAX 2
  67. #define WCN_CDC_SLIM_TX_CH_MAX 3
  68. #define TDM_CHANNEL_MAX 8
  69. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  70. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  71. #define MSM_HIFI_ON 1
  72. enum {
  73. SLIM_RX_0 = 0,
  74. SLIM_RX_1,
  75. SLIM_RX_2,
  76. SLIM_RX_3,
  77. SLIM_RX_4,
  78. SLIM_RX_5,
  79. SLIM_RX_6,
  80. SLIM_RX_7,
  81. SLIM_RX_MAX,
  82. };
  83. enum {
  84. SLIM_TX_0 = 0,
  85. SLIM_TX_1,
  86. SLIM_TX_2,
  87. SLIM_TX_3,
  88. SLIM_TX_4,
  89. SLIM_TX_5,
  90. SLIM_TX_6,
  91. SLIM_TX_7,
  92. SLIM_TX_8,
  93. SLIM_TX_MAX,
  94. };
  95. enum {
  96. PRIM_MI2S = 0,
  97. SEC_MI2S,
  98. TERT_MI2S,
  99. QUAT_MI2S,
  100. QUIN_MI2S,
  101. MI2S_MAX,
  102. };
  103. enum {
  104. PRIM_AUX_PCM = 0,
  105. SEC_AUX_PCM,
  106. TERT_AUX_PCM,
  107. QUAT_AUX_PCM,
  108. QUIN_AUX_PCM,
  109. AUX_PCM_MAX,
  110. };
  111. enum {
  112. WSA_CDC_DMA_RX_0 = 0,
  113. WSA_CDC_DMA_RX_1,
  114. RX_CDC_DMA_RX_0,
  115. RX_CDC_DMA_RX_1,
  116. RX_CDC_DMA_RX_2,
  117. RX_CDC_DMA_RX_3,
  118. RX_CDC_DMA_RX_5,
  119. CDC_DMA_RX_MAX,
  120. };
  121. enum {
  122. WSA_CDC_DMA_TX_0 = 0,
  123. WSA_CDC_DMA_TX_1,
  124. WSA_CDC_DMA_TX_2,
  125. TX_CDC_DMA_TX_0,
  126. TX_CDC_DMA_TX_3,
  127. TX_CDC_DMA_TX_4,
  128. CDC_DMA_TX_MAX,
  129. };
  130. struct mi2s_conf {
  131. struct mutex lock;
  132. u32 ref_cnt;
  133. u32 msm_is_mi2s_master;
  134. };
  135. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  136. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  137. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  138. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  139. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
  140. Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
  141. };
  142. struct dev_config {
  143. u32 sample_rate;
  144. u32 bit_format;
  145. u32 channels;
  146. };
  147. enum {
  148. DP_RX_IDX = 0,
  149. EXT_DISP_RX_IDX_MAX,
  150. };
  151. struct msm_wsa881x_dev_info {
  152. struct device_node *of_node;
  153. u32 index;
  154. };
  155. struct aux_codec_dev_info {
  156. struct device_node *of_node;
  157. u32 index;
  158. };
  159. enum pinctrl_pin_state {
  160. STATE_DISABLE = 0, /* All pins are in sleep state */
  161. STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
  162. STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
  163. };
  164. struct msm_pinctrl_info {
  165. struct pinctrl *pinctrl;
  166. struct pinctrl_state *mi2s_disable;
  167. struct pinctrl_state *tdm_disable;
  168. struct pinctrl_state *mi2s_active;
  169. struct pinctrl_state *tdm_active;
  170. enum pinctrl_pin_state curr_state;
  171. };
  172. struct msm_asoc_mach_data {
  173. struct snd_info_entry *codec_root;
  174. struct msm_pinctrl_info pinctrl_info;
  175. int usbc_en2_gpio; /* used by gpio driver API */
  176. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  177. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  178. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  179. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  180. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  181. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  182. };
  183. struct msm_asoc_wcd93xx_codec {
  184. void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
  185. enum afe_config_type config_type);
  186. };
  187. static const char *const pin_states[] = {"sleep", "i2s-active",
  188. "tdm-active"};
  189. static struct snd_soc_card snd_soc_card_sm6150_msm;
  190. enum {
  191. TDM_0 = 0,
  192. TDM_1,
  193. TDM_2,
  194. TDM_3,
  195. TDM_4,
  196. TDM_5,
  197. TDM_6,
  198. TDM_7,
  199. TDM_PORT_MAX,
  200. };
  201. enum {
  202. TDM_PRI = 0,
  203. TDM_SEC,
  204. TDM_TERT,
  205. TDM_QUAT,
  206. TDM_QUIN,
  207. TDM_INTERFACE_MAX,
  208. };
  209. struct tdm_port {
  210. u32 mode;
  211. u32 channel;
  212. };
  213. /* TDM default config */
  214. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  215. { /* PRI TDM */
  216. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  217. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  218. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  219. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  220. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  221. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  222. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  223. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  224. },
  225. { /* SEC TDM */
  226. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  227. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  230. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  231. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  232. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  233. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  234. },
  235. { /* TERT TDM */
  236. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  242. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  243. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  244. },
  245. { /* QUAT TDM */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  252. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  253. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  254. },
  255. { /* QUIN TDM */
  256. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  257. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  262. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  263. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  264. }
  265. };
  266. /* TDM default config */
  267. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  268. { /* PRI TDM */
  269. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  270. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  272. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  273. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  274. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  275. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  276. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  277. },
  278. { /* SEC TDM */
  279. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  280. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  281. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  282. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  284. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  285. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  286. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  287. },
  288. { /* TERT TDM */
  289. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  290. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  291. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  292. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  293. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  294. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  295. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  296. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  297. },
  298. { /* QUAT TDM */
  299. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  300. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  301. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  302. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  303. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  304. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  305. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  306. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  307. },
  308. { /* QUIN TDM */
  309. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  310. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  311. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  312. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  313. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  314. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  315. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  316. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  317. }
  318. };
  319. /* Default configuration of slimbus channels */
  320. static struct dev_config slim_rx_cfg[] = {
  321. [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  322. [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  323. [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  324. [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  325. [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  326. [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  327. [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  328. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  329. };
  330. static struct dev_config slim_tx_cfg[] = {
  331. [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  332. [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  333. [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  334. [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  335. [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  336. [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  337. [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  338. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  339. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  340. };
  341. /* Default configuration of Codec DMA Interface Tx */
  342. static struct dev_config cdc_dma_rx_cfg[] = {
  343. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  344. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  345. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  346. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  347. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  348. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  349. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  350. };
  351. /* Default configuration of Codec DMA Interface Rx */
  352. static struct dev_config cdc_dma_tx_cfg[] = {
  353. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  354. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  355. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  356. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  357. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  358. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  359. };
  360. /* Default configuration of external display BE */
  361. static struct dev_config ext_disp_rx_cfg[] = {
  362. [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  363. };
  364. static struct dev_config usb_rx_cfg = {
  365. .sample_rate = SAMPLING_RATE_48KHZ,
  366. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  367. .channels = 2,
  368. };
  369. static struct dev_config usb_tx_cfg = {
  370. .sample_rate = SAMPLING_RATE_48KHZ,
  371. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  372. .channels = 1,
  373. };
  374. static struct dev_config proxy_rx_cfg = {
  375. .sample_rate = SAMPLING_RATE_48KHZ,
  376. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  377. .channels = 2,
  378. };
  379. /* Default configuration of MI2S channels */
  380. static struct dev_config mi2s_rx_cfg[] = {
  381. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  382. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  383. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  384. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  385. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  386. };
  387. static struct dev_config mi2s_tx_cfg[] = {
  388. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  389. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  390. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  391. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  392. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  393. };
  394. static struct dev_config aux_pcm_rx_cfg[] = {
  395. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  396. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  397. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  398. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  399. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  400. };
  401. static struct dev_config aux_pcm_tx_cfg[] = {
  402. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  403. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  404. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  405. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  406. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  407. };
  408. static int msm_vi_feed_tx_ch = 2;
  409. static const char *const slim_rx_ch_text[] = {"One", "Two"};
  410. static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
  411. "Five", "Six", "Seven",
  412. "Eight"};
  413. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  414. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  415. "S32_LE"};
  416. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  417. "S24_3LE"};
  418. static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  419. "KHZ_32", "KHZ_44P1", "KHZ_48",
  420. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  421. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  422. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  423. "KHZ_44P1", "KHZ_48",
  424. "KHZ_88P2", "KHZ_96"};
  425. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  426. "Five", "Six", "Seven",
  427. "Eight"};
  428. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  429. "Six", "Seven", "Eight"};
  430. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  431. "KHZ_16", "KHZ_22P05",
  432. "KHZ_32", "KHZ_44P1", "KHZ_48",
  433. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  434. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  435. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  436. "KHZ_192", "KHZ_32", "KHZ_44P1",
  437. "KHZ_88P2", "KHZ_176P4" };
  438. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  439. "Five", "Six", "Seven", "Eight"};
  440. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  441. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  442. "KHZ_48", "KHZ_176P4",
  443. "KHZ_352P8"};
  444. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  445. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  446. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  447. "KHZ_48", "KHZ_96", "KHZ_192"};
  448. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  449. "Five", "Six", "Seven",
  450. "Eight"};
  451. static const char *const hifi_text[] = {"Off", "On"};
  452. static const char *const qos_text[] = {"Disable", "Enable"};
  453. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  454. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  455. "Five", "Six", "Seven",
  456. "Eight"};
  457. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  458. "KHZ_16", "KHZ_22P05",
  459. "KHZ_32", "KHZ_44P1", "KHZ_48",
  460. "KHZ_88P2", "KHZ_96",
  461. "KHZ_176P4", "KHZ_192",
  462. "KHZ_352P8", "KHZ_384"};
  463. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
  464. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
  465. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
  466. static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
  467. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
  468. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
  469. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  470. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  471. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  473. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
  475. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
  477. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  479. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  481. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
  483. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
  485. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
  486. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  487. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  488. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  489. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  490. ext_disp_sample_rate_text);
  491. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  492. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  493. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  494. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  496. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  497. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  498. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  499. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  500. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  501. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  502. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  503. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  504. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  505. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  506. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  507. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  508. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  509. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  510. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  511. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
  512. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  513. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  514. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  515. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  516. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
  517. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  518. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  519. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  520. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  521. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  522. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  523. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  524. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  525. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
  526. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
  527. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  528. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  529. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  530. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  531. static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
  532. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  533. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  534. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  535. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  536. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  537. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  538. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  539. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  540. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  541. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  542. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  543. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  544. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  545. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  546. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  547. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  548. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  549. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  550. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  551. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  552. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  553. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  554. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  555. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  556. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  557. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  558. cdc_dma_sample_rate_text);
  559. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  560. cdc_dma_sample_rate_text);
  561. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  562. cdc_dma_sample_rate_text);
  563. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  564. cdc_dma_sample_rate_text);
  565. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  566. cdc_dma_sample_rate_text);
  567. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  568. cdc_dma_sample_rate_text);
  569. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  570. cdc_dma_sample_rate_text);
  571. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  572. cdc_dma_sample_rate_text);
  573. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  574. cdc_dma_sample_rate_text);
  575. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  576. cdc_dma_sample_rate_text);
  577. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  578. cdc_dma_sample_rate_text);
  579. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  580. cdc_dma_sample_rate_text);
  581. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  582. cdc_dma_sample_rate_text);
  583. static struct platform_device *spdev;
  584. static int msm_hifi_control;
  585. static bool is_initial_boot;
  586. static bool codec_reg_done;
  587. static struct snd_soc_aux_dev *msm_aux_dev;
  588. static struct snd_soc_codec_conf *msm_codec_conf;
  589. static struct msm_asoc_wcd93xx_codec msm_codec_fn;
  590. static int dmic_0_1_gpio_cnt;
  591. static int dmic_2_3_gpio_cnt;
  592. static void *def_wcd_mbhc_cal(void);
  593. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  594. int enable, bool dapm);
  595. static int msm_wsa881x_init(struct snd_soc_component *component);
  596. static int msm_aux_codec_init(struct snd_soc_component *component);
  597. /*
  598. * Need to report LINEIN
  599. * if R/L channel impedance is larger than 5K ohm
  600. */
  601. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  602. .read_fw_bin = false,
  603. .calibration = NULL,
  604. .detect_extn_cable = true,
  605. .mono_stero_detection = false,
  606. .swap_gnd_mic = NULL,
  607. .hs_ext_micbias = true,
  608. .key_code[0] = KEY_MEDIA,
  609. .key_code[1] = KEY_VOICECOMMAND,
  610. .key_code[2] = KEY_VOLUMEUP,
  611. .key_code[3] = KEY_VOLUMEDOWN,
  612. .key_code[4] = 0,
  613. .key_code[5] = 0,
  614. .key_code[6] = 0,
  615. .key_code[7] = 0,
  616. .linein_th = 5000,
  617. .moisture_en = true,
  618. .mbhc_micbias = MIC_BIAS_2,
  619. .anc_micbias = MIC_BIAS_2,
  620. .enable_anc_mic_detect = false,
  621. };
  622. static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
  623. {"MIC BIAS1", NULL, "MCLK TX"},
  624. {"MIC BIAS2", NULL, "MCLK TX"},
  625. {"MIC BIAS3", NULL, "MCLK TX"},
  626. {"MIC BIAS4", NULL, "MCLK TX"},
  627. };
  628. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  629. {
  630. AFE_API_VERSION_I2S_CONFIG,
  631. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  632. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  633. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  634. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  635. 0,
  636. },
  637. {
  638. AFE_API_VERSION_I2S_CONFIG,
  639. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  640. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  641. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  642. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  643. 0,
  644. },
  645. {
  646. AFE_API_VERSION_I2S_CONFIG,
  647. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  648. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  649. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  650. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  651. 0,
  652. },
  653. {
  654. AFE_API_VERSION_I2S_CONFIG,
  655. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  656. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  657. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  658. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  659. 0,
  660. },
  661. {
  662. AFE_API_VERSION_I2S_CONFIG,
  663. Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
  664. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  665. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  666. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  667. 0,
  668. }
  669. };
  670. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  671. static int slim_get_sample_rate_val(int sample_rate)
  672. {
  673. int sample_rate_val = 0;
  674. switch (sample_rate) {
  675. case SAMPLING_RATE_8KHZ:
  676. sample_rate_val = 0;
  677. break;
  678. case SAMPLING_RATE_16KHZ:
  679. sample_rate_val = 1;
  680. break;
  681. case SAMPLING_RATE_32KHZ:
  682. sample_rate_val = 2;
  683. break;
  684. case SAMPLING_RATE_44P1KHZ:
  685. sample_rate_val = 3;
  686. break;
  687. case SAMPLING_RATE_48KHZ:
  688. sample_rate_val = 4;
  689. break;
  690. case SAMPLING_RATE_88P2KHZ:
  691. sample_rate_val = 5;
  692. break;
  693. case SAMPLING_RATE_96KHZ:
  694. sample_rate_val = 6;
  695. break;
  696. case SAMPLING_RATE_176P4KHZ:
  697. sample_rate_val = 7;
  698. break;
  699. case SAMPLING_RATE_192KHZ:
  700. sample_rate_val = 8;
  701. break;
  702. case SAMPLING_RATE_352P8KHZ:
  703. sample_rate_val = 9;
  704. break;
  705. case SAMPLING_RATE_384KHZ:
  706. sample_rate_val = 10;
  707. break;
  708. default:
  709. sample_rate_val = 4;
  710. break;
  711. }
  712. return sample_rate_val;
  713. }
  714. static int slim_get_sample_rate(int value)
  715. {
  716. int sample_rate = 0;
  717. switch (value) {
  718. case 0:
  719. sample_rate = SAMPLING_RATE_8KHZ;
  720. break;
  721. case 1:
  722. sample_rate = SAMPLING_RATE_16KHZ;
  723. break;
  724. case 2:
  725. sample_rate = SAMPLING_RATE_32KHZ;
  726. break;
  727. case 3:
  728. sample_rate = SAMPLING_RATE_44P1KHZ;
  729. break;
  730. case 4:
  731. sample_rate = SAMPLING_RATE_48KHZ;
  732. break;
  733. case 5:
  734. sample_rate = SAMPLING_RATE_88P2KHZ;
  735. break;
  736. case 6:
  737. sample_rate = SAMPLING_RATE_96KHZ;
  738. break;
  739. case 7:
  740. sample_rate = SAMPLING_RATE_176P4KHZ;
  741. break;
  742. case 8:
  743. sample_rate = SAMPLING_RATE_192KHZ;
  744. break;
  745. case 9:
  746. sample_rate = SAMPLING_RATE_352P8KHZ;
  747. break;
  748. case 10:
  749. sample_rate = SAMPLING_RATE_384KHZ;
  750. break;
  751. default:
  752. sample_rate = SAMPLING_RATE_48KHZ;
  753. break;
  754. }
  755. return sample_rate;
  756. }
  757. static int slim_get_bit_format_val(int bit_format)
  758. {
  759. int val = 0;
  760. switch (bit_format) {
  761. case SNDRV_PCM_FORMAT_S32_LE:
  762. val = 3;
  763. break;
  764. case SNDRV_PCM_FORMAT_S24_3LE:
  765. val = 2;
  766. break;
  767. case SNDRV_PCM_FORMAT_S24_LE:
  768. val = 1;
  769. break;
  770. case SNDRV_PCM_FORMAT_S16_LE:
  771. default:
  772. val = 0;
  773. break;
  774. }
  775. return val;
  776. }
  777. static int slim_get_bit_format(int val)
  778. {
  779. int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  780. switch (val) {
  781. case 0:
  782. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  783. break;
  784. case 1:
  785. bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
  786. break;
  787. case 2:
  788. bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
  789. break;
  790. case 3:
  791. bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
  792. break;
  793. default:
  794. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  795. break;
  796. }
  797. return bit_fmt;
  798. }
  799. static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
  800. {
  801. int port_id = 0;
  802. if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
  803. port_id = SLIM_RX_0;
  804. } else if (strnstr(kcontrol->id.name,
  805. "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
  806. port_id = SLIM_RX_2;
  807. } else if (strnstr(kcontrol->id.name,
  808. "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
  809. port_id = SLIM_RX_5;
  810. } else if (strnstr(kcontrol->id.name,
  811. "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
  812. port_id = SLIM_RX_6;
  813. } else if (strnstr(kcontrol->id.name,
  814. "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
  815. port_id = SLIM_TX_0;
  816. } else if (strnstr(kcontrol->id.name,
  817. "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
  818. port_id = SLIM_TX_1;
  819. } else {
  820. pr_err("%s: unsupported channel: %s\n",
  821. __func__, kcontrol->id.name);
  822. return -EINVAL;
  823. }
  824. return port_id;
  825. }
  826. static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  827. struct snd_ctl_elem_value *ucontrol)
  828. {
  829. int ch_num = slim_get_port_idx(kcontrol);
  830. if (ch_num < 0)
  831. return ch_num;
  832. ucontrol->value.enumerated.item[0] =
  833. slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
  834. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  835. ch_num, slim_rx_cfg[ch_num].sample_rate,
  836. ucontrol->value.enumerated.item[0]);
  837. return 0;
  838. }
  839. static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  840. struct snd_ctl_elem_value *ucontrol)
  841. {
  842. int ch_num = slim_get_port_idx(kcontrol);
  843. if (ch_num < 0)
  844. return ch_num;
  845. slim_rx_cfg[ch_num].sample_rate =
  846. slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  847. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  848. ch_num, slim_rx_cfg[ch_num].sample_rate,
  849. ucontrol->value.enumerated.item[0]);
  850. return 0;
  851. }
  852. static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  853. struct snd_ctl_elem_value *ucontrol)
  854. {
  855. int ch_num = slim_get_port_idx(kcontrol);
  856. if (ch_num < 0)
  857. return ch_num;
  858. ucontrol->value.enumerated.item[0] =
  859. slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
  860. pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  861. ch_num, slim_tx_cfg[ch_num].sample_rate,
  862. ucontrol->value.enumerated.item[0]);
  863. return 0;
  864. }
  865. static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  866. struct snd_ctl_elem_value *ucontrol)
  867. {
  868. int sample_rate = 0;
  869. int ch_num = slim_get_port_idx(kcontrol);
  870. if (ch_num < 0)
  871. return ch_num;
  872. sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  873. if (sample_rate == SAMPLING_RATE_44P1KHZ) {
  874. pr_err("%s: Unsupported sample rate %d: for Tx path\n",
  875. __func__, sample_rate);
  876. return -EINVAL;
  877. }
  878. slim_tx_cfg[ch_num].sample_rate = sample_rate;
  879. pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
  880. ch_num, slim_tx_cfg[ch_num].sample_rate,
  881. ucontrol->value.enumerated.item[0]);
  882. return 0;
  883. }
  884. static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
  885. struct snd_ctl_elem_value *ucontrol)
  886. {
  887. int ch_num = slim_get_port_idx(kcontrol);
  888. if (ch_num < 0)
  889. return ch_num;
  890. ucontrol->value.enumerated.item[0] =
  891. slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
  892. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  893. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  894. ucontrol->value.enumerated.item[0]);
  895. return 0;
  896. }
  897. static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
  898. struct snd_ctl_elem_value *ucontrol)
  899. {
  900. int ch_num = slim_get_port_idx(kcontrol);
  901. if (ch_num < 0)
  902. return ch_num;
  903. slim_rx_cfg[ch_num].bit_format =
  904. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  905. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  906. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  907. ucontrol->value.enumerated.item[0]);
  908. return 0;
  909. }
  910. static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
  911. struct snd_ctl_elem_value *ucontrol)
  912. {
  913. int ch_num = slim_get_port_idx(kcontrol);
  914. if (ch_num < 0)
  915. return ch_num;
  916. ucontrol->value.enumerated.item[0] =
  917. slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
  918. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  919. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  920. ucontrol->value.enumerated.item[0]);
  921. return 0;
  922. }
  923. static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
  924. struct snd_ctl_elem_value *ucontrol)
  925. {
  926. int ch_num = slim_get_port_idx(kcontrol);
  927. if (ch_num < 0)
  928. return ch_num;
  929. slim_tx_cfg[ch_num].bit_format =
  930. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  931. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  932. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  933. ucontrol->value.enumerated.item[0]);
  934. return 0;
  935. }
  936. static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
  937. struct snd_ctl_elem_value *ucontrol)
  938. {
  939. int ch_num = slim_get_port_idx(kcontrol);
  940. if (ch_num < 0)
  941. return ch_num;
  942. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  943. ch_num, slim_rx_cfg[ch_num].channels);
  944. ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
  945. return 0;
  946. }
  947. static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
  948. struct snd_ctl_elem_value *ucontrol)
  949. {
  950. int ch_num = slim_get_port_idx(kcontrol);
  951. if (ch_num < 0)
  952. return ch_num;
  953. slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  954. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  955. ch_num, slim_rx_cfg[ch_num].channels);
  956. return 1;
  957. }
  958. static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
  959. struct snd_ctl_elem_value *ucontrol)
  960. {
  961. int ch_num = slim_get_port_idx(kcontrol);
  962. if (ch_num < 0)
  963. return ch_num;
  964. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  965. ch_num, slim_tx_cfg[ch_num].channels);
  966. ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
  967. return 0;
  968. }
  969. static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
  970. struct snd_ctl_elem_value *ucontrol)
  971. {
  972. int ch_num = slim_get_port_idx(kcontrol);
  973. if (ch_num < 0)
  974. return ch_num;
  975. slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  976. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  977. ch_num, slim_tx_cfg[ch_num].channels);
  978. return 1;
  979. }
  980. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  981. struct snd_ctl_elem_value *ucontrol)
  982. {
  983. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  984. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  985. ucontrol->value.integer.value[0]);
  986. return 0;
  987. }
  988. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  989. struct snd_ctl_elem_value *ucontrol)
  990. {
  991. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  992. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  993. return 1;
  994. }
  995. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  996. struct snd_ctl_elem_value *ucontrol)
  997. {
  998. /*
  999. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  1000. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  1001. * value.
  1002. */
  1003. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1004. case SAMPLING_RATE_96KHZ:
  1005. ucontrol->value.integer.value[0] = 5;
  1006. break;
  1007. case SAMPLING_RATE_88P2KHZ:
  1008. ucontrol->value.integer.value[0] = 4;
  1009. break;
  1010. case SAMPLING_RATE_48KHZ:
  1011. ucontrol->value.integer.value[0] = 3;
  1012. break;
  1013. case SAMPLING_RATE_44P1KHZ:
  1014. ucontrol->value.integer.value[0] = 2;
  1015. break;
  1016. case SAMPLING_RATE_16KHZ:
  1017. ucontrol->value.integer.value[0] = 1;
  1018. break;
  1019. case SAMPLING_RATE_8KHZ:
  1020. default:
  1021. ucontrol->value.integer.value[0] = 0;
  1022. break;
  1023. }
  1024. pr_debug("%s: sample rate = %d\n", __func__,
  1025. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1026. return 0;
  1027. }
  1028. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  1029. struct snd_ctl_elem_value *ucontrol)
  1030. {
  1031. switch (ucontrol->value.integer.value[0]) {
  1032. case 1:
  1033. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1034. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1035. break;
  1036. case 2:
  1037. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1038. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1039. break;
  1040. case 3:
  1041. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1042. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1043. break;
  1044. case 4:
  1045. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1046. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1047. break;
  1048. case 5:
  1049. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1050. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1051. break;
  1052. case 0:
  1053. default:
  1054. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1055. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1056. break;
  1057. }
  1058. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  1059. __func__,
  1060. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1061. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1062. ucontrol->value.enumerated.item[0]);
  1063. return 0;
  1064. }
  1065. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1066. {
  1067. int idx = 0;
  1068. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1069. sizeof("WSA_CDC_DMA_RX_0")))
  1070. idx = WSA_CDC_DMA_RX_0;
  1071. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1072. sizeof("WSA_CDC_DMA_RX_0")))
  1073. idx = WSA_CDC_DMA_RX_1;
  1074. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1075. sizeof("RX_CDC_DMA_RX_0")))
  1076. idx = RX_CDC_DMA_RX_0;
  1077. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1078. sizeof("RX_CDC_DMA_RX_1")))
  1079. idx = RX_CDC_DMA_RX_1;
  1080. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1081. sizeof("RX_CDC_DMA_RX_2")))
  1082. idx = RX_CDC_DMA_RX_2;
  1083. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1084. sizeof("RX_CDC_DMA_RX_3")))
  1085. idx = RX_CDC_DMA_RX_3;
  1086. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1087. sizeof("RX_CDC_DMA_RX_5")))
  1088. idx = RX_CDC_DMA_RX_5;
  1089. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1090. sizeof("WSA_CDC_DMA_TX_0")))
  1091. idx = WSA_CDC_DMA_TX_0;
  1092. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1093. sizeof("WSA_CDC_DMA_TX_1")))
  1094. idx = WSA_CDC_DMA_TX_1;
  1095. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1096. sizeof("WSA_CDC_DMA_TX_2")))
  1097. idx = WSA_CDC_DMA_TX_2;
  1098. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1099. sizeof("TX_CDC_DMA_TX_0")))
  1100. idx = TX_CDC_DMA_TX_0;
  1101. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1102. sizeof("TX_CDC_DMA_TX_3")))
  1103. idx = TX_CDC_DMA_TX_3;
  1104. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1105. sizeof("TX_CDC_DMA_TX_4")))
  1106. idx = TX_CDC_DMA_TX_4;
  1107. else {
  1108. pr_err("%s: unsupported channel: %s\n",
  1109. __func__, kcontrol->id.name);
  1110. return -EINVAL;
  1111. }
  1112. return idx;
  1113. }
  1114. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1115. struct snd_ctl_elem_value *ucontrol)
  1116. {
  1117. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1118. if (ch_num < 0)
  1119. return ch_num;
  1120. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1121. cdc_dma_rx_cfg[ch_num].channels - 1);
  1122. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1123. return 0;
  1124. }
  1125. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1126. struct snd_ctl_elem_value *ucontrol)
  1127. {
  1128. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1129. if (ch_num < 0)
  1130. return ch_num;
  1131. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1132. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1133. cdc_dma_rx_cfg[ch_num].channels);
  1134. return 1;
  1135. }
  1136. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1137. struct snd_ctl_elem_value *ucontrol)
  1138. {
  1139. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1140. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1141. case SNDRV_PCM_FORMAT_S32_LE:
  1142. ucontrol->value.integer.value[0] = 3;
  1143. break;
  1144. case SNDRV_PCM_FORMAT_S24_3LE:
  1145. ucontrol->value.integer.value[0] = 2;
  1146. break;
  1147. case SNDRV_PCM_FORMAT_S24_LE:
  1148. ucontrol->value.integer.value[0] = 1;
  1149. break;
  1150. case SNDRV_PCM_FORMAT_S16_LE:
  1151. default:
  1152. ucontrol->value.integer.value[0] = 0;
  1153. break;
  1154. }
  1155. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1156. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1157. ucontrol->value.integer.value[0]);
  1158. return 0;
  1159. }
  1160. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1161. struct snd_ctl_elem_value *ucontrol)
  1162. {
  1163. int rc = 0;
  1164. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1165. switch (ucontrol->value.integer.value[0]) {
  1166. case 3:
  1167. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1168. break;
  1169. case 2:
  1170. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1171. break;
  1172. case 1:
  1173. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1174. break;
  1175. case 0:
  1176. default:
  1177. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1178. break;
  1179. }
  1180. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1181. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1182. ucontrol->value.integer.value[0]);
  1183. return rc;
  1184. }
  1185. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1186. {
  1187. int sample_rate_val = 0;
  1188. switch (sample_rate) {
  1189. case SAMPLING_RATE_8KHZ:
  1190. sample_rate_val = 0;
  1191. break;
  1192. case SAMPLING_RATE_11P025KHZ:
  1193. sample_rate_val = 1;
  1194. break;
  1195. case SAMPLING_RATE_16KHZ:
  1196. sample_rate_val = 2;
  1197. break;
  1198. case SAMPLING_RATE_22P05KHZ:
  1199. sample_rate_val = 3;
  1200. break;
  1201. case SAMPLING_RATE_32KHZ:
  1202. sample_rate_val = 4;
  1203. break;
  1204. case SAMPLING_RATE_44P1KHZ:
  1205. sample_rate_val = 5;
  1206. break;
  1207. case SAMPLING_RATE_48KHZ:
  1208. sample_rate_val = 6;
  1209. break;
  1210. case SAMPLING_RATE_88P2KHZ:
  1211. sample_rate_val = 7;
  1212. break;
  1213. case SAMPLING_RATE_96KHZ:
  1214. sample_rate_val = 8;
  1215. break;
  1216. case SAMPLING_RATE_176P4KHZ:
  1217. sample_rate_val = 9;
  1218. break;
  1219. case SAMPLING_RATE_192KHZ:
  1220. sample_rate_val = 10;
  1221. break;
  1222. case SAMPLING_RATE_352P8KHZ:
  1223. sample_rate_val = 11;
  1224. break;
  1225. case SAMPLING_RATE_384KHZ:
  1226. sample_rate_val = 12;
  1227. break;
  1228. default:
  1229. sample_rate_val = 6;
  1230. break;
  1231. }
  1232. return sample_rate_val;
  1233. }
  1234. static int cdc_dma_get_sample_rate(int value)
  1235. {
  1236. int sample_rate = 0;
  1237. switch (value) {
  1238. case 0:
  1239. sample_rate = SAMPLING_RATE_8KHZ;
  1240. break;
  1241. case 1:
  1242. sample_rate = SAMPLING_RATE_11P025KHZ;
  1243. break;
  1244. case 2:
  1245. sample_rate = SAMPLING_RATE_16KHZ;
  1246. break;
  1247. case 3:
  1248. sample_rate = SAMPLING_RATE_22P05KHZ;
  1249. break;
  1250. case 4:
  1251. sample_rate = SAMPLING_RATE_32KHZ;
  1252. break;
  1253. case 5:
  1254. sample_rate = SAMPLING_RATE_44P1KHZ;
  1255. break;
  1256. case 6:
  1257. sample_rate = SAMPLING_RATE_48KHZ;
  1258. break;
  1259. case 7:
  1260. sample_rate = SAMPLING_RATE_88P2KHZ;
  1261. break;
  1262. case 8:
  1263. sample_rate = SAMPLING_RATE_96KHZ;
  1264. break;
  1265. case 9:
  1266. sample_rate = SAMPLING_RATE_176P4KHZ;
  1267. break;
  1268. case 10:
  1269. sample_rate = SAMPLING_RATE_192KHZ;
  1270. break;
  1271. case 11:
  1272. sample_rate = SAMPLING_RATE_352P8KHZ;
  1273. break;
  1274. case 12:
  1275. sample_rate = SAMPLING_RATE_384KHZ;
  1276. break;
  1277. default:
  1278. sample_rate = SAMPLING_RATE_48KHZ;
  1279. break;
  1280. }
  1281. return sample_rate;
  1282. }
  1283. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1284. struct snd_ctl_elem_value *ucontrol)
  1285. {
  1286. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1287. if (ch_num < 0)
  1288. return ch_num;
  1289. ucontrol->value.enumerated.item[0] =
  1290. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1291. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1292. cdc_dma_rx_cfg[ch_num].sample_rate);
  1293. return 0;
  1294. }
  1295. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1296. struct snd_ctl_elem_value *ucontrol)
  1297. {
  1298. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1299. if (ch_num < 0)
  1300. return ch_num;
  1301. cdc_dma_rx_cfg[ch_num].sample_rate =
  1302. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1303. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  1304. __func__, ucontrol->value.enumerated.item[0],
  1305. cdc_dma_rx_cfg[ch_num].sample_rate);
  1306. return 0;
  1307. }
  1308. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  1309. struct snd_ctl_elem_value *ucontrol)
  1310. {
  1311. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1312. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1313. cdc_dma_tx_cfg[ch_num].channels);
  1314. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  1315. return 0;
  1316. }
  1317. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  1318. struct snd_ctl_elem_value *ucontrol)
  1319. {
  1320. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1321. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1322. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1323. cdc_dma_tx_cfg[ch_num].channels);
  1324. return 1;
  1325. }
  1326. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1327. struct snd_ctl_elem_value *ucontrol)
  1328. {
  1329. int sample_rate_val;
  1330. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1331. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  1332. case SAMPLING_RATE_384KHZ:
  1333. sample_rate_val = 12;
  1334. break;
  1335. case SAMPLING_RATE_352P8KHZ:
  1336. sample_rate_val = 11;
  1337. break;
  1338. case SAMPLING_RATE_192KHZ:
  1339. sample_rate_val = 10;
  1340. break;
  1341. case SAMPLING_RATE_176P4KHZ:
  1342. sample_rate_val = 9;
  1343. break;
  1344. case SAMPLING_RATE_96KHZ:
  1345. sample_rate_val = 8;
  1346. break;
  1347. case SAMPLING_RATE_88P2KHZ:
  1348. sample_rate_val = 7;
  1349. break;
  1350. case SAMPLING_RATE_48KHZ:
  1351. sample_rate_val = 6;
  1352. break;
  1353. case SAMPLING_RATE_44P1KHZ:
  1354. sample_rate_val = 5;
  1355. break;
  1356. case SAMPLING_RATE_32KHZ:
  1357. sample_rate_val = 4;
  1358. break;
  1359. case SAMPLING_RATE_22P05KHZ:
  1360. sample_rate_val = 3;
  1361. break;
  1362. case SAMPLING_RATE_16KHZ:
  1363. sample_rate_val = 2;
  1364. break;
  1365. case SAMPLING_RATE_11P025KHZ:
  1366. sample_rate_val = 1;
  1367. break;
  1368. case SAMPLING_RATE_8KHZ:
  1369. sample_rate_val = 0;
  1370. break;
  1371. default:
  1372. sample_rate_val = 6;
  1373. break;
  1374. }
  1375. ucontrol->value.integer.value[0] = sample_rate_val;
  1376. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  1377. cdc_dma_tx_cfg[ch_num].sample_rate);
  1378. return 0;
  1379. }
  1380. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1381. struct snd_ctl_elem_value *ucontrol)
  1382. {
  1383. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1384. switch (ucontrol->value.integer.value[0]) {
  1385. case 12:
  1386. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  1387. break;
  1388. case 11:
  1389. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  1390. break;
  1391. case 10:
  1392. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  1393. break;
  1394. case 9:
  1395. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  1396. break;
  1397. case 8:
  1398. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  1399. break;
  1400. case 7:
  1401. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  1402. break;
  1403. case 6:
  1404. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1405. break;
  1406. case 5:
  1407. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  1408. break;
  1409. case 4:
  1410. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  1411. break;
  1412. case 3:
  1413. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  1414. break;
  1415. case 2:
  1416. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  1417. break;
  1418. case 1:
  1419. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  1420. break;
  1421. case 0:
  1422. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  1423. break;
  1424. default:
  1425. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1426. break;
  1427. }
  1428. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  1429. __func__, ucontrol->value.integer.value[0],
  1430. cdc_dma_tx_cfg[ch_num].sample_rate);
  1431. return 0;
  1432. }
  1433. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  1434. struct snd_ctl_elem_value *ucontrol)
  1435. {
  1436. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1437. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  1438. case SNDRV_PCM_FORMAT_S32_LE:
  1439. ucontrol->value.integer.value[0] = 3;
  1440. break;
  1441. case SNDRV_PCM_FORMAT_S24_3LE:
  1442. ucontrol->value.integer.value[0] = 2;
  1443. break;
  1444. case SNDRV_PCM_FORMAT_S24_LE:
  1445. ucontrol->value.integer.value[0] = 1;
  1446. break;
  1447. case SNDRV_PCM_FORMAT_S16_LE:
  1448. default:
  1449. ucontrol->value.integer.value[0] = 0;
  1450. break;
  1451. }
  1452. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1453. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1454. ucontrol->value.integer.value[0]);
  1455. return 0;
  1456. }
  1457. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  1458. struct snd_ctl_elem_value *ucontrol)
  1459. {
  1460. int rc = 0;
  1461. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1462. switch (ucontrol->value.integer.value[0]) {
  1463. case 3:
  1464. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1465. break;
  1466. case 2:
  1467. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1468. break;
  1469. case 1:
  1470. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1471. break;
  1472. case 0:
  1473. default:
  1474. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1475. break;
  1476. }
  1477. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1478. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1479. ucontrol->value.integer.value[0]);
  1480. return rc;
  1481. }
  1482. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  1483. struct snd_ctl_elem_value *ucontrol)
  1484. {
  1485. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  1486. usb_rx_cfg.channels);
  1487. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  1488. return 0;
  1489. }
  1490. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  1491. struct snd_ctl_elem_value *ucontrol)
  1492. {
  1493. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1494. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  1495. return 1;
  1496. }
  1497. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1498. struct snd_ctl_elem_value *ucontrol)
  1499. {
  1500. int sample_rate_val;
  1501. switch (usb_rx_cfg.sample_rate) {
  1502. case SAMPLING_RATE_384KHZ:
  1503. sample_rate_val = 12;
  1504. break;
  1505. case SAMPLING_RATE_352P8KHZ:
  1506. sample_rate_val = 11;
  1507. break;
  1508. case SAMPLING_RATE_192KHZ:
  1509. sample_rate_val = 10;
  1510. break;
  1511. case SAMPLING_RATE_176P4KHZ:
  1512. sample_rate_val = 9;
  1513. break;
  1514. case SAMPLING_RATE_96KHZ:
  1515. sample_rate_val = 8;
  1516. break;
  1517. case SAMPLING_RATE_88P2KHZ:
  1518. sample_rate_val = 7;
  1519. break;
  1520. case SAMPLING_RATE_48KHZ:
  1521. sample_rate_val = 6;
  1522. break;
  1523. case SAMPLING_RATE_44P1KHZ:
  1524. sample_rate_val = 5;
  1525. break;
  1526. case SAMPLING_RATE_32KHZ:
  1527. sample_rate_val = 4;
  1528. break;
  1529. case SAMPLING_RATE_22P05KHZ:
  1530. sample_rate_val = 3;
  1531. break;
  1532. case SAMPLING_RATE_16KHZ:
  1533. sample_rate_val = 2;
  1534. break;
  1535. case SAMPLING_RATE_11P025KHZ:
  1536. sample_rate_val = 1;
  1537. break;
  1538. case SAMPLING_RATE_8KHZ:
  1539. default:
  1540. sample_rate_val = 0;
  1541. break;
  1542. }
  1543. ucontrol->value.integer.value[0] = sample_rate_val;
  1544. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  1545. usb_rx_cfg.sample_rate);
  1546. return 0;
  1547. }
  1548. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1549. struct snd_ctl_elem_value *ucontrol)
  1550. {
  1551. switch (ucontrol->value.integer.value[0]) {
  1552. case 12:
  1553. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1554. break;
  1555. case 11:
  1556. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1557. break;
  1558. case 10:
  1559. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1560. break;
  1561. case 9:
  1562. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1563. break;
  1564. case 8:
  1565. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1566. break;
  1567. case 7:
  1568. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1569. break;
  1570. case 6:
  1571. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1572. break;
  1573. case 5:
  1574. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1575. break;
  1576. case 4:
  1577. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1578. break;
  1579. case 3:
  1580. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1581. break;
  1582. case 2:
  1583. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1584. break;
  1585. case 1:
  1586. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1587. break;
  1588. case 0:
  1589. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1590. break;
  1591. default:
  1592. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1593. break;
  1594. }
  1595. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  1596. __func__, ucontrol->value.integer.value[0],
  1597. usb_rx_cfg.sample_rate);
  1598. return 0;
  1599. }
  1600. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  1601. struct snd_ctl_elem_value *ucontrol)
  1602. {
  1603. switch (usb_rx_cfg.bit_format) {
  1604. case SNDRV_PCM_FORMAT_S32_LE:
  1605. ucontrol->value.integer.value[0] = 3;
  1606. break;
  1607. case SNDRV_PCM_FORMAT_S24_3LE:
  1608. ucontrol->value.integer.value[0] = 2;
  1609. break;
  1610. case SNDRV_PCM_FORMAT_S24_LE:
  1611. ucontrol->value.integer.value[0] = 1;
  1612. break;
  1613. case SNDRV_PCM_FORMAT_S16_LE:
  1614. default:
  1615. ucontrol->value.integer.value[0] = 0;
  1616. break;
  1617. }
  1618. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1619. __func__, usb_rx_cfg.bit_format,
  1620. ucontrol->value.integer.value[0]);
  1621. return 0;
  1622. }
  1623. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  1624. struct snd_ctl_elem_value *ucontrol)
  1625. {
  1626. int rc = 0;
  1627. switch (ucontrol->value.integer.value[0]) {
  1628. case 3:
  1629. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1630. break;
  1631. case 2:
  1632. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1633. break;
  1634. case 1:
  1635. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1636. break;
  1637. case 0:
  1638. default:
  1639. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1640. break;
  1641. }
  1642. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1643. __func__, usb_rx_cfg.bit_format,
  1644. ucontrol->value.integer.value[0]);
  1645. return rc;
  1646. }
  1647. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  1648. struct snd_ctl_elem_value *ucontrol)
  1649. {
  1650. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  1651. usb_tx_cfg.channels);
  1652. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  1653. return 0;
  1654. }
  1655. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  1656. struct snd_ctl_elem_value *ucontrol)
  1657. {
  1658. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1659. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  1660. return 1;
  1661. }
  1662. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1663. struct snd_ctl_elem_value *ucontrol)
  1664. {
  1665. int sample_rate_val;
  1666. switch (usb_tx_cfg.sample_rate) {
  1667. case SAMPLING_RATE_384KHZ:
  1668. sample_rate_val = 12;
  1669. break;
  1670. case SAMPLING_RATE_352P8KHZ:
  1671. sample_rate_val = 11;
  1672. break;
  1673. case SAMPLING_RATE_192KHZ:
  1674. sample_rate_val = 10;
  1675. break;
  1676. case SAMPLING_RATE_176P4KHZ:
  1677. sample_rate_val = 9;
  1678. break;
  1679. case SAMPLING_RATE_96KHZ:
  1680. sample_rate_val = 8;
  1681. break;
  1682. case SAMPLING_RATE_88P2KHZ:
  1683. sample_rate_val = 7;
  1684. break;
  1685. case SAMPLING_RATE_48KHZ:
  1686. sample_rate_val = 6;
  1687. break;
  1688. case SAMPLING_RATE_44P1KHZ:
  1689. sample_rate_val = 5;
  1690. break;
  1691. case SAMPLING_RATE_32KHZ:
  1692. sample_rate_val = 4;
  1693. break;
  1694. case SAMPLING_RATE_22P05KHZ:
  1695. sample_rate_val = 3;
  1696. break;
  1697. case SAMPLING_RATE_16KHZ:
  1698. sample_rate_val = 2;
  1699. break;
  1700. case SAMPLING_RATE_11P025KHZ:
  1701. sample_rate_val = 1;
  1702. break;
  1703. case SAMPLING_RATE_8KHZ:
  1704. sample_rate_val = 0;
  1705. break;
  1706. default:
  1707. sample_rate_val = 6;
  1708. break;
  1709. }
  1710. ucontrol->value.integer.value[0] = sample_rate_val;
  1711. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  1712. usb_tx_cfg.sample_rate);
  1713. return 0;
  1714. }
  1715. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1716. struct snd_ctl_elem_value *ucontrol)
  1717. {
  1718. switch (ucontrol->value.integer.value[0]) {
  1719. case 12:
  1720. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1721. break;
  1722. case 11:
  1723. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1724. break;
  1725. case 10:
  1726. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1727. break;
  1728. case 9:
  1729. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1730. break;
  1731. case 8:
  1732. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1733. break;
  1734. case 7:
  1735. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1736. break;
  1737. case 6:
  1738. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1739. break;
  1740. case 5:
  1741. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1742. break;
  1743. case 4:
  1744. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1745. break;
  1746. case 3:
  1747. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1748. break;
  1749. case 2:
  1750. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1751. break;
  1752. case 1:
  1753. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1754. break;
  1755. case 0:
  1756. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1757. break;
  1758. default:
  1759. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1760. break;
  1761. }
  1762. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  1763. __func__, ucontrol->value.integer.value[0],
  1764. usb_tx_cfg.sample_rate);
  1765. return 0;
  1766. }
  1767. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  1768. struct snd_ctl_elem_value *ucontrol)
  1769. {
  1770. switch (usb_tx_cfg.bit_format) {
  1771. case SNDRV_PCM_FORMAT_S32_LE:
  1772. ucontrol->value.integer.value[0] = 3;
  1773. break;
  1774. case SNDRV_PCM_FORMAT_S24_3LE:
  1775. ucontrol->value.integer.value[0] = 2;
  1776. break;
  1777. case SNDRV_PCM_FORMAT_S24_LE:
  1778. ucontrol->value.integer.value[0] = 1;
  1779. break;
  1780. case SNDRV_PCM_FORMAT_S16_LE:
  1781. default:
  1782. ucontrol->value.integer.value[0] = 0;
  1783. break;
  1784. }
  1785. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1786. __func__, usb_tx_cfg.bit_format,
  1787. ucontrol->value.integer.value[0]);
  1788. return 0;
  1789. }
  1790. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  1791. struct snd_ctl_elem_value *ucontrol)
  1792. {
  1793. int rc = 0;
  1794. switch (ucontrol->value.integer.value[0]) {
  1795. case 3:
  1796. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1797. break;
  1798. case 2:
  1799. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1800. break;
  1801. case 1:
  1802. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1803. break;
  1804. case 0:
  1805. default:
  1806. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1807. break;
  1808. }
  1809. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1810. __func__, usb_tx_cfg.bit_format,
  1811. ucontrol->value.integer.value[0]);
  1812. return rc;
  1813. }
  1814. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  1815. {
  1816. int idx;
  1817. if (strnstr(kcontrol->id.name, "Display Port RX",
  1818. sizeof("Display Port RX"))) {
  1819. idx = DP_RX_IDX;
  1820. } else {
  1821. pr_err("%s: unsupported BE: %s\n",
  1822. __func__, kcontrol->id.name);
  1823. idx = -EINVAL;
  1824. }
  1825. return idx;
  1826. }
  1827. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  1828. struct snd_ctl_elem_value *ucontrol)
  1829. {
  1830. int idx = ext_disp_get_port_idx(kcontrol);
  1831. if (idx < 0)
  1832. return idx;
  1833. switch (ext_disp_rx_cfg[idx].bit_format) {
  1834. case SNDRV_PCM_FORMAT_S24_3LE:
  1835. ucontrol->value.integer.value[0] = 2;
  1836. break;
  1837. case SNDRV_PCM_FORMAT_S24_LE:
  1838. ucontrol->value.integer.value[0] = 1;
  1839. break;
  1840. case SNDRV_PCM_FORMAT_S16_LE:
  1841. default:
  1842. ucontrol->value.integer.value[0] = 0;
  1843. break;
  1844. }
  1845. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  1846. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  1847. ucontrol->value.integer.value[0]);
  1848. return 0;
  1849. }
  1850. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  1851. struct snd_ctl_elem_value *ucontrol)
  1852. {
  1853. int idx = ext_disp_get_port_idx(kcontrol);
  1854. if (idx < 0)
  1855. return idx;
  1856. switch (ucontrol->value.integer.value[0]) {
  1857. case 2:
  1858. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1859. break;
  1860. case 1:
  1861. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1862. break;
  1863. case 0:
  1864. default:
  1865. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1866. break;
  1867. }
  1868. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  1869. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  1870. ucontrol->value.integer.value[0]);
  1871. return 0;
  1872. }
  1873. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  1874. struct snd_ctl_elem_value *ucontrol)
  1875. {
  1876. int idx = ext_disp_get_port_idx(kcontrol);
  1877. if (idx < 0)
  1878. return idx;
  1879. ucontrol->value.integer.value[0] =
  1880. ext_disp_rx_cfg[idx].channels - 2;
  1881. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1882. idx, ext_disp_rx_cfg[idx].channels);
  1883. return 0;
  1884. }
  1885. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  1886. struct snd_ctl_elem_value *ucontrol)
  1887. {
  1888. int idx = ext_disp_get_port_idx(kcontrol);
  1889. if (idx < 0)
  1890. return idx;
  1891. ext_disp_rx_cfg[idx].channels =
  1892. ucontrol->value.integer.value[0] + 2;
  1893. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1894. idx, ext_disp_rx_cfg[idx].channels);
  1895. return 1;
  1896. }
  1897. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1898. struct snd_ctl_elem_value *ucontrol)
  1899. {
  1900. int sample_rate_val;
  1901. int idx = ext_disp_get_port_idx(kcontrol);
  1902. if (idx < 0)
  1903. return idx;
  1904. switch (ext_disp_rx_cfg[idx].sample_rate) {
  1905. case SAMPLING_RATE_176P4KHZ:
  1906. sample_rate_val = 6;
  1907. break;
  1908. case SAMPLING_RATE_88P2KHZ:
  1909. sample_rate_val = 5;
  1910. break;
  1911. case SAMPLING_RATE_44P1KHZ:
  1912. sample_rate_val = 4;
  1913. break;
  1914. case SAMPLING_RATE_32KHZ:
  1915. sample_rate_val = 3;
  1916. break;
  1917. case SAMPLING_RATE_192KHZ:
  1918. sample_rate_val = 2;
  1919. break;
  1920. case SAMPLING_RATE_96KHZ:
  1921. sample_rate_val = 1;
  1922. break;
  1923. case SAMPLING_RATE_48KHZ:
  1924. default:
  1925. sample_rate_val = 0;
  1926. break;
  1927. }
  1928. ucontrol->value.integer.value[0] = sample_rate_val;
  1929. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  1930. idx, ext_disp_rx_cfg[idx].sample_rate);
  1931. return 0;
  1932. }
  1933. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1934. struct snd_ctl_elem_value *ucontrol)
  1935. {
  1936. int idx = ext_disp_get_port_idx(kcontrol);
  1937. if (idx < 0)
  1938. return idx;
  1939. switch (ucontrol->value.integer.value[0]) {
  1940. case 6:
  1941. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  1942. break;
  1943. case 5:
  1944. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  1945. break;
  1946. case 4:
  1947. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  1948. break;
  1949. case 3:
  1950. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  1951. break;
  1952. case 2:
  1953. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  1954. break;
  1955. case 1:
  1956. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  1957. break;
  1958. case 0:
  1959. default:
  1960. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  1961. break;
  1962. }
  1963. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  1964. __func__, ucontrol->value.integer.value[0], idx,
  1965. ext_disp_rx_cfg[idx].sample_rate);
  1966. return 0;
  1967. }
  1968. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  1969. struct snd_ctl_elem_value *ucontrol)
  1970. {
  1971. pr_debug("%s: proxy_rx channels = %d\n",
  1972. __func__, proxy_rx_cfg.channels);
  1973. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  1974. return 0;
  1975. }
  1976. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  1977. struct snd_ctl_elem_value *ucontrol)
  1978. {
  1979. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  1980. pr_debug("%s: proxy_rx channels = %d\n",
  1981. __func__, proxy_rx_cfg.channels);
  1982. return 1;
  1983. }
  1984. static int tdm_get_sample_rate(int value)
  1985. {
  1986. int sample_rate = 0;
  1987. switch (value) {
  1988. case 0:
  1989. sample_rate = SAMPLING_RATE_8KHZ;
  1990. break;
  1991. case 1:
  1992. sample_rate = SAMPLING_RATE_16KHZ;
  1993. break;
  1994. case 2:
  1995. sample_rate = SAMPLING_RATE_32KHZ;
  1996. break;
  1997. case 3:
  1998. sample_rate = SAMPLING_RATE_48KHZ;
  1999. break;
  2000. case 4:
  2001. sample_rate = SAMPLING_RATE_176P4KHZ;
  2002. break;
  2003. case 5:
  2004. sample_rate = SAMPLING_RATE_352P8KHZ;
  2005. break;
  2006. default:
  2007. sample_rate = SAMPLING_RATE_48KHZ;
  2008. break;
  2009. }
  2010. return sample_rate;
  2011. }
  2012. static int aux_pcm_get_sample_rate(int value)
  2013. {
  2014. int sample_rate;
  2015. switch (value) {
  2016. case 1:
  2017. sample_rate = SAMPLING_RATE_16KHZ;
  2018. break;
  2019. case 0:
  2020. default:
  2021. sample_rate = SAMPLING_RATE_8KHZ;
  2022. break;
  2023. }
  2024. return sample_rate;
  2025. }
  2026. static int tdm_get_sample_rate_val(int sample_rate)
  2027. {
  2028. int sample_rate_val = 0;
  2029. switch (sample_rate) {
  2030. case SAMPLING_RATE_8KHZ:
  2031. sample_rate_val = 0;
  2032. break;
  2033. case SAMPLING_RATE_16KHZ:
  2034. sample_rate_val = 1;
  2035. break;
  2036. case SAMPLING_RATE_32KHZ:
  2037. sample_rate_val = 2;
  2038. break;
  2039. case SAMPLING_RATE_48KHZ:
  2040. sample_rate_val = 3;
  2041. break;
  2042. case SAMPLING_RATE_176P4KHZ:
  2043. sample_rate_val = 4;
  2044. break;
  2045. case SAMPLING_RATE_352P8KHZ:
  2046. sample_rate_val = 5;
  2047. break;
  2048. default:
  2049. sample_rate_val = 3;
  2050. break;
  2051. }
  2052. return sample_rate_val;
  2053. }
  2054. static int aux_pcm_get_sample_rate_val(int sample_rate)
  2055. {
  2056. int sample_rate_val;
  2057. switch (sample_rate) {
  2058. case SAMPLING_RATE_16KHZ:
  2059. sample_rate_val = 1;
  2060. break;
  2061. case SAMPLING_RATE_8KHZ:
  2062. default:
  2063. sample_rate_val = 0;
  2064. break;
  2065. }
  2066. return sample_rate_val;
  2067. }
  2068. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  2069. struct tdm_port *port)
  2070. {
  2071. if (port) {
  2072. if (strnstr(kcontrol->id.name, "PRI",
  2073. sizeof(kcontrol->id.name))) {
  2074. port->mode = TDM_PRI;
  2075. } else if (strnstr(kcontrol->id.name, "SEC",
  2076. sizeof(kcontrol->id.name))) {
  2077. port->mode = TDM_SEC;
  2078. } else if (strnstr(kcontrol->id.name, "TERT",
  2079. sizeof(kcontrol->id.name))) {
  2080. port->mode = TDM_TERT;
  2081. } else if (strnstr(kcontrol->id.name, "QUAT",
  2082. sizeof(kcontrol->id.name))) {
  2083. port->mode = TDM_QUAT;
  2084. } else if (strnstr(kcontrol->id.name, "QUIN",
  2085. sizeof(kcontrol->id.name))) {
  2086. port->mode = TDM_QUIN;
  2087. } else {
  2088. pr_err("%s: unsupported mode in: %s\n",
  2089. __func__, kcontrol->id.name);
  2090. return -EINVAL;
  2091. }
  2092. if (strnstr(kcontrol->id.name, "RX_0",
  2093. sizeof(kcontrol->id.name)) ||
  2094. strnstr(kcontrol->id.name, "TX_0",
  2095. sizeof(kcontrol->id.name))) {
  2096. port->channel = TDM_0;
  2097. } else if (strnstr(kcontrol->id.name, "RX_1",
  2098. sizeof(kcontrol->id.name)) ||
  2099. strnstr(kcontrol->id.name, "TX_1",
  2100. sizeof(kcontrol->id.name))) {
  2101. port->channel = TDM_1;
  2102. } else if (strnstr(kcontrol->id.name, "RX_2",
  2103. sizeof(kcontrol->id.name)) ||
  2104. strnstr(kcontrol->id.name, "TX_2",
  2105. sizeof(kcontrol->id.name))) {
  2106. port->channel = TDM_2;
  2107. } else if (strnstr(kcontrol->id.name, "RX_3",
  2108. sizeof(kcontrol->id.name)) ||
  2109. strnstr(kcontrol->id.name, "TX_3",
  2110. sizeof(kcontrol->id.name))) {
  2111. port->channel = TDM_3;
  2112. } else if (strnstr(kcontrol->id.name, "RX_4",
  2113. sizeof(kcontrol->id.name)) ||
  2114. strnstr(kcontrol->id.name, "TX_4",
  2115. sizeof(kcontrol->id.name))) {
  2116. port->channel = TDM_4;
  2117. } else if (strnstr(kcontrol->id.name, "RX_5",
  2118. sizeof(kcontrol->id.name)) ||
  2119. strnstr(kcontrol->id.name, "TX_5",
  2120. sizeof(kcontrol->id.name))) {
  2121. port->channel = TDM_5;
  2122. } else if (strnstr(kcontrol->id.name, "RX_6",
  2123. sizeof(kcontrol->id.name)) ||
  2124. strnstr(kcontrol->id.name, "TX_6",
  2125. sizeof(kcontrol->id.name))) {
  2126. port->channel = TDM_6;
  2127. } else if (strnstr(kcontrol->id.name, "RX_7",
  2128. sizeof(kcontrol->id.name)) ||
  2129. strnstr(kcontrol->id.name, "TX_7",
  2130. sizeof(kcontrol->id.name))) {
  2131. port->channel = TDM_7;
  2132. } else {
  2133. pr_err("%s: unsupported channel in: %s\n",
  2134. __func__, kcontrol->id.name);
  2135. return -EINVAL;
  2136. }
  2137. } else {
  2138. return -EINVAL;
  2139. }
  2140. return 0;
  2141. }
  2142. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2143. struct snd_ctl_elem_value *ucontrol)
  2144. {
  2145. struct tdm_port port;
  2146. int ret = tdm_get_port_idx(kcontrol, &port);
  2147. if (ret) {
  2148. pr_err("%s: unsupported control: %s\n",
  2149. __func__, kcontrol->id.name);
  2150. } else {
  2151. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2152. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  2153. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2154. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2155. ucontrol->value.enumerated.item[0]);
  2156. }
  2157. return ret;
  2158. }
  2159. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2160. struct snd_ctl_elem_value *ucontrol)
  2161. {
  2162. struct tdm_port port;
  2163. int ret = tdm_get_port_idx(kcontrol, &port);
  2164. if (ret) {
  2165. pr_err("%s: unsupported control: %s\n",
  2166. __func__, kcontrol->id.name);
  2167. } else {
  2168. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  2169. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2170. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2171. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2172. ucontrol->value.enumerated.item[0]);
  2173. }
  2174. return ret;
  2175. }
  2176. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2177. struct snd_ctl_elem_value *ucontrol)
  2178. {
  2179. struct tdm_port port;
  2180. int ret = tdm_get_port_idx(kcontrol, &port);
  2181. if (ret) {
  2182. pr_err("%s: unsupported control: %s\n",
  2183. __func__, kcontrol->id.name);
  2184. } else {
  2185. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2186. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  2187. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2188. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2189. ucontrol->value.enumerated.item[0]);
  2190. }
  2191. return ret;
  2192. }
  2193. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2194. struct snd_ctl_elem_value *ucontrol)
  2195. {
  2196. struct tdm_port port;
  2197. int ret = tdm_get_port_idx(kcontrol, &port);
  2198. if (ret) {
  2199. pr_err("%s: unsupported control: %s\n",
  2200. __func__, kcontrol->id.name);
  2201. } else {
  2202. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  2203. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2204. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2205. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2206. ucontrol->value.enumerated.item[0]);
  2207. }
  2208. return ret;
  2209. }
  2210. static int tdm_get_format(int value)
  2211. {
  2212. int format = 0;
  2213. switch (value) {
  2214. case 0:
  2215. format = SNDRV_PCM_FORMAT_S16_LE;
  2216. break;
  2217. case 1:
  2218. format = SNDRV_PCM_FORMAT_S24_LE;
  2219. break;
  2220. case 2:
  2221. format = SNDRV_PCM_FORMAT_S32_LE;
  2222. break;
  2223. default:
  2224. format = SNDRV_PCM_FORMAT_S16_LE;
  2225. break;
  2226. }
  2227. return format;
  2228. }
  2229. static int tdm_get_format_val(int format)
  2230. {
  2231. int value = 0;
  2232. switch (format) {
  2233. case SNDRV_PCM_FORMAT_S16_LE:
  2234. value = 0;
  2235. break;
  2236. case SNDRV_PCM_FORMAT_S24_LE:
  2237. value = 1;
  2238. break;
  2239. case SNDRV_PCM_FORMAT_S32_LE:
  2240. value = 2;
  2241. break;
  2242. default:
  2243. value = 0;
  2244. break;
  2245. }
  2246. return value;
  2247. }
  2248. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  2249. struct snd_ctl_elem_value *ucontrol)
  2250. {
  2251. struct tdm_port port;
  2252. int ret = tdm_get_port_idx(kcontrol, &port);
  2253. if (ret) {
  2254. pr_err("%s: unsupported control: %s\n",
  2255. __func__, kcontrol->id.name);
  2256. } else {
  2257. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2258. tdm_rx_cfg[port.mode][port.channel].bit_format);
  2259. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2260. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2261. ucontrol->value.enumerated.item[0]);
  2262. }
  2263. return ret;
  2264. }
  2265. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  2266. struct snd_ctl_elem_value *ucontrol)
  2267. {
  2268. struct tdm_port port;
  2269. int ret = tdm_get_port_idx(kcontrol, &port);
  2270. if (ret) {
  2271. pr_err("%s: unsupported control: %s\n",
  2272. __func__, kcontrol->id.name);
  2273. } else {
  2274. tdm_rx_cfg[port.mode][port.channel].bit_format =
  2275. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2276. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2277. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2278. ucontrol->value.enumerated.item[0]);
  2279. }
  2280. return ret;
  2281. }
  2282. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  2283. struct snd_ctl_elem_value *ucontrol)
  2284. {
  2285. struct tdm_port port;
  2286. int ret = tdm_get_port_idx(kcontrol, &port);
  2287. if (ret) {
  2288. pr_err("%s: unsupported control: %s\n",
  2289. __func__, kcontrol->id.name);
  2290. } else {
  2291. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2292. tdm_tx_cfg[port.mode][port.channel].bit_format);
  2293. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2294. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2295. ucontrol->value.enumerated.item[0]);
  2296. }
  2297. return ret;
  2298. }
  2299. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  2300. struct snd_ctl_elem_value *ucontrol)
  2301. {
  2302. struct tdm_port port;
  2303. int ret = tdm_get_port_idx(kcontrol, &port);
  2304. if (ret) {
  2305. pr_err("%s: unsupported control: %s\n",
  2306. __func__, kcontrol->id.name);
  2307. } else {
  2308. tdm_tx_cfg[port.mode][port.channel].bit_format =
  2309. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2310. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2311. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2312. ucontrol->value.enumerated.item[0]);
  2313. }
  2314. return ret;
  2315. }
  2316. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  2317. struct snd_ctl_elem_value *ucontrol)
  2318. {
  2319. struct tdm_port port;
  2320. int ret = tdm_get_port_idx(kcontrol, &port);
  2321. if (ret) {
  2322. pr_err("%s: unsupported control: %s\n",
  2323. __func__, kcontrol->id.name);
  2324. } else {
  2325. ucontrol->value.enumerated.item[0] =
  2326. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  2327. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2328. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  2329. ucontrol->value.enumerated.item[0]);
  2330. }
  2331. return ret;
  2332. }
  2333. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  2334. struct snd_ctl_elem_value *ucontrol)
  2335. {
  2336. struct tdm_port port;
  2337. int ret = tdm_get_port_idx(kcontrol, &port);
  2338. if (ret) {
  2339. pr_err("%s: unsupported control: %s\n",
  2340. __func__, kcontrol->id.name);
  2341. } else {
  2342. tdm_rx_cfg[port.mode][port.channel].channels =
  2343. ucontrol->value.enumerated.item[0] + 1;
  2344. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2345. tdm_rx_cfg[port.mode][port.channel].channels,
  2346. ucontrol->value.enumerated.item[0] + 1);
  2347. }
  2348. return ret;
  2349. }
  2350. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  2351. struct snd_ctl_elem_value *ucontrol)
  2352. {
  2353. struct tdm_port port;
  2354. int ret = tdm_get_port_idx(kcontrol, &port);
  2355. if (ret) {
  2356. pr_err("%s: unsupported control: %s\n",
  2357. __func__, kcontrol->id.name);
  2358. } else {
  2359. ucontrol->value.enumerated.item[0] =
  2360. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  2361. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2362. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  2363. ucontrol->value.enumerated.item[0]);
  2364. }
  2365. return ret;
  2366. }
  2367. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  2368. struct snd_ctl_elem_value *ucontrol)
  2369. {
  2370. struct tdm_port port;
  2371. int ret = tdm_get_port_idx(kcontrol, &port);
  2372. if (ret) {
  2373. pr_err("%s: unsupported control: %s\n",
  2374. __func__, kcontrol->id.name);
  2375. } else {
  2376. tdm_tx_cfg[port.mode][port.channel].channels =
  2377. ucontrol->value.enumerated.item[0] + 1;
  2378. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2379. tdm_tx_cfg[port.mode][port.channel].channels,
  2380. ucontrol->value.enumerated.item[0] + 1);
  2381. }
  2382. return ret;
  2383. }
  2384. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  2385. {
  2386. int idx;
  2387. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  2388. sizeof("PRIM_AUX_PCM"))) {
  2389. idx = PRIM_AUX_PCM;
  2390. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  2391. sizeof("SEC_AUX_PCM"))) {
  2392. idx = SEC_AUX_PCM;
  2393. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  2394. sizeof("TERT_AUX_PCM"))) {
  2395. idx = TERT_AUX_PCM;
  2396. } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  2397. sizeof("QUAT_AUX_PCM"))) {
  2398. idx = QUAT_AUX_PCM;
  2399. } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
  2400. sizeof("QUIN_AUX_PCM"))) {
  2401. idx = QUIN_AUX_PCM;
  2402. } else {
  2403. pr_err("%s: unsupported port: %s\n",
  2404. __func__, kcontrol->id.name);
  2405. idx = -EINVAL;
  2406. }
  2407. return idx;
  2408. }
  2409. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2410. struct snd_ctl_elem_value *ucontrol)
  2411. {
  2412. int idx = aux_pcm_get_port_idx(kcontrol);
  2413. if (idx < 0)
  2414. return idx;
  2415. aux_pcm_rx_cfg[idx].sample_rate =
  2416. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2417. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2418. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2419. ucontrol->value.enumerated.item[0]);
  2420. return 0;
  2421. }
  2422. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2423. struct snd_ctl_elem_value *ucontrol)
  2424. {
  2425. int idx = aux_pcm_get_port_idx(kcontrol);
  2426. if (idx < 0)
  2427. return idx;
  2428. ucontrol->value.enumerated.item[0] =
  2429. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  2430. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2431. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2432. ucontrol->value.enumerated.item[0]);
  2433. return 0;
  2434. }
  2435. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2436. struct snd_ctl_elem_value *ucontrol)
  2437. {
  2438. int idx = aux_pcm_get_port_idx(kcontrol);
  2439. if (idx < 0)
  2440. return idx;
  2441. aux_pcm_tx_cfg[idx].sample_rate =
  2442. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2443. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2444. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2445. ucontrol->value.enumerated.item[0]);
  2446. return 0;
  2447. }
  2448. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2449. struct snd_ctl_elem_value *ucontrol)
  2450. {
  2451. int idx = aux_pcm_get_port_idx(kcontrol);
  2452. if (idx < 0)
  2453. return idx;
  2454. ucontrol->value.enumerated.item[0] =
  2455. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  2456. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2457. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2458. ucontrol->value.enumerated.item[0]);
  2459. return 0;
  2460. }
  2461. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  2462. {
  2463. int idx;
  2464. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  2465. sizeof("PRIM_MI2S_RX"))) {
  2466. idx = PRIM_MI2S;
  2467. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  2468. sizeof("SEC_MI2S_RX"))) {
  2469. idx = SEC_MI2S;
  2470. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  2471. sizeof("TERT_MI2S_RX"))) {
  2472. idx = TERT_MI2S;
  2473. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  2474. sizeof("QUAT_MI2S_RX"))) {
  2475. idx = QUAT_MI2S;
  2476. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
  2477. sizeof("QUIN_MI2S_RX"))) {
  2478. idx = QUIN_MI2S;
  2479. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  2480. sizeof("PRIM_MI2S_TX"))) {
  2481. idx = PRIM_MI2S;
  2482. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  2483. sizeof("SEC_MI2S_TX"))) {
  2484. idx = SEC_MI2S;
  2485. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  2486. sizeof("TERT_MI2S_TX"))) {
  2487. idx = TERT_MI2S;
  2488. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  2489. sizeof("QUAT_MI2S_TX"))) {
  2490. idx = QUAT_MI2S;
  2491. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
  2492. sizeof("QUIN_MI2S_TX"))) {
  2493. idx = QUIN_MI2S;
  2494. } else {
  2495. pr_err("%s: unsupported channel: %s\n",
  2496. __func__, kcontrol->id.name);
  2497. idx = -EINVAL;
  2498. }
  2499. return idx;
  2500. }
  2501. static int mi2s_get_sample_rate_val(int sample_rate)
  2502. {
  2503. int sample_rate_val;
  2504. switch (sample_rate) {
  2505. case SAMPLING_RATE_8KHZ:
  2506. sample_rate_val = 0;
  2507. break;
  2508. case SAMPLING_RATE_11P025KHZ:
  2509. sample_rate_val = 1;
  2510. break;
  2511. case SAMPLING_RATE_16KHZ:
  2512. sample_rate_val = 2;
  2513. break;
  2514. case SAMPLING_RATE_22P05KHZ:
  2515. sample_rate_val = 3;
  2516. break;
  2517. case SAMPLING_RATE_32KHZ:
  2518. sample_rate_val = 4;
  2519. break;
  2520. case SAMPLING_RATE_44P1KHZ:
  2521. sample_rate_val = 5;
  2522. break;
  2523. case SAMPLING_RATE_48KHZ:
  2524. sample_rate_val = 6;
  2525. break;
  2526. case SAMPLING_RATE_96KHZ:
  2527. sample_rate_val = 7;
  2528. break;
  2529. case SAMPLING_RATE_192KHZ:
  2530. sample_rate_val = 8;
  2531. break;
  2532. default:
  2533. sample_rate_val = 6;
  2534. break;
  2535. }
  2536. return sample_rate_val;
  2537. }
  2538. static int mi2s_get_sample_rate(int value)
  2539. {
  2540. int sample_rate;
  2541. switch (value) {
  2542. case 0:
  2543. sample_rate = SAMPLING_RATE_8KHZ;
  2544. break;
  2545. case 1:
  2546. sample_rate = SAMPLING_RATE_11P025KHZ;
  2547. break;
  2548. case 2:
  2549. sample_rate = SAMPLING_RATE_16KHZ;
  2550. break;
  2551. case 3:
  2552. sample_rate = SAMPLING_RATE_22P05KHZ;
  2553. break;
  2554. case 4:
  2555. sample_rate = SAMPLING_RATE_32KHZ;
  2556. break;
  2557. case 5:
  2558. sample_rate = SAMPLING_RATE_44P1KHZ;
  2559. break;
  2560. case 6:
  2561. sample_rate = SAMPLING_RATE_48KHZ;
  2562. break;
  2563. case 7:
  2564. sample_rate = SAMPLING_RATE_96KHZ;
  2565. break;
  2566. case 8:
  2567. sample_rate = SAMPLING_RATE_192KHZ;
  2568. break;
  2569. default:
  2570. sample_rate = SAMPLING_RATE_48KHZ;
  2571. break;
  2572. }
  2573. return sample_rate;
  2574. }
  2575. static int mi2s_auxpcm_get_format(int value)
  2576. {
  2577. int format;
  2578. switch (value) {
  2579. case 0:
  2580. format = SNDRV_PCM_FORMAT_S16_LE;
  2581. break;
  2582. case 1:
  2583. format = SNDRV_PCM_FORMAT_S24_LE;
  2584. break;
  2585. case 2:
  2586. format = SNDRV_PCM_FORMAT_S24_3LE;
  2587. break;
  2588. case 3:
  2589. format = SNDRV_PCM_FORMAT_S32_LE;
  2590. break;
  2591. default:
  2592. format = SNDRV_PCM_FORMAT_S16_LE;
  2593. break;
  2594. }
  2595. return format;
  2596. }
  2597. static int mi2s_auxpcm_get_format_value(int format)
  2598. {
  2599. int value;
  2600. switch (format) {
  2601. case SNDRV_PCM_FORMAT_S16_LE:
  2602. value = 0;
  2603. break;
  2604. case SNDRV_PCM_FORMAT_S24_LE:
  2605. value = 1;
  2606. break;
  2607. case SNDRV_PCM_FORMAT_S24_3LE:
  2608. value = 2;
  2609. break;
  2610. case SNDRV_PCM_FORMAT_S32_LE:
  2611. value = 3;
  2612. break;
  2613. default:
  2614. value = 0;
  2615. break;
  2616. }
  2617. return value;
  2618. }
  2619. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2620. struct snd_ctl_elem_value *ucontrol)
  2621. {
  2622. int idx = mi2s_get_port_idx(kcontrol);
  2623. if (idx < 0)
  2624. return idx;
  2625. mi2s_rx_cfg[idx].sample_rate =
  2626. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2627. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2628. idx, mi2s_rx_cfg[idx].sample_rate,
  2629. ucontrol->value.enumerated.item[0]);
  2630. return 0;
  2631. }
  2632. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2633. struct snd_ctl_elem_value *ucontrol)
  2634. {
  2635. int idx = mi2s_get_port_idx(kcontrol);
  2636. if (idx < 0)
  2637. return idx;
  2638. ucontrol->value.enumerated.item[0] =
  2639. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  2640. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2641. idx, mi2s_rx_cfg[idx].sample_rate,
  2642. ucontrol->value.enumerated.item[0]);
  2643. return 0;
  2644. }
  2645. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2646. struct snd_ctl_elem_value *ucontrol)
  2647. {
  2648. int idx = mi2s_get_port_idx(kcontrol);
  2649. if (idx < 0)
  2650. return idx;
  2651. mi2s_tx_cfg[idx].sample_rate =
  2652. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2653. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2654. idx, mi2s_tx_cfg[idx].sample_rate,
  2655. ucontrol->value.enumerated.item[0]);
  2656. return 0;
  2657. }
  2658. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2659. struct snd_ctl_elem_value *ucontrol)
  2660. {
  2661. int idx = mi2s_get_port_idx(kcontrol);
  2662. if (idx < 0)
  2663. return idx;
  2664. ucontrol->value.enumerated.item[0] =
  2665. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  2666. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2667. idx, mi2s_tx_cfg[idx].sample_rate,
  2668. ucontrol->value.enumerated.item[0]);
  2669. return 0;
  2670. }
  2671. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  2672. struct snd_ctl_elem_value *ucontrol)
  2673. {
  2674. int idx = mi2s_get_port_idx(kcontrol);
  2675. if (idx < 0)
  2676. return idx;
  2677. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2678. idx, mi2s_rx_cfg[idx].channels);
  2679. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  2680. return 0;
  2681. }
  2682. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  2683. struct snd_ctl_elem_value *ucontrol)
  2684. {
  2685. int idx = mi2s_get_port_idx(kcontrol);
  2686. if (idx < 0)
  2687. return idx;
  2688. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2689. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2690. idx, mi2s_rx_cfg[idx].channels);
  2691. return 1;
  2692. }
  2693. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  2694. struct snd_ctl_elem_value *ucontrol)
  2695. {
  2696. int idx = mi2s_get_port_idx(kcontrol);
  2697. if (idx < 0)
  2698. return idx;
  2699. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2700. idx, mi2s_tx_cfg[idx].channels);
  2701. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  2702. return 0;
  2703. }
  2704. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  2705. struct snd_ctl_elem_value *ucontrol)
  2706. {
  2707. int idx = mi2s_get_port_idx(kcontrol);
  2708. if (idx < 0)
  2709. return idx;
  2710. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2711. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2712. idx, mi2s_tx_cfg[idx].channels);
  2713. return 1;
  2714. }
  2715. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  2716. struct snd_ctl_elem_value *ucontrol)
  2717. {
  2718. int idx = mi2s_get_port_idx(kcontrol);
  2719. if (idx < 0)
  2720. return idx;
  2721. ucontrol->value.enumerated.item[0] =
  2722. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  2723. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2724. idx, mi2s_rx_cfg[idx].bit_format,
  2725. ucontrol->value.enumerated.item[0]);
  2726. return 0;
  2727. }
  2728. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  2729. struct snd_ctl_elem_value *ucontrol)
  2730. {
  2731. int idx = mi2s_get_port_idx(kcontrol);
  2732. if (idx < 0)
  2733. return idx;
  2734. mi2s_rx_cfg[idx].bit_format =
  2735. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2736. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2737. idx, mi2s_rx_cfg[idx].bit_format,
  2738. ucontrol->value.enumerated.item[0]);
  2739. return 0;
  2740. }
  2741. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  2742. struct snd_ctl_elem_value *ucontrol)
  2743. {
  2744. int idx = mi2s_get_port_idx(kcontrol);
  2745. if (idx < 0)
  2746. return idx;
  2747. ucontrol->value.enumerated.item[0] =
  2748. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  2749. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2750. idx, mi2s_tx_cfg[idx].bit_format,
  2751. ucontrol->value.enumerated.item[0]);
  2752. return 0;
  2753. }
  2754. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  2755. struct snd_ctl_elem_value *ucontrol)
  2756. {
  2757. int idx = mi2s_get_port_idx(kcontrol);
  2758. if (idx < 0)
  2759. return idx;
  2760. mi2s_tx_cfg[idx].bit_format =
  2761. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2762. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2763. idx, mi2s_tx_cfg[idx].bit_format,
  2764. ucontrol->value.enumerated.item[0]);
  2765. return 0;
  2766. }
  2767. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  2768. struct snd_ctl_elem_value *ucontrol)
  2769. {
  2770. int idx = aux_pcm_get_port_idx(kcontrol);
  2771. if (idx < 0)
  2772. return idx;
  2773. ucontrol->value.enumerated.item[0] =
  2774. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  2775. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2776. idx, aux_pcm_rx_cfg[idx].bit_format,
  2777. ucontrol->value.enumerated.item[0]);
  2778. return 0;
  2779. }
  2780. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  2781. struct snd_ctl_elem_value *ucontrol)
  2782. {
  2783. int idx = aux_pcm_get_port_idx(kcontrol);
  2784. if (idx < 0)
  2785. return idx;
  2786. aux_pcm_rx_cfg[idx].bit_format =
  2787. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2788. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2789. idx, aux_pcm_rx_cfg[idx].bit_format,
  2790. ucontrol->value.enumerated.item[0]);
  2791. return 0;
  2792. }
  2793. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  2794. struct snd_ctl_elem_value *ucontrol)
  2795. {
  2796. int idx = aux_pcm_get_port_idx(kcontrol);
  2797. if (idx < 0)
  2798. return idx;
  2799. ucontrol->value.enumerated.item[0] =
  2800. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  2801. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2802. idx, aux_pcm_tx_cfg[idx].bit_format,
  2803. ucontrol->value.enumerated.item[0]);
  2804. return 0;
  2805. }
  2806. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  2807. struct snd_ctl_elem_value *ucontrol)
  2808. {
  2809. int idx = aux_pcm_get_port_idx(kcontrol);
  2810. if (idx < 0)
  2811. return idx;
  2812. aux_pcm_tx_cfg[idx].bit_format =
  2813. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2814. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2815. idx, aux_pcm_tx_cfg[idx].bit_format,
  2816. ucontrol->value.enumerated.item[0]);
  2817. return 0;
  2818. }
  2819. static int msm_hifi_ctrl(struct snd_soc_codec *codec)
  2820. {
  2821. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  2822. struct snd_soc_card *card = codec->component.card;
  2823. struct msm_asoc_mach_data *pdata =
  2824. snd_soc_card_get_drvdata(card);
  2825. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
  2826. msm_hifi_control);
  2827. if (!pdata || !pdata->hph_en1_gpio_p) {
  2828. dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
  2829. return -EINVAL;
  2830. }
  2831. if (msm_hifi_control == MSM_HIFI_ON) {
  2832. msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
  2833. /* 5msec delay needed as per HW requirement */
  2834. usleep_range(5000, 5010);
  2835. } else {
  2836. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
  2837. }
  2838. snd_soc_dapm_sync(dapm);
  2839. return 0;
  2840. }
  2841. static int msm_hifi_get(struct snd_kcontrol *kcontrol,
  2842. struct snd_ctl_elem_value *ucontrol)
  2843. {
  2844. pr_debug("%s: msm_hifi_control = %d\n",
  2845. __func__, msm_hifi_control);
  2846. ucontrol->value.integer.value[0] = msm_hifi_control;
  2847. return 0;
  2848. }
  2849. static int msm_hifi_put(struct snd_kcontrol *kcontrol,
  2850. struct snd_ctl_elem_value *ucontrol)
  2851. {
  2852. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  2853. dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  2854. __func__, ucontrol->value.integer.value[0]);
  2855. msm_hifi_control = ucontrol->value.integer.value[0];
  2856. msm_hifi_ctrl(codec);
  2857. return 0;
  2858. }
  2859. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  2860. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  2861. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2862. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  2863. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2864. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  2865. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2866. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  2867. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2868. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  2869. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2870. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  2871. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2872. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  2873. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2874. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  2875. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2876. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  2877. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2878. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  2879. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2880. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  2881. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2882. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  2883. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2884. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  2885. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2886. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  2887. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2888. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  2889. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2890. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  2891. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2892. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  2893. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2894. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  2895. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2896. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  2897. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2898. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  2899. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2900. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  2901. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2902. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  2903. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2904. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  2905. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2906. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  2907. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2908. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  2909. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2910. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  2911. wsa_cdc_dma_rx_0_sample_rate,
  2912. cdc_dma_rx_sample_rate_get,
  2913. cdc_dma_rx_sample_rate_put),
  2914. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  2915. wsa_cdc_dma_rx_1_sample_rate,
  2916. cdc_dma_rx_sample_rate_get,
  2917. cdc_dma_rx_sample_rate_put),
  2918. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  2919. rx_cdc_dma_rx_0_sample_rate,
  2920. cdc_dma_rx_sample_rate_get,
  2921. cdc_dma_rx_sample_rate_put),
  2922. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  2923. rx_cdc_dma_rx_1_sample_rate,
  2924. cdc_dma_rx_sample_rate_get,
  2925. cdc_dma_rx_sample_rate_put),
  2926. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  2927. rx_cdc_dma_rx_2_sample_rate,
  2928. cdc_dma_rx_sample_rate_get,
  2929. cdc_dma_rx_sample_rate_put),
  2930. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  2931. rx_cdc_dma_rx_3_sample_rate,
  2932. cdc_dma_rx_sample_rate_get,
  2933. cdc_dma_rx_sample_rate_put),
  2934. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  2935. rx_cdc_dma_rx_5_sample_rate,
  2936. cdc_dma_rx_sample_rate_get,
  2937. cdc_dma_rx_sample_rate_put),
  2938. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  2939. wsa_cdc_dma_tx_0_sample_rate,
  2940. cdc_dma_tx_sample_rate_get,
  2941. cdc_dma_tx_sample_rate_put),
  2942. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  2943. wsa_cdc_dma_tx_1_sample_rate,
  2944. cdc_dma_tx_sample_rate_get,
  2945. cdc_dma_tx_sample_rate_put),
  2946. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  2947. wsa_cdc_dma_tx_2_sample_rate,
  2948. cdc_dma_tx_sample_rate_get,
  2949. cdc_dma_tx_sample_rate_put),
  2950. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  2951. tx_cdc_dma_tx_0_sample_rate,
  2952. cdc_dma_tx_sample_rate_get,
  2953. cdc_dma_tx_sample_rate_put),
  2954. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  2955. tx_cdc_dma_tx_3_sample_rate,
  2956. cdc_dma_tx_sample_rate_get,
  2957. cdc_dma_tx_sample_rate_put),
  2958. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  2959. tx_cdc_dma_tx_4_sample_rate,
  2960. cdc_dma_tx_sample_rate_get,
  2961. cdc_dma_tx_sample_rate_put),
  2962. };
  2963. static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
  2964. SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
  2965. slim_rx_ch_get, slim_rx_ch_put),
  2966. SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
  2967. slim_rx_ch_get, slim_rx_ch_put),
  2968. SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
  2969. slim_tx_ch_get, slim_tx_ch_put),
  2970. SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
  2971. slim_tx_ch_get, slim_tx_ch_put),
  2972. SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
  2973. slim_rx_ch_get, slim_rx_ch_put),
  2974. SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
  2975. slim_rx_ch_get, slim_rx_ch_put),
  2976. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  2977. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  2978. SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
  2979. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2980. SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
  2981. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2982. SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
  2983. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2984. SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
  2985. slim_tx_bit_format_get, slim_tx_bit_format_put),
  2986. SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
  2987. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2988. SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
  2989. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2990. SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
  2991. slim_tx_sample_rate_get, slim_tx_sample_rate_put),
  2992. SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
  2993. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2994. SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
  2995. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2996. };
  2997. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  2998. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  2999. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  3000. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  3001. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  3002. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  3003. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  3004. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  3005. proxy_rx_ch_get, proxy_rx_ch_put),
  3006. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  3007. usb_audio_rx_format_get, usb_audio_rx_format_put),
  3008. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  3009. usb_audio_tx_format_get, usb_audio_tx_format_put),
  3010. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  3011. ext_disp_rx_format_get, ext_disp_rx_format_put),
  3012. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  3013. usb_audio_rx_sample_rate_get,
  3014. usb_audio_rx_sample_rate_put),
  3015. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  3016. usb_audio_tx_sample_rate_get,
  3017. usb_audio_tx_sample_rate_put),
  3018. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  3019. ext_disp_rx_sample_rate_get,
  3020. ext_disp_rx_sample_rate_put),
  3021. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3022. tdm_rx_sample_rate_get,
  3023. tdm_rx_sample_rate_put),
  3024. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3025. tdm_tx_sample_rate_get,
  3026. tdm_tx_sample_rate_put),
  3027. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  3028. tdm_rx_format_get,
  3029. tdm_rx_format_put),
  3030. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  3031. tdm_tx_format_get,
  3032. tdm_tx_format_put),
  3033. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  3034. tdm_rx_ch_get,
  3035. tdm_rx_ch_put),
  3036. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  3037. tdm_tx_ch_get,
  3038. tdm_tx_ch_put),
  3039. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3040. tdm_rx_sample_rate_get,
  3041. tdm_rx_sample_rate_put),
  3042. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3043. tdm_tx_sample_rate_get,
  3044. tdm_tx_sample_rate_put),
  3045. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  3046. tdm_rx_format_get,
  3047. tdm_rx_format_put),
  3048. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  3049. tdm_tx_format_get,
  3050. tdm_tx_format_put),
  3051. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  3052. tdm_rx_ch_get,
  3053. tdm_rx_ch_put),
  3054. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  3055. tdm_tx_ch_get,
  3056. tdm_tx_ch_put),
  3057. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3058. tdm_rx_sample_rate_get,
  3059. tdm_rx_sample_rate_put),
  3060. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3061. tdm_tx_sample_rate_get,
  3062. tdm_tx_sample_rate_put),
  3063. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  3064. tdm_rx_format_get,
  3065. tdm_rx_format_put),
  3066. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  3067. tdm_tx_format_get,
  3068. tdm_tx_format_put),
  3069. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  3070. tdm_rx_ch_get,
  3071. tdm_rx_ch_put),
  3072. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  3073. tdm_tx_ch_get,
  3074. tdm_tx_ch_put),
  3075. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3076. tdm_rx_sample_rate_get,
  3077. tdm_rx_sample_rate_put),
  3078. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3079. tdm_tx_sample_rate_get,
  3080. tdm_tx_sample_rate_put),
  3081. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  3082. tdm_rx_format_get,
  3083. tdm_rx_format_put),
  3084. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  3085. tdm_tx_format_get,
  3086. tdm_tx_format_put),
  3087. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  3088. tdm_rx_ch_get,
  3089. tdm_rx_ch_put),
  3090. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  3091. tdm_tx_ch_get,
  3092. tdm_tx_ch_put),
  3093. SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3094. tdm_rx_sample_rate_get,
  3095. tdm_rx_sample_rate_put),
  3096. SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3097. tdm_tx_sample_rate_get,
  3098. tdm_tx_sample_rate_put),
  3099. SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
  3100. tdm_rx_format_get,
  3101. tdm_rx_format_put),
  3102. SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
  3103. tdm_tx_format_get,
  3104. tdm_tx_format_put),
  3105. SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
  3106. tdm_rx_ch_get,
  3107. tdm_rx_ch_put),
  3108. SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
  3109. tdm_tx_ch_get,
  3110. tdm_tx_ch_put),
  3111. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  3112. aux_pcm_rx_sample_rate_get,
  3113. aux_pcm_rx_sample_rate_put),
  3114. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  3115. aux_pcm_rx_sample_rate_get,
  3116. aux_pcm_rx_sample_rate_put),
  3117. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  3118. aux_pcm_rx_sample_rate_get,
  3119. aux_pcm_rx_sample_rate_put),
  3120. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  3121. aux_pcm_rx_sample_rate_get,
  3122. aux_pcm_rx_sample_rate_put),
  3123. SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
  3124. aux_pcm_rx_sample_rate_get,
  3125. aux_pcm_rx_sample_rate_put),
  3126. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  3127. aux_pcm_tx_sample_rate_get,
  3128. aux_pcm_tx_sample_rate_put),
  3129. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  3130. aux_pcm_tx_sample_rate_get,
  3131. aux_pcm_tx_sample_rate_put),
  3132. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  3133. aux_pcm_tx_sample_rate_get,
  3134. aux_pcm_tx_sample_rate_put),
  3135. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  3136. aux_pcm_tx_sample_rate_get,
  3137. aux_pcm_tx_sample_rate_put),
  3138. SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
  3139. aux_pcm_tx_sample_rate_get,
  3140. aux_pcm_tx_sample_rate_put),
  3141. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  3142. mi2s_rx_sample_rate_get,
  3143. mi2s_rx_sample_rate_put),
  3144. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  3145. mi2s_rx_sample_rate_get,
  3146. mi2s_rx_sample_rate_put),
  3147. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  3148. mi2s_rx_sample_rate_get,
  3149. mi2s_rx_sample_rate_put),
  3150. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  3151. mi2s_rx_sample_rate_get,
  3152. mi2s_rx_sample_rate_put),
  3153. SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
  3154. mi2s_rx_sample_rate_get,
  3155. mi2s_rx_sample_rate_put),
  3156. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  3157. mi2s_tx_sample_rate_get,
  3158. mi2s_tx_sample_rate_put),
  3159. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  3160. mi2s_tx_sample_rate_get,
  3161. mi2s_tx_sample_rate_put),
  3162. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  3163. mi2s_tx_sample_rate_get,
  3164. mi2s_tx_sample_rate_put),
  3165. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  3166. mi2s_tx_sample_rate_get,
  3167. mi2s_tx_sample_rate_put),
  3168. SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
  3169. mi2s_tx_sample_rate_get,
  3170. mi2s_tx_sample_rate_put),
  3171. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  3172. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3173. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  3174. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3175. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  3176. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3177. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  3178. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3179. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  3180. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3181. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  3182. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3183. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  3184. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3185. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  3186. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3187. SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
  3188. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3189. SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
  3190. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3191. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  3192. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3193. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  3194. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3195. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  3196. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3197. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  3198. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3199. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  3200. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3201. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  3202. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3203. SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
  3204. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3205. SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
  3206. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3207. SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
  3208. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3209. SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
  3210. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3211. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  3212. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3213. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  3214. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3215. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  3216. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3217. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  3218. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3219. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3220. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3221. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3222. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3223. SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3224. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3225. SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3226. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3227. SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
  3228. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3229. SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
  3230. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3231. SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
  3232. msm_hifi_put),
  3233. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  3234. msm_bt_sample_rate_get,
  3235. msm_bt_sample_rate_put),
  3236. };
  3237. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  3238. int enable, bool dapm)
  3239. {
  3240. int ret = 0;
  3241. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3242. ret = tavil_cdc_mclk_enable(codec, enable);
  3243. } else {
  3244. dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
  3245. __func__);
  3246. ret = -EINVAL;
  3247. }
  3248. return ret;
  3249. }
  3250. static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
  3251. int enable, bool dapm)
  3252. {
  3253. int ret = 0;
  3254. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3255. ret = tavil_cdc_mclk_tx_enable(codec, enable);
  3256. } else {
  3257. dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
  3258. __func__);
  3259. ret = -EINVAL;
  3260. }
  3261. return ret;
  3262. }
  3263. static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
  3264. struct snd_kcontrol *kcontrol, int event)
  3265. {
  3266. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3267. pr_debug("%s: event = %d\n", __func__, event);
  3268. switch (event) {
  3269. case SND_SOC_DAPM_PRE_PMU:
  3270. return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
  3271. case SND_SOC_DAPM_POST_PMD:
  3272. return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
  3273. }
  3274. return 0;
  3275. }
  3276. static int msm_mclk_event(struct snd_soc_dapm_widget *w,
  3277. struct snd_kcontrol *kcontrol, int event)
  3278. {
  3279. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3280. pr_debug("%s: event = %d\n", __func__, event);
  3281. switch (event) {
  3282. case SND_SOC_DAPM_PRE_PMU:
  3283. return msm_snd_enable_codec_ext_clk(codec, 1, true);
  3284. case SND_SOC_DAPM_POST_PMD:
  3285. return msm_snd_enable_codec_ext_clk(codec, 0, true);
  3286. }
  3287. return 0;
  3288. }
  3289. static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
  3290. struct snd_kcontrol *k, int event)
  3291. {
  3292. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3293. struct snd_soc_card *card = codec->component.card;
  3294. struct msm_asoc_mach_data *pdata =
  3295. snd_soc_card_get_drvdata(card);
  3296. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
  3297. __func__, msm_hifi_control);
  3298. if (!pdata || !pdata->hph_en0_gpio_p) {
  3299. dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
  3300. return -EINVAL;
  3301. }
  3302. if (msm_hifi_control != MSM_HIFI_ON) {
  3303. dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
  3304. __func__);
  3305. return 0;
  3306. }
  3307. switch (event) {
  3308. case SND_SOC_DAPM_POST_PMU:
  3309. msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
  3310. break;
  3311. case SND_SOC_DAPM_PRE_PMD:
  3312. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
  3313. break;
  3314. }
  3315. return 0;
  3316. }
  3317. static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
  3318. SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
  3319. msm_mclk_event,
  3320. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3321. SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
  3322. msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3323. SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
  3324. SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
  3325. SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
  3326. SND_SOC_DAPM_MIC("Handset Mic", NULL),
  3327. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  3328. SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
  3329. SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
  3330. SND_SOC_DAPM_MIC("Analog Mic5", NULL),
  3331. SND_SOC_DAPM_MIC("Digital Mic0", NULL),
  3332. SND_SOC_DAPM_MIC("Digital Mic1", NULL),
  3333. SND_SOC_DAPM_MIC("Digital Mic2", NULL),
  3334. SND_SOC_DAPM_MIC("Digital Mic3", NULL),
  3335. SND_SOC_DAPM_MIC("Digital Mic4", NULL),
  3336. SND_SOC_DAPM_MIC("Digital Mic5", NULL),
  3337. };
  3338. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3339. struct snd_kcontrol *kcontrol, int event)
  3340. {
  3341. struct msm_asoc_mach_data *pdata = NULL;
  3342. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3343. int ret = 0;
  3344. u32 dmic_idx;
  3345. int *dmic_gpio_cnt;
  3346. struct device_node *dmic_gpio;
  3347. char *wname;
  3348. wname = strpbrk(w->name, "0123");
  3349. if (!wname) {
  3350. dev_err(codec->dev, "%s: widget not found\n", __func__);
  3351. return -EINVAL;
  3352. }
  3353. ret = kstrtouint(wname, 10, &dmic_idx);
  3354. if (ret < 0) {
  3355. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  3356. __func__);
  3357. return -EINVAL;
  3358. }
  3359. pdata = snd_soc_card_get_drvdata(codec->component.card);
  3360. switch (dmic_idx) {
  3361. case 0:
  3362. case 1:
  3363. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3364. dmic_gpio = pdata->dmic01_gpio_p;
  3365. break;
  3366. case 2:
  3367. case 3:
  3368. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3369. dmic_gpio = pdata->dmic23_gpio_p;
  3370. break;
  3371. default:
  3372. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  3373. __func__);
  3374. return -EINVAL;
  3375. }
  3376. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3377. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3378. switch (event) {
  3379. case SND_SOC_DAPM_PRE_PMU:
  3380. (*dmic_gpio_cnt)++;
  3381. if (*dmic_gpio_cnt == 1) {
  3382. ret = msm_cdc_pinctrl_select_active_state(
  3383. dmic_gpio);
  3384. if (ret < 0) {
  3385. pr_err("%s: gpio set cannot be activated %sd",
  3386. __func__, "dmic_gpio");
  3387. return ret;
  3388. }
  3389. }
  3390. break;
  3391. case SND_SOC_DAPM_POST_PMD:
  3392. (*dmic_gpio_cnt)--;
  3393. if (*dmic_gpio_cnt == 0) {
  3394. ret = msm_cdc_pinctrl_select_sleep_state(
  3395. dmic_gpio);
  3396. if (ret < 0) {
  3397. pr_err("%s: gpio set cannot be de-activated %sd",
  3398. __func__, "dmic_gpio");
  3399. return ret;
  3400. }
  3401. }
  3402. break;
  3403. default:
  3404. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3405. return -EINVAL;
  3406. }
  3407. return 0;
  3408. }
  3409. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3410. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3411. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3412. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3413. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3414. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3415. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3416. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3417. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3418. };
  3419. static inline int param_is_mask(int p)
  3420. {
  3421. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  3422. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  3423. }
  3424. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  3425. int n)
  3426. {
  3427. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  3428. }
  3429. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  3430. unsigned int bit)
  3431. {
  3432. if (bit >= SNDRV_MASK_MAX)
  3433. return;
  3434. if (param_is_mask(n)) {
  3435. struct snd_mask *m = param_to_mask(p, n);
  3436. m->bits[0] = 0;
  3437. m->bits[1] = 0;
  3438. m->bits[bit >> 5] |= (1 << (bit & 31));
  3439. }
  3440. }
  3441. static int msm_slim_get_ch_from_beid(int32_t be_id)
  3442. {
  3443. int ch_id = 0;
  3444. switch (be_id) {
  3445. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3446. ch_id = SLIM_RX_0;
  3447. break;
  3448. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3449. ch_id = SLIM_RX_1;
  3450. break;
  3451. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3452. ch_id = SLIM_RX_2;
  3453. break;
  3454. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3455. ch_id = SLIM_RX_3;
  3456. break;
  3457. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3458. ch_id = SLIM_RX_4;
  3459. break;
  3460. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3461. ch_id = SLIM_RX_6;
  3462. break;
  3463. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3464. ch_id = SLIM_TX_0;
  3465. break;
  3466. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3467. ch_id = SLIM_TX_3;
  3468. break;
  3469. default:
  3470. ch_id = SLIM_RX_0;
  3471. break;
  3472. }
  3473. return ch_id;
  3474. }
  3475. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  3476. {
  3477. int idx = 0;
  3478. switch (be_id) {
  3479. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3480. idx = WSA_CDC_DMA_RX_0;
  3481. break;
  3482. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3483. idx = WSA_CDC_DMA_TX_0;
  3484. break;
  3485. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3486. idx = WSA_CDC_DMA_RX_1;
  3487. break;
  3488. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3489. idx = WSA_CDC_DMA_TX_1;
  3490. break;
  3491. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3492. idx = WSA_CDC_DMA_TX_2;
  3493. break;
  3494. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3495. idx = RX_CDC_DMA_RX_0;
  3496. break;
  3497. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3498. idx = RX_CDC_DMA_RX_1;
  3499. break;
  3500. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3501. idx = RX_CDC_DMA_RX_2;
  3502. break;
  3503. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3504. idx = RX_CDC_DMA_RX_3;
  3505. break;
  3506. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3507. idx = RX_CDC_DMA_RX_5;
  3508. break;
  3509. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3510. idx = TX_CDC_DMA_TX_0;
  3511. break;
  3512. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3513. idx = TX_CDC_DMA_TX_3;
  3514. break;
  3515. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3516. idx = TX_CDC_DMA_TX_4;
  3517. break;
  3518. default:
  3519. idx = RX_CDC_DMA_RX_0;
  3520. break;
  3521. }
  3522. return idx;
  3523. }
  3524. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  3525. {
  3526. int idx = -EINVAL;
  3527. switch (be_id) {
  3528. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3529. idx = DP_RX_IDX;
  3530. break;
  3531. default:
  3532. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  3533. idx = -EINVAL;
  3534. break;
  3535. }
  3536. return idx;
  3537. }
  3538. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3539. struct snd_pcm_hw_params *params)
  3540. {
  3541. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3542. struct snd_interval *rate = hw_param_interval(params,
  3543. SNDRV_PCM_HW_PARAM_RATE);
  3544. struct snd_interval *channels = hw_param_interval(params,
  3545. SNDRV_PCM_HW_PARAM_CHANNELS);
  3546. int rc = 0;
  3547. int idx;
  3548. void *config = NULL;
  3549. struct snd_soc_codec *codec = NULL;
  3550. pr_debug("%s: format = %d, rate = %d\n",
  3551. __func__, params_format(params), params_rate(params));
  3552. switch (dai_link->id) {
  3553. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3554. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3555. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3556. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3557. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3558. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3559. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3560. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3561. slim_rx_cfg[idx].bit_format);
  3562. rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
  3563. channels->min = channels->max = slim_rx_cfg[idx].channels;
  3564. break;
  3565. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3566. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3567. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3568. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3569. slim_tx_cfg[idx].bit_format);
  3570. rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
  3571. channels->min = channels->max = slim_tx_cfg[idx].channels;
  3572. break;
  3573. case MSM_BACKEND_DAI_SLIMBUS_1_TX:
  3574. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3575. slim_tx_cfg[1].bit_format);
  3576. rate->min = rate->max = slim_tx_cfg[1].sample_rate;
  3577. channels->min = channels->max = slim_tx_cfg[1].channels;
  3578. break;
  3579. case MSM_BACKEND_DAI_SLIMBUS_4_TX:
  3580. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3581. SNDRV_PCM_FORMAT_S32_LE);
  3582. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3583. channels->min = channels->max = msm_vi_feed_tx_ch;
  3584. break;
  3585. case MSM_BACKEND_DAI_SLIMBUS_5_RX:
  3586. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3587. slim_rx_cfg[5].bit_format);
  3588. rate->min = rate->max = slim_rx_cfg[5].sample_rate;
  3589. channels->min = channels->max = slim_rx_cfg[5].channels;
  3590. break;
  3591. case MSM_BACKEND_DAI_SLIMBUS_5_TX:
  3592. codec = rtd->codec;
  3593. rate->min = rate->max = SAMPLING_RATE_16KHZ;
  3594. channels->min = channels->max = 1;
  3595. config = msm_codec_fn.get_afe_config_fn(codec,
  3596. AFE_SLIMBUS_SLAVE_PORT_CONFIG);
  3597. if (config) {
  3598. rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
  3599. config, SLIMBUS_5_TX);
  3600. if (rc)
  3601. pr_err("%s: Failed to set slimbus slave port config %d\n",
  3602. __func__, rc);
  3603. }
  3604. break;
  3605. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3606. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3607. slim_rx_cfg[SLIM_RX_7].bit_format);
  3608. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3609. channels->min = channels->max =
  3610. slim_rx_cfg[SLIM_RX_7].channels;
  3611. break;
  3612. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3613. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3614. channels->min = channels->max =
  3615. slim_tx_cfg[SLIM_TX_7].channels;
  3616. break;
  3617. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3618. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3619. channels->min = channels->max =
  3620. slim_tx_cfg[SLIM_TX_8].channels;
  3621. break;
  3622. case MSM_BACKEND_DAI_USB_RX:
  3623. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3624. usb_rx_cfg.bit_format);
  3625. rate->min = rate->max = usb_rx_cfg.sample_rate;
  3626. channels->min = channels->max = usb_rx_cfg.channels;
  3627. break;
  3628. case MSM_BACKEND_DAI_USB_TX:
  3629. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3630. usb_tx_cfg.bit_format);
  3631. rate->min = rate->max = usb_tx_cfg.sample_rate;
  3632. channels->min = channels->max = usb_tx_cfg.channels;
  3633. break;
  3634. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3635. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  3636. if (idx < 0) {
  3637. pr_err("%s: Incorrect ext disp idx %d\n",
  3638. __func__, idx);
  3639. rc = idx;
  3640. goto done;
  3641. }
  3642. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3643. ext_disp_rx_cfg[idx].bit_format);
  3644. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  3645. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  3646. break;
  3647. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3648. channels->min = channels->max = proxy_rx_cfg.channels;
  3649. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3650. break;
  3651. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3652. channels->min = channels->max =
  3653. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3654. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3655. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3656. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3657. break;
  3658. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3659. channels->min = channels->max =
  3660. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3661. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3662. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3663. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3664. break;
  3665. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3666. channels->min = channels->max =
  3667. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3668. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3669. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3670. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3671. break;
  3672. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3673. channels->min = channels->max =
  3674. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3675. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3676. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3677. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3678. break;
  3679. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3680. channels->min = channels->max =
  3681. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3682. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3683. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3684. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3685. break;
  3686. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3687. channels->min = channels->max =
  3688. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3689. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3690. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3691. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3692. break;
  3693. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  3694. channels->min = channels->max =
  3695. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3696. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3697. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  3698. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3699. break;
  3700. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  3701. channels->min = channels->max =
  3702. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  3703. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3704. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  3705. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3706. break;
  3707. case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
  3708. channels->min = channels->max =
  3709. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  3710. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3711. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  3712. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3713. break;
  3714. case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
  3715. channels->min = channels->max =
  3716. tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  3717. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3718. tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
  3719. rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3720. break;
  3721. case MSM_BACKEND_DAI_AUXPCM_RX:
  3722. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3723. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3724. rate->min = rate->max =
  3725. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3726. channels->min = channels->max =
  3727. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3728. break;
  3729. case MSM_BACKEND_DAI_AUXPCM_TX:
  3730. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3731. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3732. rate->min = rate->max =
  3733. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3734. channels->min = channels->max =
  3735. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3736. break;
  3737. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3738. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3739. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3740. rate->min = rate->max =
  3741. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3742. channels->min = channels->max =
  3743. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3744. break;
  3745. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3746. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3747. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3748. rate->min = rate->max =
  3749. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3750. channels->min = channels->max =
  3751. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3752. break;
  3753. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3754. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3755. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3756. rate->min = rate->max =
  3757. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3758. channels->min = channels->max =
  3759. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3760. break;
  3761. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3762. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3763. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3764. rate->min = rate->max =
  3765. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3766. channels->min = channels->max =
  3767. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3768. break;
  3769. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  3770. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3771. aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
  3772. rate->min = rate->max =
  3773. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  3774. channels->min = channels->max =
  3775. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  3776. break;
  3777. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  3778. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3779. aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
  3780. rate->min = rate->max =
  3781. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  3782. channels->min = channels->max =
  3783. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  3784. break;
  3785. case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
  3786. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3787. aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
  3788. rate->min = rate->max =
  3789. aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
  3790. channels->min = channels->max =
  3791. aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
  3792. break;
  3793. case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
  3794. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3795. aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
  3796. rate->min = rate->max =
  3797. aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
  3798. channels->min = channels->max =
  3799. aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
  3800. break;
  3801. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3802. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3803. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  3804. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  3805. channels->min = channels->max =
  3806. mi2s_rx_cfg[PRIM_MI2S].channels;
  3807. break;
  3808. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3809. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3810. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  3811. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  3812. channels->min = channels->max =
  3813. mi2s_tx_cfg[PRIM_MI2S].channels;
  3814. break;
  3815. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3816. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3817. mi2s_rx_cfg[SEC_MI2S].bit_format);
  3818. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  3819. channels->min = channels->max =
  3820. mi2s_rx_cfg[SEC_MI2S].channels;
  3821. break;
  3822. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3823. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3824. mi2s_tx_cfg[SEC_MI2S].bit_format);
  3825. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  3826. channels->min = channels->max =
  3827. mi2s_tx_cfg[SEC_MI2S].channels;
  3828. break;
  3829. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  3830. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3831. mi2s_rx_cfg[TERT_MI2S].bit_format);
  3832. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  3833. channels->min = channels->max =
  3834. mi2s_rx_cfg[TERT_MI2S].channels;
  3835. break;
  3836. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  3837. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3838. mi2s_tx_cfg[TERT_MI2S].bit_format);
  3839. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  3840. channels->min = channels->max =
  3841. mi2s_tx_cfg[TERT_MI2S].channels;
  3842. break;
  3843. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  3844. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3845. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  3846. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  3847. channels->min = channels->max =
  3848. mi2s_rx_cfg[QUAT_MI2S].channels;
  3849. break;
  3850. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  3851. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3852. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  3853. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  3854. channels->min = channels->max =
  3855. mi2s_tx_cfg[QUAT_MI2S].channels;
  3856. break;
  3857. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  3858. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3859. mi2s_rx_cfg[QUIN_MI2S].bit_format);
  3860. rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
  3861. channels->min = channels->max =
  3862. mi2s_rx_cfg[QUIN_MI2S].channels;
  3863. break;
  3864. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  3865. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3866. mi2s_tx_cfg[QUIN_MI2S].bit_format);
  3867. rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
  3868. channels->min = channels->max =
  3869. mi2s_tx_cfg[QUIN_MI2S].channels;
  3870. break;
  3871. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3872. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3873. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3874. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3875. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3876. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3877. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3878. cdc_dma_rx_cfg[idx].bit_format);
  3879. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  3880. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  3881. break;
  3882. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3883. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3884. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3885. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_1:
  3886. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3887. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3888. cdc_dma_tx_cfg[idx].bit_format);
  3889. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  3890. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  3891. break;
  3892. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3893. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3894. SNDRV_PCM_FORMAT_S32_LE);
  3895. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3896. channels->min = channels->max = msm_vi_feed_tx_ch;
  3897. break;
  3898. default:
  3899. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3900. break;
  3901. }
  3902. done:
  3903. return rc;
  3904. }
  3905. static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  3906. {
  3907. int value = 0;
  3908. bool ret = 0;
  3909. struct snd_soc_card *card = codec->component.card;
  3910. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3911. struct pinctrl_state *en2_pinctrl_active;
  3912. struct pinctrl_state *en2_pinctrl_sleep;
  3913. if (!pdata->usbc_en2_gpio_p) {
  3914. if (active) {
  3915. /* if active and usbc_en2_gpio undefined, get pin */
  3916. pdata->usbc_en2_gpio_p = devm_pinctrl_get(card->dev);
  3917. if (IS_ERR_OR_NULL(pdata->usbc_en2_gpio_p)) {
  3918. dev_err(card->dev,
  3919. "%s: Can't get EN2 gpio pinctrl:%ld\n",
  3920. __func__,
  3921. PTR_ERR(pdata->usbc_en2_gpio_p));
  3922. pdata->usbc_en2_gpio_p = NULL;
  3923. return false;
  3924. }
  3925. } else {
  3926. /* if not active and usbc_en2_gpio undefined, return */
  3927. return false;
  3928. }
  3929. }
  3930. pdata->usbc_en2_gpio = of_get_named_gpio(card->dev->of_node,
  3931. "qcom,usbc-analog-en2-gpio", 0);
  3932. if (!gpio_is_valid(pdata->usbc_en2_gpio)) {
  3933. dev_err(card->dev, "%s, property %s not in node %s",
  3934. __func__, "qcom,usbc-analog-en2-gpio",
  3935. card->dev->of_node->full_name);
  3936. return false;
  3937. }
  3938. en2_pinctrl_active = pinctrl_lookup_state(
  3939. pdata->usbc_en2_gpio_p, "aud_active");
  3940. if (IS_ERR_OR_NULL(en2_pinctrl_active)) {
  3941. dev_err(card->dev,
  3942. "%s: Cannot get aud_active pinctrl state:%ld\n",
  3943. __func__, PTR_ERR(en2_pinctrl_active));
  3944. ret = false;
  3945. goto err_lookup_state;
  3946. }
  3947. en2_pinctrl_sleep = pinctrl_lookup_state(
  3948. pdata->usbc_en2_gpio_p, "aud_sleep");
  3949. if (IS_ERR_OR_NULL(en2_pinctrl_sleep)) {
  3950. dev_err(card->dev,
  3951. "%s: Cannot get aud_sleep pinctrl state:%ld\n",
  3952. __func__, PTR_ERR(en2_pinctrl_sleep));
  3953. ret = false;
  3954. goto err_lookup_state;
  3955. }
  3956. /* if active and usbc_en2_gpio_p defined, swap using usbc_en2_gpio_p */
  3957. if (active) {
  3958. dev_dbg(codec->dev, "%s: enter\n", __func__);
  3959. if (pdata->usbc_en2_gpio_p) {
  3960. value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
  3961. if (value)
  3962. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  3963. en2_pinctrl_sleep);
  3964. else
  3965. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  3966. en2_pinctrl_active);
  3967. } else if (pdata->usbc_en2_gpio >= 0) {
  3968. value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
  3969. gpio_set_value_cansleep(pdata->usbc_en2_gpio, !value);
  3970. }
  3971. pr_debug("%s: swap select switch %d to %d\n", __func__,
  3972. value, !value);
  3973. ret = true;
  3974. } else {
  3975. /* if not active, release usbc_en2_gpio_p pin */
  3976. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  3977. en2_pinctrl_sleep);
  3978. }
  3979. err_lookup_state:
  3980. devm_pinctrl_put(pdata->usbc_en2_gpio_p);
  3981. pdata->usbc_en2_gpio_p = NULL;
  3982. return ret;
  3983. }
  3984. static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  3985. {
  3986. int value = 0;
  3987. bool ret = false;
  3988. struct snd_soc_card *card;
  3989. struct msm_asoc_mach_data *pdata;
  3990. if (!codec) {
  3991. pr_err("%s codec is NULL\n", __func__);
  3992. return false;
  3993. }
  3994. card = codec->component.card;
  3995. pdata = snd_soc_card_get_drvdata(card);
  3996. if (!pdata)
  3997. return false;
  3998. if (wcd_mbhc_cfg.enable_usbc_analog)
  3999. return msm_usbc_swap_gnd_mic(codec, active);
  4000. /* if usbc is not defined, swap using us_euro_gpio_p */
  4001. if (pdata->us_euro_gpio_p) {
  4002. value = msm_cdc_pinctrl_get_state(
  4003. pdata->us_euro_gpio_p);
  4004. if (value)
  4005. msm_cdc_pinctrl_select_sleep_state(
  4006. pdata->us_euro_gpio_p);
  4007. else
  4008. msm_cdc_pinctrl_select_active_state(
  4009. pdata->us_euro_gpio_p);
  4010. dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
  4011. __func__, value, !value);
  4012. ret = true;
  4013. }
  4014. return ret;
  4015. }
  4016. static int msm_afe_set_config(struct snd_soc_codec *codec)
  4017. {
  4018. int ret = 0;
  4019. void *config_data = NULL;
  4020. if (!msm_codec_fn.get_afe_config_fn) {
  4021. dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
  4022. __func__);
  4023. return -EINVAL;
  4024. }
  4025. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4026. AFE_CDC_REGISTERS_CONFIG);
  4027. if (config_data) {
  4028. ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
  4029. if (ret) {
  4030. dev_err(codec->dev,
  4031. "%s: Failed to set codec registers config %d\n",
  4032. __func__, ret);
  4033. return ret;
  4034. }
  4035. }
  4036. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4037. AFE_CDC_REGISTER_PAGE_CONFIG);
  4038. if (config_data) {
  4039. ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
  4040. 0);
  4041. if (ret)
  4042. dev_err(codec->dev,
  4043. "%s: Failed to set cdc register page config\n",
  4044. __func__);
  4045. }
  4046. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4047. AFE_SLIMBUS_SLAVE_CONFIG);
  4048. if (config_data) {
  4049. ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
  4050. if (ret) {
  4051. dev_err(codec->dev,
  4052. "%s: Failed to set slimbus slave config %d\n",
  4053. __func__, ret);
  4054. return ret;
  4055. }
  4056. }
  4057. return 0;
  4058. }
  4059. static void msm_afe_clear_config(void)
  4060. {
  4061. afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
  4062. afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
  4063. }
  4064. static int msm_adsp_power_up_config(struct snd_soc_codec *codec,
  4065. struct snd_card *card)
  4066. {
  4067. int ret = 0;
  4068. unsigned long timeout;
  4069. int adsp_ready = 0;
  4070. bool snd_card_online = 0;
  4071. timeout = jiffies +
  4072. msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
  4073. do {
  4074. if (!snd_card_online) {
  4075. snd_card_online = snd_card_is_online_state(card);
  4076. pr_debug("%s: Sound card is %s\n", __func__,
  4077. snd_card_online ? "Online" : "Offline");
  4078. }
  4079. if (!adsp_ready) {
  4080. adsp_ready = q6core_is_adsp_ready();
  4081. pr_debug("%s: ADSP Audio is %s\n", __func__,
  4082. adsp_ready ? "ready" : "not ready");
  4083. }
  4084. if (snd_card_online && adsp_ready)
  4085. break;
  4086. /*
  4087. * Sound card/ADSP will be coming up after subsystem restart and
  4088. * it might not be fully up when the control reaches
  4089. * here. So, wait for 50msec before checking ADSP state
  4090. */
  4091. msleep(50);
  4092. } while (time_after(timeout, jiffies));
  4093. if (!snd_card_online || !adsp_ready) {
  4094. pr_err("%s: Timeout. Sound card is %s, ADSP Audio is %s\n",
  4095. __func__,
  4096. snd_card_online ? "Online" : "Offline",
  4097. adsp_ready ? "ready" : "not ready");
  4098. ret = -ETIMEDOUT;
  4099. goto err;
  4100. }
  4101. ret = msm_afe_set_config(codec);
  4102. if (ret)
  4103. pr_err("%s: Failed to set AFE config. err %d\n",
  4104. __func__, ret);
  4105. return 0;
  4106. err:
  4107. return ret;
  4108. }
  4109. static int sm6150_notifier_service_cb(struct notifier_block *this,
  4110. unsigned long opcode, void *ptr)
  4111. {
  4112. int ret;
  4113. struct snd_soc_card *card = NULL;
  4114. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  4115. struct snd_soc_pcm_runtime *rtd;
  4116. struct snd_soc_codec *codec;
  4117. pr_debug("%s: Service opcode 0x%lx\n", __func__, opcode);
  4118. switch (opcode) {
  4119. case AUDIO_NOTIFIER_SERVICE_DOWN:
  4120. /*
  4121. * Use flag to ignore initial boot notifications
  4122. * On initial boot msm_adsp_power_up_config is
  4123. * called on init. There is no need to clear
  4124. * and set the config again on initial boot.
  4125. */
  4126. if (is_initial_boot)
  4127. break;
  4128. msm_afe_clear_config();
  4129. break;
  4130. case AUDIO_NOTIFIER_SERVICE_UP:
  4131. if (is_initial_boot) {
  4132. is_initial_boot = false;
  4133. break;
  4134. }
  4135. if (!spdev)
  4136. return -EINVAL;
  4137. card = platform_get_drvdata(spdev);
  4138. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  4139. if (!rtd) {
  4140. dev_err(card->dev,
  4141. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  4142. __func__, be_dl_name);
  4143. ret = -EINVAL;
  4144. goto err;
  4145. }
  4146. codec = rtd->codec;
  4147. ret = msm_adsp_power_up_config(codec, card->snd_card);
  4148. if (ret < 0) {
  4149. dev_err(card->dev,
  4150. "%s: msm_adsp_power_up_config failed ret = %d!\n",
  4151. __func__, ret);
  4152. goto err;
  4153. }
  4154. break;
  4155. default:
  4156. break;
  4157. }
  4158. err:
  4159. return NOTIFY_OK;
  4160. }
  4161. static struct notifier_block service_nb = {
  4162. .notifier_call = sm6150_notifier_service_cb,
  4163. .priority = -INT_MAX,
  4164. };
  4165. static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
  4166. {
  4167. int ret = 0;
  4168. void *config_data;
  4169. struct snd_soc_codec *codec = rtd->codec;
  4170. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4171. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4172. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4173. struct snd_soc_component *aux_comp;
  4174. struct snd_card *card;
  4175. struct snd_info_entry *entry;
  4176. struct msm_asoc_mach_data *pdata =
  4177. snd_soc_card_get_drvdata(rtd->card);
  4178. /*
  4179. * Codec SLIMBUS configuration
  4180. * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
  4181. * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
  4182. * TX14, TX15, TX16
  4183. */
  4184. unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
  4185. 150, 151};
  4186. unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
  4187. 134, 135, 136, 137, 138, 139,
  4188. 140, 141, 142, 143};
  4189. pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
  4190. rtd->pmdown_time = 0;
  4191. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  4192. ARRAY_SIZE(msm_tavil_snd_controls));
  4193. if (ret < 0) {
  4194. pr_err("%s: add_codec_controls failed, err %d\n",
  4195. __func__, ret);
  4196. return ret;
  4197. }
  4198. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4199. ARRAY_SIZE(msm_common_snd_controls));
  4200. if (ret < 0) {
  4201. pr_err("%s: add_codec_controls failed, err %d\n",
  4202. __func__, ret);
  4203. return ret;
  4204. }
  4205. snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
  4206. ARRAY_SIZE(msm_dapm_widgets_tavil));
  4207. snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
  4208. ARRAY_SIZE(wcd_audio_paths_tavil));
  4209. snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
  4210. snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
  4211. snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
  4212. snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
  4213. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4214. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4215. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4216. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4217. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  4218. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  4219. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
  4220. snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
  4221. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
  4222. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
  4223. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
  4224. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4225. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
  4226. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
  4227. snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
  4228. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  4229. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  4230. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4231. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4232. snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
  4233. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
  4234. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
  4235. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
  4236. snd_soc_dapm_sync(dapm);
  4237. snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4238. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4239. msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
  4240. ret = msm_adsp_power_up_config(codec, rtd->card->snd_card);
  4241. if (ret) {
  4242. pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
  4243. goto err;
  4244. }
  4245. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4246. AFE_AANC_VERSION);
  4247. if (config_data) {
  4248. ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
  4249. if (ret) {
  4250. pr_err("%s: Failed to set aanc version %d\n",
  4251. __func__, ret);
  4252. goto err;
  4253. }
  4254. }
  4255. /*
  4256. * Send speaker configuration only for WSA8810.
  4257. * Default configuration is for WSA8815.
  4258. */
  4259. pr_debug("%s: Number of aux devices: %d\n",
  4260. __func__, rtd->card->num_aux_devs);
  4261. if (rtd->card->num_aux_devs &&
  4262. !list_empty(&rtd->card->aux_comp_list)) {
  4263. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  4264. struct snd_soc_component, card_aux_list);
  4265. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4266. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4267. tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
  4268. tavil_set_spkr_gain_offset(rtd->codec,
  4269. WCD934X_RX_GAIN_OFFSET_M1P5_DB);
  4270. }
  4271. }
  4272. card = rtd->card->snd_card;
  4273. entry = snd_info_create_subdir(card->module, "codecs",
  4274. card->proc_root);
  4275. if (!entry) {
  4276. pr_debug("%s: Cannot create codecs module entry\n",
  4277. __func__);
  4278. ret = 0;
  4279. goto err;
  4280. }
  4281. pdata->codec_root = entry;
  4282. tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
  4283. codec_reg_done = true;
  4284. return 0;
  4285. err:
  4286. return ret;
  4287. }
  4288. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  4289. {
  4290. int ret = 0;
  4291. struct snd_soc_codec *codec = rtd->codec;
  4292. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4293. struct snd_card *card;
  4294. struct snd_info_entry *entry;
  4295. struct snd_soc_component *aux_comp;
  4296. struct msm_asoc_mach_data *pdata =
  4297. snd_soc_card_get_drvdata(rtd->card);
  4298. ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
  4299. ARRAY_SIZE(msm_int_snd_controls));
  4300. if (ret < 0) {
  4301. pr_err("%s: add_codec_controls failed: %d\n",
  4302. __func__, ret);
  4303. return ret;
  4304. }
  4305. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4306. ARRAY_SIZE(msm_common_snd_controls));
  4307. if (ret < 0) {
  4308. pr_err("%s: add common snd controls failed: %d\n",
  4309. __func__, ret);
  4310. return ret;
  4311. }
  4312. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  4313. ARRAY_SIZE(msm_int_dapm_widgets));
  4314. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4315. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4316. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4317. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4318. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  4319. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  4320. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  4321. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  4322. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  4323. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  4324. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  4325. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  4326. snd_soc_dapm_sync(dapm);
  4327. /*
  4328. * Send speaker configuration only for WSA8810.
  4329. * Default configuration is for WSA8815.
  4330. */
  4331. dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
  4332. __func__, rtd->card->num_aux_devs);
  4333. if (rtd->card->num_aux_devs &&
  4334. !list_empty(&rtd->card->component_dev_list)) {
  4335. aux_comp = list_first_entry(
  4336. &rtd->card->component_dev_list,
  4337. struct snd_soc_component,
  4338. card_aux_list);
  4339. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4340. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4341. wsa_macro_set_spkr_mode(rtd->codec,
  4342. WSA_MACRO_SPKR_MODE_1);
  4343. wsa_macro_set_spkr_gain_offset(rtd->codec,
  4344. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  4345. }
  4346. }
  4347. card = rtd->card->snd_card;
  4348. entry = snd_info_create_subdir(card->module, "codecs",
  4349. card->proc_root);
  4350. if (!entry) {
  4351. pr_debug("%s: Cannot create codecs module entry\n",
  4352. __func__);
  4353. ret = 0;
  4354. goto err;
  4355. }
  4356. pdata->codec_root = entry;
  4357. bolero_info_create_codec_entry(pdata->codec_root, codec);
  4358. codec_reg_done = true;
  4359. return 0;
  4360. err:
  4361. return ret;
  4362. }
  4363. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  4364. {
  4365. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  4366. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  4367. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4368. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4369. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4370. }
  4371. static void *def_wcd_mbhc_cal(void)
  4372. {
  4373. void *wcd_mbhc_cal;
  4374. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  4375. u16 *btn_high;
  4376. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  4377. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  4378. if (!wcd_mbhc_cal)
  4379. return NULL;
  4380. #define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
  4381. S(v_hs_max, 1600);
  4382. #undef S
  4383. #define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
  4384. S(num_btn, WCD_MBHC_DEF_BUTTONS);
  4385. #undef S
  4386. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  4387. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  4388. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  4389. btn_high[0] = 75;
  4390. btn_high[1] = 150;
  4391. btn_high[2] = 237;
  4392. btn_high[3] = 500;
  4393. btn_high[4] = 500;
  4394. btn_high[5] = 500;
  4395. btn_high[6] = 500;
  4396. btn_high[7] = 500;
  4397. return wcd_mbhc_cal;
  4398. }
  4399. static int msm_snd_hw_params(struct snd_pcm_substream *substream,
  4400. struct snd_pcm_hw_params *params)
  4401. {
  4402. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4403. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4404. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4405. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4406. int ret = 0;
  4407. u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4408. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4409. u32 user_set_tx_ch = 0;
  4410. u32 rx_ch_count;
  4411. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4412. ret = snd_soc_dai_get_channel_map(codec_dai,
  4413. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4414. if (ret < 0) {
  4415. pr_err("%s: failed to get codec chan map, err:%d\n",
  4416. __func__, ret);
  4417. goto err;
  4418. }
  4419. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
  4420. pr_debug("%s: rx_5_ch=%d\n", __func__,
  4421. slim_rx_cfg[5].channels);
  4422. rx_ch_count = slim_rx_cfg[5].channels;
  4423. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
  4424. pr_debug("%s: rx_2_ch=%d\n", __func__,
  4425. slim_rx_cfg[2].channels);
  4426. rx_ch_count = slim_rx_cfg[2].channels;
  4427. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
  4428. pr_debug("%s: rx_6_ch=%d\n", __func__,
  4429. slim_rx_cfg[6].channels);
  4430. rx_ch_count = slim_rx_cfg[6].channels;
  4431. } else {
  4432. pr_debug("%s: rx_0_ch=%d\n", __func__,
  4433. slim_rx_cfg[0].channels);
  4434. rx_ch_count = slim_rx_cfg[0].channels;
  4435. }
  4436. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4437. rx_ch_count, rx_ch);
  4438. if (ret < 0) {
  4439. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4440. __func__, ret);
  4441. goto err;
  4442. }
  4443. } else {
  4444. pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
  4445. codec_dai->name, codec_dai->id, user_set_tx_ch);
  4446. ret = snd_soc_dai_get_channel_map(codec_dai,
  4447. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4448. if (ret < 0) {
  4449. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4450. __func__, ret);
  4451. goto err;
  4452. }
  4453. /* For <codec>_tx1 case */
  4454. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
  4455. user_set_tx_ch = slim_tx_cfg[0].channels;
  4456. /* For <codec>_tx3 case */
  4457. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
  4458. user_set_tx_ch = slim_tx_cfg[1].channels;
  4459. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
  4460. user_set_tx_ch = msm_vi_feed_tx_ch;
  4461. else
  4462. user_set_tx_ch = tx_ch_cnt;
  4463. pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
  4464. __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
  4465. tx_ch_cnt, dai_link->id);
  4466. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4467. user_set_tx_ch, tx_ch, 0, 0);
  4468. if (ret < 0)
  4469. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4470. __func__, ret);
  4471. }
  4472. err:
  4473. return ret;
  4474. }
  4475. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  4476. struct snd_pcm_hw_params *params)
  4477. {
  4478. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4479. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4480. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4481. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4482. int ret = 0;
  4483. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  4484. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4485. u32 user_set_tx_ch = 0;
  4486. u32 user_set_rx_ch = 0;
  4487. u32 ch_id;
  4488. ret = snd_soc_dai_get_channel_map(codec_dai,
  4489. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  4490. &rx_ch_cdc_dma);
  4491. if (ret < 0) {
  4492. pr_err("%s: failed to get codec chan map, err:%d\n",
  4493. __func__, ret);
  4494. goto err;
  4495. }
  4496. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4497. switch (dai_link->id) {
  4498. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4499. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4500. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4501. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4502. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4503. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  4504. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  4505. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  4506. {
  4507. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4508. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  4509. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  4510. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  4511. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4512. user_set_rx_ch, &rx_ch_cdc_dma);
  4513. if (ret < 0) {
  4514. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4515. __func__, ret);
  4516. goto err;
  4517. }
  4518. }
  4519. break;
  4520. }
  4521. } else {
  4522. switch (dai_link->id) {
  4523. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4524. {
  4525. user_set_tx_ch = msm_vi_feed_tx_ch;
  4526. }
  4527. break;
  4528. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4529. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4530. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4531. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_1:
  4532. {
  4533. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4534. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  4535. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  4536. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  4537. }
  4538. break;
  4539. }
  4540. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  4541. &tx_ch_cdc_dma, 0, 0);
  4542. if (ret < 0) {
  4543. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4544. __func__, ret);
  4545. goto err;
  4546. }
  4547. }
  4548. err:
  4549. return ret;
  4550. }
  4551. static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
  4552. struct snd_pcm_hw_params *params)
  4553. {
  4554. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4555. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4556. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4557. unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4558. unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
  4559. unsigned int num_tx_ch = 0;
  4560. unsigned int num_rx_ch = 0;
  4561. int ret = 0;
  4562. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4563. num_rx_ch = params_channels(params);
  4564. pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
  4565. codec_dai->name, codec_dai->id, num_rx_ch);
  4566. ret = snd_soc_dai_get_channel_map(codec_dai,
  4567. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4568. if (ret < 0) {
  4569. pr_err("%s: failed to get codec chan map, err:%d\n",
  4570. __func__, ret);
  4571. goto err;
  4572. }
  4573. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4574. num_rx_ch, rx_ch);
  4575. if (ret < 0) {
  4576. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4577. __func__, ret);
  4578. goto err;
  4579. }
  4580. } else {
  4581. num_tx_ch = params_channels(params);
  4582. pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
  4583. codec_dai->name, codec_dai->id, num_tx_ch);
  4584. ret = snd_soc_dai_get_channel_map(codec_dai,
  4585. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4586. if (ret < 0) {
  4587. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4588. __func__, ret);
  4589. goto err;
  4590. }
  4591. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4592. num_tx_ch, tx_ch, 0, 0);
  4593. if (ret < 0) {
  4594. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4595. __func__, ret);
  4596. goto err;
  4597. }
  4598. }
  4599. err:
  4600. return ret;
  4601. }
  4602. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  4603. struct snd_pcm_hw_params *params)
  4604. {
  4605. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4606. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4607. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4608. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4609. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  4610. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4611. int ret;
  4612. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  4613. codec_dai->name, codec_dai->id);
  4614. ret = snd_soc_dai_get_channel_map(codec_dai,
  4615. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4616. if (ret) {
  4617. dev_err(rtd->dev,
  4618. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  4619. __func__, ret);
  4620. goto err;
  4621. }
  4622. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  4623. __func__, tx_ch_cnt, dai_link->id);
  4624. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4625. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  4626. if (ret)
  4627. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  4628. __func__, ret);
  4629. err:
  4630. return ret;
  4631. }
  4632. static int msm_get_port_id(int be_id)
  4633. {
  4634. int afe_port_id;
  4635. switch (be_id) {
  4636. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  4637. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  4638. break;
  4639. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  4640. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  4641. break;
  4642. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  4643. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  4644. break;
  4645. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  4646. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  4647. break;
  4648. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4649. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  4650. break;
  4651. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4652. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  4653. break;
  4654. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4655. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  4656. break;
  4657. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4658. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  4659. break;
  4660. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4661. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
  4662. break;
  4663. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4664. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
  4665. break;
  4666. default:
  4667. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  4668. afe_port_id = -EINVAL;
  4669. }
  4670. return afe_port_id;
  4671. }
  4672. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  4673. {
  4674. u32 bit_per_sample;
  4675. switch (bit_format) {
  4676. case SNDRV_PCM_FORMAT_S32_LE:
  4677. case SNDRV_PCM_FORMAT_S24_3LE:
  4678. case SNDRV_PCM_FORMAT_S24_LE:
  4679. bit_per_sample = 32;
  4680. break;
  4681. case SNDRV_PCM_FORMAT_S16_LE:
  4682. default:
  4683. bit_per_sample = 16;
  4684. break;
  4685. }
  4686. return bit_per_sample;
  4687. }
  4688. static void update_mi2s_clk_val(int dai_id, int stream)
  4689. {
  4690. u32 bit_per_sample;
  4691. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4692. bit_per_sample =
  4693. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  4694. mi2s_clk[dai_id].clk_freq_in_hz =
  4695. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4696. } else {
  4697. bit_per_sample =
  4698. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  4699. mi2s_clk[dai_id].clk_freq_in_hz =
  4700. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4701. }
  4702. }
  4703. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  4704. {
  4705. int ret = 0;
  4706. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4707. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4708. int port_id = 0;
  4709. int index = cpu_dai->id;
  4710. port_id = msm_get_port_id(rtd->dai_link->id);
  4711. if (port_id < 0) {
  4712. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  4713. ret = port_id;
  4714. goto err;
  4715. }
  4716. if (enable) {
  4717. update_mi2s_clk_val(index, substream->stream);
  4718. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  4719. mi2s_clk[index].clk_freq_in_hz);
  4720. }
  4721. mi2s_clk[index].enable = enable;
  4722. ret = afe_set_lpass_clock_v2(port_id,
  4723. &mi2s_clk[index]);
  4724. if (ret < 0) {
  4725. dev_err(rtd->card->dev,
  4726. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  4727. __func__, port_id, ret);
  4728. goto err;
  4729. }
  4730. err:
  4731. return ret;
  4732. }
  4733. static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
  4734. enum pinctrl_pin_state new_state)
  4735. {
  4736. int ret = 0;
  4737. int curr_state = 0;
  4738. if (pinctrl_info == NULL) {
  4739. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4740. ret = -EINVAL;
  4741. goto err;
  4742. }
  4743. if (pinctrl_info->pinctrl == NULL) {
  4744. pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
  4745. ret = -EINVAL;
  4746. goto err;
  4747. }
  4748. curr_state = pinctrl_info->curr_state;
  4749. pinctrl_info->curr_state = new_state;
  4750. pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
  4751. pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
  4752. if (curr_state == pinctrl_info->curr_state) {
  4753. pr_debug("%s: Already in same state\n", __func__);
  4754. goto err;
  4755. }
  4756. if (curr_state != STATE_DISABLE &&
  4757. pinctrl_info->curr_state != STATE_DISABLE) {
  4758. pr_debug("%s: state already active cannot switch\n", __func__);
  4759. ret = -EIO;
  4760. goto err;
  4761. }
  4762. switch (pinctrl_info->curr_state) {
  4763. case STATE_MI2S_ACTIVE:
  4764. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4765. pinctrl_info->mi2s_active);
  4766. if (ret) {
  4767. pr_err("%s: MI2S state select failed with %d\n",
  4768. __func__, ret);
  4769. ret = -EIO;
  4770. goto err;
  4771. }
  4772. break;
  4773. case STATE_TDM_ACTIVE:
  4774. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4775. pinctrl_info->tdm_active);
  4776. if (ret) {
  4777. pr_err("%s: TDM state select failed with %d\n",
  4778. __func__, ret);
  4779. ret = -EIO;
  4780. goto err;
  4781. }
  4782. break;
  4783. case STATE_DISABLE:
  4784. if (curr_state == STATE_MI2S_ACTIVE) {
  4785. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4786. pinctrl_info->mi2s_disable);
  4787. } else {
  4788. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4789. pinctrl_info->tdm_disable);
  4790. }
  4791. if (ret) {
  4792. pr_err("%s: state disable failed with %d\n",
  4793. __func__, ret);
  4794. ret = -EIO;
  4795. goto err;
  4796. }
  4797. break;
  4798. default:
  4799. pr_err("%s: TLMM pin state is invalid\n", __func__);
  4800. return -EINVAL;
  4801. }
  4802. err:
  4803. return ret;
  4804. }
  4805. static int msm_get_pinctrl(struct platform_device *pdev)
  4806. {
  4807. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4808. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4809. struct msm_pinctrl_info *pinctrl_info = NULL;
  4810. struct pinctrl *pinctrl;
  4811. int ret = 0;
  4812. pinctrl_info = &pdata->pinctrl_info;
  4813. if (pinctrl_info == NULL) {
  4814. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4815. return -EINVAL;
  4816. }
  4817. pinctrl = devm_pinctrl_get(&pdev->dev);
  4818. if (IS_ERR_OR_NULL(pinctrl)) {
  4819. pr_err("%s: Unable to get pinctrl handle\n", __func__);
  4820. return -EINVAL;
  4821. }
  4822. pinctrl_info->pinctrl = pinctrl;
  4823. /* get all the states handles from Device Tree */
  4824. pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
  4825. "quat-mi2s-sleep");
  4826. if (IS_ERR(pinctrl_info->mi2s_disable)) {
  4827. pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
  4828. goto err;
  4829. }
  4830. pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
  4831. "quat-mi2s-active");
  4832. if (IS_ERR(pinctrl_info->mi2s_active)) {
  4833. pr_err("%s: could not get mi2s_active pinstate\n", __func__);
  4834. goto err;
  4835. }
  4836. pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
  4837. "quat-tdm-sleep");
  4838. if (IS_ERR(pinctrl_info->tdm_disable)) {
  4839. pr_err("%s: could not get tdm_disable pinstate\n", __func__);
  4840. goto err;
  4841. }
  4842. pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
  4843. "quat-tdm-active");
  4844. if (IS_ERR(pinctrl_info->tdm_active)) {
  4845. pr_err("%s: could not get tdm_active pinstate\n",
  4846. __func__);
  4847. goto err;
  4848. }
  4849. /* Reset the TLMM pins to a default state */
  4850. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4851. pinctrl_info->mi2s_disable);
  4852. if (ret != 0) {
  4853. pr_err("%s: Disable TLMM pins failed with %d\n",
  4854. __func__, ret);
  4855. ret = -EIO;
  4856. goto err;
  4857. }
  4858. pinctrl_info->curr_state = STATE_DISABLE;
  4859. return 0;
  4860. err:
  4861. devm_pinctrl_put(pinctrl);
  4862. pinctrl_info->pinctrl = NULL;
  4863. return -EINVAL;
  4864. }
  4865. static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  4866. struct snd_pcm_hw_params *params)
  4867. {
  4868. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4869. struct snd_interval *rate = hw_param_interval(params,
  4870. SNDRV_PCM_HW_PARAM_RATE);
  4871. struct snd_interval *channels = hw_param_interval(params,
  4872. SNDRV_PCM_HW_PARAM_CHANNELS);
  4873. if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
  4874. channels->min = channels->max =
  4875. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4876. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4877. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  4878. rate->min = rate->max =
  4879. tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  4880. } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
  4881. channels->min = channels->max =
  4882. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4883. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4884. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  4885. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  4886. } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
  4887. channels->min = channels->max =
  4888. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4889. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4890. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  4891. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  4892. } else {
  4893. pr_err("%s: dai id 0x%x not supported\n",
  4894. __func__, cpu_dai->id);
  4895. return -EINVAL;
  4896. }
  4897. pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
  4898. __func__, cpu_dai->id, channels->max, rate->max,
  4899. params_format(params));
  4900. return 0;
  4901. }
  4902. static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  4903. struct snd_pcm_hw_params *params)
  4904. {
  4905. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4906. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4907. int ret = 0;
  4908. int slot_width = 32;
  4909. int channels, slots;
  4910. unsigned int slot_mask, rate, clk_freq;
  4911. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  4912. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  4913. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4914. switch (cpu_dai->id) {
  4915. case AFE_PORT_ID_PRIMARY_TDM_RX:
  4916. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  4917. break;
  4918. case AFE_PORT_ID_SECONDARY_TDM_RX:
  4919. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4920. break;
  4921. case AFE_PORT_ID_TERTIARY_TDM_RX:
  4922. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  4923. break;
  4924. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  4925. slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4926. break;
  4927. case AFE_PORT_ID_QUINARY_TDM_RX:
  4928. slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4929. break;
  4930. case AFE_PORT_ID_PRIMARY_TDM_TX:
  4931. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  4932. break;
  4933. case AFE_PORT_ID_SECONDARY_TDM_TX:
  4934. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  4935. break;
  4936. case AFE_PORT_ID_TERTIARY_TDM_TX:
  4937. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  4938. break;
  4939. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  4940. slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  4941. break;
  4942. case AFE_PORT_ID_QUINARY_TDM_TX:
  4943. slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  4944. break;
  4945. default:
  4946. pr_err("%s: dai id 0x%x not supported\n",
  4947. __func__, cpu_dai->id);
  4948. return -EINVAL;
  4949. }
  4950. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4951. /*2 slot config - bits 0 and 1 set for the first two slots */
  4952. slot_mask = 0x0000FFFF >> (16-slots);
  4953. channels = slots;
  4954. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  4955. __func__, slot_width, slots);
  4956. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  4957. slots, slot_width);
  4958. if (ret < 0) {
  4959. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  4960. __func__, ret);
  4961. goto end;
  4962. }
  4963. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4964. 0, NULL, channels, slot_offset);
  4965. if (ret < 0) {
  4966. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  4967. __func__, ret);
  4968. goto end;
  4969. }
  4970. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  4971. /*2 slot config - bits 0 and 1 set for the first two slots */
  4972. slot_mask = 0x0000FFFF >> (16-slots);
  4973. channels = slots;
  4974. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  4975. __func__, slot_width, slots);
  4976. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  4977. slots, slot_width);
  4978. if (ret < 0) {
  4979. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  4980. __func__, ret);
  4981. goto end;
  4982. }
  4983. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4984. channels, slot_offset, 0, NULL);
  4985. if (ret < 0) {
  4986. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  4987. __func__, ret);
  4988. goto end;
  4989. }
  4990. } else {
  4991. ret = -EINVAL;
  4992. pr_err("%s: invalid use case, err:%d\n",
  4993. __func__, ret);
  4994. goto end;
  4995. }
  4996. rate = params_rate(params);
  4997. clk_freq = rate * slot_width * slots;
  4998. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  4999. if (ret < 0)
  5000. pr_err("%s: failed to set tdm clk, err:%d\n",
  5001. __func__, ret);
  5002. end:
  5003. return ret;
  5004. }
  5005. static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
  5006. {
  5007. int ret = 0;
  5008. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5009. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5010. struct snd_soc_card *card = rtd->card;
  5011. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5012. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5013. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5014. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  5015. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  5016. ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
  5017. if (ret)
  5018. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5019. __func__, ret);
  5020. }
  5021. return ret;
  5022. }
  5023. static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
  5024. {
  5025. int ret = 0;
  5026. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5027. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5028. struct snd_soc_card *card = rtd->card;
  5029. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5030. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5031. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5032. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  5033. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  5034. ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
  5035. if (ret)
  5036. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5037. __func__, ret);
  5038. }
  5039. }
  5040. static struct snd_soc_ops sm6150_tdm_be_ops = {
  5041. .hw_params = sm6150_tdm_snd_hw_params,
  5042. .startup = sm6150_tdm_snd_startup,
  5043. .shutdown = sm6150_tdm_snd_shutdown
  5044. };
  5045. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  5046. {
  5047. cpumask_t mask;
  5048. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  5049. pm_qos_remove_request(&substream->latency_pm_qos_req);
  5050. cpumask_clear(&mask);
  5051. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  5052. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  5053. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  5054. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  5055. pm_qos_add_request(&substream->latency_pm_qos_req,
  5056. PM_QOS_CPU_DMA_LATENCY,
  5057. MSM_LL_QOS_VALUE);
  5058. return 0;
  5059. }
  5060. static struct snd_soc_ops msm_fe_qos_ops = {
  5061. .prepare = msm_fe_qos_prepare,
  5062. };
  5063. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  5064. {
  5065. int ret = 0;
  5066. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5067. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5068. int index = cpu_dai->id;
  5069. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  5070. struct snd_soc_card *card = rtd->card;
  5071. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5072. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5073. int ret_pinctrl = 0;
  5074. dev_dbg(rtd->card->dev,
  5075. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  5076. __func__, substream->name, substream->stream,
  5077. cpu_dai->name, cpu_dai->id);
  5078. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5079. ret = -EINVAL;
  5080. dev_err(rtd->card->dev,
  5081. "%s: CPU DAI id (%d) out of range\n",
  5082. __func__, cpu_dai->id);
  5083. goto err;
  5084. }
  5085. /*
  5086. * Mutex protection in case the same MI2S
  5087. * interface using for both TX and RX so
  5088. * that the same clock won't be enable twice.
  5089. */
  5090. mutex_lock(&mi2s_intf_conf[index].lock);
  5091. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  5092. /* Check if msm needs to provide the clock to the interface */
  5093. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  5094. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  5095. fmt = SND_SOC_DAIFMT_CBM_CFM;
  5096. }
  5097. ret = msm_mi2s_set_sclk(substream, true);
  5098. if (ret < 0) {
  5099. dev_err(rtd->card->dev,
  5100. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  5101. __func__, ret);
  5102. goto clean_up;
  5103. }
  5104. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  5105. if (ret < 0) {
  5106. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  5107. __func__, index, ret);
  5108. goto clk_off;
  5109. }
  5110. if (index == QUAT_MI2S) {
  5111. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5112. STATE_MI2S_ACTIVE);
  5113. if (ret_pinctrl)
  5114. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5115. __func__, ret_pinctrl);
  5116. }
  5117. }
  5118. clk_off:
  5119. if (ret < 0)
  5120. msm_mi2s_set_sclk(substream, false);
  5121. clean_up:
  5122. if (ret < 0)
  5123. mi2s_intf_conf[index].ref_cnt--;
  5124. mutex_unlock(&mi2s_intf_conf[index].lock);
  5125. err:
  5126. return ret;
  5127. }
  5128. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  5129. {
  5130. int ret;
  5131. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5132. int index = rtd->cpu_dai->id;
  5133. struct snd_soc_card *card = rtd->card;
  5134. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5135. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5136. int ret_pinctrl = 0;
  5137. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  5138. substream->name, substream->stream);
  5139. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5140. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  5141. return;
  5142. }
  5143. mutex_lock(&mi2s_intf_conf[index].lock);
  5144. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  5145. ret = msm_mi2s_set_sclk(substream, false);
  5146. if (ret < 0)
  5147. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  5148. __func__, index, ret);
  5149. if (index == QUAT_MI2S) {
  5150. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5151. STATE_DISABLE);
  5152. if (ret_pinctrl)
  5153. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5154. __func__, ret_pinctrl);
  5155. }
  5156. }
  5157. mutex_unlock(&mi2s_intf_conf[index].lock);
  5158. }
  5159. static struct snd_soc_ops msm_mi2s_be_ops = {
  5160. .startup = msm_mi2s_snd_startup,
  5161. .shutdown = msm_mi2s_snd_shutdown,
  5162. };
  5163. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  5164. .hw_params = msm_snd_cdc_dma_hw_params,
  5165. };
  5166. static struct snd_soc_ops msm_be_ops = {
  5167. .hw_params = msm_snd_hw_params,
  5168. };
  5169. static struct snd_soc_ops msm_slimbus_2_be_ops = {
  5170. .hw_params = msm_slimbus_2_hw_params,
  5171. };
  5172. static struct snd_soc_ops msm_wcn_ops = {
  5173. .hw_params = msm_wcn_hw_params,
  5174. };
  5175. /* Digital audio interface glue - connects codec <---> CPU */
  5176. static struct snd_soc_dai_link msm_common_dai_links[] = {
  5177. /* FrontEnd DAI Links */
  5178. {
  5179. .name = MSM_DAILINK_NAME(Media1),
  5180. .stream_name = "MultiMedia1",
  5181. .cpu_dai_name = "MultiMedia1",
  5182. .platform_name = "msm-pcm-dsp.0",
  5183. .dynamic = 1,
  5184. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5185. .dpcm_playback = 1,
  5186. .dpcm_capture = 1,
  5187. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5188. SND_SOC_DPCM_TRIGGER_POST},
  5189. .codec_dai_name = "snd-soc-dummy-dai",
  5190. .codec_name = "snd-soc-dummy",
  5191. .ignore_suspend = 1,
  5192. /* this dainlink has playback support */
  5193. .ignore_pmdown_time = 1,
  5194. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5195. },
  5196. {
  5197. .name = MSM_DAILINK_NAME(Media2),
  5198. .stream_name = "MultiMedia2",
  5199. .cpu_dai_name = "MultiMedia2",
  5200. .platform_name = "msm-pcm-dsp.0",
  5201. .dynamic = 1,
  5202. .dpcm_playback = 1,
  5203. .dpcm_capture = 1,
  5204. .codec_dai_name = "snd-soc-dummy-dai",
  5205. .codec_name = "snd-soc-dummy",
  5206. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5207. SND_SOC_DPCM_TRIGGER_POST},
  5208. .ignore_suspend = 1,
  5209. /* this dainlink has playback support */
  5210. .ignore_pmdown_time = 1,
  5211. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  5212. },
  5213. {
  5214. .name = "VoiceMMode1",
  5215. .stream_name = "VoiceMMode1",
  5216. .cpu_dai_name = "VoiceMMode1",
  5217. .platform_name = "msm-pcm-voice",
  5218. .dynamic = 1,
  5219. .dpcm_playback = 1,
  5220. .dpcm_capture = 1,
  5221. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5222. SND_SOC_DPCM_TRIGGER_POST},
  5223. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5224. .ignore_suspend = 1,
  5225. .ignore_pmdown_time = 1,
  5226. .codec_dai_name = "snd-soc-dummy-dai",
  5227. .codec_name = "snd-soc-dummy",
  5228. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  5229. },
  5230. {
  5231. .name = "MSM VoIP",
  5232. .stream_name = "VoIP",
  5233. .cpu_dai_name = "VoIP",
  5234. .platform_name = "msm-voip-dsp",
  5235. .dynamic = 1,
  5236. .dpcm_playback = 1,
  5237. .dpcm_capture = 1,
  5238. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5239. SND_SOC_DPCM_TRIGGER_POST},
  5240. .codec_dai_name = "snd-soc-dummy-dai",
  5241. .codec_name = "snd-soc-dummy",
  5242. .ignore_suspend = 1,
  5243. /* this dainlink has playback support */
  5244. .ignore_pmdown_time = 1,
  5245. .id = MSM_FRONTEND_DAI_VOIP,
  5246. },
  5247. {
  5248. .name = MSM_DAILINK_NAME(ULL),
  5249. .stream_name = "MultiMedia3",
  5250. .cpu_dai_name = "MultiMedia3",
  5251. .platform_name = "msm-pcm-dsp.2",
  5252. .dynamic = 1,
  5253. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5254. .dpcm_playback = 1,
  5255. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5256. SND_SOC_DPCM_TRIGGER_POST},
  5257. .codec_dai_name = "snd-soc-dummy-dai",
  5258. .codec_name = "snd-soc-dummy",
  5259. .ignore_suspend = 1,
  5260. /* this dainlink has playback support */
  5261. .ignore_pmdown_time = 1,
  5262. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  5263. },
  5264. /* Hostless PCM purpose */
  5265. {
  5266. .name = "SLIMBUS_0 Hostless",
  5267. .stream_name = "SLIMBUS_0 Hostless",
  5268. .cpu_dai_name = "SLIMBUS0_HOSTLESS",
  5269. .platform_name = "msm-pcm-hostless",
  5270. .dynamic = 1,
  5271. .dpcm_playback = 1,
  5272. .dpcm_capture = 1,
  5273. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5274. SND_SOC_DPCM_TRIGGER_POST},
  5275. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5276. .ignore_suspend = 1,
  5277. /* this dailink has playback support */
  5278. .ignore_pmdown_time = 1,
  5279. .codec_dai_name = "snd-soc-dummy-dai",
  5280. .codec_name = "snd-soc-dummy",
  5281. },
  5282. {
  5283. .name = "MSM AFE-PCM RX",
  5284. .stream_name = "AFE-PROXY RX",
  5285. .cpu_dai_name = "msm-dai-q6-dev.241",
  5286. .codec_name = "msm-stub-codec.1",
  5287. .codec_dai_name = "msm-stub-rx",
  5288. .platform_name = "msm-pcm-afe",
  5289. .dpcm_playback = 1,
  5290. .ignore_suspend = 1,
  5291. /* this dainlink has playback support */
  5292. .ignore_pmdown_time = 1,
  5293. },
  5294. {
  5295. .name = "MSM AFE-PCM TX",
  5296. .stream_name = "AFE-PROXY TX",
  5297. .cpu_dai_name = "msm-dai-q6-dev.240",
  5298. .codec_name = "msm-stub-codec.1",
  5299. .codec_dai_name = "msm-stub-tx",
  5300. .platform_name = "msm-pcm-afe",
  5301. .dpcm_capture = 1,
  5302. .ignore_suspend = 1,
  5303. },
  5304. {
  5305. .name = MSM_DAILINK_NAME(Compress1),
  5306. .stream_name = "Compress1",
  5307. .cpu_dai_name = "MultiMedia4",
  5308. .platform_name = "msm-compress-dsp",
  5309. .dynamic = 1,
  5310. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  5311. .dpcm_playback = 1,
  5312. .dpcm_capture = 1,
  5313. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5314. SND_SOC_DPCM_TRIGGER_POST},
  5315. .codec_dai_name = "snd-soc-dummy-dai",
  5316. .codec_name = "snd-soc-dummy",
  5317. .ignore_suspend = 1,
  5318. .ignore_pmdown_time = 1,
  5319. /* this dainlink has playback support */
  5320. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  5321. },
  5322. {
  5323. .name = "AUXPCM Hostless",
  5324. .stream_name = "AUXPCM Hostless",
  5325. .cpu_dai_name = "AUXPCM_HOSTLESS",
  5326. .platform_name = "msm-pcm-hostless",
  5327. .dynamic = 1,
  5328. .dpcm_playback = 1,
  5329. .dpcm_capture = 1,
  5330. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5331. SND_SOC_DPCM_TRIGGER_POST},
  5332. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5333. .ignore_suspend = 1,
  5334. /* this dainlink has playback support */
  5335. .ignore_pmdown_time = 1,
  5336. .codec_dai_name = "snd-soc-dummy-dai",
  5337. .codec_name = "snd-soc-dummy",
  5338. },
  5339. {
  5340. .name = "SLIMBUS_1 Hostless",
  5341. .stream_name = "SLIMBUS_1 Hostless",
  5342. .cpu_dai_name = "SLIMBUS1_HOSTLESS",
  5343. .platform_name = "msm-pcm-hostless",
  5344. .dynamic = 1,
  5345. .dpcm_playback = 1,
  5346. .dpcm_capture = 1,
  5347. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5348. SND_SOC_DPCM_TRIGGER_POST},
  5349. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5350. .ignore_suspend = 1,
  5351. /* this dailink has playback support */
  5352. .ignore_pmdown_time = 1,
  5353. .codec_dai_name = "snd-soc-dummy-dai",
  5354. .codec_name = "snd-soc-dummy",
  5355. },
  5356. {
  5357. .name = "SLIMBUS_3 Hostless",
  5358. .stream_name = "SLIMBUS_3 Hostless",
  5359. .cpu_dai_name = "SLIMBUS3_HOSTLESS",
  5360. .platform_name = "msm-pcm-hostless",
  5361. .dynamic = 1,
  5362. .dpcm_playback = 1,
  5363. .dpcm_capture = 1,
  5364. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5365. SND_SOC_DPCM_TRIGGER_POST},
  5366. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5367. .ignore_suspend = 1,
  5368. /* this dailink has playback support */
  5369. .ignore_pmdown_time = 1,
  5370. .codec_dai_name = "snd-soc-dummy-dai",
  5371. .codec_name = "snd-soc-dummy",
  5372. },
  5373. {
  5374. .name = "SLIMBUS_4 Hostless",
  5375. .stream_name = "SLIMBUS_4 Hostless",
  5376. .cpu_dai_name = "SLIMBUS4_HOSTLESS",
  5377. .platform_name = "msm-pcm-hostless",
  5378. .dynamic = 1,
  5379. .dpcm_playback = 1,
  5380. .dpcm_capture = 1,
  5381. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5382. SND_SOC_DPCM_TRIGGER_POST},
  5383. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5384. .ignore_suspend = 1,
  5385. /* this dailink has playback support */
  5386. .ignore_pmdown_time = 1,
  5387. .codec_dai_name = "snd-soc-dummy-dai",
  5388. .codec_name = "snd-soc-dummy",
  5389. },
  5390. {
  5391. .name = MSM_DAILINK_NAME(LowLatency),
  5392. .stream_name = "MultiMedia5",
  5393. .cpu_dai_name = "MultiMedia5",
  5394. .platform_name = "msm-pcm-dsp.1",
  5395. .dynamic = 1,
  5396. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5397. .dpcm_playback = 1,
  5398. .dpcm_capture = 1,
  5399. .codec_dai_name = "snd-soc-dummy-dai",
  5400. .codec_name = "snd-soc-dummy",
  5401. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5402. SND_SOC_DPCM_TRIGGER_POST},
  5403. .ignore_suspend = 1,
  5404. /* this dainlink has playback support */
  5405. .ignore_pmdown_time = 1,
  5406. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  5407. .ops = &msm_fe_qos_ops,
  5408. },
  5409. {
  5410. .name = "Listen 1 Audio Service",
  5411. .stream_name = "Listen 1 Audio Service",
  5412. .cpu_dai_name = "LSM1",
  5413. .platform_name = "msm-lsm-client",
  5414. .dynamic = 1,
  5415. .dpcm_capture = 1,
  5416. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5417. SND_SOC_DPCM_TRIGGER_POST },
  5418. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5419. .ignore_suspend = 1,
  5420. .codec_dai_name = "snd-soc-dummy-dai",
  5421. .codec_name = "snd-soc-dummy",
  5422. .id = MSM_FRONTEND_DAI_LSM1,
  5423. },
  5424. /* Multiple Tunnel instances */
  5425. {
  5426. .name = MSM_DAILINK_NAME(Compress2),
  5427. .stream_name = "Compress2",
  5428. .cpu_dai_name = "MultiMedia7",
  5429. .platform_name = "msm-compress-dsp",
  5430. .dynamic = 1,
  5431. .dpcm_playback = 1,
  5432. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5433. SND_SOC_DPCM_TRIGGER_POST},
  5434. .codec_dai_name = "snd-soc-dummy-dai",
  5435. .codec_name = "snd-soc-dummy",
  5436. .ignore_suspend = 1,
  5437. .ignore_pmdown_time = 1,
  5438. /* this dainlink has playback support */
  5439. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  5440. },
  5441. {
  5442. .name = MSM_DAILINK_NAME(MultiMedia10),
  5443. .stream_name = "MultiMedia10",
  5444. .cpu_dai_name = "MultiMedia10",
  5445. .platform_name = "msm-pcm-dsp.1",
  5446. .dynamic = 1,
  5447. .dpcm_playback = 1,
  5448. .dpcm_capture = 1,
  5449. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5450. SND_SOC_DPCM_TRIGGER_POST},
  5451. .codec_dai_name = "snd-soc-dummy-dai",
  5452. .codec_name = "snd-soc-dummy",
  5453. .ignore_suspend = 1,
  5454. .ignore_pmdown_time = 1,
  5455. /* this dainlink has playback support */
  5456. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  5457. },
  5458. {
  5459. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  5460. .stream_name = "MM_NOIRQ",
  5461. .cpu_dai_name = "MultiMedia8",
  5462. .platform_name = "msm-pcm-dsp-noirq",
  5463. .dynamic = 1,
  5464. .dpcm_playback = 1,
  5465. .dpcm_capture = 1,
  5466. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5467. SND_SOC_DPCM_TRIGGER_POST},
  5468. .codec_dai_name = "snd-soc-dummy-dai",
  5469. .codec_name = "snd-soc-dummy",
  5470. .ignore_suspend = 1,
  5471. .ignore_pmdown_time = 1,
  5472. /* this dainlink has playback support */
  5473. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  5474. .ops = &msm_fe_qos_ops,
  5475. },
  5476. /* HDMI Hostless */
  5477. {
  5478. .name = "HDMI_RX_HOSTLESS",
  5479. .stream_name = "HDMI_RX_HOSTLESS",
  5480. .cpu_dai_name = "HDMI_HOSTLESS",
  5481. .platform_name = "msm-pcm-hostless",
  5482. .dynamic = 1,
  5483. .dpcm_playback = 1,
  5484. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5485. SND_SOC_DPCM_TRIGGER_POST},
  5486. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5487. .ignore_suspend = 1,
  5488. .ignore_pmdown_time = 1,
  5489. .codec_dai_name = "snd-soc-dummy-dai",
  5490. .codec_name = "snd-soc-dummy",
  5491. },
  5492. {
  5493. .name = "VoiceMMode2",
  5494. .stream_name = "VoiceMMode2",
  5495. .cpu_dai_name = "VoiceMMode2",
  5496. .platform_name = "msm-pcm-voice",
  5497. .dynamic = 1,
  5498. .dpcm_playback = 1,
  5499. .dpcm_capture = 1,
  5500. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5501. SND_SOC_DPCM_TRIGGER_POST},
  5502. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5503. .ignore_suspend = 1,
  5504. .ignore_pmdown_time = 1,
  5505. .codec_dai_name = "snd-soc-dummy-dai",
  5506. .codec_name = "snd-soc-dummy",
  5507. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  5508. },
  5509. /* LSM FE */
  5510. {
  5511. .name = "Listen 2 Audio Service",
  5512. .stream_name = "Listen 2 Audio Service",
  5513. .cpu_dai_name = "LSM2",
  5514. .platform_name = "msm-lsm-client",
  5515. .dynamic = 1,
  5516. .dpcm_capture = 1,
  5517. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5518. SND_SOC_DPCM_TRIGGER_POST },
  5519. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5520. .ignore_suspend = 1,
  5521. .codec_dai_name = "snd-soc-dummy-dai",
  5522. .codec_name = "snd-soc-dummy",
  5523. .id = MSM_FRONTEND_DAI_LSM2,
  5524. },
  5525. {
  5526. .name = "Listen 3 Audio Service",
  5527. .stream_name = "Listen 3 Audio Service",
  5528. .cpu_dai_name = "LSM3",
  5529. .platform_name = "msm-lsm-client",
  5530. .dynamic = 1,
  5531. .dpcm_capture = 1,
  5532. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5533. SND_SOC_DPCM_TRIGGER_POST },
  5534. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5535. .ignore_suspend = 1,
  5536. .codec_dai_name = "snd-soc-dummy-dai",
  5537. .codec_name = "snd-soc-dummy",
  5538. .id = MSM_FRONTEND_DAI_LSM3,
  5539. },
  5540. {
  5541. .name = "Listen 4 Audio Service",
  5542. .stream_name = "Listen 4 Audio Service",
  5543. .cpu_dai_name = "LSM4",
  5544. .platform_name = "msm-lsm-client",
  5545. .dynamic = 1,
  5546. .dpcm_capture = 1,
  5547. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5548. SND_SOC_DPCM_TRIGGER_POST },
  5549. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5550. .ignore_suspend = 1,
  5551. .codec_dai_name = "snd-soc-dummy-dai",
  5552. .codec_name = "snd-soc-dummy",
  5553. .id = MSM_FRONTEND_DAI_LSM4,
  5554. },
  5555. {
  5556. .name = "Listen 5 Audio Service",
  5557. .stream_name = "Listen 5 Audio Service",
  5558. .cpu_dai_name = "LSM5",
  5559. .platform_name = "msm-lsm-client",
  5560. .dynamic = 1,
  5561. .dpcm_capture = 1,
  5562. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5563. SND_SOC_DPCM_TRIGGER_POST },
  5564. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5565. .ignore_suspend = 1,
  5566. .codec_dai_name = "snd-soc-dummy-dai",
  5567. .codec_name = "snd-soc-dummy",
  5568. .id = MSM_FRONTEND_DAI_LSM5,
  5569. },
  5570. {
  5571. .name = "Listen 6 Audio Service",
  5572. .stream_name = "Listen 6 Audio Service",
  5573. .cpu_dai_name = "LSM6",
  5574. .platform_name = "msm-lsm-client",
  5575. .dynamic = 1,
  5576. .dpcm_capture = 1,
  5577. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5578. SND_SOC_DPCM_TRIGGER_POST },
  5579. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5580. .ignore_suspend = 1,
  5581. .codec_dai_name = "snd-soc-dummy-dai",
  5582. .codec_name = "snd-soc-dummy",
  5583. .id = MSM_FRONTEND_DAI_LSM6,
  5584. },
  5585. {
  5586. .name = "Listen 7 Audio Service",
  5587. .stream_name = "Listen 7 Audio Service",
  5588. .cpu_dai_name = "LSM7",
  5589. .platform_name = "msm-lsm-client",
  5590. .dynamic = 1,
  5591. .dpcm_capture = 1,
  5592. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5593. SND_SOC_DPCM_TRIGGER_POST },
  5594. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5595. .ignore_suspend = 1,
  5596. .codec_dai_name = "snd-soc-dummy-dai",
  5597. .codec_name = "snd-soc-dummy",
  5598. .id = MSM_FRONTEND_DAI_LSM7,
  5599. },
  5600. {
  5601. .name = "Listen 8 Audio Service",
  5602. .stream_name = "Listen 8 Audio Service",
  5603. .cpu_dai_name = "LSM8",
  5604. .platform_name = "msm-lsm-client",
  5605. .dynamic = 1,
  5606. .dpcm_capture = 1,
  5607. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5608. SND_SOC_DPCM_TRIGGER_POST },
  5609. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5610. .ignore_suspend = 1,
  5611. .codec_dai_name = "snd-soc-dummy-dai",
  5612. .codec_name = "snd-soc-dummy",
  5613. .id = MSM_FRONTEND_DAI_LSM8,
  5614. },
  5615. {
  5616. .name = MSM_DAILINK_NAME(Media9),
  5617. .stream_name = "MultiMedia9",
  5618. .cpu_dai_name = "MultiMedia9",
  5619. .platform_name = "msm-pcm-dsp.0",
  5620. .dynamic = 1,
  5621. .dpcm_playback = 1,
  5622. .dpcm_capture = 1,
  5623. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5624. SND_SOC_DPCM_TRIGGER_POST},
  5625. .codec_dai_name = "snd-soc-dummy-dai",
  5626. .codec_name = "snd-soc-dummy",
  5627. .ignore_suspend = 1,
  5628. /* this dainlink has playback support */
  5629. .ignore_pmdown_time = 1,
  5630. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  5631. },
  5632. {
  5633. .name = MSM_DAILINK_NAME(Compress4),
  5634. .stream_name = "Compress4",
  5635. .cpu_dai_name = "MultiMedia11",
  5636. .platform_name = "msm-compress-dsp",
  5637. .dynamic = 1,
  5638. .dpcm_playback = 1,
  5639. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5640. SND_SOC_DPCM_TRIGGER_POST},
  5641. .codec_dai_name = "snd-soc-dummy-dai",
  5642. .codec_name = "snd-soc-dummy",
  5643. .ignore_suspend = 1,
  5644. .ignore_pmdown_time = 1,
  5645. /* this dainlink has playback support */
  5646. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  5647. },
  5648. {
  5649. .name = MSM_DAILINK_NAME(Compress5),
  5650. .stream_name = "Compress5",
  5651. .cpu_dai_name = "MultiMedia12",
  5652. .platform_name = "msm-compress-dsp",
  5653. .dynamic = 1,
  5654. .dpcm_playback = 1,
  5655. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5656. SND_SOC_DPCM_TRIGGER_POST},
  5657. .codec_dai_name = "snd-soc-dummy-dai",
  5658. .codec_name = "snd-soc-dummy",
  5659. .ignore_suspend = 1,
  5660. .ignore_pmdown_time = 1,
  5661. /* this dainlink has playback support */
  5662. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  5663. },
  5664. {
  5665. .name = MSM_DAILINK_NAME(Compress6),
  5666. .stream_name = "Compress6",
  5667. .cpu_dai_name = "MultiMedia13",
  5668. .platform_name = "msm-compress-dsp",
  5669. .dynamic = 1,
  5670. .dpcm_playback = 1,
  5671. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5672. SND_SOC_DPCM_TRIGGER_POST},
  5673. .codec_dai_name = "snd-soc-dummy-dai",
  5674. .codec_name = "snd-soc-dummy",
  5675. .ignore_suspend = 1,
  5676. .ignore_pmdown_time = 1,
  5677. /* this dainlink has playback support */
  5678. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  5679. },
  5680. {
  5681. .name = MSM_DAILINK_NAME(Compress7),
  5682. .stream_name = "Compress7",
  5683. .cpu_dai_name = "MultiMedia14",
  5684. .platform_name = "msm-compress-dsp",
  5685. .dynamic = 1,
  5686. .dpcm_playback = 1,
  5687. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5688. SND_SOC_DPCM_TRIGGER_POST},
  5689. .codec_dai_name = "snd-soc-dummy-dai",
  5690. .codec_name = "snd-soc-dummy",
  5691. .ignore_suspend = 1,
  5692. .ignore_pmdown_time = 1,
  5693. /* this dainlink has playback support */
  5694. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  5695. },
  5696. {
  5697. .name = MSM_DAILINK_NAME(Compress8),
  5698. .stream_name = "Compress8",
  5699. .cpu_dai_name = "MultiMedia15",
  5700. .platform_name = "msm-compress-dsp",
  5701. .dynamic = 1,
  5702. .dpcm_playback = 1,
  5703. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5704. SND_SOC_DPCM_TRIGGER_POST},
  5705. .codec_dai_name = "snd-soc-dummy-dai",
  5706. .codec_name = "snd-soc-dummy",
  5707. .ignore_suspend = 1,
  5708. .ignore_pmdown_time = 1,
  5709. /* this dainlink has playback support */
  5710. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  5711. },
  5712. {
  5713. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  5714. .stream_name = "MM_NOIRQ_2",
  5715. .cpu_dai_name = "MultiMedia16",
  5716. .platform_name = "msm-pcm-dsp-noirq",
  5717. .dynamic = 1,
  5718. .dpcm_playback = 1,
  5719. .dpcm_capture = 1,
  5720. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5721. SND_SOC_DPCM_TRIGGER_POST},
  5722. .codec_dai_name = "snd-soc-dummy-dai",
  5723. .codec_name = "snd-soc-dummy",
  5724. .ignore_suspend = 1,
  5725. .ignore_pmdown_time = 1,
  5726. /* this dainlink has playback support */
  5727. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  5728. },
  5729. {
  5730. .name = "SLIMBUS_8 Hostless",
  5731. .stream_name = "SLIMBUS8_HOSTLESS Capture",
  5732. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  5733. .platform_name = "msm-pcm-hostless",
  5734. .dynamic = 1,
  5735. .dpcm_capture = 1,
  5736. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5737. SND_SOC_DPCM_TRIGGER_POST},
  5738. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5739. .ignore_suspend = 1,
  5740. .codec_dai_name = "snd-soc-dummy-dai",
  5741. .codec_name = "snd-soc-dummy",
  5742. },
  5743. };
  5744. static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
  5745. {
  5746. .name = LPASS_BE_SLIMBUS_4_TX,
  5747. .stream_name = "Slimbus4 Capture",
  5748. .cpu_dai_name = "msm-dai-q6-dev.16393",
  5749. .platform_name = "msm-pcm-hostless",
  5750. .codec_name = "tavil_codec",
  5751. .codec_dai_name = "tavil_vifeedback",
  5752. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  5753. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5754. .ops = &msm_be_ops,
  5755. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5756. .ignore_suspend = 1,
  5757. },
  5758. /* Ultrasound RX DAI Link */
  5759. {
  5760. .name = "SLIMBUS_2 Hostless Playback",
  5761. .stream_name = "SLIMBUS_2 Hostless Playback",
  5762. .cpu_dai_name = "msm-dai-q6-dev.16388",
  5763. .platform_name = "msm-pcm-hostless",
  5764. .codec_name = "tavil_codec",
  5765. .codec_dai_name = "tavil_rx2",
  5766. .ignore_suspend = 1,
  5767. .ignore_pmdown_time = 1,
  5768. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5769. .ops = &msm_slimbus_2_be_ops,
  5770. },
  5771. /* Ultrasound TX DAI Link */
  5772. {
  5773. .name = "SLIMBUS_2 Hostless Capture",
  5774. .stream_name = "SLIMBUS_2 Hostless Capture",
  5775. .cpu_dai_name = "msm-dai-q6-dev.16389",
  5776. .platform_name = "msm-pcm-hostless",
  5777. .codec_name = "tavil_codec",
  5778. .codec_dai_name = "tavil_tx2",
  5779. .ignore_suspend = 1,
  5780. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5781. .ops = &msm_slimbus_2_be_ops,
  5782. },
  5783. };
  5784. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  5785. {
  5786. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  5787. .stream_name = "WSA CDC DMA0 Capture",
  5788. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  5789. .platform_name = "msm-pcm-hostless",
  5790. .codec_name = "bolero_codec",
  5791. .codec_dai_name = "wsa_macro_vifeedback",
  5792. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  5793. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5794. .ignore_suspend = 1,
  5795. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5796. .ops = &msm_cdc_dma_be_ops,
  5797. },
  5798. };
  5799. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  5800. {
  5801. .name = MSM_DAILINK_NAME(ASM Loopback),
  5802. .stream_name = "MultiMedia6",
  5803. .cpu_dai_name = "MultiMedia6",
  5804. .platform_name = "msm-pcm-loopback",
  5805. .dynamic = 1,
  5806. .dpcm_playback = 1,
  5807. .dpcm_capture = 1,
  5808. .codec_dai_name = "snd-soc-dummy-dai",
  5809. .codec_name = "snd-soc-dummy",
  5810. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5811. SND_SOC_DPCM_TRIGGER_POST},
  5812. .ignore_suspend = 1,
  5813. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5814. .ignore_pmdown_time = 1,
  5815. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  5816. },
  5817. {
  5818. .name = "USB Audio Hostless",
  5819. .stream_name = "USB Audio Hostless",
  5820. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  5821. .platform_name = "msm-pcm-hostless",
  5822. .dynamic = 1,
  5823. .dpcm_playback = 1,
  5824. .dpcm_capture = 1,
  5825. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5826. SND_SOC_DPCM_TRIGGER_POST},
  5827. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5828. .ignore_suspend = 1,
  5829. .ignore_pmdown_time = 1,
  5830. .codec_dai_name = "snd-soc-dummy-dai",
  5831. .codec_name = "snd-soc-dummy",
  5832. },
  5833. };
  5834. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  5835. /* Backend AFE DAI Links */
  5836. {
  5837. .name = LPASS_BE_AFE_PCM_RX,
  5838. .stream_name = "AFE Playback",
  5839. .cpu_dai_name = "msm-dai-q6-dev.224",
  5840. .platform_name = "msm-pcm-routing",
  5841. .codec_name = "msm-stub-codec.1",
  5842. .codec_dai_name = "msm-stub-rx",
  5843. .no_pcm = 1,
  5844. .dpcm_playback = 1,
  5845. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  5846. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5847. /* this dainlink has playback support */
  5848. .ignore_pmdown_time = 1,
  5849. .ignore_suspend = 1,
  5850. },
  5851. {
  5852. .name = LPASS_BE_AFE_PCM_TX,
  5853. .stream_name = "AFE Capture",
  5854. .cpu_dai_name = "msm-dai-q6-dev.225",
  5855. .platform_name = "msm-pcm-routing",
  5856. .codec_name = "msm-stub-codec.1",
  5857. .codec_dai_name = "msm-stub-tx",
  5858. .no_pcm = 1,
  5859. .dpcm_capture = 1,
  5860. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  5861. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5862. .ignore_suspend = 1,
  5863. },
  5864. /* Incall Record Uplink BACK END DAI Link */
  5865. {
  5866. .name = LPASS_BE_INCALL_RECORD_TX,
  5867. .stream_name = "Voice Uplink Capture",
  5868. .cpu_dai_name = "msm-dai-q6-dev.32772",
  5869. .platform_name = "msm-pcm-routing",
  5870. .codec_name = "msm-stub-codec.1",
  5871. .codec_dai_name = "msm-stub-tx",
  5872. .no_pcm = 1,
  5873. .dpcm_capture = 1,
  5874. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  5875. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5876. .ignore_suspend = 1,
  5877. },
  5878. /* Incall Record Downlink BACK END DAI Link */
  5879. {
  5880. .name = LPASS_BE_INCALL_RECORD_RX,
  5881. .stream_name = "Voice Downlink Capture",
  5882. .cpu_dai_name = "msm-dai-q6-dev.32771",
  5883. .platform_name = "msm-pcm-routing",
  5884. .codec_name = "msm-stub-codec.1",
  5885. .codec_dai_name = "msm-stub-tx",
  5886. .no_pcm = 1,
  5887. .dpcm_capture = 1,
  5888. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  5889. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5890. .ignore_suspend = 1,
  5891. },
  5892. /* Incall Music BACK END DAI Link */
  5893. {
  5894. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  5895. .stream_name = "Voice Farend Playback",
  5896. .cpu_dai_name = "msm-dai-q6-dev.32773",
  5897. .platform_name = "msm-pcm-routing",
  5898. .codec_name = "msm-stub-codec.1",
  5899. .codec_dai_name = "msm-stub-rx",
  5900. .no_pcm = 1,
  5901. .dpcm_playback = 1,
  5902. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  5903. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5904. .ignore_suspend = 1,
  5905. .ignore_pmdown_time = 1,
  5906. },
  5907. /* Incall Music 2 BACK END DAI Link */
  5908. {
  5909. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  5910. .stream_name = "Voice2 Farend Playback",
  5911. .cpu_dai_name = "msm-dai-q6-dev.32770",
  5912. .platform_name = "msm-pcm-routing",
  5913. .codec_name = "msm-stub-codec.1",
  5914. .codec_dai_name = "msm-stub-rx",
  5915. .no_pcm = 1,
  5916. .dpcm_playback = 1,
  5917. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  5918. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5919. .ignore_suspend = 1,
  5920. .ignore_pmdown_time = 1,
  5921. },
  5922. {
  5923. .name = LPASS_BE_USB_AUDIO_RX,
  5924. .stream_name = "USB Audio Playback",
  5925. .cpu_dai_name = "msm-dai-q6-dev.28672",
  5926. .platform_name = "msm-pcm-routing",
  5927. .codec_name = "msm-stub-codec.1",
  5928. .codec_dai_name = "msm-stub-rx",
  5929. .no_pcm = 1,
  5930. .dpcm_playback = 1,
  5931. .id = MSM_BACKEND_DAI_USB_RX,
  5932. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5933. .ignore_pmdown_time = 1,
  5934. .ignore_suspend = 1,
  5935. },
  5936. {
  5937. .name = LPASS_BE_USB_AUDIO_TX,
  5938. .stream_name = "USB Audio Capture",
  5939. .cpu_dai_name = "msm-dai-q6-dev.28673",
  5940. .platform_name = "msm-pcm-routing",
  5941. .codec_name = "msm-stub-codec.1",
  5942. .codec_dai_name = "msm-stub-tx",
  5943. .no_pcm = 1,
  5944. .dpcm_capture = 1,
  5945. .id = MSM_BACKEND_DAI_USB_TX,
  5946. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5947. .ignore_suspend = 1,
  5948. },
  5949. {
  5950. .name = LPASS_BE_PRI_TDM_RX_0,
  5951. .stream_name = "Primary TDM0 Playback",
  5952. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  5953. .platform_name = "msm-pcm-routing",
  5954. .codec_name = "msm-stub-codec.1",
  5955. .codec_dai_name = "msm-stub-rx",
  5956. .no_pcm = 1,
  5957. .dpcm_playback = 1,
  5958. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  5959. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5960. .ops = &sm6150_tdm_be_ops,
  5961. .ignore_suspend = 1,
  5962. .ignore_pmdown_time = 1,
  5963. },
  5964. {
  5965. .name = LPASS_BE_PRI_TDM_TX_0,
  5966. .stream_name = "Primary TDM0 Capture",
  5967. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  5968. .platform_name = "msm-pcm-routing",
  5969. .codec_name = "msm-stub-codec.1",
  5970. .codec_dai_name = "msm-stub-tx",
  5971. .no_pcm = 1,
  5972. .dpcm_capture = 1,
  5973. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  5974. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5975. .ops = &sm6150_tdm_be_ops,
  5976. .ignore_suspend = 1,
  5977. },
  5978. {
  5979. .name = LPASS_BE_SEC_TDM_RX_0,
  5980. .stream_name = "Secondary TDM0 Playback",
  5981. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  5982. .platform_name = "msm-pcm-routing",
  5983. .codec_name = "msm-stub-codec.1",
  5984. .codec_dai_name = "msm-stub-rx",
  5985. .no_pcm = 1,
  5986. .dpcm_playback = 1,
  5987. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  5988. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5989. .ops = &sm6150_tdm_be_ops,
  5990. .ignore_suspend = 1,
  5991. .ignore_pmdown_time = 1,
  5992. },
  5993. {
  5994. .name = LPASS_BE_SEC_TDM_TX_0,
  5995. .stream_name = "Secondary TDM0 Capture",
  5996. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  5997. .platform_name = "msm-pcm-routing",
  5998. .codec_name = "msm-stub-codec.1",
  5999. .codec_dai_name = "msm-stub-tx",
  6000. .no_pcm = 1,
  6001. .dpcm_capture = 1,
  6002. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  6003. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6004. .ops = &sm6150_tdm_be_ops,
  6005. .ignore_suspend = 1,
  6006. },
  6007. {
  6008. .name = LPASS_BE_TERT_TDM_RX_0,
  6009. .stream_name = "Tertiary TDM0 Playback",
  6010. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  6011. .platform_name = "msm-pcm-routing",
  6012. .codec_name = "msm-stub-codec.1",
  6013. .codec_dai_name = "msm-stub-rx",
  6014. .no_pcm = 1,
  6015. .dpcm_playback = 1,
  6016. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  6017. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6018. .ops = &sm6150_tdm_be_ops,
  6019. .ignore_suspend = 1,
  6020. .ignore_pmdown_time = 1,
  6021. },
  6022. {
  6023. .name = LPASS_BE_TERT_TDM_TX_0,
  6024. .stream_name = "Tertiary TDM0 Capture",
  6025. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  6026. .platform_name = "msm-pcm-routing",
  6027. .codec_name = "msm-stub-codec.1",
  6028. .codec_dai_name = "msm-stub-tx",
  6029. .no_pcm = 1,
  6030. .dpcm_capture = 1,
  6031. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  6032. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6033. .ops = &sm6150_tdm_be_ops,
  6034. .ignore_suspend = 1,
  6035. },
  6036. {
  6037. .name = LPASS_BE_QUAT_TDM_RX_0,
  6038. .stream_name = "Quaternary TDM0 Playback",
  6039. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  6040. .platform_name = "msm-pcm-routing",
  6041. .codec_name = "msm-stub-codec.1",
  6042. .codec_dai_name = "msm-stub-rx",
  6043. .no_pcm = 1,
  6044. .dpcm_playback = 1,
  6045. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  6046. .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
  6047. .ops = &sm6150_tdm_be_ops,
  6048. .ignore_suspend = 1,
  6049. .ignore_pmdown_time = 1,
  6050. },
  6051. {
  6052. .name = LPASS_BE_QUAT_TDM_TX_0,
  6053. .stream_name = "Quaternary TDM0 Capture",
  6054. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  6055. .platform_name = "msm-pcm-routing",
  6056. .codec_name = "msm-stub-codec.1",
  6057. .codec_dai_name = "msm-stub-tx",
  6058. .no_pcm = 1,
  6059. .dpcm_capture = 1,
  6060. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  6061. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6062. .ops = &sm6150_tdm_be_ops,
  6063. .ignore_suspend = 1,
  6064. },
  6065. };
  6066. static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
  6067. {
  6068. .name = LPASS_BE_SLIMBUS_0_RX,
  6069. .stream_name = "Slimbus Playback",
  6070. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6071. .platform_name = "msm-pcm-routing",
  6072. .codec_name = "tavil_codec",
  6073. .codec_dai_name = "tavil_rx1",
  6074. .no_pcm = 1,
  6075. .dpcm_playback = 1,
  6076. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6077. .init = &msm_audrx_tavil_init,
  6078. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6079. /* this dainlink has playback support */
  6080. .ignore_pmdown_time = 1,
  6081. .ignore_suspend = 1,
  6082. .ops = &msm_be_ops,
  6083. },
  6084. {
  6085. .name = LPASS_BE_SLIMBUS_0_TX,
  6086. .stream_name = "Slimbus Capture",
  6087. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6088. .platform_name = "msm-pcm-routing",
  6089. .codec_name = "tavil_codec",
  6090. .codec_dai_name = "tavil_tx1",
  6091. .no_pcm = 1,
  6092. .dpcm_capture = 1,
  6093. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6094. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6095. .ignore_suspend = 1,
  6096. .ops = &msm_be_ops,
  6097. },
  6098. {
  6099. .name = LPASS_BE_SLIMBUS_1_RX,
  6100. .stream_name = "Slimbus1 Playback",
  6101. .cpu_dai_name = "msm-dai-q6-dev.16386",
  6102. .platform_name = "msm-pcm-routing",
  6103. .codec_name = "tavil_codec",
  6104. .codec_dai_name = "tavil_rx1",
  6105. .no_pcm = 1,
  6106. .dpcm_playback = 1,
  6107. .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
  6108. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6109. .ops = &msm_be_ops,
  6110. /* dai link has playback support */
  6111. .ignore_pmdown_time = 1,
  6112. .ignore_suspend = 1,
  6113. },
  6114. {
  6115. .name = LPASS_BE_SLIMBUS_1_TX,
  6116. .stream_name = "Slimbus1 Capture",
  6117. .cpu_dai_name = "msm-dai-q6-dev.16387",
  6118. .platform_name = "msm-pcm-routing",
  6119. .codec_name = "tavil_codec",
  6120. .codec_dai_name = "tavil_tx3",
  6121. .no_pcm = 1,
  6122. .dpcm_capture = 1,
  6123. .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
  6124. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6125. .ops = &msm_be_ops,
  6126. .ignore_suspend = 1,
  6127. },
  6128. {
  6129. .name = LPASS_BE_SLIMBUS_2_RX,
  6130. .stream_name = "Slimbus2 Playback",
  6131. .cpu_dai_name = "msm-dai-q6-dev.16388",
  6132. .platform_name = "msm-pcm-routing",
  6133. .codec_name = "tavil_codec",
  6134. .codec_dai_name = "tavil_rx2",
  6135. .no_pcm = 1,
  6136. .dpcm_playback = 1,
  6137. .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
  6138. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6139. .ops = &msm_be_ops,
  6140. .ignore_pmdown_time = 1,
  6141. .ignore_suspend = 1,
  6142. },
  6143. {
  6144. .name = LPASS_BE_SLIMBUS_3_RX,
  6145. .stream_name = "Slimbus3 Playback",
  6146. .cpu_dai_name = "msm-dai-q6-dev.16390",
  6147. .platform_name = "msm-pcm-routing",
  6148. .codec_name = "tavil_codec",
  6149. .codec_dai_name = "tavil_rx1",
  6150. .no_pcm = 1,
  6151. .dpcm_playback = 1,
  6152. .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
  6153. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6154. .ops = &msm_be_ops,
  6155. /* dai link has playback support */
  6156. .ignore_pmdown_time = 1,
  6157. .ignore_suspend = 1,
  6158. },
  6159. {
  6160. .name = LPASS_BE_SLIMBUS_3_TX,
  6161. .stream_name = "Slimbus3 Capture",
  6162. .cpu_dai_name = "msm-dai-q6-dev.16391",
  6163. .platform_name = "msm-pcm-routing",
  6164. .codec_name = "tavil_codec",
  6165. .codec_dai_name = "tavil_tx1",
  6166. .no_pcm = 1,
  6167. .dpcm_capture = 1,
  6168. .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
  6169. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6170. .ops = &msm_be_ops,
  6171. .ignore_suspend = 1,
  6172. },
  6173. {
  6174. .name = LPASS_BE_SLIMBUS_4_RX,
  6175. .stream_name = "Slimbus4 Playback",
  6176. .cpu_dai_name = "msm-dai-q6-dev.16392",
  6177. .platform_name = "msm-pcm-routing",
  6178. .codec_name = "tavil_codec",
  6179. .codec_dai_name = "tavil_rx1",
  6180. .no_pcm = 1,
  6181. .dpcm_playback = 1,
  6182. .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
  6183. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6184. .ops = &msm_be_ops,
  6185. /* dai link has playback support */
  6186. .ignore_pmdown_time = 1,
  6187. .ignore_suspend = 1,
  6188. },
  6189. {
  6190. .name = LPASS_BE_SLIMBUS_5_RX,
  6191. .stream_name = "Slimbus5 Playback",
  6192. .cpu_dai_name = "msm-dai-q6-dev.16394",
  6193. .platform_name = "msm-pcm-routing",
  6194. .codec_name = "tavil_codec",
  6195. .codec_dai_name = "tavil_rx3",
  6196. .no_pcm = 1,
  6197. .dpcm_playback = 1,
  6198. .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
  6199. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6200. .ops = &msm_be_ops,
  6201. /* dai link has playback support */
  6202. .ignore_pmdown_time = 1,
  6203. .ignore_suspend = 1,
  6204. },
  6205. /* MAD BE */
  6206. {
  6207. .name = LPASS_BE_SLIMBUS_5_TX,
  6208. .stream_name = "Slimbus5 Capture",
  6209. .cpu_dai_name = "msm-dai-q6-dev.16395",
  6210. .platform_name = "msm-pcm-routing",
  6211. .codec_name = "tavil_codec",
  6212. .codec_dai_name = "tavil_mad1",
  6213. .no_pcm = 1,
  6214. .dpcm_capture = 1,
  6215. .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
  6216. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6217. .ops = &msm_be_ops,
  6218. .ignore_suspend = 1,
  6219. },
  6220. {
  6221. .name = LPASS_BE_SLIMBUS_6_RX,
  6222. .stream_name = "Slimbus6 Playback",
  6223. .cpu_dai_name = "msm-dai-q6-dev.16396",
  6224. .platform_name = "msm-pcm-routing",
  6225. .codec_name = "tavil_codec",
  6226. .codec_dai_name = "tavil_rx4",
  6227. .no_pcm = 1,
  6228. .dpcm_playback = 1,
  6229. .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
  6230. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6231. .ops = &msm_be_ops,
  6232. /* dai link has playback support */
  6233. .ignore_pmdown_time = 1,
  6234. .ignore_suspend = 1,
  6235. },
  6236. /* Slimbus VI Recording */
  6237. {
  6238. .name = LPASS_BE_SLIMBUS_TX_VI,
  6239. .stream_name = "Slimbus4 Capture",
  6240. .cpu_dai_name = "msm-dai-q6-dev.16393",
  6241. .platform_name = "msm-pcm-routing",
  6242. .codec_name = "tavil_codec",
  6243. .codec_dai_name = "tavil_vifeedback",
  6244. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  6245. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6246. .ops = &msm_be_ops,
  6247. .ignore_suspend = 1,
  6248. .no_pcm = 1,
  6249. .dpcm_capture = 1,
  6250. },
  6251. };
  6252. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  6253. {
  6254. .name = LPASS_BE_SLIMBUS_7_RX,
  6255. .stream_name = "Slimbus7 Playback",
  6256. .cpu_dai_name = "msm-dai-q6-dev.16398",
  6257. .platform_name = "msm-pcm-routing",
  6258. .codec_name = "btfmslim_slave",
  6259. /* BT codec driver determines capabilities based on
  6260. * dai name, bt codecdai name should always contains
  6261. * supported usecase information
  6262. */
  6263. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  6264. .no_pcm = 1,
  6265. .dpcm_playback = 1,
  6266. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  6267. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6268. .ops = &msm_wcn_ops,
  6269. /* dai link has playback support */
  6270. .ignore_pmdown_time = 1,
  6271. .ignore_suspend = 1,
  6272. },
  6273. {
  6274. .name = LPASS_BE_SLIMBUS_7_TX,
  6275. .stream_name = "Slimbus7 Capture",
  6276. .cpu_dai_name = "msm-dai-q6-dev.16399",
  6277. .platform_name = "msm-pcm-routing",
  6278. .codec_name = "btfmslim_slave",
  6279. .codec_dai_name = "btfm_bt_sco_slim_tx",
  6280. .no_pcm = 1,
  6281. .dpcm_capture = 1,
  6282. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  6283. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6284. .ops = &msm_wcn_ops,
  6285. .ignore_suspend = 1,
  6286. },
  6287. {
  6288. .name = LPASS_BE_SLIMBUS_8_TX,
  6289. .stream_name = "Slimbus8 Capture",
  6290. .cpu_dai_name = "msm-dai-q6-dev.16401",
  6291. .platform_name = "msm-pcm-routing",
  6292. .codec_name = "btfmslim_slave",
  6293. .codec_dai_name = "btfm_fm_slim_tx",
  6294. .no_pcm = 1,
  6295. .dpcm_capture = 1,
  6296. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  6297. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6298. .init = &msm_wcn_init,
  6299. .ops = &msm_wcn_ops,
  6300. .ignore_suspend = 1,
  6301. },
  6302. };
  6303. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  6304. /* DISP PORT BACK END DAI Link */
  6305. {
  6306. .name = LPASS_BE_DISPLAY_PORT,
  6307. .stream_name = "Display Port Playback",
  6308. .cpu_dai_name = "msm-dai-q6-dp.24608",
  6309. .platform_name = "msm-pcm-routing",
  6310. .codec_name = "msm-ext-disp-audio-codec-rx",
  6311. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  6312. .no_pcm = 1,
  6313. .dpcm_playback = 1,
  6314. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  6315. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6316. .ignore_pmdown_time = 1,
  6317. .ignore_suspend = 1,
  6318. },
  6319. };
  6320. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  6321. {
  6322. .name = LPASS_BE_PRI_MI2S_RX,
  6323. .stream_name = "Primary MI2S Playback",
  6324. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6325. .platform_name = "msm-pcm-routing",
  6326. .codec_name = "msm-stub-codec.1",
  6327. .codec_dai_name = "msm-stub-rx",
  6328. .no_pcm = 1,
  6329. .dpcm_playback = 1,
  6330. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  6331. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6332. .ops = &msm_mi2s_be_ops,
  6333. .ignore_suspend = 1,
  6334. .ignore_pmdown_time = 1,
  6335. },
  6336. {
  6337. .name = LPASS_BE_PRI_MI2S_TX,
  6338. .stream_name = "Primary MI2S Capture",
  6339. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6340. .platform_name = "msm-pcm-routing",
  6341. .codec_name = "msm-stub-codec.1",
  6342. .codec_dai_name = "msm-stub-tx",
  6343. .no_pcm = 1,
  6344. .dpcm_capture = 1,
  6345. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  6346. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6347. .ops = &msm_mi2s_be_ops,
  6348. .ignore_suspend = 1,
  6349. },
  6350. {
  6351. .name = LPASS_BE_SEC_MI2S_RX,
  6352. .stream_name = "Secondary MI2S Playback",
  6353. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6354. .platform_name = "msm-pcm-routing",
  6355. .codec_name = "msm-stub-codec.1",
  6356. .codec_dai_name = "msm-stub-rx",
  6357. .no_pcm = 1,
  6358. .dpcm_playback = 1,
  6359. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  6360. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6361. .ops = &msm_mi2s_be_ops,
  6362. .ignore_suspend = 1,
  6363. .ignore_pmdown_time = 1,
  6364. },
  6365. {
  6366. .name = LPASS_BE_SEC_MI2S_TX,
  6367. .stream_name = "Secondary MI2S Capture",
  6368. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6369. .platform_name = "msm-pcm-routing",
  6370. .codec_name = "msm-stub-codec.1",
  6371. .codec_dai_name = "msm-stub-tx",
  6372. .no_pcm = 1,
  6373. .dpcm_capture = 1,
  6374. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  6375. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6376. .ops = &msm_mi2s_be_ops,
  6377. .ignore_suspend = 1,
  6378. },
  6379. {
  6380. .name = LPASS_BE_TERT_MI2S_RX,
  6381. .stream_name = "Tertiary MI2S Playback",
  6382. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6383. .platform_name = "msm-pcm-routing",
  6384. .codec_name = "msm-stub-codec.1",
  6385. .codec_dai_name = "msm-stub-rx",
  6386. .no_pcm = 1,
  6387. .dpcm_playback = 1,
  6388. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  6389. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6390. .ops = &msm_mi2s_be_ops,
  6391. .ignore_suspend = 1,
  6392. .ignore_pmdown_time = 1,
  6393. },
  6394. {
  6395. .name = LPASS_BE_TERT_MI2S_TX,
  6396. .stream_name = "Tertiary MI2S Capture",
  6397. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6398. .platform_name = "msm-pcm-routing",
  6399. .codec_name = "msm-stub-codec.1",
  6400. .codec_dai_name = "msm-stub-tx",
  6401. .no_pcm = 1,
  6402. .dpcm_capture = 1,
  6403. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  6404. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6405. .ops = &msm_mi2s_be_ops,
  6406. .ignore_suspend = 1,
  6407. },
  6408. {
  6409. .name = LPASS_BE_QUAT_MI2S_RX,
  6410. .stream_name = "Quaternary MI2S Playback",
  6411. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6412. .platform_name = "msm-pcm-routing",
  6413. .codec_name = "msm-stub-codec.1",
  6414. .codec_dai_name = "msm-stub-rx",
  6415. .no_pcm = 1,
  6416. .dpcm_playback = 1,
  6417. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  6418. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6419. .ops = &msm_mi2s_be_ops,
  6420. .ignore_suspend = 1,
  6421. .ignore_pmdown_time = 1,
  6422. },
  6423. {
  6424. .name = LPASS_BE_QUAT_MI2S_TX,
  6425. .stream_name = "Quaternary MI2S Capture",
  6426. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6427. .platform_name = "msm-pcm-routing",
  6428. .codec_name = "msm-stub-codec.1",
  6429. .codec_dai_name = "msm-stub-tx",
  6430. .no_pcm = 1,
  6431. .dpcm_capture = 1,
  6432. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  6433. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6434. .ops = &msm_mi2s_be_ops,
  6435. .ignore_suspend = 1,
  6436. },
  6437. {
  6438. .name = LPASS_BE_QUIN_MI2S_RX,
  6439. .stream_name = "Quinary MI2S Playback",
  6440. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6441. .platform_name = "msm-pcm-routing",
  6442. .codec_name = "msm-stub-codec.1",
  6443. .codec_dai_name = "msm-stub-rx",
  6444. .no_pcm = 1,
  6445. .dpcm_playback = 1,
  6446. .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
  6447. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6448. .ops = &msm_mi2s_be_ops,
  6449. .ignore_suspend = 1,
  6450. .ignore_pmdown_time = 1,
  6451. },
  6452. {
  6453. .name = LPASS_BE_QUIN_MI2S_TX,
  6454. .stream_name = "Quinary MI2S Capture",
  6455. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6456. .platform_name = "msm-pcm-routing",
  6457. .codec_name = "msm-stub-codec.1",
  6458. .codec_dai_name = "msm-stub-tx",
  6459. .no_pcm = 1,
  6460. .dpcm_capture = 1,
  6461. .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
  6462. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6463. .ops = &msm_mi2s_be_ops,
  6464. .ignore_suspend = 1,
  6465. },
  6466. };
  6467. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  6468. /* Primary AUX PCM Backend DAI Links */
  6469. {
  6470. .name = LPASS_BE_AUXPCM_RX,
  6471. .stream_name = "AUX PCM Playback",
  6472. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6473. .platform_name = "msm-pcm-routing",
  6474. .codec_name = "msm-stub-codec.1",
  6475. .codec_dai_name = "msm-stub-rx",
  6476. .no_pcm = 1,
  6477. .dpcm_playback = 1,
  6478. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  6479. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6480. .ignore_pmdown_time = 1,
  6481. .ignore_suspend = 1,
  6482. },
  6483. {
  6484. .name = LPASS_BE_AUXPCM_TX,
  6485. .stream_name = "AUX PCM Capture",
  6486. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6487. .platform_name = "msm-pcm-routing",
  6488. .codec_name = "msm-stub-codec.1",
  6489. .codec_dai_name = "msm-stub-tx",
  6490. .no_pcm = 1,
  6491. .dpcm_capture = 1,
  6492. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  6493. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6494. .ignore_suspend = 1,
  6495. },
  6496. /* Secondary AUX PCM Backend DAI Links */
  6497. {
  6498. .name = LPASS_BE_SEC_AUXPCM_RX,
  6499. .stream_name = "Sec AUX PCM Playback",
  6500. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6501. .platform_name = "msm-pcm-routing",
  6502. .codec_name = "msm-stub-codec.1",
  6503. .codec_dai_name = "msm-stub-rx",
  6504. .no_pcm = 1,
  6505. .dpcm_playback = 1,
  6506. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  6507. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6508. .ignore_pmdown_time = 1,
  6509. .ignore_suspend = 1,
  6510. },
  6511. {
  6512. .name = LPASS_BE_SEC_AUXPCM_TX,
  6513. .stream_name = "Sec AUX PCM Capture",
  6514. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6515. .platform_name = "msm-pcm-routing",
  6516. .codec_name = "msm-stub-codec.1",
  6517. .codec_dai_name = "msm-stub-tx",
  6518. .no_pcm = 1,
  6519. .dpcm_capture = 1,
  6520. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  6521. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6522. .ignore_suspend = 1,
  6523. },
  6524. /* Tertiary AUX PCM Backend DAI Links */
  6525. {
  6526. .name = LPASS_BE_TERT_AUXPCM_RX,
  6527. .stream_name = "Tert AUX PCM Playback",
  6528. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6529. .platform_name = "msm-pcm-routing",
  6530. .codec_name = "msm-stub-codec.1",
  6531. .codec_dai_name = "msm-stub-rx",
  6532. .no_pcm = 1,
  6533. .dpcm_playback = 1,
  6534. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  6535. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6536. .ignore_suspend = 1,
  6537. },
  6538. {
  6539. .name = LPASS_BE_TERT_AUXPCM_TX,
  6540. .stream_name = "Tert AUX PCM Capture",
  6541. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6542. .platform_name = "msm-pcm-routing",
  6543. .codec_name = "msm-stub-codec.1",
  6544. .codec_dai_name = "msm-stub-tx",
  6545. .no_pcm = 1,
  6546. .dpcm_capture = 1,
  6547. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  6548. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6549. .ignore_suspend = 1,
  6550. },
  6551. /* Quaternary AUX PCM Backend DAI Links */
  6552. {
  6553. .name = LPASS_BE_QUAT_AUXPCM_RX,
  6554. .stream_name = "Quat AUX PCM Playback",
  6555. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6556. .platform_name = "msm-pcm-routing",
  6557. .codec_name = "msm-stub-codec.1",
  6558. .codec_dai_name = "msm-stub-rx",
  6559. .no_pcm = 1,
  6560. .dpcm_playback = 1,
  6561. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  6562. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6563. .ignore_pmdown_time = 1,
  6564. .ignore_suspend = 1,
  6565. },
  6566. {
  6567. .name = LPASS_BE_QUAT_AUXPCM_TX,
  6568. .stream_name = "Quat AUX PCM Capture",
  6569. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6570. .platform_name = "msm-pcm-routing",
  6571. .codec_name = "msm-stub-codec.1",
  6572. .codec_dai_name = "msm-stub-tx",
  6573. .no_pcm = 1,
  6574. .dpcm_capture = 1,
  6575. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  6576. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6577. .ignore_suspend = 1,
  6578. },
  6579. /* Quinary AUX PCM Backend DAI Links */
  6580. {
  6581. .name = LPASS_BE_QUIN_AUXPCM_RX,
  6582. .stream_name = "Quin AUX PCM Playback",
  6583. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6584. .platform_name = "msm-pcm-routing",
  6585. .codec_name = "msm-stub-codec.1",
  6586. .codec_dai_name = "msm-stub-rx",
  6587. .no_pcm = 1,
  6588. .dpcm_playback = 1,
  6589. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
  6590. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6591. .ignore_pmdown_time = 1,
  6592. .ignore_suspend = 1,
  6593. },
  6594. {
  6595. .name = LPASS_BE_QUIN_AUXPCM_TX,
  6596. .stream_name = "Quin AUX PCM Capture",
  6597. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6598. .platform_name = "msm-pcm-routing",
  6599. .codec_name = "msm-stub-codec.1",
  6600. .codec_dai_name = "msm-stub-tx",
  6601. .no_pcm = 1,
  6602. .dpcm_capture = 1,
  6603. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
  6604. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6605. .ignore_suspend = 1,
  6606. },
  6607. };
  6608. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  6609. /* WSA CDC DMA Backend DAI Links */
  6610. {
  6611. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  6612. .stream_name = "WSA CDC DMA0 Playback",
  6613. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  6614. .platform_name = "msm-pcm-routing",
  6615. .codec_name = "bolero_codec",
  6616. .codec_dai_name = "wsa_macro_rx1",
  6617. .no_pcm = 1,
  6618. .dpcm_playback = 1,
  6619. .init = &msm_int_audrx_init,
  6620. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  6621. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6622. .ignore_pmdown_time = 1,
  6623. .ignore_suspend = 1,
  6624. .ops = &msm_cdc_dma_be_ops,
  6625. },
  6626. {
  6627. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  6628. .stream_name = "WSA CDC DMA1 Playback",
  6629. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  6630. .platform_name = "msm-pcm-routing",
  6631. .codec_name = "bolero_codec",
  6632. .codec_dai_name = "wsa_macro_rx_mix",
  6633. .no_pcm = 1,
  6634. .dpcm_playback = 1,
  6635. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  6636. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6637. .ignore_pmdown_time = 1,
  6638. .ignore_suspend = 1,
  6639. .ops = &msm_cdc_dma_be_ops,
  6640. },
  6641. {
  6642. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  6643. .stream_name = "WSA CDC DMA1 Capture",
  6644. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  6645. .platform_name = "msm-pcm-routing",
  6646. .codec_name = "bolero_codec",
  6647. .codec_dai_name = "wsa_macro_echo",
  6648. .no_pcm = 1,
  6649. .dpcm_capture = 1,
  6650. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  6651. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6652. .ignore_suspend = 1,
  6653. .ops = &msm_cdc_dma_be_ops,
  6654. },
  6655. };
  6656. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  6657. /* RX CDC DMA Backend DAI Links */
  6658. {
  6659. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  6660. .stream_name = "RX CDC DMA0 Playback",
  6661. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  6662. .platform_name = "msm-pcm-routing",
  6663. .codec_name = "bolero_codec",
  6664. .codec_dai_name = "rx_macro_rx1",
  6665. .no_pcm = 1,
  6666. .dpcm_playback = 1,
  6667. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  6668. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6669. .ignore_pmdown_time = 1,
  6670. .ignore_suspend = 1,
  6671. .ops = &msm_cdc_dma_be_ops,
  6672. },
  6673. {
  6674. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  6675. .stream_name = "RX CDC DMA1 Playback",
  6676. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  6677. .platform_name = "msm-pcm-routing",
  6678. .codec_name = "bolero_codec",
  6679. .codec_dai_name = "rx_macro_rx2",
  6680. .no_pcm = 1,
  6681. .dpcm_playback = 1,
  6682. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  6683. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6684. .ignore_pmdown_time = 1,
  6685. .ignore_suspend = 1,
  6686. .ops = &msm_cdc_dma_be_ops,
  6687. },
  6688. {
  6689. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  6690. .stream_name = "RX CDC DMA2 Playback",
  6691. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  6692. .platform_name = "msm-pcm-routing",
  6693. .codec_name = "bolero_codec",
  6694. .codec_dai_name = "rx_macro_rx3",
  6695. .no_pcm = 1,
  6696. .dpcm_playback = 1,
  6697. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  6698. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6699. .ignore_pmdown_time = 1,
  6700. .ignore_suspend = 1,
  6701. .ops = &msm_cdc_dma_be_ops,
  6702. },
  6703. {
  6704. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  6705. .stream_name = "RX CDC DMA3 Playback",
  6706. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  6707. .platform_name = "msm-pcm-routing",
  6708. .codec_name = "bolero_codec",
  6709. .codec_dai_name = "rx_macro_rx4",
  6710. .no_pcm = 1,
  6711. .dpcm_playback = 1,
  6712. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  6713. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6714. .ignore_pmdown_time = 1,
  6715. .ignore_suspend = 1,
  6716. .ops = &msm_cdc_dma_be_ops,
  6717. },
  6718. /* TX CDC DMA Backend DAI Links */
  6719. {
  6720. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  6721. .stream_name = "TX CDC DMA3 Capture",
  6722. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  6723. .platform_name = "msm-pcm-routing",
  6724. .codec_name = "bolero_codec",
  6725. .codec_dai_name = "tx_macro_tx1",
  6726. .no_pcm = 1,
  6727. .dpcm_capture = 1,
  6728. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  6729. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6730. .ignore_suspend = 1,
  6731. .ops = &msm_cdc_dma_be_ops,
  6732. },
  6733. {
  6734. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  6735. .stream_name = "TX CDC DMA4 Capture",
  6736. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  6737. .platform_name = "msm-pcm-routing",
  6738. .codec_name = "bolero_codec",
  6739. .codec_dai_name = "tx_macro_tx2",
  6740. .no_pcm = 1,
  6741. .dpcm_capture = 1,
  6742. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  6743. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6744. .ignore_suspend = 1,
  6745. .ops = &msm_cdc_dma_be_ops,
  6746. },
  6747. };
  6748. static struct snd_soc_dai_link msm_sm6150_dai_links[
  6749. ARRAY_SIZE(msm_common_dai_links) +
  6750. ARRAY_SIZE(msm_tavil_fe_dai_links) +
  6751. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  6752. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  6753. ARRAY_SIZE(msm_common_be_dai_links) +
  6754. ARRAY_SIZE(msm_tavil_be_dai_links) +
  6755. ARRAY_SIZE(msm_wcn_be_dai_links) +
  6756. ARRAY_SIZE(ext_disp_be_dai_link) +
  6757. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  6758. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  6759. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  6760. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
  6761. static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
  6762. {
  6763. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  6764. struct snd_soc_pcm_runtime *rtd;
  6765. int ret = 0;
  6766. void *mbhc_calibration;
  6767. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  6768. if (!rtd) {
  6769. dev_err(card->dev,
  6770. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  6771. __func__, be_dl_name);
  6772. ret = -EINVAL;
  6773. goto err_pcm_runtime;
  6774. }
  6775. mbhc_calibration = def_wcd_mbhc_cal();
  6776. if (!mbhc_calibration) {
  6777. ret = -ENOMEM;
  6778. goto err_mbhc_cal;
  6779. }
  6780. wcd_mbhc_cfg.calibration = mbhc_calibration;
  6781. ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
  6782. if (ret) {
  6783. dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
  6784. __func__, ret);
  6785. goto err_hs_detect;
  6786. }
  6787. return 0;
  6788. err_hs_detect:
  6789. kfree(mbhc_calibration);
  6790. err_mbhc_cal:
  6791. err_pcm_runtime:
  6792. return ret;
  6793. }
  6794. static int msm_populate_dai_link_component_of_node(
  6795. struct snd_soc_card *card)
  6796. {
  6797. int i, index, ret = 0;
  6798. struct device *cdev = card->dev;
  6799. struct snd_soc_dai_link *dai_link = card->dai_link;
  6800. struct device_node *np;
  6801. if (!cdev) {
  6802. pr_err("%s: Sound card device memory NULL\n", __func__);
  6803. return -ENODEV;
  6804. }
  6805. for (i = 0; i < card->num_links; i++) {
  6806. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  6807. continue;
  6808. /* populate platform_of_node for snd card dai links */
  6809. if (dai_link[i].platform_name &&
  6810. !dai_link[i].platform_of_node) {
  6811. index = of_property_match_string(cdev->of_node,
  6812. "asoc-platform-names",
  6813. dai_link[i].platform_name);
  6814. if (index < 0) {
  6815. pr_err("%s: No match found for platform name: %s\n",
  6816. __func__, dai_link[i].platform_name);
  6817. ret = index;
  6818. goto err;
  6819. }
  6820. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  6821. index);
  6822. if (!np) {
  6823. pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
  6824. __func__, dai_link[i].platform_name,
  6825. index);
  6826. ret = -ENODEV;
  6827. goto err;
  6828. }
  6829. dai_link[i].platform_of_node = np;
  6830. dai_link[i].platform_name = NULL;
  6831. }
  6832. /* populate cpu_of_node for snd card dai links */
  6833. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  6834. index = of_property_match_string(cdev->of_node,
  6835. "asoc-cpu-names",
  6836. dai_link[i].cpu_dai_name);
  6837. if (index >= 0) {
  6838. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  6839. index);
  6840. if (!np) {
  6841. pr_err("%s: retrieving phandle for cpu dai %s failed\n",
  6842. __func__,
  6843. dai_link[i].cpu_dai_name);
  6844. ret = -ENODEV;
  6845. goto err;
  6846. }
  6847. dai_link[i].cpu_of_node = np;
  6848. dai_link[i].cpu_dai_name = NULL;
  6849. }
  6850. }
  6851. /* populate codec_of_node for snd card dai links */
  6852. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  6853. index = of_property_match_string(cdev->of_node,
  6854. "asoc-codec-names",
  6855. dai_link[i].codec_name);
  6856. if (index < 0)
  6857. continue;
  6858. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  6859. index);
  6860. if (!np) {
  6861. pr_err("%s: retrieving phandle for codec %s failed\n",
  6862. __func__, dai_link[i].codec_name);
  6863. ret = -ENODEV;
  6864. goto err;
  6865. }
  6866. dai_link[i].codec_of_node = np;
  6867. dai_link[i].codec_name = NULL;
  6868. }
  6869. }
  6870. err:
  6871. return ret;
  6872. }
  6873. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  6874. {
  6875. int ret = 0;
  6876. struct snd_soc_codec *codec = rtd->codec;
  6877. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  6878. ARRAY_SIZE(msm_tavil_snd_controls));
  6879. if (ret < 0) {
  6880. dev_err(codec->dev,
  6881. "%s: add_codec_controls failed, err = %d\n",
  6882. __func__, ret);
  6883. return ret;
  6884. }
  6885. return 0;
  6886. }
  6887. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  6888. struct snd_pcm_hw_params *params)
  6889. {
  6890. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  6891. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  6892. int ret = 0;
  6893. unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
  6894. 151};
  6895. unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
  6896. 134, 135, 136, 137, 138, 139,
  6897. 140, 141, 142, 143};
  6898. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  6899. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  6900. slim_rx_cfg[SLIM_RX_0].channels,
  6901. rx_ch);
  6902. if (ret < 0)
  6903. pr_err("%s: RX failed to set cpu chan map error %d\n",
  6904. __func__, ret);
  6905. } else {
  6906. ret = snd_soc_dai_set_channel_map(cpu_dai,
  6907. slim_tx_cfg[SLIM_TX_0].channels,
  6908. tx_ch, 0, 0);
  6909. if (ret < 0)
  6910. pr_err("%s: TX failed to set cpu chan map error %d\n",
  6911. __func__, ret);
  6912. }
  6913. return ret;
  6914. }
  6915. static struct snd_soc_ops msm_stub_be_ops = {
  6916. .hw_params = msm_snd_stub_hw_params,
  6917. };
  6918. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  6919. /* FrontEnd DAI Links */
  6920. {
  6921. .name = "MSMSTUB Media1",
  6922. .stream_name = "MultiMedia1",
  6923. .cpu_dai_name = "MultiMedia1",
  6924. .platform_name = "msm-pcm-dsp.0",
  6925. .dynamic = 1,
  6926. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  6927. .dpcm_playback = 1,
  6928. .dpcm_capture = 1,
  6929. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6930. SND_SOC_DPCM_TRIGGER_POST},
  6931. .codec_dai_name = "snd-soc-dummy-dai",
  6932. .codec_name = "snd-soc-dummy",
  6933. .ignore_suspend = 1,
  6934. /* this dainlink has playback support */
  6935. .ignore_pmdown_time = 1,
  6936. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  6937. },
  6938. };
  6939. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  6940. /* Backend DAI Links */
  6941. {
  6942. .name = LPASS_BE_SLIMBUS_0_RX,
  6943. .stream_name = "Slimbus Playback",
  6944. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6945. .platform_name = "msm-pcm-routing",
  6946. .codec_name = "msm-stub-codec.1",
  6947. .codec_dai_name = "msm-stub-rx",
  6948. .no_pcm = 1,
  6949. .dpcm_playback = 1,
  6950. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6951. .init = &msm_audrx_stub_init,
  6952. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6953. .ignore_pmdown_time = 1, /* dai link has playback support */
  6954. .ignore_suspend = 1,
  6955. .ops = &msm_stub_be_ops,
  6956. },
  6957. {
  6958. .name = LPASS_BE_SLIMBUS_0_TX,
  6959. .stream_name = "Slimbus Capture",
  6960. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6961. .platform_name = "msm-pcm-routing",
  6962. .codec_name = "msm-stub-codec.1",
  6963. .codec_dai_name = "msm-stub-tx",
  6964. .no_pcm = 1,
  6965. .dpcm_capture = 1,
  6966. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6967. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6968. .ignore_suspend = 1,
  6969. .ops = &msm_stub_be_ops,
  6970. },
  6971. };
  6972. static struct snd_soc_dai_link msm_stub_dai_links[
  6973. ARRAY_SIZE(msm_stub_fe_dai_links) +
  6974. ARRAY_SIZE(msm_stub_be_dai_links)];
  6975. struct snd_soc_card snd_soc_card_stub_msm = {
  6976. .name = "sm6150-stub-snd-card",
  6977. };
  6978. static const struct of_device_id sm6150_asoc_machine_of_match[] = {
  6979. { .compatible = "qcom,sm6150-asoc-snd",
  6980. .data = "codec"},
  6981. { .compatible = "qcom,sm6150-asoc-snd-stub",
  6982. .data = "stub_codec"},
  6983. {},
  6984. };
  6985. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  6986. {
  6987. struct snd_soc_card *card = NULL;
  6988. struct snd_soc_dai_link *dailink;
  6989. int total_links = 0, rc = 0;
  6990. u32 tavil_codec = 0, auxpcm_audio_intf = 0;
  6991. u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
  6992. u32 wcn_btfm_intf = 0;
  6993. const struct of_device_id *match;
  6994. match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
  6995. if (!match) {
  6996. dev_err(dev, "%s: No DT match found for sound card\n",
  6997. __func__);
  6998. return NULL;
  6999. }
  7000. if (!strcmp(match->data, "codec")) {
  7001. card = &snd_soc_card_sm6150_msm;
  7002. memcpy(msm_sm6150_dai_links + total_links,
  7003. msm_common_dai_links,
  7004. sizeof(msm_common_dai_links));
  7005. total_links += ARRAY_SIZE(msm_common_dai_links);
  7006. memcpy(msm_sm6150_dai_links + total_links,
  7007. msm_common_misc_fe_dai_links,
  7008. sizeof(msm_common_misc_fe_dai_links));
  7009. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  7010. rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
  7011. &tavil_codec);
  7012. if (rc) {
  7013. dev_dbg(dev, "%s: No DT match for tavil codec\n",
  7014. __func__);
  7015. } else {
  7016. if (tavil_codec) {
  7017. card->late_probe =
  7018. msm_snd_card_tavil_late_probe;
  7019. memcpy(msm_sm6150_dai_links + total_links,
  7020. msm_tavil_fe_dai_links,
  7021. sizeof(msm_tavil_fe_dai_links));
  7022. total_links +=
  7023. ARRAY_SIZE(msm_tavil_fe_dai_links);
  7024. }
  7025. }
  7026. if (!tavil_codec) {
  7027. memcpy(msm_sm6150_dai_links + total_links,
  7028. msm_bolero_fe_dai_links,
  7029. sizeof(msm_bolero_fe_dai_links));
  7030. total_links +=
  7031. ARRAY_SIZE(msm_bolero_fe_dai_links);
  7032. }
  7033. memcpy(msm_sm6150_dai_links + total_links,
  7034. msm_common_be_dai_links,
  7035. sizeof(msm_common_be_dai_links));
  7036. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  7037. if (tavil_codec) {
  7038. memcpy(msm_sm6150_dai_links + total_links,
  7039. msm_tavil_be_dai_links,
  7040. sizeof(msm_tavil_be_dai_links));
  7041. total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
  7042. } else {
  7043. memcpy(msm_sm6150_dai_links + total_links,
  7044. msm_wsa_cdc_dma_be_dai_links,
  7045. sizeof(msm_wsa_cdc_dma_be_dai_links));
  7046. total_links +=
  7047. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  7048. memcpy(msm_sm6150_dai_links + total_links,
  7049. msm_rx_tx_cdc_dma_be_dai_links,
  7050. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  7051. total_links +=
  7052. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  7053. }
  7054. rc = of_property_read_u32(dev->of_node,
  7055. "qcom,ext-disp-audio-rx",
  7056. &ext_disp_audio_intf);
  7057. if (rc) {
  7058. dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
  7059. __func__);
  7060. } else {
  7061. if (auxpcm_audio_intf) {
  7062. memcpy(msm_sm6150_dai_links + total_links,
  7063. ext_disp_be_dai_link,
  7064. sizeof(ext_disp_be_dai_link));
  7065. total_links +=
  7066. ARRAY_SIZE(ext_disp_be_dai_link);
  7067. }
  7068. }
  7069. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  7070. &mi2s_audio_intf);
  7071. if (rc) {
  7072. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  7073. __func__);
  7074. } else {
  7075. if (mi2s_audio_intf) {
  7076. memcpy(msm_sm6150_dai_links + total_links,
  7077. msm_mi2s_be_dai_links,
  7078. sizeof(msm_mi2s_be_dai_links));
  7079. total_links +=
  7080. ARRAY_SIZE(msm_mi2s_be_dai_links);
  7081. }
  7082. }
  7083. rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
  7084. &wcn_btfm_intf);
  7085. if (rc) {
  7086. dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
  7087. __func__);
  7088. } else {
  7089. if (wcn_btfm_intf) {
  7090. memcpy(msm_sm6150_dai_links + total_links,
  7091. msm_wcn_be_dai_links,
  7092. sizeof(msm_wcn_be_dai_links));
  7093. total_links +=
  7094. ARRAY_SIZE(msm_wcn_be_dai_links);
  7095. }
  7096. }
  7097. rc = of_property_read_u32(dev->of_node,
  7098. "qcom,auxpcm-audio-intf",
  7099. &auxpcm_audio_intf);
  7100. if (rc) {
  7101. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  7102. __func__);
  7103. } else {
  7104. if (auxpcm_audio_intf) {
  7105. memcpy(msm_sm6150_dai_links + total_links,
  7106. msm_auxpcm_be_dai_links,
  7107. sizeof(msm_auxpcm_be_dai_links));
  7108. total_links +=
  7109. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  7110. }
  7111. }
  7112. dailink = msm_sm6150_dai_links;
  7113. } else if (!strcmp(match->data, "stub_codec")) {
  7114. card = &snd_soc_card_stub_msm;
  7115. memcpy(msm_stub_dai_links + total_links,
  7116. msm_stub_fe_dai_links,
  7117. sizeof(msm_stub_fe_dai_links));
  7118. total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
  7119. memcpy(msm_stub_dai_links + total_links,
  7120. msm_stub_be_dai_links,
  7121. sizeof(msm_stub_be_dai_links));
  7122. total_links += ARRAY_SIZE(msm_stub_be_dai_links);
  7123. dailink = msm_stub_dai_links;
  7124. }
  7125. if (card) {
  7126. card->dai_link = dailink;
  7127. card->num_links = total_links;
  7128. }
  7129. return card;
  7130. }
  7131. static int msm_wsa881x_init(struct snd_soc_component *component)
  7132. {
  7133. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7134. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7135. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  7136. SPKR_L_BOOST, SPKR_L_VI};
  7137. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  7138. SPKR_R_BOOST, SPKR_R_VI};
  7139. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  7140. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  7141. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7142. struct msm_asoc_mach_data *pdata;
  7143. struct snd_soc_dapm_context *dapm;
  7144. int ret = 0;
  7145. if (!codec) {
  7146. pr_err("%s codec is NULL\n", __func__);
  7147. return -EINVAL;
  7148. }
  7149. dapm = snd_soc_codec_get_dapm(codec);
  7150. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  7151. dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
  7152. __func__, codec->component.name);
  7153. wsa881x_set_channel_map(codec, &spkleft_ports[0],
  7154. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7155. &ch_rate[0], &spkleft_port_types[0]);
  7156. if (dapm->component) {
  7157. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  7158. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  7159. }
  7160. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  7161. dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
  7162. __func__, codec->component.name);
  7163. wsa881x_set_channel_map(codec, &spkright_ports[0],
  7164. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7165. &ch_rate[0], &spkright_port_types[0]);
  7166. if (dapm->component) {
  7167. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  7168. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  7169. }
  7170. } else {
  7171. dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
  7172. codec->component.name);
  7173. ret = -EINVAL;
  7174. goto err;
  7175. }
  7176. pdata = snd_soc_card_get_drvdata(component->card);
  7177. if (pdata && pdata->codec_root)
  7178. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  7179. codec);
  7180. err:
  7181. return ret;
  7182. }
  7183. static int msm_aux_codec_init(struct snd_soc_component *component)
  7184. {
  7185. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7186. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  7187. int ret = 0;
  7188. void *mbhc_calibration;
  7189. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  7190. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  7191. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  7192. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  7193. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  7194. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  7195. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  7196. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  7197. snd_soc_dapm_sync(dapm);
  7198. mbhc_calibration = def_wcd_mbhc_cal();
  7199. if (!mbhc_calibration) {
  7200. return -ENOMEM;
  7201. }
  7202. wcd_mbhc_cfg.calibration = mbhc_calibration;
  7203. ret = wcd937x_mbhc_hs_detect(codec, &wcd_mbhc_cfg);
  7204. return ret;
  7205. }
  7206. static int msm_init_aux_dev(struct platform_device *pdev,
  7207. struct snd_soc_card *card)
  7208. {
  7209. struct device_node *wsa_of_node;
  7210. struct device_node *aux_codec_of_node;
  7211. u32 wsa_max_devs;
  7212. u32 wsa_dev_cnt;
  7213. u32 codec_aux_dev_cnt = 0;
  7214. int i;
  7215. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  7216. struct aux_codec_dev_info *aux_cdc_dev_info;
  7217. const char *auxdev_name_prefix[1];
  7218. char *dev_name_str = NULL;
  7219. int found = 0;
  7220. int codecs_found = 0;
  7221. int ret = 0;
  7222. /* Get maximum WSA device count for this platform */
  7223. ret = of_property_read_u32(pdev->dev.of_node,
  7224. "qcom,wsa-max-devs", &wsa_max_devs);
  7225. if (ret) {
  7226. dev_info(&pdev->dev,
  7227. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  7228. __func__, pdev->dev.of_node->full_name, ret);
  7229. wsa_max_devs = 0;
  7230. goto codec_aux_dev;
  7231. }
  7232. if (wsa_max_devs == 0) {
  7233. dev_warn(&pdev->dev,
  7234. "%s: Max WSA devices is 0 for this target?\n",
  7235. __func__);
  7236. goto codec_aux_dev;
  7237. }
  7238. /* Get count of WSA device phandles for this platform */
  7239. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  7240. "qcom,wsa-devs", NULL);
  7241. if (wsa_dev_cnt == -ENOENT) {
  7242. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  7243. __func__);
  7244. goto err;
  7245. } else if (wsa_dev_cnt <= 0) {
  7246. dev_err(&pdev->dev,
  7247. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  7248. __func__, wsa_dev_cnt);
  7249. ret = -EINVAL;
  7250. goto err;
  7251. }
  7252. /*
  7253. * Expect total phandles count to be NOT less than maximum possible
  7254. * WSA count. However, if it is less, then assign same value to
  7255. * max count as well.
  7256. */
  7257. if (wsa_dev_cnt < wsa_max_devs) {
  7258. dev_dbg(&pdev->dev,
  7259. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  7260. __func__, wsa_max_devs, wsa_dev_cnt);
  7261. wsa_max_devs = wsa_dev_cnt;
  7262. }
  7263. /* Make sure prefix string passed for each WSA device */
  7264. ret = of_property_count_strings(pdev->dev.of_node,
  7265. "qcom,wsa-aux-dev-prefix");
  7266. if (ret != wsa_dev_cnt) {
  7267. dev_err(&pdev->dev,
  7268. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  7269. __func__, wsa_dev_cnt, ret);
  7270. ret = -EINVAL;
  7271. goto err;
  7272. }
  7273. /*
  7274. * Alloc mem to store phandle and index info of WSA device, if already
  7275. * registered with ALSA core
  7276. */
  7277. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  7278. sizeof(struct msm_wsa881x_dev_info),
  7279. GFP_KERNEL);
  7280. if (!wsa881x_dev_info) {
  7281. ret = -ENOMEM;
  7282. goto err;
  7283. }
  7284. /*
  7285. * search and check whether all WSA devices are already
  7286. * registered with ALSA core or not. If found a node, store
  7287. * the node and the index in a local array of struct for later
  7288. * use.
  7289. */
  7290. for (i = 0; i < wsa_dev_cnt; i++) {
  7291. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  7292. "qcom,wsa-devs", i);
  7293. if (unlikely(!wsa_of_node)) {
  7294. /* we should not be here */
  7295. dev_err(&pdev->dev,
  7296. "%s: wsa dev node is not present\n",
  7297. __func__);
  7298. ret = -EINVAL;
  7299. goto err;
  7300. }
  7301. if (soc_find_component(wsa_of_node, NULL)) {
  7302. /* WSA device registered with ALSA core */
  7303. wsa881x_dev_info[found].of_node = wsa_of_node;
  7304. wsa881x_dev_info[found].index = i;
  7305. found++;
  7306. if (found == wsa_max_devs)
  7307. break;
  7308. }
  7309. }
  7310. if (found < wsa_max_devs) {
  7311. dev_dbg(&pdev->dev,
  7312. "%s: failed to find %d components. Found only %d\n",
  7313. __func__, wsa_max_devs, found);
  7314. return -EPROBE_DEFER;
  7315. }
  7316. dev_info(&pdev->dev,
  7317. "%s: found %d wsa881x devices registered with ALSA core\n",
  7318. __func__, found);
  7319. codec_aux_dev:
  7320. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7321. /* Get count of aux codec device phandles for this platform */
  7322. codec_aux_dev_cnt = of_count_phandle_with_args(
  7323. pdev->dev.of_node,
  7324. "qcom,codec-aux-devs", NULL);
  7325. if (codec_aux_dev_cnt == -ENOENT) {
  7326. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  7327. __func__);
  7328. goto err;
  7329. } else if (codec_aux_dev_cnt <= 0) {
  7330. dev_err(&pdev->dev,
  7331. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  7332. __func__, codec_aux_dev_cnt);
  7333. ret = -EINVAL;
  7334. goto err;
  7335. }
  7336. /*
  7337. * Alloc mem to store phandle and index info of aux codec
  7338. * if already registered with ALSA core
  7339. */
  7340. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  7341. sizeof(struct aux_codec_dev_info),
  7342. GFP_KERNEL);
  7343. if (!aux_cdc_dev_info) {
  7344. ret = -ENOMEM;
  7345. goto err;
  7346. }
  7347. /*
  7348. * search and check whether all aux codecs are already
  7349. * registered with ALSA core or not. If found a node, store
  7350. * the node and the index in a local array of struct for later
  7351. * use.
  7352. */
  7353. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7354. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  7355. "qcom,codec-aux-devs", i);
  7356. if (unlikely(!aux_codec_of_node)) {
  7357. /* we should not be here */
  7358. dev_err(&pdev->dev,
  7359. "%s: aux codec dev node is not present\n",
  7360. __func__);
  7361. ret = -EINVAL;
  7362. goto err;
  7363. }
  7364. if (soc_find_component(aux_codec_of_node, NULL)) {
  7365. /* AUX codec registered with ALSA core */
  7366. aux_cdc_dev_info[codecs_found].of_node =
  7367. aux_codec_of_node;
  7368. aux_cdc_dev_info[codecs_found].index = i;
  7369. codecs_found++;
  7370. }
  7371. }
  7372. if (codecs_found < codec_aux_dev_cnt) {
  7373. dev_dbg(&pdev->dev,
  7374. "%s: failed to find %d components. Found only %d\n",
  7375. __func__, codec_aux_dev_cnt, codecs_found);
  7376. return -EPROBE_DEFER;
  7377. }
  7378. dev_info(&pdev->dev,
  7379. "%s: found %d AUX codecs registered with ALSA core\n",
  7380. __func__, codecs_found);
  7381. }
  7382. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  7383. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  7384. /* Alloc array of AUX devs struct */
  7385. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  7386. sizeof(struct snd_soc_aux_dev),
  7387. GFP_KERNEL);
  7388. if (!msm_aux_dev) {
  7389. ret = -ENOMEM;
  7390. goto err;
  7391. }
  7392. /* Alloc array of codec conf struct */
  7393. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  7394. sizeof(struct snd_soc_codec_conf),
  7395. GFP_KERNEL);
  7396. if (!msm_codec_conf) {
  7397. ret = -ENOMEM;
  7398. goto err;
  7399. }
  7400. for (i = 0; i < wsa_max_devs; i++) {
  7401. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  7402. GFP_KERNEL);
  7403. if (!dev_name_str) {
  7404. ret = -ENOMEM;
  7405. goto err;
  7406. }
  7407. ret = of_property_read_string_index(pdev->dev.of_node,
  7408. "qcom,wsa-aux-dev-prefix",
  7409. wsa881x_dev_info[i].index,
  7410. auxdev_name_prefix);
  7411. if (ret) {
  7412. dev_err(&pdev->dev,
  7413. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  7414. __func__, ret);
  7415. ret = -EINVAL;
  7416. goto err;
  7417. }
  7418. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  7419. msm_aux_dev[i].name = dev_name_str;
  7420. msm_aux_dev[i].codec_name = NULL;
  7421. msm_aux_dev[i].codec_of_node =
  7422. wsa881x_dev_info[i].of_node;
  7423. msm_aux_dev[i].init = msm_wsa881x_init;
  7424. msm_codec_conf[i].dev_name = NULL;
  7425. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  7426. msm_codec_conf[i].of_node =
  7427. wsa881x_dev_info[i].of_node;
  7428. }
  7429. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7430. msm_aux_dev[wsa_max_devs + i].name = NULL;
  7431. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  7432. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  7433. aux_cdc_dev_info[i].of_node;
  7434. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  7435. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  7436. msm_codec_conf[wsa_max_devs + i].name_prefix =
  7437. NULL;
  7438. msm_codec_conf[wsa_max_devs + i].of_node =
  7439. aux_cdc_dev_info[i].of_node;
  7440. }
  7441. card->codec_conf = msm_codec_conf;
  7442. card->aux_dev = msm_aux_dev;
  7443. err:
  7444. return ret;
  7445. }
  7446. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  7447. {
  7448. int count;
  7449. u32 mi2s_master_slave[MI2S_MAX];
  7450. int ret;
  7451. for (count = 0; count < MI2S_MAX; count++) {
  7452. mutex_init(&mi2s_intf_conf[count].lock);
  7453. mi2s_intf_conf[count].ref_cnt = 0;
  7454. }
  7455. ret = of_property_read_u32_array(pdev->dev.of_node,
  7456. "qcom,msm-mi2s-master",
  7457. mi2s_master_slave, MI2S_MAX);
  7458. if (ret) {
  7459. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  7460. __func__);
  7461. } else {
  7462. for (count = 0; count < MI2S_MAX; count++) {
  7463. mi2s_intf_conf[count].msm_is_mi2s_master =
  7464. mi2s_master_slave[count];
  7465. }
  7466. }
  7467. }
  7468. static void msm_i2s_auxpcm_deinit(void)
  7469. {
  7470. int count;
  7471. for (count = 0; count < MI2S_MAX; count++) {
  7472. mutex_destroy(&mi2s_intf_conf[count].lock);
  7473. mi2s_intf_conf[count].ref_cnt = 0;
  7474. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  7475. }
  7476. }
  7477. static int msm_asoc_machine_probe(struct platform_device *pdev)
  7478. {
  7479. struct snd_soc_card *card;
  7480. struct msm_asoc_mach_data *pdata;
  7481. const char *mbhc_audio_jack_type = NULL;
  7482. int ret;
  7483. if (!pdev->dev.of_node) {
  7484. dev_err(&pdev->dev, "No platform supplied from device tree\n");
  7485. return -EINVAL;
  7486. }
  7487. pdata = devm_kzalloc(&pdev->dev,
  7488. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  7489. if (!pdata)
  7490. return -ENOMEM;
  7491. card = populate_snd_card_dailinks(&pdev->dev);
  7492. if (!card) {
  7493. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  7494. ret = -EINVAL;
  7495. goto err;
  7496. }
  7497. card->dev = &pdev->dev;
  7498. platform_set_drvdata(pdev, card);
  7499. snd_soc_card_set_drvdata(card, pdata);
  7500. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  7501. if (ret) {
  7502. dev_err(&pdev->dev, "parse card name failed, err:%d\n",
  7503. ret);
  7504. goto err;
  7505. }
  7506. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  7507. if (ret) {
  7508. dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
  7509. ret);
  7510. goto err;
  7511. }
  7512. ret = msm_populate_dai_link_component_of_node(card);
  7513. if (ret) {
  7514. ret = -EPROBE_DEFER;
  7515. goto err;
  7516. }
  7517. ret = msm_init_aux_dev(pdev, card);
  7518. if (ret)
  7519. goto err;
  7520. ret = devm_snd_soc_register_card(&pdev->dev, card);
  7521. if (ret == -EPROBE_DEFER) {
  7522. if (codec_reg_done)
  7523. ret = -EINVAL;
  7524. goto err;
  7525. } else if (ret) {
  7526. dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
  7527. ret);
  7528. goto err;
  7529. }
  7530. dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
  7531. spdev = pdev;
  7532. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7533. "qcom,hph-en1-gpio", 0);
  7534. if (!pdata->hph_en1_gpio_p) {
  7535. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7536. "qcom,hph-en1-gpio",
  7537. pdev->dev.of_node->full_name);
  7538. }
  7539. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7540. "qcom,hph-en0-gpio", 0);
  7541. if (!pdata->hph_en0_gpio_p) {
  7542. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7543. "qcom,hph-en0-gpio",
  7544. pdev->dev.of_node->full_name);
  7545. }
  7546. ret = of_property_read_string(pdev->dev.of_node,
  7547. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  7548. if (ret) {
  7549. dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
  7550. "qcom,mbhc-audio-jack-type",
  7551. pdev->dev.of_node->full_name);
  7552. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  7553. } else {
  7554. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  7555. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7556. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  7557. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  7558. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7559. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  7560. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  7561. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7562. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  7563. } else {
  7564. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7565. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  7566. }
  7567. }
  7568. /*
  7569. * Parse US-Euro gpio info from DT. Report no error if us-euro
  7570. * entry is not found in DT file as some targets do not support
  7571. * US-Euro detection
  7572. */
  7573. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7574. "qcom,us-euro-gpios", 0);
  7575. if (!pdata->us_euro_gpio_p) {
  7576. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  7577. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  7578. } else {
  7579. dev_dbg(&pdev->dev, "%s detected\n",
  7580. "qcom,us-euro-gpios");
  7581. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  7582. }
  7583. /* Parse pinctrl info from devicetree */
  7584. ret = msm_get_pinctrl(pdev);
  7585. if (!ret) {
  7586. pr_debug("%s: pinctrl parsing successful\n", __func__);
  7587. } else {
  7588. dev_dbg(&pdev->dev,
  7589. "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
  7590. __func__, ret);
  7591. ret = 0;
  7592. }
  7593. msm_i2s_auxpcm_init(pdev);
  7594. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7595. is_initial_boot = true;
  7596. ret = audio_notifier_register("sm6150",
  7597. AUDIO_NOTIFIER_ADSP_DOMAIN,
  7598. &service_nb);
  7599. if (ret < 0)
  7600. pr_err("%s: Audio notifier register failed ret = %d\n",
  7601. __func__, ret);
  7602. } else {
  7603. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7604. "qcom,cdc-dmic01-gpios",
  7605. 0);
  7606. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7607. "qcom,cdc-dmic23-gpios",
  7608. 0);
  7609. }
  7610. err:
  7611. return ret;
  7612. }
  7613. static int msm_asoc_machine_remove(struct platform_device *pdev)
  7614. {
  7615. audio_notifier_deregister("sm6150");
  7616. msm_i2s_auxpcm_deinit();
  7617. return 0;
  7618. }
  7619. static struct platform_driver sm6150_asoc_machine_driver = {
  7620. .driver = {
  7621. .name = DRV_NAME,
  7622. .owner = THIS_MODULE,
  7623. .pm = &snd_soc_pm_ops,
  7624. .of_match_table = sm6150_asoc_machine_of_match,
  7625. },
  7626. .probe = msm_asoc_machine_probe,
  7627. .remove = msm_asoc_machine_remove,
  7628. };
  7629. module_platform_driver(sm6150_asoc_machine_driver);
  7630. MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
  7631. MODULE_LICENSE("GPL v2");
  7632. MODULE_ALIAS("platform:" DRV_NAME);
  7633. MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);