main.c 135 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/thermal.h>
  20. #include <linux/version.h>
  21. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  22. #include <linux/panic_notifier.h>
  23. #endif
  24. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  25. #include <soc/qcom/minidump.h>
  26. #endif
  27. #include "cnss_plat_ipc_qmi.h"
  28. #include "cnss_utils.h"
  29. #include "main.h"
  30. #include "bus.h"
  31. #include "debug.h"
  32. #include "genl.h"
  33. #include "reg.h"
  34. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  35. #include "smcinvoke.h"
  36. #include "smcinvoke_object.h"
  37. #include "IClientEnv.h"
  38. #define HW_STATE_UID 0x108
  39. #define HW_OP_GET_STATE 1
  40. #define HW_WIFI_UID 0x508
  41. #define FEATURE_NOT_SUPPORTED 12
  42. #define PERIPHERAL_NOT_FOUND 10
  43. #endif
  44. #define CNSS_DUMP_FORMAT_VER 0x11
  45. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  46. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  47. #define CNSS_DUMP_NAME "CNSS_WLAN"
  48. #define CNSS_DUMP_DESC_SIZE 0x1000
  49. #define CNSS_DUMP_SEG_VER 0x1
  50. #define FILE_SYSTEM_READY 1
  51. #define FW_READY_TIMEOUT 20000
  52. #define FW_ASSERT_TIMEOUT 5000
  53. #define CNSS_EVENT_PENDING 2989
  54. #define POWER_RESET_MIN_DELAY_MS 100
  55. #define CNSS_QUIRKS_DEFAULT 0
  56. #ifdef CONFIG_CNSS_EMULATION
  57. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  58. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  59. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  60. #else
  61. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  62. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  63. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  64. #endif
  65. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  66. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  67. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  68. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  69. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  70. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  71. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  72. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  73. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  74. #define CNSS_TIME_SYNC_PERIOD_INVALID 0xFFFFFFFF
  75. enum cnss_cal_db_op {
  76. CNSS_CAL_DB_UPLOAD,
  77. CNSS_CAL_DB_DOWNLOAD,
  78. CNSS_CAL_DB_INVALID_OP,
  79. };
  80. enum cnss_recovery_type {
  81. CNSS_WLAN_RECOVERY = 0x1,
  82. CNSS_PCSS_RECOVERY = 0x2,
  83. };
  84. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  85. #define CNSS_MAX_DEV_NUM 2
  86. static struct cnss_plat_data *plat_env[CNSS_MAX_DEV_NUM];
  87. static int plat_env_count;
  88. #else
  89. static struct cnss_plat_data *plat_env;
  90. #endif
  91. static bool cnss_allow_driver_loading;
  92. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  93. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  94. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  95. };
  96. static struct cnss_fw_files FW_FILES_DEFAULT = {
  97. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  98. "utfbd.bin", "epping.bin", "evicted.bin"
  99. };
  100. struct cnss_driver_event {
  101. struct list_head list;
  102. enum cnss_driver_event_type type;
  103. bool sync;
  104. struct completion complete;
  105. int ret;
  106. void *data;
  107. };
  108. bool cnss_check_driver_loading_allowed(void)
  109. {
  110. return cnss_allow_driver_loading;
  111. }
  112. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  113. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  114. struct cnss_plat_data *plat_priv)
  115. {
  116. cnss_pr_dbg("Set plat_priv at %d", plat_env_count);
  117. if (plat_priv) {
  118. plat_priv->plat_idx = plat_env_count;
  119. plat_env[plat_priv->plat_idx] = plat_priv;
  120. plat_env_count++;
  121. }
  122. }
  123. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device
  124. *plat_dev)
  125. {
  126. int i;
  127. if (!plat_dev)
  128. return NULL;
  129. for (i = 0; i < plat_env_count; i++) {
  130. if (plat_env[i]->plat_dev == plat_dev)
  131. return plat_env[i];
  132. }
  133. return NULL;
  134. }
  135. struct cnss_plat_data *cnss_get_first_plat_priv(struct platform_device
  136. *plat_dev)
  137. {
  138. int i;
  139. if (!plat_dev) {
  140. for (i = 0; i < plat_env_count; i++) {
  141. if (plat_env[i])
  142. return plat_env[i];
  143. }
  144. }
  145. return NULL;
  146. }
  147. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  148. {
  149. cnss_pr_dbg("Clear plat_priv at %d", plat_priv->plat_idx);
  150. plat_env[plat_priv->plat_idx] = NULL;
  151. plat_env_count--;
  152. }
  153. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  154. {
  155. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  156. "wlan_%d", plat_priv->plat_idx);
  157. return 0;
  158. }
  159. static int cnss_plat_env_available(void)
  160. {
  161. int ret = 0;
  162. if (plat_env_count >= CNSS_MAX_DEV_NUM) {
  163. cnss_pr_err("ERROR: No space to store plat_priv\n");
  164. ret = -ENOMEM;
  165. }
  166. return ret;
  167. }
  168. int cnss_get_plat_env_count(void)
  169. {
  170. return plat_env_count;
  171. }
  172. struct cnss_plat_data *cnss_get_plat_env(int index)
  173. {
  174. return plat_env[index];
  175. }
  176. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  177. {
  178. int i;
  179. for (i = 0; i < plat_env_count; i++) {
  180. if (plat_env[i]->rc_num == rc_num)
  181. return plat_env[i];
  182. }
  183. return NULL;
  184. }
  185. static inline int
  186. cnss_get_qrtr_node_id(struct cnss_plat_data *plat_priv)
  187. {
  188. return of_property_read_u32(plat_priv->dev_node,
  189. "qcom,qrtr_node_id", &plat_priv->qrtr_node_id);
  190. }
  191. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  192. {
  193. int ret = 0;
  194. ret = cnss_get_qrtr_node_id(plat_priv);
  195. if (ret) {
  196. cnss_pr_warn("Failed to find qrtr_node_id err=%d\n", ret);
  197. plat_priv->qrtr_node_id = 0;
  198. plat_priv->wlfw_service_instance_id = 0;
  199. } else {
  200. plat_priv->wlfw_service_instance_id = plat_priv->qrtr_node_id +
  201. QRTR_NODE_FW_ID_BASE;
  202. cnss_pr_dbg("service_instance_id=0x%x\n",
  203. plat_priv->wlfw_service_instance_id);
  204. }
  205. }
  206. static inline int
  207. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  208. {
  209. return of_property_read_string(plat_priv->plat_dev->dev.of_node,
  210. "qcom,pld_bus_ops_name",
  211. &plat_priv->pld_bus_ops_name);
  212. }
  213. #else
  214. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  215. struct cnss_plat_data *plat_priv)
  216. {
  217. plat_env = plat_priv;
  218. }
  219. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  220. {
  221. return plat_env;
  222. }
  223. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  224. {
  225. plat_env = NULL;
  226. }
  227. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  228. {
  229. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  230. "wlan");
  231. return 0;
  232. }
  233. static int cnss_plat_env_available(void)
  234. {
  235. return 0;
  236. }
  237. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  238. {
  239. return cnss_bus_dev_to_plat_priv(NULL);
  240. }
  241. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  242. {
  243. }
  244. static int
  245. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  246. {
  247. return 0;
  248. }
  249. #endif
  250. void cnss_get_sleep_clk_supported(struct cnss_plat_data *plat_priv)
  251. {
  252. plat_priv->sleep_clk = of_property_read_bool(plat_priv->dev_node,
  253. "qcom,sleep-clk-support");
  254. cnss_pr_dbg("qcom,sleep-clk-support is %d\n",
  255. plat_priv->sleep_clk);
  256. }
  257. void cnss_get_bwscal_info(struct cnss_plat_data *plat_priv)
  258. {
  259. plat_priv->no_bwscale = of_property_read_bool(plat_priv->dev_node,
  260. "qcom,no-bwscale");
  261. }
  262. static inline int
  263. cnss_get_rc_num(struct cnss_plat_data *plat_priv)
  264. {
  265. return of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  266. "qcom,wlan-rc-num", &plat_priv->rc_num);
  267. }
  268. bool cnss_is_dual_wlan_enabled(void)
  269. {
  270. return IS_ENABLED(CONFIG_CNSS_SUPPORT_DUAL_DEV);
  271. }
  272. /**
  273. * cnss_get_mem_seg_count - Get segment count of memory
  274. * @type: memory type
  275. * @seg: segment count
  276. *
  277. * Return: 0 on success, negative value on failure
  278. */
  279. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  280. {
  281. struct cnss_plat_data *plat_priv;
  282. plat_priv = cnss_get_plat_priv(NULL);
  283. if (!plat_priv)
  284. return -ENODEV;
  285. switch (type) {
  286. case CNSS_REMOTE_MEM_TYPE_FW:
  287. *seg = plat_priv->fw_mem_seg_len;
  288. break;
  289. case CNSS_REMOTE_MEM_TYPE_QDSS:
  290. *seg = plat_priv->qdss_mem_seg_len;
  291. break;
  292. default:
  293. return -EINVAL;
  294. }
  295. return 0;
  296. }
  297. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  298. /**
  299. * cnss_get_wifi_kobject -return wifi kobject
  300. * Return: Null, to maintain driver comnpatibilty
  301. */
  302. struct kobject *cnss_get_wifi_kobj(struct device *dev)
  303. {
  304. struct cnss_plat_data *plat_priv;
  305. plat_priv = cnss_get_plat_priv(NULL);
  306. if (!plat_priv)
  307. return NULL;
  308. return plat_priv->wifi_kobj;
  309. }
  310. EXPORT_SYMBOL(cnss_get_wifi_kobj);
  311. /**
  312. * cnss_get_mem_segment_info - Get memory info of different type
  313. * @type: memory type
  314. * @segment: array to save the segment info
  315. * @seg: segment count
  316. *
  317. * Return: 0 on success, negative value on failure
  318. */
  319. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  320. struct cnss_mem_segment segment[],
  321. u32 segment_count)
  322. {
  323. struct cnss_plat_data *plat_priv;
  324. u32 i;
  325. plat_priv = cnss_get_plat_priv(NULL);
  326. if (!plat_priv)
  327. return -ENODEV;
  328. switch (type) {
  329. case CNSS_REMOTE_MEM_TYPE_FW:
  330. if (segment_count > plat_priv->fw_mem_seg_len)
  331. segment_count = plat_priv->fw_mem_seg_len;
  332. for (i = 0; i < segment_count; i++) {
  333. segment[i].size = plat_priv->fw_mem[i].size;
  334. segment[i].va = plat_priv->fw_mem[i].va;
  335. segment[i].pa = plat_priv->fw_mem[i].pa;
  336. }
  337. break;
  338. case CNSS_REMOTE_MEM_TYPE_QDSS:
  339. if (segment_count > plat_priv->qdss_mem_seg_len)
  340. segment_count = plat_priv->qdss_mem_seg_len;
  341. for (i = 0; i < segment_count; i++) {
  342. segment[i].size = plat_priv->qdss_mem[i].size;
  343. segment[i].va = plat_priv->qdss_mem[i].va;
  344. segment[i].pa = plat_priv->qdss_mem[i].pa;
  345. }
  346. break;
  347. default:
  348. return -EINVAL;
  349. }
  350. return 0;
  351. }
  352. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  353. static int cnss_get_audio_iommu_domain(struct cnss_plat_data *plat_priv)
  354. {
  355. struct device_node *audio_ion_node;
  356. struct platform_device *audio_ion_pdev;
  357. audio_ion_node = of_find_compatible_node(NULL, NULL,
  358. "qcom,msm-audio-ion");
  359. if (!audio_ion_node) {
  360. cnss_pr_err("Unable to get Audio ion node");
  361. return -EINVAL;
  362. }
  363. audio_ion_pdev = of_find_device_by_node(audio_ion_node);
  364. of_node_put(audio_ion_node);
  365. if (!audio_ion_pdev) {
  366. cnss_pr_err("Unable to get Audio ion platform device");
  367. return -EINVAL;
  368. }
  369. plat_priv->audio_iommu_domain =
  370. iommu_get_domain_for_dev(&audio_ion_pdev->dev);
  371. put_device(&audio_ion_pdev->dev);
  372. if (!plat_priv->audio_iommu_domain) {
  373. cnss_pr_err("Unable to get Audio ion iommu domain");
  374. return -EINVAL;
  375. }
  376. return 0;
  377. }
  378. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  379. enum cnss_feature_v01 feature)
  380. {
  381. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  382. return -EINVAL;
  383. plat_priv->feature_list |= 1 << feature;
  384. return 0;
  385. }
  386. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  387. enum cnss_feature_v01 feature)
  388. {
  389. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  390. return -EINVAL;
  391. plat_priv->feature_list &= ~(1 << feature);
  392. return 0;
  393. }
  394. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  395. u64 *feature_list)
  396. {
  397. if (unlikely(!plat_priv))
  398. return -EINVAL;
  399. *feature_list = plat_priv->feature_list;
  400. return 0;
  401. }
  402. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  403. {
  404. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  405. return;
  406. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  407. plat_priv->driver_state,
  408. atomic_read(&plat_priv->pm_count));
  409. pm_stay_awake(&plat_priv->plat_dev->dev);
  410. }
  411. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  412. {
  413. int r = atomic_dec_return(&plat_priv->pm_count);
  414. WARN_ON(r < 0);
  415. if (r != 0)
  416. return;
  417. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  418. plat_priv->driver_state,
  419. atomic_read(&plat_priv->pm_count));
  420. pm_relax(&plat_priv->plat_dev->dev);
  421. }
  422. int cnss_get_fw_files_for_target(struct device *dev,
  423. struct cnss_fw_files *pfw_files,
  424. u32 target_type, u32 target_version)
  425. {
  426. if (!pfw_files)
  427. return -ENODEV;
  428. switch (target_version) {
  429. case QCA6174_REV3_VERSION:
  430. case QCA6174_REV3_2_VERSION:
  431. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  432. break;
  433. default:
  434. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  435. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  436. target_type, target_version);
  437. break;
  438. }
  439. return 0;
  440. }
  441. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  442. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  443. {
  444. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  445. if (!plat_priv)
  446. return -ENODEV;
  447. if (!cap)
  448. return -EINVAL;
  449. *cap = plat_priv->cap;
  450. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  451. return 0;
  452. }
  453. EXPORT_SYMBOL(cnss_get_platform_cap);
  454. /**
  455. * cnss_get_fw_cap - Check whether FW supports specific capability or not
  456. * @dev: Device
  457. * @fw_cap: FW Capability which needs to be checked
  458. *
  459. * Return: TRUE if supported, FALSE on failure or if not supported
  460. */
  461. bool cnss_get_fw_cap(struct device *dev, enum cnss_fw_caps fw_cap)
  462. {
  463. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  464. bool is_supported = false;
  465. if (!plat_priv)
  466. return is_supported;
  467. if (!plat_priv->fw_caps)
  468. return is_supported;
  469. switch (fw_cap) {
  470. case CNSS_FW_CAP_DIRECT_LINK_SUPPORT:
  471. is_supported = !!(plat_priv->fw_caps &
  472. QMI_WLFW_DIRECT_LINK_SUPPORT_V01);
  473. if (is_supported && cnss_get_audio_iommu_domain(plat_priv))
  474. is_supported = false;
  475. break;
  476. default:
  477. cnss_pr_err("Invalid FW Capability: 0x%x\n", fw_cap);
  478. }
  479. cnss_pr_dbg("FW Capability 0x%x is %s\n", fw_cap,
  480. is_supported ? "supported" : "not supported");
  481. return is_supported;
  482. }
  483. EXPORT_SYMBOL(cnss_get_fw_cap);
  484. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  485. {
  486. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  487. if (!plat_priv)
  488. return;
  489. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  490. }
  491. EXPORT_SYMBOL(cnss_request_pm_qos);
  492. void cnss_remove_pm_qos(struct device *dev)
  493. {
  494. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  495. if (!plat_priv)
  496. return;
  497. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  498. }
  499. EXPORT_SYMBOL(cnss_remove_pm_qos);
  500. int cnss_wlan_enable(struct device *dev,
  501. struct cnss_wlan_enable_cfg *config,
  502. enum cnss_driver_mode mode,
  503. const char *host_version)
  504. {
  505. int ret = 0;
  506. struct cnss_plat_data *plat_priv;
  507. if (!dev) {
  508. cnss_pr_err("Invalid dev pointer\n");
  509. return -EINVAL;
  510. }
  511. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  512. if (!plat_priv)
  513. return -ENODEV;
  514. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  515. return 0;
  516. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  517. return 0;
  518. if (!config || !host_version) {
  519. cnss_pr_err("Invalid config or host_version pointer\n");
  520. return -EINVAL;
  521. }
  522. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  523. mode, config, host_version);
  524. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  525. goto skip_cfg;
  526. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  527. config->send_msi_ce = true;
  528. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  529. if (ret)
  530. goto out;
  531. skip_cfg:
  532. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  533. out:
  534. return ret;
  535. }
  536. EXPORT_SYMBOL(cnss_wlan_enable);
  537. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  538. {
  539. int ret = 0;
  540. struct cnss_plat_data *plat_priv;
  541. if (!dev) {
  542. cnss_pr_err("Invalid dev pointer\n");
  543. return -EINVAL;
  544. }
  545. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  546. if (!plat_priv)
  547. return -ENODEV;
  548. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  549. return 0;
  550. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  551. return 0;
  552. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  553. cnss_bus_free_qdss_mem(plat_priv);
  554. return ret;
  555. }
  556. EXPORT_SYMBOL(cnss_wlan_disable);
  557. int cnss_audio_smmu_map(struct device *dev, phys_addr_t paddr,
  558. dma_addr_t iova, size_t size)
  559. {
  560. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  561. uint32_t page_offset;
  562. if (!plat_priv)
  563. return -ENODEV;
  564. if (!plat_priv->audio_iommu_domain)
  565. return -EINVAL;
  566. page_offset = iova & (PAGE_SIZE - 1);
  567. if (page_offset + size > PAGE_SIZE)
  568. size += PAGE_SIZE;
  569. iova -= page_offset;
  570. paddr -= page_offset;
  571. return iommu_map(plat_priv->audio_iommu_domain, iova, paddr,
  572. roundup(size, PAGE_SIZE), IOMMU_READ | IOMMU_WRITE |
  573. IOMMU_CACHE);
  574. }
  575. EXPORT_SYMBOL(cnss_audio_smmu_map);
  576. void cnss_audio_smmu_unmap(struct device *dev, dma_addr_t iova, size_t size)
  577. {
  578. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  579. uint32_t page_offset;
  580. if (!plat_priv)
  581. return;
  582. if (!plat_priv->audio_iommu_domain)
  583. return;
  584. page_offset = iova & (PAGE_SIZE - 1);
  585. if (page_offset + size > PAGE_SIZE)
  586. size += PAGE_SIZE;
  587. iova -= page_offset;
  588. iommu_unmap(plat_priv->audio_iommu_domain, iova,
  589. roundup(size, PAGE_SIZE));
  590. }
  591. EXPORT_SYMBOL(cnss_audio_smmu_unmap);
  592. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  593. u32 data_len, u8 *output)
  594. {
  595. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  596. int ret = 0;
  597. if (!plat_priv) {
  598. cnss_pr_err("plat_priv is NULL!\n");
  599. return -EINVAL;
  600. }
  601. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  602. return 0;
  603. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  604. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  605. plat_priv->driver_state);
  606. ret = -EINVAL;
  607. goto out;
  608. }
  609. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  610. data_len, output);
  611. out:
  612. return ret;
  613. }
  614. EXPORT_SYMBOL(cnss_athdiag_read);
  615. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  616. u32 data_len, u8 *input)
  617. {
  618. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  619. int ret = 0;
  620. if (!plat_priv) {
  621. cnss_pr_err("plat_priv is NULL!\n");
  622. return -EINVAL;
  623. }
  624. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  625. return 0;
  626. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  627. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  628. plat_priv->driver_state);
  629. ret = -EINVAL;
  630. goto out;
  631. }
  632. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  633. data_len, input);
  634. out:
  635. return ret;
  636. }
  637. EXPORT_SYMBOL(cnss_athdiag_write);
  638. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  639. {
  640. struct cnss_plat_data *plat_priv;
  641. if (!dev) {
  642. cnss_pr_err("Invalid dev pointer\n");
  643. return -EINVAL;
  644. }
  645. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  646. if (!plat_priv)
  647. return -ENODEV;
  648. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  649. return 0;
  650. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  651. }
  652. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  653. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  654. {
  655. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  656. if (!plat_priv)
  657. return -EINVAL;
  658. if (!plat_priv->fw_pcie_gen_switch) {
  659. cnss_pr_err("Firmware does not support PCIe gen switch\n");
  660. return -EOPNOTSUPP;
  661. }
  662. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  663. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  664. return -EINVAL;
  665. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  666. plat_priv->pcie_gen_speed = pcie_gen_speed;
  667. return 0;
  668. }
  669. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  670. static bool cnss_is_aux_support_enabled(struct cnss_plat_data *plat_priv)
  671. {
  672. switch (plat_priv->device_id) {
  673. case PEACH_DEVICE_ID:
  674. if (!plat_priv->fw_aux_uc_support) {
  675. cnss_pr_dbg("FW does not support aux uc capability\n");
  676. return false;
  677. }
  678. break;
  679. default:
  680. cnss_pr_dbg("Host does not support aux uc capability\n");
  681. return false;
  682. }
  683. return true;
  684. }
  685. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  686. {
  687. int ret = 0;
  688. if (!plat_priv)
  689. return -ENODEV;
  690. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  691. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  692. if (ret)
  693. goto out;
  694. if (plat_priv->hds_enabled)
  695. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  696. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  697. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  698. plat_priv->ctrl_params.bdf_type = CNSS_BDF_BIN;
  699. cnss_wlfw_ini_file_send_sync(plat_priv, WLFW_CONN_ROAM_INI_V01);
  700. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  701. plat_priv->ctrl_params.bdf_type);
  702. if (ret)
  703. goto out;
  704. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  705. return 0;
  706. ret = cnss_bus_load_m3(plat_priv);
  707. if (ret)
  708. goto out;
  709. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  710. if (ret)
  711. goto out;
  712. if (cnss_is_aux_support_enabled(plat_priv)) {
  713. ret = cnss_bus_load_aux(plat_priv);
  714. if (ret)
  715. goto out;
  716. ret = cnss_wlfw_aux_dnld_send_sync(plat_priv);
  717. if (ret)
  718. goto out;
  719. }
  720. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  721. return 0;
  722. out:
  723. return ret;
  724. }
  725. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  726. {
  727. int ret = 0;
  728. if (!plat_priv->antenna) {
  729. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  730. if (ret)
  731. goto out;
  732. }
  733. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  734. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  735. if (ret)
  736. goto out;
  737. }
  738. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  739. if (ret)
  740. goto out;
  741. return 0;
  742. out:
  743. return ret;
  744. }
  745. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  746. {
  747. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  748. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  749. }
  750. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  751. {
  752. u32 i;
  753. int ret = 0;
  754. struct cnss_plat_ipc_daemon_config *cfg;
  755. ret = cnss_qmi_get_dms_mac(plat_priv);
  756. if (ret == 0 && plat_priv->dms.mac_valid)
  757. goto qmi_send;
  758. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  759. * Thus assert on failure to get MAC from DMS even after retries
  760. */
  761. if (plat_priv->use_nv_mac) {
  762. /* Check if Daemon says platform support DMS MAC provisioning */
  763. cfg = cnss_plat_ipc_qmi_daemon_config();
  764. if (cfg) {
  765. if (!cfg->dms_mac_addr_supported) {
  766. cnss_pr_err("DMS MAC address not supported\n");
  767. CNSS_ASSERT(0);
  768. return -EINVAL;
  769. }
  770. }
  771. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  772. if (plat_priv->dms.mac_valid)
  773. break;
  774. ret = cnss_qmi_get_dms_mac(plat_priv);
  775. if (ret == 0)
  776. break;
  777. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  778. }
  779. if (!plat_priv->dms.mac_valid) {
  780. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  781. CNSS_ASSERT(0);
  782. return -EINVAL;
  783. }
  784. }
  785. qmi_send:
  786. if (plat_priv->dms.mac_valid)
  787. ret =
  788. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  789. ARRAY_SIZE(plat_priv->dms.mac));
  790. return ret;
  791. }
  792. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  793. enum cnss_cal_db_op op, u32 *size)
  794. {
  795. int ret = 0;
  796. u32 timeout = cnss_get_timeout(plat_priv,
  797. CNSS_TIMEOUT_DAEMON_CONNECTION);
  798. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  799. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  800. if (op >= CNSS_CAL_DB_INVALID_OP)
  801. return -EINVAL;
  802. if (!plat_priv->cbc_file_download) {
  803. cnss_pr_info("CAL DB file not required as per BDF\n");
  804. return 0;
  805. }
  806. if (*size == 0) {
  807. cnss_pr_err("Invalid cal file size\n");
  808. return -EINVAL;
  809. }
  810. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  811. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  812. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  813. msecs_to_jiffies(timeout));
  814. if (!ret) {
  815. cnss_pr_err("Daemon not yet connected\n");
  816. CNSS_ASSERT(0);
  817. return ret;
  818. }
  819. }
  820. if (!plat_priv->cal_mem->va) {
  821. cnss_pr_err("CAL DB Memory not setup for FW\n");
  822. return -EINVAL;
  823. }
  824. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  825. if (op == CNSS_CAL_DB_DOWNLOAD) {
  826. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  827. ret = cnss_plat_ipc_qmi_file_download(client_id,
  828. CNSS_CAL_DB_FILE_NAME,
  829. plat_priv->cal_mem->va,
  830. size);
  831. } else {
  832. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  833. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  834. CNSS_CAL_DB_FILE_NAME,
  835. plat_priv->cal_mem->va,
  836. *size);
  837. }
  838. if (ret)
  839. cnss_pr_err("Cal DB file %s %s failure\n",
  840. CNSS_CAL_DB_FILE_NAME,
  841. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  842. else
  843. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  844. CNSS_CAL_DB_FILE_NAME,
  845. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  846. *size);
  847. return ret;
  848. }
  849. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  850. {
  851. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  852. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  853. return -EINVAL;
  854. }
  855. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  856. &plat_priv->cal_file_size);
  857. }
  858. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  859. u32 *cal_file_size)
  860. {
  861. /* To download pass the total size of cal DB mem allocated.
  862. * After cal file is download to mem, its size is updated in
  863. * return pointer
  864. */
  865. *cal_file_size = plat_priv->cal_mem->size;
  866. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  867. cal_file_size);
  868. }
  869. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  870. {
  871. int ret = 0;
  872. u32 cal_file_size = 0;
  873. if (!plat_priv)
  874. return -ENODEV;
  875. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  876. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  877. return -EINVAL;
  878. }
  879. cnss_pr_dbg("Processing FW Init Done..\n");
  880. del_timer(&plat_priv->fw_boot_timer);
  881. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  882. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  883. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  884. cnss_send_subsys_restart_level_msg(plat_priv);
  885. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  886. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  887. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  888. }
  889. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  890. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  891. CNSS_WALTEST);
  892. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  893. cnss_request_antenna_sharing(plat_priv);
  894. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  895. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  896. plat_priv->cal_time = jiffies;
  897. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  898. CNSS_CALIBRATION);
  899. } else {
  900. ret = cnss_setup_dms_mac(plat_priv);
  901. ret = cnss_bus_call_driver_probe(plat_priv);
  902. }
  903. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  904. goto out;
  905. else if (ret)
  906. goto shutdown;
  907. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  908. return 0;
  909. shutdown:
  910. cnss_bus_dev_shutdown(plat_priv);
  911. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  912. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  913. out:
  914. return ret;
  915. }
  916. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  917. {
  918. switch (type) {
  919. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  920. return "SERVER_ARRIVE";
  921. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  922. return "SERVER_EXIT";
  923. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  924. return "REQUEST_MEM";
  925. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  926. return "FW_MEM_READY";
  927. case CNSS_DRIVER_EVENT_FW_READY:
  928. return "FW_READY";
  929. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  930. return "COLD_BOOT_CAL_START";
  931. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  932. return "COLD_BOOT_CAL_DONE";
  933. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  934. return "REGISTER_DRIVER";
  935. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  936. return "UNREGISTER_DRIVER";
  937. case CNSS_DRIVER_EVENT_RECOVERY:
  938. return "RECOVERY";
  939. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  940. return "FORCE_FW_ASSERT";
  941. case CNSS_DRIVER_EVENT_POWER_UP:
  942. return "POWER_UP";
  943. case CNSS_DRIVER_EVENT_POWER_DOWN:
  944. return "POWER_DOWN";
  945. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  946. return "IDLE_RESTART";
  947. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  948. return "IDLE_SHUTDOWN";
  949. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  950. return "IMS_WFC_CALL_IND";
  951. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  952. return "WLFW_TWC_CFG_IND";
  953. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  954. return "QDSS_TRACE_REQ_MEM";
  955. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  956. return "FW_MEM_FILE_SAVE";
  957. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  958. return "QDSS_TRACE_FREE";
  959. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  960. return "QDSS_TRACE_REQ_DATA";
  961. case CNSS_DRIVER_EVENT_MAX:
  962. return "EVENT_MAX";
  963. }
  964. return "UNKNOWN";
  965. };
  966. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  967. enum cnss_driver_event_type type,
  968. u32 flags, void *data)
  969. {
  970. struct cnss_driver_event *event;
  971. unsigned long irq_flags;
  972. int gfp = GFP_KERNEL;
  973. int ret = 0;
  974. if (!plat_priv)
  975. return -ENODEV;
  976. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  977. cnss_driver_event_to_str(type), type,
  978. flags ? "-sync" : "", plat_priv->driver_state, flags);
  979. if (type >= CNSS_DRIVER_EVENT_MAX) {
  980. cnss_pr_err("Invalid Event type: %d, can't post", type);
  981. return -EINVAL;
  982. }
  983. if (in_interrupt() || irqs_disabled())
  984. gfp = GFP_ATOMIC;
  985. event = kzalloc(sizeof(*event), gfp);
  986. if (!event)
  987. return -ENOMEM;
  988. cnss_pm_stay_awake(plat_priv);
  989. event->type = type;
  990. event->data = data;
  991. init_completion(&event->complete);
  992. event->ret = CNSS_EVENT_PENDING;
  993. event->sync = !!(flags & CNSS_EVENT_SYNC);
  994. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  995. list_add_tail(&event->list, &plat_priv->event_list);
  996. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  997. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  998. if (!(flags & CNSS_EVENT_SYNC))
  999. goto out;
  1000. if (flags & CNSS_EVENT_UNKILLABLE)
  1001. wait_for_completion(&event->complete);
  1002. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  1003. ret = wait_for_completion_killable(&event->complete);
  1004. else
  1005. ret = wait_for_completion_interruptible(&event->complete);
  1006. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  1007. cnss_driver_event_to_str(type), type,
  1008. plat_priv->driver_state, ret, event->ret);
  1009. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  1010. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  1011. event->sync = false;
  1012. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1013. ret = -EINTR;
  1014. goto out;
  1015. }
  1016. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1017. ret = event->ret;
  1018. kfree(event);
  1019. out:
  1020. cnss_pm_relax(plat_priv);
  1021. return ret;
  1022. }
  1023. /**
  1024. * cnss_get_timeout - Get timeout for corresponding type.
  1025. * @plat_priv: Pointer to platform driver context.
  1026. * @cnss_timeout_type: Timeout type.
  1027. *
  1028. * Return: Timeout in milliseconds.
  1029. */
  1030. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  1031. enum cnss_timeout_type timeout_type)
  1032. {
  1033. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  1034. switch (timeout_type) {
  1035. case CNSS_TIMEOUT_QMI:
  1036. return qmi_timeout;
  1037. case CNSS_TIMEOUT_POWER_UP:
  1038. return (qmi_timeout << 2);
  1039. case CNSS_TIMEOUT_IDLE_RESTART:
  1040. /* In idle restart power up sequence, we have fw_boot_timer to
  1041. * handle FW initialization failure.
  1042. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  1043. * account for FW dump collection and FW re-initialization on
  1044. * retry.
  1045. */
  1046. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  1047. case CNSS_TIMEOUT_CALIBRATION:
  1048. /* Similar to mission mode, in CBC if FW init fails
  1049. * fw recovery is tried. Thus return 2x the CBC timeout.
  1050. */
  1051. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  1052. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  1053. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  1054. case CNSS_TIMEOUT_RDDM:
  1055. return CNSS_RDDM_TIMEOUT_MS;
  1056. case CNSS_TIMEOUT_RECOVERY:
  1057. return RECOVERY_TIMEOUT;
  1058. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  1059. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  1060. default:
  1061. return qmi_timeout;
  1062. }
  1063. }
  1064. unsigned int cnss_get_boot_timeout(struct device *dev)
  1065. {
  1066. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1067. if (!plat_priv) {
  1068. cnss_pr_err("plat_priv is NULL\n");
  1069. return 0;
  1070. }
  1071. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  1072. }
  1073. EXPORT_SYMBOL(cnss_get_boot_timeout);
  1074. int cnss_power_up(struct device *dev)
  1075. {
  1076. int ret = 0;
  1077. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1078. unsigned int timeout;
  1079. if (!plat_priv) {
  1080. cnss_pr_err("plat_priv is NULL\n");
  1081. return -ENODEV;
  1082. }
  1083. cnss_pr_dbg("Powering up device\n");
  1084. ret = cnss_driver_event_post(plat_priv,
  1085. CNSS_DRIVER_EVENT_POWER_UP,
  1086. CNSS_EVENT_SYNC, NULL);
  1087. if (ret)
  1088. goto out;
  1089. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1090. goto out;
  1091. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  1092. reinit_completion(&plat_priv->power_up_complete);
  1093. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1094. msecs_to_jiffies(timeout));
  1095. if (!ret) {
  1096. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  1097. timeout);
  1098. ret = -EAGAIN;
  1099. goto out;
  1100. }
  1101. return 0;
  1102. out:
  1103. return ret;
  1104. }
  1105. EXPORT_SYMBOL(cnss_power_up);
  1106. int cnss_power_down(struct device *dev)
  1107. {
  1108. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1109. if (!plat_priv) {
  1110. cnss_pr_err("plat_priv is NULL\n");
  1111. return -ENODEV;
  1112. }
  1113. cnss_pr_dbg("Powering down device\n");
  1114. return cnss_driver_event_post(plat_priv,
  1115. CNSS_DRIVER_EVENT_POWER_DOWN,
  1116. CNSS_EVENT_SYNC, NULL);
  1117. }
  1118. EXPORT_SYMBOL(cnss_power_down);
  1119. int cnss_idle_restart(struct device *dev)
  1120. {
  1121. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1122. unsigned int timeout;
  1123. int ret = 0;
  1124. if (!plat_priv) {
  1125. cnss_pr_err("plat_priv is NULL\n");
  1126. return -ENODEV;
  1127. }
  1128. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  1129. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  1130. return -EBUSY;
  1131. }
  1132. cnss_pr_dbg("Doing idle restart\n");
  1133. reinit_completion(&plat_priv->power_up_complete);
  1134. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1135. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1136. ret = -EINVAL;
  1137. goto out;
  1138. }
  1139. ret = cnss_driver_event_post(plat_priv,
  1140. CNSS_DRIVER_EVENT_IDLE_RESTART,
  1141. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1142. if (ret == -EINTR && plat_priv->device_id != QCA6174_DEVICE_ID)
  1143. cnss_pr_err("Idle restart has been interrupted but device power up is still in progress");
  1144. else if (ret)
  1145. goto out;
  1146. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1147. ret = cnss_bus_call_driver_probe(plat_priv);
  1148. goto out;
  1149. }
  1150. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  1151. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1152. msecs_to_jiffies(timeout));
  1153. if (plat_priv->power_up_error) {
  1154. ret = plat_priv->power_up_error;
  1155. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1156. cnss_pr_dbg("Power up error:%d, exiting\n",
  1157. plat_priv->power_up_error);
  1158. goto out;
  1159. }
  1160. if (!ret) {
  1161. /* This exception occurs after attempting retry of FW recovery.
  1162. * Thus we can safely power off the device.
  1163. */
  1164. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  1165. timeout);
  1166. ret = -ETIMEDOUT;
  1167. cnss_power_down(dev);
  1168. CNSS_ASSERT(0);
  1169. goto out;
  1170. }
  1171. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1172. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1173. del_timer(&plat_priv->fw_boot_timer);
  1174. ret = -EINVAL;
  1175. goto out;
  1176. }
  1177. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  1178. * non-DRV is supported only once after device reboots and before wifi
  1179. * is turned on. We do not allow switching back to DRV.
  1180. * To bring device back into DRV, user needs to reboot device.
  1181. */
  1182. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  1183. cnss_pr_dbg("DRV is disabled\n");
  1184. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  1185. }
  1186. mutex_unlock(&plat_priv->driver_ops_lock);
  1187. return 0;
  1188. out:
  1189. mutex_unlock(&plat_priv->driver_ops_lock);
  1190. return ret;
  1191. }
  1192. EXPORT_SYMBOL(cnss_idle_restart);
  1193. int cnss_idle_shutdown(struct device *dev)
  1194. {
  1195. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1196. if (!plat_priv) {
  1197. cnss_pr_err("plat_priv is NULL\n");
  1198. return -ENODEV;
  1199. }
  1200. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  1201. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  1202. return -EAGAIN;
  1203. }
  1204. cnss_pr_dbg("Doing idle shutdown\n");
  1205. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) ||
  1206. test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state)) {
  1207. cnss_pr_dbg("Recovery in progress. Ignore IDLE Shutdown\n");
  1208. return -EBUSY;
  1209. }
  1210. return cnss_driver_event_post(plat_priv,
  1211. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1212. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1213. }
  1214. EXPORT_SYMBOL(cnss_idle_shutdown);
  1215. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  1216. {
  1217. int ret = 0;
  1218. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1219. if (ret < 0) {
  1220. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  1221. goto out;
  1222. }
  1223. ret = cnss_get_clk(plat_priv);
  1224. if (ret) {
  1225. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  1226. goto put_vreg;
  1227. }
  1228. ret = cnss_get_pinctrl(plat_priv);
  1229. if (ret) {
  1230. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  1231. goto put_clk;
  1232. }
  1233. return 0;
  1234. put_clk:
  1235. cnss_put_clk(plat_priv);
  1236. put_vreg:
  1237. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1238. out:
  1239. return ret;
  1240. }
  1241. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  1242. {
  1243. cnss_put_clk(plat_priv);
  1244. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1245. }
  1246. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1247. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  1248. unsigned long code,
  1249. void *ss_handle)
  1250. {
  1251. struct cnss_plat_data *plat_priv =
  1252. container_of(nb, struct cnss_plat_data, modem_nb);
  1253. struct cnss_esoc_info *esoc_info;
  1254. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  1255. if (!plat_priv)
  1256. return NOTIFY_DONE;
  1257. esoc_info = &plat_priv->esoc_info;
  1258. if (code == SUBSYS_AFTER_POWERUP)
  1259. esoc_info->modem_current_status = 1;
  1260. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  1261. esoc_info->modem_current_status = 0;
  1262. else
  1263. return NOTIFY_DONE;
  1264. if (!cnss_bus_call_driver_modem_status(plat_priv,
  1265. esoc_info->modem_current_status))
  1266. return NOTIFY_DONE;
  1267. return NOTIFY_OK;
  1268. }
  1269. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1270. {
  1271. int ret = 0;
  1272. struct device *dev;
  1273. struct cnss_esoc_info *esoc_info;
  1274. struct esoc_desc *esoc_desc;
  1275. const char *client_desc;
  1276. dev = &plat_priv->plat_dev->dev;
  1277. esoc_info = &plat_priv->esoc_info;
  1278. esoc_info->notify_modem_status =
  1279. of_property_read_bool(dev->of_node,
  1280. "qcom,notify-modem-status");
  1281. if (!esoc_info->notify_modem_status)
  1282. goto out;
  1283. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1284. &client_desc);
  1285. if (ret) {
  1286. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1287. } else {
  1288. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1289. if (IS_ERR_OR_NULL(esoc_desc)) {
  1290. ret = PTR_RET(esoc_desc);
  1291. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1292. ret);
  1293. goto out;
  1294. }
  1295. esoc_info->esoc_desc = esoc_desc;
  1296. }
  1297. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1298. esoc_info->modem_current_status = 0;
  1299. esoc_info->modem_notify_handler =
  1300. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1301. esoc_info->esoc_desc->name :
  1302. "modem", &plat_priv->modem_nb);
  1303. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1304. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1305. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1306. ret);
  1307. goto unreg_esoc;
  1308. }
  1309. return 0;
  1310. unreg_esoc:
  1311. if (esoc_info->esoc_desc)
  1312. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1313. out:
  1314. return ret;
  1315. }
  1316. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1317. {
  1318. struct device *dev;
  1319. struct cnss_esoc_info *esoc_info;
  1320. dev = &plat_priv->plat_dev->dev;
  1321. esoc_info = &plat_priv->esoc_info;
  1322. if (esoc_info->notify_modem_status)
  1323. subsys_notif_unregister_notifier
  1324. (esoc_info->modem_notify_handler,
  1325. &plat_priv->modem_nb);
  1326. if (esoc_info->esoc_desc)
  1327. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1328. }
  1329. #else
  1330. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1331. {
  1332. return 0;
  1333. }
  1334. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1335. #endif
  1336. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1337. {
  1338. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1339. int ret = 0;
  1340. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1341. return 0;
  1342. enable_irq(sol_gpio->dev_sol_irq);
  1343. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1344. if (ret)
  1345. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1346. ret);
  1347. return ret;
  1348. }
  1349. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1350. {
  1351. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1352. int ret = 0;
  1353. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1354. return 0;
  1355. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1356. if (ret)
  1357. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1358. ret);
  1359. disable_irq(sol_gpio->dev_sol_irq);
  1360. return ret;
  1361. }
  1362. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1363. {
  1364. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1365. if (sol_gpio->dev_sol_gpio < 0)
  1366. return -EINVAL;
  1367. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1368. }
  1369. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1370. {
  1371. struct cnss_plat_data *plat_priv = data;
  1372. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1373. sol_gpio->dev_sol_counter++;
  1374. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1375. irq, sol_gpio->dev_sol_counter);
  1376. /* Make sure abort current suspend */
  1377. cnss_pm_stay_awake(plat_priv);
  1378. cnss_pm_relax(plat_priv);
  1379. pm_system_wakeup();
  1380. cnss_bus_handle_dev_sol_irq(plat_priv);
  1381. return IRQ_HANDLED;
  1382. }
  1383. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1384. {
  1385. struct device *dev = &plat_priv->plat_dev->dev;
  1386. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1387. int ret = 0;
  1388. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1389. "wlan-dev-sol-gpio", 0);
  1390. if (sol_gpio->dev_sol_gpio < 0)
  1391. goto out;
  1392. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1393. sol_gpio->dev_sol_gpio);
  1394. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1395. if (ret) {
  1396. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1397. ret);
  1398. goto out;
  1399. }
  1400. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1401. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1402. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1403. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1404. if (ret) {
  1405. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1406. goto free_gpio;
  1407. }
  1408. return 0;
  1409. free_gpio:
  1410. gpio_free(sol_gpio->dev_sol_gpio);
  1411. out:
  1412. return ret;
  1413. }
  1414. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1415. {
  1416. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1417. if (sol_gpio->dev_sol_gpio < 0)
  1418. return;
  1419. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1420. gpio_free(sol_gpio->dev_sol_gpio);
  1421. }
  1422. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1423. {
  1424. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1425. if (sol_gpio->host_sol_gpio < 0)
  1426. return -EINVAL;
  1427. if (value)
  1428. cnss_pr_dbg("Assert host SOL GPIO\n");
  1429. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1430. return 0;
  1431. }
  1432. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1433. {
  1434. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1435. if (sol_gpio->host_sol_gpio < 0)
  1436. return -EINVAL;
  1437. return gpio_get_value(sol_gpio->host_sol_gpio);
  1438. }
  1439. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1440. {
  1441. struct device *dev = &plat_priv->plat_dev->dev;
  1442. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1443. int ret = 0;
  1444. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1445. "wlan-host-sol-gpio", 0);
  1446. if (sol_gpio->host_sol_gpio < 0)
  1447. goto out;
  1448. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1449. sol_gpio->host_sol_gpio);
  1450. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1451. if (ret) {
  1452. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1453. ret);
  1454. goto out;
  1455. }
  1456. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1457. return 0;
  1458. out:
  1459. return ret;
  1460. }
  1461. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1462. {
  1463. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1464. if (sol_gpio->host_sol_gpio < 0)
  1465. return;
  1466. gpio_free(sol_gpio->host_sol_gpio);
  1467. }
  1468. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1469. {
  1470. int ret;
  1471. ret = cnss_init_dev_sol_gpio(plat_priv);
  1472. if (ret)
  1473. goto out;
  1474. ret = cnss_init_host_sol_gpio(plat_priv);
  1475. if (ret)
  1476. goto deinit_dev_sol;
  1477. return 0;
  1478. deinit_dev_sol:
  1479. cnss_deinit_dev_sol_gpio(plat_priv);
  1480. out:
  1481. return ret;
  1482. }
  1483. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1484. {
  1485. cnss_deinit_host_sol_gpio(plat_priv);
  1486. cnss_deinit_dev_sol_gpio(plat_priv);
  1487. }
  1488. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1489. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1490. {
  1491. struct cnss_plat_data *plat_priv;
  1492. int ret = 0;
  1493. if (!subsys_desc->dev) {
  1494. cnss_pr_err("dev from subsys_desc is NULL\n");
  1495. return -ENODEV;
  1496. }
  1497. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1498. if (!plat_priv) {
  1499. cnss_pr_err("plat_priv is NULL\n");
  1500. return -ENODEV;
  1501. }
  1502. if (!plat_priv->driver_state) {
  1503. cnss_pr_dbg("subsys powerup is ignored\n");
  1504. return 0;
  1505. }
  1506. ret = cnss_bus_dev_powerup(plat_priv);
  1507. if (ret)
  1508. __pm_relax(plat_priv->recovery_ws);
  1509. return ret;
  1510. }
  1511. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1512. bool force_stop)
  1513. {
  1514. struct cnss_plat_data *plat_priv;
  1515. if (!subsys_desc->dev) {
  1516. cnss_pr_err("dev from subsys_desc is NULL\n");
  1517. return -ENODEV;
  1518. }
  1519. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1520. if (!plat_priv) {
  1521. cnss_pr_err("plat_priv is NULL\n");
  1522. return -ENODEV;
  1523. }
  1524. if (!plat_priv->driver_state) {
  1525. cnss_pr_dbg("subsys shutdown is ignored\n");
  1526. return 0;
  1527. }
  1528. return cnss_bus_dev_shutdown(plat_priv);
  1529. }
  1530. void cnss_device_crashed(struct device *dev)
  1531. {
  1532. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1533. struct cnss_subsys_info *subsys_info;
  1534. if (!plat_priv)
  1535. return;
  1536. subsys_info = &plat_priv->subsys_info;
  1537. if (subsys_info->subsys_device) {
  1538. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1539. subsys_set_crash_status(subsys_info->subsys_device, true);
  1540. subsystem_restart_dev(subsys_info->subsys_device);
  1541. }
  1542. }
  1543. EXPORT_SYMBOL(cnss_device_crashed);
  1544. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1545. {
  1546. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1547. if (!plat_priv) {
  1548. cnss_pr_err("plat_priv is NULL\n");
  1549. return;
  1550. }
  1551. cnss_bus_dev_crash_shutdown(plat_priv);
  1552. }
  1553. static int cnss_subsys_ramdump(int enable,
  1554. const struct subsys_desc *subsys_desc)
  1555. {
  1556. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1557. if (!plat_priv) {
  1558. cnss_pr_err("plat_priv is NULL\n");
  1559. return -ENODEV;
  1560. }
  1561. if (!enable)
  1562. return 0;
  1563. return cnss_bus_dev_ramdump(plat_priv);
  1564. }
  1565. static void cnss_recovery_work_handler(struct work_struct *work)
  1566. {
  1567. }
  1568. #else
  1569. void cnss_recovery_handler(struct cnss_plat_data *plat_priv)
  1570. {
  1571. int ret;
  1572. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1573. if (!plat_priv->recovery_enabled)
  1574. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1575. cnss_bus_dev_shutdown(plat_priv);
  1576. cnss_bus_dev_ramdump(plat_priv);
  1577. /* If recovery is triggered before Host driver registration,
  1578. * avoid device power up because eventually device will be
  1579. * power up as part of driver registration.
  1580. */
  1581. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1582. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1583. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1584. plat_priv->driver_state);
  1585. return;
  1586. }
  1587. msleep(POWER_RESET_MIN_DELAY_MS);
  1588. ret = cnss_bus_dev_powerup(plat_priv);
  1589. if (ret)
  1590. __pm_relax(plat_priv->recovery_ws);
  1591. return;
  1592. }
  1593. static void cnss_recovery_work_handler(struct work_struct *work)
  1594. {
  1595. struct cnss_plat_data *plat_priv =
  1596. container_of(work, struct cnss_plat_data, recovery_work);
  1597. cnss_recovery_handler(plat_priv);
  1598. }
  1599. void cnss_device_crashed(struct device *dev)
  1600. {
  1601. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1602. if (!plat_priv)
  1603. return;
  1604. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1605. schedule_work(&plat_priv->recovery_work);
  1606. }
  1607. EXPORT_SYMBOL(cnss_device_crashed);
  1608. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1609. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1610. {
  1611. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1612. struct cnss_ramdump_info *ramdump_info;
  1613. if (!plat_priv)
  1614. return NULL;
  1615. ramdump_info = &plat_priv->ramdump_info;
  1616. *size = ramdump_info->ramdump_size;
  1617. return ramdump_info->ramdump_va;
  1618. }
  1619. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1620. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1621. {
  1622. switch (reason) {
  1623. case CNSS_REASON_DEFAULT:
  1624. return "DEFAULT";
  1625. case CNSS_REASON_LINK_DOWN:
  1626. return "LINK_DOWN";
  1627. case CNSS_REASON_RDDM:
  1628. return "RDDM";
  1629. case CNSS_REASON_TIMEOUT:
  1630. return "TIMEOUT";
  1631. }
  1632. return "UNKNOWN";
  1633. };
  1634. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1635. enum cnss_recovery_reason reason)
  1636. {
  1637. plat_priv->recovery_count++;
  1638. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1639. goto self_recovery;
  1640. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1641. cnss_pr_dbg("Skip device recovery\n");
  1642. return 0;
  1643. }
  1644. /* FW recovery sequence has multiple steps and firmware load requires
  1645. * linux PM in awake state. Thus hold the cnss wake source until
  1646. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1647. * time taken in this process.
  1648. */
  1649. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1650. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1651. true);
  1652. switch (reason) {
  1653. case CNSS_REASON_LINK_DOWN:
  1654. if (!cnss_bus_check_link_status(plat_priv)) {
  1655. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1656. return 0;
  1657. }
  1658. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1659. &plat_priv->ctrl_params.quirks))
  1660. goto self_recovery;
  1661. if (!cnss_bus_recover_link_down(plat_priv)) {
  1662. /* clear recovery bit here to avoid skipping
  1663. * the recovery work for RDDM later
  1664. */
  1665. clear_bit(CNSS_DRIVER_RECOVERY,
  1666. &plat_priv->driver_state);
  1667. return 0;
  1668. }
  1669. break;
  1670. case CNSS_REASON_RDDM:
  1671. cnss_bus_collect_dump_info(plat_priv, false);
  1672. break;
  1673. case CNSS_REASON_DEFAULT:
  1674. case CNSS_REASON_TIMEOUT:
  1675. break;
  1676. default:
  1677. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1678. cnss_recovery_reason_to_str(reason), reason);
  1679. break;
  1680. }
  1681. cnss_bus_device_crashed(plat_priv);
  1682. return 0;
  1683. self_recovery:
  1684. cnss_pr_dbg("Going for self recovery\n");
  1685. cnss_bus_dev_shutdown(plat_priv);
  1686. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1687. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1688. &plat_priv->ctrl_params.quirks);
  1689. /* If link down self recovery is triggered before Host driver
  1690. * registration, avoid device power up because eventually device
  1691. * will be power up as part of driver registration.
  1692. */
  1693. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1694. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1695. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1696. plat_priv->driver_state);
  1697. return 0;
  1698. }
  1699. cnss_bus_dev_powerup(plat_priv);
  1700. return 0;
  1701. }
  1702. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1703. void *data)
  1704. {
  1705. struct cnss_recovery_data *recovery_data = data;
  1706. int ret = 0;
  1707. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1708. cnss_recovery_reason_to_str(recovery_data->reason),
  1709. recovery_data->reason);
  1710. if (!plat_priv->driver_state) {
  1711. cnss_pr_err("Improper driver state, ignore recovery\n");
  1712. ret = -EINVAL;
  1713. goto out;
  1714. }
  1715. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1716. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1717. ret = -EINVAL;
  1718. goto out;
  1719. }
  1720. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1721. cnss_pr_err("Recovery is already in progress\n");
  1722. CNSS_ASSERT(0);
  1723. ret = -EINVAL;
  1724. goto out;
  1725. }
  1726. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1727. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1728. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1729. ret = -EINVAL;
  1730. goto out;
  1731. }
  1732. switch (plat_priv->device_id) {
  1733. case QCA6174_DEVICE_ID:
  1734. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1735. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1736. &plat_priv->driver_state)) {
  1737. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1738. ret = -EINVAL;
  1739. goto out;
  1740. }
  1741. break;
  1742. default:
  1743. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1744. set_bit(CNSS_FW_BOOT_RECOVERY,
  1745. &plat_priv->driver_state);
  1746. }
  1747. break;
  1748. }
  1749. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1750. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1751. out:
  1752. kfree(data);
  1753. return ret;
  1754. }
  1755. int cnss_self_recovery(struct device *dev,
  1756. enum cnss_recovery_reason reason)
  1757. {
  1758. cnss_schedule_recovery(dev, reason);
  1759. return 0;
  1760. }
  1761. EXPORT_SYMBOL(cnss_self_recovery);
  1762. void cnss_schedule_recovery(struct device *dev,
  1763. enum cnss_recovery_reason reason)
  1764. {
  1765. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1766. struct cnss_recovery_data *data;
  1767. int gfp = GFP_KERNEL;
  1768. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1769. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1770. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1771. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1772. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1773. return;
  1774. }
  1775. if (in_interrupt() || irqs_disabled())
  1776. gfp = GFP_ATOMIC;
  1777. data = kzalloc(sizeof(*data), gfp);
  1778. if (!data)
  1779. return;
  1780. data->reason = reason;
  1781. cnss_driver_event_post(plat_priv,
  1782. CNSS_DRIVER_EVENT_RECOVERY,
  1783. 0, data);
  1784. }
  1785. EXPORT_SYMBOL(cnss_schedule_recovery);
  1786. int cnss_force_fw_assert(struct device *dev)
  1787. {
  1788. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1789. if (!plat_priv) {
  1790. cnss_pr_err("plat_priv is NULL\n");
  1791. return -ENODEV;
  1792. }
  1793. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1794. cnss_pr_info("Forced FW assert is not supported\n");
  1795. return -EOPNOTSUPP;
  1796. }
  1797. if (cnss_bus_is_device_down(plat_priv)) {
  1798. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1799. return 0;
  1800. }
  1801. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1802. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1803. return 0;
  1804. }
  1805. if (in_interrupt() || irqs_disabled())
  1806. cnss_driver_event_post(plat_priv,
  1807. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1808. 0, NULL);
  1809. else
  1810. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1811. return 0;
  1812. }
  1813. EXPORT_SYMBOL(cnss_force_fw_assert);
  1814. int cnss_force_collect_rddm(struct device *dev)
  1815. {
  1816. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1817. unsigned int timeout;
  1818. int ret = 0;
  1819. if (!plat_priv) {
  1820. cnss_pr_err("plat_priv is NULL\n");
  1821. return -ENODEV;
  1822. }
  1823. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1824. cnss_pr_info("Force collect rddm is not supported\n");
  1825. return -EOPNOTSUPP;
  1826. }
  1827. if (cnss_bus_is_device_down(plat_priv)) {
  1828. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1829. goto wait_rddm;
  1830. }
  1831. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1832. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1833. goto wait_rddm;
  1834. }
  1835. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1836. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1837. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1838. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1839. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1840. return 0;
  1841. }
  1842. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1843. if (ret)
  1844. return ret;
  1845. wait_rddm:
  1846. reinit_completion(&plat_priv->rddm_complete);
  1847. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1848. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1849. msecs_to_jiffies(timeout));
  1850. if (!ret) {
  1851. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1852. timeout);
  1853. ret = -ETIMEDOUT;
  1854. } else if (ret > 0) {
  1855. ret = 0;
  1856. }
  1857. return ret;
  1858. }
  1859. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1860. int cnss_qmi_send_get(struct device *dev)
  1861. {
  1862. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1863. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1864. return 0;
  1865. return cnss_bus_qmi_send_get(plat_priv);
  1866. }
  1867. EXPORT_SYMBOL(cnss_qmi_send_get);
  1868. int cnss_qmi_send_put(struct device *dev)
  1869. {
  1870. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1871. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1872. return 0;
  1873. return cnss_bus_qmi_send_put(plat_priv);
  1874. }
  1875. EXPORT_SYMBOL(cnss_qmi_send_put);
  1876. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1877. int cmd_len, void *cb_ctx,
  1878. int (*cb)(void *ctx, void *event, int event_len))
  1879. {
  1880. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1881. int ret;
  1882. if (!plat_priv)
  1883. return -ENODEV;
  1884. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1885. return -EINVAL;
  1886. plat_priv->get_info_cb = cb;
  1887. plat_priv->get_info_cb_ctx = cb_ctx;
  1888. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1889. if (ret) {
  1890. plat_priv->get_info_cb = NULL;
  1891. plat_priv->get_info_cb_ctx = NULL;
  1892. }
  1893. return ret;
  1894. }
  1895. EXPORT_SYMBOL(cnss_qmi_send);
  1896. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1897. {
  1898. int ret = 0;
  1899. u32 retry = 0, timeout;
  1900. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1901. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1902. goto out;
  1903. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1904. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1905. goto out;
  1906. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1907. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1908. goto out;
  1909. }
  1910. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1911. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1912. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1913. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1914. CNSS_ASSERT(0);
  1915. return -EINVAL;
  1916. }
  1917. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1918. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1919. break;
  1920. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1921. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1922. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1923. CNSS_ASSERT(0);
  1924. ret = -EINVAL;
  1925. goto mark_cal_fail;
  1926. }
  1927. }
  1928. switch (plat_priv->device_id) {
  1929. case QCA6290_DEVICE_ID:
  1930. case QCA6390_DEVICE_ID:
  1931. case QCA6490_DEVICE_ID:
  1932. case KIWI_DEVICE_ID:
  1933. case MANGO_DEVICE_ID:
  1934. case PEACH_DEVICE_ID:
  1935. break;
  1936. default:
  1937. cnss_pr_err("Not supported for device ID 0x%lx\n",
  1938. plat_priv->device_id);
  1939. ret = -EINVAL;
  1940. goto mark_cal_fail;
  1941. }
  1942. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1943. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1944. timeout = cnss_get_timeout(plat_priv,
  1945. CNSS_TIMEOUT_CALIBRATION);
  1946. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1947. timeout / 1000);
  1948. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1949. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1950. msecs_to_jiffies(timeout));
  1951. }
  1952. reinit_completion(&plat_priv->cal_complete);
  1953. ret = cnss_bus_dev_powerup(plat_priv);
  1954. mark_cal_fail:
  1955. if (ret) {
  1956. complete(&plat_priv->cal_complete);
  1957. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1958. /* Set CBC done in driver state to mark attempt and note error
  1959. * since calibration cannot be retried at boot.
  1960. */
  1961. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1962. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1963. if (plat_priv->device_id == QCA6174_DEVICE_ID ||
  1964. plat_priv->device_id == QCN7605_DEVICE_ID) {
  1965. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1966. goto out;
  1967. cnss_pr_info("Schedule WLAN driver load\n");
  1968. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1969. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1970. 0);
  1971. }
  1972. }
  1973. out:
  1974. return ret;
  1975. }
  1976. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  1977. void *data)
  1978. {
  1979. struct cnss_cal_info *cal_info = data;
  1980. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  1981. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  1982. goto out;
  1983. switch (cal_info->cal_status) {
  1984. case CNSS_CAL_DONE:
  1985. cnss_pr_dbg("Calibration completed successfully\n");
  1986. plat_priv->cal_done = true;
  1987. break;
  1988. case CNSS_CAL_TIMEOUT:
  1989. case CNSS_CAL_FAILURE:
  1990. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  1991. cal_info->cal_status);
  1992. break;
  1993. default:
  1994. cnss_pr_err("Unknown calibration status: %u\n",
  1995. cal_info->cal_status);
  1996. break;
  1997. }
  1998. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  1999. cnss_bus_free_qdss_mem(plat_priv);
  2000. cnss_release_antenna_sharing(plat_priv);
  2001. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  2002. goto skip_shutdown;
  2003. cnss_bus_dev_shutdown(plat_priv);
  2004. msleep(POWER_RESET_MIN_DELAY_MS);
  2005. skip_shutdown:
  2006. complete(&plat_priv->cal_complete);
  2007. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  2008. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  2009. if (cal_info->cal_status == CNSS_CAL_DONE) {
  2010. cnss_cal_mem_upload_to_file(plat_priv);
  2011. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  2012. goto out;
  2013. cnss_pr_dbg("Schedule WLAN driver load\n");
  2014. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2015. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2016. 0);
  2017. }
  2018. out:
  2019. kfree(data);
  2020. return 0;
  2021. }
  2022. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  2023. {
  2024. int ret;
  2025. ret = cnss_bus_dev_powerup(plat_priv);
  2026. if (ret)
  2027. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  2028. return ret;
  2029. }
  2030. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  2031. {
  2032. cnss_bus_dev_shutdown(plat_priv);
  2033. return 0;
  2034. }
  2035. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  2036. {
  2037. int ret = 0;
  2038. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  2039. if (ret < 0)
  2040. return ret;
  2041. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  2042. }
  2043. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  2044. u32 mem_seg_len, u64 pa, u32 size)
  2045. {
  2046. int i = 0;
  2047. u64 offset = 0;
  2048. void *va = NULL;
  2049. u64 local_pa;
  2050. u32 local_size;
  2051. for (i = 0; i < mem_seg_len; i++) {
  2052. local_pa = (u64)fw_mem[i].pa;
  2053. local_size = (u32)fw_mem[i].size;
  2054. if (pa == local_pa && size <= local_size) {
  2055. va = fw_mem[i].va;
  2056. break;
  2057. }
  2058. if (pa > local_pa &&
  2059. pa < local_pa + local_size &&
  2060. pa + size <= local_pa + local_size) {
  2061. offset = pa - local_pa;
  2062. va = fw_mem[i].va + offset;
  2063. break;
  2064. }
  2065. }
  2066. return va;
  2067. }
  2068. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  2069. void *data)
  2070. {
  2071. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2072. struct cnss_fw_mem *fw_mem_seg;
  2073. int ret = 0L;
  2074. void *va = NULL;
  2075. u32 i, fw_mem_seg_len;
  2076. switch (event_data->mem_type) {
  2077. case QMI_WLFW_MEM_TYPE_DDR_V01:
  2078. if (!plat_priv->fw_mem_seg_len)
  2079. goto invalid_mem_save;
  2080. fw_mem_seg = plat_priv->fw_mem;
  2081. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  2082. break;
  2083. case QMI_WLFW_MEM_QDSS_V01:
  2084. if (!plat_priv->qdss_mem_seg_len)
  2085. goto invalid_mem_save;
  2086. fw_mem_seg = plat_priv->qdss_mem;
  2087. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  2088. break;
  2089. default:
  2090. goto invalid_mem_save;
  2091. }
  2092. for (i = 0; i < event_data->mem_seg_len; i++) {
  2093. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  2094. event_data->mem_seg[i].addr,
  2095. event_data->mem_seg[i].size);
  2096. if (!va) {
  2097. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  2098. &event_data->mem_seg[i].addr,
  2099. event_data->mem_type);
  2100. ret = -EINVAL;
  2101. break;
  2102. }
  2103. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  2104. event_data->file_name,
  2105. event_data->mem_seg[i].size);
  2106. if (ret < 0) {
  2107. cnss_pr_err("Fail to save fw mem data: %d\n",
  2108. ret);
  2109. break;
  2110. }
  2111. }
  2112. kfree(data);
  2113. return ret;
  2114. invalid_mem_save:
  2115. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  2116. event_data->mem_type);
  2117. kfree(data);
  2118. return -EINVAL;
  2119. }
  2120. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  2121. {
  2122. cnss_bus_free_qdss_mem(plat_priv);
  2123. return 0;
  2124. }
  2125. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  2126. void *data)
  2127. {
  2128. int ret = 0;
  2129. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2130. if (!plat_priv)
  2131. return -ENODEV;
  2132. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  2133. event_data->total_size);
  2134. kfree(data);
  2135. return ret;
  2136. }
  2137. static void cnss_driver_event_work(struct work_struct *work)
  2138. {
  2139. struct cnss_plat_data *plat_priv =
  2140. container_of(work, struct cnss_plat_data, event_work);
  2141. struct cnss_driver_event *event;
  2142. unsigned long flags;
  2143. int ret = 0;
  2144. if (!plat_priv) {
  2145. cnss_pr_err("plat_priv is NULL!\n");
  2146. return;
  2147. }
  2148. cnss_pm_stay_awake(plat_priv);
  2149. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2150. while (!list_empty(&plat_priv->event_list)) {
  2151. event = list_first_entry(&plat_priv->event_list,
  2152. struct cnss_driver_event, list);
  2153. list_del(&event->list);
  2154. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2155. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  2156. cnss_driver_event_to_str(event->type),
  2157. event->sync ? "-sync" : "", event->type,
  2158. plat_priv->driver_state);
  2159. switch (event->type) {
  2160. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  2161. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  2162. break;
  2163. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  2164. ret = cnss_wlfw_server_exit(plat_priv);
  2165. break;
  2166. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  2167. ret = cnss_bus_alloc_fw_mem(plat_priv);
  2168. if (ret)
  2169. break;
  2170. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  2171. break;
  2172. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  2173. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  2174. break;
  2175. case CNSS_DRIVER_EVENT_FW_READY:
  2176. ret = cnss_fw_ready_hdlr(plat_priv);
  2177. break;
  2178. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  2179. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  2180. break;
  2181. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  2182. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  2183. event->data);
  2184. break;
  2185. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  2186. ret = cnss_bus_register_driver_hdlr(plat_priv,
  2187. event->data);
  2188. break;
  2189. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  2190. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  2191. break;
  2192. case CNSS_DRIVER_EVENT_RECOVERY:
  2193. ret = cnss_driver_recovery_hdlr(plat_priv,
  2194. event->data);
  2195. break;
  2196. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  2197. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  2198. break;
  2199. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  2200. set_bit(CNSS_DRIVER_IDLE_RESTART,
  2201. &plat_priv->driver_state);
  2202. fallthrough;
  2203. case CNSS_DRIVER_EVENT_POWER_UP:
  2204. ret = cnss_power_up_hdlr(plat_priv);
  2205. break;
  2206. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  2207. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  2208. &plat_priv->driver_state);
  2209. fallthrough;
  2210. case CNSS_DRIVER_EVENT_POWER_DOWN:
  2211. ret = cnss_power_down_hdlr(plat_priv);
  2212. break;
  2213. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  2214. ret = cnss_process_wfc_call_ind_event(plat_priv,
  2215. event->data);
  2216. break;
  2217. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  2218. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  2219. event->data);
  2220. break;
  2221. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  2222. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  2223. break;
  2224. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  2225. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  2226. event->data);
  2227. break;
  2228. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  2229. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  2230. break;
  2231. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  2232. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  2233. event->data);
  2234. break;
  2235. default:
  2236. cnss_pr_err("Invalid driver event type: %d",
  2237. event->type);
  2238. kfree(event);
  2239. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2240. continue;
  2241. }
  2242. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2243. if (event->sync) {
  2244. event->ret = ret;
  2245. complete(&event->complete);
  2246. continue;
  2247. }
  2248. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2249. kfree(event);
  2250. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2251. }
  2252. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2253. cnss_pm_relax(plat_priv);
  2254. }
  2255. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  2256. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2257. {
  2258. int ret = 0;
  2259. struct cnss_subsys_info *subsys_info;
  2260. subsys_info = &plat_priv->subsys_info;
  2261. subsys_info->subsys_desc.name = plat_priv->device_name;
  2262. subsys_info->subsys_desc.owner = THIS_MODULE;
  2263. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  2264. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  2265. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  2266. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  2267. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  2268. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  2269. if (IS_ERR(subsys_info->subsys_device)) {
  2270. ret = PTR_ERR(subsys_info->subsys_device);
  2271. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  2272. goto out;
  2273. }
  2274. subsys_info->subsys_handle =
  2275. subsystem_get(subsys_info->subsys_desc.name);
  2276. if (!subsys_info->subsys_handle) {
  2277. cnss_pr_err("Failed to get subsys_handle!\n");
  2278. ret = -EINVAL;
  2279. goto unregister_subsys;
  2280. } else if (IS_ERR(subsys_info->subsys_handle)) {
  2281. ret = PTR_ERR(subsys_info->subsys_handle);
  2282. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  2283. goto unregister_subsys;
  2284. }
  2285. return 0;
  2286. unregister_subsys:
  2287. subsys_unregister(subsys_info->subsys_device);
  2288. out:
  2289. return ret;
  2290. }
  2291. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2292. {
  2293. struct cnss_subsys_info *subsys_info;
  2294. subsys_info = &plat_priv->subsys_info;
  2295. subsystem_put(subsys_info->subsys_handle);
  2296. subsys_unregister(subsys_info->subsys_device);
  2297. }
  2298. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2299. {
  2300. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  2301. return create_ramdump_device(subsys_info->subsys_desc.name,
  2302. subsys_info->subsys_desc.dev);
  2303. }
  2304. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2305. void *ramdump_dev)
  2306. {
  2307. destroy_ramdump_device(ramdump_dev);
  2308. }
  2309. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2310. {
  2311. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2312. struct ramdump_segment segment;
  2313. memset(&segment, 0, sizeof(segment));
  2314. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  2315. segment.size = ramdump_info->ramdump_size;
  2316. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  2317. }
  2318. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2319. {
  2320. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2321. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2322. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2323. struct ramdump_segment *ramdump_segs, *s;
  2324. struct cnss_dump_meta_info meta_info = {0};
  2325. int i, ret = 0;
  2326. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2327. sizeof(*ramdump_segs),
  2328. GFP_KERNEL);
  2329. if (!ramdump_segs)
  2330. return -ENOMEM;
  2331. s = ramdump_segs + 1;
  2332. for (i = 0; i < dump_data->nentries; i++) {
  2333. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2334. cnss_pr_err("Unsupported dump type: %d",
  2335. dump_seg->type);
  2336. continue;
  2337. }
  2338. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2339. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2340. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2341. }
  2342. meta_info.entry[dump_seg->type].entry_num++;
  2343. s->address = dump_seg->address;
  2344. s->v_address = (void __iomem *)dump_seg->v_address;
  2345. s->size = dump_seg->size;
  2346. s++;
  2347. dump_seg++;
  2348. }
  2349. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2350. meta_info.version = CNSS_RAMDUMP_VERSION;
  2351. meta_info.chipset = plat_priv->device_id;
  2352. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2353. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2354. ramdump_segs->size = sizeof(meta_info);
  2355. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2356. dump_data->nentries + 1);
  2357. kfree(ramdump_segs);
  2358. return ret;
  2359. }
  2360. #else
  2361. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2362. void *data)
  2363. {
  2364. struct cnss_plat_data *plat_priv =
  2365. container_of(nb, struct cnss_plat_data, panic_nb);
  2366. cnss_bus_dev_crash_shutdown(plat_priv);
  2367. return NOTIFY_DONE;
  2368. }
  2369. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2370. {
  2371. int ret;
  2372. if (!plat_priv)
  2373. return -ENODEV;
  2374. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2375. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2376. &plat_priv->panic_nb);
  2377. if (ret) {
  2378. cnss_pr_err("Failed to register panic handler\n");
  2379. return -EINVAL;
  2380. }
  2381. return 0;
  2382. }
  2383. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2384. {
  2385. int ret;
  2386. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2387. &plat_priv->panic_nb);
  2388. if (ret)
  2389. cnss_pr_err("Failed to unregister panic handler\n");
  2390. }
  2391. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2392. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2393. {
  2394. return &plat_priv->plat_dev->dev;
  2395. }
  2396. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2397. void *ramdump_dev)
  2398. {
  2399. }
  2400. #endif
  2401. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2402. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2403. {
  2404. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2405. struct qcom_dump_segment segment;
  2406. struct list_head head;
  2407. INIT_LIST_HEAD(&head);
  2408. memset(&segment, 0, sizeof(segment));
  2409. segment.va = ramdump_info->ramdump_va;
  2410. segment.size = ramdump_info->ramdump_size;
  2411. list_add(&segment.node, &head);
  2412. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2413. }
  2414. #else
  2415. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2416. {
  2417. return 0;
  2418. }
  2419. /* Using completion event inside dynamically allocated ramdump_desc
  2420. * may result a race between freeing the event after setting it to
  2421. * complete inside dev coredump free callback and the thread that is
  2422. * waiting for completion.
  2423. */
  2424. DECLARE_COMPLETION(dump_done);
  2425. #define TIMEOUT_SAVE_DUMP_MS 30000
  2426. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2427. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2428. { \
  2429. if (class == ELFCLASS32) \
  2430. return sizeof(struct elf32_##__xhdr); \
  2431. else \
  2432. return sizeof(struct elf64_##__xhdr); \
  2433. }
  2434. SIZEOF_ELF_STRUCT(phdr)
  2435. SIZEOF_ELF_STRUCT(hdr)
  2436. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2437. do { \
  2438. if (class == ELFCLASS32) \
  2439. ((struct elf32_##__xhdr *)arg)->member = value; \
  2440. else \
  2441. ((struct elf64_##__xhdr *)arg)->member = value; \
  2442. } while (0)
  2443. #define set_ehdr_property(arg, class, member, value) \
  2444. set_xhdr_property(hdr, arg, class, member, value)
  2445. #define set_phdr_property(arg, class, member, value) \
  2446. set_xhdr_property(phdr, arg, class, member, value)
  2447. /* These replace qcom_ramdump driver APIs called from common API
  2448. * cnss_do_elf_dump() by the ones defined here.
  2449. */
  2450. #define qcom_dump_segment cnss_qcom_dump_segment
  2451. #define qcom_elf_dump cnss_qcom_elf_dump
  2452. #define dump_enabled cnss_dump_enabled
  2453. struct cnss_qcom_dump_segment {
  2454. struct list_head node;
  2455. dma_addr_t da;
  2456. void *va;
  2457. size_t size;
  2458. };
  2459. struct cnss_qcom_ramdump_desc {
  2460. void *data;
  2461. struct completion dump_done;
  2462. };
  2463. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2464. void *data, size_t datalen)
  2465. {
  2466. struct cnss_qcom_ramdump_desc *desc = data;
  2467. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2468. datalen);
  2469. }
  2470. static void cnss_qcom_devcd_freev(void *data)
  2471. {
  2472. struct cnss_qcom_ramdump_desc *desc = data;
  2473. cnss_pr_dbg("Free dump data for dev coredump\n");
  2474. complete(&dump_done);
  2475. vfree(desc->data);
  2476. kfree(desc);
  2477. }
  2478. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2479. gfp_t gfp)
  2480. {
  2481. struct cnss_qcom_ramdump_desc *desc;
  2482. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2483. int ret;
  2484. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2485. if (!desc)
  2486. return -ENOMEM;
  2487. desc->data = data;
  2488. reinit_completion(&dump_done);
  2489. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2490. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2491. ret = wait_for_completion_timeout(&dump_done,
  2492. msecs_to_jiffies(timeout));
  2493. if (!ret)
  2494. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2495. timeout);
  2496. return ret ? 0 : -ETIMEDOUT;
  2497. }
  2498. /* Since the elf32 and elf64 identification is identical apart from
  2499. * the class, use elf32 by default.
  2500. */
  2501. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2502. {
  2503. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2504. ehdr->e_ident[EI_CLASS] = class;
  2505. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2506. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2507. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2508. }
  2509. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2510. unsigned char class)
  2511. {
  2512. struct cnss_qcom_dump_segment *segment;
  2513. void *phdr, *ehdr;
  2514. size_t data_size, offset;
  2515. int phnum = 0;
  2516. void *data;
  2517. void __iomem *ptr;
  2518. if (!segs || list_empty(segs))
  2519. return -EINVAL;
  2520. data_size = sizeof_elf_hdr(class);
  2521. list_for_each_entry(segment, segs, node) {
  2522. data_size += sizeof_elf_phdr(class) + segment->size;
  2523. phnum++;
  2524. }
  2525. data = vmalloc(data_size);
  2526. if (!data)
  2527. return -ENOMEM;
  2528. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2529. ehdr = data;
  2530. memset(ehdr, 0, sizeof_elf_hdr(class));
  2531. init_elf_identification(ehdr, class);
  2532. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2533. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2534. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2535. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2536. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2537. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2538. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2539. phdr = data + sizeof_elf_hdr(class);
  2540. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2541. list_for_each_entry(segment, segs, node) {
  2542. memset(phdr, 0, sizeof_elf_phdr(class));
  2543. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2544. set_phdr_property(phdr, class, p_offset, offset);
  2545. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2546. set_phdr_property(phdr, class, p_paddr, segment->da);
  2547. set_phdr_property(phdr, class, p_filesz, segment->size);
  2548. set_phdr_property(phdr, class, p_memsz, segment->size);
  2549. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2550. set_phdr_property(phdr, class, p_align, 0);
  2551. if (segment->va) {
  2552. memcpy(data + offset, segment->va, segment->size);
  2553. } else {
  2554. ptr = devm_ioremap(dev, segment->da, segment->size);
  2555. if (!ptr) {
  2556. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2557. &segment->da, segment->size);
  2558. memset(data + offset, 0xff, segment->size);
  2559. } else {
  2560. memcpy_fromio(data + offset, ptr,
  2561. segment->size);
  2562. }
  2563. }
  2564. offset += segment->size;
  2565. phdr += sizeof_elf_phdr(class);
  2566. }
  2567. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2568. }
  2569. /* Saving dump to file system is always needed in this case. */
  2570. static bool cnss_dump_enabled(void)
  2571. {
  2572. return true;
  2573. }
  2574. #endif /* CONFIG_QCOM_RAMDUMP */
  2575. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2576. {
  2577. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2578. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2579. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2580. struct qcom_dump_segment *seg;
  2581. struct cnss_dump_meta_info meta_info = {0};
  2582. struct list_head head;
  2583. int i, ret = 0;
  2584. if (!dump_enabled()) {
  2585. cnss_pr_info("Dump collection is not enabled\n");
  2586. return ret;
  2587. }
  2588. INIT_LIST_HEAD(&head);
  2589. for (i = 0; i < dump_data->nentries; i++) {
  2590. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2591. cnss_pr_err("Unsupported dump type: %d",
  2592. dump_seg->type);
  2593. continue;
  2594. }
  2595. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2596. if (!seg) {
  2597. cnss_pr_err("%s: Failed to allocate mem for seg %d\n",
  2598. __func__, i);
  2599. continue;
  2600. }
  2601. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2602. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2603. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2604. }
  2605. meta_info.entry[dump_seg->type].entry_num++;
  2606. seg->da = dump_seg->address;
  2607. seg->va = dump_seg->v_address;
  2608. seg->size = dump_seg->size;
  2609. list_add_tail(&seg->node, &head);
  2610. dump_seg++;
  2611. }
  2612. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2613. if (!seg) {
  2614. cnss_pr_err("%s: Failed to allocate mem for elf ramdump seg\n",
  2615. __func__);
  2616. goto skip_elf_dump;
  2617. }
  2618. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2619. meta_info.version = CNSS_RAMDUMP_VERSION;
  2620. meta_info.chipset = plat_priv->device_id;
  2621. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2622. seg->va = &meta_info;
  2623. seg->size = sizeof(meta_info);
  2624. list_add(&seg->node, &head);
  2625. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2626. skip_elf_dump:
  2627. while (!list_empty(&head)) {
  2628. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2629. list_del(&seg->node);
  2630. kfree(seg);
  2631. }
  2632. return ret;
  2633. }
  2634. #ifdef CONFIG_CNSS2_SSR_DRIVER_DUMP
  2635. int cnss_do_host_ramdump(struct cnss_plat_data *plat_priv,
  2636. struct cnss_ssr_driver_dump_entry *ssr_entry,
  2637. size_t num_entries_loaded)
  2638. {
  2639. struct qcom_dump_segment *seg;
  2640. struct cnss_host_dump_meta_info meta_info = {0};
  2641. struct list_head head;
  2642. int dev_ret = 0;
  2643. struct device *new_device;
  2644. static const char * const wlan_str[] = {
  2645. [CNSS_HOST_WLAN_LOGS] = "wlan_logs",
  2646. [CNSS_HOST_HTC_CREDIT] = "htc_credit",
  2647. [CNSS_HOST_WMI_TX_CMP] = "wmi_tx_cmp",
  2648. [CNSS_HOST_WMI_COMMAND_LOG] = "wmi_command_log",
  2649. [CNSS_HOST_WMI_EVENT_LOG] = "wmi_event_log",
  2650. [CNSS_HOST_WMI_RX_EVENT] = "wmi_rx_event",
  2651. [CNSS_HOST_HAL_SOC] = "hal_soc",
  2652. [CNSS_HOST_GWLAN_LOGGING] = "gwlan_logging",
  2653. [CNSS_HOST_WMI_DEBUG_LOG_INFO] = "wmi_debug_log_info",
  2654. [CNSS_HOST_HTC_CREDIT_IDX] = "htc_credit_history_idx",
  2655. [CNSS_HOST_HTC_CREDIT_LEN] = "htc_credit_history_length",
  2656. [CNSS_HOST_WMI_TX_CMP_IDX] = "wmi_tx_cmp_idx",
  2657. [CNSS_HOST_WMI_COMMAND_LOG_IDX] = "wmi_command_log_idx",
  2658. [CNSS_HOST_WMI_EVENT_LOG_IDX] = "wmi_event_log_idx",
  2659. [CNSS_HOST_WMI_RX_EVENT_IDX] = "wmi_rx_event_idx",
  2660. [CNSS_HOST_HIF_CE_DESC_HISTORY] = "hif_ce_desc_history",
  2661. [CNSS_HOST_HIF_CE_DESC_HISTORY_BUFF] = "hif_ce_desc_history_buff",
  2662. [CNSS_HOST_HANG_EVENT_DATA] = "hang_event_data"
  2663. };
  2664. int i;
  2665. int ret = 0;
  2666. enum cnss_host_dump_type j;
  2667. if (!dump_enabled()) {
  2668. cnss_pr_info("Dump collection is not enabled\n");
  2669. return ret;
  2670. }
  2671. new_device = kcalloc(1, sizeof(*new_device), GFP_KERNEL);
  2672. if (!new_device) {
  2673. cnss_pr_err("Failed to alloc device mem\n");
  2674. return -ENOMEM;
  2675. }
  2676. device_initialize(new_device);
  2677. dev_set_name(new_device, "wlan_driver");
  2678. dev_ret = device_add(new_device);
  2679. if (dev_ret) {
  2680. cnss_pr_err("Failed to add new device\n");
  2681. goto put_device;
  2682. }
  2683. INIT_LIST_HEAD(&head);
  2684. for (i = 0; i < num_entries_loaded; i++) {
  2685. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2686. if (!seg) {
  2687. cnss_pr_err("Failed to alloc seg entry %d\n", i);
  2688. continue;
  2689. }
  2690. seg->va = ssr_entry[i].buffer_pointer;
  2691. seg->da = (dma_addr_t)ssr_entry[i].buffer_pointer;
  2692. seg->size = ssr_entry[i].buffer_size;
  2693. for (j = 0; j < CNSS_HOST_DUMP_TYPE_MAX; j++) {
  2694. if (strncmp(ssr_entry[i].region_name, wlan_str[j],
  2695. strlen(wlan_str[j])) == 0) {
  2696. meta_info.entry[i].type = j;
  2697. }
  2698. }
  2699. meta_info.entry[i].entry_start = i + 1;
  2700. meta_info.entry[i].entry_num++;
  2701. list_add_tail(&seg->node, &head);
  2702. }
  2703. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2704. if (!seg) {
  2705. cnss_pr_err("%s: Failed to allocate mem for host dump seg\n",
  2706. __func__);
  2707. goto skip_host_dump;
  2708. }
  2709. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2710. meta_info.version = CNSS_RAMDUMP_VERSION;
  2711. meta_info.chipset = plat_priv->device_id;
  2712. meta_info.total_entries = num_entries_loaded;
  2713. seg->va = &meta_info;
  2714. seg->da = (dma_addr_t)&meta_info;
  2715. seg->size = sizeof(meta_info);
  2716. list_add(&seg->node, &head);
  2717. ret = qcom_elf_dump(&head, new_device, ELF_CLASS);
  2718. skip_host_dump:
  2719. while (!list_empty(&head)) {
  2720. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2721. list_del(&seg->node);
  2722. kfree(seg);
  2723. }
  2724. device_del(new_device);
  2725. put_device:
  2726. put_device(new_device);
  2727. kfree(new_device);
  2728. return ret;
  2729. }
  2730. #endif
  2731. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2732. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2733. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2734. {
  2735. struct cnss_ramdump_info *ramdump_info;
  2736. struct msm_dump_entry dump_entry;
  2737. ramdump_info = &plat_priv->ramdump_info;
  2738. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2739. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2740. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2741. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2742. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2743. sizeof(ramdump_info->dump_data.name));
  2744. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2745. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2746. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2747. &dump_entry);
  2748. }
  2749. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2750. {
  2751. int ret = 0;
  2752. struct device *dev;
  2753. struct cnss_ramdump_info *ramdump_info;
  2754. u32 ramdump_size = 0;
  2755. dev = &plat_priv->plat_dev->dev;
  2756. ramdump_info = &plat_priv->ramdump_info;
  2757. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2758. /* dt type: legacy or converged */
  2759. ret = of_property_read_u32(dev->of_node,
  2760. "qcom,wlan-ramdump-dynamic",
  2761. &ramdump_size);
  2762. } else {
  2763. ret = of_property_read_u32(plat_priv->dev_node,
  2764. "qcom,wlan-ramdump-dynamic",
  2765. &ramdump_size);
  2766. }
  2767. if (ret == 0) {
  2768. ramdump_info->ramdump_va =
  2769. dma_alloc_coherent(dev, ramdump_size,
  2770. &ramdump_info->ramdump_pa,
  2771. GFP_KERNEL);
  2772. if (ramdump_info->ramdump_va)
  2773. ramdump_info->ramdump_size = ramdump_size;
  2774. }
  2775. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2776. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2777. if (ramdump_info->ramdump_size == 0) {
  2778. cnss_pr_info("Ramdump will not be collected");
  2779. goto out;
  2780. }
  2781. ret = cnss_init_dump_entry(plat_priv);
  2782. if (ret) {
  2783. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2784. goto free_ramdump;
  2785. }
  2786. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2787. if (!ramdump_info->ramdump_dev) {
  2788. cnss_pr_err("Failed to create ramdump device!");
  2789. ret = -ENOMEM;
  2790. goto free_ramdump;
  2791. }
  2792. return 0;
  2793. free_ramdump:
  2794. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2795. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2796. out:
  2797. return ret;
  2798. }
  2799. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2800. {
  2801. struct device *dev;
  2802. struct cnss_ramdump_info *ramdump_info;
  2803. dev = &plat_priv->plat_dev->dev;
  2804. ramdump_info = &plat_priv->ramdump_info;
  2805. if (ramdump_info->ramdump_dev)
  2806. cnss_destroy_ramdump_device(plat_priv,
  2807. ramdump_info->ramdump_dev);
  2808. if (ramdump_info->ramdump_va)
  2809. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2810. ramdump_info->ramdump_va,
  2811. ramdump_info->ramdump_pa);
  2812. }
  2813. /**
  2814. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2815. * @ret: Error returned by msm_dump_data_register_nominidump
  2816. *
  2817. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2818. * ignore failure.
  2819. *
  2820. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2821. */
  2822. static int cnss_ignore_dump_data_reg_fail(int ret)
  2823. {
  2824. return ret;
  2825. }
  2826. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2827. {
  2828. int ret = 0;
  2829. struct cnss_ramdump_info_v2 *info_v2;
  2830. struct cnss_dump_data *dump_data;
  2831. struct msm_dump_entry dump_entry;
  2832. struct device *dev = &plat_priv->plat_dev->dev;
  2833. u32 ramdump_size = 0;
  2834. info_v2 = &plat_priv->ramdump_info_v2;
  2835. dump_data = &info_v2->dump_data;
  2836. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2837. /* dt type: legacy or converged */
  2838. ret = of_property_read_u32(dev->of_node,
  2839. "qcom,wlan-ramdump-dynamic",
  2840. &ramdump_size);
  2841. } else {
  2842. ret = of_property_read_u32(plat_priv->dev_node,
  2843. "qcom,wlan-ramdump-dynamic",
  2844. &ramdump_size);
  2845. }
  2846. if (ret == 0)
  2847. info_v2->ramdump_size = ramdump_size;
  2848. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2849. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2850. if (!info_v2->dump_data_vaddr)
  2851. return -ENOMEM;
  2852. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2853. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2854. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2855. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2856. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2857. sizeof(dump_data->name));
  2858. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2859. dump_entry.addr = virt_to_phys(dump_data);
  2860. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2861. &dump_entry);
  2862. if (ret) {
  2863. ret = cnss_ignore_dump_data_reg_fail(ret);
  2864. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2865. ret ? "Error" : "Ignoring", ret);
  2866. goto free_ramdump;
  2867. }
  2868. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2869. if (!info_v2->ramdump_dev) {
  2870. cnss_pr_err("Failed to create ramdump device!\n");
  2871. ret = -ENOMEM;
  2872. goto free_ramdump;
  2873. }
  2874. return 0;
  2875. free_ramdump:
  2876. kfree(info_v2->dump_data_vaddr);
  2877. info_v2->dump_data_vaddr = NULL;
  2878. return ret;
  2879. }
  2880. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2881. {
  2882. struct cnss_ramdump_info_v2 *info_v2;
  2883. info_v2 = &plat_priv->ramdump_info_v2;
  2884. if (info_v2->ramdump_dev)
  2885. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2886. kfree(info_v2->dump_data_vaddr);
  2887. info_v2->dump_data_vaddr = NULL;
  2888. info_v2->dump_data_valid = false;
  2889. }
  2890. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2891. {
  2892. int ret = 0;
  2893. switch (plat_priv->device_id) {
  2894. case QCA6174_DEVICE_ID:
  2895. ret = cnss_register_ramdump_v1(plat_priv);
  2896. break;
  2897. case QCA6290_DEVICE_ID:
  2898. case QCA6390_DEVICE_ID:
  2899. case QCN7605_DEVICE_ID:
  2900. case QCA6490_DEVICE_ID:
  2901. case KIWI_DEVICE_ID:
  2902. case MANGO_DEVICE_ID:
  2903. case PEACH_DEVICE_ID:
  2904. ret = cnss_register_ramdump_v2(plat_priv);
  2905. break;
  2906. default:
  2907. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2908. ret = -ENODEV;
  2909. break;
  2910. }
  2911. return ret;
  2912. }
  2913. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2914. {
  2915. switch (plat_priv->device_id) {
  2916. case QCA6174_DEVICE_ID:
  2917. cnss_unregister_ramdump_v1(plat_priv);
  2918. break;
  2919. case QCA6290_DEVICE_ID:
  2920. case QCA6390_DEVICE_ID:
  2921. case QCN7605_DEVICE_ID:
  2922. case QCA6490_DEVICE_ID:
  2923. case KIWI_DEVICE_ID:
  2924. case MANGO_DEVICE_ID:
  2925. case PEACH_DEVICE_ID:
  2926. cnss_unregister_ramdump_v2(plat_priv);
  2927. break;
  2928. default:
  2929. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2930. break;
  2931. }
  2932. }
  2933. #else
  2934. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2935. {
  2936. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2937. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2938. struct device *dev = &plat_priv->plat_dev->dev;
  2939. u32 ramdump_size = 0;
  2940. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2941. &ramdump_size) == 0)
  2942. info_v2->ramdump_size = ramdump_size;
  2943. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2944. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2945. if (!info_v2->dump_data_vaddr)
  2946. return -ENOMEM;
  2947. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2948. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2949. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2950. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2951. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2952. sizeof(dump_data->name));
  2953. info_v2->ramdump_dev = dev;
  2954. return 0;
  2955. }
  2956. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2957. {
  2958. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2959. info_v2->ramdump_dev = NULL;
  2960. kfree(info_v2->dump_data_vaddr);
  2961. info_v2->dump_data_vaddr = NULL;
  2962. info_v2->dump_data_valid = false;
  2963. }
  2964. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2965. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2966. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2967. phys_addr_t *pa, unsigned long attrs)
  2968. {
  2969. struct sg_table sgt;
  2970. int ret;
  2971. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  2972. if (ret) {
  2973. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  2974. va, &dma, size, attrs);
  2975. return -EINVAL;
  2976. }
  2977. *pa = page_to_phys(sg_page(sgt.sgl));
  2978. sg_free_table(&sgt);
  2979. return 0;
  2980. }
  2981. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2982. enum cnss_fw_dump_type type, int seg_no,
  2983. void *va, phys_addr_t pa, size_t size)
  2984. {
  2985. struct md_region md_entry;
  2986. int ret;
  2987. switch (type) {
  2988. case CNSS_FW_IMAGE:
  2989. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2990. seg_no);
  2991. break;
  2992. case CNSS_FW_RDDM:
  2993. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2994. seg_no);
  2995. break;
  2996. case CNSS_FW_REMOTE_HEAP:
  2997. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2998. seg_no);
  2999. break;
  3000. default:
  3001. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3002. return -EINVAL;
  3003. }
  3004. md_entry.phys_addr = pa;
  3005. md_entry.virt_addr = (uintptr_t)va;
  3006. md_entry.size = size;
  3007. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3008. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3009. md_entry.name, va, &pa, size);
  3010. ret = msm_minidump_add_region(&md_entry);
  3011. if (ret < 0)
  3012. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  3013. return ret;
  3014. }
  3015. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3016. enum cnss_fw_dump_type type, int seg_no,
  3017. void *va, phys_addr_t pa, size_t size)
  3018. {
  3019. struct md_region md_entry;
  3020. int ret;
  3021. switch (type) {
  3022. case CNSS_FW_IMAGE:
  3023. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  3024. seg_no);
  3025. break;
  3026. case CNSS_FW_RDDM:
  3027. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  3028. seg_no);
  3029. break;
  3030. case CNSS_FW_REMOTE_HEAP:
  3031. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  3032. seg_no);
  3033. break;
  3034. default:
  3035. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3036. return -EINVAL;
  3037. }
  3038. md_entry.phys_addr = pa;
  3039. md_entry.virt_addr = (uintptr_t)va;
  3040. md_entry.size = size;
  3041. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3042. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3043. md_entry.name, va, &pa, size);
  3044. ret = msm_minidump_remove_region(&md_entry);
  3045. if (ret)
  3046. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  3047. ret);
  3048. return ret;
  3049. }
  3050. #else
  3051. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  3052. phys_addr_t *pa, unsigned long attrs)
  3053. {
  3054. return 0;
  3055. }
  3056. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  3057. enum cnss_fw_dump_type type, int seg_no,
  3058. void *va, phys_addr_t pa, size_t size)
  3059. {
  3060. return 0;
  3061. }
  3062. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3063. enum cnss_fw_dump_type type, int seg_no,
  3064. void *va, phys_addr_t pa, size_t size)
  3065. {
  3066. return 0;
  3067. }
  3068. #endif /* CONFIG_QCOM_MINIDUMP */
  3069. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  3070. const struct firmware **fw_entry,
  3071. const char *filename)
  3072. {
  3073. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  3074. return request_firmware_direct(fw_entry, filename,
  3075. &plat_priv->plat_dev->dev);
  3076. else
  3077. return firmware_request_nowarn(fw_entry, filename,
  3078. &plat_priv->plat_dev->dev);
  3079. }
  3080. #if IS_ENABLED(CONFIG_INTERCONNECT)
  3081. /**
  3082. * cnss_register_bus_scale() - Setup interconnect voting data
  3083. * @plat_priv: Platform data structure
  3084. *
  3085. * For different interconnect path configured in device tree setup voting data
  3086. * for list of bandwidth requirements.
  3087. *
  3088. * Result: 0 for success. -EINVAL if not configured
  3089. */
  3090. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3091. {
  3092. int ret = -EINVAL;
  3093. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  3094. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3095. struct device *dev = &plat_priv->plat_dev->dev;
  3096. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  3097. ret = of_property_read_u32(dev->of_node,
  3098. "qcom,icc-path-count",
  3099. &plat_priv->icc.path_count);
  3100. if (ret) {
  3101. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  3102. return 0;
  3103. }
  3104. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  3105. "qcom,bus-bw-cfg-count",
  3106. &plat_priv->icc.bus_bw_cfg_count);
  3107. if (ret) {
  3108. cnss_pr_err("Failed to get Bus BW Config table size\n");
  3109. goto cleanup;
  3110. }
  3111. cfg_arr_size = plat_priv->icc.path_count *
  3112. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  3113. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  3114. if (!cfg_arr) {
  3115. cnss_pr_err("Failed to alloc cfg table mem\n");
  3116. ret = -ENOMEM;
  3117. goto cleanup;
  3118. }
  3119. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  3120. "qcom,bus-bw-cfg", cfg_arr,
  3121. cfg_arr_size);
  3122. if (ret) {
  3123. cnss_pr_err("Invalid Bus BW Config Table\n");
  3124. goto cleanup;
  3125. }
  3126. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  3127. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  3128. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  3129. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  3130. GFP_KERNEL);
  3131. if (!bus_bw_info) {
  3132. ret = -ENOMEM;
  3133. goto out;
  3134. }
  3135. ret = of_property_read_string_index(dev->of_node,
  3136. "interconnect-names", idx,
  3137. &bus_bw_info->icc_name);
  3138. if (ret)
  3139. goto out;
  3140. bus_bw_info->icc_path =
  3141. of_icc_get(&plat_priv->plat_dev->dev,
  3142. bus_bw_info->icc_name);
  3143. if (IS_ERR(bus_bw_info->icc_path)) {
  3144. ret = PTR_ERR(bus_bw_info->icc_path);
  3145. if (ret != -EPROBE_DEFER) {
  3146. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  3147. bus_bw_info->icc_name, ret);
  3148. goto out;
  3149. }
  3150. }
  3151. bus_bw_info->cfg_table =
  3152. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  3153. sizeof(*bus_bw_info->cfg_table),
  3154. GFP_KERNEL);
  3155. if (!bus_bw_info->cfg_table) {
  3156. ret = -ENOMEM;
  3157. goto out;
  3158. }
  3159. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  3160. bus_bw_info->icc_name);
  3161. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  3162. CNSS_ICC_VOTE_MAX);
  3163. i < plat_priv->icc.bus_bw_cfg_count;
  3164. i++, j += 2) {
  3165. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  3166. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  3167. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  3168. i, bus_bw_info->cfg_table[i].avg_bw,
  3169. bus_bw_info->cfg_table[i].peak_bw);
  3170. }
  3171. list_add_tail(&bus_bw_info->list,
  3172. &plat_priv->icc.list_head);
  3173. }
  3174. kfree(cfg_arr);
  3175. return 0;
  3176. out:
  3177. list_for_each_entry_safe(bus_bw_info, tmp,
  3178. &plat_priv->icc.list_head, list) {
  3179. list_del(&bus_bw_info->list);
  3180. }
  3181. cleanup:
  3182. kfree(cfg_arr);
  3183. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3184. return ret;
  3185. }
  3186. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  3187. {
  3188. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3189. list_for_each_entry_safe(bus_bw_info, tmp,
  3190. &plat_priv->icc.list_head, list) {
  3191. list_del(&bus_bw_info->list);
  3192. if (bus_bw_info->icc_path)
  3193. icc_put(bus_bw_info->icc_path);
  3194. }
  3195. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3196. }
  3197. #else
  3198. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3199. {
  3200. return 0;
  3201. }
  3202. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  3203. #endif /* CONFIG_INTERCONNECT */
  3204. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  3205. {
  3206. struct cnss_plat_data *plat_priv = cb_ctx;
  3207. if (!plat_priv) {
  3208. cnss_pr_err("%s: Invalid context\n", __func__);
  3209. return;
  3210. }
  3211. if (status) {
  3212. cnss_pr_info("CNSS Daemon connected\n");
  3213. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3214. complete(&plat_priv->daemon_connected);
  3215. } else {
  3216. cnss_pr_info("CNSS Daemon disconnected\n");
  3217. reinit_completion(&plat_priv->daemon_connected);
  3218. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3219. }
  3220. }
  3221. static ssize_t enable_hds_store(struct device *dev,
  3222. struct device_attribute *attr,
  3223. const char *buf, size_t count)
  3224. {
  3225. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3226. unsigned int enable_hds = 0;
  3227. if (!plat_priv)
  3228. return -ENODEV;
  3229. if (sscanf(buf, "%du", &enable_hds) != 1) {
  3230. cnss_pr_err("Invalid enable_hds sysfs command\n");
  3231. return -EINVAL;
  3232. }
  3233. if (enable_hds)
  3234. plat_priv->hds_enabled = true;
  3235. else
  3236. plat_priv->hds_enabled = false;
  3237. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  3238. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  3239. return count;
  3240. }
  3241. static ssize_t recovery_show(struct device *dev,
  3242. struct device_attribute *attr,
  3243. char *buf)
  3244. {
  3245. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3246. u32 buf_size = PAGE_SIZE;
  3247. u32 curr_len = 0;
  3248. u32 buf_written = 0;
  3249. if (!plat_priv)
  3250. return -ENODEV;
  3251. buf_written = scnprintf(buf, buf_size,
  3252. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  3253. "BIT0 -- wlan fw recovery\n"
  3254. "BIT1 -- wlan pcss recovery\n"
  3255. "---------------------------------\n");
  3256. curr_len += buf_written;
  3257. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3258. "WLAN recovery %s[%d]\n",
  3259. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  3260. plat_priv->recovery_enabled);
  3261. curr_len += buf_written;
  3262. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3263. "WLAN PCSS recovery %s[%d]\n",
  3264. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  3265. plat_priv->recovery_pcss_enabled);
  3266. curr_len += buf_written;
  3267. /*
  3268. * Now size of curr_len is not over page size for sure,
  3269. * later if new item or none-fixed size item added, need
  3270. * add check to make sure curr_len is not over page size.
  3271. */
  3272. return curr_len;
  3273. }
  3274. static ssize_t time_sync_period_show(struct device *dev,
  3275. struct device_attribute *attr,
  3276. char *buf)
  3277. {
  3278. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3279. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  3280. plat_priv->ctrl_params.time_sync_period);
  3281. }
  3282. /**
  3283. * cnss_get_min_time_sync_period_by_vote() - Get minimum time sync period
  3284. * @plat_priv: Platform data structure
  3285. *
  3286. * Result: return minimum time sync period present in vote from wlan and sys
  3287. */
  3288. uint32_t cnss_get_min_time_sync_period_by_vote(struct cnss_plat_data *plat_priv)
  3289. {
  3290. unsigned int i, min_time_sync_period = CNSS_TIME_SYNC_PERIOD_INVALID;
  3291. unsigned int time_sync_period;
  3292. for (i = 0; i < TIME_SYNC_VOTE_MAX; i++) {
  3293. time_sync_period = plat_priv->ctrl_params.time_sync_period_vote[i];
  3294. if (min_time_sync_period > time_sync_period)
  3295. min_time_sync_period = time_sync_period;
  3296. }
  3297. return min_time_sync_period;
  3298. }
  3299. static ssize_t time_sync_period_store(struct device *dev,
  3300. struct device_attribute *attr,
  3301. const char *buf, size_t count)
  3302. {
  3303. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3304. unsigned int time_sync_period = 0;
  3305. if (!plat_priv)
  3306. return -ENODEV;
  3307. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  3308. cnss_pr_err("Invalid time sync sysfs command\n");
  3309. return -EINVAL;
  3310. }
  3311. if (time_sync_period < CNSS_MIN_TIME_SYNC_PERIOD) {
  3312. cnss_pr_err("Invalid time sync value\n");
  3313. return -EINVAL;
  3314. }
  3315. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_CNSS] =
  3316. time_sync_period;
  3317. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3318. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3319. cnss_pr_err("Invalid min time sync value\n");
  3320. return -EINVAL;
  3321. }
  3322. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3323. return count;
  3324. }
  3325. /**
  3326. * cnss_update_time_sync_period() - Set time sync period given by driver
  3327. * @dev: device structure
  3328. * @time_sync_period: time sync period value
  3329. *
  3330. * Update time sync period vote of driver and set minimum of time sync period
  3331. * from stored vote through wlan and sys config
  3332. * Result: return 0 for success, error in case of invalid value and no dev
  3333. */
  3334. int cnss_update_time_sync_period(struct device *dev, uint32_t time_sync_period)
  3335. {
  3336. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3337. if (!plat_priv)
  3338. return -ENODEV;
  3339. if (time_sync_period < CNSS_MIN_TIME_SYNC_PERIOD) {
  3340. cnss_pr_err("Invalid time sync value\n");
  3341. return -EINVAL;
  3342. }
  3343. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3344. time_sync_period;
  3345. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3346. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3347. cnss_pr_err("Invalid min time sync value\n");
  3348. return -EINVAL;
  3349. }
  3350. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3351. return 0;
  3352. }
  3353. EXPORT_SYMBOL(cnss_update_time_sync_period);
  3354. /**
  3355. * cnss_reset_time_sync_period() - Reset time sync period
  3356. * @dev: device structure
  3357. *
  3358. * Update time sync period vote of driver as invalid
  3359. * and reset minimum of time sync period from
  3360. * stored vote through wlan and sys config
  3361. * Result: return 0 for success, error in case of no dev
  3362. */
  3363. int cnss_reset_time_sync_period(struct device *dev)
  3364. {
  3365. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3366. unsigned int time_sync_period = 0;
  3367. if (!plat_priv)
  3368. return -ENODEV;
  3369. /* Driver vote is set to invalid in case of reset
  3370. * In this case, only vote valid to check is sys config
  3371. */
  3372. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3373. CNSS_TIME_SYNC_PERIOD_INVALID;
  3374. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3375. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3376. cnss_pr_err("Invalid min time sync value\n");
  3377. return -EINVAL;
  3378. }
  3379. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3380. return 0;
  3381. }
  3382. EXPORT_SYMBOL(cnss_reset_time_sync_period);
  3383. static ssize_t recovery_store(struct device *dev,
  3384. struct device_attribute *attr,
  3385. const char *buf, size_t count)
  3386. {
  3387. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3388. unsigned int recovery = 0;
  3389. if (!plat_priv)
  3390. return -ENODEV;
  3391. if (sscanf(buf, "%du", &recovery) != 1) {
  3392. cnss_pr_err("Invalid recovery sysfs command\n");
  3393. return -EINVAL;
  3394. }
  3395. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  3396. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  3397. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  3398. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  3399. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  3400. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  3401. cnss_send_subsys_restart_level_msg(plat_priv);
  3402. return count;
  3403. }
  3404. static ssize_t shutdown_store(struct device *dev,
  3405. struct device_attribute *attr,
  3406. const char *buf, size_t count)
  3407. {
  3408. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3409. cnss_pr_dbg("Received shutdown notification\n");
  3410. if (plat_priv) {
  3411. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3412. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3413. del_timer(&plat_priv->fw_boot_timer);
  3414. complete_all(&plat_priv->power_up_complete);
  3415. complete_all(&plat_priv->cal_complete);
  3416. cnss_pr_dbg("Shutdown notification handled\n");
  3417. }
  3418. return count;
  3419. }
  3420. static ssize_t fs_ready_store(struct device *dev,
  3421. struct device_attribute *attr,
  3422. const char *buf, size_t count)
  3423. {
  3424. int fs_ready = 0;
  3425. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3426. if (sscanf(buf, "%du", &fs_ready) != 1)
  3427. return -EINVAL;
  3428. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  3429. fs_ready, count);
  3430. if (!plat_priv) {
  3431. cnss_pr_err("plat_priv is NULL\n");
  3432. return count;
  3433. }
  3434. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  3435. cnss_pr_dbg("QMI is bypassed\n");
  3436. return count;
  3437. }
  3438. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  3439. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  3440. cnss_driver_event_post(plat_priv,
  3441. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3442. 0, NULL);
  3443. }
  3444. return count;
  3445. }
  3446. static ssize_t qdss_trace_start_store(struct device *dev,
  3447. struct device_attribute *attr,
  3448. const char *buf, size_t count)
  3449. {
  3450. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3451. wlfw_qdss_trace_start(plat_priv);
  3452. cnss_pr_dbg("Received QDSS start command\n");
  3453. return count;
  3454. }
  3455. static ssize_t qdss_trace_stop_store(struct device *dev,
  3456. struct device_attribute *attr,
  3457. const char *buf, size_t count)
  3458. {
  3459. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3460. u32 option = 0;
  3461. if (sscanf(buf, "%du", &option) != 1)
  3462. return -EINVAL;
  3463. wlfw_qdss_trace_stop(plat_priv, option);
  3464. cnss_pr_dbg("Received QDSS stop command\n");
  3465. return count;
  3466. }
  3467. static ssize_t qdss_conf_download_store(struct device *dev,
  3468. struct device_attribute *attr,
  3469. const char *buf, size_t count)
  3470. {
  3471. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3472. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  3473. cnss_pr_dbg("Received QDSS download config command\n");
  3474. return count;
  3475. }
  3476. static ssize_t hw_trace_override_store(struct device *dev,
  3477. struct device_attribute *attr,
  3478. const char *buf, size_t count)
  3479. {
  3480. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3481. int tmp = 0;
  3482. if (sscanf(buf, "%du", &tmp) != 1)
  3483. return -EINVAL;
  3484. plat_priv->hw_trc_override = tmp;
  3485. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3486. return count;
  3487. }
  3488. static ssize_t charger_mode_store(struct device *dev,
  3489. struct device_attribute *attr,
  3490. const char *buf, size_t count)
  3491. {
  3492. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3493. int tmp = 0;
  3494. if (sscanf(buf, "%du", &tmp) != 1)
  3495. return -EINVAL;
  3496. plat_priv->charger_mode = tmp;
  3497. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  3498. return count;
  3499. }
  3500. static DEVICE_ATTR_WO(fs_ready);
  3501. static DEVICE_ATTR_WO(shutdown);
  3502. static DEVICE_ATTR_RW(recovery);
  3503. static DEVICE_ATTR_WO(enable_hds);
  3504. static DEVICE_ATTR_WO(qdss_trace_start);
  3505. static DEVICE_ATTR_WO(qdss_trace_stop);
  3506. static DEVICE_ATTR_WO(qdss_conf_download);
  3507. static DEVICE_ATTR_WO(hw_trace_override);
  3508. static DEVICE_ATTR_WO(charger_mode);
  3509. static DEVICE_ATTR_RW(time_sync_period);
  3510. static struct attribute *cnss_attrs[] = {
  3511. &dev_attr_fs_ready.attr,
  3512. &dev_attr_shutdown.attr,
  3513. &dev_attr_recovery.attr,
  3514. &dev_attr_enable_hds.attr,
  3515. &dev_attr_qdss_trace_start.attr,
  3516. &dev_attr_qdss_trace_stop.attr,
  3517. &dev_attr_qdss_conf_download.attr,
  3518. &dev_attr_hw_trace_override.attr,
  3519. &dev_attr_charger_mode.attr,
  3520. &dev_attr_time_sync_period.attr,
  3521. NULL,
  3522. };
  3523. static struct attribute_group cnss_attr_group = {
  3524. .attrs = cnss_attrs,
  3525. };
  3526. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3527. {
  3528. struct device *dev = &plat_priv->plat_dev->dev;
  3529. int ret;
  3530. char cnss_name[CNSS_FS_NAME_SIZE];
  3531. char shutdown_name[32];
  3532. if (cnss_is_dual_wlan_enabled()) {
  3533. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3534. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3535. snprintf(shutdown_name, sizeof(shutdown_name),
  3536. "shutdown_wlan_%d", plat_priv->plat_idx);
  3537. } else {
  3538. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3539. snprintf(shutdown_name, sizeof(shutdown_name),
  3540. "shutdown_wlan");
  3541. }
  3542. ret = sysfs_create_link(kernel_kobj, &dev->kobj, cnss_name);
  3543. if (ret) {
  3544. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3545. ret);
  3546. goto out;
  3547. }
  3548. /* This is only for backward compatibility. */
  3549. ret = sysfs_create_link(kernel_kobj, &dev->kobj, shutdown_name);
  3550. if (ret) {
  3551. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3552. ret);
  3553. goto rm_cnss_link;
  3554. }
  3555. return 0;
  3556. rm_cnss_link:
  3557. sysfs_remove_link(kernel_kobj, cnss_name);
  3558. out:
  3559. return ret;
  3560. }
  3561. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3562. {
  3563. char cnss_name[CNSS_FS_NAME_SIZE];
  3564. char shutdown_name[32];
  3565. if (cnss_is_dual_wlan_enabled()) {
  3566. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3567. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3568. snprintf(shutdown_name, sizeof(shutdown_name),
  3569. "shutdown_wlan_%d", plat_priv->plat_idx);
  3570. } else {
  3571. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3572. snprintf(shutdown_name, sizeof(shutdown_name),
  3573. "shutdown_wlan");
  3574. }
  3575. sysfs_remove_link(kernel_kobj, shutdown_name);
  3576. sysfs_remove_link(kernel_kobj, cnss_name);
  3577. }
  3578. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3579. {
  3580. int ret = 0;
  3581. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3582. &cnss_attr_group);
  3583. if (ret) {
  3584. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3585. ret);
  3586. goto out;
  3587. }
  3588. cnss_create_sysfs_link(plat_priv);
  3589. return 0;
  3590. out:
  3591. return ret;
  3592. }
  3593. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3594. {
  3595. cnss_remove_sysfs_link(plat_priv);
  3596. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3597. }
  3598. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3599. {
  3600. spin_lock_init(&plat_priv->event_lock);
  3601. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3602. WQ_UNBOUND, 1);
  3603. if (!plat_priv->event_wq) {
  3604. cnss_pr_err("Failed to create event workqueue!\n");
  3605. return -EFAULT;
  3606. }
  3607. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3608. INIT_LIST_HEAD(&plat_priv->event_list);
  3609. return 0;
  3610. }
  3611. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3612. {
  3613. destroy_workqueue(plat_priv->event_wq);
  3614. }
  3615. static int cnss_reboot_notifier(struct notifier_block *nb,
  3616. unsigned long action,
  3617. void *data)
  3618. {
  3619. struct cnss_plat_data *plat_priv =
  3620. container_of(nb, struct cnss_plat_data, reboot_nb);
  3621. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3622. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3623. del_timer(&plat_priv->fw_boot_timer);
  3624. complete_all(&plat_priv->power_up_complete);
  3625. complete_all(&plat_priv->cal_complete);
  3626. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3627. return NOTIFY_DONE;
  3628. }
  3629. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3630. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3631. {
  3632. struct Object client_env;
  3633. struct Object app_object;
  3634. u32 wifi_uid = HW_WIFI_UID;
  3635. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3636. int ret;
  3637. u8 state = 0;
  3638. /* Once this flag is set, secure peripheral feature
  3639. * will not be supported till next reboot
  3640. */
  3641. if (plat_priv->sec_peri_feature_disable)
  3642. return 0;
  3643. /* get rootObj */
  3644. ret = get_client_env_object(&client_env);
  3645. if (ret) {
  3646. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3647. goto end;
  3648. }
  3649. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3650. if (ret) {
  3651. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3652. if (ret == FEATURE_NOT_SUPPORTED) {
  3653. ret = 0; /* Do not Assert */
  3654. plat_priv->sec_peri_feature_disable = true;
  3655. cnss_pr_dbg("Secure HW feature not supported\n");
  3656. }
  3657. goto exit_release_clientenv;
  3658. }
  3659. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3660. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3661. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3662. ObjectCounts_pack(1, 1, 0, 0));
  3663. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3664. if (ret) {
  3665. if (ret == PERIPHERAL_NOT_FOUND) {
  3666. ret = 0; /* Do not Assert */
  3667. plat_priv->sec_peri_feature_disable = true;
  3668. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3669. }
  3670. goto exit_release_app_obj;
  3671. }
  3672. if (state == 1)
  3673. set_bit(CNSS_WLAN_HW_DISABLED,
  3674. &plat_priv->driver_state);
  3675. else
  3676. clear_bit(CNSS_WLAN_HW_DISABLED,
  3677. &plat_priv->driver_state);
  3678. exit_release_app_obj:
  3679. Object_release(app_object);
  3680. exit_release_clientenv:
  3681. Object_release(client_env);
  3682. end:
  3683. if (ret) {
  3684. cnss_pr_err("Unable to get HW disable status\n");
  3685. CNSS_ASSERT(0);
  3686. }
  3687. return ret;
  3688. }
  3689. #else
  3690. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3691. {
  3692. return 0;
  3693. }
  3694. #endif
  3695. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  3696. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  3697. {
  3698. }
  3699. #else
  3700. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  3701. {
  3702. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3703. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3704. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3705. }
  3706. #endif
  3707. #ifdef CONFIG_WCNSS_MEM_PRE_ALLOC
  3708. static void cnss_initialize_mem_pool(unsigned long device_id)
  3709. {
  3710. cnss_initialize_prealloc_pool(device_id);
  3711. }
  3712. static void cnss_deinitialize_mem_pool(void)
  3713. {
  3714. cnss_deinitialize_prealloc_pool();
  3715. }
  3716. #else
  3717. static void cnss_initialize_mem_pool(unsigned long device_id)
  3718. {
  3719. }
  3720. static void cnss_deinitialize_mem_pool(void)
  3721. {
  3722. }
  3723. #endif
  3724. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3725. {
  3726. int ret;
  3727. ret = cnss_init_sol_gpio(plat_priv);
  3728. if (ret)
  3729. return ret;
  3730. timer_setup(&plat_priv->fw_boot_timer,
  3731. cnss_bus_fw_boot_timeout_hdlr, 0);
  3732. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3733. if (ret)
  3734. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3735. ret);
  3736. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3737. init_completion(&plat_priv->power_up_complete);
  3738. init_completion(&plat_priv->cal_complete);
  3739. init_completion(&plat_priv->rddm_complete);
  3740. init_completion(&plat_priv->recovery_complete);
  3741. init_completion(&plat_priv->daemon_connected);
  3742. mutex_init(&plat_priv->dev_lock);
  3743. mutex_init(&plat_priv->driver_ops_lock);
  3744. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3745. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3746. if (ret)
  3747. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3748. ret);
  3749. plat_priv->recovery_ws =
  3750. wakeup_source_register(&plat_priv->plat_dev->dev,
  3751. "CNSS_FW_RECOVERY");
  3752. if (!plat_priv->recovery_ws)
  3753. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3754. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3755. cnss_daemon_connection_update_cb,
  3756. plat_priv);
  3757. if (ret)
  3758. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3759. ret);
  3760. cnss_sram_dump_init(plat_priv);
  3761. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3762. "qcom,rc-ep-short-channel"))
  3763. cnss_set_feature_list(plat_priv, CNSS_RC_EP_ULTRASHORT_CHANNEL_V01);
  3764. if (plat_priv->device_id == PEACH_DEVICE_ID)
  3765. cnss_set_feature_list(plat_priv, CNSS_AUX_UC_SUPPORT_V01);
  3766. return 0;
  3767. }
  3768. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  3769. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  3770. {
  3771. }
  3772. #else
  3773. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  3774. {
  3775. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3776. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3777. kfree(plat_priv->sram_dump);
  3778. }
  3779. #endif
  3780. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3781. {
  3782. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3783. plat_priv);
  3784. complete_all(&plat_priv->recovery_complete);
  3785. complete_all(&plat_priv->rddm_complete);
  3786. complete_all(&plat_priv->cal_complete);
  3787. complete_all(&plat_priv->power_up_complete);
  3788. complete_all(&plat_priv->daemon_connected);
  3789. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3790. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3791. del_timer(&plat_priv->fw_boot_timer);
  3792. wakeup_source_unregister(plat_priv->recovery_ws);
  3793. cnss_deinit_sol_gpio(plat_priv);
  3794. cnss_sram_dump_deinit(plat_priv);
  3795. kfree(plat_priv->on_chip_pmic_board_ids);
  3796. }
  3797. static void cnss_init_time_sync_period_default(struct cnss_plat_data *plat_priv)
  3798. {
  3799. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3800. CNSS_TIME_SYNC_PERIOD_INVALID;
  3801. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_CNSS] =
  3802. CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3803. }
  3804. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  3805. {
  3806. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  3807. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  3808. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3809. "qcom,wlan-cbc-enabled");
  3810. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  3811. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  3812. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  3813. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  3814. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3815. cnss_init_time_sync_period_default(plat_priv);
  3816. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  3817. * enabled by default
  3818. */
  3819. plat_priv->adsp_pc_enabled = true;
  3820. }
  3821. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  3822. {
  3823. struct device *dev = &plat_priv->plat_dev->dev;
  3824. plat_priv->use_pm_domain =
  3825. of_property_read_bool(dev->of_node, "use-pm-domain");
  3826. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  3827. }
  3828. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  3829. {
  3830. struct device *dev = &plat_priv->plat_dev->dev;
  3831. plat_priv->set_wlaon_pwr_ctrl =
  3832. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  3833. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  3834. plat_priv->set_wlaon_pwr_ctrl);
  3835. }
  3836. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  3837. {
  3838. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3839. "qcom,converged-dt") ||
  3840. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3841. "qcom,same-dt-multi-dev") ||
  3842. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3843. "qcom,multi-wlan-exchg"));
  3844. }
  3845. static const struct platform_device_id cnss_platform_id_table[] = {
  3846. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  3847. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  3848. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  3849. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  3850. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  3851. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  3852. { .name = "peach", .driver_data = PEACH_DEVICE_ID, },
  3853. { .name = "qcaconv", .driver_data = 0, },
  3854. { },
  3855. };
  3856. static const struct of_device_id cnss_of_match_table[] = {
  3857. {
  3858. .compatible = "qcom,cnss",
  3859. .data = (void *)&cnss_platform_id_table[0]},
  3860. {
  3861. .compatible = "qcom,cnss-qca6290",
  3862. .data = (void *)&cnss_platform_id_table[1]},
  3863. {
  3864. .compatible = "qcom,cnss-qca6390",
  3865. .data = (void *)&cnss_platform_id_table[2]},
  3866. {
  3867. .compatible = "qcom,cnss-qca6490",
  3868. .data = (void *)&cnss_platform_id_table[3]},
  3869. {
  3870. .compatible = "qcom,cnss-kiwi",
  3871. .data = (void *)&cnss_platform_id_table[4]},
  3872. {
  3873. .compatible = "qcom,cnss-mango",
  3874. .data = (void *)&cnss_platform_id_table[5]},
  3875. {
  3876. .compatible = "qcom,cnss-peach",
  3877. .data = (void *)&cnss_platform_id_table[6]},
  3878. {
  3879. .compatible = "qcom,cnss-qca-converged",
  3880. .data = (void *)&cnss_platform_id_table[7]},
  3881. { },
  3882. };
  3883. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  3884. static inline bool
  3885. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  3886. {
  3887. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3888. "use-nv-mac");
  3889. }
  3890. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  3891. {
  3892. struct device_node *child;
  3893. u32 id, i;
  3894. int id_n, device_identifier_gpio, ret;
  3895. u8 gpio_value;
  3896. if (plat_priv->dt_type != CNSS_DTT_CONVERGED)
  3897. return 0;
  3898. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  3899. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  3900. if (ret) {
  3901. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  3902. return ret;
  3903. }
  3904. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  3905. gpio_value = gpio_get_value(device_identifier_gpio);
  3906. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  3907. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  3908. child) {
  3909. if (strcmp(child->name, "chip_cfg"))
  3910. continue;
  3911. id_n = of_property_count_u32_elems(child, "supported-ids");
  3912. if (id_n <= 0) {
  3913. cnss_pr_err("Device id is NOT set\n");
  3914. return -EINVAL;
  3915. }
  3916. for (i = 0; i < id_n; i++) {
  3917. ret = of_property_read_u32_index(child,
  3918. "supported-ids",
  3919. i, &id);
  3920. if (ret) {
  3921. cnss_pr_err("Failed to read supported ids\n");
  3922. return -EINVAL;
  3923. }
  3924. if (gpio_value && id == QCA6490_DEVICE_ID) {
  3925. plat_priv->plat_dev->dev.of_node = child;
  3926. plat_priv->device_id = QCA6490_DEVICE_ID;
  3927. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  3928. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3929. child->name, i, id);
  3930. return 0;
  3931. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  3932. plat_priv->plat_dev->dev.of_node = child;
  3933. plat_priv->device_id = KIWI_DEVICE_ID;
  3934. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  3935. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3936. child->name, i, id);
  3937. return 0;
  3938. }
  3939. }
  3940. }
  3941. return -EINVAL;
  3942. }
  3943. static inline u32
  3944. cnss_dt_type(struct cnss_plat_data *plat_priv)
  3945. {
  3946. bool is_converged_dt = of_property_read_bool(
  3947. plat_priv->plat_dev->dev.of_node, "qcom,converged-dt");
  3948. bool is_multi_wlan_xchg;
  3949. if (is_converged_dt)
  3950. return CNSS_DTT_CONVERGED;
  3951. is_multi_wlan_xchg = of_property_read_bool(
  3952. plat_priv->plat_dev->dev.of_node, "qcom,multi-wlan-exchg");
  3953. if (is_multi_wlan_xchg)
  3954. return CNSS_DTT_MULTIEXCHG;
  3955. return CNSS_DTT_LEGACY;
  3956. }
  3957. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  3958. {
  3959. int ret = 0;
  3960. int retry = 0;
  3961. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  3962. return 0;
  3963. retry:
  3964. ret = cnss_power_on_device(plat_priv, true);
  3965. if (ret)
  3966. goto end;
  3967. ret = cnss_bus_init(plat_priv);
  3968. if (ret) {
  3969. if ((ret != -EPROBE_DEFER) &&
  3970. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  3971. cnss_power_off_device(plat_priv);
  3972. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  3973. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  3974. goto retry;
  3975. }
  3976. goto power_off;
  3977. }
  3978. return 0;
  3979. power_off:
  3980. cnss_power_off_device(plat_priv);
  3981. end:
  3982. return ret;
  3983. }
  3984. int cnss_wlan_hw_enable(void)
  3985. {
  3986. struct cnss_plat_data *plat_priv;
  3987. int ret = 0;
  3988. if (cnss_is_dual_wlan_enabled())
  3989. plat_priv = cnss_get_first_plat_priv(NULL);
  3990. else
  3991. plat_priv = cnss_get_plat_priv(NULL);
  3992. if (!plat_priv)
  3993. return -ENODEV;
  3994. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  3995. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  3996. goto register_driver;
  3997. ret = cnss_wlan_device_init(plat_priv);
  3998. if (ret) {
  3999. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state))
  4000. CNSS_ASSERT(0);
  4001. return ret;
  4002. }
  4003. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  4004. cnss_driver_event_post(plat_priv,
  4005. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  4006. 0, NULL);
  4007. register_driver:
  4008. if (plat_priv->driver_ops)
  4009. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  4010. return ret;
  4011. }
  4012. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  4013. int cnss_set_wfc_mode(struct device *dev, struct cnss_wfc_cfg cfg)
  4014. {
  4015. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  4016. int ret = 0;
  4017. if (!plat_priv)
  4018. return -ENODEV;
  4019. /* If IMS server is connected, return success without QMI send */
  4020. if (test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  4021. cnss_pr_dbg("Ignore host request as IMS server is connected");
  4022. return ret;
  4023. }
  4024. ret = cnss_wlfw_send_host_wfc_call_status(plat_priv, cfg);
  4025. return ret;
  4026. }
  4027. EXPORT_SYMBOL(cnss_set_wfc_mode);
  4028. static int cnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  4029. unsigned long *thermal_state)
  4030. {
  4031. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4032. if (!tcdev || !tcdev->devdata) {
  4033. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4034. return -EINVAL;
  4035. }
  4036. cnss_tcdev = tcdev->devdata;
  4037. *thermal_state = cnss_tcdev->max_thermal_state;
  4038. return 0;
  4039. }
  4040. static int cnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  4041. unsigned long *thermal_state)
  4042. {
  4043. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4044. if (!tcdev || !tcdev->devdata) {
  4045. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4046. return -EINVAL;
  4047. }
  4048. cnss_tcdev = tcdev->devdata;
  4049. *thermal_state = cnss_tcdev->curr_thermal_state;
  4050. return 0;
  4051. }
  4052. static int cnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  4053. unsigned long thermal_state)
  4054. {
  4055. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4056. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  4057. int ret = 0;
  4058. if (!tcdev || !tcdev->devdata) {
  4059. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4060. return -EINVAL;
  4061. }
  4062. cnss_tcdev = tcdev->devdata;
  4063. if (thermal_state > cnss_tcdev->max_thermal_state)
  4064. return -EINVAL;
  4065. cnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  4066. thermal_state, cnss_tcdev->tcdev_id);
  4067. mutex_lock(&plat_priv->tcdev_lock);
  4068. ret = cnss_bus_set_therm_cdev_state(plat_priv,
  4069. thermal_state,
  4070. cnss_tcdev->tcdev_id);
  4071. if (!ret)
  4072. cnss_tcdev->curr_thermal_state = thermal_state;
  4073. mutex_unlock(&plat_priv->tcdev_lock);
  4074. if (ret) {
  4075. cnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  4076. ret, cnss_tcdev->tcdev_id);
  4077. return ret;
  4078. }
  4079. return 0;
  4080. }
  4081. static struct thermal_cooling_device_ops cnss_cooling_ops = {
  4082. .get_max_state = cnss_tcdev_get_max_state,
  4083. .get_cur_state = cnss_tcdev_get_cur_state,
  4084. .set_cur_state = cnss_tcdev_set_cur_state,
  4085. };
  4086. int cnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  4087. int tcdev_id)
  4088. {
  4089. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4090. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4091. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  4092. struct device_node *dev_node;
  4093. int ret = 0;
  4094. if (!priv) {
  4095. cnss_pr_err("Platform driver is not initialized!\n");
  4096. return -ENODEV;
  4097. }
  4098. cnss_tcdev = kzalloc(sizeof(*cnss_tcdev), GFP_KERNEL);
  4099. if (!cnss_tcdev) {
  4100. cnss_pr_err("Failed to allocate cnss_tcdev object!\n");
  4101. return -ENOMEM;
  4102. }
  4103. cnss_tcdev->tcdev_id = tcdev_id;
  4104. cnss_tcdev->max_thermal_state = max_state;
  4105. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  4106. "qcom,cnss_cdev%d", tcdev_id);
  4107. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  4108. if (!dev_node) {
  4109. cnss_pr_err("Failed to get cooling device node\n");
  4110. kfree(cnss_tcdev);
  4111. return -EINVAL;
  4112. }
  4113. cnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  4114. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  4115. cnss_tcdev->tcdev = thermal_of_cooling_device_register(dev_node,
  4116. cdev_node_name,
  4117. cnss_tcdev,
  4118. &cnss_cooling_ops);
  4119. if (IS_ERR_OR_NULL(cnss_tcdev->tcdev)) {
  4120. ret = PTR_ERR(cnss_tcdev->tcdev);
  4121. cnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  4122. ret, cnss_tcdev->tcdev_id);
  4123. kfree(cnss_tcdev);
  4124. } else {
  4125. cnss_pr_dbg("Cooling device registered for cdev id %d",
  4126. cnss_tcdev->tcdev_id);
  4127. mutex_lock(&priv->tcdev_lock);
  4128. list_add(&cnss_tcdev->tcdev_list,
  4129. &priv->cnss_tcdev_list);
  4130. mutex_unlock(&priv->tcdev_lock);
  4131. }
  4132. } else {
  4133. cnss_pr_dbg("Cooling device registration not supported");
  4134. kfree(cnss_tcdev);
  4135. ret = -EOPNOTSUPP;
  4136. }
  4137. return ret;
  4138. }
  4139. EXPORT_SYMBOL(cnss_thermal_cdev_register);
  4140. void cnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  4141. {
  4142. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4143. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4144. if (!priv) {
  4145. cnss_pr_err("Platform driver is not initialized!\n");
  4146. return;
  4147. }
  4148. mutex_lock(&priv->tcdev_lock);
  4149. while (!list_empty(&priv->cnss_tcdev_list)) {
  4150. cnss_tcdev = list_first_entry(&priv->cnss_tcdev_list,
  4151. struct cnss_thermal_cdev,
  4152. tcdev_list);
  4153. thermal_cooling_device_unregister(cnss_tcdev->tcdev);
  4154. list_del(&cnss_tcdev->tcdev_list);
  4155. kfree(cnss_tcdev);
  4156. }
  4157. mutex_unlock(&priv->tcdev_lock);
  4158. }
  4159. EXPORT_SYMBOL(cnss_thermal_cdev_unregister);
  4160. int cnss_get_curr_therm_cdev_state(struct device *dev,
  4161. unsigned long *thermal_state,
  4162. int tcdev_id)
  4163. {
  4164. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4165. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4166. if (!priv) {
  4167. cnss_pr_err("Platform driver is not initialized!\n");
  4168. return -ENODEV;
  4169. }
  4170. mutex_lock(&priv->tcdev_lock);
  4171. list_for_each_entry(cnss_tcdev, &priv->cnss_tcdev_list, tcdev_list) {
  4172. if (cnss_tcdev->tcdev_id != tcdev_id)
  4173. continue;
  4174. *thermal_state = cnss_tcdev->curr_thermal_state;
  4175. mutex_unlock(&priv->tcdev_lock);
  4176. cnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  4177. cnss_tcdev->curr_thermal_state, tcdev_id);
  4178. return 0;
  4179. }
  4180. mutex_unlock(&priv->tcdev_lock);
  4181. cnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  4182. return -EINVAL;
  4183. }
  4184. EXPORT_SYMBOL(cnss_get_curr_therm_cdev_state);
  4185. static int cnss_probe(struct platform_device *plat_dev)
  4186. {
  4187. int ret = 0;
  4188. struct cnss_plat_data *plat_priv;
  4189. const struct of_device_id *of_id;
  4190. const struct platform_device_id *device_id;
  4191. if (cnss_get_plat_priv(plat_dev)) {
  4192. cnss_pr_err("Driver is already initialized!\n");
  4193. ret = -EEXIST;
  4194. goto out;
  4195. }
  4196. ret = cnss_plat_env_available();
  4197. if (ret)
  4198. goto out;
  4199. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  4200. if (!of_id || !of_id->data) {
  4201. cnss_pr_err("Failed to find of match device!\n");
  4202. ret = -ENODEV;
  4203. goto out;
  4204. }
  4205. device_id = of_id->data;
  4206. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  4207. GFP_KERNEL);
  4208. if (!plat_priv) {
  4209. ret = -ENOMEM;
  4210. goto out;
  4211. }
  4212. plat_priv->plat_dev = plat_dev;
  4213. plat_priv->dev_node = NULL;
  4214. plat_priv->device_id = device_id->driver_data;
  4215. plat_priv->dt_type = cnss_dt_type(plat_priv);
  4216. cnss_pr_dbg("Probing platform driver from dt type: %d\n",
  4217. plat_priv->dt_type);
  4218. plat_priv->use_fw_path_with_prefix =
  4219. cnss_use_fw_path_with_prefix(plat_priv);
  4220. ret = cnss_get_dev_cfg_node(plat_priv);
  4221. if (ret) {
  4222. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  4223. goto reset_plat_dev;
  4224. }
  4225. cnss_initialize_mem_pool(plat_priv->device_id);
  4226. ret = cnss_get_pld_bus_ops_name(plat_priv);
  4227. if (ret)
  4228. cnss_pr_vdbg("Failed to find bus ops name, err = %d\n",
  4229. ret);
  4230. ret = cnss_get_rc_num(plat_priv);
  4231. if (ret)
  4232. cnss_pr_err("Failed to find PCIe RC number, err = %d\n", ret);
  4233. cnss_pr_dbg("rc_num=%d\n", plat_priv->rc_num);
  4234. plat_priv->bus_type = cnss_get_bus_type(plat_priv);
  4235. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  4236. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  4237. cnss_set_plat_priv(plat_dev, plat_priv);
  4238. cnss_set_device_name(plat_priv);
  4239. platform_set_drvdata(plat_dev, plat_priv);
  4240. INIT_LIST_HEAD(&plat_priv->vreg_list);
  4241. INIT_LIST_HEAD(&plat_priv->clk_list);
  4242. cnss_get_pm_domain_info(plat_priv);
  4243. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  4244. cnss_power_misc_params_init(plat_priv);
  4245. cnss_get_tcs_info(plat_priv);
  4246. cnss_get_cpr_info(plat_priv);
  4247. cnss_aop_interface_init(plat_priv);
  4248. cnss_init_control_params(plat_priv);
  4249. ret = cnss_get_resources(plat_priv);
  4250. if (ret)
  4251. goto reset_ctx;
  4252. ret = cnss_register_esoc(plat_priv);
  4253. if (ret)
  4254. goto free_res;
  4255. ret = cnss_register_bus_scale(plat_priv);
  4256. if (ret)
  4257. goto unreg_esoc;
  4258. ret = cnss_create_sysfs(plat_priv);
  4259. if (ret)
  4260. goto unreg_bus_scale;
  4261. ret = cnss_event_work_init(plat_priv);
  4262. if (ret)
  4263. goto remove_sysfs;
  4264. ret = cnss_dms_init(plat_priv);
  4265. if (ret)
  4266. goto deinit_event_work;
  4267. ret = cnss_debugfs_create(plat_priv);
  4268. if (ret)
  4269. goto deinit_dms;
  4270. ret = cnss_misc_init(plat_priv);
  4271. if (ret)
  4272. goto destroy_debugfs;
  4273. ret = cnss_wlan_hw_disable_check(plat_priv);
  4274. if (ret)
  4275. goto deinit_misc;
  4276. /* Make sure all platform related init are done before
  4277. * device power on and bus init.
  4278. */
  4279. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  4280. ret = cnss_wlan_device_init(plat_priv);
  4281. if (ret)
  4282. goto deinit_misc;
  4283. } else {
  4284. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  4285. }
  4286. cnss_register_coex_service(plat_priv);
  4287. cnss_register_ims_service(plat_priv);
  4288. mutex_init(&plat_priv->tcdev_lock);
  4289. INIT_LIST_HEAD(&plat_priv->cnss_tcdev_list);
  4290. cnss_pr_info("Platform driver probed successfully.\n");
  4291. return 0;
  4292. deinit_misc:
  4293. cnss_misc_deinit(plat_priv);
  4294. destroy_debugfs:
  4295. cnss_debugfs_destroy(plat_priv);
  4296. deinit_dms:
  4297. cnss_dms_deinit(plat_priv);
  4298. deinit_event_work:
  4299. cnss_event_work_deinit(plat_priv);
  4300. remove_sysfs:
  4301. cnss_remove_sysfs(plat_priv);
  4302. unreg_bus_scale:
  4303. cnss_unregister_bus_scale(plat_priv);
  4304. unreg_esoc:
  4305. cnss_unregister_esoc(plat_priv);
  4306. free_res:
  4307. cnss_put_resources(plat_priv);
  4308. reset_ctx:
  4309. cnss_aop_interface_deinit(plat_priv);
  4310. platform_set_drvdata(plat_dev, NULL);
  4311. cnss_deinitialize_mem_pool();
  4312. reset_plat_dev:
  4313. cnss_clear_plat_priv(plat_priv);
  4314. out:
  4315. return ret;
  4316. }
  4317. static int cnss_remove(struct platform_device *plat_dev)
  4318. {
  4319. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  4320. plat_priv->audio_iommu_domain = NULL;
  4321. cnss_genl_exit();
  4322. cnss_unregister_ims_service(plat_priv);
  4323. cnss_unregister_coex_service(plat_priv);
  4324. cnss_bus_deinit(plat_priv);
  4325. cnss_misc_deinit(plat_priv);
  4326. cnss_debugfs_destroy(plat_priv);
  4327. cnss_dms_deinit(plat_priv);
  4328. cnss_qmi_deinit(plat_priv);
  4329. cnss_event_work_deinit(plat_priv);
  4330. cnss_cancel_dms_work();
  4331. cnss_remove_sysfs(plat_priv);
  4332. cnss_unregister_bus_scale(plat_priv);
  4333. cnss_unregister_esoc(plat_priv);
  4334. cnss_put_resources(plat_priv);
  4335. cnss_aop_interface_deinit(plat_priv);
  4336. cnss_deinitialize_mem_pool();
  4337. platform_set_drvdata(plat_dev, NULL);
  4338. cnss_clear_plat_priv(plat_priv);
  4339. return 0;
  4340. }
  4341. static struct platform_driver cnss_platform_driver = {
  4342. .probe = cnss_probe,
  4343. .remove = cnss_remove,
  4344. .driver = {
  4345. .name = "cnss2",
  4346. .of_match_table = cnss_of_match_table,
  4347. #ifdef CONFIG_CNSS_ASYNC
  4348. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4349. #endif
  4350. },
  4351. };
  4352. static bool cnss_check_compatible_node(void)
  4353. {
  4354. struct device_node *dn = NULL;
  4355. for_each_matching_node(dn, cnss_of_match_table) {
  4356. if (of_device_is_available(dn)) {
  4357. cnss_allow_driver_loading = true;
  4358. return true;
  4359. }
  4360. }
  4361. return false;
  4362. }
  4363. /**
  4364. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  4365. *
  4366. * Valid device tree node means a node with "compatible" property from the
  4367. * device match table and "status" property is not disabled.
  4368. *
  4369. * Return: true if valid device tree node found, false if not found
  4370. */
  4371. static bool cnss_is_valid_dt_node_found(void)
  4372. {
  4373. struct device_node *dn = NULL;
  4374. for_each_matching_node(dn, cnss_of_match_table) {
  4375. if (of_device_is_available(dn))
  4376. break;
  4377. }
  4378. if (dn)
  4379. return true;
  4380. return false;
  4381. }
  4382. static int __init cnss_initialize(void)
  4383. {
  4384. int ret = 0;
  4385. if (!cnss_is_valid_dt_node_found())
  4386. return -ENODEV;
  4387. if (!cnss_check_compatible_node())
  4388. return ret;
  4389. cnss_debug_init();
  4390. ret = platform_driver_register(&cnss_platform_driver);
  4391. if (ret)
  4392. cnss_debug_deinit();
  4393. ret = cnss_genl_init();
  4394. if (ret < 0)
  4395. cnss_pr_err("CNSS genl init failed %d\n", ret);
  4396. return ret;
  4397. }
  4398. static void __exit cnss_exit(void)
  4399. {
  4400. cnss_genl_exit();
  4401. platform_driver_unregister(&cnss_platform_driver);
  4402. cnss_debug_deinit();
  4403. }
  4404. module_init(cnss_initialize);
  4405. module_exit(cnss_exit);
  4406. MODULE_LICENSE("GPL v2");
  4407. MODULE_DESCRIPTION("CNSS2 Platform Driver");