dp_rx.h 21 KB

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  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _DP_RX_H
  19. #define _DP_RX_H
  20. #include "hal_rx.h"
  21. #include "dp_tx.h"
  22. #include "dp_peer.h"
  23. #include "dp_internal.h"
  24. #ifdef RXDMA_OPTIMIZATION
  25. #define RX_BUFFER_ALIGNMENT 128
  26. #else /* RXDMA_OPTIMIZATION */
  27. #define RX_BUFFER_ALIGNMENT 4
  28. #endif /* RXDMA_OPTIMIZATION */
  29. #ifdef QCA_HOST2FW_RXBUF_RING
  30. #define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW1_BM
  31. #else
  32. #define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW3_BM
  33. #endif
  34. #define RX_BUFFER_SIZE 2048
  35. #define RX_BUFFER_RESERVATION 0
  36. #define DP_PEER_METADATA_PEER_ID_MASK 0x0000ffff
  37. #define DP_PEER_METADATA_PEER_ID_SHIFT 0
  38. #define DP_PEER_METADATA_VDEV_ID_MASK 0x00070000
  39. #define DP_PEER_METADATA_VDEV_ID_SHIFT 16
  40. #define DP_PEER_METADATA_PEER_ID_GET(_peer_metadata) \
  41. (((_peer_metadata) & DP_PEER_METADATA_PEER_ID_MASK) \
  42. >> DP_PEER_METADATA_PEER_ID_SHIFT)
  43. #define DP_PEER_METADATA_ID_GET(_peer_metadata) \
  44. (((_peer_metadata) & DP_PEER_METADATA_VDEV_ID_MASK) \
  45. >> DP_PEER_METADATA_VDEV_ID_SHIFT)
  46. #define DP_RX_DESC_MAGIC 0xdec0de
  47. /**
  48. * struct dp_rx_desc
  49. *
  50. * @nbuf : VA of the "skb" posted
  51. * @rx_buf_start : VA of the original Rx buffer, before
  52. * movement of any skb->data pointer
  53. * @cookie : index into the sw array which holds
  54. * the sw Rx descriptors
  55. * Cookie space is 21 bits:
  56. * lower 18 bits -- index
  57. * upper 3 bits -- pool_id
  58. * @pool_id : pool Id for which this allocated.
  59. * Can only be used if there is no flow
  60. * steering
  61. * @in_use rx_desc is in use
  62. * @unmapped used to mark rx_desc an unmapped if the corresponding
  63. * nbuf is already unmapped
  64. */
  65. struct dp_rx_desc {
  66. qdf_nbuf_t nbuf;
  67. uint8_t *rx_buf_start;
  68. uint32_t cookie;
  69. uint8_t pool_id;
  70. #ifdef RX_DESC_DEBUG_CHECK
  71. uint32_t magic;
  72. #endif
  73. uint8_t in_use:1,
  74. unmapped:1;
  75. };
  76. #define RX_DESC_COOKIE_INDEX_SHIFT 0
  77. #define RX_DESC_COOKIE_INDEX_MASK 0x3ffff /* 18 bits */
  78. #define RX_DESC_COOKIE_POOL_ID_SHIFT 18
  79. #define RX_DESC_COOKIE_POOL_ID_MASK 0x1c0000
  80. #define DP_RX_DESC_COOKIE_POOL_ID_GET(_cookie) \
  81. (((_cookie) & RX_DESC_COOKIE_POOL_ID_MASK) >> \
  82. RX_DESC_COOKIE_POOL_ID_SHIFT)
  83. #define DP_RX_DESC_COOKIE_INDEX_GET(_cookie) \
  84. (((_cookie) & RX_DESC_COOKIE_INDEX_MASK) >> \
  85. RX_DESC_COOKIE_INDEX_SHIFT)
  86. /*
  87. *dp_rx_xor_block() - xor block of data
  88. *@b: destination data block
  89. *@a: source data block
  90. *@len: length of the data to process
  91. *
  92. *Returns: None
  93. */
  94. static inline void dp_rx_xor_block(uint8_t *b, const uint8_t *a, qdf_size_t len)
  95. {
  96. qdf_size_t i;
  97. for (i = 0; i < len; i++)
  98. b[i] ^= a[i];
  99. }
  100. /*
  101. *dp_rx_rotl() - rotate the bits left
  102. *@val: unsigned integer input value
  103. *@bits: number of bits
  104. *
  105. *Returns: Integer with left rotated by number of 'bits'
  106. */
  107. static inline uint32_t dp_rx_rotl(uint32_t val, int bits)
  108. {
  109. return (val << bits) | (val >> (32 - bits));
  110. }
  111. /*
  112. *dp_rx_rotr() - rotate the bits right
  113. *@val: unsigned integer input value
  114. *@bits: number of bits
  115. *
  116. *Returns: Integer with right rotated by number of 'bits'
  117. */
  118. static inline uint32_t dp_rx_rotr(uint32_t val, int bits)
  119. {
  120. return (val >> bits) | (val << (32 - bits));
  121. }
  122. /*
  123. * dp_set_rx_queue() - set queue_mapping in skb
  124. * @nbuf: skb
  125. * @queue_id: rx queue_id
  126. *
  127. * Return: void
  128. */
  129. #ifdef QCA_OL_RX_MULTIQ_SUPPORT
  130. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  131. {
  132. qdf_nbuf_record_rx_queue(nbuf, queue_id);
  133. return;
  134. }
  135. #else
  136. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  137. {
  138. }
  139. #endif
  140. /*
  141. *dp_rx_xswap() - swap the bits left
  142. *@val: unsigned integer input value
  143. *
  144. *Returns: Integer with bits swapped
  145. */
  146. static inline uint32_t dp_rx_xswap(uint32_t val)
  147. {
  148. return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
  149. }
  150. /*
  151. *dp_rx_get_le32_split() - get little endian 32 bits split
  152. *@b0: byte 0
  153. *@b1: byte 1
  154. *@b2: byte 2
  155. *@b3: byte 3
  156. *
  157. *Returns: Integer with split little endian 32 bits
  158. */
  159. static inline uint32_t dp_rx_get_le32_split(uint8_t b0, uint8_t b1, uint8_t b2,
  160. uint8_t b3)
  161. {
  162. return b0 | (b1 << 8) | (b2 << 16) | (b3 << 24);
  163. }
  164. /*
  165. *dp_rx_get_le32() - get little endian 32 bits
  166. *@b0: byte 0
  167. *@b1: byte 1
  168. *@b2: byte 2
  169. *@b3: byte 3
  170. *
  171. *Returns: Integer with little endian 32 bits
  172. */
  173. static inline uint32_t dp_rx_get_le32(const uint8_t *p)
  174. {
  175. return dp_rx_get_le32_split(p[0], p[1], p[2], p[3]);
  176. }
  177. /*
  178. * dp_rx_put_le32() - put little endian 32 bits
  179. * @p: destination char array
  180. * @v: source 32-bit integer
  181. *
  182. * Returns: None
  183. */
  184. static inline void dp_rx_put_le32(uint8_t *p, uint32_t v)
  185. {
  186. p[0] = (v) & 0xff;
  187. p[1] = (v >> 8) & 0xff;
  188. p[2] = (v >> 16) & 0xff;
  189. p[3] = (v >> 24) & 0xff;
  190. }
  191. /* Extract michal mic block of data */
  192. #define dp_rx_michael_block(l, r) \
  193. do { \
  194. r ^= dp_rx_rotl(l, 17); \
  195. l += r; \
  196. r ^= dp_rx_xswap(l); \
  197. l += r; \
  198. r ^= dp_rx_rotl(l, 3); \
  199. l += r; \
  200. r ^= dp_rx_rotr(l, 2); \
  201. l += r; \
  202. } while (0)
  203. /**
  204. * struct dp_rx_desc_list_elem_t
  205. *
  206. * @next : Next pointer to form free list
  207. * @rx_desc : DP Rx descriptor
  208. */
  209. union dp_rx_desc_list_elem_t {
  210. union dp_rx_desc_list_elem_t *next;
  211. struct dp_rx_desc rx_desc;
  212. };
  213. /**
  214. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  215. * the Rx descriptor on Rx DMA source ring buffer
  216. * @soc: core txrx main context
  217. * @cookie: cookie used to lookup virtual address
  218. *
  219. * Return: void *: Virtual Address of the Rx descriptor
  220. */
  221. static inline
  222. void *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc, uint32_t cookie)
  223. {
  224. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  225. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  226. /* TODO */
  227. /* Add sanity for pool_id & index */
  228. return &(soc->rx_desc_buf[pool_id].array[index].rx_desc);
  229. }
  230. /**
  231. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  232. * the Rx descriptor on monitor ring buffer
  233. * @soc: core txrx main context
  234. * @cookie: cookie used to lookup virtual address
  235. *
  236. * Return: void *: Virtual Address of the Rx descriptor
  237. */
  238. static inline
  239. void *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc, uint32_t cookie)
  240. {
  241. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  242. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  243. /* TODO */
  244. /* Add sanity for pool_id & index */
  245. return &(soc->rx_desc_mon[pool_id].array[index].rx_desc);
  246. }
  247. /**
  248. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  249. * the Rx descriptor on monitor status ring buffer
  250. * @soc: core txrx main context
  251. * @cookie: cookie used to lookup virtual address
  252. *
  253. * Return: void *: Virtual Address of the Rx descriptor
  254. */
  255. static inline
  256. void *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc, uint32_t cookie)
  257. {
  258. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  259. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  260. /* TODO */
  261. /* Add sanity for pool_id & index */
  262. return &(soc->rx_desc_status[pool_id].array[index].rx_desc);
  263. }
  264. void dp_rx_add_desc_list_to_free_list(struct dp_soc *soc,
  265. union dp_rx_desc_list_elem_t **local_desc_list,
  266. union dp_rx_desc_list_elem_t **tail,
  267. uint16_t pool_id,
  268. struct rx_desc_pool *rx_desc_pool);
  269. uint16_t dp_rx_get_free_desc_list(struct dp_soc *soc, uint32_t pool_id,
  270. struct rx_desc_pool *rx_desc_pool,
  271. uint16_t num_descs,
  272. union dp_rx_desc_list_elem_t **desc_list,
  273. union dp_rx_desc_list_elem_t **tail);
  274. QDF_STATUS dp_rx_pdev_attach(struct dp_pdev *pdev);
  275. void dp_rx_pdev_detach(struct dp_pdev *pdev);
  276. uint32_t
  277. dp_rx_process(struct dp_intr *int_ctx, void *hal_ring, uint32_t quota);
  278. uint32_t dp_rx_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota);
  279. uint32_t
  280. dp_rx_wbm_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota);
  281. /**
  282. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  283. * multiple nbufs.
  284. * @nbuf: pointer to the first msdu of an amsdu.
  285. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  286. *
  287. * This function implements the creation of RX frag_list for cases
  288. * where an MSDU is spread across multiple nbufs.
  289. *
  290. * Return: returns the head nbuf which contains complete frag_list.
  291. */
  292. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr);
  293. QDF_STATUS dp_rx_desc_pool_alloc(struct dp_soc *soc,
  294. uint32_t pool_id,
  295. uint32_t pool_size,
  296. struct rx_desc_pool *rx_desc_pool);
  297. void dp_rx_desc_pool_free(struct dp_soc *soc,
  298. uint32_t pool_id,
  299. struct rx_desc_pool *rx_desc_pool);
  300. void dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  301. struct dp_peer *peer);
  302. /**
  303. * dp_rx_add_to_free_desc_list() - Adds to a local free descriptor list
  304. *
  305. * @head: pointer to the head of local free list
  306. * @tail: pointer to the tail of local free list
  307. * @new: new descriptor that is added to the free list
  308. *
  309. * Return: void:
  310. */
  311. static inline
  312. void dp_rx_add_to_free_desc_list(union dp_rx_desc_list_elem_t **head,
  313. union dp_rx_desc_list_elem_t **tail,
  314. struct dp_rx_desc *new)
  315. {
  316. qdf_assert(head && new);
  317. new->nbuf = NULL;
  318. new->in_use = 0;
  319. new->unmapped = 0;
  320. ((union dp_rx_desc_list_elem_t *)new)->next = *head;
  321. *head = (union dp_rx_desc_list_elem_t *)new;
  322. if (*tail == NULL)
  323. *tail = *head;
  324. }
  325. /**
  326. * dp_rx_wds_srcport_learn() - Add or update the STA PEER which
  327. * is behind the WDS repeater.
  328. *
  329. * @soc: core txrx main context
  330. * @rx_tlv_hdr: base address of RX TLV header
  331. * @ta_peer: WDS repeater peer
  332. * @nbuf: rx pkt
  333. *
  334. * Return: void:
  335. */
  336. #ifdef FEATURE_WDS
  337. static inline void
  338. dp_rx_wds_srcport_learn(struct dp_soc *soc,
  339. uint8_t *rx_tlv_hdr,
  340. struct dp_peer *ta_peer,
  341. qdf_nbuf_t nbuf)
  342. {
  343. uint16_t sa_sw_peer_id = hal_rx_msdu_end_sa_sw_peer_id_get(rx_tlv_hdr);
  344. uint32_t flags = IEEE80211_NODE_F_WDS_HM;
  345. uint32_t ret = 0;
  346. uint8_t wds_src_mac[IEEE80211_ADDR_LEN];
  347. struct dp_ast_entry *ast;
  348. uint16_t sa_idx;
  349. /* Do wds source port learning only if it is a 4-address mpdu */
  350. if (!(qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  351. hal_rx_get_mpdu_mac_ad4_valid(rx_tlv_hdr)))
  352. return;
  353. memcpy(wds_src_mac, (qdf_nbuf_data(nbuf) + IEEE80211_ADDR_LEN),
  354. IEEE80211_ADDR_LEN);
  355. if (qdf_unlikely(!hal_rx_msdu_end_sa_is_valid_get(rx_tlv_hdr))) {
  356. ret = dp_peer_add_ast(soc,
  357. ta_peer,
  358. wds_src_mac,
  359. CDP_TXRX_AST_TYPE_WDS,
  360. flags);
  361. return;
  362. }
  363. /*
  364. * Get the AST entry from HW SA index and mark it as active
  365. */
  366. sa_idx = hal_rx_msdu_end_sa_idx_get(rx_tlv_hdr);
  367. qdf_spin_lock_bh(&soc->ast_lock);
  368. ast = soc->ast_table[sa_idx];
  369. if (!ast) {
  370. qdf_spin_unlock_bh(&soc->ast_lock);
  371. return;
  372. }
  373. /*
  374. * Ensure we are updating the right AST entry by
  375. * validating ast_idx.
  376. * There is a possibility we might arrive here without
  377. * AST MAP event , so this check is mandatory
  378. */
  379. if (ast->ast_idx == sa_idx)
  380. ast->is_active = TRUE;
  381. /* Handle client roaming */
  382. if (sa_sw_peer_id != ta_peer->peer_ids[0])
  383. dp_peer_update_ast(soc, ta_peer, ast, flags);
  384. qdf_spin_unlock_bh(&soc->ast_lock);
  385. return;
  386. }
  387. #else
  388. static inline void
  389. dp_rx_wds_srcport_learn(struct dp_soc *soc,
  390. uint8_t *rx_tlv_hdr,
  391. struct dp_peer *ta_peer,
  392. qdf_nbuf_t nbuf)
  393. {
  394. }
  395. #endif
  396. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t nbuf);
  397. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  398. qdf_nbuf_t mpdu, bool mpdu_done);
  399. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr);
  400. #define DP_RX_LIST_APPEND(head, tail, elem) \
  401. do { \
  402. if (!(head)) { \
  403. (head) = (elem); \
  404. } else { \
  405. qdf_nbuf_set_next((tail), (elem)); \
  406. } \
  407. (tail) = (elem); \
  408. qdf_nbuf_set_next((tail), NULL); \
  409. } while (0)
  410. #ifndef BUILD_X86
  411. static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
  412. qdf_dma_addr_t *paddr, struct dp_pdev *pdev)
  413. {
  414. return QDF_STATUS_SUCCESS;
  415. }
  416. #else
  417. #define MAX_RETRY 100
  418. static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
  419. qdf_dma_addr_t *paddr, struct dp_pdev *pdev)
  420. {
  421. uint32_t nbuf_retry = 0;
  422. int32_t ret;
  423. const uint32_t x86_phy_addr = 0x50000000;
  424. /*
  425. * in M2M emulation platforms (x86) the memory below 0x50000000
  426. * is reserved for target use, so any memory allocated in this
  427. * region should not be used by host
  428. */
  429. do {
  430. if (qdf_likely(*paddr > x86_phy_addr))
  431. return QDF_STATUS_SUCCESS;
  432. else {
  433. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  434. "phy addr %pK exceded 0x50000000 trying again\n",
  435. paddr);
  436. nbuf_retry++;
  437. if ((*rx_netbuf)) {
  438. qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
  439. QDF_DMA_BIDIRECTIONAL);
  440. /* Not freeing buffer intentionally.
  441. * Observed that same buffer is getting
  442. * re-allocated resulting in longer load time
  443. * WMI init timeout.
  444. * This buffer is anyway not useful so skip it.
  445. **/
  446. }
  447. *rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  448. RX_BUFFER_SIZE,
  449. RX_BUFFER_RESERVATION,
  450. RX_BUFFER_ALIGNMENT,
  451. FALSE);
  452. if (qdf_unlikely(!(*rx_netbuf)))
  453. return QDF_STATUS_E_FAILURE;
  454. ret = qdf_nbuf_map_single(dp_soc->osdev, *rx_netbuf,
  455. QDF_DMA_BIDIRECTIONAL);
  456. if (qdf_unlikely(ret == QDF_STATUS_E_FAILURE)) {
  457. qdf_nbuf_free(*rx_netbuf);
  458. *rx_netbuf = NULL;
  459. continue;
  460. }
  461. *paddr = qdf_nbuf_get_frag_paddr(*rx_netbuf, 0);
  462. }
  463. } while (nbuf_retry < MAX_RETRY);
  464. if ((*rx_netbuf)) {
  465. qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
  466. QDF_DMA_BIDIRECTIONAL);
  467. qdf_nbuf_free(*rx_netbuf);
  468. }
  469. return QDF_STATUS_E_FAILURE;
  470. }
  471. #endif
  472. /**
  473. * dp_rx_cookie_2_link_desc_va() - Converts cookie to a virtual address of
  474. * the MSDU Link Descriptor
  475. * @soc: core txrx main context
  476. * @buf_info: buf_info include cookie that used to lookup virtual address of
  477. * link descriptor Normally this is just an index into a per SOC array.
  478. *
  479. * This is the VA of the link descriptor, that HAL layer later uses to
  480. * retrieve the list of MSDU's for a given MPDU.
  481. *
  482. * Return: void *: Virtual Address of the Rx descriptor
  483. */
  484. static inline
  485. void *dp_rx_cookie_2_link_desc_va(struct dp_soc *soc,
  486. struct hal_buf_info *buf_info)
  487. {
  488. void *link_desc_va;
  489. uint32_t bank_id = LINK_DESC_COOKIE_BANK_ID(buf_info->sw_cookie);
  490. /* TODO */
  491. /* Add sanity for cookie */
  492. link_desc_va = soc->link_desc_banks[bank_id].base_vaddr +
  493. (buf_info->paddr -
  494. soc->link_desc_banks[bank_id].base_paddr);
  495. return link_desc_va;
  496. }
  497. /**
  498. * dp_rx_cookie_2_mon_link_desc_va() - Converts cookie to a virtual address of
  499. * the MSDU Link Descriptor
  500. * @pdev: core txrx pdev context
  501. * @buf_info: buf_info includes cookie that used to lookup virtual address of
  502. * link descriptor. Normally this is just an index into a per pdev array.
  503. *
  504. * This is the VA of the link descriptor in monitor mode destination ring,
  505. * that HAL layer later uses to retrieve the list of MSDU's for a given MPDU.
  506. *
  507. * Return: void *: Virtual Address of the Rx descriptor
  508. */
  509. static inline
  510. void *dp_rx_cookie_2_mon_link_desc_va(struct dp_pdev *pdev,
  511. struct hal_buf_info *buf_info,
  512. int mac_id)
  513. {
  514. void *link_desc_va;
  515. int mac_for_pdev = dp_get_mac_id_for_mac(pdev->soc, mac_id);
  516. /* TODO */
  517. /* Add sanity for cookie */
  518. link_desc_va =
  519. pdev->link_desc_banks[mac_for_pdev][buf_info->sw_cookie].base_vaddr +
  520. (buf_info->paddr -
  521. pdev->link_desc_banks[mac_for_pdev][buf_info->sw_cookie].base_paddr);
  522. return link_desc_va;
  523. }
  524. /**
  525. * dp_rx_defrag_concat() - Concatenate the fragments
  526. *
  527. * @dst: destination pointer to the buffer
  528. * @src: source pointer from where the fragment payload is to be copied
  529. *
  530. * Return: QDF_STATUS
  531. */
  532. static inline QDF_STATUS dp_rx_defrag_concat(qdf_nbuf_t dst, qdf_nbuf_t src)
  533. {
  534. /*
  535. * Inside qdf_nbuf_cat, if it is necessary to reallocate dst
  536. * to provide space for src, the headroom portion is copied from
  537. * the original dst buffer to the larger new dst buffer.
  538. * (This is needed, because the headroom of the dst buffer
  539. * contains the rx desc.)
  540. */
  541. if (qdf_nbuf_cat(dst, src))
  542. return QDF_STATUS_E_DEFRAG_ERROR;
  543. return QDF_STATUS_SUCCESS;
  544. }
  545. /*
  546. * dp_rx_ast_set_active() - set the active flag of the astentry
  547. * corresponding to a hw index.
  548. * @soc: core txrx main context
  549. * @sa_idx: hw idx
  550. * @is_active: active flag
  551. *
  552. */
  553. #ifdef FEATURE_WDS
  554. static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
  555. {
  556. struct dp_ast_entry *ast;
  557. qdf_spin_lock_bh(&soc->ast_lock);
  558. ast = soc->ast_table[sa_idx];
  559. /*
  560. * Ensure we are updating the right AST entry by
  561. * validating ast_idx.
  562. * There is a possibility we might arrive here without
  563. * AST MAP event , so this check is mandatory
  564. */
  565. if (ast && (ast->ast_idx == sa_idx)) {
  566. ast->is_active = is_active;
  567. qdf_spin_unlock_bh(&soc->ast_lock);
  568. return QDF_STATUS_SUCCESS;
  569. }
  570. qdf_spin_unlock_bh(&soc->ast_lock);
  571. return QDF_STATUS_E_FAILURE;
  572. }
  573. #else
  574. static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
  575. {
  576. return QDF_STATUS_SUCCESS;
  577. }
  578. #endif
  579. /*
  580. * check_qwrap_multicast_loopback() - Check if rx packet is a loopback packet.
  581. * In qwrap mode, packets originated from
  582. * any vdev should not loopback and
  583. * should be dropped.
  584. * @vdev: vdev on which rx packet is received
  585. * @nbuf: rx pkt
  586. *
  587. */
  588. #if ATH_SUPPORT_WRAP
  589. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  590. qdf_nbuf_t nbuf)
  591. {
  592. struct dp_vdev *psta_vdev;
  593. struct dp_pdev *pdev = vdev->pdev;
  594. uint8_t *data = qdf_nbuf_data(nbuf);
  595. if (qdf_unlikely(vdev->proxysta_vdev)) {
  596. /* In qwrap isolation mode, allow loopback packets as all
  597. * packets go to RootAP and Loopback on the mpsta.
  598. */
  599. if (vdev->isolation_vdev)
  600. return false;
  601. TAILQ_FOREACH(psta_vdev, &pdev->vdev_list, vdev_list_elem) {
  602. if (qdf_unlikely(psta_vdev->proxysta_vdev &&
  603. !qdf_mem_cmp(psta_vdev->mac_addr.raw,
  604. &data[DP_MAC_ADDR_LEN], DP_MAC_ADDR_LEN))) {
  605. /* Drop packet if source address is equal to
  606. * any of the vdev addresses.
  607. */
  608. return true;
  609. }
  610. }
  611. }
  612. return false;
  613. }
  614. #else
  615. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  616. qdf_nbuf_t nbuf)
  617. {
  618. return false;
  619. }
  620. #endif
  621. /*
  622. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  623. * called during dp rx initialization
  624. * and at the end of dp_rx_process.
  625. *
  626. * @soc: core txrx main context
  627. * @mac_id: mac_id which is one of 3 mac_ids
  628. * @dp_rxdma_srng: dp rxdma circular ring
  629. * @rx_desc_pool: Poiter to free Rx descriptor pool
  630. * @num_req_buffers: number of buffer to be replenished
  631. * @desc_list: list of descs if called from dp_rx_process
  632. * or NULL during dp rx initialization or out of buffer
  633. * interrupt.
  634. * @tail: tail of descs list
  635. * Return: return success or failure
  636. */
  637. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  638. struct dp_srng *dp_rxdma_srng,
  639. struct rx_desc_pool *rx_desc_pool,
  640. uint32_t num_req_buffers,
  641. union dp_rx_desc_list_elem_t **desc_list,
  642. union dp_rx_desc_list_elem_t **tail);
  643. /**
  644. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  645. * (WBM), following error handling
  646. *
  647. * @soc: core DP main context
  648. * @buf_addr_info: opaque pointer to the REO error ring descriptor
  649. * @buf_addr_info: void pointer to the buffer_addr_info
  650. * @bm_action: put to idle_list or release to msdu_list
  651. * Return: QDF_STATUS
  652. */
  653. QDF_STATUS
  654. dp_rx_link_desc_return(struct dp_soc *soc, void *ring_desc, uint8_t bm_action);
  655. QDF_STATUS
  656. dp_rx_link_desc_buf_return(struct dp_soc *soc, struct dp_srng *dp_rxdma_srng,
  657. void *buf_addr_info, uint8_t bm_action);
  658. /**
  659. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  660. * (WBM) by address
  661. *
  662. * @soc: core DP main context
  663. * @link_desc_addr: link descriptor addr
  664. *
  665. * Return: QDF_STATUS
  666. */
  667. QDF_STATUS
  668. dp_rx_link_desc_return_by_addr(struct dp_soc *soc, void *link_desc_addr,
  669. uint8_t bm_action);
  670. uint32_t
  671. dp_rxdma_err_process(struct dp_soc *soc, uint32_t mac_id,
  672. uint32_t quota);
  673. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  674. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  675. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  676. uint8_t *rx_tlv_hdr);
  677. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr, struct dp_vdev *vdev,
  678. struct dp_peer *peer, int rx_mcast);
  679. qdf_nbuf_t
  680. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev);
  681. #endif /* _DP_RX_H */