main.c 127 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/thermal.h>
  20. #include <linux/version.h>
  21. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  22. #include <linux/panic_notifier.h>
  23. #endif
  24. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  25. #include <soc/qcom/minidump.h>
  26. #endif
  27. #include "cnss_plat_ipc_qmi.h"
  28. #include "cnss_utils.h"
  29. #include "main.h"
  30. #include "bus.h"
  31. #include "debug.h"
  32. #include "genl.h"
  33. #include "reg.h"
  34. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  35. #include "smcinvoke.h"
  36. #include "smcinvoke_object.h"
  37. #include "IClientEnv.h"
  38. #define HW_STATE_UID 0x108
  39. #define HW_OP_GET_STATE 1
  40. #define HW_WIFI_UID 0x508
  41. #define FEATURE_NOT_SUPPORTED 12
  42. #define PERIPHERAL_NOT_FOUND 10
  43. #endif
  44. #define CNSS_DUMP_FORMAT_VER 0x11
  45. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  46. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  47. #define CNSS_DUMP_NAME "CNSS_WLAN"
  48. #define CNSS_DUMP_DESC_SIZE 0x1000
  49. #define CNSS_DUMP_SEG_VER 0x1
  50. #define FILE_SYSTEM_READY 1
  51. #define FW_READY_TIMEOUT 20000
  52. #define FW_ASSERT_TIMEOUT 5000
  53. #define CNSS_EVENT_PENDING 2989
  54. #define POWER_RESET_MIN_DELAY_MS 100
  55. #define CNSS_QUIRKS_DEFAULT 0
  56. #ifdef CONFIG_CNSS_EMULATION
  57. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  58. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  59. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  60. #else
  61. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  62. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  63. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  64. #endif
  65. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  66. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  67. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  68. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  69. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  70. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  71. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  72. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  73. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  74. enum cnss_cal_db_op {
  75. CNSS_CAL_DB_UPLOAD,
  76. CNSS_CAL_DB_DOWNLOAD,
  77. CNSS_CAL_DB_INVALID_OP,
  78. };
  79. enum cnss_recovery_type {
  80. CNSS_WLAN_RECOVERY = 0x1,
  81. CNSS_PCSS_RECOVERY = 0x2,
  82. };
  83. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  84. #define CNSS_MAX_DEV_NUM 2
  85. static struct cnss_plat_data *plat_env[CNSS_MAX_DEV_NUM];
  86. static int plat_env_count;
  87. #else
  88. static struct cnss_plat_data *plat_env;
  89. #endif
  90. static bool cnss_allow_driver_loading;
  91. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  92. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  93. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  94. };
  95. static struct cnss_fw_files FW_FILES_DEFAULT = {
  96. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  97. "utfbd.bin", "epping.bin", "evicted.bin"
  98. };
  99. struct cnss_driver_event {
  100. struct list_head list;
  101. enum cnss_driver_event_type type;
  102. bool sync;
  103. struct completion complete;
  104. int ret;
  105. void *data;
  106. };
  107. bool cnss_check_driver_loading_allowed(void)
  108. {
  109. return cnss_allow_driver_loading;
  110. }
  111. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  112. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  113. struct cnss_plat_data *plat_priv)
  114. {
  115. cnss_pr_dbg("Set plat_priv at %d", plat_env_count);
  116. if (plat_priv) {
  117. plat_priv->plat_idx = plat_env_count;
  118. plat_env[plat_priv->plat_idx] = plat_priv;
  119. plat_env_count++;
  120. }
  121. }
  122. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device
  123. *plat_dev)
  124. {
  125. int i;
  126. if (!plat_dev)
  127. return NULL;
  128. for (i = 0; i < plat_env_count; i++) {
  129. if (plat_env[i]->plat_dev == plat_dev)
  130. return plat_env[i];
  131. }
  132. return NULL;
  133. }
  134. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  135. {
  136. cnss_pr_dbg("Clear plat_priv at %d", plat_priv->plat_idx);
  137. plat_env[plat_priv->plat_idx] = NULL;
  138. plat_env_count--;
  139. }
  140. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  141. {
  142. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  143. "wlan_%d", plat_priv->plat_idx);
  144. return 0;
  145. }
  146. static int cnss_plat_env_available(void)
  147. {
  148. int ret = 0;
  149. if (plat_env_count >= CNSS_MAX_DEV_NUM) {
  150. cnss_pr_err("ERROR: No space to store plat_priv\n");
  151. ret = -ENOMEM;
  152. }
  153. return ret;
  154. }
  155. int cnss_get_plat_env_count(void)
  156. {
  157. return plat_env_count;
  158. }
  159. struct cnss_plat_data *cnss_get_plat_env(int index)
  160. {
  161. return plat_env[index];
  162. }
  163. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  164. {
  165. int i;
  166. for (i = 0; i < plat_env_count; i++) {
  167. if (plat_env[i]->rc_num == rc_num)
  168. return plat_env[i];
  169. }
  170. return NULL;
  171. }
  172. static inline int
  173. cnss_get_qrtr_node_id(struct cnss_plat_data *plat_priv)
  174. {
  175. return of_property_read_u32(plat_priv->dev_node,
  176. "qcom,qrtr_node_id", &plat_priv->qrtr_node_id);
  177. }
  178. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  179. {
  180. int ret = 0;
  181. ret = cnss_get_qrtr_node_id(plat_priv);
  182. if (ret) {
  183. cnss_pr_warn("Failed to find qrtr_node_id err=%d\n", ret);
  184. plat_priv->qrtr_node_id = 0;
  185. plat_priv->wlfw_service_instance_id = 0;
  186. } else {
  187. plat_priv->wlfw_service_instance_id = plat_priv->qrtr_node_id +
  188. QRTR_NODE_FW_ID_BASE;
  189. cnss_pr_dbg("service_instance_id=0x%x\n",
  190. plat_priv->wlfw_service_instance_id);
  191. }
  192. }
  193. static inline int
  194. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  195. {
  196. return of_property_read_string(plat_priv->plat_dev->dev.of_node,
  197. "qcom,pld_bus_ops_name",
  198. &plat_priv->pld_bus_ops_name);
  199. }
  200. #else
  201. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  202. struct cnss_plat_data *plat_priv)
  203. {
  204. plat_env = plat_priv;
  205. }
  206. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  207. {
  208. return plat_env;
  209. }
  210. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  211. {
  212. plat_env = NULL;
  213. }
  214. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  215. {
  216. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  217. "wlan");
  218. return 0;
  219. }
  220. static int cnss_plat_env_available(void)
  221. {
  222. return 0;
  223. }
  224. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  225. {
  226. return cnss_bus_dev_to_plat_priv(NULL);
  227. }
  228. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  229. {
  230. }
  231. static int
  232. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  233. {
  234. return 0;
  235. }
  236. #endif
  237. static inline int
  238. cnss_get_rc_num(struct cnss_plat_data *plat_priv)
  239. {
  240. return of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  241. "qcom,wlan-rc-num", &plat_priv->rc_num);
  242. }
  243. bool cnss_is_dual_wlan_enabled(void)
  244. {
  245. return IS_ENABLED(CONFIG_CNSS_SUPPORT_DUAL_DEV);
  246. }
  247. /**
  248. * cnss_get_mem_seg_count - Get segment count of memory
  249. * @type: memory type
  250. * @seg: segment count
  251. *
  252. * Return: 0 on success, negative value on failure
  253. */
  254. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  255. {
  256. struct cnss_plat_data *plat_priv;
  257. plat_priv = cnss_get_plat_priv(NULL);
  258. if (!plat_priv)
  259. return -ENODEV;
  260. switch (type) {
  261. case CNSS_REMOTE_MEM_TYPE_FW:
  262. *seg = plat_priv->fw_mem_seg_len;
  263. break;
  264. case CNSS_REMOTE_MEM_TYPE_QDSS:
  265. *seg = plat_priv->qdss_mem_seg_len;
  266. break;
  267. default:
  268. return -EINVAL;
  269. }
  270. return 0;
  271. }
  272. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  273. /**
  274. * cnss_get_wifi_kobject -return wifi kobject
  275. * Return: Null, to maintain driver comnpatibilty
  276. */
  277. struct kobject *cnss_get_wifi_kobj(struct device *dev)
  278. {
  279. struct cnss_plat_data *plat_priv;
  280. plat_priv = cnss_get_plat_priv(NULL);
  281. if (!plat_priv)
  282. return NULL;
  283. return plat_priv->wifi_kobj;
  284. }
  285. EXPORT_SYMBOL(cnss_get_wifi_kobj);
  286. /**
  287. * cnss_get_mem_segment_info - Get memory info of different type
  288. * @type: memory type
  289. * @segment: array to save the segment info
  290. * @seg: segment count
  291. *
  292. * Return: 0 on success, negative value on failure
  293. */
  294. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  295. struct cnss_mem_segment segment[],
  296. u32 segment_count)
  297. {
  298. struct cnss_plat_data *plat_priv;
  299. u32 i;
  300. plat_priv = cnss_get_plat_priv(NULL);
  301. if (!plat_priv)
  302. return -ENODEV;
  303. switch (type) {
  304. case CNSS_REMOTE_MEM_TYPE_FW:
  305. if (segment_count > plat_priv->fw_mem_seg_len)
  306. segment_count = plat_priv->fw_mem_seg_len;
  307. for (i = 0; i < segment_count; i++) {
  308. segment[i].size = plat_priv->fw_mem[i].size;
  309. segment[i].va = plat_priv->fw_mem[i].va;
  310. segment[i].pa = plat_priv->fw_mem[i].pa;
  311. }
  312. break;
  313. case CNSS_REMOTE_MEM_TYPE_QDSS:
  314. if (segment_count > plat_priv->qdss_mem_seg_len)
  315. segment_count = plat_priv->qdss_mem_seg_len;
  316. for (i = 0; i < segment_count; i++) {
  317. segment[i].size = plat_priv->qdss_mem[i].size;
  318. segment[i].va = plat_priv->qdss_mem[i].va;
  319. segment[i].pa = plat_priv->qdss_mem[i].pa;
  320. }
  321. break;
  322. default:
  323. return -EINVAL;
  324. }
  325. return 0;
  326. }
  327. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  328. static int cnss_get_audio_iommu_domain(struct cnss_plat_data *plat_priv)
  329. {
  330. struct device_node *audio_ion_node;
  331. struct platform_device *audio_ion_pdev;
  332. audio_ion_node = of_find_compatible_node(NULL, NULL,
  333. "qcom,msm-audio-ion");
  334. if (!audio_ion_node) {
  335. cnss_pr_err("Unable to get Audio ion node");
  336. return -EINVAL;
  337. }
  338. audio_ion_pdev = of_find_device_by_node(audio_ion_node);
  339. of_node_put(audio_ion_node);
  340. if (!audio_ion_pdev) {
  341. cnss_pr_err("Unable to get Audio ion platform device");
  342. return -EINVAL;
  343. }
  344. plat_priv->audio_iommu_domain =
  345. iommu_get_domain_for_dev(&audio_ion_pdev->dev);
  346. put_device(&audio_ion_pdev->dev);
  347. if (!plat_priv->audio_iommu_domain) {
  348. cnss_pr_err("Unable to get Audio ion iommu domain");
  349. return -EINVAL;
  350. }
  351. return 0;
  352. }
  353. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  354. enum cnss_feature_v01 feature)
  355. {
  356. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  357. return -EINVAL;
  358. plat_priv->feature_list |= 1 << feature;
  359. return 0;
  360. }
  361. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  362. enum cnss_feature_v01 feature)
  363. {
  364. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  365. return -EINVAL;
  366. plat_priv->feature_list &= ~(1 << feature);
  367. return 0;
  368. }
  369. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  370. u64 *feature_list)
  371. {
  372. if (unlikely(!plat_priv))
  373. return -EINVAL;
  374. *feature_list = plat_priv->feature_list;
  375. return 0;
  376. }
  377. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  378. {
  379. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  380. return;
  381. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  382. plat_priv->driver_state,
  383. atomic_read(&plat_priv->pm_count));
  384. pm_stay_awake(&plat_priv->plat_dev->dev);
  385. }
  386. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  387. {
  388. int r = atomic_dec_return(&plat_priv->pm_count);
  389. WARN_ON(r < 0);
  390. if (r != 0)
  391. return;
  392. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  393. plat_priv->driver_state,
  394. atomic_read(&plat_priv->pm_count));
  395. pm_relax(&plat_priv->plat_dev->dev);
  396. }
  397. int cnss_get_fw_files_for_target(struct device *dev,
  398. struct cnss_fw_files *pfw_files,
  399. u32 target_type, u32 target_version)
  400. {
  401. if (!pfw_files)
  402. return -ENODEV;
  403. switch (target_version) {
  404. case QCA6174_REV3_VERSION:
  405. case QCA6174_REV3_2_VERSION:
  406. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  407. break;
  408. default:
  409. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  410. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  411. target_type, target_version);
  412. break;
  413. }
  414. return 0;
  415. }
  416. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  417. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  418. {
  419. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  420. if (!plat_priv)
  421. return -ENODEV;
  422. if (!cap)
  423. return -EINVAL;
  424. *cap = plat_priv->cap;
  425. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  426. return 0;
  427. }
  428. EXPORT_SYMBOL(cnss_get_platform_cap);
  429. /**
  430. * cnss_get_fw_cap - Check whether FW supports specific capability or not
  431. * @dev: Device
  432. * @fw_cap: FW Capability which needs to be checked
  433. *
  434. * Return: TRUE if supported, FALSE on failure or if not supported
  435. */
  436. bool cnss_get_fw_cap(struct device *dev, enum cnss_fw_caps fw_cap)
  437. {
  438. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  439. bool is_supported = false;
  440. if (!plat_priv)
  441. return is_supported;
  442. if (!plat_priv->fw_caps)
  443. return is_supported;
  444. switch (fw_cap) {
  445. case CNSS_FW_CAP_DIRECT_LINK_SUPPORT:
  446. is_supported = !!(plat_priv->fw_caps &
  447. QMI_WLFW_DIRECT_LINK_SUPPORT_V01);
  448. if (is_supported && cnss_get_audio_iommu_domain(plat_priv))
  449. is_supported = false;
  450. break;
  451. default:
  452. cnss_pr_err("Invalid FW Capability: 0x%x\n", fw_cap);
  453. }
  454. cnss_pr_dbg("FW Capability 0x%x is %s\n", fw_cap,
  455. is_supported ? "supported" : "not supported");
  456. return is_supported;
  457. }
  458. EXPORT_SYMBOL(cnss_get_fw_cap);
  459. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  460. {
  461. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  462. if (!plat_priv)
  463. return;
  464. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  465. }
  466. EXPORT_SYMBOL(cnss_request_pm_qos);
  467. void cnss_remove_pm_qos(struct device *dev)
  468. {
  469. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  470. if (!plat_priv)
  471. return;
  472. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  473. }
  474. EXPORT_SYMBOL(cnss_remove_pm_qos);
  475. int cnss_wlan_enable(struct device *dev,
  476. struct cnss_wlan_enable_cfg *config,
  477. enum cnss_driver_mode mode,
  478. const char *host_version)
  479. {
  480. int ret = 0;
  481. struct cnss_plat_data *plat_priv;
  482. if (!dev) {
  483. cnss_pr_err("Invalid dev pointer\n");
  484. return -EINVAL;
  485. }
  486. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  487. if (!plat_priv)
  488. return -ENODEV;
  489. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  490. return 0;
  491. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  492. return 0;
  493. if (!config || !host_version) {
  494. cnss_pr_err("Invalid config or host_version pointer\n");
  495. return -EINVAL;
  496. }
  497. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  498. mode, config, host_version);
  499. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  500. goto skip_cfg;
  501. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  502. if (ret)
  503. goto out;
  504. skip_cfg:
  505. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  506. out:
  507. return ret;
  508. }
  509. EXPORT_SYMBOL(cnss_wlan_enable);
  510. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  511. {
  512. int ret = 0;
  513. struct cnss_plat_data *plat_priv;
  514. if (!dev) {
  515. cnss_pr_err("Invalid dev pointer\n");
  516. return -EINVAL;
  517. }
  518. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  519. if (!plat_priv)
  520. return -ENODEV;
  521. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  522. return 0;
  523. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  524. return 0;
  525. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  526. cnss_bus_free_qdss_mem(plat_priv);
  527. return ret;
  528. }
  529. EXPORT_SYMBOL(cnss_wlan_disable);
  530. int cnss_audio_smmu_map(struct device *dev, phys_addr_t paddr,
  531. dma_addr_t iova, size_t size)
  532. {
  533. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  534. uint32_t page_offset;
  535. if (!plat_priv)
  536. return -ENODEV;
  537. if (!plat_priv->audio_iommu_domain)
  538. return -EINVAL;
  539. page_offset = iova & (PAGE_SIZE - 1);
  540. if (page_offset + size > PAGE_SIZE)
  541. size += PAGE_SIZE;
  542. iova -= page_offset;
  543. paddr -= page_offset;
  544. return iommu_map(plat_priv->audio_iommu_domain, iova, paddr,
  545. roundup(size, PAGE_SIZE), IOMMU_READ | IOMMU_WRITE |
  546. IOMMU_CACHE);
  547. }
  548. EXPORT_SYMBOL(cnss_audio_smmu_map);
  549. void cnss_audio_smmu_unmap(struct device *dev, dma_addr_t iova, size_t size)
  550. {
  551. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  552. uint32_t page_offset;
  553. if (!plat_priv)
  554. return;
  555. if (!plat_priv->audio_iommu_domain)
  556. return;
  557. page_offset = iova & (PAGE_SIZE - 1);
  558. if (page_offset + size > PAGE_SIZE)
  559. size += PAGE_SIZE;
  560. iova -= page_offset;
  561. iommu_unmap(plat_priv->audio_iommu_domain, iova,
  562. roundup(size, PAGE_SIZE));
  563. }
  564. EXPORT_SYMBOL(cnss_audio_smmu_unmap);
  565. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  566. u32 data_len, u8 *output)
  567. {
  568. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  569. int ret = 0;
  570. if (!plat_priv) {
  571. cnss_pr_err("plat_priv is NULL!\n");
  572. return -EINVAL;
  573. }
  574. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  575. return 0;
  576. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  577. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  578. plat_priv->driver_state);
  579. ret = -EINVAL;
  580. goto out;
  581. }
  582. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  583. data_len, output);
  584. out:
  585. return ret;
  586. }
  587. EXPORT_SYMBOL(cnss_athdiag_read);
  588. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  589. u32 data_len, u8 *input)
  590. {
  591. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  592. int ret = 0;
  593. if (!plat_priv) {
  594. cnss_pr_err("plat_priv is NULL!\n");
  595. return -EINVAL;
  596. }
  597. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  598. return 0;
  599. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  600. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  601. plat_priv->driver_state);
  602. ret = -EINVAL;
  603. goto out;
  604. }
  605. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  606. data_len, input);
  607. out:
  608. return ret;
  609. }
  610. EXPORT_SYMBOL(cnss_athdiag_write);
  611. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  612. {
  613. struct cnss_plat_data *plat_priv;
  614. if (!dev) {
  615. cnss_pr_err("Invalid dev pointer\n");
  616. return -EINVAL;
  617. }
  618. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  619. if (!plat_priv)
  620. return -ENODEV;
  621. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  622. return 0;
  623. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  624. }
  625. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  626. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  627. {
  628. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  629. if (!plat_priv)
  630. return -EINVAL;
  631. if (!plat_priv->fw_pcie_gen_switch) {
  632. cnss_pr_err("Firmware does not support PCIe gen switch\n");
  633. return -EOPNOTSUPP;
  634. }
  635. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  636. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  637. return -EINVAL;
  638. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  639. plat_priv->pcie_gen_speed = pcie_gen_speed;
  640. return 0;
  641. }
  642. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  643. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  644. {
  645. int ret = 0;
  646. if (!plat_priv)
  647. return -ENODEV;
  648. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  649. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  650. if (ret)
  651. goto out;
  652. if (plat_priv->hds_enabled)
  653. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  654. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  655. cnss_wlfw_ini_file_send_sync(plat_priv, WLFW_CONN_ROAM_INI_V01);
  656. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  657. plat_priv->ctrl_params.bdf_type);
  658. if (ret)
  659. goto out;
  660. ret = cnss_bus_load_m3(plat_priv);
  661. if (ret)
  662. goto out;
  663. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  664. if (ret)
  665. goto out;
  666. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  667. return 0;
  668. out:
  669. return ret;
  670. }
  671. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  672. {
  673. int ret = 0;
  674. if (!plat_priv->antenna) {
  675. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  676. if (ret)
  677. goto out;
  678. }
  679. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  680. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  681. if (ret)
  682. goto out;
  683. }
  684. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  685. if (ret)
  686. goto out;
  687. return 0;
  688. out:
  689. return ret;
  690. }
  691. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  692. {
  693. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  694. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  695. }
  696. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  697. {
  698. u32 i;
  699. int ret = 0;
  700. struct cnss_plat_ipc_daemon_config *cfg;
  701. ret = cnss_qmi_get_dms_mac(plat_priv);
  702. if (ret == 0 && plat_priv->dms.mac_valid)
  703. goto qmi_send;
  704. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  705. * Thus assert on failure to get MAC from DMS even after retries
  706. */
  707. if (plat_priv->use_nv_mac) {
  708. /* Check if Daemon says platform support DMS MAC provisioning */
  709. cfg = cnss_plat_ipc_qmi_daemon_config();
  710. if (cfg) {
  711. if (!cfg->dms_mac_addr_supported) {
  712. cnss_pr_err("DMS MAC address not supported\n");
  713. CNSS_ASSERT(0);
  714. return -EINVAL;
  715. }
  716. }
  717. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  718. if (plat_priv->dms.mac_valid)
  719. break;
  720. ret = cnss_qmi_get_dms_mac(plat_priv);
  721. if (ret == 0)
  722. break;
  723. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  724. }
  725. if (!plat_priv->dms.mac_valid) {
  726. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  727. CNSS_ASSERT(0);
  728. return -EINVAL;
  729. }
  730. }
  731. qmi_send:
  732. if (plat_priv->dms.mac_valid)
  733. ret =
  734. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  735. ARRAY_SIZE(plat_priv->dms.mac));
  736. return ret;
  737. }
  738. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  739. enum cnss_cal_db_op op, u32 *size)
  740. {
  741. int ret = 0;
  742. u32 timeout = cnss_get_timeout(plat_priv,
  743. CNSS_TIMEOUT_DAEMON_CONNECTION);
  744. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  745. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  746. if (op >= CNSS_CAL_DB_INVALID_OP)
  747. return -EINVAL;
  748. if (!plat_priv->cbc_file_download) {
  749. cnss_pr_info("CAL DB file not required as per BDF\n");
  750. return 0;
  751. }
  752. if (*size == 0) {
  753. cnss_pr_err("Invalid cal file size\n");
  754. return -EINVAL;
  755. }
  756. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  757. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  758. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  759. msecs_to_jiffies(timeout));
  760. if (!ret) {
  761. cnss_pr_err("Daemon not yet connected\n");
  762. CNSS_ASSERT(0);
  763. return ret;
  764. }
  765. }
  766. if (!plat_priv->cal_mem->va) {
  767. cnss_pr_err("CAL DB Memory not setup for FW\n");
  768. return -EINVAL;
  769. }
  770. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  771. if (op == CNSS_CAL_DB_DOWNLOAD) {
  772. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  773. ret = cnss_plat_ipc_qmi_file_download(client_id,
  774. CNSS_CAL_DB_FILE_NAME,
  775. plat_priv->cal_mem->va,
  776. size);
  777. } else {
  778. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  779. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  780. CNSS_CAL_DB_FILE_NAME,
  781. plat_priv->cal_mem->va,
  782. *size);
  783. }
  784. if (ret)
  785. cnss_pr_err("Cal DB file %s %s failure\n",
  786. CNSS_CAL_DB_FILE_NAME,
  787. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  788. else
  789. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  790. CNSS_CAL_DB_FILE_NAME,
  791. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  792. *size);
  793. return ret;
  794. }
  795. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  796. {
  797. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  798. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  799. return -EINVAL;
  800. }
  801. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  802. &plat_priv->cal_file_size);
  803. }
  804. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  805. u32 *cal_file_size)
  806. {
  807. /* To download pass the total size of cal DB mem allocated.
  808. * After cal file is download to mem, its size is updated in
  809. * return pointer
  810. */
  811. *cal_file_size = plat_priv->cal_mem->size;
  812. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  813. cal_file_size);
  814. }
  815. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  816. {
  817. int ret = 0;
  818. u32 cal_file_size = 0;
  819. if (!plat_priv)
  820. return -ENODEV;
  821. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  822. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  823. return -EINVAL;
  824. }
  825. cnss_pr_dbg("Processing FW Init Done..\n");
  826. del_timer(&plat_priv->fw_boot_timer);
  827. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  828. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  829. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  830. cnss_send_subsys_restart_level_msg(plat_priv);
  831. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  832. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  833. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  834. }
  835. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  836. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  837. CNSS_WALTEST);
  838. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  839. cnss_request_antenna_sharing(plat_priv);
  840. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  841. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  842. plat_priv->cal_time = jiffies;
  843. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  844. CNSS_CALIBRATION);
  845. } else {
  846. ret = cnss_setup_dms_mac(plat_priv);
  847. ret = cnss_bus_call_driver_probe(plat_priv);
  848. }
  849. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  850. goto out;
  851. else if (ret)
  852. goto shutdown;
  853. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  854. return 0;
  855. shutdown:
  856. cnss_bus_dev_shutdown(plat_priv);
  857. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  858. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  859. out:
  860. return ret;
  861. }
  862. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  863. {
  864. switch (type) {
  865. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  866. return "SERVER_ARRIVE";
  867. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  868. return "SERVER_EXIT";
  869. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  870. return "REQUEST_MEM";
  871. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  872. return "FW_MEM_READY";
  873. case CNSS_DRIVER_EVENT_FW_READY:
  874. return "FW_READY";
  875. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  876. return "COLD_BOOT_CAL_START";
  877. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  878. return "COLD_BOOT_CAL_DONE";
  879. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  880. return "REGISTER_DRIVER";
  881. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  882. return "UNREGISTER_DRIVER";
  883. case CNSS_DRIVER_EVENT_RECOVERY:
  884. return "RECOVERY";
  885. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  886. return "FORCE_FW_ASSERT";
  887. case CNSS_DRIVER_EVENT_POWER_UP:
  888. return "POWER_UP";
  889. case CNSS_DRIVER_EVENT_POWER_DOWN:
  890. return "POWER_DOWN";
  891. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  892. return "IDLE_RESTART";
  893. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  894. return "IDLE_SHUTDOWN";
  895. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  896. return "IMS_WFC_CALL_IND";
  897. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  898. return "WLFW_TWC_CFG_IND";
  899. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  900. return "QDSS_TRACE_REQ_MEM";
  901. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  902. return "FW_MEM_FILE_SAVE";
  903. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  904. return "QDSS_TRACE_FREE";
  905. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  906. return "QDSS_TRACE_REQ_DATA";
  907. case CNSS_DRIVER_EVENT_MAX:
  908. return "EVENT_MAX";
  909. }
  910. return "UNKNOWN";
  911. };
  912. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  913. enum cnss_driver_event_type type,
  914. u32 flags, void *data)
  915. {
  916. struct cnss_driver_event *event;
  917. unsigned long irq_flags;
  918. int gfp = GFP_KERNEL;
  919. int ret = 0;
  920. if (!plat_priv)
  921. return -ENODEV;
  922. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  923. cnss_driver_event_to_str(type), type,
  924. flags ? "-sync" : "", plat_priv->driver_state, flags);
  925. if (type >= CNSS_DRIVER_EVENT_MAX) {
  926. cnss_pr_err("Invalid Event type: %d, can't post", type);
  927. return -EINVAL;
  928. }
  929. if (in_interrupt() || irqs_disabled())
  930. gfp = GFP_ATOMIC;
  931. event = kzalloc(sizeof(*event), gfp);
  932. if (!event)
  933. return -ENOMEM;
  934. cnss_pm_stay_awake(plat_priv);
  935. event->type = type;
  936. event->data = data;
  937. init_completion(&event->complete);
  938. event->ret = CNSS_EVENT_PENDING;
  939. event->sync = !!(flags & CNSS_EVENT_SYNC);
  940. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  941. list_add_tail(&event->list, &plat_priv->event_list);
  942. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  943. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  944. if (!(flags & CNSS_EVENT_SYNC))
  945. goto out;
  946. if (flags & CNSS_EVENT_UNKILLABLE)
  947. wait_for_completion(&event->complete);
  948. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  949. ret = wait_for_completion_killable(&event->complete);
  950. else
  951. ret = wait_for_completion_interruptible(&event->complete);
  952. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  953. cnss_driver_event_to_str(type), type,
  954. plat_priv->driver_state, ret, event->ret);
  955. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  956. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  957. event->sync = false;
  958. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  959. ret = -EINTR;
  960. goto out;
  961. }
  962. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  963. ret = event->ret;
  964. kfree(event);
  965. out:
  966. cnss_pm_relax(plat_priv);
  967. return ret;
  968. }
  969. /**
  970. * cnss_get_timeout - Get timeout for corresponding type.
  971. * @plat_priv: Pointer to platform driver context.
  972. * @cnss_timeout_type: Timeout type.
  973. *
  974. * Return: Timeout in milliseconds.
  975. */
  976. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  977. enum cnss_timeout_type timeout_type)
  978. {
  979. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  980. switch (timeout_type) {
  981. case CNSS_TIMEOUT_QMI:
  982. return qmi_timeout;
  983. case CNSS_TIMEOUT_POWER_UP:
  984. return (qmi_timeout << 2);
  985. case CNSS_TIMEOUT_IDLE_RESTART:
  986. /* In idle restart power up sequence, we have fw_boot_timer to
  987. * handle FW initialization failure.
  988. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  989. * account for FW dump collection and FW re-initialization on
  990. * retry.
  991. */
  992. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  993. case CNSS_TIMEOUT_CALIBRATION:
  994. /* Similar to mission mode, in CBC if FW init fails
  995. * fw recovery is tried. Thus return 2x the CBC timeout.
  996. */
  997. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  998. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  999. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  1000. case CNSS_TIMEOUT_RDDM:
  1001. return CNSS_RDDM_TIMEOUT_MS;
  1002. case CNSS_TIMEOUT_RECOVERY:
  1003. return RECOVERY_TIMEOUT;
  1004. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  1005. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  1006. default:
  1007. return qmi_timeout;
  1008. }
  1009. }
  1010. unsigned int cnss_get_boot_timeout(struct device *dev)
  1011. {
  1012. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1013. if (!plat_priv) {
  1014. cnss_pr_err("plat_priv is NULL\n");
  1015. return 0;
  1016. }
  1017. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  1018. }
  1019. EXPORT_SYMBOL(cnss_get_boot_timeout);
  1020. int cnss_power_up(struct device *dev)
  1021. {
  1022. int ret = 0;
  1023. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1024. unsigned int timeout;
  1025. if (!plat_priv) {
  1026. cnss_pr_err("plat_priv is NULL\n");
  1027. return -ENODEV;
  1028. }
  1029. cnss_pr_dbg("Powering up device\n");
  1030. ret = cnss_driver_event_post(plat_priv,
  1031. CNSS_DRIVER_EVENT_POWER_UP,
  1032. CNSS_EVENT_SYNC, NULL);
  1033. if (ret)
  1034. goto out;
  1035. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1036. goto out;
  1037. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  1038. reinit_completion(&plat_priv->power_up_complete);
  1039. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1040. msecs_to_jiffies(timeout));
  1041. if (!ret) {
  1042. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  1043. timeout);
  1044. ret = -EAGAIN;
  1045. goto out;
  1046. }
  1047. return 0;
  1048. out:
  1049. return ret;
  1050. }
  1051. EXPORT_SYMBOL(cnss_power_up);
  1052. int cnss_power_down(struct device *dev)
  1053. {
  1054. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1055. if (!plat_priv) {
  1056. cnss_pr_err("plat_priv is NULL\n");
  1057. return -ENODEV;
  1058. }
  1059. cnss_pr_dbg("Powering down device\n");
  1060. return cnss_driver_event_post(plat_priv,
  1061. CNSS_DRIVER_EVENT_POWER_DOWN,
  1062. CNSS_EVENT_SYNC, NULL);
  1063. }
  1064. EXPORT_SYMBOL(cnss_power_down);
  1065. int cnss_idle_restart(struct device *dev)
  1066. {
  1067. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1068. unsigned int timeout;
  1069. int ret = 0;
  1070. if (!plat_priv) {
  1071. cnss_pr_err("plat_priv is NULL\n");
  1072. return -ENODEV;
  1073. }
  1074. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  1075. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  1076. return -EBUSY;
  1077. }
  1078. cnss_pr_dbg("Doing idle restart\n");
  1079. reinit_completion(&plat_priv->power_up_complete);
  1080. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1081. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1082. ret = -EINVAL;
  1083. goto out;
  1084. }
  1085. ret = cnss_driver_event_post(plat_priv,
  1086. CNSS_DRIVER_EVENT_IDLE_RESTART,
  1087. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1088. if (ret)
  1089. goto out;
  1090. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1091. ret = cnss_bus_call_driver_probe(plat_priv);
  1092. goto out;
  1093. }
  1094. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  1095. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1096. msecs_to_jiffies(timeout));
  1097. if (plat_priv->power_up_error) {
  1098. ret = plat_priv->power_up_error;
  1099. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1100. cnss_pr_dbg("Power up error:%d, exiting\n",
  1101. plat_priv->power_up_error);
  1102. goto out;
  1103. }
  1104. if (!ret) {
  1105. /* This exception occurs after attempting retry of FW recovery.
  1106. * Thus we can safely power off the device.
  1107. */
  1108. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  1109. timeout);
  1110. ret = -ETIMEDOUT;
  1111. cnss_power_down(dev);
  1112. CNSS_ASSERT(0);
  1113. goto out;
  1114. }
  1115. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1116. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1117. del_timer(&plat_priv->fw_boot_timer);
  1118. ret = -EINVAL;
  1119. goto out;
  1120. }
  1121. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  1122. * non-DRV is supported only once after device reboots and before wifi
  1123. * is turned on. We do not allow switching back to DRV.
  1124. * To bring device back into DRV, user needs to reboot device.
  1125. */
  1126. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  1127. cnss_pr_dbg("DRV is disabled\n");
  1128. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  1129. }
  1130. mutex_unlock(&plat_priv->driver_ops_lock);
  1131. return 0;
  1132. out:
  1133. mutex_unlock(&plat_priv->driver_ops_lock);
  1134. return ret;
  1135. }
  1136. EXPORT_SYMBOL(cnss_idle_restart);
  1137. int cnss_idle_shutdown(struct device *dev)
  1138. {
  1139. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1140. unsigned int timeout;
  1141. int ret;
  1142. if (!plat_priv) {
  1143. cnss_pr_err("plat_priv is NULL\n");
  1144. return -ENODEV;
  1145. }
  1146. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  1147. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  1148. return -EAGAIN;
  1149. }
  1150. cnss_pr_dbg("Doing idle shutdown\n");
  1151. if (!test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) &&
  1152. !test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1153. goto skip_wait;
  1154. reinit_completion(&plat_priv->recovery_complete);
  1155. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY);
  1156. ret = wait_for_completion_timeout(&plat_priv->recovery_complete,
  1157. msecs_to_jiffies(timeout));
  1158. if (!ret) {
  1159. cnss_pr_err("Timeout (%ums) waiting for recovery to complete\n",
  1160. timeout);
  1161. CNSS_ASSERT(0);
  1162. }
  1163. skip_wait:
  1164. return cnss_driver_event_post(plat_priv,
  1165. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1166. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1167. }
  1168. EXPORT_SYMBOL(cnss_idle_shutdown);
  1169. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  1170. {
  1171. int ret = 0;
  1172. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1173. if (ret < 0) {
  1174. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  1175. goto out;
  1176. }
  1177. ret = cnss_get_clk(plat_priv);
  1178. if (ret) {
  1179. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  1180. goto put_vreg;
  1181. }
  1182. ret = cnss_get_pinctrl(plat_priv);
  1183. if (ret) {
  1184. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  1185. goto put_clk;
  1186. }
  1187. return 0;
  1188. put_clk:
  1189. cnss_put_clk(plat_priv);
  1190. put_vreg:
  1191. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1192. out:
  1193. return ret;
  1194. }
  1195. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  1196. {
  1197. cnss_put_clk(plat_priv);
  1198. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1199. }
  1200. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1201. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  1202. unsigned long code,
  1203. void *ss_handle)
  1204. {
  1205. struct cnss_plat_data *plat_priv =
  1206. container_of(nb, struct cnss_plat_data, modem_nb);
  1207. struct cnss_esoc_info *esoc_info;
  1208. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  1209. if (!plat_priv)
  1210. return NOTIFY_DONE;
  1211. esoc_info = &plat_priv->esoc_info;
  1212. if (code == SUBSYS_AFTER_POWERUP)
  1213. esoc_info->modem_current_status = 1;
  1214. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  1215. esoc_info->modem_current_status = 0;
  1216. else
  1217. return NOTIFY_DONE;
  1218. if (!cnss_bus_call_driver_modem_status(plat_priv,
  1219. esoc_info->modem_current_status))
  1220. return NOTIFY_DONE;
  1221. return NOTIFY_OK;
  1222. }
  1223. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1224. {
  1225. int ret = 0;
  1226. struct device *dev;
  1227. struct cnss_esoc_info *esoc_info;
  1228. struct esoc_desc *esoc_desc;
  1229. const char *client_desc;
  1230. dev = &plat_priv->plat_dev->dev;
  1231. esoc_info = &plat_priv->esoc_info;
  1232. esoc_info->notify_modem_status =
  1233. of_property_read_bool(dev->of_node,
  1234. "qcom,notify-modem-status");
  1235. if (!esoc_info->notify_modem_status)
  1236. goto out;
  1237. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1238. &client_desc);
  1239. if (ret) {
  1240. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1241. } else {
  1242. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1243. if (IS_ERR_OR_NULL(esoc_desc)) {
  1244. ret = PTR_RET(esoc_desc);
  1245. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1246. ret);
  1247. goto out;
  1248. }
  1249. esoc_info->esoc_desc = esoc_desc;
  1250. }
  1251. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1252. esoc_info->modem_current_status = 0;
  1253. esoc_info->modem_notify_handler =
  1254. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1255. esoc_info->esoc_desc->name :
  1256. "modem", &plat_priv->modem_nb);
  1257. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1258. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1259. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1260. ret);
  1261. goto unreg_esoc;
  1262. }
  1263. return 0;
  1264. unreg_esoc:
  1265. if (esoc_info->esoc_desc)
  1266. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1267. out:
  1268. return ret;
  1269. }
  1270. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1271. {
  1272. struct device *dev;
  1273. struct cnss_esoc_info *esoc_info;
  1274. dev = &plat_priv->plat_dev->dev;
  1275. esoc_info = &plat_priv->esoc_info;
  1276. if (esoc_info->notify_modem_status)
  1277. subsys_notif_unregister_notifier
  1278. (esoc_info->modem_notify_handler,
  1279. &plat_priv->modem_nb);
  1280. if (esoc_info->esoc_desc)
  1281. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1282. }
  1283. #else
  1284. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1285. {
  1286. return 0;
  1287. }
  1288. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1289. #endif
  1290. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1291. {
  1292. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1293. int ret = 0;
  1294. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1295. return 0;
  1296. enable_irq(sol_gpio->dev_sol_irq);
  1297. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1298. if (ret)
  1299. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1300. ret);
  1301. return ret;
  1302. }
  1303. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1304. {
  1305. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1306. int ret = 0;
  1307. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1308. return 0;
  1309. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1310. if (ret)
  1311. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1312. ret);
  1313. disable_irq(sol_gpio->dev_sol_irq);
  1314. return ret;
  1315. }
  1316. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1317. {
  1318. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1319. if (sol_gpio->dev_sol_gpio < 0)
  1320. return -EINVAL;
  1321. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1322. }
  1323. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1324. {
  1325. struct cnss_plat_data *plat_priv = data;
  1326. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1327. sol_gpio->dev_sol_counter++;
  1328. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1329. irq, sol_gpio->dev_sol_counter);
  1330. /* Make sure abort current suspend */
  1331. cnss_pm_stay_awake(plat_priv);
  1332. cnss_pm_relax(plat_priv);
  1333. pm_system_wakeup();
  1334. cnss_bus_handle_dev_sol_irq(plat_priv);
  1335. return IRQ_HANDLED;
  1336. }
  1337. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1338. {
  1339. struct device *dev = &plat_priv->plat_dev->dev;
  1340. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1341. int ret = 0;
  1342. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1343. "wlan-dev-sol-gpio", 0);
  1344. if (sol_gpio->dev_sol_gpio < 0)
  1345. goto out;
  1346. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1347. sol_gpio->dev_sol_gpio);
  1348. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1349. if (ret) {
  1350. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1351. ret);
  1352. goto out;
  1353. }
  1354. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1355. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1356. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1357. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1358. if (ret) {
  1359. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1360. goto free_gpio;
  1361. }
  1362. return 0;
  1363. free_gpio:
  1364. gpio_free(sol_gpio->dev_sol_gpio);
  1365. out:
  1366. return ret;
  1367. }
  1368. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1369. {
  1370. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1371. if (sol_gpio->dev_sol_gpio < 0)
  1372. return;
  1373. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1374. gpio_free(sol_gpio->dev_sol_gpio);
  1375. }
  1376. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1377. {
  1378. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1379. if (sol_gpio->host_sol_gpio < 0)
  1380. return -EINVAL;
  1381. if (value)
  1382. cnss_pr_dbg("Assert host SOL GPIO\n");
  1383. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1384. return 0;
  1385. }
  1386. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1387. {
  1388. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1389. if (sol_gpio->host_sol_gpio < 0)
  1390. return -EINVAL;
  1391. return gpio_get_value(sol_gpio->host_sol_gpio);
  1392. }
  1393. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1394. {
  1395. struct device *dev = &plat_priv->plat_dev->dev;
  1396. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1397. int ret = 0;
  1398. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1399. "wlan-host-sol-gpio", 0);
  1400. if (sol_gpio->host_sol_gpio < 0)
  1401. goto out;
  1402. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1403. sol_gpio->host_sol_gpio);
  1404. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1405. if (ret) {
  1406. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1407. ret);
  1408. goto out;
  1409. }
  1410. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1411. return 0;
  1412. out:
  1413. return ret;
  1414. }
  1415. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1416. {
  1417. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1418. if (sol_gpio->host_sol_gpio < 0)
  1419. return;
  1420. gpio_free(sol_gpio->host_sol_gpio);
  1421. }
  1422. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1423. {
  1424. int ret;
  1425. ret = cnss_init_dev_sol_gpio(plat_priv);
  1426. if (ret)
  1427. goto out;
  1428. ret = cnss_init_host_sol_gpio(plat_priv);
  1429. if (ret)
  1430. goto deinit_dev_sol;
  1431. return 0;
  1432. deinit_dev_sol:
  1433. cnss_deinit_dev_sol_gpio(plat_priv);
  1434. out:
  1435. return ret;
  1436. }
  1437. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1438. {
  1439. cnss_deinit_host_sol_gpio(plat_priv);
  1440. cnss_deinit_dev_sol_gpio(plat_priv);
  1441. }
  1442. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1443. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1444. {
  1445. struct cnss_plat_data *plat_priv;
  1446. int ret = 0;
  1447. if (!subsys_desc->dev) {
  1448. cnss_pr_err("dev from subsys_desc is NULL\n");
  1449. return -ENODEV;
  1450. }
  1451. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1452. if (!plat_priv) {
  1453. cnss_pr_err("plat_priv is NULL\n");
  1454. return -ENODEV;
  1455. }
  1456. if (!plat_priv->driver_state) {
  1457. cnss_pr_dbg("subsys powerup is ignored\n");
  1458. return 0;
  1459. }
  1460. ret = cnss_bus_dev_powerup(plat_priv);
  1461. if (ret)
  1462. __pm_relax(plat_priv->recovery_ws);
  1463. return ret;
  1464. }
  1465. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1466. bool force_stop)
  1467. {
  1468. struct cnss_plat_data *plat_priv;
  1469. if (!subsys_desc->dev) {
  1470. cnss_pr_err("dev from subsys_desc is NULL\n");
  1471. return -ENODEV;
  1472. }
  1473. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1474. if (!plat_priv) {
  1475. cnss_pr_err("plat_priv is NULL\n");
  1476. return -ENODEV;
  1477. }
  1478. if (!plat_priv->driver_state) {
  1479. cnss_pr_dbg("subsys shutdown is ignored\n");
  1480. return 0;
  1481. }
  1482. return cnss_bus_dev_shutdown(plat_priv);
  1483. }
  1484. void cnss_device_crashed(struct device *dev)
  1485. {
  1486. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1487. struct cnss_subsys_info *subsys_info;
  1488. if (!plat_priv)
  1489. return;
  1490. subsys_info = &plat_priv->subsys_info;
  1491. if (subsys_info->subsys_device) {
  1492. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1493. subsys_set_crash_status(subsys_info->subsys_device, true);
  1494. subsystem_restart_dev(subsys_info->subsys_device);
  1495. }
  1496. }
  1497. EXPORT_SYMBOL(cnss_device_crashed);
  1498. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1499. {
  1500. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1501. if (!plat_priv) {
  1502. cnss_pr_err("plat_priv is NULL\n");
  1503. return;
  1504. }
  1505. cnss_bus_dev_crash_shutdown(plat_priv);
  1506. }
  1507. static int cnss_subsys_ramdump(int enable,
  1508. const struct subsys_desc *subsys_desc)
  1509. {
  1510. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1511. if (!plat_priv) {
  1512. cnss_pr_err("plat_priv is NULL\n");
  1513. return -ENODEV;
  1514. }
  1515. if (!enable)
  1516. return 0;
  1517. return cnss_bus_dev_ramdump(plat_priv);
  1518. }
  1519. static void cnss_recovery_work_handler(struct work_struct *work)
  1520. {
  1521. }
  1522. #else
  1523. static void cnss_recovery_work_handler(struct work_struct *work)
  1524. {
  1525. int ret;
  1526. struct cnss_plat_data *plat_priv =
  1527. container_of(work, struct cnss_plat_data, recovery_work);
  1528. if (!plat_priv->recovery_enabled)
  1529. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1530. cnss_bus_dev_shutdown(plat_priv);
  1531. cnss_bus_dev_ramdump(plat_priv);
  1532. msleep(POWER_RESET_MIN_DELAY_MS);
  1533. ret = cnss_bus_dev_powerup(plat_priv);
  1534. if (ret)
  1535. __pm_relax(plat_priv->recovery_ws);
  1536. return;
  1537. }
  1538. void cnss_device_crashed(struct device *dev)
  1539. {
  1540. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1541. if (!plat_priv)
  1542. return;
  1543. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1544. schedule_work(&plat_priv->recovery_work);
  1545. }
  1546. EXPORT_SYMBOL(cnss_device_crashed);
  1547. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1548. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1549. {
  1550. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1551. struct cnss_ramdump_info *ramdump_info;
  1552. if (!plat_priv)
  1553. return NULL;
  1554. ramdump_info = &plat_priv->ramdump_info;
  1555. *size = ramdump_info->ramdump_size;
  1556. return ramdump_info->ramdump_va;
  1557. }
  1558. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1559. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1560. {
  1561. switch (reason) {
  1562. case CNSS_REASON_DEFAULT:
  1563. return "DEFAULT";
  1564. case CNSS_REASON_LINK_DOWN:
  1565. return "LINK_DOWN";
  1566. case CNSS_REASON_RDDM:
  1567. return "RDDM";
  1568. case CNSS_REASON_TIMEOUT:
  1569. return "TIMEOUT";
  1570. }
  1571. return "UNKNOWN";
  1572. };
  1573. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1574. enum cnss_recovery_reason reason)
  1575. {
  1576. plat_priv->recovery_count++;
  1577. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1578. goto self_recovery;
  1579. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1580. cnss_pr_dbg("Skip device recovery\n");
  1581. return 0;
  1582. }
  1583. /* FW recovery sequence has multiple steps and firmware load requires
  1584. * linux PM in awake state. Thus hold the cnss wake source until
  1585. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1586. * time taken in this process.
  1587. */
  1588. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1589. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1590. true);
  1591. switch (reason) {
  1592. case CNSS_REASON_LINK_DOWN:
  1593. if (!cnss_bus_check_link_status(plat_priv)) {
  1594. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1595. return 0;
  1596. }
  1597. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1598. &plat_priv->ctrl_params.quirks))
  1599. goto self_recovery;
  1600. if (!cnss_bus_recover_link_down(plat_priv)) {
  1601. /* clear recovery bit here to avoid skipping
  1602. * the recovery work for RDDM later
  1603. */
  1604. clear_bit(CNSS_DRIVER_RECOVERY,
  1605. &plat_priv->driver_state);
  1606. return 0;
  1607. }
  1608. break;
  1609. case CNSS_REASON_RDDM:
  1610. cnss_bus_collect_dump_info(plat_priv, false);
  1611. break;
  1612. case CNSS_REASON_DEFAULT:
  1613. case CNSS_REASON_TIMEOUT:
  1614. break;
  1615. default:
  1616. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1617. cnss_recovery_reason_to_str(reason), reason);
  1618. break;
  1619. }
  1620. cnss_bus_device_crashed(plat_priv);
  1621. return 0;
  1622. self_recovery:
  1623. cnss_pr_dbg("Going for self recovery\n");
  1624. cnss_bus_dev_shutdown(plat_priv);
  1625. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1626. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1627. &plat_priv->ctrl_params.quirks);
  1628. cnss_bus_dev_powerup(plat_priv);
  1629. return 0;
  1630. }
  1631. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1632. void *data)
  1633. {
  1634. struct cnss_recovery_data *recovery_data = data;
  1635. int ret = 0;
  1636. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1637. cnss_recovery_reason_to_str(recovery_data->reason),
  1638. recovery_data->reason);
  1639. if (!plat_priv->driver_state) {
  1640. cnss_pr_err("Improper driver state, ignore recovery\n");
  1641. ret = -EINVAL;
  1642. goto out;
  1643. }
  1644. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1645. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1646. ret = -EINVAL;
  1647. goto out;
  1648. }
  1649. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1650. cnss_pr_err("Recovery is already in progress\n");
  1651. CNSS_ASSERT(0);
  1652. ret = -EINVAL;
  1653. goto out;
  1654. }
  1655. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1656. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1657. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1658. ret = -EINVAL;
  1659. goto out;
  1660. }
  1661. switch (plat_priv->device_id) {
  1662. case QCA6174_DEVICE_ID:
  1663. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1664. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1665. &plat_priv->driver_state)) {
  1666. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1667. ret = -EINVAL;
  1668. goto out;
  1669. }
  1670. break;
  1671. default:
  1672. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1673. set_bit(CNSS_FW_BOOT_RECOVERY,
  1674. &plat_priv->driver_state);
  1675. }
  1676. break;
  1677. }
  1678. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1679. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1680. out:
  1681. kfree(data);
  1682. return ret;
  1683. }
  1684. int cnss_self_recovery(struct device *dev,
  1685. enum cnss_recovery_reason reason)
  1686. {
  1687. cnss_schedule_recovery(dev, reason);
  1688. return 0;
  1689. }
  1690. EXPORT_SYMBOL(cnss_self_recovery);
  1691. void cnss_schedule_recovery(struct device *dev,
  1692. enum cnss_recovery_reason reason)
  1693. {
  1694. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1695. struct cnss_recovery_data *data;
  1696. int gfp = GFP_KERNEL;
  1697. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1698. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1699. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1700. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1701. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1702. return;
  1703. }
  1704. if (in_interrupt() || irqs_disabled())
  1705. gfp = GFP_ATOMIC;
  1706. data = kzalloc(sizeof(*data), gfp);
  1707. if (!data)
  1708. return;
  1709. data->reason = reason;
  1710. cnss_driver_event_post(plat_priv,
  1711. CNSS_DRIVER_EVENT_RECOVERY,
  1712. 0, data);
  1713. }
  1714. EXPORT_SYMBOL(cnss_schedule_recovery);
  1715. int cnss_force_fw_assert(struct device *dev)
  1716. {
  1717. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1718. if (!plat_priv) {
  1719. cnss_pr_err("plat_priv is NULL\n");
  1720. return -ENODEV;
  1721. }
  1722. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1723. cnss_pr_info("Forced FW assert is not supported\n");
  1724. return -EOPNOTSUPP;
  1725. }
  1726. if (cnss_bus_is_device_down(plat_priv)) {
  1727. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1728. return 0;
  1729. }
  1730. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1731. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1732. return 0;
  1733. }
  1734. if (in_interrupt() || irqs_disabled())
  1735. cnss_driver_event_post(plat_priv,
  1736. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1737. 0, NULL);
  1738. else
  1739. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1740. return 0;
  1741. }
  1742. EXPORT_SYMBOL(cnss_force_fw_assert);
  1743. int cnss_force_collect_rddm(struct device *dev)
  1744. {
  1745. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1746. unsigned int timeout;
  1747. int ret = 0;
  1748. if (!plat_priv) {
  1749. cnss_pr_err("plat_priv is NULL\n");
  1750. return -ENODEV;
  1751. }
  1752. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1753. cnss_pr_info("Force collect rddm is not supported\n");
  1754. return -EOPNOTSUPP;
  1755. }
  1756. if (cnss_bus_is_device_down(plat_priv)) {
  1757. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1758. goto wait_rddm;
  1759. }
  1760. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1761. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1762. goto wait_rddm;
  1763. }
  1764. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1765. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1766. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1767. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1768. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1769. return 0;
  1770. }
  1771. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1772. if (ret)
  1773. return ret;
  1774. wait_rddm:
  1775. reinit_completion(&plat_priv->rddm_complete);
  1776. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1777. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1778. msecs_to_jiffies(timeout));
  1779. if (!ret) {
  1780. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1781. timeout);
  1782. ret = -ETIMEDOUT;
  1783. } else if (ret > 0) {
  1784. ret = 0;
  1785. }
  1786. return ret;
  1787. }
  1788. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1789. int cnss_qmi_send_get(struct device *dev)
  1790. {
  1791. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1792. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1793. return 0;
  1794. return cnss_bus_qmi_send_get(plat_priv);
  1795. }
  1796. EXPORT_SYMBOL(cnss_qmi_send_get);
  1797. int cnss_qmi_send_put(struct device *dev)
  1798. {
  1799. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1800. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1801. return 0;
  1802. return cnss_bus_qmi_send_put(plat_priv);
  1803. }
  1804. EXPORT_SYMBOL(cnss_qmi_send_put);
  1805. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1806. int cmd_len, void *cb_ctx,
  1807. int (*cb)(void *ctx, void *event, int event_len))
  1808. {
  1809. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1810. int ret;
  1811. if (!plat_priv)
  1812. return -ENODEV;
  1813. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1814. return -EINVAL;
  1815. plat_priv->get_info_cb = cb;
  1816. plat_priv->get_info_cb_ctx = cb_ctx;
  1817. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1818. if (ret) {
  1819. plat_priv->get_info_cb = NULL;
  1820. plat_priv->get_info_cb_ctx = NULL;
  1821. }
  1822. return ret;
  1823. }
  1824. EXPORT_SYMBOL(cnss_qmi_send);
  1825. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1826. {
  1827. int ret = 0;
  1828. u32 retry = 0, timeout;
  1829. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1830. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1831. goto out;
  1832. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1833. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1834. goto out;
  1835. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1836. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1837. goto out;
  1838. }
  1839. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1840. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1841. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1842. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1843. CNSS_ASSERT(0);
  1844. return -EINVAL;
  1845. }
  1846. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1847. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1848. break;
  1849. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1850. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1851. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1852. CNSS_ASSERT(0);
  1853. ret = -EINVAL;
  1854. goto mark_cal_fail;
  1855. }
  1856. }
  1857. switch (plat_priv->device_id) {
  1858. case QCA6290_DEVICE_ID:
  1859. case QCA6390_DEVICE_ID:
  1860. case QCA6490_DEVICE_ID:
  1861. case KIWI_DEVICE_ID:
  1862. case MANGO_DEVICE_ID:
  1863. case PEACH_DEVICE_ID:
  1864. break;
  1865. default:
  1866. cnss_pr_err("Not supported for device ID 0x%lx\n",
  1867. plat_priv->device_id);
  1868. ret = -EINVAL;
  1869. goto mark_cal_fail;
  1870. }
  1871. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1872. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1873. timeout = cnss_get_timeout(plat_priv,
  1874. CNSS_TIMEOUT_CALIBRATION);
  1875. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1876. timeout / 1000);
  1877. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1878. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1879. msecs_to_jiffies(timeout));
  1880. }
  1881. reinit_completion(&plat_priv->cal_complete);
  1882. ret = cnss_bus_dev_powerup(plat_priv);
  1883. mark_cal_fail:
  1884. if (ret) {
  1885. complete(&plat_priv->cal_complete);
  1886. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1887. /* Set CBC done in driver state to mark attempt and note error
  1888. * since calibration cannot be retried at boot.
  1889. */
  1890. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1891. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1892. if (plat_priv->device_id == QCA6174_DEVICE_ID ||
  1893. plat_priv->device_id == QCN7605_DEVICE_ID) {
  1894. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1895. goto out;
  1896. cnss_pr_info("Schedule WLAN driver load\n");
  1897. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1898. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1899. 0);
  1900. }
  1901. }
  1902. out:
  1903. return ret;
  1904. }
  1905. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  1906. void *data)
  1907. {
  1908. struct cnss_cal_info *cal_info = data;
  1909. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  1910. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  1911. goto out;
  1912. switch (cal_info->cal_status) {
  1913. case CNSS_CAL_DONE:
  1914. cnss_pr_dbg("Calibration completed successfully\n");
  1915. plat_priv->cal_done = true;
  1916. break;
  1917. case CNSS_CAL_TIMEOUT:
  1918. case CNSS_CAL_FAILURE:
  1919. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  1920. cal_info->cal_status);
  1921. break;
  1922. default:
  1923. cnss_pr_err("Unknown calibration status: %u\n",
  1924. cal_info->cal_status);
  1925. break;
  1926. }
  1927. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  1928. cnss_bus_free_qdss_mem(plat_priv);
  1929. cnss_release_antenna_sharing(plat_priv);
  1930. cnss_bus_dev_shutdown(plat_priv);
  1931. msleep(POWER_RESET_MIN_DELAY_MS);
  1932. complete(&plat_priv->cal_complete);
  1933. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1934. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1935. if (cal_info->cal_status == CNSS_CAL_DONE) {
  1936. cnss_cal_mem_upload_to_file(plat_priv);
  1937. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1938. goto out;
  1939. cnss_pr_dbg("Schedule WLAN driver load\n");
  1940. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1941. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1942. 0);
  1943. }
  1944. out:
  1945. kfree(data);
  1946. return 0;
  1947. }
  1948. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  1949. {
  1950. int ret;
  1951. ret = cnss_bus_dev_powerup(plat_priv);
  1952. if (ret)
  1953. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1954. return ret;
  1955. }
  1956. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  1957. {
  1958. cnss_bus_dev_shutdown(plat_priv);
  1959. return 0;
  1960. }
  1961. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  1962. {
  1963. int ret = 0;
  1964. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  1965. if (ret < 0)
  1966. return ret;
  1967. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  1968. }
  1969. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  1970. u32 mem_seg_len, u64 pa, u32 size)
  1971. {
  1972. int i = 0;
  1973. u64 offset = 0;
  1974. void *va = NULL;
  1975. u64 local_pa;
  1976. u32 local_size;
  1977. for (i = 0; i < mem_seg_len; i++) {
  1978. local_pa = (u64)fw_mem[i].pa;
  1979. local_size = (u32)fw_mem[i].size;
  1980. if (pa == local_pa && size <= local_size) {
  1981. va = fw_mem[i].va;
  1982. break;
  1983. }
  1984. if (pa > local_pa &&
  1985. pa < local_pa + local_size &&
  1986. pa + size <= local_pa + local_size) {
  1987. offset = pa - local_pa;
  1988. va = fw_mem[i].va + offset;
  1989. break;
  1990. }
  1991. }
  1992. return va;
  1993. }
  1994. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  1995. void *data)
  1996. {
  1997. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1998. struct cnss_fw_mem *fw_mem_seg;
  1999. int ret = 0L;
  2000. void *va = NULL;
  2001. u32 i, fw_mem_seg_len;
  2002. switch (event_data->mem_type) {
  2003. case QMI_WLFW_MEM_TYPE_DDR_V01:
  2004. if (!plat_priv->fw_mem_seg_len)
  2005. goto invalid_mem_save;
  2006. fw_mem_seg = plat_priv->fw_mem;
  2007. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  2008. break;
  2009. case QMI_WLFW_MEM_QDSS_V01:
  2010. if (!plat_priv->qdss_mem_seg_len)
  2011. goto invalid_mem_save;
  2012. fw_mem_seg = plat_priv->qdss_mem;
  2013. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  2014. break;
  2015. default:
  2016. goto invalid_mem_save;
  2017. }
  2018. for (i = 0; i < event_data->mem_seg_len; i++) {
  2019. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  2020. event_data->mem_seg[i].addr,
  2021. event_data->mem_seg[i].size);
  2022. if (!va) {
  2023. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  2024. &event_data->mem_seg[i].addr,
  2025. event_data->mem_type);
  2026. ret = -EINVAL;
  2027. break;
  2028. }
  2029. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  2030. event_data->file_name,
  2031. event_data->mem_seg[i].size);
  2032. if (ret < 0) {
  2033. cnss_pr_err("Fail to save fw mem data: %d\n",
  2034. ret);
  2035. break;
  2036. }
  2037. }
  2038. kfree(data);
  2039. return ret;
  2040. invalid_mem_save:
  2041. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  2042. event_data->mem_type);
  2043. kfree(data);
  2044. return -EINVAL;
  2045. }
  2046. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  2047. {
  2048. cnss_bus_free_qdss_mem(plat_priv);
  2049. return 0;
  2050. }
  2051. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  2052. void *data)
  2053. {
  2054. int ret = 0;
  2055. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2056. if (!plat_priv)
  2057. return -ENODEV;
  2058. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  2059. event_data->total_size);
  2060. kfree(data);
  2061. return ret;
  2062. }
  2063. static void cnss_driver_event_work(struct work_struct *work)
  2064. {
  2065. struct cnss_plat_data *plat_priv =
  2066. container_of(work, struct cnss_plat_data, event_work);
  2067. struct cnss_driver_event *event;
  2068. unsigned long flags;
  2069. int ret = 0;
  2070. if (!plat_priv) {
  2071. cnss_pr_err("plat_priv is NULL!\n");
  2072. return;
  2073. }
  2074. cnss_pm_stay_awake(plat_priv);
  2075. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2076. while (!list_empty(&plat_priv->event_list)) {
  2077. event = list_first_entry(&plat_priv->event_list,
  2078. struct cnss_driver_event, list);
  2079. list_del(&event->list);
  2080. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2081. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  2082. cnss_driver_event_to_str(event->type),
  2083. event->sync ? "-sync" : "", event->type,
  2084. plat_priv->driver_state);
  2085. switch (event->type) {
  2086. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  2087. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  2088. break;
  2089. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  2090. ret = cnss_wlfw_server_exit(plat_priv);
  2091. break;
  2092. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  2093. ret = cnss_bus_alloc_fw_mem(plat_priv);
  2094. if (ret)
  2095. break;
  2096. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  2097. break;
  2098. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  2099. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  2100. break;
  2101. case CNSS_DRIVER_EVENT_FW_READY:
  2102. ret = cnss_fw_ready_hdlr(plat_priv);
  2103. break;
  2104. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  2105. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  2106. break;
  2107. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  2108. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  2109. event->data);
  2110. break;
  2111. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  2112. ret = cnss_bus_register_driver_hdlr(plat_priv,
  2113. event->data);
  2114. break;
  2115. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  2116. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  2117. break;
  2118. case CNSS_DRIVER_EVENT_RECOVERY:
  2119. ret = cnss_driver_recovery_hdlr(plat_priv,
  2120. event->data);
  2121. break;
  2122. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  2123. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  2124. break;
  2125. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  2126. set_bit(CNSS_DRIVER_IDLE_RESTART,
  2127. &plat_priv->driver_state);
  2128. fallthrough;
  2129. case CNSS_DRIVER_EVENT_POWER_UP:
  2130. ret = cnss_power_up_hdlr(plat_priv);
  2131. break;
  2132. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  2133. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  2134. &plat_priv->driver_state);
  2135. fallthrough;
  2136. case CNSS_DRIVER_EVENT_POWER_DOWN:
  2137. ret = cnss_power_down_hdlr(plat_priv);
  2138. break;
  2139. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  2140. ret = cnss_process_wfc_call_ind_event(plat_priv,
  2141. event->data);
  2142. break;
  2143. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  2144. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  2145. event->data);
  2146. break;
  2147. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  2148. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  2149. break;
  2150. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  2151. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  2152. event->data);
  2153. break;
  2154. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  2155. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  2156. break;
  2157. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  2158. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  2159. event->data);
  2160. break;
  2161. default:
  2162. cnss_pr_err("Invalid driver event type: %d",
  2163. event->type);
  2164. kfree(event);
  2165. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2166. continue;
  2167. }
  2168. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2169. if (event->sync) {
  2170. event->ret = ret;
  2171. complete(&event->complete);
  2172. continue;
  2173. }
  2174. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2175. kfree(event);
  2176. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2177. }
  2178. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2179. cnss_pm_relax(plat_priv);
  2180. }
  2181. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  2182. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2183. {
  2184. int ret = 0;
  2185. struct cnss_subsys_info *subsys_info;
  2186. subsys_info = &plat_priv->subsys_info;
  2187. subsys_info->subsys_desc.name = plat_priv->device_name;
  2188. subsys_info->subsys_desc.owner = THIS_MODULE;
  2189. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  2190. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  2191. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  2192. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  2193. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  2194. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  2195. if (IS_ERR(subsys_info->subsys_device)) {
  2196. ret = PTR_ERR(subsys_info->subsys_device);
  2197. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  2198. goto out;
  2199. }
  2200. subsys_info->subsys_handle =
  2201. subsystem_get(subsys_info->subsys_desc.name);
  2202. if (!subsys_info->subsys_handle) {
  2203. cnss_pr_err("Failed to get subsys_handle!\n");
  2204. ret = -EINVAL;
  2205. goto unregister_subsys;
  2206. } else if (IS_ERR(subsys_info->subsys_handle)) {
  2207. ret = PTR_ERR(subsys_info->subsys_handle);
  2208. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  2209. goto unregister_subsys;
  2210. }
  2211. return 0;
  2212. unregister_subsys:
  2213. subsys_unregister(subsys_info->subsys_device);
  2214. out:
  2215. return ret;
  2216. }
  2217. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2218. {
  2219. struct cnss_subsys_info *subsys_info;
  2220. subsys_info = &plat_priv->subsys_info;
  2221. subsystem_put(subsys_info->subsys_handle);
  2222. subsys_unregister(subsys_info->subsys_device);
  2223. }
  2224. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2225. {
  2226. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  2227. return create_ramdump_device(subsys_info->subsys_desc.name,
  2228. subsys_info->subsys_desc.dev);
  2229. }
  2230. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2231. void *ramdump_dev)
  2232. {
  2233. destroy_ramdump_device(ramdump_dev);
  2234. }
  2235. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2236. {
  2237. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2238. struct ramdump_segment segment;
  2239. memset(&segment, 0, sizeof(segment));
  2240. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  2241. segment.size = ramdump_info->ramdump_size;
  2242. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  2243. }
  2244. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2245. {
  2246. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2247. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2248. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2249. struct ramdump_segment *ramdump_segs, *s;
  2250. struct cnss_dump_meta_info meta_info = {0};
  2251. int i, ret = 0;
  2252. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2253. sizeof(*ramdump_segs),
  2254. GFP_KERNEL);
  2255. if (!ramdump_segs)
  2256. return -ENOMEM;
  2257. s = ramdump_segs + 1;
  2258. for (i = 0; i < dump_data->nentries; i++) {
  2259. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2260. cnss_pr_err("Unsupported dump type: %d",
  2261. dump_seg->type);
  2262. continue;
  2263. }
  2264. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2265. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2266. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2267. }
  2268. meta_info.entry[dump_seg->type].entry_num++;
  2269. s->address = dump_seg->address;
  2270. s->v_address = (void __iomem *)dump_seg->v_address;
  2271. s->size = dump_seg->size;
  2272. s++;
  2273. dump_seg++;
  2274. }
  2275. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2276. meta_info.version = CNSS_RAMDUMP_VERSION;
  2277. meta_info.chipset = plat_priv->device_id;
  2278. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2279. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2280. ramdump_segs->size = sizeof(meta_info);
  2281. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2282. dump_data->nentries + 1);
  2283. kfree(ramdump_segs);
  2284. return ret;
  2285. }
  2286. #else
  2287. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2288. void *data)
  2289. {
  2290. struct cnss_plat_data *plat_priv =
  2291. container_of(nb, struct cnss_plat_data, panic_nb);
  2292. cnss_bus_dev_crash_shutdown(plat_priv);
  2293. return NOTIFY_DONE;
  2294. }
  2295. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2296. {
  2297. int ret;
  2298. if (!plat_priv)
  2299. return -ENODEV;
  2300. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2301. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2302. &plat_priv->panic_nb);
  2303. if (ret) {
  2304. cnss_pr_err("Failed to register panic handler\n");
  2305. return -EINVAL;
  2306. }
  2307. return 0;
  2308. }
  2309. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2310. {
  2311. int ret;
  2312. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2313. &plat_priv->panic_nb);
  2314. if (ret)
  2315. cnss_pr_err("Failed to unregister panic handler\n");
  2316. }
  2317. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2318. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2319. {
  2320. return &plat_priv->plat_dev->dev;
  2321. }
  2322. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2323. void *ramdump_dev)
  2324. {
  2325. }
  2326. #endif
  2327. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2328. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2329. {
  2330. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2331. struct qcom_dump_segment segment;
  2332. struct list_head head;
  2333. INIT_LIST_HEAD(&head);
  2334. memset(&segment, 0, sizeof(segment));
  2335. segment.va = ramdump_info->ramdump_va;
  2336. segment.size = ramdump_info->ramdump_size;
  2337. list_add(&segment.node, &head);
  2338. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2339. }
  2340. #else
  2341. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2342. {
  2343. return 0;
  2344. }
  2345. /* Using completion event inside dynamically allocated ramdump_desc
  2346. * may result a race between freeing the event after setting it to
  2347. * complete inside dev coredump free callback and the thread that is
  2348. * waiting for completion.
  2349. */
  2350. DECLARE_COMPLETION(dump_done);
  2351. #define TIMEOUT_SAVE_DUMP_MS 30000
  2352. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2353. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2354. { \
  2355. if (class == ELFCLASS32) \
  2356. return sizeof(struct elf32_##__xhdr); \
  2357. else \
  2358. return sizeof(struct elf64_##__xhdr); \
  2359. }
  2360. SIZEOF_ELF_STRUCT(phdr)
  2361. SIZEOF_ELF_STRUCT(hdr)
  2362. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2363. do { \
  2364. if (class == ELFCLASS32) \
  2365. ((struct elf32_##__xhdr *)arg)->member = value; \
  2366. else \
  2367. ((struct elf64_##__xhdr *)arg)->member = value; \
  2368. } while (0)
  2369. #define set_ehdr_property(arg, class, member, value) \
  2370. set_xhdr_property(hdr, arg, class, member, value)
  2371. #define set_phdr_property(arg, class, member, value) \
  2372. set_xhdr_property(phdr, arg, class, member, value)
  2373. /* These replace qcom_ramdump driver APIs called from common API
  2374. * cnss_do_elf_dump() by the ones defined here.
  2375. */
  2376. #define qcom_dump_segment cnss_qcom_dump_segment
  2377. #define qcom_elf_dump cnss_qcom_elf_dump
  2378. #define dump_enabled cnss_dump_enabled
  2379. struct cnss_qcom_dump_segment {
  2380. struct list_head node;
  2381. dma_addr_t da;
  2382. void *va;
  2383. size_t size;
  2384. };
  2385. struct cnss_qcom_ramdump_desc {
  2386. void *data;
  2387. struct completion dump_done;
  2388. };
  2389. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2390. void *data, size_t datalen)
  2391. {
  2392. struct cnss_qcom_ramdump_desc *desc = data;
  2393. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2394. datalen);
  2395. }
  2396. static void cnss_qcom_devcd_freev(void *data)
  2397. {
  2398. struct cnss_qcom_ramdump_desc *desc = data;
  2399. cnss_pr_dbg("Free dump data for dev coredump\n");
  2400. complete(&dump_done);
  2401. vfree(desc->data);
  2402. kfree(desc);
  2403. }
  2404. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2405. gfp_t gfp)
  2406. {
  2407. struct cnss_qcom_ramdump_desc *desc;
  2408. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2409. int ret;
  2410. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2411. if (!desc)
  2412. return -ENOMEM;
  2413. desc->data = data;
  2414. reinit_completion(&dump_done);
  2415. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2416. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2417. ret = wait_for_completion_timeout(&dump_done,
  2418. msecs_to_jiffies(timeout));
  2419. if (!ret)
  2420. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2421. timeout);
  2422. return ret ? 0 : -ETIMEDOUT;
  2423. }
  2424. /* Since the elf32 and elf64 identification is identical apart from
  2425. * the class, use elf32 by default.
  2426. */
  2427. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2428. {
  2429. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2430. ehdr->e_ident[EI_CLASS] = class;
  2431. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2432. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2433. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2434. }
  2435. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2436. unsigned char class)
  2437. {
  2438. struct cnss_qcom_dump_segment *segment;
  2439. void *phdr, *ehdr;
  2440. size_t data_size, offset;
  2441. int phnum = 0;
  2442. void *data;
  2443. void __iomem *ptr;
  2444. if (!segs || list_empty(segs))
  2445. return -EINVAL;
  2446. data_size = sizeof_elf_hdr(class);
  2447. list_for_each_entry(segment, segs, node) {
  2448. data_size += sizeof_elf_phdr(class) + segment->size;
  2449. phnum++;
  2450. }
  2451. data = vmalloc(data_size);
  2452. if (!data)
  2453. return -ENOMEM;
  2454. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2455. ehdr = data;
  2456. memset(ehdr, 0, sizeof_elf_hdr(class));
  2457. init_elf_identification(ehdr, class);
  2458. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2459. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2460. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2461. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2462. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2463. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2464. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2465. phdr = data + sizeof_elf_hdr(class);
  2466. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2467. list_for_each_entry(segment, segs, node) {
  2468. memset(phdr, 0, sizeof_elf_phdr(class));
  2469. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2470. set_phdr_property(phdr, class, p_offset, offset);
  2471. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2472. set_phdr_property(phdr, class, p_paddr, segment->da);
  2473. set_phdr_property(phdr, class, p_filesz, segment->size);
  2474. set_phdr_property(phdr, class, p_memsz, segment->size);
  2475. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2476. set_phdr_property(phdr, class, p_align, 0);
  2477. if (segment->va) {
  2478. memcpy(data + offset, segment->va, segment->size);
  2479. } else {
  2480. ptr = devm_ioremap(dev, segment->da, segment->size);
  2481. if (!ptr) {
  2482. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2483. &segment->da, segment->size);
  2484. memset(data + offset, 0xff, segment->size);
  2485. } else {
  2486. memcpy_fromio(data + offset, ptr,
  2487. segment->size);
  2488. }
  2489. }
  2490. offset += segment->size;
  2491. phdr += sizeof_elf_phdr(class);
  2492. }
  2493. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2494. }
  2495. /* Saving dump to file system is always needed in this case. */
  2496. static bool cnss_dump_enabled(void)
  2497. {
  2498. return true;
  2499. }
  2500. #endif /* CONFIG_QCOM_RAMDUMP */
  2501. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2502. {
  2503. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2504. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2505. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2506. struct qcom_dump_segment *seg;
  2507. struct cnss_dump_meta_info meta_info = {0};
  2508. struct list_head head;
  2509. int i, ret = 0;
  2510. if (!dump_enabled()) {
  2511. cnss_pr_info("Dump collection is not enabled\n");
  2512. return ret;
  2513. }
  2514. INIT_LIST_HEAD(&head);
  2515. for (i = 0; i < dump_data->nentries; i++) {
  2516. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2517. cnss_pr_err("Unsupported dump type: %d",
  2518. dump_seg->type);
  2519. continue;
  2520. }
  2521. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2522. if (!seg)
  2523. continue;
  2524. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2525. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2526. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2527. }
  2528. meta_info.entry[dump_seg->type].entry_num++;
  2529. seg->da = dump_seg->address;
  2530. seg->va = dump_seg->v_address;
  2531. seg->size = dump_seg->size;
  2532. list_add_tail(&seg->node, &head);
  2533. dump_seg++;
  2534. }
  2535. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2536. if (!seg)
  2537. goto do_elf_dump;
  2538. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2539. meta_info.version = CNSS_RAMDUMP_VERSION;
  2540. meta_info.chipset = plat_priv->device_id;
  2541. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2542. seg->va = &meta_info;
  2543. seg->size = sizeof(meta_info);
  2544. list_add(&seg->node, &head);
  2545. do_elf_dump:
  2546. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2547. while (!list_empty(&head)) {
  2548. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2549. list_del(&seg->node);
  2550. kfree(seg);
  2551. }
  2552. return ret;
  2553. }
  2554. #ifdef CONFIG_CNSS2_SSR_DRIVER_DUMP
  2555. int cnss_do_host_ramdump(struct cnss_plat_data *plat_priv,
  2556. struct cnss_ssr_driver_dump_entry *ssr_entry,
  2557. size_t num_entries_loaded)
  2558. {
  2559. struct qcom_dump_segment *seg;
  2560. struct cnss_host_dump_meta_info meta_info = {0};
  2561. struct list_head head;
  2562. int dev_ret = 0;
  2563. struct device *new_device;
  2564. static const char * const wlan_str[] = {
  2565. [CNSS_HOST_WLAN_LOGS] = "wlan_logs",
  2566. [CNSS_HOST_HTC_CREDIT] = "htc_credit",
  2567. [CNSS_HOST_WMI_TX_CMP] = "wmi_tx_cmp",
  2568. [CNSS_HOST_WMI_COMMAND_LOG] = "wmi_command_log",
  2569. [CNSS_HOST_WMI_EVENT_LOG] = "wmi_event_log",
  2570. [CNSS_HOST_WMI_RX_EVENT] = "wmi_rx_event",
  2571. [CNSS_HOST_HAL_SOC] = "hal_soc",
  2572. [CNSS_HOST_WMI_HANG_DATA] = "wmi_hang_data",
  2573. [CNSS_HOST_CE_HANG_EVT] = "ce_hang_evt",
  2574. [CNSS_HOST_PEER_MAC_ADDR_HANG_DATA] = "peer_mac_addr_hang_data",
  2575. [CNSS_HOST_CP_VDEV_INFO] = "cp_vdev_info",
  2576. [CNSS_HOST_GWLAN_LOGGING] = "gwlan_logging",
  2577. [CNSS_HOST_WMI_DEBUG_LOG_INFO] = "wmi_debug_log_info",
  2578. [CNSS_HOST_HTC_CREDIT_IDX] = "htc_credit_history_idx",
  2579. [CNSS_HOST_HTC_CREDIT_LEN] = "htc_credit_history_length",
  2580. [CNSS_HOST_WMI_TX_CMP_IDX] = "wmi_tx_cmp_idx",
  2581. [CNSS_HOST_WMI_COMMAND_LOG_IDX] = "wmi_command_log_idx",
  2582. [CNSS_HOST_WMI_EVENT_LOG_IDX] = "wmi_event_log_idx",
  2583. [CNSS_HOST_WMI_RX_EVENT_IDX] = "wmi_rx_event_idx"
  2584. };
  2585. int i, j;
  2586. int ret = 0;
  2587. if (!dump_enabled()) {
  2588. cnss_pr_info("Dump collection is not enabled\n");
  2589. return ret;
  2590. }
  2591. new_device = kcalloc(1, sizeof(*new_device), GFP_KERNEL);
  2592. if (!new_device) {
  2593. cnss_pr_err("Failed to alloc device mem\n");
  2594. return -ENOMEM;
  2595. }
  2596. device_initialize(new_device);
  2597. dev_set_name(new_device, "wlan_driver");
  2598. dev_ret = device_add(new_device);
  2599. if (dev_ret) {
  2600. cnss_pr_err("Failed to add new device\n");
  2601. goto put_device;
  2602. }
  2603. INIT_LIST_HEAD(&head);
  2604. for (i = 0; i < num_entries_loaded; i++) {
  2605. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2606. if (!seg) {
  2607. cnss_pr_err("Failed to alloc seg entry %d\n", i);
  2608. continue;
  2609. }
  2610. seg->va = ssr_entry[i].buffer_pointer;
  2611. seg->da = (dma_addr_t)ssr_entry[i].buffer_pointer;
  2612. seg->size = ssr_entry[i].buffer_size;
  2613. for (j = 0; j < ARRAY_SIZE(wlan_str); j++) {
  2614. if (strncmp(ssr_entry[i].region_name, wlan_str[j],
  2615. strlen(wlan_str[j])) == 0) {
  2616. meta_info.entry[i].type = j;
  2617. }
  2618. }
  2619. meta_info.entry[i].entry_start = i + 1;
  2620. meta_info.entry[i].entry_num++;
  2621. list_add_tail(&seg->node, &head);
  2622. }
  2623. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2624. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2625. meta_info.version = CNSS_RAMDUMP_VERSION;
  2626. meta_info.chipset = plat_priv->device_id;
  2627. meta_info.total_entries = num_entries_loaded;
  2628. seg->va = &meta_info;
  2629. seg->da = (dma_addr_t)&meta_info;
  2630. seg->size = sizeof(meta_info);
  2631. list_add(&seg->node, &head);
  2632. ret = qcom_elf_dump(&head, new_device, ELF_CLASS);
  2633. while (!list_empty(&head)) {
  2634. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2635. list_del(&seg->node);
  2636. kfree(seg);
  2637. }
  2638. device_del(new_device);
  2639. put_device:
  2640. put_device(new_device);
  2641. kfree(new_device);
  2642. return ret;
  2643. }
  2644. #endif
  2645. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2646. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2647. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2648. {
  2649. struct cnss_ramdump_info *ramdump_info;
  2650. struct msm_dump_entry dump_entry;
  2651. ramdump_info = &plat_priv->ramdump_info;
  2652. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2653. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2654. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2655. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2656. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2657. sizeof(ramdump_info->dump_data.name));
  2658. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2659. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2660. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2661. &dump_entry);
  2662. }
  2663. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2664. {
  2665. int ret = 0;
  2666. struct device *dev;
  2667. struct cnss_ramdump_info *ramdump_info;
  2668. u32 ramdump_size = 0;
  2669. dev = &plat_priv->plat_dev->dev;
  2670. ramdump_info = &plat_priv->ramdump_info;
  2671. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2672. /* dt type: legacy or converged */
  2673. ret = of_property_read_u32(dev->of_node,
  2674. "qcom,wlan-ramdump-dynamic",
  2675. &ramdump_size);
  2676. } else {
  2677. ret = of_property_read_u32(plat_priv->dev_node,
  2678. "qcom,wlan-ramdump-dynamic",
  2679. &ramdump_size);
  2680. }
  2681. if (ret == 0) {
  2682. ramdump_info->ramdump_va =
  2683. dma_alloc_coherent(dev, ramdump_size,
  2684. &ramdump_info->ramdump_pa,
  2685. GFP_KERNEL);
  2686. if (ramdump_info->ramdump_va)
  2687. ramdump_info->ramdump_size = ramdump_size;
  2688. }
  2689. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2690. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2691. if (ramdump_info->ramdump_size == 0) {
  2692. cnss_pr_info("Ramdump will not be collected");
  2693. goto out;
  2694. }
  2695. ret = cnss_init_dump_entry(plat_priv);
  2696. if (ret) {
  2697. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2698. goto free_ramdump;
  2699. }
  2700. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2701. if (!ramdump_info->ramdump_dev) {
  2702. cnss_pr_err("Failed to create ramdump device!");
  2703. ret = -ENOMEM;
  2704. goto free_ramdump;
  2705. }
  2706. return 0;
  2707. free_ramdump:
  2708. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2709. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2710. out:
  2711. return ret;
  2712. }
  2713. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2714. {
  2715. struct device *dev;
  2716. struct cnss_ramdump_info *ramdump_info;
  2717. dev = &plat_priv->plat_dev->dev;
  2718. ramdump_info = &plat_priv->ramdump_info;
  2719. if (ramdump_info->ramdump_dev)
  2720. cnss_destroy_ramdump_device(plat_priv,
  2721. ramdump_info->ramdump_dev);
  2722. if (ramdump_info->ramdump_va)
  2723. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2724. ramdump_info->ramdump_va,
  2725. ramdump_info->ramdump_pa);
  2726. }
  2727. /**
  2728. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2729. * @ret: Error returned by msm_dump_data_register_nominidump
  2730. *
  2731. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2732. * ignore failure.
  2733. *
  2734. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2735. */
  2736. static int cnss_ignore_dump_data_reg_fail(int ret)
  2737. {
  2738. return ret;
  2739. }
  2740. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2741. {
  2742. int ret = 0;
  2743. struct cnss_ramdump_info_v2 *info_v2;
  2744. struct cnss_dump_data *dump_data;
  2745. struct msm_dump_entry dump_entry;
  2746. struct device *dev = &plat_priv->plat_dev->dev;
  2747. u32 ramdump_size = 0;
  2748. info_v2 = &plat_priv->ramdump_info_v2;
  2749. dump_data = &info_v2->dump_data;
  2750. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2751. /* dt type: legacy or converged */
  2752. ret = of_property_read_u32(dev->of_node,
  2753. "qcom,wlan-ramdump-dynamic",
  2754. &ramdump_size);
  2755. } else {
  2756. ret = of_property_read_u32(plat_priv->dev_node,
  2757. "qcom,wlan-ramdump-dynamic",
  2758. &ramdump_size);
  2759. }
  2760. if (ret == 0)
  2761. info_v2->ramdump_size = ramdump_size;
  2762. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2763. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2764. if (!info_v2->dump_data_vaddr)
  2765. return -ENOMEM;
  2766. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2767. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2768. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2769. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2770. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2771. sizeof(dump_data->name));
  2772. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2773. dump_entry.addr = virt_to_phys(dump_data);
  2774. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2775. &dump_entry);
  2776. if (ret) {
  2777. ret = cnss_ignore_dump_data_reg_fail(ret);
  2778. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2779. ret ? "Error" : "Ignoring", ret);
  2780. goto free_ramdump;
  2781. }
  2782. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2783. if (!info_v2->ramdump_dev) {
  2784. cnss_pr_err("Failed to create ramdump device!\n");
  2785. ret = -ENOMEM;
  2786. goto free_ramdump;
  2787. }
  2788. return 0;
  2789. free_ramdump:
  2790. kfree(info_v2->dump_data_vaddr);
  2791. info_v2->dump_data_vaddr = NULL;
  2792. return ret;
  2793. }
  2794. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2795. {
  2796. struct cnss_ramdump_info_v2 *info_v2;
  2797. info_v2 = &plat_priv->ramdump_info_v2;
  2798. if (info_v2->ramdump_dev)
  2799. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2800. kfree(info_v2->dump_data_vaddr);
  2801. info_v2->dump_data_vaddr = NULL;
  2802. info_v2->dump_data_valid = false;
  2803. }
  2804. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2805. {
  2806. int ret = 0;
  2807. switch (plat_priv->device_id) {
  2808. case QCA6174_DEVICE_ID:
  2809. ret = cnss_register_ramdump_v1(plat_priv);
  2810. break;
  2811. case QCA6290_DEVICE_ID:
  2812. case QCA6390_DEVICE_ID:
  2813. case QCA6490_DEVICE_ID:
  2814. case KIWI_DEVICE_ID:
  2815. case MANGO_DEVICE_ID:
  2816. case PEACH_DEVICE_ID:
  2817. ret = cnss_register_ramdump_v2(plat_priv);
  2818. break;
  2819. default:
  2820. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2821. ret = -ENODEV;
  2822. break;
  2823. }
  2824. return ret;
  2825. }
  2826. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2827. {
  2828. switch (plat_priv->device_id) {
  2829. case QCA6174_DEVICE_ID:
  2830. cnss_unregister_ramdump_v1(plat_priv);
  2831. break;
  2832. case QCA6290_DEVICE_ID:
  2833. case QCA6390_DEVICE_ID:
  2834. case QCA6490_DEVICE_ID:
  2835. case KIWI_DEVICE_ID:
  2836. case MANGO_DEVICE_ID:
  2837. case PEACH_DEVICE_ID:
  2838. cnss_unregister_ramdump_v2(plat_priv);
  2839. break;
  2840. default:
  2841. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2842. break;
  2843. }
  2844. }
  2845. #else
  2846. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2847. {
  2848. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2849. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2850. struct device *dev = &plat_priv->plat_dev->dev;
  2851. u32 ramdump_size = 0;
  2852. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2853. &ramdump_size) == 0)
  2854. info_v2->ramdump_size = ramdump_size;
  2855. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2856. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2857. if (!info_v2->dump_data_vaddr)
  2858. return -ENOMEM;
  2859. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2860. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2861. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2862. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2863. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2864. sizeof(dump_data->name));
  2865. info_v2->ramdump_dev = dev;
  2866. return 0;
  2867. }
  2868. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2869. {
  2870. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2871. info_v2->ramdump_dev = NULL;
  2872. kfree(info_v2->dump_data_vaddr);
  2873. info_v2->dump_data_vaddr = NULL;
  2874. info_v2->dump_data_valid = false;
  2875. }
  2876. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2877. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2878. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2879. phys_addr_t *pa, unsigned long attrs)
  2880. {
  2881. struct sg_table sgt;
  2882. int ret;
  2883. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  2884. if (ret) {
  2885. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  2886. va, &dma, size, attrs);
  2887. return -EINVAL;
  2888. }
  2889. *pa = page_to_phys(sg_page(sgt.sgl));
  2890. sg_free_table(&sgt);
  2891. return 0;
  2892. }
  2893. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2894. enum cnss_fw_dump_type type, int seg_no,
  2895. void *va, phys_addr_t pa, size_t size)
  2896. {
  2897. struct md_region md_entry;
  2898. int ret;
  2899. switch (type) {
  2900. case CNSS_FW_IMAGE:
  2901. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2902. seg_no);
  2903. break;
  2904. case CNSS_FW_RDDM:
  2905. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2906. seg_no);
  2907. break;
  2908. case CNSS_FW_REMOTE_HEAP:
  2909. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2910. seg_no);
  2911. break;
  2912. default:
  2913. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2914. return -EINVAL;
  2915. }
  2916. md_entry.phys_addr = pa;
  2917. md_entry.virt_addr = (uintptr_t)va;
  2918. md_entry.size = size;
  2919. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2920. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2921. md_entry.name, va, &pa, size);
  2922. ret = msm_minidump_add_region(&md_entry);
  2923. if (ret < 0)
  2924. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  2925. return ret;
  2926. }
  2927. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2928. enum cnss_fw_dump_type type, int seg_no,
  2929. void *va, phys_addr_t pa, size_t size)
  2930. {
  2931. struct md_region md_entry;
  2932. int ret;
  2933. switch (type) {
  2934. case CNSS_FW_IMAGE:
  2935. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2936. seg_no);
  2937. break;
  2938. case CNSS_FW_RDDM:
  2939. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2940. seg_no);
  2941. break;
  2942. case CNSS_FW_REMOTE_HEAP:
  2943. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2944. seg_no);
  2945. break;
  2946. default:
  2947. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2948. return -EINVAL;
  2949. }
  2950. md_entry.phys_addr = pa;
  2951. md_entry.virt_addr = (uintptr_t)va;
  2952. md_entry.size = size;
  2953. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2954. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2955. md_entry.name, va, &pa, size);
  2956. ret = msm_minidump_remove_region(&md_entry);
  2957. if (ret)
  2958. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  2959. ret);
  2960. return ret;
  2961. }
  2962. #else
  2963. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2964. phys_addr_t *pa, unsigned long attrs)
  2965. {
  2966. return 0;
  2967. }
  2968. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2969. enum cnss_fw_dump_type type, int seg_no,
  2970. void *va, phys_addr_t pa, size_t size)
  2971. {
  2972. return 0;
  2973. }
  2974. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2975. enum cnss_fw_dump_type type, int seg_no,
  2976. void *va, phys_addr_t pa, size_t size)
  2977. {
  2978. return 0;
  2979. }
  2980. #endif /* CONFIG_QCOM_MINIDUMP */
  2981. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  2982. const struct firmware **fw_entry,
  2983. const char *filename)
  2984. {
  2985. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  2986. return request_firmware_direct(fw_entry, filename,
  2987. &plat_priv->plat_dev->dev);
  2988. else
  2989. return firmware_request_nowarn(fw_entry, filename,
  2990. &plat_priv->plat_dev->dev);
  2991. }
  2992. #if IS_ENABLED(CONFIG_INTERCONNECT)
  2993. /**
  2994. * cnss_register_bus_scale() - Setup interconnect voting data
  2995. * @plat_priv: Platform data structure
  2996. *
  2997. * For different interconnect path configured in device tree setup voting data
  2998. * for list of bandwidth requirements.
  2999. *
  3000. * Result: 0 for success. -EINVAL if not configured
  3001. */
  3002. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3003. {
  3004. int ret = -EINVAL;
  3005. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  3006. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3007. struct device *dev = &plat_priv->plat_dev->dev;
  3008. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  3009. ret = of_property_read_u32(dev->of_node,
  3010. "qcom,icc-path-count",
  3011. &plat_priv->icc.path_count);
  3012. if (ret) {
  3013. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  3014. return 0;
  3015. }
  3016. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  3017. "qcom,bus-bw-cfg-count",
  3018. &plat_priv->icc.bus_bw_cfg_count);
  3019. if (ret) {
  3020. cnss_pr_err("Failed to get Bus BW Config table size\n");
  3021. goto cleanup;
  3022. }
  3023. cfg_arr_size = plat_priv->icc.path_count *
  3024. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  3025. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  3026. if (!cfg_arr) {
  3027. cnss_pr_err("Failed to alloc cfg table mem\n");
  3028. ret = -ENOMEM;
  3029. goto cleanup;
  3030. }
  3031. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  3032. "qcom,bus-bw-cfg", cfg_arr,
  3033. cfg_arr_size);
  3034. if (ret) {
  3035. cnss_pr_err("Invalid Bus BW Config Table\n");
  3036. goto cleanup;
  3037. }
  3038. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  3039. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  3040. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  3041. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  3042. GFP_KERNEL);
  3043. if (!bus_bw_info) {
  3044. ret = -ENOMEM;
  3045. goto out;
  3046. }
  3047. ret = of_property_read_string_index(dev->of_node,
  3048. "interconnect-names", idx,
  3049. &bus_bw_info->icc_name);
  3050. if (ret)
  3051. goto out;
  3052. bus_bw_info->icc_path =
  3053. of_icc_get(&plat_priv->plat_dev->dev,
  3054. bus_bw_info->icc_name);
  3055. if (IS_ERR(bus_bw_info->icc_path)) {
  3056. ret = PTR_ERR(bus_bw_info->icc_path);
  3057. if (ret != -EPROBE_DEFER) {
  3058. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  3059. bus_bw_info->icc_name, ret);
  3060. goto out;
  3061. }
  3062. }
  3063. bus_bw_info->cfg_table =
  3064. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  3065. sizeof(*bus_bw_info->cfg_table),
  3066. GFP_KERNEL);
  3067. if (!bus_bw_info->cfg_table) {
  3068. ret = -ENOMEM;
  3069. goto out;
  3070. }
  3071. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  3072. bus_bw_info->icc_name);
  3073. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  3074. CNSS_ICC_VOTE_MAX);
  3075. i < plat_priv->icc.bus_bw_cfg_count;
  3076. i++, j += 2) {
  3077. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  3078. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  3079. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  3080. i, bus_bw_info->cfg_table[i].avg_bw,
  3081. bus_bw_info->cfg_table[i].peak_bw);
  3082. }
  3083. list_add_tail(&bus_bw_info->list,
  3084. &plat_priv->icc.list_head);
  3085. }
  3086. kfree(cfg_arr);
  3087. return 0;
  3088. out:
  3089. list_for_each_entry_safe(bus_bw_info, tmp,
  3090. &plat_priv->icc.list_head, list) {
  3091. list_del(&bus_bw_info->list);
  3092. }
  3093. cleanup:
  3094. kfree(cfg_arr);
  3095. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3096. return ret;
  3097. }
  3098. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  3099. {
  3100. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3101. list_for_each_entry_safe(bus_bw_info, tmp,
  3102. &plat_priv->icc.list_head, list) {
  3103. list_del(&bus_bw_info->list);
  3104. if (bus_bw_info->icc_path)
  3105. icc_put(bus_bw_info->icc_path);
  3106. }
  3107. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3108. }
  3109. #else
  3110. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3111. {
  3112. return 0;
  3113. }
  3114. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  3115. #endif /* CONFIG_INTERCONNECT */
  3116. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  3117. {
  3118. struct cnss_plat_data *plat_priv = cb_ctx;
  3119. if (!plat_priv) {
  3120. cnss_pr_err("%s: Invalid context\n", __func__);
  3121. return;
  3122. }
  3123. if (status) {
  3124. cnss_pr_info("CNSS Daemon connected\n");
  3125. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3126. complete(&plat_priv->daemon_connected);
  3127. } else {
  3128. cnss_pr_info("CNSS Daemon disconnected\n");
  3129. reinit_completion(&plat_priv->daemon_connected);
  3130. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3131. }
  3132. }
  3133. static ssize_t enable_hds_store(struct device *dev,
  3134. struct device_attribute *attr,
  3135. const char *buf, size_t count)
  3136. {
  3137. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3138. unsigned int enable_hds = 0;
  3139. if (!plat_priv)
  3140. return -ENODEV;
  3141. if (sscanf(buf, "%du", &enable_hds) != 1) {
  3142. cnss_pr_err("Invalid enable_hds sysfs command\n");
  3143. return -EINVAL;
  3144. }
  3145. if (enable_hds)
  3146. plat_priv->hds_enabled = true;
  3147. else
  3148. plat_priv->hds_enabled = false;
  3149. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  3150. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  3151. return count;
  3152. }
  3153. static ssize_t recovery_show(struct device *dev,
  3154. struct device_attribute *attr,
  3155. char *buf)
  3156. {
  3157. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3158. u32 buf_size = PAGE_SIZE;
  3159. u32 curr_len = 0;
  3160. u32 buf_written = 0;
  3161. if (!plat_priv)
  3162. return -ENODEV;
  3163. buf_written = scnprintf(buf, buf_size,
  3164. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  3165. "BIT0 -- wlan fw recovery\n"
  3166. "BIT1 -- wlan pcss recovery\n"
  3167. "---------------------------------\n");
  3168. curr_len += buf_written;
  3169. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3170. "WLAN recovery %s[%d]\n",
  3171. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  3172. plat_priv->recovery_enabled);
  3173. curr_len += buf_written;
  3174. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3175. "WLAN PCSS recovery %s[%d]\n",
  3176. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  3177. plat_priv->recovery_pcss_enabled);
  3178. curr_len += buf_written;
  3179. /*
  3180. * Now size of curr_len is not over page size for sure,
  3181. * later if new item or none-fixed size item added, need
  3182. * add check to make sure curr_len is not over page size.
  3183. */
  3184. return curr_len;
  3185. }
  3186. static ssize_t time_sync_period_show(struct device *dev,
  3187. struct device_attribute *attr,
  3188. char *buf)
  3189. {
  3190. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3191. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  3192. plat_priv->ctrl_params.time_sync_period);
  3193. }
  3194. static ssize_t time_sync_period_store(struct device *dev,
  3195. struct device_attribute *attr,
  3196. const char *buf, size_t count)
  3197. {
  3198. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3199. unsigned int time_sync_period = 0;
  3200. if (!plat_priv)
  3201. return -ENODEV;
  3202. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  3203. cnss_pr_err("Invalid time sync sysfs command\n");
  3204. return -EINVAL;
  3205. }
  3206. if (time_sync_period >= CNSS_MIN_TIME_SYNC_PERIOD)
  3207. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3208. return count;
  3209. }
  3210. static ssize_t recovery_store(struct device *dev,
  3211. struct device_attribute *attr,
  3212. const char *buf, size_t count)
  3213. {
  3214. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3215. unsigned int recovery = 0;
  3216. if (!plat_priv)
  3217. return -ENODEV;
  3218. if (sscanf(buf, "%du", &recovery) != 1) {
  3219. cnss_pr_err("Invalid recovery sysfs command\n");
  3220. return -EINVAL;
  3221. }
  3222. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  3223. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  3224. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  3225. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  3226. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  3227. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  3228. cnss_send_subsys_restart_level_msg(plat_priv);
  3229. return count;
  3230. }
  3231. static ssize_t shutdown_store(struct device *dev,
  3232. struct device_attribute *attr,
  3233. const char *buf, size_t count)
  3234. {
  3235. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3236. if (plat_priv) {
  3237. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3238. del_timer(&plat_priv->fw_boot_timer);
  3239. complete_all(&plat_priv->power_up_complete);
  3240. complete_all(&plat_priv->cal_complete);
  3241. }
  3242. cnss_pr_dbg("Received shutdown notification\n");
  3243. return count;
  3244. }
  3245. static ssize_t fs_ready_store(struct device *dev,
  3246. struct device_attribute *attr,
  3247. const char *buf, size_t count)
  3248. {
  3249. int fs_ready = 0;
  3250. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3251. if (sscanf(buf, "%du", &fs_ready) != 1)
  3252. return -EINVAL;
  3253. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  3254. fs_ready, count);
  3255. if (!plat_priv) {
  3256. cnss_pr_err("plat_priv is NULL\n");
  3257. return count;
  3258. }
  3259. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  3260. cnss_pr_dbg("QMI is bypassed\n");
  3261. return count;
  3262. }
  3263. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  3264. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  3265. cnss_driver_event_post(plat_priv,
  3266. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3267. 0, NULL);
  3268. }
  3269. return count;
  3270. }
  3271. static ssize_t qdss_trace_start_store(struct device *dev,
  3272. struct device_attribute *attr,
  3273. const char *buf, size_t count)
  3274. {
  3275. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3276. wlfw_qdss_trace_start(plat_priv);
  3277. cnss_pr_dbg("Received QDSS start command\n");
  3278. return count;
  3279. }
  3280. static ssize_t qdss_trace_stop_store(struct device *dev,
  3281. struct device_attribute *attr,
  3282. const char *buf, size_t count)
  3283. {
  3284. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3285. u32 option = 0;
  3286. if (sscanf(buf, "%du", &option) != 1)
  3287. return -EINVAL;
  3288. wlfw_qdss_trace_stop(plat_priv, option);
  3289. cnss_pr_dbg("Received QDSS stop command\n");
  3290. return count;
  3291. }
  3292. static ssize_t qdss_conf_download_store(struct device *dev,
  3293. struct device_attribute *attr,
  3294. const char *buf, size_t count)
  3295. {
  3296. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3297. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  3298. cnss_pr_dbg("Received QDSS download config command\n");
  3299. return count;
  3300. }
  3301. static ssize_t hw_trace_override_store(struct device *dev,
  3302. struct device_attribute *attr,
  3303. const char *buf, size_t count)
  3304. {
  3305. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3306. int tmp = 0;
  3307. if (sscanf(buf, "%du", &tmp) != 1)
  3308. return -EINVAL;
  3309. plat_priv->hw_trc_override = tmp;
  3310. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3311. return count;
  3312. }
  3313. static ssize_t charger_mode_store(struct device *dev,
  3314. struct device_attribute *attr,
  3315. const char *buf, size_t count)
  3316. {
  3317. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3318. int tmp = 0;
  3319. if (sscanf(buf, "%du", &tmp) != 1)
  3320. return -EINVAL;
  3321. plat_priv->charger_mode = tmp;
  3322. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  3323. return count;
  3324. }
  3325. static DEVICE_ATTR_WO(fs_ready);
  3326. static DEVICE_ATTR_WO(shutdown);
  3327. static DEVICE_ATTR_RW(recovery);
  3328. static DEVICE_ATTR_WO(enable_hds);
  3329. static DEVICE_ATTR_WO(qdss_trace_start);
  3330. static DEVICE_ATTR_WO(qdss_trace_stop);
  3331. static DEVICE_ATTR_WO(qdss_conf_download);
  3332. static DEVICE_ATTR_WO(hw_trace_override);
  3333. static DEVICE_ATTR_WO(charger_mode);
  3334. static DEVICE_ATTR_RW(time_sync_period);
  3335. static struct attribute *cnss_attrs[] = {
  3336. &dev_attr_fs_ready.attr,
  3337. &dev_attr_shutdown.attr,
  3338. &dev_attr_recovery.attr,
  3339. &dev_attr_enable_hds.attr,
  3340. &dev_attr_qdss_trace_start.attr,
  3341. &dev_attr_qdss_trace_stop.attr,
  3342. &dev_attr_qdss_conf_download.attr,
  3343. &dev_attr_hw_trace_override.attr,
  3344. &dev_attr_charger_mode.attr,
  3345. &dev_attr_time_sync_period.attr,
  3346. NULL,
  3347. };
  3348. static struct attribute_group cnss_attr_group = {
  3349. .attrs = cnss_attrs,
  3350. };
  3351. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3352. {
  3353. struct device *dev = &plat_priv->plat_dev->dev;
  3354. int ret;
  3355. char cnss_name[CNSS_FS_NAME_SIZE];
  3356. char shutdown_name[32];
  3357. if (cnss_is_dual_wlan_enabled()) {
  3358. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3359. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3360. snprintf(shutdown_name, sizeof(shutdown_name),
  3361. "shutdown_wlan_%d", plat_priv->plat_idx);
  3362. } else {
  3363. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3364. snprintf(shutdown_name, sizeof(shutdown_name),
  3365. "shutdown_wlan");
  3366. }
  3367. ret = sysfs_create_link(kernel_kobj, &dev->kobj, cnss_name);
  3368. if (ret) {
  3369. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3370. ret);
  3371. goto out;
  3372. }
  3373. /* This is only for backward compatibility. */
  3374. ret = sysfs_create_link(kernel_kobj, &dev->kobj, shutdown_name);
  3375. if (ret) {
  3376. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3377. ret);
  3378. goto rm_cnss_link;
  3379. }
  3380. return 0;
  3381. rm_cnss_link:
  3382. sysfs_remove_link(kernel_kobj, cnss_name);
  3383. out:
  3384. return ret;
  3385. }
  3386. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3387. {
  3388. char cnss_name[CNSS_FS_NAME_SIZE];
  3389. char shutdown_name[32];
  3390. if (cnss_is_dual_wlan_enabled()) {
  3391. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3392. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3393. snprintf(shutdown_name, sizeof(shutdown_name),
  3394. "shutdown_wlan_%d", plat_priv->plat_idx);
  3395. } else {
  3396. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3397. snprintf(shutdown_name, sizeof(shutdown_name),
  3398. "shutdown_wlan");
  3399. }
  3400. sysfs_remove_link(kernel_kobj, shutdown_name);
  3401. sysfs_remove_link(kernel_kobj, cnss_name);
  3402. }
  3403. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3404. {
  3405. int ret = 0;
  3406. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3407. &cnss_attr_group);
  3408. if (ret) {
  3409. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3410. ret);
  3411. goto out;
  3412. }
  3413. cnss_create_sysfs_link(plat_priv);
  3414. return 0;
  3415. out:
  3416. return ret;
  3417. }
  3418. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3419. {
  3420. cnss_remove_sysfs_link(plat_priv);
  3421. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3422. }
  3423. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3424. {
  3425. spin_lock_init(&plat_priv->event_lock);
  3426. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3427. WQ_UNBOUND, 1);
  3428. if (!plat_priv->event_wq) {
  3429. cnss_pr_err("Failed to create event workqueue!\n");
  3430. return -EFAULT;
  3431. }
  3432. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3433. INIT_LIST_HEAD(&plat_priv->event_list);
  3434. return 0;
  3435. }
  3436. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3437. {
  3438. destroy_workqueue(plat_priv->event_wq);
  3439. }
  3440. static int cnss_reboot_notifier(struct notifier_block *nb,
  3441. unsigned long action,
  3442. void *data)
  3443. {
  3444. struct cnss_plat_data *plat_priv =
  3445. container_of(nb, struct cnss_plat_data, reboot_nb);
  3446. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3447. del_timer(&plat_priv->fw_boot_timer);
  3448. complete_all(&plat_priv->power_up_complete);
  3449. complete_all(&plat_priv->cal_complete);
  3450. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3451. return NOTIFY_DONE;
  3452. }
  3453. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3454. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3455. {
  3456. struct Object client_env;
  3457. struct Object app_object;
  3458. u32 wifi_uid = HW_WIFI_UID;
  3459. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3460. int ret;
  3461. u8 state = 0;
  3462. /* Once this flag is set, secure peripheral feature
  3463. * will not be supported till next reboot
  3464. */
  3465. if (plat_priv->sec_peri_feature_disable)
  3466. return 0;
  3467. /* get rootObj */
  3468. ret = get_client_env_object(&client_env);
  3469. if (ret) {
  3470. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3471. goto end;
  3472. }
  3473. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3474. if (ret) {
  3475. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3476. if (ret == FEATURE_NOT_SUPPORTED) {
  3477. ret = 0; /* Do not Assert */
  3478. plat_priv->sec_peri_feature_disable = true;
  3479. cnss_pr_dbg("Secure HW feature not supported\n");
  3480. }
  3481. goto exit_release_clientenv;
  3482. }
  3483. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3484. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3485. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3486. ObjectCounts_pack(1, 1, 0, 0));
  3487. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3488. if (ret) {
  3489. if (ret == PERIPHERAL_NOT_FOUND) {
  3490. ret = 0; /* Do not Assert */
  3491. plat_priv->sec_peri_feature_disable = true;
  3492. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3493. }
  3494. goto exit_release_app_obj;
  3495. }
  3496. if (state == 1)
  3497. set_bit(CNSS_WLAN_HW_DISABLED,
  3498. &plat_priv->driver_state);
  3499. else
  3500. clear_bit(CNSS_WLAN_HW_DISABLED,
  3501. &plat_priv->driver_state);
  3502. exit_release_app_obj:
  3503. Object_release(app_object);
  3504. exit_release_clientenv:
  3505. Object_release(client_env);
  3506. end:
  3507. if (ret) {
  3508. cnss_pr_err("Unable to get HW disable status\n");
  3509. CNSS_ASSERT(0);
  3510. }
  3511. return ret;
  3512. }
  3513. #else
  3514. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3515. {
  3516. return 0;
  3517. }
  3518. #endif
  3519. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3520. {
  3521. int ret;
  3522. ret = cnss_init_sol_gpio(plat_priv);
  3523. if (ret)
  3524. return ret;
  3525. timer_setup(&plat_priv->fw_boot_timer,
  3526. cnss_bus_fw_boot_timeout_hdlr, 0);
  3527. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3528. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3529. if (ret)
  3530. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3531. ret);
  3532. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3533. if (ret)
  3534. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3535. ret);
  3536. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3537. init_completion(&plat_priv->power_up_complete);
  3538. init_completion(&plat_priv->cal_complete);
  3539. init_completion(&plat_priv->rddm_complete);
  3540. init_completion(&plat_priv->recovery_complete);
  3541. init_completion(&plat_priv->daemon_connected);
  3542. mutex_init(&plat_priv->dev_lock);
  3543. mutex_init(&plat_priv->driver_ops_lock);
  3544. plat_priv->recovery_ws =
  3545. wakeup_source_register(&plat_priv->plat_dev->dev,
  3546. "CNSS_FW_RECOVERY");
  3547. if (!plat_priv->recovery_ws)
  3548. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3549. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3550. cnss_daemon_connection_update_cb,
  3551. plat_priv);
  3552. if (ret)
  3553. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3554. ret);
  3555. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3556. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3557. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3558. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3559. "qcom,rc-ep-short-channel"))
  3560. cnss_set_feature_list(plat_priv, CNSS_RC_EP_ULTRASHORT_CHANNEL_V01);
  3561. return 0;
  3562. }
  3563. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3564. {
  3565. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3566. plat_priv);
  3567. complete_all(&plat_priv->recovery_complete);
  3568. complete_all(&plat_priv->rddm_complete);
  3569. complete_all(&plat_priv->cal_complete);
  3570. complete_all(&plat_priv->power_up_complete);
  3571. complete_all(&plat_priv->daemon_connected);
  3572. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3573. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3574. del_timer(&plat_priv->fw_boot_timer);
  3575. wakeup_source_unregister(plat_priv->recovery_ws);
  3576. cnss_deinit_sol_gpio(plat_priv);
  3577. kfree(plat_priv->sram_dump);
  3578. }
  3579. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  3580. {
  3581. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  3582. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  3583. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3584. "qcom,wlan-cbc-enabled");
  3585. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  3586. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  3587. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  3588. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  3589. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3590. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  3591. * enabled by default
  3592. */
  3593. plat_priv->adsp_pc_enabled = true;
  3594. }
  3595. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  3596. {
  3597. struct device *dev = &plat_priv->plat_dev->dev;
  3598. plat_priv->use_pm_domain =
  3599. of_property_read_bool(dev->of_node, "use-pm-domain");
  3600. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  3601. }
  3602. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  3603. {
  3604. struct device *dev = &plat_priv->plat_dev->dev;
  3605. plat_priv->set_wlaon_pwr_ctrl =
  3606. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  3607. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  3608. plat_priv->set_wlaon_pwr_ctrl);
  3609. }
  3610. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  3611. {
  3612. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3613. "qcom,converged-dt") ||
  3614. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3615. "qcom,same-dt-multi-dev") ||
  3616. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3617. "qcom,multi-wlan-exchg"));
  3618. }
  3619. static const struct platform_device_id cnss_platform_id_table[] = {
  3620. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  3621. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  3622. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  3623. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  3624. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  3625. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  3626. { .name = "peach", .driver_data = PEACH_DEVICE_ID, },
  3627. { .name = "qcaconv", .driver_data = 0, },
  3628. { },
  3629. };
  3630. static const struct of_device_id cnss_of_match_table[] = {
  3631. {
  3632. .compatible = "qcom,cnss",
  3633. .data = (void *)&cnss_platform_id_table[0]},
  3634. {
  3635. .compatible = "qcom,cnss-qca6290",
  3636. .data = (void *)&cnss_platform_id_table[1]},
  3637. {
  3638. .compatible = "qcom,cnss-qca6390",
  3639. .data = (void *)&cnss_platform_id_table[2]},
  3640. {
  3641. .compatible = "qcom,cnss-qca6490",
  3642. .data = (void *)&cnss_platform_id_table[3]},
  3643. {
  3644. .compatible = "qcom,cnss-kiwi",
  3645. .data = (void *)&cnss_platform_id_table[4]},
  3646. {
  3647. .compatible = "qcom,cnss-mango",
  3648. .data = (void *)&cnss_platform_id_table[5]},
  3649. {
  3650. .compatible = "qcom,cnss-peach",
  3651. .data = (void *)&cnss_platform_id_table[6]},
  3652. {
  3653. .compatible = "qcom,cnss-qca-converged",
  3654. .data = (void *)&cnss_platform_id_table[7]},
  3655. { },
  3656. };
  3657. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  3658. static inline bool
  3659. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  3660. {
  3661. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3662. "use-nv-mac");
  3663. }
  3664. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  3665. {
  3666. struct device_node *child;
  3667. u32 id, i;
  3668. int id_n, device_identifier_gpio, ret;
  3669. u8 gpio_value;
  3670. if (plat_priv->dt_type != CNSS_DTT_CONVERGED)
  3671. return 0;
  3672. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  3673. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  3674. if (ret) {
  3675. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  3676. return ret;
  3677. }
  3678. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  3679. gpio_value = gpio_get_value(device_identifier_gpio);
  3680. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  3681. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  3682. child) {
  3683. if (strcmp(child->name, "chip_cfg"))
  3684. continue;
  3685. id_n = of_property_count_u32_elems(child, "supported-ids");
  3686. if (id_n <= 0) {
  3687. cnss_pr_err("Device id is NOT set\n");
  3688. return -EINVAL;
  3689. }
  3690. for (i = 0; i < id_n; i++) {
  3691. ret = of_property_read_u32_index(child,
  3692. "supported-ids",
  3693. i, &id);
  3694. if (ret) {
  3695. cnss_pr_err("Failed to read supported ids\n");
  3696. return -EINVAL;
  3697. }
  3698. if (gpio_value && id == QCA6490_DEVICE_ID) {
  3699. plat_priv->plat_dev->dev.of_node = child;
  3700. plat_priv->device_id = QCA6490_DEVICE_ID;
  3701. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  3702. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3703. child->name, i, id);
  3704. return 0;
  3705. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  3706. plat_priv->plat_dev->dev.of_node = child;
  3707. plat_priv->device_id = KIWI_DEVICE_ID;
  3708. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  3709. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3710. child->name, i, id);
  3711. return 0;
  3712. }
  3713. }
  3714. }
  3715. return -EINVAL;
  3716. }
  3717. static inline u32
  3718. cnss_dt_type(struct cnss_plat_data *plat_priv)
  3719. {
  3720. bool is_converged_dt = of_property_read_bool(
  3721. plat_priv->plat_dev->dev.of_node, "qcom,converged-dt");
  3722. bool is_multi_wlan_xchg;
  3723. if (is_converged_dt)
  3724. return CNSS_DTT_CONVERGED;
  3725. is_multi_wlan_xchg = of_property_read_bool(
  3726. plat_priv->plat_dev->dev.of_node, "qcom,multi-wlan-exchg");
  3727. if (is_multi_wlan_xchg)
  3728. return CNSS_DTT_MULTIEXCHG;
  3729. return CNSS_DTT_LEGACY;
  3730. }
  3731. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  3732. {
  3733. int ret = 0;
  3734. int retry = 0;
  3735. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  3736. return 0;
  3737. retry:
  3738. ret = cnss_power_on_device(plat_priv, true);
  3739. if (ret)
  3740. goto end;
  3741. ret = cnss_bus_init(plat_priv);
  3742. if (ret) {
  3743. if ((ret != -EPROBE_DEFER) &&
  3744. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  3745. cnss_power_off_device(plat_priv);
  3746. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  3747. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  3748. goto retry;
  3749. }
  3750. goto power_off;
  3751. }
  3752. return 0;
  3753. power_off:
  3754. cnss_power_off_device(plat_priv);
  3755. end:
  3756. return ret;
  3757. }
  3758. int cnss_wlan_hw_enable(void)
  3759. {
  3760. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3761. int ret = 0;
  3762. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  3763. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  3764. goto register_driver;
  3765. ret = cnss_wlan_device_init(plat_priv);
  3766. if (ret) {
  3767. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state))
  3768. CNSS_ASSERT(0);
  3769. return ret;
  3770. }
  3771. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  3772. cnss_driver_event_post(plat_priv,
  3773. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3774. 0, NULL);
  3775. register_driver:
  3776. if (plat_priv->driver_ops)
  3777. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  3778. return ret;
  3779. }
  3780. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  3781. int cnss_set_wfc_mode(struct device *dev, struct cnss_wfc_cfg cfg)
  3782. {
  3783. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3784. int ret = 0;
  3785. if (!plat_priv)
  3786. return -ENODEV;
  3787. /* If IMS server is connected, return success without QMI send */
  3788. if (test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  3789. cnss_pr_dbg("Ignore host request as IMS server is connected");
  3790. return ret;
  3791. }
  3792. ret = cnss_wlfw_send_host_wfc_call_status(plat_priv, cfg);
  3793. return ret;
  3794. }
  3795. EXPORT_SYMBOL(cnss_set_wfc_mode);
  3796. static int cnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  3797. unsigned long *thermal_state)
  3798. {
  3799. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3800. if (!tcdev || !tcdev->devdata) {
  3801. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  3802. return -EINVAL;
  3803. }
  3804. cnss_tcdev = tcdev->devdata;
  3805. *thermal_state = cnss_tcdev->max_thermal_state;
  3806. return 0;
  3807. }
  3808. static int cnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  3809. unsigned long *thermal_state)
  3810. {
  3811. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3812. if (!tcdev || !tcdev->devdata) {
  3813. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  3814. return -EINVAL;
  3815. }
  3816. cnss_tcdev = tcdev->devdata;
  3817. *thermal_state = cnss_tcdev->curr_thermal_state;
  3818. return 0;
  3819. }
  3820. static int cnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  3821. unsigned long thermal_state)
  3822. {
  3823. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3824. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3825. int ret = 0;
  3826. if (!tcdev || !tcdev->devdata) {
  3827. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  3828. return -EINVAL;
  3829. }
  3830. cnss_tcdev = tcdev->devdata;
  3831. if (thermal_state > cnss_tcdev->max_thermal_state)
  3832. return -EINVAL;
  3833. cnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  3834. thermal_state, cnss_tcdev->tcdev_id);
  3835. mutex_lock(&plat_priv->tcdev_lock);
  3836. ret = cnss_bus_set_therm_cdev_state(plat_priv,
  3837. thermal_state,
  3838. cnss_tcdev->tcdev_id);
  3839. if (!ret)
  3840. cnss_tcdev->curr_thermal_state = thermal_state;
  3841. mutex_unlock(&plat_priv->tcdev_lock);
  3842. if (ret) {
  3843. cnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  3844. ret, cnss_tcdev->tcdev_id);
  3845. return ret;
  3846. }
  3847. return 0;
  3848. }
  3849. static struct thermal_cooling_device_ops cnss_cooling_ops = {
  3850. .get_max_state = cnss_tcdev_get_max_state,
  3851. .get_cur_state = cnss_tcdev_get_cur_state,
  3852. .set_cur_state = cnss_tcdev_set_cur_state,
  3853. };
  3854. int cnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  3855. int tcdev_id)
  3856. {
  3857. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  3858. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3859. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  3860. struct device_node *dev_node;
  3861. int ret = 0;
  3862. if (!priv) {
  3863. cnss_pr_err("Platform driver is not initialized!\n");
  3864. return -ENODEV;
  3865. }
  3866. cnss_tcdev = kzalloc(sizeof(*cnss_tcdev), GFP_KERNEL);
  3867. if (!cnss_tcdev) {
  3868. cnss_pr_err("Failed to allocate cnss_tcdev object!\n");
  3869. return -ENOMEM;
  3870. }
  3871. cnss_tcdev->tcdev_id = tcdev_id;
  3872. cnss_tcdev->max_thermal_state = max_state;
  3873. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  3874. "qcom,cnss_cdev%d", tcdev_id);
  3875. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  3876. if (!dev_node) {
  3877. cnss_pr_err("Failed to get cooling device node\n");
  3878. kfree(cnss_tcdev);
  3879. return -EINVAL;
  3880. }
  3881. cnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  3882. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  3883. cnss_tcdev->tcdev = thermal_of_cooling_device_register(dev_node,
  3884. cdev_node_name,
  3885. cnss_tcdev,
  3886. &cnss_cooling_ops);
  3887. if (IS_ERR_OR_NULL(cnss_tcdev->tcdev)) {
  3888. ret = PTR_ERR(cnss_tcdev->tcdev);
  3889. cnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  3890. ret, cnss_tcdev->tcdev_id);
  3891. kfree(cnss_tcdev);
  3892. } else {
  3893. cnss_pr_dbg("Cooling device registered for cdev id %d",
  3894. cnss_tcdev->tcdev_id);
  3895. mutex_lock(&priv->tcdev_lock);
  3896. list_add(&cnss_tcdev->tcdev_list,
  3897. &priv->cnss_tcdev_list);
  3898. mutex_unlock(&priv->tcdev_lock);
  3899. }
  3900. } else {
  3901. cnss_pr_dbg("Cooling device registration not supported");
  3902. kfree(cnss_tcdev);
  3903. ret = -EOPNOTSUPP;
  3904. }
  3905. return ret;
  3906. }
  3907. EXPORT_SYMBOL(cnss_thermal_cdev_register);
  3908. void cnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  3909. {
  3910. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  3911. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3912. if (!priv) {
  3913. cnss_pr_err("Platform driver is not initialized!\n");
  3914. return;
  3915. }
  3916. mutex_lock(&priv->tcdev_lock);
  3917. while (!list_empty(&priv->cnss_tcdev_list)) {
  3918. cnss_tcdev = list_first_entry(&priv->cnss_tcdev_list,
  3919. struct cnss_thermal_cdev,
  3920. tcdev_list);
  3921. thermal_cooling_device_unregister(cnss_tcdev->tcdev);
  3922. list_del(&cnss_tcdev->tcdev_list);
  3923. kfree(cnss_tcdev);
  3924. }
  3925. mutex_unlock(&priv->tcdev_lock);
  3926. }
  3927. EXPORT_SYMBOL(cnss_thermal_cdev_unregister);
  3928. int cnss_get_curr_therm_cdev_state(struct device *dev,
  3929. unsigned long *thermal_state,
  3930. int tcdev_id)
  3931. {
  3932. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  3933. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3934. if (!priv) {
  3935. cnss_pr_err("Platform driver is not initialized!\n");
  3936. return -ENODEV;
  3937. }
  3938. mutex_lock(&priv->tcdev_lock);
  3939. list_for_each_entry(cnss_tcdev, &priv->cnss_tcdev_list, tcdev_list) {
  3940. if (cnss_tcdev->tcdev_id != tcdev_id)
  3941. continue;
  3942. *thermal_state = cnss_tcdev->curr_thermal_state;
  3943. mutex_unlock(&priv->tcdev_lock);
  3944. cnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  3945. cnss_tcdev->curr_thermal_state, tcdev_id);
  3946. return 0;
  3947. }
  3948. mutex_unlock(&priv->tcdev_lock);
  3949. cnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  3950. return -EINVAL;
  3951. }
  3952. EXPORT_SYMBOL(cnss_get_curr_therm_cdev_state);
  3953. static int cnss_probe(struct platform_device *plat_dev)
  3954. {
  3955. int ret = 0;
  3956. struct cnss_plat_data *plat_priv;
  3957. const struct of_device_id *of_id;
  3958. const struct platform_device_id *device_id;
  3959. if (cnss_get_plat_priv(plat_dev)) {
  3960. cnss_pr_err("Driver is already initialized!\n");
  3961. ret = -EEXIST;
  3962. goto out;
  3963. }
  3964. ret = cnss_plat_env_available();
  3965. if (ret)
  3966. goto out;
  3967. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  3968. if (!of_id || !of_id->data) {
  3969. cnss_pr_err("Failed to find of match device!\n");
  3970. ret = -ENODEV;
  3971. goto out;
  3972. }
  3973. device_id = of_id->data;
  3974. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  3975. GFP_KERNEL);
  3976. if (!plat_priv) {
  3977. ret = -ENOMEM;
  3978. goto out;
  3979. }
  3980. plat_priv->plat_dev = plat_dev;
  3981. plat_priv->dev_node = NULL;
  3982. plat_priv->device_id = device_id->driver_data;
  3983. plat_priv->dt_type = cnss_dt_type(plat_priv);
  3984. cnss_pr_dbg("Probing platform driver from dt type: %d\n",
  3985. plat_priv->dt_type);
  3986. plat_priv->use_fw_path_with_prefix =
  3987. cnss_use_fw_path_with_prefix(plat_priv);
  3988. ret = cnss_get_dev_cfg_node(plat_priv);
  3989. if (ret) {
  3990. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  3991. goto reset_plat_dev;
  3992. }
  3993. ret = cnss_get_pld_bus_ops_name(plat_priv);
  3994. if (ret)
  3995. cnss_pr_err("Failed to find bus ops name, err = %d\n",
  3996. ret);
  3997. ret = cnss_get_rc_num(plat_priv);
  3998. if (ret)
  3999. cnss_pr_err("Failed to find PCIe RC number, err = %d\n", ret);
  4000. cnss_pr_dbg("rc_num=%d\n", plat_priv->rc_num);
  4001. plat_priv->bus_type = cnss_get_bus_type(plat_priv);
  4002. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  4003. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  4004. cnss_set_plat_priv(plat_dev, plat_priv);
  4005. cnss_set_device_name(plat_priv);
  4006. platform_set_drvdata(plat_dev, plat_priv);
  4007. INIT_LIST_HEAD(&plat_priv->vreg_list);
  4008. INIT_LIST_HEAD(&plat_priv->clk_list);
  4009. cnss_get_pm_domain_info(plat_priv);
  4010. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  4011. cnss_power_misc_params_init(plat_priv);
  4012. cnss_get_tcs_info(plat_priv);
  4013. cnss_get_cpr_info(plat_priv);
  4014. cnss_aop_mbox_init(plat_priv);
  4015. cnss_init_control_params(plat_priv);
  4016. ret = cnss_get_resources(plat_priv);
  4017. if (ret)
  4018. goto reset_ctx;
  4019. ret = cnss_register_esoc(plat_priv);
  4020. if (ret)
  4021. goto free_res;
  4022. ret = cnss_register_bus_scale(plat_priv);
  4023. if (ret)
  4024. goto unreg_esoc;
  4025. ret = cnss_create_sysfs(plat_priv);
  4026. if (ret)
  4027. goto unreg_bus_scale;
  4028. ret = cnss_event_work_init(plat_priv);
  4029. if (ret)
  4030. goto remove_sysfs;
  4031. ret = cnss_dms_init(plat_priv);
  4032. if (ret)
  4033. goto deinit_event_work;
  4034. ret = cnss_debugfs_create(plat_priv);
  4035. if (ret)
  4036. goto deinit_dms;
  4037. ret = cnss_misc_init(plat_priv);
  4038. if (ret)
  4039. goto destroy_debugfs;
  4040. ret = cnss_wlan_hw_disable_check(plat_priv);
  4041. if (ret)
  4042. goto deinit_misc;
  4043. /* Make sure all platform related init are done before
  4044. * device power on and bus init.
  4045. */
  4046. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  4047. ret = cnss_wlan_device_init(plat_priv);
  4048. if (ret)
  4049. goto deinit_misc;
  4050. } else {
  4051. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  4052. }
  4053. cnss_register_coex_service(plat_priv);
  4054. cnss_register_ims_service(plat_priv);
  4055. mutex_init(&plat_priv->tcdev_lock);
  4056. INIT_LIST_HEAD(&plat_priv->cnss_tcdev_list);
  4057. cnss_pr_info("Platform driver probed successfully.\n");
  4058. return 0;
  4059. deinit_misc:
  4060. cnss_misc_deinit(plat_priv);
  4061. destroy_debugfs:
  4062. cnss_debugfs_destroy(plat_priv);
  4063. deinit_dms:
  4064. cnss_dms_deinit(plat_priv);
  4065. deinit_event_work:
  4066. cnss_event_work_deinit(plat_priv);
  4067. remove_sysfs:
  4068. cnss_remove_sysfs(plat_priv);
  4069. unreg_bus_scale:
  4070. cnss_unregister_bus_scale(plat_priv);
  4071. unreg_esoc:
  4072. cnss_unregister_esoc(plat_priv);
  4073. free_res:
  4074. cnss_put_resources(plat_priv);
  4075. reset_ctx:
  4076. platform_set_drvdata(plat_dev, NULL);
  4077. reset_plat_dev:
  4078. cnss_clear_plat_priv(plat_priv);
  4079. out:
  4080. return ret;
  4081. }
  4082. static int cnss_remove(struct platform_device *plat_dev)
  4083. {
  4084. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  4085. plat_priv->audio_iommu_domain = NULL;
  4086. cnss_genl_exit();
  4087. cnss_unregister_ims_service(plat_priv);
  4088. cnss_unregister_coex_service(plat_priv);
  4089. cnss_bus_deinit(plat_priv);
  4090. cnss_misc_deinit(plat_priv);
  4091. cnss_debugfs_destroy(plat_priv);
  4092. cnss_dms_deinit(plat_priv);
  4093. cnss_qmi_deinit(plat_priv);
  4094. cnss_event_work_deinit(plat_priv);
  4095. cnss_cancel_dms_work();
  4096. cnss_remove_sysfs(plat_priv);
  4097. cnss_unregister_bus_scale(plat_priv);
  4098. cnss_unregister_esoc(plat_priv);
  4099. cnss_put_resources(plat_priv);
  4100. if (!IS_ERR_OR_NULL(plat_priv->mbox_chan))
  4101. mbox_free_channel(plat_priv->mbox_chan);
  4102. platform_set_drvdata(plat_dev, NULL);
  4103. cnss_clear_plat_priv(plat_priv);
  4104. return 0;
  4105. }
  4106. static struct platform_driver cnss_platform_driver = {
  4107. .probe = cnss_probe,
  4108. .remove = cnss_remove,
  4109. .driver = {
  4110. .name = "cnss2",
  4111. .of_match_table = cnss_of_match_table,
  4112. #ifdef CONFIG_CNSS_ASYNC
  4113. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4114. #endif
  4115. },
  4116. };
  4117. static bool cnss_check_compatible_node(void)
  4118. {
  4119. struct device_node *dn = NULL;
  4120. for_each_matching_node(dn, cnss_of_match_table) {
  4121. if (of_device_is_available(dn)) {
  4122. cnss_allow_driver_loading = true;
  4123. return true;
  4124. }
  4125. }
  4126. return false;
  4127. }
  4128. /**
  4129. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  4130. *
  4131. * Valid device tree node means a node with "compatible" property from the
  4132. * device match table and "status" property is not disabled.
  4133. *
  4134. * Return: true if valid device tree node found, false if not found
  4135. */
  4136. static bool cnss_is_valid_dt_node_found(void)
  4137. {
  4138. struct device_node *dn = NULL;
  4139. for_each_matching_node(dn, cnss_of_match_table) {
  4140. if (of_device_is_available(dn))
  4141. break;
  4142. }
  4143. if (dn)
  4144. return true;
  4145. return false;
  4146. }
  4147. static int __init cnss_initialize(void)
  4148. {
  4149. int ret = 0;
  4150. if (!cnss_is_valid_dt_node_found())
  4151. return -ENODEV;
  4152. if (!cnss_check_compatible_node())
  4153. return ret;
  4154. cnss_debug_init();
  4155. ret = platform_driver_register(&cnss_platform_driver);
  4156. if (ret)
  4157. cnss_debug_deinit();
  4158. ret = cnss_genl_init();
  4159. if (ret < 0)
  4160. cnss_pr_err("CNSS genl init failed %d\n", ret);
  4161. return ret;
  4162. }
  4163. static void __exit cnss_exit(void)
  4164. {
  4165. cnss_genl_exit();
  4166. platform_driver_unregister(&cnss_platform_driver);
  4167. cnss_debug_deinit();
  4168. }
  4169. module_init(cnss_initialize);
  4170. module_exit(cnss_exit);
  4171. MODULE_LICENSE("GPL v2");
  4172. MODULE_DESCRIPTION("CNSS2 Platform Driver");