main.c 143 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/thermal.h>
  20. #include <linux/version.h>
  21. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  22. #include <linux/panic_notifier.h>
  23. #endif
  24. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  25. #include <soc/qcom/minidump.h>
  26. #endif
  27. #include "cnss_plat_ipc_qmi.h"
  28. #include "cnss_utils.h"
  29. #include "main.h"
  30. #include "bus.h"
  31. #include "debug.h"
  32. #include "genl.h"
  33. #include "reg.h"
  34. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  35. #ifdef CONFIG_CNSS_HW_SECURE_SMEM
  36. #include <linux/soc/qcom/smem.h>
  37. #define PERISEC_SMEM_ID 651
  38. #define HW_WIFI_UID 0x508
  39. #else
  40. #include "smcinvoke.h"
  41. #include "smcinvoke_object.h"
  42. #include "IClientEnv.h"
  43. #define HW_STATE_UID 0x108
  44. #define HW_OP_GET_STATE 1
  45. #define HW_WIFI_UID 0x508
  46. #define FEATURE_NOT_SUPPORTED 12
  47. #define PERIPHERAL_NOT_FOUND 10
  48. #endif
  49. #endif
  50. #define CNSS_DUMP_FORMAT_VER 0x11
  51. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  52. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  53. #define CNSS_DUMP_NAME "CNSS_WLAN"
  54. #define CNSS_DUMP_DESC_SIZE 0x1000
  55. #define CNSS_DUMP_SEG_VER 0x1
  56. #define FILE_SYSTEM_READY 1
  57. #define FW_READY_TIMEOUT 20000
  58. #define FW_ASSERT_TIMEOUT 5000
  59. #define CNSS_EVENT_PENDING 2989
  60. #define POWER_RESET_MIN_DELAY_MS 100
  61. #define CNSS_QUIRKS_DEFAULT 0
  62. #ifdef CONFIG_CNSS_EMULATION
  63. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  64. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  65. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  66. #else
  67. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  68. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  69. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  70. #endif
  71. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  72. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  73. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  74. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  75. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  76. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  77. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  78. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  79. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  80. #define CNSS_TIME_SYNC_PERIOD_INVALID 0xFFFFFFFF
  81. enum cnss_cal_db_op {
  82. CNSS_CAL_DB_UPLOAD,
  83. CNSS_CAL_DB_DOWNLOAD,
  84. CNSS_CAL_DB_INVALID_OP,
  85. };
  86. enum cnss_recovery_type {
  87. CNSS_WLAN_RECOVERY = 0x1,
  88. CNSS_PCSS_RECOVERY = 0x2,
  89. };
  90. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  91. #define CNSS_MAX_DEV_NUM 2
  92. static struct cnss_plat_data *plat_env[CNSS_MAX_DEV_NUM];
  93. static int plat_env_count;
  94. #else
  95. static struct cnss_plat_data *plat_env;
  96. #endif
  97. static bool cnss_allow_driver_loading;
  98. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  99. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  100. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  101. };
  102. static struct cnss_fw_files FW_FILES_DEFAULT = {
  103. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  104. "utfbd.bin", "epping.bin", "evicted.bin"
  105. };
  106. struct cnss_driver_event {
  107. struct list_head list;
  108. enum cnss_driver_event_type type;
  109. bool sync;
  110. struct completion complete;
  111. int ret;
  112. void *data;
  113. };
  114. bool cnss_check_driver_loading_allowed(void)
  115. {
  116. return cnss_allow_driver_loading;
  117. }
  118. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  119. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  120. struct cnss_plat_data *plat_priv)
  121. {
  122. cnss_pr_dbg("Set plat_priv at %d", plat_env_count);
  123. if (plat_priv) {
  124. plat_priv->plat_idx = plat_env_count;
  125. plat_env[plat_priv->plat_idx] = plat_priv;
  126. plat_env_count++;
  127. }
  128. }
  129. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device
  130. *plat_dev)
  131. {
  132. int i;
  133. if (!plat_dev)
  134. return NULL;
  135. for (i = 0; i < plat_env_count; i++) {
  136. if (plat_env[i]->plat_dev == plat_dev)
  137. return plat_env[i];
  138. }
  139. return NULL;
  140. }
  141. struct cnss_plat_data *cnss_get_first_plat_priv(struct platform_device
  142. *plat_dev)
  143. {
  144. int i;
  145. if (!plat_dev) {
  146. for (i = 0; i < plat_env_count; i++) {
  147. if (plat_env[i])
  148. return plat_env[i];
  149. }
  150. }
  151. return NULL;
  152. }
  153. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  154. {
  155. cnss_pr_dbg("Clear plat_priv at %d", plat_priv->plat_idx);
  156. plat_env[plat_priv->plat_idx] = NULL;
  157. plat_env_count--;
  158. }
  159. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  160. {
  161. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  162. "wlan_%d", plat_priv->plat_idx);
  163. return 0;
  164. }
  165. static int cnss_plat_env_available(void)
  166. {
  167. int ret = 0;
  168. if (plat_env_count >= CNSS_MAX_DEV_NUM) {
  169. cnss_pr_err("ERROR: No space to store plat_priv\n");
  170. ret = -ENOMEM;
  171. }
  172. return ret;
  173. }
  174. int cnss_get_plat_env_count(void)
  175. {
  176. return plat_env_count;
  177. }
  178. struct cnss_plat_data *cnss_get_plat_env(int index)
  179. {
  180. return plat_env[index];
  181. }
  182. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  183. {
  184. int i;
  185. for (i = 0; i < plat_env_count; i++) {
  186. if (plat_env[i]->rc_num == rc_num)
  187. return plat_env[i];
  188. }
  189. return NULL;
  190. }
  191. static inline int
  192. cnss_get_qrtr_node_id(struct cnss_plat_data *plat_priv)
  193. {
  194. return of_property_read_u32(plat_priv->dev_node,
  195. "qcom,qrtr_node_id", &plat_priv->qrtr_node_id);
  196. }
  197. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  198. {
  199. int ret = 0;
  200. ret = cnss_get_qrtr_node_id(plat_priv);
  201. if (ret) {
  202. cnss_pr_warn("Failed to find qrtr_node_id err=%d\n", ret);
  203. plat_priv->qrtr_node_id = 0;
  204. plat_priv->wlfw_service_instance_id = 0;
  205. } else {
  206. plat_priv->wlfw_service_instance_id = plat_priv->qrtr_node_id +
  207. QRTR_NODE_FW_ID_BASE;
  208. cnss_pr_dbg("service_instance_id=0x%x\n",
  209. plat_priv->wlfw_service_instance_id);
  210. }
  211. }
  212. static inline int
  213. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  214. {
  215. return of_property_read_string(plat_priv->plat_dev->dev.of_node,
  216. "qcom,pld_bus_ops_name",
  217. &plat_priv->pld_bus_ops_name);
  218. }
  219. #else
  220. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  221. struct cnss_plat_data *plat_priv)
  222. {
  223. plat_env = plat_priv;
  224. }
  225. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  226. {
  227. return plat_env;
  228. }
  229. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  230. {
  231. plat_env = NULL;
  232. }
  233. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  234. {
  235. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  236. "wlan");
  237. return 0;
  238. }
  239. static int cnss_plat_env_available(void)
  240. {
  241. return 0;
  242. }
  243. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  244. {
  245. return cnss_bus_dev_to_plat_priv(NULL);
  246. }
  247. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  248. {
  249. }
  250. static int
  251. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  252. {
  253. return 0;
  254. }
  255. #endif
  256. void cnss_get_sleep_clk_supported(struct cnss_plat_data *plat_priv)
  257. {
  258. plat_priv->sleep_clk = of_property_read_bool(plat_priv->dev_node,
  259. "qcom,sleep-clk-support");
  260. cnss_pr_dbg("qcom,sleep-clk-support is %d\n",
  261. plat_priv->sleep_clk);
  262. }
  263. void cnss_get_bwscal_info(struct cnss_plat_data *plat_priv)
  264. {
  265. plat_priv->no_bwscale = of_property_read_bool(plat_priv->dev_node,
  266. "qcom,no-bwscale");
  267. }
  268. static inline int
  269. cnss_get_rc_num(struct cnss_plat_data *plat_priv)
  270. {
  271. return of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  272. "qcom,wlan-rc-num", &plat_priv->rc_num);
  273. }
  274. bool cnss_is_dual_wlan_enabled(void)
  275. {
  276. return IS_ENABLED(CONFIG_CNSS_SUPPORT_DUAL_DEV);
  277. }
  278. /**
  279. * cnss_get_mem_seg_count - Get segment count of memory
  280. * @type: memory type
  281. * @seg: segment count
  282. *
  283. * Return: 0 on success, negative value on failure
  284. */
  285. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  286. {
  287. struct cnss_plat_data *plat_priv;
  288. plat_priv = cnss_get_plat_priv(NULL);
  289. if (!plat_priv)
  290. return -ENODEV;
  291. switch (type) {
  292. case CNSS_REMOTE_MEM_TYPE_FW:
  293. *seg = plat_priv->fw_mem_seg_len;
  294. break;
  295. case CNSS_REMOTE_MEM_TYPE_QDSS:
  296. *seg = plat_priv->qdss_mem_seg_len;
  297. break;
  298. default:
  299. return -EINVAL;
  300. }
  301. return 0;
  302. }
  303. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  304. /**
  305. * cnss_get_wifi_kobject -return wifi kobject
  306. * Return: Null, to maintain driver comnpatibilty
  307. */
  308. struct kobject *cnss_get_wifi_kobj(struct device *dev)
  309. {
  310. struct cnss_plat_data *plat_priv;
  311. plat_priv = cnss_get_plat_priv(NULL);
  312. if (!plat_priv)
  313. return NULL;
  314. return plat_priv->wifi_kobj;
  315. }
  316. EXPORT_SYMBOL(cnss_get_wifi_kobj);
  317. /**
  318. * cnss_get_mem_segment_info - Get memory info of different type
  319. * @type: memory type
  320. * @segment: array to save the segment info
  321. * @seg: segment count
  322. *
  323. * Return: 0 on success, negative value on failure
  324. */
  325. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  326. struct cnss_mem_segment segment[],
  327. u32 segment_count)
  328. {
  329. struct cnss_plat_data *plat_priv;
  330. u32 i;
  331. plat_priv = cnss_get_plat_priv(NULL);
  332. if (!plat_priv)
  333. return -ENODEV;
  334. switch (type) {
  335. case CNSS_REMOTE_MEM_TYPE_FW:
  336. if (segment_count > plat_priv->fw_mem_seg_len)
  337. segment_count = plat_priv->fw_mem_seg_len;
  338. for (i = 0; i < segment_count; i++) {
  339. segment[i].size = plat_priv->fw_mem[i].size;
  340. segment[i].va = plat_priv->fw_mem[i].va;
  341. segment[i].pa = plat_priv->fw_mem[i].pa;
  342. }
  343. break;
  344. case CNSS_REMOTE_MEM_TYPE_QDSS:
  345. if (segment_count > plat_priv->qdss_mem_seg_len)
  346. segment_count = plat_priv->qdss_mem_seg_len;
  347. for (i = 0; i < segment_count; i++) {
  348. segment[i].size = plat_priv->qdss_mem[i].size;
  349. segment[i].va = plat_priv->qdss_mem[i].va;
  350. segment[i].pa = plat_priv->qdss_mem[i].pa;
  351. }
  352. break;
  353. default:
  354. return -EINVAL;
  355. }
  356. return 0;
  357. }
  358. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  359. static int cnss_get_audio_iommu_domain(struct cnss_plat_data *plat_priv)
  360. {
  361. struct device_node *audio_ion_node;
  362. struct platform_device *audio_ion_pdev;
  363. audio_ion_node = of_find_compatible_node(NULL, NULL,
  364. "qcom,msm-audio-ion");
  365. if (!audio_ion_node) {
  366. cnss_pr_err("Unable to get Audio ion node");
  367. return -EINVAL;
  368. }
  369. audio_ion_pdev = of_find_device_by_node(audio_ion_node);
  370. of_node_put(audio_ion_node);
  371. if (!audio_ion_pdev) {
  372. cnss_pr_err("Unable to get Audio ion platform device");
  373. return -EINVAL;
  374. }
  375. plat_priv->audio_iommu_domain =
  376. iommu_get_domain_for_dev(&audio_ion_pdev->dev);
  377. put_device(&audio_ion_pdev->dev);
  378. if (!plat_priv->audio_iommu_domain) {
  379. cnss_pr_err("Unable to get Audio ion iommu domain");
  380. return -EINVAL;
  381. }
  382. return 0;
  383. }
  384. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  385. enum cnss_feature_v01 feature)
  386. {
  387. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  388. return -EINVAL;
  389. plat_priv->feature_list |= 1 << feature;
  390. return 0;
  391. }
  392. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  393. enum cnss_feature_v01 feature)
  394. {
  395. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  396. return -EINVAL;
  397. plat_priv->feature_list &= ~(1 << feature);
  398. return 0;
  399. }
  400. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  401. u64 *feature_list)
  402. {
  403. if (unlikely(!plat_priv))
  404. return -EINVAL;
  405. *feature_list = plat_priv->feature_list;
  406. return 0;
  407. }
  408. size_t cnss_get_platform_name(struct cnss_plat_data *plat_priv,
  409. char *buf, const size_t buf_len)
  410. {
  411. if (unlikely(!plat_priv || !buf || !buf_len))
  412. return 0;
  413. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  414. "platform-name-required")) {
  415. struct device_node *root;
  416. root = of_find_node_by_path("/");
  417. if (root) {
  418. const char *model;
  419. size_t model_len;
  420. model = of_get_property(root, "model", NULL);
  421. if (model) {
  422. model_len = strlcpy(buf, model, buf_len);
  423. cnss_pr_dbg("Platform name: %s (%zu)\n",
  424. buf, model_len);
  425. return model_len;
  426. }
  427. }
  428. }
  429. return 0;
  430. }
  431. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  432. {
  433. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  434. return;
  435. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  436. plat_priv->driver_state,
  437. atomic_read(&plat_priv->pm_count));
  438. pm_stay_awake(&plat_priv->plat_dev->dev);
  439. }
  440. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  441. {
  442. int r = atomic_dec_return(&plat_priv->pm_count);
  443. WARN_ON(r < 0);
  444. if (r != 0)
  445. return;
  446. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  447. plat_priv->driver_state,
  448. atomic_read(&plat_priv->pm_count));
  449. pm_relax(&plat_priv->plat_dev->dev);
  450. }
  451. int cnss_get_fw_files_for_target(struct device *dev,
  452. struct cnss_fw_files *pfw_files,
  453. u32 target_type, u32 target_version)
  454. {
  455. if (!pfw_files)
  456. return -ENODEV;
  457. switch (target_version) {
  458. case QCA6174_REV3_VERSION:
  459. case QCA6174_REV3_2_VERSION:
  460. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  461. break;
  462. default:
  463. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  464. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  465. target_type, target_version);
  466. break;
  467. }
  468. return 0;
  469. }
  470. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  471. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  472. {
  473. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  474. if (!plat_priv)
  475. return -ENODEV;
  476. if (!cap)
  477. return -EINVAL;
  478. *cap = plat_priv->cap;
  479. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  480. return 0;
  481. }
  482. EXPORT_SYMBOL(cnss_get_platform_cap);
  483. /**
  484. * cnss_get_fw_cap - Check whether FW supports specific capability or not
  485. * @dev: Device
  486. * @fw_cap: FW Capability which needs to be checked
  487. *
  488. * Return: TRUE if supported, FALSE on failure or if not supported
  489. */
  490. bool cnss_get_fw_cap(struct device *dev, enum cnss_fw_caps fw_cap)
  491. {
  492. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  493. bool is_supported = false;
  494. if (!plat_priv)
  495. return is_supported;
  496. if (!plat_priv->fw_caps)
  497. return is_supported;
  498. switch (fw_cap) {
  499. case CNSS_FW_CAP_DIRECT_LINK_SUPPORT:
  500. is_supported = !!(plat_priv->fw_caps &
  501. QMI_WLFW_DIRECT_LINK_SUPPORT_V01);
  502. if (is_supported && cnss_get_audio_iommu_domain(plat_priv))
  503. is_supported = false;
  504. break;
  505. default:
  506. cnss_pr_err("Invalid FW Capability: 0x%x\n", fw_cap);
  507. }
  508. cnss_pr_dbg("FW Capability 0x%x is %s\n", fw_cap,
  509. is_supported ? "supported" : "not supported");
  510. return is_supported;
  511. }
  512. EXPORT_SYMBOL(cnss_get_fw_cap);
  513. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  514. {
  515. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  516. if (!plat_priv)
  517. return;
  518. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  519. }
  520. EXPORT_SYMBOL(cnss_request_pm_qos);
  521. void cnss_remove_pm_qos(struct device *dev)
  522. {
  523. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  524. if (!plat_priv)
  525. return;
  526. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  527. }
  528. EXPORT_SYMBOL(cnss_remove_pm_qos);
  529. int cnss_wlan_enable(struct device *dev,
  530. struct cnss_wlan_enable_cfg *config,
  531. enum cnss_driver_mode mode,
  532. const char *host_version)
  533. {
  534. int ret = 0;
  535. struct cnss_plat_data *plat_priv;
  536. if (!dev) {
  537. cnss_pr_err("Invalid dev pointer\n");
  538. return -EINVAL;
  539. }
  540. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  541. if (!plat_priv)
  542. return -ENODEV;
  543. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  544. return 0;
  545. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  546. return 0;
  547. if (!config || !host_version) {
  548. cnss_pr_err("Invalid config or host_version pointer\n");
  549. return -EINVAL;
  550. }
  551. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  552. mode, config, host_version);
  553. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  554. goto skip_cfg;
  555. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  556. config->send_msi_ce = true;
  557. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  558. if (ret)
  559. goto out;
  560. skip_cfg:
  561. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  562. out:
  563. return ret;
  564. }
  565. EXPORT_SYMBOL(cnss_wlan_enable);
  566. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  567. {
  568. int ret = 0;
  569. struct cnss_plat_data *plat_priv;
  570. if (!dev) {
  571. cnss_pr_err("Invalid dev pointer\n");
  572. return -EINVAL;
  573. }
  574. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  575. if (!plat_priv)
  576. return -ENODEV;
  577. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  578. return 0;
  579. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  580. return 0;
  581. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  582. cnss_bus_free_qdss_mem(plat_priv);
  583. return ret;
  584. }
  585. EXPORT_SYMBOL(cnss_wlan_disable);
  586. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  587. int cnss_iommu_map(struct iommu_domain *domain,
  588. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  589. {
  590. return iommu_map(domain, iova, paddr, size, prot);
  591. }
  592. #else
  593. int cnss_iommu_map(struct iommu_domain *domain,
  594. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  595. {
  596. return iommu_map(domain, iova, paddr, size, prot, GFP_KERNEL);
  597. }
  598. #endif
  599. int cnss_audio_smmu_map(struct device *dev, phys_addr_t paddr,
  600. dma_addr_t iova, size_t size)
  601. {
  602. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  603. uint32_t page_offset;
  604. if (!plat_priv)
  605. return -ENODEV;
  606. if (!plat_priv->audio_iommu_domain)
  607. return -EINVAL;
  608. page_offset = iova & (PAGE_SIZE - 1);
  609. if (page_offset + size > PAGE_SIZE)
  610. size += PAGE_SIZE;
  611. iova -= page_offset;
  612. paddr -= page_offset;
  613. return cnss_iommu_map(plat_priv->audio_iommu_domain, iova, paddr,
  614. roundup(size, PAGE_SIZE), IOMMU_READ |
  615. IOMMU_WRITE | IOMMU_CACHE);
  616. }
  617. EXPORT_SYMBOL(cnss_audio_smmu_map);
  618. void cnss_audio_smmu_unmap(struct device *dev, dma_addr_t iova, size_t size)
  619. {
  620. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  621. uint32_t page_offset;
  622. if (!plat_priv)
  623. return;
  624. if (!plat_priv->audio_iommu_domain)
  625. return;
  626. page_offset = iova & (PAGE_SIZE - 1);
  627. if (page_offset + size > PAGE_SIZE)
  628. size += PAGE_SIZE;
  629. iova -= page_offset;
  630. iommu_unmap(plat_priv->audio_iommu_domain, iova,
  631. roundup(size, PAGE_SIZE));
  632. }
  633. EXPORT_SYMBOL(cnss_audio_smmu_unmap);
  634. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  635. u32 data_len, u8 *output)
  636. {
  637. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  638. int ret = 0;
  639. if (!plat_priv) {
  640. cnss_pr_err("plat_priv is NULL!\n");
  641. return -EINVAL;
  642. }
  643. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  644. return 0;
  645. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  646. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  647. plat_priv->driver_state);
  648. ret = -EINVAL;
  649. goto out;
  650. }
  651. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  652. data_len, output);
  653. out:
  654. return ret;
  655. }
  656. EXPORT_SYMBOL(cnss_athdiag_read);
  657. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  658. u32 data_len, u8 *input)
  659. {
  660. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  661. int ret = 0;
  662. if (!plat_priv) {
  663. cnss_pr_err("plat_priv is NULL!\n");
  664. return -EINVAL;
  665. }
  666. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  667. return 0;
  668. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  669. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  670. plat_priv->driver_state);
  671. ret = -EINVAL;
  672. goto out;
  673. }
  674. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  675. data_len, input);
  676. out:
  677. return ret;
  678. }
  679. EXPORT_SYMBOL(cnss_athdiag_write);
  680. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  681. {
  682. struct cnss_plat_data *plat_priv;
  683. if (!dev) {
  684. cnss_pr_err("Invalid dev pointer\n");
  685. return -EINVAL;
  686. }
  687. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  688. if (!plat_priv)
  689. return -ENODEV;
  690. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  691. return 0;
  692. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  693. }
  694. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  695. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  696. {
  697. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  698. if (!plat_priv)
  699. return -EINVAL;
  700. if (!plat_priv->fw_pcie_gen_switch) {
  701. cnss_pr_err("Firmware does not support PCIe gen switch\n");
  702. return -EOPNOTSUPP;
  703. }
  704. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  705. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  706. return -EINVAL;
  707. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  708. plat_priv->pcie_gen_speed = pcie_gen_speed;
  709. return 0;
  710. }
  711. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  712. static bool cnss_is_aux_support_enabled(struct cnss_plat_data *plat_priv)
  713. {
  714. switch (plat_priv->device_id) {
  715. case PEACH_DEVICE_ID:
  716. if (!plat_priv->fw_aux_uc_support) {
  717. cnss_pr_dbg("FW does not support aux uc capability\n");
  718. return false;
  719. }
  720. break;
  721. default:
  722. cnss_pr_dbg("Host does not support aux uc capability\n");
  723. return false;
  724. }
  725. return true;
  726. }
  727. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  728. {
  729. int ret = 0;
  730. if (!plat_priv)
  731. return -ENODEV;
  732. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  733. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  734. if (ret)
  735. goto out;
  736. cnss_bus_load_tme_patch(plat_priv);
  737. cnss_wlfw_tme_patch_dnld_send_sync(plat_priv,
  738. WLFW_TME_LITE_PATCH_FILE_V01);
  739. if (plat_priv->hds_enabled)
  740. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  741. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  742. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  743. plat_priv->ctrl_params.bdf_type = CNSS_BDF_BIN;
  744. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  745. plat_priv->ctrl_params.bdf_type);
  746. if (ret)
  747. goto out;
  748. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  749. return 0;
  750. ret = cnss_bus_load_m3(plat_priv);
  751. if (ret)
  752. goto out;
  753. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  754. if (ret)
  755. goto out;
  756. if (cnss_is_aux_support_enabled(plat_priv)) {
  757. ret = cnss_bus_load_aux(plat_priv);
  758. if (ret)
  759. goto out;
  760. ret = cnss_wlfw_aux_dnld_send_sync(plat_priv);
  761. if (ret)
  762. goto out;
  763. }
  764. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  765. return 0;
  766. out:
  767. return ret;
  768. }
  769. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  770. {
  771. int ret = 0;
  772. if (!plat_priv->antenna) {
  773. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  774. if (ret)
  775. goto out;
  776. }
  777. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  778. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  779. if (ret)
  780. goto out;
  781. }
  782. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  783. if (ret)
  784. goto out;
  785. return 0;
  786. out:
  787. return ret;
  788. }
  789. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  790. {
  791. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  792. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  793. }
  794. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  795. {
  796. u32 i;
  797. int ret = 0;
  798. struct cnss_plat_ipc_daemon_config *cfg;
  799. ret = cnss_qmi_get_dms_mac(plat_priv);
  800. if (ret == 0 && plat_priv->dms.mac_valid)
  801. goto qmi_send;
  802. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  803. * Thus assert on failure to get MAC from DMS even after retries
  804. */
  805. if (plat_priv->use_nv_mac) {
  806. /* Check if Daemon says platform support DMS MAC provisioning */
  807. cfg = cnss_plat_ipc_qmi_daemon_config();
  808. if (cfg) {
  809. if (!cfg->dms_mac_addr_supported) {
  810. cnss_pr_err("DMS MAC address not supported\n");
  811. CNSS_ASSERT(0);
  812. return -EINVAL;
  813. }
  814. }
  815. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  816. if (plat_priv->dms.mac_valid)
  817. break;
  818. ret = cnss_qmi_get_dms_mac(plat_priv);
  819. if (ret == 0)
  820. break;
  821. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  822. }
  823. if (!plat_priv->dms.mac_valid) {
  824. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  825. CNSS_ASSERT(0);
  826. return -EINVAL;
  827. }
  828. }
  829. qmi_send:
  830. if (plat_priv->dms.mac_valid)
  831. ret =
  832. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  833. ARRAY_SIZE(plat_priv->dms.mac));
  834. return ret;
  835. }
  836. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  837. enum cnss_cal_db_op op, u32 *size)
  838. {
  839. int ret = 0;
  840. u32 timeout = cnss_get_timeout(plat_priv,
  841. CNSS_TIMEOUT_DAEMON_CONNECTION);
  842. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  843. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  844. if (op >= CNSS_CAL_DB_INVALID_OP)
  845. return -EINVAL;
  846. if (!plat_priv->cbc_file_download) {
  847. cnss_pr_info("CAL DB file not required as per BDF\n");
  848. return 0;
  849. }
  850. if (*size == 0) {
  851. cnss_pr_err("Invalid cal file size\n");
  852. return -EINVAL;
  853. }
  854. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  855. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  856. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  857. msecs_to_jiffies(timeout));
  858. if (!ret) {
  859. cnss_pr_err("Daemon not yet connected\n");
  860. CNSS_ASSERT(0);
  861. return ret;
  862. }
  863. }
  864. if (!plat_priv->cal_mem->va) {
  865. cnss_pr_err("CAL DB Memory not setup for FW\n");
  866. return -EINVAL;
  867. }
  868. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  869. if (op == CNSS_CAL_DB_DOWNLOAD) {
  870. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  871. ret = cnss_plat_ipc_qmi_file_download(client_id,
  872. CNSS_CAL_DB_FILE_NAME,
  873. plat_priv->cal_mem->va,
  874. size);
  875. } else {
  876. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  877. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  878. CNSS_CAL_DB_FILE_NAME,
  879. plat_priv->cal_mem->va,
  880. *size);
  881. }
  882. if (ret)
  883. cnss_pr_err("Cal DB file %s %s failure\n",
  884. CNSS_CAL_DB_FILE_NAME,
  885. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  886. else
  887. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  888. CNSS_CAL_DB_FILE_NAME,
  889. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  890. *size);
  891. return ret;
  892. }
  893. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  894. {
  895. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  896. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  897. return -EINVAL;
  898. }
  899. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  900. &plat_priv->cal_file_size);
  901. }
  902. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  903. u32 *cal_file_size)
  904. {
  905. /* To download pass the total size of cal DB mem allocated.
  906. * After cal file is download to mem, its size is updated in
  907. * return pointer
  908. */
  909. *cal_file_size = plat_priv->cal_mem->size;
  910. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  911. cal_file_size);
  912. }
  913. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  914. {
  915. int ret = 0;
  916. u32 cal_file_size = 0;
  917. if (!plat_priv)
  918. return -ENODEV;
  919. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  920. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  921. return -EINVAL;
  922. }
  923. cnss_pr_dbg("Processing FW Init Done..\n");
  924. del_timer(&plat_priv->fw_boot_timer);
  925. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  926. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  927. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  928. cnss_send_subsys_restart_level_msg(plat_priv);
  929. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  930. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  931. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  932. }
  933. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  934. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  935. CNSS_WALTEST);
  936. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  937. cnss_request_antenna_sharing(plat_priv);
  938. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  939. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  940. plat_priv->cal_time = jiffies;
  941. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  942. CNSS_CALIBRATION);
  943. } else {
  944. ret = cnss_setup_dms_mac(plat_priv);
  945. ret = cnss_bus_call_driver_probe(plat_priv);
  946. }
  947. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  948. goto out;
  949. else if (ret)
  950. goto shutdown;
  951. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  952. return 0;
  953. shutdown:
  954. cnss_bus_dev_shutdown(plat_priv);
  955. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  956. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  957. out:
  958. return ret;
  959. }
  960. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  961. {
  962. switch (type) {
  963. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  964. return "SERVER_ARRIVE";
  965. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  966. return "SERVER_EXIT";
  967. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  968. return "REQUEST_MEM";
  969. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  970. return "FW_MEM_READY";
  971. case CNSS_DRIVER_EVENT_FW_READY:
  972. return "FW_READY";
  973. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  974. return "COLD_BOOT_CAL_START";
  975. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  976. return "COLD_BOOT_CAL_DONE";
  977. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  978. return "REGISTER_DRIVER";
  979. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  980. return "UNREGISTER_DRIVER";
  981. case CNSS_DRIVER_EVENT_RECOVERY:
  982. return "RECOVERY";
  983. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  984. return "FORCE_FW_ASSERT";
  985. case CNSS_DRIVER_EVENT_POWER_UP:
  986. return "POWER_UP";
  987. case CNSS_DRIVER_EVENT_POWER_DOWN:
  988. return "POWER_DOWN";
  989. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  990. return "IDLE_RESTART";
  991. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  992. return "IDLE_SHUTDOWN";
  993. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  994. return "IMS_WFC_CALL_IND";
  995. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  996. return "WLFW_TWC_CFG_IND";
  997. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  998. return "QDSS_TRACE_REQ_MEM";
  999. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  1000. return "FW_MEM_FILE_SAVE";
  1001. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1002. return "QDSS_TRACE_FREE";
  1003. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1004. return "QDSS_TRACE_REQ_DATA";
  1005. case CNSS_DRIVER_EVENT_MAX:
  1006. return "EVENT_MAX";
  1007. }
  1008. return "UNKNOWN";
  1009. };
  1010. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  1011. enum cnss_driver_event_type type,
  1012. u32 flags, void *data)
  1013. {
  1014. struct cnss_driver_event *event;
  1015. unsigned long irq_flags;
  1016. int gfp = GFP_KERNEL;
  1017. int ret = 0;
  1018. if (!plat_priv)
  1019. return -ENODEV;
  1020. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  1021. cnss_driver_event_to_str(type), type,
  1022. flags ? "-sync" : "", plat_priv->driver_state, flags);
  1023. if (type >= CNSS_DRIVER_EVENT_MAX) {
  1024. cnss_pr_err("Invalid Event type: %d, can't post", type);
  1025. return -EINVAL;
  1026. }
  1027. if (in_interrupt() || irqs_disabled())
  1028. gfp = GFP_ATOMIC;
  1029. event = kzalloc(sizeof(*event), gfp);
  1030. if (!event)
  1031. return -ENOMEM;
  1032. cnss_pm_stay_awake(plat_priv);
  1033. event->type = type;
  1034. event->data = data;
  1035. init_completion(&event->complete);
  1036. event->ret = CNSS_EVENT_PENDING;
  1037. event->sync = !!(flags & CNSS_EVENT_SYNC);
  1038. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  1039. list_add_tail(&event->list, &plat_priv->event_list);
  1040. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1041. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  1042. if (!(flags & CNSS_EVENT_SYNC))
  1043. goto out;
  1044. if (flags & CNSS_EVENT_UNKILLABLE)
  1045. wait_for_completion(&event->complete);
  1046. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  1047. ret = wait_for_completion_killable(&event->complete);
  1048. else
  1049. ret = wait_for_completion_interruptible(&event->complete);
  1050. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  1051. cnss_driver_event_to_str(type), type,
  1052. plat_priv->driver_state, ret, event->ret);
  1053. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  1054. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  1055. event->sync = false;
  1056. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1057. ret = -EINTR;
  1058. goto out;
  1059. }
  1060. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1061. ret = event->ret;
  1062. kfree(event);
  1063. out:
  1064. cnss_pm_relax(plat_priv);
  1065. return ret;
  1066. }
  1067. /**
  1068. * cnss_get_timeout - Get timeout for corresponding type.
  1069. * @plat_priv: Pointer to platform driver context.
  1070. * @cnss_timeout_type: Timeout type.
  1071. *
  1072. * Return: Timeout in milliseconds.
  1073. */
  1074. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  1075. enum cnss_timeout_type timeout_type)
  1076. {
  1077. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  1078. switch (timeout_type) {
  1079. case CNSS_TIMEOUT_QMI:
  1080. return qmi_timeout;
  1081. case CNSS_TIMEOUT_POWER_UP:
  1082. return (qmi_timeout << 2);
  1083. case CNSS_TIMEOUT_IDLE_RESTART:
  1084. /* In idle restart power up sequence, we have fw_boot_timer to
  1085. * handle FW initialization failure.
  1086. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  1087. * account for FW dump collection and FW re-initialization on
  1088. * retry.
  1089. */
  1090. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  1091. case CNSS_TIMEOUT_CALIBRATION:
  1092. /* Similar to mission mode, in CBC if FW init fails
  1093. * fw recovery is tried. Thus return 2x the CBC timeout.
  1094. */
  1095. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  1096. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  1097. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  1098. case CNSS_TIMEOUT_RDDM:
  1099. return CNSS_RDDM_TIMEOUT_MS;
  1100. case CNSS_TIMEOUT_RECOVERY:
  1101. return RECOVERY_TIMEOUT;
  1102. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  1103. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  1104. default:
  1105. return qmi_timeout;
  1106. }
  1107. }
  1108. unsigned int cnss_get_boot_timeout(struct device *dev)
  1109. {
  1110. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1111. if (!plat_priv) {
  1112. cnss_pr_err("plat_priv is NULL\n");
  1113. return 0;
  1114. }
  1115. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  1116. }
  1117. EXPORT_SYMBOL(cnss_get_boot_timeout);
  1118. int cnss_power_up(struct device *dev)
  1119. {
  1120. int ret = 0;
  1121. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1122. unsigned int timeout;
  1123. if (!plat_priv) {
  1124. cnss_pr_err("plat_priv is NULL\n");
  1125. return -ENODEV;
  1126. }
  1127. cnss_pr_dbg("Powering up device\n");
  1128. ret = cnss_driver_event_post(plat_priv,
  1129. CNSS_DRIVER_EVENT_POWER_UP,
  1130. CNSS_EVENT_SYNC, NULL);
  1131. if (ret)
  1132. goto out;
  1133. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1134. goto out;
  1135. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  1136. reinit_completion(&plat_priv->power_up_complete);
  1137. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1138. msecs_to_jiffies(timeout));
  1139. if (!ret) {
  1140. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  1141. timeout);
  1142. ret = -EAGAIN;
  1143. goto out;
  1144. }
  1145. return 0;
  1146. out:
  1147. return ret;
  1148. }
  1149. EXPORT_SYMBOL(cnss_power_up);
  1150. int cnss_power_down(struct device *dev)
  1151. {
  1152. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1153. if (!plat_priv) {
  1154. cnss_pr_err("plat_priv is NULL\n");
  1155. return -ENODEV;
  1156. }
  1157. cnss_pr_dbg("Powering down device\n");
  1158. return cnss_driver_event_post(plat_priv,
  1159. CNSS_DRIVER_EVENT_POWER_DOWN,
  1160. CNSS_EVENT_SYNC, NULL);
  1161. }
  1162. EXPORT_SYMBOL(cnss_power_down);
  1163. int cnss_idle_restart(struct device *dev)
  1164. {
  1165. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1166. unsigned int timeout;
  1167. int ret = 0;
  1168. if (!plat_priv) {
  1169. cnss_pr_err("plat_priv is NULL\n");
  1170. return -ENODEV;
  1171. }
  1172. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  1173. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  1174. return -EBUSY;
  1175. }
  1176. cnss_pr_dbg("Doing idle restart\n");
  1177. reinit_completion(&plat_priv->power_up_complete);
  1178. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1179. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1180. ret = -EINVAL;
  1181. goto out;
  1182. }
  1183. ret = cnss_driver_event_post(plat_priv,
  1184. CNSS_DRIVER_EVENT_IDLE_RESTART,
  1185. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1186. if (ret == -EINTR && plat_priv->device_id != QCA6174_DEVICE_ID)
  1187. cnss_pr_err("Idle restart has been interrupted but device power up is still in progress");
  1188. else if (ret)
  1189. goto out;
  1190. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1191. ret = cnss_bus_call_driver_probe(plat_priv);
  1192. goto out;
  1193. }
  1194. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  1195. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1196. msecs_to_jiffies(timeout));
  1197. if (plat_priv->power_up_error) {
  1198. ret = plat_priv->power_up_error;
  1199. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1200. cnss_pr_dbg("Power up error:%d, exiting\n",
  1201. plat_priv->power_up_error);
  1202. goto out;
  1203. }
  1204. if (!ret) {
  1205. /* This exception occurs after attempting retry of FW recovery.
  1206. * Thus we can safely power off the device.
  1207. */
  1208. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  1209. timeout);
  1210. ret = -ETIMEDOUT;
  1211. cnss_power_down(dev);
  1212. CNSS_ASSERT(0);
  1213. goto out;
  1214. }
  1215. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1216. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1217. del_timer(&plat_priv->fw_boot_timer);
  1218. ret = -EINVAL;
  1219. goto out;
  1220. }
  1221. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  1222. * non-DRV is supported only once after device reboots and before wifi
  1223. * is turned on. We do not allow switching back to DRV.
  1224. * To bring device back into DRV, user needs to reboot device.
  1225. */
  1226. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  1227. cnss_pr_dbg("DRV is disabled\n");
  1228. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  1229. }
  1230. mutex_unlock(&plat_priv->driver_ops_lock);
  1231. return 0;
  1232. out:
  1233. mutex_unlock(&plat_priv->driver_ops_lock);
  1234. return ret;
  1235. }
  1236. EXPORT_SYMBOL(cnss_idle_restart);
  1237. int cnss_idle_shutdown(struct device *dev)
  1238. {
  1239. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1240. if (!plat_priv) {
  1241. cnss_pr_err("plat_priv is NULL\n");
  1242. return -ENODEV;
  1243. }
  1244. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  1245. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  1246. return -EAGAIN;
  1247. }
  1248. cnss_pr_dbg("Doing idle shutdown\n");
  1249. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) ||
  1250. test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state)) {
  1251. cnss_pr_dbg("Recovery in progress. Ignore IDLE Shutdown\n");
  1252. return -EBUSY;
  1253. }
  1254. return cnss_driver_event_post(plat_priv,
  1255. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1256. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1257. }
  1258. EXPORT_SYMBOL(cnss_idle_shutdown);
  1259. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  1260. {
  1261. int ret = 0;
  1262. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1263. if (ret < 0) {
  1264. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  1265. goto out;
  1266. }
  1267. ret = cnss_get_clk(plat_priv);
  1268. if (ret) {
  1269. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  1270. goto put_vreg;
  1271. }
  1272. ret = cnss_get_pinctrl(plat_priv);
  1273. if (ret) {
  1274. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  1275. goto put_clk;
  1276. }
  1277. return 0;
  1278. put_clk:
  1279. cnss_put_clk(plat_priv);
  1280. put_vreg:
  1281. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1282. out:
  1283. return ret;
  1284. }
  1285. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  1286. {
  1287. cnss_put_clk(plat_priv);
  1288. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1289. }
  1290. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1291. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  1292. unsigned long code,
  1293. void *ss_handle)
  1294. {
  1295. struct cnss_plat_data *plat_priv =
  1296. container_of(nb, struct cnss_plat_data, modem_nb);
  1297. struct cnss_esoc_info *esoc_info;
  1298. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  1299. if (!plat_priv)
  1300. return NOTIFY_DONE;
  1301. esoc_info = &plat_priv->esoc_info;
  1302. if (code == SUBSYS_AFTER_POWERUP)
  1303. esoc_info->modem_current_status = 1;
  1304. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  1305. esoc_info->modem_current_status = 0;
  1306. else
  1307. return NOTIFY_DONE;
  1308. if (!cnss_bus_call_driver_modem_status(plat_priv,
  1309. esoc_info->modem_current_status))
  1310. return NOTIFY_DONE;
  1311. return NOTIFY_OK;
  1312. }
  1313. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1314. {
  1315. int ret = 0;
  1316. struct device *dev;
  1317. struct cnss_esoc_info *esoc_info;
  1318. struct esoc_desc *esoc_desc;
  1319. const char *client_desc;
  1320. dev = &plat_priv->plat_dev->dev;
  1321. esoc_info = &plat_priv->esoc_info;
  1322. esoc_info->notify_modem_status =
  1323. of_property_read_bool(dev->of_node,
  1324. "qcom,notify-modem-status");
  1325. if (!esoc_info->notify_modem_status)
  1326. goto out;
  1327. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1328. &client_desc);
  1329. if (ret) {
  1330. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1331. } else {
  1332. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1333. if (IS_ERR_OR_NULL(esoc_desc)) {
  1334. ret = PTR_RET(esoc_desc);
  1335. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1336. ret);
  1337. goto out;
  1338. }
  1339. esoc_info->esoc_desc = esoc_desc;
  1340. }
  1341. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1342. esoc_info->modem_current_status = 0;
  1343. esoc_info->modem_notify_handler =
  1344. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1345. esoc_info->esoc_desc->name :
  1346. "modem", &plat_priv->modem_nb);
  1347. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1348. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1349. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1350. ret);
  1351. goto unreg_esoc;
  1352. }
  1353. return 0;
  1354. unreg_esoc:
  1355. if (esoc_info->esoc_desc)
  1356. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1357. out:
  1358. return ret;
  1359. }
  1360. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1361. {
  1362. struct device *dev;
  1363. struct cnss_esoc_info *esoc_info;
  1364. dev = &plat_priv->plat_dev->dev;
  1365. esoc_info = &plat_priv->esoc_info;
  1366. if (esoc_info->notify_modem_status)
  1367. subsys_notif_unregister_notifier
  1368. (esoc_info->modem_notify_handler,
  1369. &plat_priv->modem_nb);
  1370. if (esoc_info->esoc_desc)
  1371. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1372. }
  1373. #else
  1374. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1375. {
  1376. return 0;
  1377. }
  1378. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1379. #endif
  1380. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1381. {
  1382. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1383. int ret = 0;
  1384. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1385. return 0;
  1386. enable_irq(sol_gpio->dev_sol_irq);
  1387. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1388. if (ret)
  1389. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1390. ret);
  1391. return ret;
  1392. }
  1393. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1394. {
  1395. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1396. int ret = 0;
  1397. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1398. return 0;
  1399. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1400. if (ret)
  1401. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1402. ret);
  1403. disable_irq(sol_gpio->dev_sol_irq);
  1404. return ret;
  1405. }
  1406. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1407. {
  1408. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1409. if (sol_gpio->dev_sol_gpio < 0)
  1410. return -EINVAL;
  1411. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1412. }
  1413. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1414. {
  1415. struct cnss_plat_data *plat_priv = data;
  1416. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1417. sol_gpio->dev_sol_counter++;
  1418. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1419. irq, sol_gpio->dev_sol_counter);
  1420. /* Make sure abort current suspend */
  1421. cnss_pm_stay_awake(plat_priv);
  1422. cnss_pm_relax(plat_priv);
  1423. pm_system_wakeup();
  1424. cnss_bus_handle_dev_sol_irq(plat_priv);
  1425. return IRQ_HANDLED;
  1426. }
  1427. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1428. {
  1429. struct device *dev = &plat_priv->plat_dev->dev;
  1430. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1431. int ret = 0;
  1432. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1433. "wlan-dev-sol-gpio", 0);
  1434. if (sol_gpio->dev_sol_gpio < 0)
  1435. goto out;
  1436. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1437. sol_gpio->dev_sol_gpio);
  1438. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1439. if (ret) {
  1440. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1441. ret);
  1442. goto out;
  1443. }
  1444. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1445. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1446. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1447. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1448. if (ret) {
  1449. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1450. goto free_gpio;
  1451. }
  1452. return 0;
  1453. free_gpio:
  1454. gpio_free(sol_gpio->dev_sol_gpio);
  1455. out:
  1456. return ret;
  1457. }
  1458. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1459. {
  1460. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1461. if (sol_gpio->dev_sol_gpio < 0)
  1462. return;
  1463. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1464. gpio_free(sol_gpio->dev_sol_gpio);
  1465. }
  1466. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1467. {
  1468. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1469. if (sol_gpio->host_sol_gpio < 0)
  1470. return -EINVAL;
  1471. if (value)
  1472. cnss_pr_dbg("Assert host SOL GPIO\n");
  1473. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1474. return 0;
  1475. }
  1476. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1477. {
  1478. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1479. if (sol_gpio->host_sol_gpio < 0)
  1480. return -EINVAL;
  1481. return gpio_get_value(sol_gpio->host_sol_gpio);
  1482. }
  1483. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1484. {
  1485. struct device *dev = &plat_priv->plat_dev->dev;
  1486. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1487. int ret = 0;
  1488. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1489. "wlan-host-sol-gpio", 0);
  1490. if (sol_gpio->host_sol_gpio < 0)
  1491. goto out;
  1492. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1493. sol_gpio->host_sol_gpio);
  1494. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1495. if (ret) {
  1496. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1497. ret);
  1498. goto out;
  1499. }
  1500. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1501. return 0;
  1502. out:
  1503. return ret;
  1504. }
  1505. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1506. {
  1507. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1508. if (sol_gpio->host_sol_gpio < 0)
  1509. return;
  1510. gpio_free(sol_gpio->host_sol_gpio);
  1511. }
  1512. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1513. {
  1514. int ret;
  1515. ret = cnss_init_dev_sol_gpio(plat_priv);
  1516. if (ret)
  1517. goto out;
  1518. ret = cnss_init_host_sol_gpio(plat_priv);
  1519. if (ret)
  1520. goto deinit_dev_sol;
  1521. return 0;
  1522. deinit_dev_sol:
  1523. cnss_deinit_dev_sol_gpio(plat_priv);
  1524. out:
  1525. return ret;
  1526. }
  1527. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1528. {
  1529. cnss_deinit_host_sol_gpio(plat_priv);
  1530. cnss_deinit_dev_sol_gpio(plat_priv);
  1531. }
  1532. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1533. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1534. {
  1535. struct cnss_plat_data *plat_priv;
  1536. int ret = 0;
  1537. if (!subsys_desc->dev) {
  1538. cnss_pr_err("dev from subsys_desc is NULL\n");
  1539. return -ENODEV;
  1540. }
  1541. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1542. if (!plat_priv) {
  1543. cnss_pr_err("plat_priv is NULL\n");
  1544. return -ENODEV;
  1545. }
  1546. if (!plat_priv->driver_state) {
  1547. cnss_pr_dbg("subsys powerup is ignored\n");
  1548. return 0;
  1549. }
  1550. ret = cnss_bus_dev_powerup(plat_priv);
  1551. if (ret)
  1552. __pm_relax(plat_priv->recovery_ws);
  1553. return ret;
  1554. }
  1555. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1556. bool force_stop)
  1557. {
  1558. struct cnss_plat_data *plat_priv;
  1559. if (!subsys_desc->dev) {
  1560. cnss_pr_err("dev from subsys_desc is NULL\n");
  1561. return -ENODEV;
  1562. }
  1563. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1564. if (!plat_priv) {
  1565. cnss_pr_err("plat_priv is NULL\n");
  1566. return -ENODEV;
  1567. }
  1568. if (!plat_priv->driver_state) {
  1569. cnss_pr_dbg("subsys shutdown is ignored\n");
  1570. return 0;
  1571. }
  1572. return cnss_bus_dev_shutdown(plat_priv);
  1573. }
  1574. void cnss_device_crashed(struct device *dev)
  1575. {
  1576. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1577. struct cnss_subsys_info *subsys_info;
  1578. if (!plat_priv)
  1579. return;
  1580. subsys_info = &plat_priv->subsys_info;
  1581. if (subsys_info->subsys_device) {
  1582. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1583. subsys_set_crash_status(subsys_info->subsys_device, true);
  1584. subsystem_restart_dev(subsys_info->subsys_device);
  1585. }
  1586. }
  1587. EXPORT_SYMBOL(cnss_device_crashed);
  1588. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1589. {
  1590. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1591. if (!plat_priv) {
  1592. cnss_pr_err("plat_priv is NULL\n");
  1593. return;
  1594. }
  1595. cnss_bus_dev_crash_shutdown(plat_priv);
  1596. }
  1597. static int cnss_subsys_ramdump(int enable,
  1598. const struct subsys_desc *subsys_desc)
  1599. {
  1600. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1601. if (!plat_priv) {
  1602. cnss_pr_err("plat_priv is NULL\n");
  1603. return -ENODEV;
  1604. }
  1605. if (!enable)
  1606. return 0;
  1607. return cnss_bus_dev_ramdump(plat_priv);
  1608. }
  1609. static void cnss_recovery_work_handler(struct work_struct *work)
  1610. {
  1611. }
  1612. #else
  1613. void cnss_recovery_handler(struct cnss_plat_data *plat_priv)
  1614. {
  1615. int ret;
  1616. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1617. if (!plat_priv->recovery_enabled)
  1618. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1619. cnss_bus_dev_shutdown(plat_priv);
  1620. cnss_bus_dev_ramdump(plat_priv);
  1621. /* If recovery is triggered before Host driver registration,
  1622. * avoid device power up because eventually device will be
  1623. * power up as part of driver registration.
  1624. */
  1625. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1626. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1627. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1628. plat_priv->driver_state);
  1629. return;
  1630. }
  1631. msleep(POWER_RESET_MIN_DELAY_MS);
  1632. ret = cnss_bus_dev_powerup(plat_priv);
  1633. if (ret) {
  1634. __pm_relax(plat_priv->recovery_ws);
  1635. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1636. }
  1637. return;
  1638. }
  1639. static void cnss_recovery_work_handler(struct work_struct *work)
  1640. {
  1641. struct cnss_plat_data *plat_priv =
  1642. container_of(work, struct cnss_plat_data, recovery_work);
  1643. cnss_recovery_handler(plat_priv);
  1644. }
  1645. void cnss_device_crashed(struct device *dev)
  1646. {
  1647. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1648. if (!plat_priv)
  1649. return;
  1650. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1651. schedule_work(&plat_priv->recovery_work);
  1652. }
  1653. EXPORT_SYMBOL(cnss_device_crashed);
  1654. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1655. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1656. {
  1657. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1658. struct cnss_ramdump_info *ramdump_info;
  1659. if (!plat_priv)
  1660. return NULL;
  1661. ramdump_info = &plat_priv->ramdump_info;
  1662. *size = ramdump_info->ramdump_size;
  1663. return ramdump_info->ramdump_va;
  1664. }
  1665. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1666. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1667. {
  1668. switch (reason) {
  1669. case CNSS_REASON_DEFAULT:
  1670. return "DEFAULT";
  1671. case CNSS_REASON_LINK_DOWN:
  1672. return "LINK_DOWN";
  1673. case CNSS_REASON_RDDM:
  1674. return "RDDM";
  1675. case CNSS_REASON_TIMEOUT:
  1676. return "TIMEOUT";
  1677. }
  1678. return "UNKNOWN";
  1679. };
  1680. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1681. enum cnss_recovery_reason reason)
  1682. {
  1683. int ret;
  1684. plat_priv->recovery_count++;
  1685. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1686. goto self_recovery;
  1687. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1688. cnss_pr_dbg("Skip device recovery\n");
  1689. return 0;
  1690. }
  1691. /* FW recovery sequence has multiple steps and firmware load requires
  1692. * linux PM in awake state. Thus hold the cnss wake source until
  1693. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1694. * time taken in this process.
  1695. */
  1696. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1697. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1698. true);
  1699. switch (reason) {
  1700. case CNSS_REASON_LINK_DOWN:
  1701. if (!cnss_bus_check_link_status(plat_priv)) {
  1702. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1703. return 0;
  1704. }
  1705. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1706. &plat_priv->ctrl_params.quirks))
  1707. goto self_recovery;
  1708. if (!cnss_bus_recover_link_down(plat_priv)) {
  1709. /* clear recovery bit here to avoid skipping
  1710. * the recovery work for RDDM later
  1711. */
  1712. clear_bit(CNSS_DRIVER_RECOVERY,
  1713. &plat_priv->driver_state);
  1714. return 0;
  1715. }
  1716. break;
  1717. case CNSS_REASON_RDDM:
  1718. cnss_bus_collect_dump_info(plat_priv, false);
  1719. break;
  1720. case CNSS_REASON_DEFAULT:
  1721. case CNSS_REASON_TIMEOUT:
  1722. break;
  1723. default:
  1724. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1725. cnss_recovery_reason_to_str(reason), reason);
  1726. break;
  1727. }
  1728. cnss_bus_device_crashed(plat_priv);
  1729. return 0;
  1730. self_recovery:
  1731. cnss_pr_dbg("Going for self recovery\n");
  1732. cnss_bus_dev_shutdown(plat_priv);
  1733. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1734. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1735. &plat_priv->ctrl_params.quirks);
  1736. /* If link down self recovery is triggered before Host driver
  1737. * registration, avoid device power up because eventually device
  1738. * will be power up as part of driver registration.
  1739. */
  1740. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1741. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1742. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1743. plat_priv->driver_state);
  1744. return 0;
  1745. }
  1746. ret = cnss_bus_dev_powerup(plat_priv);
  1747. if (ret)
  1748. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1749. return 0;
  1750. }
  1751. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1752. void *data)
  1753. {
  1754. struct cnss_recovery_data *recovery_data = data;
  1755. int ret = 0;
  1756. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1757. cnss_recovery_reason_to_str(recovery_data->reason),
  1758. recovery_data->reason);
  1759. if (!plat_priv->driver_state) {
  1760. cnss_pr_err("Improper driver state, ignore recovery\n");
  1761. ret = -EINVAL;
  1762. goto out;
  1763. }
  1764. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1765. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1766. ret = -EINVAL;
  1767. goto out;
  1768. }
  1769. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1770. cnss_pr_err("Recovery is already in progress\n");
  1771. CNSS_ASSERT(0);
  1772. ret = -EINVAL;
  1773. goto out;
  1774. }
  1775. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1776. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1777. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1778. ret = -EINVAL;
  1779. goto out;
  1780. }
  1781. switch (plat_priv->device_id) {
  1782. case QCA6174_DEVICE_ID:
  1783. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1784. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1785. &plat_priv->driver_state)) {
  1786. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1787. ret = -EINVAL;
  1788. goto out;
  1789. }
  1790. break;
  1791. default:
  1792. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1793. set_bit(CNSS_FW_BOOT_RECOVERY,
  1794. &plat_priv->driver_state);
  1795. }
  1796. break;
  1797. }
  1798. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1799. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1800. out:
  1801. kfree(data);
  1802. return ret;
  1803. }
  1804. int cnss_self_recovery(struct device *dev,
  1805. enum cnss_recovery_reason reason)
  1806. {
  1807. cnss_schedule_recovery(dev, reason);
  1808. return 0;
  1809. }
  1810. EXPORT_SYMBOL(cnss_self_recovery);
  1811. void cnss_schedule_recovery(struct device *dev,
  1812. enum cnss_recovery_reason reason)
  1813. {
  1814. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1815. struct cnss_recovery_data *data;
  1816. int gfp = GFP_KERNEL;
  1817. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1818. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1819. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1820. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1821. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1822. return;
  1823. }
  1824. if (in_interrupt() || irqs_disabled())
  1825. gfp = GFP_ATOMIC;
  1826. data = kzalloc(sizeof(*data), gfp);
  1827. if (!data)
  1828. return;
  1829. data->reason = reason;
  1830. cnss_driver_event_post(plat_priv,
  1831. CNSS_DRIVER_EVENT_RECOVERY,
  1832. 0, data);
  1833. }
  1834. EXPORT_SYMBOL(cnss_schedule_recovery);
  1835. int cnss_force_fw_assert(struct device *dev)
  1836. {
  1837. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1838. if (!plat_priv) {
  1839. cnss_pr_err("plat_priv is NULL\n");
  1840. return -ENODEV;
  1841. }
  1842. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1843. cnss_pr_info("Forced FW assert is not supported\n");
  1844. return -EOPNOTSUPP;
  1845. }
  1846. if (cnss_bus_is_device_down(plat_priv)) {
  1847. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1848. return 0;
  1849. }
  1850. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1851. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1852. return 0;
  1853. }
  1854. if (in_interrupt() || irqs_disabled())
  1855. cnss_driver_event_post(plat_priv,
  1856. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1857. 0, NULL);
  1858. else
  1859. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1860. return 0;
  1861. }
  1862. EXPORT_SYMBOL(cnss_force_fw_assert);
  1863. int cnss_force_collect_rddm(struct device *dev)
  1864. {
  1865. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1866. unsigned int timeout;
  1867. int ret = 0;
  1868. if (!plat_priv) {
  1869. cnss_pr_err("plat_priv is NULL\n");
  1870. return -ENODEV;
  1871. }
  1872. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1873. cnss_pr_info("Force collect rddm is not supported\n");
  1874. return -EOPNOTSUPP;
  1875. }
  1876. if (cnss_bus_is_device_down(plat_priv)) {
  1877. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1878. goto wait_rddm;
  1879. }
  1880. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1881. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1882. goto wait_rddm;
  1883. }
  1884. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1885. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1886. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1887. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1888. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1889. return 0;
  1890. }
  1891. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1892. if (ret)
  1893. return ret;
  1894. wait_rddm:
  1895. reinit_completion(&plat_priv->rddm_complete);
  1896. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1897. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1898. msecs_to_jiffies(timeout));
  1899. if (!ret) {
  1900. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1901. timeout);
  1902. ret = -ETIMEDOUT;
  1903. } else if (ret > 0) {
  1904. ret = 0;
  1905. }
  1906. return ret;
  1907. }
  1908. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1909. int cnss_qmi_send_get(struct device *dev)
  1910. {
  1911. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1912. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1913. return 0;
  1914. return cnss_bus_qmi_send_get(plat_priv);
  1915. }
  1916. EXPORT_SYMBOL(cnss_qmi_send_get);
  1917. int cnss_qmi_send_put(struct device *dev)
  1918. {
  1919. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1920. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1921. return 0;
  1922. return cnss_bus_qmi_send_put(plat_priv);
  1923. }
  1924. EXPORT_SYMBOL(cnss_qmi_send_put);
  1925. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1926. int cmd_len, void *cb_ctx,
  1927. int (*cb)(void *ctx, void *event, int event_len))
  1928. {
  1929. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1930. int ret;
  1931. if (!plat_priv)
  1932. return -ENODEV;
  1933. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1934. return -EINVAL;
  1935. plat_priv->get_info_cb = cb;
  1936. plat_priv->get_info_cb_ctx = cb_ctx;
  1937. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1938. if (ret) {
  1939. plat_priv->get_info_cb = NULL;
  1940. plat_priv->get_info_cb_ctx = NULL;
  1941. }
  1942. return ret;
  1943. }
  1944. EXPORT_SYMBOL(cnss_qmi_send);
  1945. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1946. {
  1947. int ret = 0;
  1948. u32 retry = 0, timeout;
  1949. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1950. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1951. goto out;
  1952. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1953. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1954. goto out;
  1955. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1956. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1957. goto out;
  1958. }
  1959. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1960. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1961. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1962. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1963. CNSS_ASSERT(0);
  1964. return -EINVAL;
  1965. }
  1966. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1967. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1968. break;
  1969. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1970. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1971. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1972. CNSS_ASSERT(0);
  1973. ret = -EINVAL;
  1974. goto mark_cal_fail;
  1975. }
  1976. }
  1977. switch (plat_priv->device_id) {
  1978. case QCA6290_DEVICE_ID:
  1979. case QCA6390_DEVICE_ID:
  1980. case QCA6490_DEVICE_ID:
  1981. case KIWI_DEVICE_ID:
  1982. case MANGO_DEVICE_ID:
  1983. case PEACH_DEVICE_ID:
  1984. break;
  1985. default:
  1986. cnss_pr_err("Not supported for device ID 0x%lx\n",
  1987. plat_priv->device_id);
  1988. ret = -EINVAL;
  1989. goto mark_cal_fail;
  1990. }
  1991. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1992. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1993. timeout = cnss_get_timeout(plat_priv,
  1994. CNSS_TIMEOUT_CALIBRATION);
  1995. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1996. timeout / 1000);
  1997. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1998. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1999. msecs_to_jiffies(timeout));
  2000. }
  2001. reinit_completion(&plat_priv->cal_complete);
  2002. ret = cnss_bus_dev_powerup(plat_priv);
  2003. mark_cal_fail:
  2004. if (ret) {
  2005. complete(&plat_priv->cal_complete);
  2006. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  2007. /* Set CBC done in driver state to mark attempt and note error
  2008. * since calibration cannot be retried at boot.
  2009. */
  2010. plat_priv->cal_done = CNSS_CAL_FAILURE;
  2011. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  2012. if (plat_priv->device_id == QCA6174_DEVICE_ID ||
  2013. plat_priv->device_id == QCN7605_DEVICE_ID) {
  2014. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  2015. goto out;
  2016. cnss_pr_info("Schedule WLAN driver load\n");
  2017. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2018. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2019. 0);
  2020. }
  2021. }
  2022. out:
  2023. return ret;
  2024. }
  2025. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  2026. void *data)
  2027. {
  2028. struct cnss_cal_info *cal_info = data;
  2029. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  2030. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  2031. goto out;
  2032. switch (cal_info->cal_status) {
  2033. case CNSS_CAL_DONE:
  2034. cnss_pr_dbg("Calibration completed successfully\n");
  2035. plat_priv->cal_done = true;
  2036. break;
  2037. case CNSS_CAL_TIMEOUT:
  2038. case CNSS_CAL_FAILURE:
  2039. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  2040. cal_info->cal_status);
  2041. break;
  2042. default:
  2043. cnss_pr_err("Unknown calibration status: %u\n",
  2044. cal_info->cal_status);
  2045. break;
  2046. }
  2047. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  2048. cnss_bus_free_qdss_mem(plat_priv);
  2049. cnss_release_antenna_sharing(plat_priv);
  2050. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  2051. goto skip_shutdown;
  2052. cnss_bus_dev_shutdown(plat_priv);
  2053. msleep(POWER_RESET_MIN_DELAY_MS);
  2054. skip_shutdown:
  2055. complete(&plat_priv->cal_complete);
  2056. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  2057. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  2058. if (cal_info->cal_status == CNSS_CAL_DONE) {
  2059. cnss_cal_mem_upload_to_file(plat_priv);
  2060. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  2061. goto out;
  2062. cnss_pr_dbg("Schedule WLAN driver load\n");
  2063. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2064. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2065. 0);
  2066. }
  2067. out:
  2068. kfree(data);
  2069. return 0;
  2070. }
  2071. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  2072. {
  2073. int ret;
  2074. ret = cnss_bus_dev_powerup(plat_priv);
  2075. if (ret)
  2076. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  2077. return ret;
  2078. }
  2079. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  2080. {
  2081. cnss_bus_dev_shutdown(plat_priv);
  2082. return 0;
  2083. }
  2084. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  2085. {
  2086. int ret = 0;
  2087. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  2088. if (ret < 0)
  2089. return ret;
  2090. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  2091. }
  2092. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  2093. u32 mem_seg_len, u64 pa, u32 size)
  2094. {
  2095. int i = 0;
  2096. u64 offset = 0;
  2097. void *va = NULL;
  2098. u64 local_pa;
  2099. u32 local_size;
  2100. for (i = 0; i < mem_seg_len; i++) {
  2101. local_pa = (u64)fw_mem[i].pa;
  2102. local_size = (u32)fw_mem[i].size;
  2103. if (pa == local_pa && size <= local_size) {
  2104. va = fw_mem[i].va;
  2105. break;
  2106. }
  2107. if (pa > local_pa &&
  2108. pa < local_pa + local_size &&
  2109. pa + size <= local_pa + local_size) {
  2110. offset = pa - local_pa;
  2111. va = fw_mem[i].va + offset;
  2112. break;
  2113. }
  2114. }
  2115. return va;
  2116. }
  2117. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  2118. void *data)
  2119. {
  2120. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2121. struct cnss_fw_mem *fw_mem_seg;
  2122. int ret = 0L;
  2123. void *va = NULL;
  2124. u32 i, fw_mem_seg_len;
  2125. switch (event_data->mem_type) {
  2126. case QMI_WLFW_MEM_TYPE_DDR_V01:
  2127. if (!plat_priv->fw_mem_seg_len)
  2128. goto invalid_mem_save;
  2129. fw_mem_seg = plat_priv->fw_mem;
  2130. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  2131. break;
  2132. case QMI_WLFW_MEM_QDSS_V01:
  2133. if (!plat_priv->qdss_mem_seg_len)
  2134. goto invalid_mem_save;
  2135. fw_mem_seg = plat_priv->qdss_mem;
  2136. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  2137. break;
  2138. default:
  2139. goto invalid_mem_save;
  2140. }
  2141. for (i = 0; i < event_data->mem_seg_len; i++) {
  2142. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  2143. event_data->mem_seg[i].addr,
  2144. event_data->mem_seg[i].size);
  2145. if (!va) {
  2146. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  2147. &event_data->mem_seg[i].addr,
  2148. event_data->mem_type);
  2149. ret = -EINVAL;
  2150. break;
  2151. }
  2152. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  2153. event_data->file_name,
  2154. event_data->mem_seg[i].size);
  2155. if (ret < 0) {
  2156. cnss_pr_err("Fail to save fw mem data: %d\n",
  2157. ret);
  2158. break;
  2159. }
  2160. }
  2161. kfree(data);
  2162. return ret;
  2163. invalid_mem_save:
  2164. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  2165. event_data->mem_type);
  2166. kfree(data);
  2167. return -EINVAL;
  2168. }
  2169. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  2170. {
  2171. cnss_bus_free_qdss_mem(plat_priv);
  2172. return 0;
  2173. }
  2174. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  2175. void *data)
  2176. {
  2177. int ret = 0;
  2178. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2179. if (!plat_priv)
  2180. return -ENODEV;
  2181. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  2182. event_data->total_size);
  2183. kfree(data);
  2184. return ret;
  2185. }
  2186. static void cnss_driver_event_work(struct work_struct *work)
  2187. {
  2188. struct cnss_plat_data *plat_priv =
  2189. container_of(work, struct cnss_plat_data, event_work);
  2190. struct cnss_driver_event *event;
  2191. unsigned long flags;
  2192. int ret = 0;
  2193. if (!plat_priv) {
  2194. cnss_pr_err("plat_priv is NULL!\n");
  2195. return;
  2196. }
  2197. cnss_pm_stay_awake(plat_priv);
  2198. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2199. while (!list_empty(&plat_priv->event_list)) {
  2200. event = list_first_entry(&plat_priv->event_list,
  2201. struct cnss_driver_event, list);
  2202. list_del(&event->list);
  2203. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2204. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  2205. cnss_driver_event_to_str(event->type),
  2206. event->sync ? "-sync" : "", event->type,
  2207. plat_priv->driver_state);
  2208. switch (event->type) {
  2209. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  2210. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  2211. break;
  2212. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  2213. ret = cnss_wlfw_server_exit(plat_priv);
  2214. break;
  2215. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  2216. ret = cnss_bus_alloc_fw_mem(plat_priv);
  2217. if (ret)
  2218. break;
  2219. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  2220. break;
  2221. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  2222. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  2223. break;
  2224. case CNSS_DRIVER_EVENT_FW_READY:
  2225. ret = cnss_fw_ready_hdlr(plat_priv);
  2226. break;
  2227. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  2228. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  2229. break;
  2230. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  2231. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  2232. event->data);
  2233. break;
  2234. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  2235. ret = cnss_bus_register_driver_hdlr(plat_priv,
  2236. event->data);
  2237. break;
  2238. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  2239. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  2240. break;
  2241. case CNSS_DRIVER_EVENT_RECOVERY:
  2242. ret = cnss_driver_recovery_hdlr(plat_priv,
  2243. event->data);
  2244. break;
  2245. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  2246. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  2247. break;
  2248. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  2249. set_bit(CNSS_DRIVER_IDLE_RESTART,
  2250. &plat_priv->driver_state);
  2251. fallthrough;
  2252. case CNSS_DRIVER_EVENT_POWER_UP:
  2253. ret = cnss_power_up_hdlr(plat_priv);
  2254. break;
  2255. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  2256. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  2257. &plat_priv->driver_state);
  2258. fallthrough;
  2259. case CNSS_DRIVER_EVENT_POWER_DOWN:
  2260. ret = cnss_power_down_hdlr(plat_priv);
  2261. break;
  2262. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  2263. ret = cnss_process_wfc_call_ind_event(plat_priv,
  2264. event->data);
  2265. break;
  2266. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  2267. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  2268. event->data);
  2269. break;
  2270. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  2271. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  2272. break;
  2273. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  2274. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  2275. event->data);
  2276. break;
  2277. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  2278. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  2279. break;
  2280. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  2281. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  2282. event->data);
  2283. break;
  2284. default:
  2285. cnss_pr_err("Invalid driver event type: %d",
  2286. event->type);
  2287. kfree(event);
  2288. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2289. continue;
  2290. }
  2291. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2292. if (event->sync) {
  2293. event->ret = ret;
  2294. complete(&event->complete);
  2295. continue;
  2296. }
  2297. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2298. kfree(event);
  2299. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2300. }
  2301. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2302. cnss_pm_relax(plat_priv);
  2303. }
  2304. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  2305. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2306. {
  2307. int ret = 0;
  2308. struct cnss_subsys_info *subsys_info;
  2309. subsys_info = &plat_priv->subsys_info;
  2310. subsys_info->subsys_desc.name = plat_priv->device_name;
  2311. subsys_info->subsys_desc.owner = THIS_MODULE;
  2312. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  2313. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  2314. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  2315. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  2316. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  2317. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  2318. if (IS_ERR(subsys_info->subsys_device)) {
  2319. ret = PTR_ERR(subsys_info->subsys_device);
  2320. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  2321. goto out;
  2322. }
  2323. subsys_info->subsys_handle =
  2324. subsystem_get(subsys_info->subsys_desc.name);
  2325. if (!subsys_info->subsys_handle) {
  2326. cnss_pr_err("Failed to get subsys_handle!\n");
  2327. ret = -EINVAL;
  2328. goto unregister_subsys;
  2329. } else if (IS_ERR(subsys_info->subsys_handle)) {
  2330. ret = PTR_ERR(subsys_info->subsys_handle);
  2331. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  2332. goto unregister_subsys;
  2333. }
  2334. return 0;
  2335. unregister_subsys:
  2336. subsys_unregister(subsys_info->subsys_device);
  2337. out:
  2338. return ret;
  2339. }
  2340. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2341. {
  2342. struct cnss_subsys_info *subsys_info;
  2343. subsys_info = &plat_priv->subsys_info;
  2344. subsystem_put(subsys_info->subsys_handle);
  2345. subsys_unregister(subsys_info->subsys_device);
  2346. }
  2347. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2348. {
  2349. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  2350. return create_ramdump_device(subsys_info->subsys_desc.name,
  2351. subsys_info->subsys_desc.dev);
  2352. }
  2353. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2354. void *ramdump_dev)
  2355. {
  2356. destroy_ramdump_device(ramdump_dev);
  2357. }
  2358. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2359. {
  2360. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2361. struct ramdump_segment segment;
  2362. memset(&segment, 0, sizeof(segment));
  2363. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  2364. segment.size = ramdump_info->ramdump_size;
  2365. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  2366. }
  2367. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2368. {
  2369. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2370. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2371. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2372. struct ramdump_segment *ramdump_segs, *s;
  2373. struct cnss_dump_meta_info meta_info = {0};
  2374. int i, ret = 0;
  2375. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2376. sizeof(*ramdump_segs),
  2377. GFP_KERNEL);
  2378. if (!ramdump_segs)
  2379. return -ENOMEM;
  2380. s = ramdump_segs + 1;
  2381. for (i = 0; i < dump_data->nentries; i++) {
  2382. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2383. cnss_pr_err("Unsupported dump type: %d",
  2384. dump_seg->type);
  2385. continue;
  2386. }
  2387. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2388. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2389. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2390. }
  2391. meta_info.entry[dump_seg->type].entry_num++;
  2392. s->address = dump_seg->address;
  2393. s->v_address = (void __iomem *)dump_seg->v_address;
  2394. s->size = dump_seg->size;
  2395. s++;
  2396. dump_seg++;
  2397. }
  2398. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2399. meta_info.version = CNSS_RAMDUMP_VERSION;
  2400. meta_info.chipset = plat_priv->device_id;
  2401. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2402. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2403. ramdump_segs->size = sizeof(meta_info);
  2404. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2405. dump_data->nentries + 1);
  2406. kfree(ramdump_segs);
  2407. return ret;
  2408. }
  2409. #else
  2410. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2411. void *data)
  2412. {
  2413. struct cnss_plat_data *plat_priv =
  2414. container_of(nb, struct cnss_plat_data, panic_nb);
  2415. cnss_bus_dev_crash_shutdown(plat_priv);
  2416. return NOTIFY_DONE;
  2417. }
  2418. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2419. {
  2420. int ret;
  2421. if (!plat_priv)
  2422. return -ENODEV;
  2423. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2424. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2425. &plat_priv->panic_nb);
  2426. if (ret) {
  2427. cnss_pr_err("Failed to register panic handler\n");
  2428. return -EINVAL;
  2429. }
  2430. return 0;
  2431. }
  2432. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2433. {
  2434. int ret;
  2435. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2436. &plat_priv->panic_nb);
  2437. if (ret)
  2438. cnss_pr_err("Failed to unregister panic handler\n");
  2439. }
  2440. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2441. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2442. {
  2443. return &plat_priv->plat_dev->dev;
  2444. }
  2445. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2446. void *ramdump_dev)
  2447. {
  2448. }
  2449. #endif
  2450. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2451. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2452. {
  2453. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2454. struct qcom_dump_segment segment;
  2455. struct list_head head;
  2456. INIT_LIST_HEAD(&head);
  2457. memset(&segment, 0, sizeof(segment));
  2458. segment.va = ramdump_info->ramdump_va;
  2459. segment.size = ramdump_info->ramdump_size;
  2460. list_add(&segment.node, &head);
  2461. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2462. }
  2463. #else
  2464. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2465. {
  2466. return 0;
  2467. }
  2468. /* Using completion event inside dynamically allocated ramdump_desc
  2469. * may result a race between freeing the event after setting it to
  2470. * complete inside dev coredump free callback and the thread that is
  2471. * waiting for completion.
  2472. */
  2473. DECLARE_COMPLETION(dump_done);
  2474. #define TIMEOUT_SAVE_DUMP_MS 30000
  2475. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2476. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2477. { \
  2478. if (class == ELFCLASS32) \
  2479. return sizeof(struct elf32_##__xhdr); \
  2480. else \
  2481. return sizeof(struct elf64_##__xhdr); \
  2482. }
  2483. SIZEOF_ELF_STRUCT(phdr)
  2484. SIZEOF_ELF_STRUCT(hdr)
  2485. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2486. do { \
  2487. if (class == ELFCLASS32) \
  2488. ((struct elf32_##__xhdr *)arg)->member = value; \
  2489. else \
  2490. ((struct elf64_##__xhdr *)arg)->member = value; \
  2491. } while (0)
  2492. #define set_ehdr_property(arg, class, member, value) \
  2493. set_xhdr_property(hdr, arg, class, member, value)
  2494. #define set_phdr_property(arg, class, member, value) \
  2495. set_xhdr_property(phdr, arg, class, member, value)
  2496. /* These replace qcom_ramdump driver APIs called from common API
  2497. * cnss_do_elf_dump() by the ones defined here.
  2498. */
  2499. #define qcom_dump_segment cnss_qcom_dump_segment
  2500. #define qcom_elf_dump cnss_qcom_elf_dump
  2501. #define dump_enabled cnss_dump_enabled
  2502. struct cnss_qcom_dump_segment {
  2503. struct list_head node;
  2504. dma_addr_t da;
  2505. void *va;
  2506. size_t size;
  2507. };
  2508. struct cnss_qcom_ramdump_desc {
  2509. void *data;
  2510. struct completion dump_done;
  2511. };
  2512. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2513. void *data, size_t datalen)
  2514. {
  2515. struct cnss_qcom_ramdump_desc *desc = data;
  2516. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2517. datalen);
  2518. }
  2519. static void cnss_qcom_devcd_freev(void *data)
  2520. {
  2521. struct cnss_qcom_ramdump_desc *desc = data;
  2522. cnss_pr_dbg("Free dump data for dev coredump\n");
  2523. complete(&dump_done);
  2524. vfree(desc->data);
  2525. kfree(desc);
  2526. }
  2527. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2528. gfp_t gfp)
  2529. {
  2530. struct cnss_qcom_ramdump_desc *desc;
  2531. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2532. int ret;
  2533. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2534. if (!desc)
  2535. return -ENOMEM;
  2536. desc->data = data;
  2537. reinit_completion(&dump_done);
  2538. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2539. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2540. ret = wait_for_completion_timeout(&dump_done,
  2541. msecs_to_jiffies(timeout));
  2542. if (!ret)
  2543. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2544. timeout);
  2545. return ret ? 0 : -ETIMEDOUT;
  2546. }
  2547. /* Since the elf32 and elf64 identification is identical apart from
  2548. * the class, use elf32 by default.
  2549. */
  2550. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2551. {
  2552. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2553. ehdr->e_ident[EI_CLASS] = class;
  2554. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2555. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2556. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2557. }
  2558. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2559. unsigned char class)
  2560. {
  2561. struct cnss_qcom_dump_segment *segment;
  2562. void *phdr, *ehdr;
  2563. size_t data_size, offset;
  2564. int phnum = 0;
  2565. void *data;
  2566. void __iomem *ptr;
  2567. if (!segs || list_empty(segs))
  2568. return -EINVAL;
  2569. data_size = sizeof_elf_hdr(class);
  2570. list_for_each_entry(segment, segs, node) {
  2571. data_size += sizeof_elf_phdr(class) + segment->size;
  2572. phnum++;
  2573. }
  2574. data = vmalloc(data_size);
  2575. if (!data)
  2576. return -ENOMEM;
  2577. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2578. ehdr = data;
  2579. memset(ehdr, 0, sizeof_elf_hdr(class));
  2580. init_elf_identification(ehdr, class);
  2581. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2582. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2583. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2584. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2585. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2586. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2587. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2588. phdr = data + sizeof_elf_hdr(class);
  2589. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2590. list_for_each_entry(segment, segs, node) {
  2591. memset(phdr, 0, sizeof_elf_phdr(class));
  2592. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2593. set_phdr_property(phdr, class, p_offset, offset);
  2594. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2595. set_phdr_property(phdr, class, p_paddr, segment->da);
  2596. set_phdr_property(phdr, class, p_filesz, segment->size);
  2597. set_phdr_property(phdr, class, p_memsz, segment->size);
  2598. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2599. set_phdr_property(phdr, class, p_align, 0);
  2600. if (segment->va) {
  2601. memcpy(data + offset, segment->va, segment->size);
  2602. } else {
  2603. ptr = devm_ioremap(dev, segment->da, segment->size);
  2604. if (!ptr) {
  2605. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2606. &segment->da, segment->size);
  2607. memset(data + offset, 0xff, segment->size);
  2608. } else {
  2609. memcpy_fromio(data + offset, ptr,
  2610. segment->size);
  2611. }
  2612. }
  2613. offset += segment->size;
  2614. phdr += sizeof_elf_phdr(class);
  2615. }
  2616. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2617. }
  2618. /* Saving dump to file system is always needed in this case. */
  2619. static bool cnss_dump_enabled(void)
  2620. {
  2621. return true;
  2622. }
  2623. #endif /* CONFIG_QCOM_RAMDUMP */
  2624. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2625. {
  2626. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2627. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2628. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2629. struct qcom_dump_segment *seg;
  2630. struct cnss_dump_meta_info meta_info = {0};
  2631. struct list_head head;
  2632. int i, ret = 0;
  2633. if (!dump_enabled()) {
  2634. cnss_pr_info("Dump collection is not enabled\n");
  2635. return ret;
  2636. }
  2637. INIT_LIST_HEAD(&head);
  2638. for (i = 0; i < dump_data->nentries; i++) {
  2639. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2640. cnss_pr_err("Unsupported dump type: %d",
  2641. dump_seg->type);
  2642. continue;
  2643. }
  2644. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2645. if (!seg) {
  2646. cnss_pr_err("%s: Failed to allocate mem for seg %d\n",
  2647. __func__, i);
  2648. continue;
  2649. }
  2650. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2651. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2652. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2653. }
  2654. meta_info.entry[dump_seg->type].entry_num++;
  2655. seg->da = dump_seg->address;
  2656. seg->va = dump_seg->v_address;
  2657. seg->size = dump_seg->size;
  2658. list_add_tail(&seg->node, &head);
  2659. dump_seg++;
  2660. }
  2661. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2662. if (!seg) {
  2663. cnss_pr_err("%s: Failed to allocate mem for elf ramdump seg\n",
  2664. __func__);
  2665. goto skip_elf_dump;
  2666. }
  2667. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2668. meta_info.version = CNSS_RAMDUMP_VERSION;
  2669. meta_info.chipset = plat_priv->device_id;
  2670. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2671. seg->va = &meta_info;
  2672. seg->size = sizeof(meta_info);
  2673. list_add(&seg->node, &head);
  2674. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2675. skip_elf_dump:
  2676. while (!list_empty(&head)) {
  2677. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2678. list_del(&seg->node);
  2679. kfree(seg);
  2680. }
  2681. return ret;
  2682. }
  2683. #ifdef CONFIG_CNSS2_SSR_DRIVER_DUMP
  2684. /**
  2685. * cnss_host_ramdump_dev_release() - callback function for device release
  2686. * @dev: device to be released
  2687. *
  2688. * Return: None
  2689. */
  2690. static void cnss_host_ramdump_dev_release(struct device *dev)
  2691. {
  2692. cnss_pr_dbg("free host ramdump device\n");
  2693. kfree(dev);
  2694. }
  2695. int cnss_do_host_ramdump(struct cnss_plat_data *plat_priv,
  2696. struct cnss_ssr_driver_dump_entry *ssr_entry,
  2697. size_t num_entries_loaded)
  2698. {
  2699. struct qcom_dump_segment *seg;
  2700. struct cnss_host_dump_meta_info meta_info = {0};
  2701. struct list_head head;
  2702. int dev_ret = 0;
  2703. struct device *new_device;
  2704. static const char * const wlan_str[] = {
  2705. [CNSS_HOST_WLAN_LOGS] = "wlan_logs",
  2706. [CNSS_HOST_HTC_CREDIT] = "htc_credit",
  2707. [CNSS_HOST_WMI_TX_CMP] = "wmi_tx_cmp",
  2708. [CNSS_HOST_WMI_COMMAND_LOG] = "wmi_command_log",
  2709. [CNSS_HOST_WMI_EVENT_LOG] = "wmi_event_log",
  2710. [CNSS_HOST_WMI_RX_EVENT] = "wmi_rx_event",
  2711. [CNSS_HOST_HAL_SOC] = "hal_soc",
  2712. [CNSS_HOST_GWLAN_LOGGING] = "gwlan_logging",
  2713. [CNSS_HOST_WMI_DEBUG_LOG_INFO] = "wmi_debug_log_info",
  2714. [CNSS_HOST_HTC_CREDIT_IDX] = "htc_credit_history_idx",
  2715. [CNSS_HOST_HTC_CREDIT_LEN] = "htc_credit_history_length",
  2716. [CNSS_HOST_WMI_TX_CMP_IDX] = "wmi_tx_cmp_idx",
  2717. [CNSS_HOST_WMI_COMMAND_LOG_IDX] = "wmi_command_log_idx",
  2718. [CNSS_HOST_WMI_EVENT_LOG_IDX] = "wmi_event_log_idx",
  2719. [CNSS_HOST_WMI_RX_EVENT_IDX] = "wmi_rx_event_idx",
  2720. [CNSS_HOST_HIF_CE_DESC_HISTORY_BUFF] = "hif_ce_desc_history_buff",
  2721. [CNSS_HOST_HANG_EVENT_DATA] = "hang_event_data",
  2722. [CNSS_HOST_CE_DESC_HIST] = "hif_ce_desc_hist",
  2723. [CNSS_HOST_CE_COUNT_MAX] = "hif_ce_count_max",
  2724. [CNSS_HOST_CE_HISTORY_MAX] = "hif_ce_history_max",
  2725. [CNSS_HOST_ONLY_FOR_CRIT_CE] = "hif_ce_only_for_crit",
  2726. [CNSS_HOST_HIF_EVENT_HISTORY] = "hif_event_history",
  2727. [CNSS_HOST_HIF_EVENT_HIST_MAX] = "hif_event_hist_max",
  2728. [CNSS_HOST_DP_WBM_DESC_REL] = "wbm_desc_rel_ring",
  2729. [CNSS_HOST_DP_WBM_DESC_REL_HANDLE] = "wbm_desc_rel_ring_handle",
  2730. [CNSS_HOST_DP_TCL_CMD] = "tcl_cmd_ring",
  2731. [CNSS_HOST_DP_TCL_CMD_HANDLE] = "tcl_cmd_ring_handle",
  2732. [CNSS_HOST_DP_TCL_STATUS] = "tcl_status_ring",
  2733. [CNSS_HOST_DP_TCL_STATUS_HANDLE] = "tcl_status_ring_handle",
  2734. [CNSS_HOST_DP_REO_REINJ] = "reo_reinject_ring",
  2735. [CNSS_HOST_DP_REO_REINJ_HANDLE] = "reo_reinject_ring_handle",
  2736. [CNSS_HOST_DP_RX_REL] = "rx_rel_ring",
  2737. [CNSS_HOST_DP_RX_REL_HANDLE] = "rx_rel_ring_handle",
  2738. [CNSS_HOST_DP_REO_EXP] = "reo_exception_ring",
  2739. [CNSS_HOST_DP_REO_EXP_HANDLE] = "reo_exception_ring_handle",
  2740. [CNSS_HOST_DP_REO_CMD] = "reo_cmd_ring",
  2741. [CNSS_HOST_DP_REO_CMD_HANDLE] = "reo_cmd_ring_handle",
  2742. [CNSS_HOST_DP_REO_STATUS] = "reo_status_ring",
  2743. [CNSS_HOST_DP_REO_STATUS_HANDLE] = "reo_status_ring_handle",
  2744. [CNSS_HOST_DP_TCL_DATA_0] = "tcl_data_ring_0",
  2745. [CNSS_HOST_DP_TCL_DATA_0_HANDLE] = "tcl_data_ring_0_handle",
  2746. [CNSS_HOST_DP_TX_COMP_0] = "tx_comp_ring_0",
  2747. [CNSS_HOST_DP_TX_COMP_0_HANDLE] = "tx_comp_ring_0_handle",
  2748. [CNSS_HOST_DP_TCL_DATA_1] = "tcl_data_ring_1",
  2749. [CNSS_HOST_DP_TCL_DATA_1_HANDLE] = "tcl_data_ring_1_handle",
  2750. [CNSS_HOST_DP_TX_COMP_1] = "tx_comp_ring_1",
  2751. [CNSS_HOST_DP_TX_COMP_1_HANDLE] = "tx_comp_ring_1_handle",
  2752. [CNSS_HOST_DP_TCL_DATA_2] = "tcl_data_ring_2",
  2753. [CNSS_HOST_DP_TCL_DATA_2_HANDLE] = "tcl_data_ring_2_handle",
  2754. [CNSS_HOST_DP_TX_COMP_2] = "tx_comp_ring_2",
  2755. [CNSS_HOST_DP_TX_COMP_2_HANDLE] = "tx_comp_ring_2_handle",
  2756. [CNSS_HOST_DP_REO_DST_0] = "reo_dest_ring_0",
  2757. [CNSS_HOST_DP_REO_DST_0_HANDLE] = "reo_dest_ring_0_handle",
  2758. [CNSS_HOST_DP_REO_DST_1] = "reo_dest_ring_1",
  2759. [CNSS_HOST_DP_REO_DST_1_HANDLE] = "reo_dest_ring_1_handle",
  2760. [CNSS_HOST_DP_REO_DST_2] = "reo_dest_ring_2",
  2761. [CNSS_HOST_DP_REO_DST_2_HANDLE] = "reo_dest_ring_2_handle",
  2762. [CNSS_HOST_DP_REO_DST_3] = "reo_dest_ring_3",
  2763. [CNSS_HOST_DP_REO_DST_3_HANDLE] = "reo_dest_ring_3_handle",
  2764. [CNSS_HOST_DP_REO_DST_4] = "reo_dest_ring_4",
  2765. [CNSS_HOST_DP_REO_DST_4_HANDLE] = "reo_dest_ring_4_handle",
  2766. [CNSS_HOST_DP_REO_DST_5] = "reo_dest_ring_5",
  2767. [CNSS_HOST_DP_REO_DST_5_HANDLE] = "reo_dest_ring_5_handle",
  2768. [CNSS_HOST_DP_REO_DST_6] = "reo_dest_ring_6",
  2769. [CNSS_HOST_DP_REO_DST_6_HANDLE] = "reo_dest_ring_6_handle",
  2770. [CNSS_HOST_DP_REO_DST_7] = "reo_dest_ring_7",
  2771. [CNSS_HOST_DP_REO_DST_7_HANDLE] = "reo_dest_ring_7_handle",
  2772. [CNSS_HOST_DP_PDEV_0] = "dp_pdev_0",
  2773. [CNSS_HOST_DP_WLAN_CFG_CTX] = "wlan_cfg_ctx",
  2774. [CNSS_HOST_DP_SOC] = "dp_soc",
  2775. [CNSS_HOST_HAL_RX_FST] = "hal_rx_fst",
  2776. [CNSS_HOST_DP_FISA] = "dp_fisa",
  2777. [CNSS_HOST_DP_FISA_HW_FSE_TABLE] = "dp_fisa_hw_fse_table",
  2778. [CNSS_HOST_DP_FISA_SW_FSE_TABLE] = "dp_fisa_sw_fse_table",
  2779. [CNSS_HOST_HIF] = "hif",
  2780. [CNSS_HOST_QDF_NBUF_HIST] = "qdf_nbuf_history",
  2781. [CNSS_HOST_TCL_WBM_MAP] = "tcl_wbm_map_array",
  2782. [CNSS_HOST_RX_MAC_BUF_RING_0] = "rx_mac_buf_ring_0",
  2783. [CNSS_HOST_RX_MAC_BUF_RING_0_HANDLE] = "rx_mac_buf_ring_0_handle",
  2784. [CNSS_HOST_RX_MAC_BUF_RING_1] = "rx_mac_buf_ring_1",
  2785. [CNSS_HOST_RX_MAC_BUF_RING_1_HANDLE] = "rx_mac_buf_ring_1_handle",
  2786. [CNSS_HOST_RX_REFILL_0] = "rx_refill_buf_ring_0",
  2787. [CNSS_HOST_RX_REFILL_0_HANDLE] = "rx_refill_buf_ring_0_handle",
  2788. [CNSS_HOST_CE_0] = "ce_0",
  2789. [CNSS_HOST_CE_0_SRC_RING] = "ce_0_src_ring",
  2790. [CNSS_HOST_CE_0_SRC_RING_CTX] = "ce_0_src_ring_ctx",
  2791. [CNSS_HOST_CE_1] = "ce_1",
  2792. [CNSS_HOST_CE_1_STATUS_RING] = "ce_1_status_ring",
  2793. [CNSS_HOST_CE_1_STATUS_RING_CTX] = "ce_1_status_ring_ctx",
  2794. [CNSS_HOST_CE_1_DEST_RING] = "ce_1_dest_ring",
  2795. [CNSS_HOST_CE_1_DEST_RING_CTX] = "ce_1_dest_ring_ctx",
  2796. [CNSS_HOST_CE_2] = "ce_2",
  2797. [CNSS_HOST_CE_2_STATUS_RING] = "ce_2_status_ring",
  2798. [CNSS_HOST_CE_2_STATUS_RING_CTX] = "ce_2_status_ring_ctx",
  2799. [CNSS_HOST_CE_2_DEST_RING] = "ce_2_dest_ring",
  2800. [CNSS_HOST_CE_2_DEST_RING_CTX] = "ce_2_dest_ring_ctx",
  2801. [CNSS_HOST_CE_3] = "ce_3",
  2802. [CNSS_HOST_CE_3_SRC_RING] = "ce_3_src_ring",
  2803. [CNSS_HOST_CE_3_SRC_RING_CTX] = "ce_3_src_ring_ctx",
  2804. [CNSS_HOST_CE_4] = "ce_4",
  2805. [CNSS_HOST_CE_4_SRC_RING] = "ce_4_src_ring",
  2806. [CNSS_HOST_CE_4_SRC_RING_CTX] = "ce_4_src_ring_ctx",
  2807. [CNSS_HOST_CE_5] = "ce_5",
  2808. [CNSS_HOST_CE_6] = "ce_6",
  2809. [CNSS_HOST_CE_7] = "ce_7",
  2810. [CNSS_HOST_CE_7_STATUS_RING] = "ce_7_status_ring",
  2811. [CNSS_HOST_CE_7_STATUS_RING_CTX] = "ce_7_status_ring_ctx",
  2812. [CNSS_HOST_CE_7_DEST_RING] = "ce_7_dest_ring",
  2813. [CNSS_HOST_CE_7_DEST_RING_CTX] = "ce_7_dest_ring_ctx",
  2814. [CNSS_HOST_CE_8] = "ce_8",
  2815. [CNSS_HOST_DP_TCL_DATA_3] = "tcl_data_ring_3",
  2816. [CNSS_HOST_DP_TCL_DATA_3_HANDLE] = "tcl_data_ring_3_handle",
  2817. [CNSS_HOST_DP_TX_COMP_3] = "tx_comp_ring_3",
  2818. [CNSS_HOST_DP_TX_COMP_3_HANDLE] = "tx_comp_ring_3_handle"
  2819. };
  2820. int i;
  2821. int ret = 0;
  2822. enum cnss_host_dump_type j;
  2823. if (!dump_enabled()) {
  2824. cnss_pr_info("Dump collection is not enabled\n");
  2825. return ret;
  2826. }
  2827. new_device = kcalloc(1, sizeof(*new_device), GFP_KERNEL);
  2828. if (!new_device) {
  2829. cnss_pr_err("Failed to alloc device mem\n");
  2830. return -ENOMEM;
  2831. }
  2832. new_device->release = cnss_host_ramdump_dev_release;
  2833. device_initialize(new_device);
  2834. dev_set_name(new_device, "wlan_driver");
  2835. dev_ret = device_add(new_device);
  2836. if (dev_ret) {
  2837. cnss_pr_err("Failed to add new device\n");
  2838. goto put_device;
  2839. }
  2840. INIT_LIST_HEAD(&head);
  2841. for (i = 0; i < num_entries_loaded; i++) {
  2842. /* If region name registered by driver is not present in
  2843. * wlan_str. type for that entry will not be set, but entry will
  2844. * be added. Which will result in entry type being 0. Currently
  2845. * entry type 0 is for wlan_logs, which will result in parsing
  2846. * issue for wlan_logs as parsing is done based upon type field.
  2847. * So initialize type with -1(Invalid) to avoid such issues.
  2848. */
  2849. meta_info.entry[i].type = -1;
  2850. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2851. if (!seg) {
  2852. cnss_pr_err("Failed to alloc seg entry %d\n", i);
  2853. continue;
  2854. }
  2855. seg->va = ssr_entry[i].buffer_pointer;
  2856. seg->da = (dma_addr_t)ssr_entry[i].buffer_pointer;
  2857. seg->size = ssr_entry[i].buffer_size;
  2858. for (j = 0; j < CNSS_HOST_DUMP_TYPE_MAX; j++) {
  2859. if (strcmp(ssr_entry[i].region_name, wlan_str[j]) == 0) {
  2860. meta_info.entry[i].type = j;
  2861. }
  2862. }
  2863. meta_info.entry[i].entry_start = i + 1;
  2864. meta_info.entry[i].entry_num++;
  2865. list_add_tail(&seg->node, &head);
  2866. }
  2867. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2868. if (!seg) {
  2869. cnss_pr_err("%s: Failed to allocate mem for host dump seg\n",
  2870. __func__);
  2871. goto skip_host_dump;
  2872. }
  2873. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2874. meta_info.version = CNSS_RAMDUMP_VERSION;
  2875. meta_info.chipset = plat_priv->device_id;
  2876. meta_info.total_entries = num_entries_loaded;
  2877. seg->va = &meta_info;
  2878. seg->da = (dma_addr_t)&meta_info;
  2879. seg->size = sizeof(meta_info);
  2880. list_add(&seg->node, &head);
  2881. ret = qcom_elf_dump(&head, new_device, ELF_CLASS);
  2882. skip_host_dump:
  2883. while (!list_empty(&head)) {
  2884. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2885. list_del(&seg->node);
  2886. kfree(seg);
  2887. }
  2888. device_del(new_device);
  2889. put_device:
  2890. put_device(new_device);
  2891. cnss_pr_dbg("host ramdump result %d\n", ret);
  2892. return ret;
  2893. }
  2894. #endif
  2895. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2896. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2897. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2898. {
  2899. struct cnss_ramdump_info *ramdump_info;
  2900. struct msm_dump_entry dump_entry;
  2901. ramdump_info = &plat_priv->ramdump_info;
  2902. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2903. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2904. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2905. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2906. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2907. sizeof(ramdump_info->dump_data.name));
  2908. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2909. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2910. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2911. &dump_entry);
  2912. }
  2913. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2914. {
  2915. int ret = 0;
  2916. struct device *dev;
  2917. struct cnss_ramdump_info *ramdump_info;
  2918. u32 ramdump_size = 0;
  2919. dev = &plat_priv->plat_dev->dev;
  2920. ramdump_info = &plat_priv->ramdump_info;
  2921. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2922. /* dt type: legacy or converged */
  2923. ret = of_property_read_u32(dev->of_node,
  2924. "qcom,wlan-ramdump-dynamic",
  2925. &ramdump_size);
  2926. } else {
  2927. ret = of_property_read_u32(plat_priv->dev_node,
  2928. "qcom,wlan-ramdump-dynamic",
  2929. &ramdump_size);
  2930. }
  2931. if (ret == 0) {
  2932. ramdump_info->ramdump_va =
  2933. dma_alloc_coherent(dev, ramdump_size,
  2934. &ramdump_info->ramdump_pa,
  2935. GFP_KERNEL);
  2936. if (ramdump_info->ramdump_va)
  2937. ramdump_info->ramdump_size = ramdump_size;
  2938. }
  2939. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2940. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2941. if (ramdump_info->ramdump_size == 0) {
  2942. cnss_pr_info("Ramdump will not be collected");
  2943. goto out;
  2944. }
  2945. ret = cnss_init_dump_entry(plat_priv);
  2946. if (ret) {
  2947. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2948. goto free_ramdump;
  2949. }
  2950. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2951. if (!ramdump_info->ramdump_dev) {
  2952. cnss_pr_err("Failed to create ramdump device!");
  2953. ret = -ENOMEM;
  2954. goto free_ramdump;
  2955. }
  2956. return 0;
  2957. free_ramdump:
  2958. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2959. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2960. out:
  2961. return ret;
  2962. }
  2963. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2964. {
  2965. struct device *dev;
  2966. struct cnss_ramdump_info *ramdump_info;
  2967. dev = &plat_priv->plat_dev->dev;
  2968. ramdump_info = &plat_priv->ramdump_info;
  2969. if (ramdump_info->ramdump_dev)
  2970. cnss_destroy_ramdump_device(plat_priv,
  2971. ramdump_info->ramdump_dev);
  2972. if (ramdump_info->ramdump_va)
  2973. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2974. ramdump_info->ramdump_va,
  2975. ramdump_info->ramdump_pa);
  2976. }
  2977. /**
  2978. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2979. * @ret: Error returned by msm_dump_data_register_nominidump
  2980. *
  2981. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2982. * ignore failure.
  2983. *
  2984. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2985. */
  2986. static int cnss_ignore_dump_data_reg_fail(int ret)
  2987. {
  2988. return ret;
  2989. }
  2990. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2991. {
  2992. int ret = 0;
  2993. struct cnss_ramdump_info_v2 *info_v2;
  2994. struct cnss_dump_data *dump_data;
  2995. struct msm_dump_entry dump_entry;
  2996. struct device *dev = &plat_priv->plat_dev->dev;
  2997. u32 ramdump_size = 0;
  2998. info_v2 = &plat_priv->ramdump_info_v2;
  2999. dump_data = &info_v2->dump_data;
  3000. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  3001. /* dt type: legacy or converged */
  3002. ret = of_property_read_u32(dev->of_node,
  3003. "qcom,wlan-ramdump-dynamic",
  3004. &ramdump_size);
  3005. } else {
  3006. ret = of_property_read_u32(plat_priv->dev_node,
  3007. "qcom,wlan-ramdump-dynamic",
  3008. &ramdump_size);
  3009. }
  3010. if (ret == 0)
  3011. info_v2->ramdump_size = ramdump_size;
  3012. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  3013. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  3014. if (!info_v2->dump_data_vaddr)
  3015. return -ENOMEM;
  3016. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  3017. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  3018. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  3019. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  3020. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  3021. sizeof(dump_data->name));
  3022. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3023. dump_entry.addr = virt_to_phys(dump_data);
  3024. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  3025. &dump_entry);
  3026. if (ret) {
  3027. ret = cnss_ignore_dump_data_reg_fail(ret);
  3028. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  3029. ret ? "Error" : "Ignoring", ret);
  3030. goto free_ramdump;
  3031. }
  3032. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  3033. if (!info_v2->ramdump_dev) {
  3034. cnss_pr_err("Failed to create ramdump device!\n");
  3035. ret = -ENOMEM;
  3036. goto free_ramdump;
  3037. }
  3038. return 0;
  3039. free_ramdump:
  3040. kfree(info_v2->dump_data_vaddr);
  3041. info_v2->dump_data_vaddr = NULL;
  3042. return ret;
  3043. }
  3044. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  3045. {
  3046. struct cnss_ramdump_info_v2 *info_v2;
  3047. info_v2 = &plat_priv->ramdump_info_v2;
  3048. if (info_v2->ramdump_dev)
  3049. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  3050. kfree(info_v2->dump_data_vaddr);
  3051. info_v2->dump_data_vaddr = NULL;
  3052. info_v2->dump_data_valid = false;
  3053. }
  3054. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  3055. {
  3056. int ret = 0;
  3057. switch (plat_priv->device_id) {
  3058. case QCA6174_DEVICE_ID:
  3059. ret = cnss_register_ramdump_v1(plat_priv);
  3060. break;
  3061. case QCA6290_DEVICE_ID:
  3062. case QCA6390_DEVICE_ID:
  3063. case QCN7605_DEVICE_ID:
  3064. case QCA6490_DEVICE_ID:
  3065. case KIWI_DEVICE_ID:
  3066. case MANGO_DEVICE_ID:
  3067. case PEACH_DEVICE_ID:
  3068. ret = cnss_register_ramdump_v2(plat_priv);
  3069. break;
  3070. default:
  3071. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  3072. ret = -ENODEV;
  3073. break;
  3074. }
  3075. return ret;
  3076. }
  3077. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  3078. {
  3079. switch (plat_priv->device_id) {
  3080. case QCA6174_DEVICE_ID:
  3081. cnss_unregister_ramdump_v1(plat_priv);
  3082. break;
  3083. case QCA6290_DEVICE_ID:
  3084. case QCA6390_DEVICE_ID:
  3085. case QCN7605_DEVICE_ID:
  3086. case QCA6490_DEVICE_ID:
  3087. case KIWI_DEVICE_ID:
  3088. case MANGO_DEVICE_ID:
  3089. case PEACH_DEVICE_ID:
  3090. cnss_unregister_ramdump_v2(plat_priv);
  3091. break;
  3092. default:
  3093. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  3094. break;
  3095. }
  3096. }
  3097. #else
  3098. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  3099. {
  3100. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  3101. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  3102. struct device *dev = &plat_priv->plat_dev->dev;
  3103. u32 ramdump_size = 0;
  3104. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  3105. &ramdump_size) == 0)
  3106. info_v2->ramdump_size = ramdump_size;
  3107. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  3108. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  3109. if (!info_v2->dump_data_vaddr)
  3110. return -ENOMEM;
  3111. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  3112. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  3113. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  3114. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  3115. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  3116. sizeof(dump_data->name));
  3117. info_v2->ramdump_dev = dev;
  3118. return 0;
  3119. }
  3120. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  3121. {
  3122. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  3123. info_v2->ramdump_dev = NULL;
  3124. kfree(info_v2->dump_data_vaddr);
  3125. info_v2->dump_data_vaddr = NULL;
  3126. info_v2->dump_data_valid = false;
  3127. }
  3128. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  3129. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  3130. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  3131. phys_addr_t *pa, unsigned long attrs)
  3132. {
  3133. struct sg_table sgt;
  3134. int ret;
  3135. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  3136. if (ret) {
  3137. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  3138. va, &dma, size, attrs);
  3139. return -EINVAL;
  3140. }
  3141. *pa = page_to_phys(sg_page(sgt.sgl));
  3142. sg_free_table(&sgt);
  3143. return 0;
  3144. }
  3145. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  3146. enum cnss_fw_dump_type type, int seg_no,
  3147. void *va, phys_addr_t pa, size_t size)
  3148. {
  3149. struct md_region md_entry;
  3150. int ret;
  3151. switch (type) {
  3152. case CNSS_FW_IMAGE:
  3153. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  3154. seg_no);
  3155. break;
  3156. case CNSS_FW_RDDM:
  3157. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  3158. seg_no);
  3159. break;
  3160. case CNSS_FW_REMOTE_HEAP:
  3161. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  3162. seg_no);
  3163. break;
  3164. default:
  3165. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3166. return -EINVAL;
  3167. }
  3168. md_entry.phys_addr = pa;
  3169. md_entry.virt_addr = (uintptr_t)va;
  3170. md_entry.size = size;
  3171. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3172. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3173. md_entry.name, va, &pa, size);
  3174. ret = msm_minidump_add_region(&md_entry);
  3175. if (ret < 0)
  3176. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  3177. return ret;
  3178. }
  3179. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3180. enum cnss_fw_dump_type type, int seg_no,
  3181. void *va, phys_addr_t pa, size_t size)
  3182. {
  3183. struct md_region md_entry;
  3184. int ret;
  3185. switch (type) {
  3186. case CNSS_FW_IMAGE:
  3187. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  3188. seg_no);
  3189. break;
  3190. case CNSS_FW_RDDM:
  3191. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  3192. seg_no);
  3193. break;
  3194. case CNSS_FW_REMOTE_HEAP:
  3195. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  3196. seg_no);
  3197. break;
  3198. default:
  3199. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3200. return -EINVAL;
  3201. }
  3202. md_entry.phys_addr = pa;
  3203. md_entry.virt_addr = (uintptr_t)va;
  3204. md_entry.size = size;
  3205. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3206. cnss_pr_vdbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3207. md_entry.name, va, &pa, size);
  3208. ret = msm_minidump_remove_region(&md_entry);
  3209. if (ret)
  3210. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  3211. ret);
  3212. return ret;
  3213. }
  3214. #else
  3215. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  3216. phys_addr_t *pa, unsigned long attrs)
  3217. {
  3218. return 0;
  3219. }
  3220. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  3221. enum cnss_fw_dump_type type, int seg_no,
  3222. void *va, phys_addr_t pa, size_t size)
  3223. {
  3224. return 0;
  3225. }
  3226. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3227. enum cnss_fw_dump_type type, int seg_no,
  3228. void *va, phys_addr_t pa, size_t size)
  3229. {
  3230. return 0;
  3231. }
  3232. #endif /* CONFIG_QCOM_MINIDUMP */
  3233. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  3234. const struct firmware **fw_entry,
  3235. const char *filename)
  3236. {
  3237. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  3238. return request_firmware_direct(fw_entry, filename,
  3239. &plat_priv->plat_dev->dev);
  3240. else
  3241. return firmware_request_nowarn(fw_entry, filename,
  3242. &plat_priv->plat_dev->dev);
  3243. }
  3244. #if IS_ENABLED(CONFIG_INTERCONNECT)
  3245. /**
  3246. * cnss_register_bus_scale() - Setup interconnect voting data
  3247. * @plat_priv: Platform data structure
  3248. *
  3249. * For different interconnect path configured in device tree setup voting data
  3250. * for list of bandwidth requirements.
  3251. *
  3252. * Result: 0 for success. -EINVAL if not configured
  3253. */
  3254. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3255. {
  3256. int ret = -EINVAL;
  3257. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  3258. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3259. struct device *dev = &plat_priv->plat_dev->dev;
  3260. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  3261. ret = of_property_read_u32(dev->of_node,
  3262. "qcom,icc-path-count",
  3263. &plat_priv->icc.path_count);
  3264. if (ret) {
  3265. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  3266. return 0;
  3267. }
  3268. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  3269. "qcom,bus-bw-cfg-count",
  3270. &plat_priv->icc.bus_bw_cfg_count);
  3271. if (ret) {
  3272. cnss_pr_err("Failed to get Bus BW Config table size\n");
  3273. goto cleanup;
  3274. }
  3275. cfg_arr_size = plat_priv->icc.path_count *
  3276. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  3277. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  3278. if (!cfg_arr) {
  3279. cnss_pr_err("Failed to alloc cfg table mem\n");
  3280. ret = -ENOMEM;
  3281. goto cleanup;
  3282. }
  3283. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  3284. "qcom,bus-bw-cfg", cfg_arr,
  3285. cfg_arr_size);
  3286. if (ret) {
  3287. cnss_pr_err("Invalid Bus BW Config Table\n");
  3288. goto cleanup;
  3289. }
  3290. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  3291. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  3292. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  3293. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  3294. GFP_KERNEL);
  3295. if (!bus_bw_info) {
  3296. ret = -ENOMEM;
  3297. goto out;
  3298. }
  3299. ret = of_property_read_string_index(dev->of_node,
  3300. "interconnect-names", idx,
  3301. &bus_bw_info->icc_name);
  3302. if (ret)
  3303. goto out;
  3304. bus_bw_info->icc_path =
  3305. of_icc_get(&plat_priv->plat_dev->dev,
  3306. bus_bw_info->icc_name);
  3307. if (IS_ERR(bus_bw_info->icc_path)) {
  3308. ret = PTR_ERR(bus_bw_info->icc_path);
  3309. if (ret != -EPROBE_DEFER) {
  3310. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  3311. bus_bw_info->icc_name, ret);
  3312. goto out;
  3313. }
  3314. }
  3315. bus_bw_info->cfg_table =
  3316. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  3317. sizeof(*bus_bw_info->cfg_table),
  3318. GFP_KERNEL);
  3319. if (!bus_bw_info->cfg_table) {
  3320. ret = -ENOMEM;
  3321. goto out;
  3322. }
  3323. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  3324. bus_bw_info->icc_name);
  3325. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  3326. CNSS_ICC_VOTE_MAX);
  3327. i < plat_priv->icc.bus_bw_cfg_count;
  3328. i++, j += 2) {
  3329. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  3330. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  3331. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  3332. i, bus_bw_info->cfg_table[i].avg_bw,
  3333. bus_bw_info->cfg_table[i].peak_bw);
  3334. }
  3335. list_add_tail(&bus_bw_info->list,
  3336. &plat_priv->icc.list_head);
  3337. }
  3338. kfree(cfg_arr);
  3339. return 0;
  3340. out:
  3341. list_for_each_entry_safe(bus_bw_info, tmp,
  3342. &plat_priv->icc.list_head, list) {
  3343. list_del(&bus_bw_info->list);
  3344. }
  3345. cleanup:
  3346. kfree(cfg_arr);
  3347. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3348. return ret;
  3349. }
  3350. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  3351. {
  3352. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3353. list_for_each_entry_safe(bus_bw_info, tmp,
  3354. &plat_priv->icc.list_head, list) {
  3355. list_del(&bus_bw_info->list);
  3356. if (bus_bw_info->icc_path)
  3357. icc_put(bus_bw_info->icc_path);
  3358. }
  3359. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3360. }
  3361. #else
  3362. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3363. {
  3364. return 0;
  3365. }
  3366. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  3367. #endif /* CONFIG_INTERCONNECT */
  3368. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  3369. {
  3370. struct cnss_plat_data *plat_priv = cb_ctx;
  3371. if (!plat_priv) {
  3372. cnss_pr_err("%s: Invalid context\n", __func__);
  3373. return;
  3374. }
  3375. if (status) {
  3376. cnss_pr_info("CNSS Daemon connected\n");
  3377. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3378. complete(&plat_priv->daemon_connected);
  3379. } else {
  3380. cnss_pr_info("CNSS Daemon disconnected\n");
  3381. reinit_completion(&plat_priv->daemon_connected);
  3382. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3383. }
  3384. }
  3385. static ssize_t enable_hds_store(struct device *dev,
  3386. struct device_attribute *attr,
  3387. const char *buf, size_t count)
  3388. {
  3389. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3390. unsigned int enable_hds = 0;
  3391. if (!plat_priv)
  3392. return -ENODEV;
  3393. if (sscanf(buf, "%du", &enable_hds) != 1) {
  3394. cnss_pr_err("Invalid enable_hds sysfs command\n");
  3395. return -EINVAL;
  3396. }
  3397. if (enable_hds)
  3398. plat_priv->hds_enabled = true;
  3399. else
  3400. plat_priv->hds_enabled = false;
  3401. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  3402. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  3403. return count;
  3404. }
  3405. static ssize_t recovery_show(struct device *dev,
  3406. struct device_attribute *attr,
  3407. char *buf)
  3408. {
  3409. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3410. u32 buf_size = PAGE_SIZE;
  3411. u32 curr_len = 0;
  3412. u32 buf_written = 0;
  3413. if (!plat_priv)
  3414. return -ENODEV;
  3415. buf_written = scnprintf(buf, buf_size,
  3416. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  3417. "BIT0 -- wlan fw recovery\n"
  3418. "BIT1 -- wlan pcss recovery\n"
  3419. "---------------------------------\n");
  3420. curr_len += buf_written;
  3421. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3422. "WLAN recovery %s[%d]\n",
  3423. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  3424. plat_priv->recovery_enabled);
  3425. curr_len += buf_written;
  3426. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3427. "WLAN PCSS recovery %s[%d]\n",
  3428. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  3429. plat_priv->recovery_pcss_enabled);
  3430. curr_len += buf_written;
  3431. /*
  3432. * Now size of curr_len is not over page size for sure,
  3433. * later if new item or none-fixed size item added, need
  3434. * add check to make sure curr_len is not over page size.
  3435. */
  3436. return curr_len;
  3437. }
  3438. static ssize_t time_sync_period_show(struct device *dev,
  3439. struct device_attribute *attr,
  3440. char *buf)
  3441. {
  3442. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3443. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  3444. plat_priv->ctrl_params.time_sync_period);
  3445. }
  3446. /**
  3447. * cnss_get_min_time_sync_period_by_vote() - Get minimum time sync period
  3448. * @plat_priv: Platform data structure
  3449. *
  3450. * Result: return minimum time sync period present in vote from wlan and sys
  3451. */
  3452. uint32_t cnss_get_min_time_sync_period_by_vote(struct cnss_plat_data *plat_priv)
  3453. {
  3454. unsigned int i, min_time_sync_period = CNSS_TIME_SYNC_PERIOD_INVALID;
  3455. unsigned int time_sync_period;
  3456. for (i = 0; i < TIME_SYNC_VOTE_MAX; i++) {
  3457. time_sync_period = plat_priv->ctrl_params.time_sync_period_vote[i];
  3458. if (min_time_sync_period > time_sync_period)
  3459. min_time_sync_period = time_sync_period;
  3460. }
  3461. return min_time_sync_period;
  3462. }
  3463. static ssize_t time_sync_period_store(struct device *dev,
  3464. struct device_attribute *attr,
  3465. const char *buf, size_t count)
  3466. {
  3467. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3468. unsigned int time_sync_period = 0;
  3469. if (!plat_priv)
  3470. return -ENODEV;
  3471. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  3472. cnss_pr_err("Invalid time sync sysfs command\n");
  3473. return -EINVAL;
  3474. }
  3475. if (time_sync_period < CNSS_MIN_TIME_SYNC_PERIOD) {
  3476. cnss_pr_err("Invalid time sync value\n");
  3477. return -EINVAL;
  3478. }
  3479. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_CNSS] =
  3480. time_sync_period;
  3481. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3482. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3483. cnss_pr_err("Invalid min time sync value\n");
  3484. return -EINVAL;
  3485. }
  3486. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3487. return count;
  3488. }
  3489. /**
  3490. * cnss_update_time_sync_period() - Set time sync period given by driver
  3491. * @dev: device structure
  3492. * @time_sync_period: time sync period value
  3493. *
  3494. * Update time sync period vote of driver and set minimum of time sync period
  3495. * from stored vote through wlan and sys config
  3496. * Result: return 0 for success, error in case of invalid value and no dev
  3497. */
  3498. int cnss_update_time_sync_period(struct device *dev, uint32_t time_sync_period)
  3499. {
  3500. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3501. if (!plat_priv)
  3502. return -ENODEV;
  3503. if (time_sync_period < CNSS_MIN_TIME_SYNC_PERIOD) {
  3504. cnss_pr_err("Invalid time sync value\n");
  3505. return -EINVAL;
  3506. }
  3507. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3508. time_sync_period;
  3509. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3510. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3511. cnss_pr_err("Invalid min time sync value\n");
  3512. return -EINVAL;
  3513. }
  3514. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3515. return 0;
  3516. }
  3517. EXPORT_SYMBOL(cnss_update_time_sync_period);
  3518. /**
  3519. * cnss_reset_time_sync_period() - Reset time sync period
  3520. * @dev: device structure
  3521. *
  3522. * Update time sync period vote of driver as invalid
  3523. * and reset minimum of time sync period from
  3524. * stored vote through wlan and sys config
  3525. * Result: return 0 for success, error in case of no dev
  3526. */
  3527. int cnss_reset_time_sync_period(struct device *dev)
  3528. {
  3529. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3530. unsigned int time_sync_period = 0;
  3531. if (!plat_priv)
  3532. return -ENODEV;
  3533. /* Driver vote is set to invalid in case of reset
  3534. * In this case, only vote valid to check is sys config
  3535. */
  3536. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3537. CNSS_TIME_SYNC_PERIOD_INVALID;
  3538. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3539. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3540. cnss_pr_err("Invalid min time sync value\n");
  3541. return -EINVAL;
  3542. }
  3543. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3544. return 0;
  3545. }
  3546. EXPORT_SYMBOL(cnss_reset_time_sync_period);
  3547. static ssize_t recovery_store(struct device *dev,
  3548. struct device_attribute *attr,
  3549. const char *buf, size_t count)
  3550. {
  3551. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3552. unsigned int recovery = 0;
  3553. if (!plat_priv)
  3554. return -ENODEV;
  3555. if (sscanf(buf, "%du", &recovery) != 1) {
  3556. cnss_pr_err("Invalid recovery sysfs command\n");
  3557. return -EINVAL;
  3558. }
  3559. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  3560. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  3561. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  3562. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  3563. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  3564. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  3565. cnss_send_subsys_restart_level_msg(plat_priv);
  3566. return count;
  3567. }
  3568. static ssize_t shutdown_store(struct device *dev,
  3569. struct device_attribute *attr,
  3570. const char *buf, size_t count)
  3571. {
  3572. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3573. cnss_pr_dbg("Received shutdown notification\n");
  3574. if (plat_priv) {
  3575. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3576. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3577. del_timer(&plat_priv->fw_boot_timer);
  3578. complete_all(&plat_priv->power_up_complete);
  3579. complete_all(&plat_priv->cal_complete);
  3580. cnss_pr_dbg("Shutdown notification handled\n");
  3581. }
  3582. return count;
  3583. }
  3584. static ssize_t fs_ready_store(struct device *dev,
  3585. struct device_attribute *attr,
  3586. const char *buf, size_t count)
  3587. {
  3588. int fs_ready = 0;
  3589. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3590. if (sscanf(buf, "%du", &fs_ready) != 1)
  3591. return -EINVAL;
  3592. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  3593. fs_ready, count);
  3594. if (!plat_priv) {
  3595. cnss_pr_err("plat_priv is NULL\n");
  3596. return count;
  3597. }
  3598. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  3599. cnss_pr_dbg("QMI is bypassed\n");
  3600. return count;
  3601. }
  3602. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  3603. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  3604. cnss_driver_event_post(plat_priv,
  3605. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3606. 0, NULL);
  3607. }
  3608. return count;
  3609. }
  3610. static ssize_t qdss_trace_start_store(struct device *dev,
  3611. struct device_attribute *attr,
  3612. const char *buf, size_t count)
  3613. {
  3614. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3615. wlfw_qdss_trace_start(plat_priv);
  3616. cnss_pr_dbg("Received QDSS start command\n");
  3617. return count;
  3618. }
  3619. static ssize_t qdss_trace_stop_store(struct device *dev,
  3620. struct device_attribute *attr,
  3621. const char *buf, size_t count)
  3622. {
  3623. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3624. u32 option = 0;
  3625. if (sscanf(buf, "%du", &option) != 1)
  3626. return -EINVAL;
  3627. wlfw_qdss_trace_stop(plat_priv, option);
  3628. cnss_pr_dbg("Received QDSS stop command\n");
  3629. return count;
  3630. }
  3631. static ssize_t qdss_conf_download_store(struct device *dev,
  3632. struct device_attribute *attr,
  3633. const char *buf, size_t count)
  3634. {
  3635. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3636. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  3637. cnss_pr_dbg("Received QDSS download config command\n");
  3638. return count;
  3639. }
  3640. static ssize_t hw_trace_override_store(struct device *dev,
  3641. struct device_attribute *attr,
  3642. const char *buf, size_t count)
  3643. {
  3644. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3645. int tmp = 0;
  3646. if (sscanf(buf, "%du", &tmp) != 1)
  3647. return -EINVAL;
  3648. plat_priv->hw_trc_override = tmp;
  3649. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3650. return count;
  3651. }
  3652. static ssize_t charger_mode_store(struct device *dev,
  3653. struct device_attribute *attr,
  3654. const char *buf, size_t count)
  3655. {
  3656. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3657. int tmp = 0;
  3658. if (sscanf(buf, "%du", &tmp) != 1)
  3659. return -EINVAL;
  3660. plat_priv->charger_mode = tmp;
  3661. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  3662. return count;
  3663. }
  3664. static DEVICE_ATTR_WO(fs_ready);
  3665. static DEVICE_ATTR_WO(shutdown);
  3666. static DEVICE_ATTR_RW(recovery);
  3667. static DEVICE_ATTR_WO(enable_hds);
  3668. static DEVICE_ATTR_WO(qdss_trace_start);
  3669. static DEVICE_ATTR_WO(qdss_trace_stop);
  3670. static DEVICE_ATTR_WO(qdss_conf_download);
  3671. static DEVICE_ATTR_WO(hw_trace_override);
  3672. static DEVICE_ATTR_WO(charger_mode);
  3673. static DEVICE_ATTR_RW(time_sync_period);
  3674. static struct attribute *cnss_attrs[] = {
  3675. &dev_attr_fs_ready.attr,
  3676. &dev_attr_shutdown.attr,
  3677. &dev_attr_recovery.attr,
  3678. &dev_attr_enable_hds.attr,
  3679. &dev_attr_qdss_trace_start.attr,
  3680. &dev_attr_qdss_trace_stop.attr,
  3681. &dev_attr_qdss_conf_download.attr,
  3682. &dev_attr_hw_trace_override.attr,
  3683. &dev_attr_charger_mode.attr,
  3684. &dev_attr_time_sync_period.attr,
  3685. NULL,
  3686. };
  3687. static struct attribute_group cnss_attr_group = {
  3688. .attrs = cnss_attrs,
  3689. };
  3690. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3691. {
  3692. struct device *dev = &plat_priv->plat_dev->dev;
  3693. int ret;
  3694. char cnss_name[CNSS_FS_NAME_SIZE];
  3695. char shutdown_name[32];
  3696. if (cnss_is_dual_wlan_enabled()) {
  3697. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3698. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3699. snprintf(shutdown_name, sizeof(shutdown_name),
  3700. "shutdown_wlan_%d", plat_priv->plat_idx);
  3701. } else {
  3702. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3703. snprintf(shutdown_name, sizeof(shutdown_name),
  3704. "shutdown_wlan");
  3705. }
  3706. ret = sysfs_create_link(kernel_kobj, &dev->kobj, cnss_name);
  3707. if (ret) {
  3708. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3709. ret);
  3710. goto out;
  3711. }
  3712. /* This is only for backward compatibility. */
  3713. ret = sysfs_create_link(kernel_kobj, &dev->kobj, shutdown_name);
  3714. if (ret) {
  3715. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3716. ret);
  3717. goto rm_cnss_link;
  3718. }
  3719. return 0;
  3720. rm_cnss_link:
  3721. sysfs_remove_link(kernel_kobj, cnss_name);
  3722. out:
  3723. return ret;
  3724. }
  3725. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3726. {
  3727. char cnss_name[CNSS_FS_NAME_SIZE];
  3728. char shutdown_name[32];
  3729. if (cnss_is_dual_wlan_enabled()) {
  3730. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3731. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3732. snprintf(shutdown_name, sizeof(shutdown_name),
  3733. "shutdown_wlan_%d", plat_priv->plat_idx);
  3734. } else {
  3735. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3736. snprintf(shutdown_name, sizeof(shutdown_name),
  3737. "shutdown_wlan");
  3738. }
  3739. sysfs_remove_link(kernel_kobj, shutdown_name);
  3740. sysfs_remove_link(kernel_kobj, cnss_name);
  3741. }
  3742. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3743. {
  3744. int ret = 0;
  3745. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3746. &cnss_attr_group);
  3747. if (ret) {
  3748. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3749. ret);
  3750. goto out;
  3751. }
  3752. cnss_create_sysfs_link(plat_priv);
  3753. return 0;
  3754. out:
  3755. return ret;
  3756. }
  3757. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 2, 0))
  3758. union cnss_device_group_devres {
  3759. const struct attribute_group *group;
  3760. };
  3761. static void devm_cnss_group_remove(struct device *dev, void *res)
  3762. {
  3763. union cnss_device_group_devres *devres = res;
  3764. const struct attribute_group *group = devres->group;
  3765. cnss_pr_dbg("%s: removing group %p\n", __func__, group);
  3766. sysfs_remove_group(&dev->kobj, group);
  3767. }
  3768. static int devm_cnss_group_match(struct device *dev, void *res, void *data)
  3769. {
  3770. return ((union cnss_device_group_devres *)res) == data;
  3771. }
  3772. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3773. {
  3774. cnss_remove_sysfs_link(plat_priv);
  3775. WARN_ON(devres_release(&plat_priv->plat_dev->dev,
  3776. devm_cnss_group_remove, devm_cnss_group_match,
  3777. (void *)&cnss_attr_group));
  3778. }
  3779. #else
  3780. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3781. {
  3782. cnss_remove_sysfs_link(plat_priv);
  3783. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3784. }
  3785. #endif
  3786. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3787. {
  3788. spin_lock_init(&plat_priv->event_lock);
  3789. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3790. WQ_UNBOUND, 1);
  3791. if (!plat_priv->event_wq) {
  3792. cnss_pr_err("Failed to create event workqueue!\n");
  3793. return -EFAULT;
  3794. }
  3795. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3796. INIT_LIST_HEAD(&plat_priv->event_list);
  3797. return 0;
  3798. }
  3799. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3800. {
  3801. destroy_workqueue(plat_priv->event_wq);
  3802. }
  3803. static int cnss_reboot_notifier(struct notifier_block *nb,
  3804. unsigned long action,
  3805. void *data)
  3806. {
  3807. struct cnss_plat_data *plat_priv =
  3808. container_of(nb, struct cnss_plat_data, reboot_nb);
  3809. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3810. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3811. del_timer(&plat_priv->fw_boot_timer);
  3812. complete_all(&plat_priv->power_up_complete);
  3813. complete_all(&plat_priv->cal_complete);
  3814. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3815. return NOTIFY_DONE;
  3816. }
  3817. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3818. #ifdef CONFIG_CNSS_HW_SECURE_SMEM
  3819. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3820. {
  3821. uint32_t *peripheralStateInfo = NULL;
  3822. size_t size = 0;
  3823. /* Once this flag is set, secure peripheral feature
  3824. * will not be supported till next reboot
  3825. */
  3826. if (plat_priv->sec_peri_feature_disable)
  3827. return 0;
  3828. peripheralStateInfo = qcom_smem_get(QCOM_SMEM_HOST_ANY, PERISEC_SMEM_ID, &size);
  3829. if (IS_ERR_OR_NULL(peripheralStateInfo)) {
  3830. if (PTR_ERR(peripheralStateInfo) != -ENOENT)
  3831. CNSS_ASSERT(0);
  3832. cnss_pr_dbg("Secure HW feature not enabled. ret = %d\n",
  3833. PTR_ERR(peripheralStateInfo));
  3834. plat_priv->sec_peri_feature_disable = true;
  3835. return 0;
  3836. }
  3837. cnss_pr_dbg("Secure HW state: %d\n", *peripheralStateInfo);
  3838. if ((*peripheralStateInfo >> (HW_WIFI_UID - 0x500)) & 0x1)
  3839. set_bit(CNSS_WLAN_HW_DISABLED,
  3840. &plat_priv->driver_state);
  3841. else
  3842. clear_bit(CNSS_WLAN_HW_DISABLED,
  3843. &plat_priv->driver_state);
  3844. return 0;
  3845. }
  3846. #else
  3847. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3848. {
  3849. struct Object client_env;
  3850. struct Object app_object;
  3851. u32 wifi_uid = HW_WIFI_UID;
  3852. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3853. int ret;
  3854. u8 state = 0;
  3855. /* Once this flag is set, secure peripheral feature
  3856. * will not be supported till next reboot
  3857. */
  3858. if (plat_priv->sec_peri_feature_disable)
  3859. return 0;
  3860. /* get rootObj */
  3861. ret = get_client_env_object(&client_env);
  3862. if (ret) {
  3863. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3864. goto end;
  3865. }
  3866. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3867. if (ret) {
  3868. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3869. if (ret == FEATURE_NOT_SUPPORTED) {
  3870. ret = 0; /* Do not Assert */
  3871. plat_priv->sec_peri_feature_disable = true;
  3872. cnss_pr_dbg("Secure HW feature not supported\n");
  3873. }
  3874. goto exit_release_clientenv;
  3875. }
  3876. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3877. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3878. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3879. ObjectCounts_pack(1, 1, 0, 0));
  3880. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3881. if (ret) {
  3882. if (ret == PERIPHERAL_NOT_FOUND) {
  3883. ret = 0; /* Do not Assert */
  3884. plat_priv->sec_peri_feature_disable = true;
  3885. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3886. }
  3887. goto exit_release_app_obj;
  3888. }
  3889. if (state == 1)
  3890. set_bit(CNSS_WLAN_HW_DISABLED,
  3891. &plat_priv->driver_state);
  3892. else
  3893. clear_bit(CNSS_WLAN_HW_DISABLED,
  3894. &plat_priv->driver_state);
  3895. exit_release_app_obj:
  3896. Object_release(app_object);
  3897. exit_release_clientenv:
  3898. Object_release(client_env);
  3899. end:
  3900. if (ret) {
  3901. cnss_pr_err("Unable to get HW disable status\n");
  3902. CNSS_ASSERT(0);
  3903. }
  3904. return ret;
  3905. }
  3906. #endif
  3907. #else
  3908. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3909. {
  3910. return 0;
  3911. }
  3912. #endif
  3913. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  3914. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  3915. {
  3916. }
  3917. #else
  3918. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  3919. {
  3920. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3921. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3922. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3923. }
  3924. #endif
  3925. #if IS_ENABLED(CONFIG_WCNSS_MEM_PRE_ALLOC)
  3926. static void cnss_initialize_mem_pool(unsigned long device_id)
  3927. {
  3928. cnss_initialize_prealloc_pool(device_id);
  3929. }
  3930. static void cnss_deinitialize_mem_pool(void)
  3931. {
  3932. cnss_deinitialize_prealloc_pool();
  3933. }
  3934. #else
  3935. static void cnss_initialize_mem_pool(unsigned long device_id)
  3936. {
  3937. }
  3938. static void cnss_deinitialize_mem_pool(void)
  3939. {
  3940. }
  3941. #endif
  3942. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3943. {
  3944. int ret;
  3945. ret = cnss_init_sol_gpio(plat_priv);
  3946. if (ret)
  3947. return ret;
  3948. timer_setup(&plat_priv->fw_boot_timer,
  3949. cnss_bus_fw_boot_timeout_hdlr, 0);
  3950. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3951. if (ret)
  3952. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3953. ret);
  3954. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3955. init_completion(&plat_priv->power_up_complete);
  3956. init_completion(&plat_priv->cal_complete);
  3957. init_completion(&plat_priv->rddm_complete);
  3958. init_completion(&plat_priv->recovery_complete);
  3959. init_completion(&plat_priv->daemon_connected);
  3960. mutex_init(&plat_priv->dev_lock);
  3961. mutex_init(&plat_priv->driver_ops_lock);
  3962. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3963. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3964. if (ret)
  3965. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3966. ret);
  3967. plat_priv->recovery_ws =
  3968. wakeup_source_register(&plat_priv->plat_dev->dev,
  3969. "CNSS_FW_RECOVERY");
  3970. if (!plat_priv->recovery_ws)
  3971. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3972. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3973. cnss_daemon_connection_update_cb,
  3974. plat_priv);
  3975. if (ret)
  3976. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3977. ret);
  3978. cnss_sram_dump_init(plat_priv);
  3979. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3980. "qcom,rc-ep-short-channel"))
  3981. cnss_set_feature_list(plat_priv, CNSS_RC_EP_ULTRASHORT_CHANNEL_V01);
  3982. if (plat_priv->device_id == PEACH_DEVICE_ID)
  3983. cnss_set_feature_list(plat_priv, CNSS_AUX_UC_SUPPORT_V01);
  3984. return 0;
  3985. }
  3986. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  3987. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  3988. {
  3989. }
  3990. #else
  3991. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  3992. {
  3993. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3994. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3995. kfree(plat_priv->sram_dump);
  3996. }
  3997. #endif
  3998. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3999. {
  4000. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  4001. plat_priv);
  4002. complete_all(&plat_priv->recovery_complete);
  4003. complete_all(&plat_priv->rddm_complete);
  4004. complete_all(&plat_priv->cal_complete);
  4005. complete_all(&plat_priv->power_up_complete);
  4006. complete_all(&plat_priv->daemon_connected);
  4007. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  4008. unregister_reboot_notifier(&plat_priv->reboot_nb);
  4009. del_timer(&plat_priv->fw_boot_timer);
  4010. wakeup_source_unregister(plat_priv->recovery_ws);
  4011. cnss_deinit_sol_gpio(plat_priv);
  4012. cnss_sram_dump_deinit(plat_priv);
  4013. kfree(plat_priv->on_chip_pmic_board_ids);
  4014. }
  4015. static void cnss_init_time_sync_period_default(struct cnss_plat_data *plat_priv)
  4016. {
  4017. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  4018. CNSS_TIME_SYNC_PERIOD_INVALID;
  4019. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_CNSS] =
  4020. CNSS_TIME_SYNC_PERIOD_DEFAULT;
  4021. }
  4022. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  4023. {
  4024. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  4025. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  4026. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4027. "qcom,wlan-cbc-enabled");
  4028. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  4029. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  4030. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  4031. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  4032. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  4033. cnss_init_time_sync_period_default(plat_priv);
  4034. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  4035. * enabled by default
  4036. */
  4037. plat_priv->adsp_pc_enabled = true;
  4038. }
  4039. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  4040. {
  4041. struct device *dev = &plat_priv->plat_dev->dev;
  4042. plat_priv->use_pm_domain =
  4043. of_property_read_bool(dev->of_node, "use-pm-domain");
  4044. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  4045. }
  4046. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  4047. {
  4048. struct device *dev = &plat_priv->plat_dev->dev;
  4049. plat_priv->set_wlaon_pwr_ctrl =
  4050. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  4051. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  4052. plat_priv->set_wlaon_pwr_ctrl);
  4053. }
  4054. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  4055. {
  4056. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4057. "qcom,converged-dt") ||
  4058. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4059. "qcom,same-dt-multi-dev") ||
  4060. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4061. "qcom,multi-wlan-exchg"));
  4062. }
  4063. static const struct platform_device_id cnss_platform_id_table[] = {
  4064. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  4065. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  4066. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  4067. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  4068. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  4069. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  4070. { .name = "peach", .driver_data = PEACH_DEVICE_ID, },
  4071. { .name = "qcaconv", .driver_data = 0, },
  4072. { },
  4073. };
  4074. static const struct of_device_id cnss_of_match_table[] = {
  4075. {
  4076. .compatible = "qcom,cnss",
  4077. .data = (void *)&cnss_platform_id_table[0]},
  4078. {
  4079. .compatible = "qcom,cnss-qca6290",
  4080. .data = (void *)&cnss_platform_id_table[1]},
  4081. {
  4082. .compatible = "qcom,cnss-qca6390",
  4083. .data = (void *)&cnss_platform_id_table[2]},
  4084. {
  4085. .compatible = "qcom,cnss-qca6490",
  4086. .data = (void *)&cnss_platform_id_table[3]},
  4087. {
  4088. .compatible = "qcom,cnss-kiwi",
  4089. .data = (void *)&cnss_platform_id_table[4]},
  4090. {
  4091. .compatible = "qcom,cnss-mango",
  4092. .data = (void *)&cnss_platform_id_table[5]},
  4093. {
  4094. .compatible = "qcom,cnss-peach",
  4095. .data = (void *)&cnss_platform_id_table[6]},
  4096. {
  4097. .compatible = "qcom,cnss-qca-converged",
  4098. .data = (void *)&cnss_platform_id_table[7]},
  4099. { },
  4100. };
  4101. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  4102. static inline bool
  4103. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  4104. {
  4105. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4106. "use-nv-mac");
  4107. }
  4108. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  4109. {
  4110. struct device_node *child;
  4111. u32 id, i;
  4112. int id_n, device_identifier_gpio, ret;
  4113. u8 gpio_value;
  4114. if (plat_priv->dt_type != CNSS_DTT_CONVERGED)
  4115. return 0;
  4116. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  4117. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  4118. if (ret) {
  4119. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  4120. return ret;
  4121. }
  4122. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  4123. gpio_value = gpio_get_value(device_identifier_gpio);
  4124. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  4125. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  4126. child) {
  4127. if (strcmp(child->name, "chip_cfg"))
  4128. continue;
  4129. id_n = of_property_count_u32_elems(child, "supported-ids");
  4130. if (id_n <= 0) {
  4131. cnss_pr_err("Device id is NOT set\n");
  4132. return -EINVAL;
  4133. }
  4134. for (i = 0; i < id_n; i++) {
  4135. ret = of_property_read_u32_index(child,
  4136. "supported-ids",
  4137. i, &id);
  4138. if (ret) {
  4139. cnss_pr_err("Failed to read supported ids\n");
  4140. return -EINVAL;
  4141. }
  4142. if (gpio_value && id == QCA6490_DEVICE_ID) {
  4143. plat_priv->plat_dev->dev.of_node = child;
  4144. plat_priv->device_id = QCA6490_DEVICE_ID;
  4145. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  4146. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  4147. child->name, i, id);
  4148. return 0;
  4149. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  4150. plat_priv->plat_dev->dev.of_node = child;
  4151. plat_priv->device_id = KIWI_DEVICE_ID;
  4152. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  4153. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  4154. child->name, i, id);
  4155. return 0;
  4156. }
  4157. }
  4158. }
  4159. return -EINVAL;
  4160. }
  4161. static inline u32
  4162. cnss_dt_type(struct cnss_plat_data *plat_priv)
  4163. {
  4164. bool is_converged_dt = of_property_read_bool(
  4165. plat_priv->plat_dev->dev.of_node, "qcom,converged-dt");
  4166. bool is_multi_wlan_xchg;
  4167. if (is_converged_dt)
  4168. return CNSS_DTT_CONVERGED;
  4169. is_multi_wlan_xchg = of_property_read_bool(
  4170. plat_priv->plat_dev->dev.of_node, "qcom,multi-wlan-exchg");
  4171. if (is_multi_wlan_xchg)
  4172. return CNSS_DTT_MULTIEXCHG;
  4173. return CNSS_DTT_LEGACY;
  4174. }
  4175. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  4176. {
  4177. int ret = 0;
  4178. int retry = 0;
  4179. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  4180. return 0;
  4181. retry:
  4182. ret = cnss_power_on_device(plat_priv, true);
  4183. if (ret)
  4184. goto end;
  4185. ret = cnss_bus_init(plat_priv);
  4186. if (ret) {
  4187. if ((ret != -EPROBE_DEFER) &&
  4188. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  4189. cnss_power_off_device(plat_priv);
  4190. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  4191. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  4192. goto retry;
  4193. }
  4194. goto power_off;
  4195. }
  4196. return 0;
  4197. power_off:
  4198. cnss_power_off_device(plat_priv);
  4199. end:
  4200. return ret;
  4201. }
  4202. int cnss_wlan_hw_enable(void)
  4203. {
  4204. struct cnss_plat_data *plat_priv;
  4205. int ret = 0;
  4206. if (cnss_is_dual_wlan_enabled())
  4207. plat_priv = cnss_get_first_plat_priv(NULL);
  4208. else
  4209. plat_priv = cnss_get_plat_priv(NULL);
  4210. if (!plat_priv)
  4211. return -ENODEV;
  4212. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  4213. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  4214. goto register_driver;
  4215. ret = cnss_wlan_device_init(plat_priv);
  4216. if (ret) {
  4217. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state))
  4218. CNSS_ASSERT(0);
  4219. return ret;
  4220. }
  4221. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  4222. cnss_driver_event_post(plat_priv,
  4223. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  4224. 0, NULL);
  4225. register_driver:
  4226. if (plat_priv->driver_ops)
  4227. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  4228. return ret;
  4229. }
  4230. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  4231. int cnss_set_wfc_mode(struct device *dev, struct cnss_wfc_cfg cfg)
  4232. {
  4233. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  4234. int ret = 0;
  4235. if (!plat_priv)
  4236. return -ENODEV;
  4237. /* If IMS server is connected, return success without QMI send */
  4238. if (test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  4239. cnss_pr_dbg("Ignore host request as IMS server is connected");
  4240. return ret;
  4241. }
  4242. ret = cnss_wlfw_send_host_wfc_call_status(plat_priv, cfg);
  4243. return ret;
  4244. }
  4245. EXPORT_SYMBOL(cnss_set_wfc_mode);
  4246. static int cnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  4247. unsigned long *thermal_state)
  4248. {
  4249. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4250. if (!tcdev || !tcdev->devdata) {
  4251. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4252. return -EINVAL;
  4253. }
  4254. cnss_tcdev = tcdev->devdata;
  4255. *thermal_state = cnss_tcdev->max_thermal_state;
  4256. return 0;
  4257. }
  4258. static int cnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  4259. unsigned long *thermal_state)
  4260. {
  4261. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4262. if (!tcdev || !tcdev->devdata) {
  4263. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4264. return -EINVAL;
  4265. }
  4266. cnss_tcdev = tcdev->devdata;
  4267. *thermal_state = cnss_tcdev->curr_thermal_state;
  4268. return 0;
  4269. }
  4270. static int cnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  4271. unsigned long thermal_state)
  4272. {
  4273. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4274. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  4275. int ret = 0;
  4276. if (!tcdev || !tcdev->devdata) {
  4277. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4278. return -EINVAL;
  4279. }
  4280. cnss_tcdev = tcdev->devdata;
  4281. if (thermal_state > cnss_tcdev->max_thermal_state)
  4282. return -EINVAL;
  4283. cnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  4284. thermal_state, cnss_tcdev->tcdev_id);
  4285. mutex_lock(&plat_priv->tcdev_lock);
  4286. ret = cnss_bus_set_therm_cdev_state(plat_priv,
  4287. thermal_state,
  4288. cnss_tcdev->tcdev_id);
  4289. if (!ret)
  4290. cnss_tcdev->curr_thermal_state = thermal_state;
  4291. mutex_unlock(&plat_priv->tcdev_lock);
  4292. if (ret) {
  4293. cnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  4294. ret, cnss_tcdev->tcdev_id);
  4295. return ret;
  4296. }
  4297. return 0;
  4298. }
  4299. static struct thermal_cooling_device_ops cnss_cooling_ops = {
  4300. .get_max_state = cnss_tcdev_get_max_state,
  4301. .get_cur_state = cnss_tcdev_get_cur_state,
  4302. .set_cur_state = cnss_tcdev_set_cur_state,
  4303. };
  4304. int cnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  4305. int tcdev_id)
  4306. {
  4307. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4308. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4309. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  4310. struct device_node *dev_node;
  4311. int ret = 0;
  4312. if (!priv) {
  4313. cnss_pr_err("Platform driver is not initialized!\n");
  4314. return -ENODEV;
  4315. }
  4316. cnss_tcdev = kzalloc(sizeof(*cnss_tcdev), GFP_KERNEL);
  4317. if (!cnss_tcdev) {
  4318. cnss_pr_err("Failed to allocate cnss_tcdev object!\n");
  4319. return -ENOMEM;
  4320. }
  4321. cnss_tcdev->tcdev_id = tcdev_id;
  4322. cnss_tcdev->max_thermal_state = max_state;
  4323. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  4324. "qcom,cnss_cdev%d", tcdev_id);
  4325. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  4326. if (!dev_node) {
  4327. cnss_pr_err("Failed to get cooling device node\n");
  4328. kfree(cnss_tcdev);
  4329. return -EINVAL;
  4330. }
  4331. cnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  4332. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  4333. cnss_tcdev->tcdev = thermal_of_cooling_device_register(dev_node,
  4334. cdev_node_name,
  4335. cnss_tcdev,
  4336. &cnss_cooling_ops);
  4337. if (IS_ERR_OR_NULL(cnss_tcdev->tcdev)) {
  4338. ret = PTR_ERR(cnss_tcdev->tcdev);
  4339. cnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  4340. ret, cnss_tcdev->tcdev_id);
  4341. kfree(cnss_tcdev);
  4342. } else {
  4343. cnss_pr_dbg("Cooling device registered for cdev id %d",
  4344. cnss_tcdev->tcdev_id);
  4345. mutex_lock(&priv->tcdev_lock);
  4346. list_add(&cnss_tcdev->tcdev_list,
  4347. &priv->cnss_tcdev_list);
  4348. mutex_unlock(&priv->tcdev_lock);
  4349. }
  4350. } else {
  4351. cnss_pr_dbg("Cooling device registration not supported");
  4352. kfree(cnss_tcdev);
  4353. ret = -EOPNOTSUPP;
  4354. }
  4355. return ret;
  4356. }
  4357. EXPORT_SYMBOL(cnss_thermal_cdev_register);
  4358. void cnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  4359. {
  4360. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4361. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4362. if (!priv) {
  4363. cnss_pr_err("Platform driver is not initialized!\n");
  4364. return;
  4365. }
  4366. mutex_lock(&priv->tcdev_lock);
  4367. while (!list_empty(&priv->cnss_tcdev_list)) {
  4368. cnss_tcdev = list_first_entry(&priv->cnss_tcdev_list,
  4369. struct cnss_thermal_cdev,
  4370. tcdev_list);
  4371. thermal_cooling_device_unregister(cnss_tcdev->tcdev);
  4372. list_del(&cnss_tcdev->tcdev_list);
  4373. kfree(cnss_tcdev);
  4374. }
  4375. mutex_unlock(&priv->tcdev_lock);
  4376. }
  4377. EXPORT_SYMBOL(cnss_thermal_cdev_unregister);
  4378. int cnss_get_curr_therm_cdev_state(struct device *dev,
  4379. unsigned long *thermal_state,
  4380. int tcdev_id)
  4381. {
  4382. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4383. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4384. if (!priv) {
  4385. cnss_pr_err("Platform driver is not initialized!\n");
  4386. return -ENODEV;
  4387. }
  4388. mutex_lock(&priv->tcdev_lock);
  4389. list_for_each_entry(cnss_tcdev, &priv->cnss_tcdev_list, tcdev_list) {
  4390. if (cnss_tcdev->tcdev_id != tcdev_id)
  4391. continue;
  4392. *thermal_state = cnss_tcdev->curr_thermal_state;
  4393. mutex_unlock(&priv->tcdev_lock);
  4394. cnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  4395. cnss_tcdev->curr_thermal_state, tcdev_id);
  4396. return 0;
  4397. }
  4398. mutex_unlock(&priv->tcdev_lock);
  4399. cnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  4400. return -EINVAL;
  4401. }
  4402. EXPORT_SYMBOL(cnss_get_curr_therm_cdev_state);
  4403. static int cnss_probe(struct platform_device *plat_dev)
  4404. {
  4405. int ret = 0;
  4406. struct cnss_plat_data *plat_priv;
  4407. const struct of_device_id *of_id;
  4408. const struct platform_device_id *device_id;
  4409. if (cnss_get_plat_priv(plat_dev)) {
  4410. cnss_pr_err("Driver is already initialized!\n");
  4411. ret = -EEXIST;
  4412. goto out;
  4413. }
  4414. ret = cnss_plat_env_available();
  4415. if (ret)
  4416. goto out;
  4417. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  4418. if (!of_id || !of_id->data) {
  4419. cnss_pr_err("Failed to find of match device!\n");
  4420. ret = -ENODEV;
  4421. goto out;
  4422. }
  4423. device_id = of_id->data;
  4424. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  4425. GFP_KERNEL);
  4426. if (!plat_priv) {
  4427. ret = -ENOMEM;
  4428. goto out;
  4429. }
  4430. plat_priv->plat_dev = plat_dev;
  4431. plat_priv->dev_node = NULL;
  4432. plat_priv->device_id = device_id->driver_data;
  4433. plat_priv->dt_type = cnss_dt_type(plat_priv);
  4434. cnss_pr_dbg("Probing platform driver from dt type: %d\n",
  4435. plat_priv->dt_type);
  4436. plat_priv->use_fw_path_with_prefix =
  4437. cnss_use_fw_path_with_prefix(plat_priv);
  4438. ret = cnss_get_dev_cfg_node(plat_priv);
  4439. if (ret) {
  4440. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  4441. goto reset_plat_dev;
  4442. }
  4443. cnss_initialize_mem_pool(plat_priv->device_id);
  4444. ret = cnss_get_pld_bus_ops_name(plat_priv);
  4445. if (ret)
  4446. cnss_pr_vdbg("Failed to find bus ops name, err = %d\n",
  4447. ret);
  4448. ret = cnss_get_rc_num(plat_priv);
  4449. if (ret)
  4450. cnss_pr_err("Failed to find PCIe RC number, err = %d\n", ret);
  4451. cnss_pr_dbg("rc_num=%d\n", plat_priv->rc_num);
  4452. plat_priv->bus_type = cnss_get_bus_type(plat_priv);
  4453. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  4454. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  4455. cnss_set_plat_priv(plat_dev, plat_priv);
  4456. cnss_set_device_name(plat_priv);
  4457. platform_set_drvdata(plat_dev, plat_priv);
  4458. INIT_LIST_HEAD(&plat_priv->vreg_list);
  4459. INIT_LIST_HEAD(&plat_priv->clk_list);
  4460. cnss_get_pm_domain_info(plat_priv);
  4461. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  4462. cnss_power_misc_params_init(plat_priv);
  4463. cnss_get_tcs_info(plat_priv);
  4464. cnss_get_cpr_info(plat_priv);
  4465. cnss_aop_interface_init(plat_priv);
  4466. cnss_init_control_params(plat_priv);
  4467. ret = cnss_get_resources(plat_priv);
  4468. if (ret)
  4469. goto reset_ctx;
  4470. ret = cnss_register_esoc(plat_priv);
  4471. if (ret)
  4472. goto free_res;
  4473. ret = cnss_register_bus_scale(plat_priv);
  4474. if (ret)
  4475. goto unreg_esoc;
  4476. ret = cnss_create_sysfs(plat_priv);
  4477. if (ret)
  4478. goto unreg_bus_scale;
  4479. ret = cnss_event_work_init(plat_priv);
  4480. if (ret)
  4481. goto remove_sysfs;
  4482. ret = cnss_dms_init(plat_priv);
  4483. if (ret)
  4484. goto deinit_event_work;
  4485. ret = cnss_debugfs_create(plat_priv);
  4486. if (ret)
  4487. goto deinit_dms;
  4488. ret = cnss_misc_init(plat_priv);
  4489. if (ret)
  4490. goto destroy_debugfs;
  4491. ret = cnss_wlan_hw_disable_check(plat_priv);
  4492. if (ret)
  4493. goto deinit_misc;
  4494. /* Make sure all platform related init are done before
  4495. * device power on and bus init.
  4496. */
  4497. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  4498. ret = cnss_wlan_device_init(plat_priv);
  4499. if (ret)
  4500. goto deinit_misc;
  4501. } else {
  4502. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  4503. }
  4504. cnss_register_coex_service(plat_priv);
  4505. cnss_register_ims_service(plat_priv);
  4506. mutex_init(&plat_priv->tcdev_lock);
  4507. INIT_LIST_HEAD(&plat_priv->cnss_tcdev_list);
  4508. cnss_pr_info("Platform driver probed successfully.\n");
  4509. return 0;
  4510. deinit_misc:
  4511. cnss_misc_deinit(plat_priv);
  4512. destroy_debugfs:
  4513. cnss_debugfs_destroy(plat_priv);
  4514. deinit_dms:
  4515. cnss_dms_deinit(plat_priv);
  4516. deinit_event_work:
  4517. cnss_event_work_deinit(plat_priv);
  4518. remove_sysfs:
  4519. cnss_remove_sysfs(plat_priv);
  4520. unreg_bus_scale:
  4521. cnss_unregister_bus_scale(plat_priv);
  4522. unreg_esoc:
  4523. cnss_unregister_esoc(plat_priv);
  4524. free_res:
  4525. cnss_put_resources(plat_priv);
  4526. reset_ctx:
  4527. cnss_aop_interface_deinit(plat_priv);
  4528. platform_set_drvdata(plat_dev, NULL);
  4529. cnss_deinitialize_mem_pool();
  4530. reset_plat_dev:
  4531. cnss_clear_plat_priv(plat_priv);
  4532. out:
  4533. return ret;
  4534. }
  4535. static int cnss_remove(struct platform_device *plat_dev)
  4536. {
  4537. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  4538. plat_priv->audio_iommu_domain = NULL;
  4539. cnss_genl_exit();
  4540. cnss_unregister_ims_service(plat_priv);
  4541. cnss_unregister_coex_service(plat_priv);
  4542. cnss_bus_deinit(plat_priv);
  4543. cnss_misc_deinit(plat_priv);
  4544. cnss_debugfs_destroy(plat_priv);
  4545. cnss_dms_deinit(plat_priv);
  4546. cnss_qmi_deinit(plat_priv);
  4547. cnss_event_work_deinit(plat_priv);
  4548. cnss_cancel_dms_work();
  4549. cnss_remove_sysfs(plat_priv);
  4550. cnss_unregister_bus_scale(plat_priv);
  4551. cnss_unregister_esoc(plat_priv);
  4552. cnss_put_resources(plat_priv);
  4553. cnss_aop_interface_deinit(plat_priv);
  4554. cnss_deinitialize_mem_pool();
  4555. platform_set_drvdata(plat_dev, NULL);
  4556. cnss_clear_plat_priv(plat_priv);
  4557. return 0;
  4558. }
  4559. static struct platform_driver cnss_platform_driver = {
  4560. .probe = cnss_probe,
  4561. .remove = cnss_remove,
  4562. .driver = {
  4563. .name = "cnss2",
  4564. .of_match_table = cnss_of_match_table,
  4565. #ifdef CONFIG_CNSS_ASYNC
  4566. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4567. #endif
  4568. },
  4569. };
  4570. static bool cnss_check_compatible_node(void)
  4571. {
  4572. struct device_node *dn = NULL;
  4573. for_each_matching_node(dn, cnss_of_match_table) {
  4574. if (of_device_is_available(dn)) {
  4575. cnss_allow_driver_loading = true;
  4576. return true;
  4577. }
  4578. }
  4579. return false;
  4580. }
  4581. /**
  4582. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  4583. *
  4584. * Valid device tree node means a node with "compatible" property from the
  4585. * device match table and "status" property is not disabled.
  4586. *
  4587. * Return: true if valid device tree node found, false if not found
  4588. */
  4589. static bool cnss_is_valid_dt_node_found(void)
  4590. {
  4591. struct device_node *dn = NULL;
  4592. for_each_matching_node(dn, cnss_of_match_table) {
  4593. if (of_device_is_available(dn))
  4594. break;
  4595. }
  4596. if (dn)
  4597. return true;
  4598. return false;
  4599. }
  4600. static int __init cnss_initialize(void)
  4601. {
  4602. int ret = 0;
  4603. if (!cnss_is_valid_dt_node_found())
  4604. return -ENODEV;
  4605. if (!cnss_check_compatible_node())
  4606. return ret;
  4607. cnss_debug_init();
  4608. ret = platform_driver_register(&cnss_platform_driver);
  4609. if (ret)
  4610. cnss_debug_deinit();
  4611. ret = cnss_genl_init();
  4612. if (ret < 0)
  4613. cnss_pr_err("CNSS genl init failed %d\n", ret);
  4614. return ret;
  4615. }
  4616. static void __exit cnss_exit(void)
  4617. {
  4618. cnss_genl_exit();
  4619. platform_driver_unregister(&cnss_platform_driver);
  4620. cnss_debug_deinit();
  4621. }
  4622. module_init(cnss_initialize);
  4623. module_exit(cnss_exit);
  4624. MODULE_LICENSE("GPL v2");
  4625. MODULE_DESCRIPTION("CNSS2 Platform Driver");