qcrypto.c 149 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * QTI Crypto driver
  4. *
  5. * Copyright (c) 2010-2021, The Linux Foundation. All rights reserved.
  6. */
  7. #include <linux/module.h>
  8. #include <linux/device.h>
  9. #include <linux/mod_devicetable.h>
  10. #include <linux/clk.h>
  11. #include <linux/cpu.h>
  12. #include <linux/types.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/dma-mapping.h>
  15. #include <linux/dmapool.h>
  16. #include <linux/crypto.h>
  17. #include <linux/kernel.h>
  18. #include <linux/rtnetlink.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/llist.h>
  22. #include <linux/debugfs.h>
  23. #include <linux/workqueue.h>
  24. #include <linux/sched.h>
  25. #include <linux/init.h>
  26. #include <linux/cache.h>
  27. #include "linux/platform_data/qcom_crypto_device.h"
  28. #include <linux/interconnect.h>
  29. #include <linux/hardirq.h>
  30. #include "linux/qcrypto.h"
  31. #include <crypto/ctr.h>
  32. #include <crypto/des.h>
  33. #include <crypto/aes.h>
  34. #include <crypto/sha1.h>
  35. #include <crypto/sha2.h>
  36. #include <crypto/hash.h>
  37. #include <crypto/algapi.h>
  38. #include <crypto/aead.h>
  39. #include <crypto/authenc.h>
  40. #include <crypto/scatterwalk.h>
  41. #include <crypto/skcipher.h>
  42. #include <crypto/internal/skcipher.h>
  43. #include <crypto/internal/hash.h>
  44. #include <crypto/internal/aead.h>
  45. #include "linux/fips_status.h"
  46. #include "qce.h"
  47. #define DEBUG_MAX_FNAME 16
  48. #define DEBUG_MAX_RW_BUF 4096
  49. #define QCRYPTO_BIG_NUMBER 9999999 /* a big number */
  50. /*
  51. * For crypto 5.0 which has burst size alignment requirement.
  52. */
  53. #define MAX_ALIGN_SIZE 0x40
  54. #define QCRYPTO_HIGH_BANDWIDTH_TIMEOUT 1000
  55. /* Status of response workq */
  56. enum resp_workq_sts {
  57. NOT_SCHEDULED = 0,
  58. IS_SCHEDULED = 1,
  59. SCHEDULE_AGAIN = 2
  60. };
  61. /* Status of req processing by CEs */
  62. enum req_processing_sts {
  63. STOPPED = 0,
  64. IN_PROGRESS = 1
  65. };
  66. enum qcrypto_bus_state {
  67. BUS_NO_BANDWIDTH = 0,
  68. BUS_HAS_BANDWIDTH,
  69. BUS_BANDWIDTH_RELEASING,
  70. BUS_BANDWIDTH_ALLOCATING,
  71. BUS_SUSPENDED,
  72. BUS_SUSPENDING,
  73. };
  74. struct crypto_stat {
  75. u64 aead_sha1_aes_enc;
  76. u64 aead_sha1_aes_dec;
  77. u64 aead_sha1_des_enc;
  78. u64 aead_sha1_des_dec;
  79. u64 aead_sha1_3des_enc;
  80. u64 aead_sha1_3des_dec;
  81. u64 aead_sha256_aes_enc;
  82. u64 aead_sha256_aes_dec;
  83. u64 aead_sha256_des_enc;
  84. u64 aead_sha256_des_dec;
  85. u64 aead_sha256_3des_enc;
  86. u64 aead_sha256_3des_dec;
  87. u64 aead_ccm_aes_enc;
  88. u64 aead_ccm_aes_dec;
  89. u64 aead_rfc4309_ccm_aes_enc;
  90. u64 aead_rfc4309_ccm_aes_dec;
  91. u64 aead_op_success;
  92. u64 aead_op_fail;
  93. u64 aead_bad_msg;
  94. u64 sk_cipher_aes_enc;
  95. u64 sk_cipher_aes_dec;
  96. u64 sk_cipher_des_enc;
  97. u64 sk_cipher_des_dec;
  98. u64 sk_cipher_3des_enc;
  99. u64 sk_cipher_3des_dec;
  100. u64 sk_cipher_op_success;
  101. u64 sk_cipher_op_fail;
  102. u64 sha1_digest;
  103. u64 sha256_digest;
  104. u64 sha1_hmac_digest;
  105. u64 sha256_hmac_digest;
  106. u64 ahash_op_success;
  107. u64 ahash_op_fail;
  108. };
  109. static struct crypto_stat _qcrypto_stat;
  110. static struct dentry *_debug_dent;
  111. static char _debug_read_buf[DEBUG_MAX_RW_BUF];
  112. static bool _qcrypto_init_assign;
  113. struct crypto_priv;
  114. struct qcrypto_req_control {
  115. unsigned int index;
  116. bool in_use;
  117. struct crypto_engine *pce;
  118. struct crypto_async_request *req;
  119. struct qcrypto_resp_ctx *arsp;
  120. int res; /* execution result */
  121. };
  122. struct crypto_engine {
  123. struct list_head elist;
  124. void *qce; /* qce handle */
  125. struct platform_device *pdev; /* platform device */
  126. struct crypto_priv *pcp;
  127. struct icc_path *icc_path;
  128. struct crypto_queue req_queue; /*
  129. * request queue for those requests
  130. * that have this engine assigned
  131. * waiting to be executed
  132. */
  133. u64 total_req;
  134. u64 err_req;
  135. u32 unit;
  136. u32 ce_device;
  137. u32 ce_hw_instance;
  138. unsigned int signature;
  139. enum qcrypto_bus_state bw_state;
  140. bool high_bw_req;
  141. struct timer_list bw_reaper_timer;
  142. struct work_struct bw_reaper_ws;
  143. struct work_struct bw_allocate_ws;
  144. /* engine execution sequence number */
  145. u32 active_seq;
  146. /* last QCRYPTO_HIGH_BANDWIDTH_TIMEOUT active_seq */
  147. u32 last_active_seq;
  148. bool check_flag;
  149. /*Added to support multi-requests*/
  150. unsigned int max_req;
  151. struct qcrypto_req_control *preq_pool;
  152. atomic_t req_count;
  153. bool issue_req; /* an request is being issued to qce */
  154. bool first_engine; /* this engine is the first engine or not */
  155. unsigned int irq_cpu; /* the cpu running the irq of this engine */
  156. unsigned int max_req_used; /* debug stats */
  157. };
  158. #define MAX_SMP_CPU 8
  159. struct crypto_priv {
  160. /* CE features supported by target device*/
  161. struct msm_ce_hw_support platform_support;
  162. /* CE features/algorithms supported by HW engine*/
  163. struct ce_hw_support ce_support;
  164. /* the lock protects crypto queue and req */
  165. spinlock_t lock;
  166. /* list of registered algorithms */
  167. struct list_head alg_list;
  168. /* current active request */
  169. struct crypto_async_request *req;
  170. struct work_struct unlock_ce_ws;
  171. struct list_head engine_list; /* list of qcrypto engines */
  172. int32_t total_units; /* total units of engines */
  173. struct mutex engine_lock;
  174. struct crypto_engine *next_engine; /* next assign engine */
  175. struct crypto_queue req_queue; /*
  176. * request queue for those requests
  177. * that waiting for an available
  178. * engine.
  179. */
  180. struct llist_head ordered_resp_list; /* Queue to maintain
  181. * responses in sequence.
  182. */
  183. atomic_t resp_cnt;
  184. struct workqueue_struct *resp_wq;
  185. struct work_struct resp_work; /*
  186. * Workq to send responses
  187. * in sequence.
  188. */
  189. enum resp_workq_sts sched_resp_workq_status;
  190. enum req_processing_sts ce_req_proc_sts;
  191. int cpu_getting_irqs_frm_first_ce;
  192. struct crypto_engine *first_engine;
  193. struct crypto_engine *scheduled_eng; /* last engine scheduled */
  194. /* debug stats */
  195. unsigned int no_avail;
  196. unsigned int resp_stop;
  197. unsigned int resp_start;
  198. unsigned int max_qlen;
  199. unsigned int queue_work_eng3;
  200. unsigned int queue_work_not_eng3;
  201. unsigned int queue_work_not_eng3_nz;
  202. unsigned int max_resp_qlen;
  203. unsigned int max_reorder_cnt;
  204. unsigned int cpu_req[MAX_SMP_CPU+1];
  205. };
  206. static struct crypto_priv qcrypto_dev;
  207. static struct crypto_engine *_qcrypto_static_assign_engine(
  208. struct crypto_priv *cp);
  209. static struct crypto_engine *_avail_eng(struct crypto_priv *cp);
  210. static struct qcrypto_req_control *qcrypto_alloc_req_control(
  211. struct crypto_engine *pce)
  212. {
  213. int i;
  214. struct qcrypto_req_control *pqcrypto_req_control = pce->preq_pool;
  215. unsigned int req_count;
  216. for (i = 0; i < pce->max_req; i++) {
  217. if (!xchg(&pqcrypto_req_control->in_use, true)) {
  218. req_count = atomic_inc_return(&pce->req_count);
  219. if (req_count > pce->max_req_used)
  220. pce->max_req_used = req_count;
  221. return pqcrypto_req_control;
  222. }
  223. pqcrypto_req_control++;
  224. }
  225. return NULL;
  226. }
  227. static void qcrypto_free_req_control(struct crypto_engine *pce,
  228. struct qcrypto_req_control *preq)
  229. {
  230. /* do this before free req */
  231. preq->req = NULL;
  232. preq->arsp = NULL;
  233. /* free req */
  234. if (!xchg(&preq->in_use, false))
  235. pr_warn("request info %pK free already\n", preq);
  236. else
  237. atomic_dec(&pce->req_count);
  238. }
  239. static struct qcrypto_req_control *find_req_control_for_areq(
  240. struct crypto_engine *pce,
  241. struct crypto_async_request *areq)
  242. {
  243. int i;
  244. struct qcrypto_req_control *pqcrypto_req_control = pce->preq_pool;
  245. for (i = 0; i < pce->max_req; i++) {
  246. if (pqcrypto_req_control->req == areq)
  247. return pqcrypto_req_control;
  248. pqcrypto_req_control++;
  249. }
  250. return NULL;
  251. }
  252. static void qcrypto_init_req_control(struct crypto_engine *pce,
  253. struct qcrypto_req_control *pqcrypto_req_control)
  254. {
  255. int i;
  256. pce->preq_pool = pqcrypto_req_control;
  257. atomic_set(&pce->req_count, 0);
  258. for (i = 0; i < pce->max_req; i++) {
  259. pqcrypto_req_control->index = i;
  260. pqcrypto_req_control->in_use = false;
  261. pqcrypto_req_control->pce = pce;
  262. pqcrypto_req_control++;
  263. }
  264. }
  265. static struct crypto_engine *_qrypto_find_pengine_device(struct crypto_priv *cp,
  266. unsigned int device)
  267. {
  268. struct crypto_engine *entry = NULL;
  269. unsigned long flags;
  270. spin_lock_irqsave(&cp->lock, flags);
  271. list_for_each_entry(entry, &cp->engine_list, elist) {
  272. if (entry->ce_device == device)
  273. break;
  274. }
  275. spin_unlock_irqrestore(&cp->lock, flags);
  276. if (((entry != NULL) && (entry->ce_device != device)) ||
  277. (entry == NULL)) {
  278. pr_err("Device node for CE device %d NOT FOUND!!\n",
  279. device);
  280. return NULL;
  281. }
  282. return entry;
  283. }
  284. static struct crypto_engine *_qrypto_find_pengine_device_hw
  285. (struct crypto_priv *cp,
  286. u32 device,
  287. u32 hw_instance)
  288. {
  289. struct crypto_engine *entry = NULL;
  290. unsigned long flags;
  291. spin_lock_irqsave(&cp->lock, flags);
  292. list_for_each_entry(entry, &cp->engine_list, elist) {
  293. if ((entry->ce_device == device) &&
  294. (entry->ce_hw_instance == hw_instance))
  295. break;
  296. }
  297. spin_unlock_irqrestore(&cp->lock, flags);
  298. if (((entry != NULL) &&
  299. ((entry->ce_device != device)
  300. || (entry->ce_hw_instance != hw_instance)))
  301. || (entry == NULL)) {
  302. pr_err("Device node for CE device %d NOT FOUND!!\n",
  303. device);
  304. return NULL;
  305. }
  306. return entry;
  307. }
  308. int qcrypto_get_num_engines(void)
  309. {
  310. struct crypto_priv *cp = &qcrypto_dev;
  311. struct crypto_engine *entry = NULL;
  312. int count = 0;
  313. list_for_each_entry(entry, &cp->engine_list, elist) {
  314. count++;
  315. }
  316. return count;
  317. }
  318. EXPORT_SYMBOL(qcrypto_get_num_engines);
  319. void qcrypto_get_engine_list(size_t num_engines,
  320. struct crypto_engine_entry *arr)
  321. {
  322. struct crypto_priv *cp = &qcrypto_dev;
  323. struct crypto_engine *entry = NULL;
  324. size_t arr_index = 0;
  325. list_for_each_entry(entry, &cp->engine_list, elist) {
  326. arr[arr_index].ce_device = entry->ce_device;
  327. arr[arr_index].hw_instance = entry->ce_hw_instance;
  328. arr_index++;
  329. if (arr_index >= num_engines)
  330. break;
  331. }
  332. }
  333. EXPORT_SYMBOL(qcrypto_get_engine_list);
  334. enum qcrypto_alg_type {
  335. QCRYPTO_ALG_CIPHER = 0,
  336. QCRYPTO_ALG_SHA = 1,
  337. QCRYPTO_ALG_AEAD = 2,
  338. QCRYPTO_ALG_LAST
  339. };
  340. struct qcrypto_alg {
  341. struct list_head entry;
  342. struct skcipher_alg cipher_alg;
  343. struct ahash_alg sha_alg;
  344. struct aead_alg aead_alg;
  345. enum qcrypto_alg_type alg_type;
  346. struct crypto_priv *cp;
  347. };
  348. #define QCRYPTO_MAX_KEY_SIZE 64
  349. /* max of AES_BLOCK_SIZE, DES3_EDE_BLOCK_SIZE */
  350. #define QCRYPTO_MAX_IV_LENGTH 16
  351. #define QCRYPTO_CCM4309_NONCE_LEN 3
  352. struct qcrypto_cipher_ctx {
  353. struct list_head rsp_queue; /* response queue */
  354. struct crypto_engine *pengine; /* fixed engine assigned to this tfm */
  355. struct crypto_priv *cp;
  356. unsigned int flags;
  357. enum qce_hash_alg_enum auth_alg; /* for aead */
  358. u8 auth_key[QCRYPTO_MAX_KEY_SIZE];
  359. u8 iv[QCRYPTO_MAX_IV_LENGTH];
  360. u8 enc_key[QCRYPTO_MAX_KEY_SIZE];
  361. unsigned int enc_key_len;
  362. unsigned int authsize;
  363. unsigned int auth_key_len;
  364. u8 ccm4309_nonce[QCRYPTO_CCM4309_NONCE_LEN];
  365. struct crypto_sync_skcipher *cipher_aes192_fb;
  366. struct crypto_ahash *ahash_aead_aes192_fb;
  367. };
  368. struct qcrypto_resp_ctx {
  369. struct list_head list;
  370. struct llist_node llist;
  371. struct crypto_async_request *async_req; /* async req */
  372. int res; /* execution result */
  373. };
  374. struct qcrypto_cipher_req_ctx {
  375. struct qcrypto_resp_ctx rsp_entry;/* rsp entry. */
  376. struct crypto_engine *pengine; /* engine assigned to this request */
  377. u8 *iv;
  378. u8 rfc4309_iv[QCRYPTO_MAX_IV_LENGTH];
  379. unsigned int ivsize;
  380. int aead;
  381. int ccmtype; /* default: 0, rfc4309: 1 */
  382. struct scatterlist asg; /* Formatted associated data sg */
  383. unsigned char *adata; /* Pointer to formatted assoc data */
  384. enum qce_cipher_alg_enum alg;
  385. enum qce_cipher_dir_enum dir;
  386. enum qce_cipher_mode_enum mode;
  387. struct scatterlist *orig_src; /* Original src sg ptr */
  388. struct scatterlist *orig_dst; /* Original dst sg ptr */
  389. struct scatterlist dsg; /* Dest Data sg */
  390. struct scatterlist ssg; /* Source Data sg */
  391. unsigned char *data; /* Incoming data pointer*/
  392. struct aead_request *aead_req;
  393. struct ahash_request *fb_hash_req;
  394. uint8_t fb_ahash_digest[SHA256_DIGEST_SIZE];
  395. struct scatterlist fb_ablkcipher_src_sg[2];
  396. struct scatterlist fb_ablkcipher_dst_sg[2];
  397. char *fb_aes_iv;
  398. unsigned int fb_ahash_length;
  399. struct skcipher_request *fb_aes_req;
  400. struct scatterlist *fb_aes_src;
  401. struct scatterlist *fb_aes_dst;
  402. unsigned int fb_aes_cryptlen;
  403. };
  404. #define SHA_MAX_BLOCK_SIZE SHA256_BLOCK_SIZE
  405. #define SHA_MAX_STATE_SIZE (SHA256_DIGEST_SIZE / sizeof(u32))
  406. #define SHA_MAX_DIGEST_SIZE SHA256_DIGEST_SIZE
  407. #define MSM_QCRYPTO_REQ_QUEUE_LENGTH 768
  408. #define COMPLETION_CB_BACKLOG_LENGTH_STOP 400
  409. #define COMPLETION_CB_BACKLOG_LENGTH_START \
  410. (COMPLETION_CB_BACKLOG_LENGTH_STOP / 2)
  411. static uint8_t _std_init_vector_sha1_uint8[] = {
  412. 0x67, 0x45, 0x23, 0x01, 0xEF, 0xCD, 0xAB, 0x89,
  413. 0x98, 0xBA, 0xDC, 0xFE, 0x10, 0x32, 0x54, 0x76,
  414. 0xC3, 0xD2, 0xE1, 0xF0
  415. };
  416. /* standard initialization vector for SHA-256, source: FIPS 180-2 */
  417. static uint8_t _std_init_vector_sha256_uint8[] = {
  418. 0x6A, 0x09, 0xE6, 0x67, 0xBB, 0x67, 0xAE, 0x85,
  419. 0x3C, 0x6E, 0xF3, 0x72, 0xA5, 0x4F, 0xF5, 0x3A,
  420. 0x51, 0x0E, 0x52, 0x7F, 0x9B, 0x05, 0x68, 0x8C,
  421. 0x1F, 0x83, 0xD9, 0xAB, 0x5B, 0xE0, 0xCD, 0x19
  422. };
  423. struct qcrypto_sha_ctx {
  424. struct list_head rsp_queue; /* response queue */
  425. struct crypto_engine *pengine; /* fixed engine assigned to this tfm */
  426. struct crypto_priv *cp;
  427. unsigned int flags;
  428. enum qce_hash_alg_enum alg;
  429. uint32_t diglen;
  430. uint32_t authkey_in_len;
  431. uint8_t authkey[SHA_MAX_BLOCK_SIZE];
  432. struct ahash_request *ahash_req;
  433. struct completion ahash_req_complete;
  434. };
  435. struct qcrypto_sha_req_ctx {
  436. struct qcrypto_resp_ctx rsp_entry;/* rsp entry. */
  437. struct crypto_engine *pengine; /* engine assigned to this request */
  438. struct scatterlist *src;
  439. uint32_t nbytes;
  440. struct scatterlist *orig_src; /* Original src sg ptr */
  441. struct scatterlist dsg; /* Data sg */
  442. unsigned char *data; /* Incoming data pointer*/
  443. unsigned char *data2; /* Updated data pointer*/
  444. uint32_t byte_count[4];
  445. u64 count;
  446. uint8_t first_blk;
  447. uint8_t last_blk;
  448. uint8_t trailing_buf[SHA_MAX_BLOCK_SIZE];
  449. uint32_t trailing_buf_len;
  450. /* dma buffer, Internal use */
  451. uint8_t staging_dmabuf
  452. [SHA_MAX_BLOCK_SIZE+SHA_MAX_DIGEST_SIZE+MAX_ALIGN_SIZE];
  453. uint8_t digest[SHA_MAX_DIGEST_SIZE];
  454. struct scatterlist sg[2];
  455. };
  456. static void _byte_stream_to_words(uint32_t *iv, unsigned char *b,
  457. unsigned int len)
  458. {
  459. unsigned int n;
  460. n = len / sizeof(uint32_t);
  461. for (; n > 0; n--) {
  462. *iv = ((*b << 24) & 0xff000000) |
  463. (((*(b+1)) << 16) & 0xff0000) |
  464. (((*(b+2)) << 8) & 0xff00) |
  465. (*(b+3) & 0xff);
  466. b += sizeof(uint32_t);
  467. iv++;
  468. }
  469. n = len % sizeof(uint32_t);
  470. if (n == 3) {
  471. *iv = ((*b << 24) & 0xff000000) |
  472. (((*(b+1)) << 16) & 0xff0000) |
  473. (((*(b+2)) << 8) & 0xff00);
  474. } else if (n == 2) {
  475. *iv = ((*b << 24) & 0xff000000) |
  476. (((*(b+1)) << 16) & 0xff0000);
  477. } else if (n == 1) {
  478. *iv = ((*b << 24) & 0xff000000);
  479. }
  480. }
  481. static void _words_to_byte_stream(uint32_t *iv, unsigned char *b,
  482. unsigned int len)
  483. {
  484. unsigned int n = len / sizeof(uint32_t);
  485. for (; n > 0; n--) {
  486. *b++ = (unsigned char) ((*iv >> 24) & 0xff);
  487. *b++ = (unsigned char) ((*iv >> 16) & 0xff);
  488. *b++ = (unsigned char) ((*iv >> 8) & 0xff);
  489. *b++ = (unsigned char) (*iv & 0xff);
  490. iv++;
  491. }
  492. n = len % sizeof(uint32_t);
  493. if (n == 3) {
  494. *b++ = (unsigned char) ((*iv >> 24) & 0xff);
  495. *b++ = (unsigned char) ((*iv >> 16) & 0xff);
  496. *b = (unsigned char) ((*iv >> 8) & 0xff);
  497. } else if (n == 2) {
  498. *b++ = (unsigned char) ((*iv >> 24) & 0xff);
  499. *b = (unsigned char) ((*iv >> 16) & 0xff);
  500. } else if (n == 1) {
  501. *b = (unsigned char) ((*iv >> 24) & 0xff);
  502. }
  503. }
  504. static void qcrypto_ce_set_bus(struct crypto_engine *pengine,
  505. bool high_bw_req)
  506. {
  507. struct crypto_priv *cp = pengine->pcp;
  508. unsigned int control_flag;
  509. int ret = 0;
  510. if (cp->ce_support.req_bw_before_clk) {
  511. if (high_bw_req)
  512. control_flag = QCE_BW_REQUEST_FIRST;
  513. else
  514. control_flag = QCE_CLK_DISABLE_FIRST;
  515. } else {
  516. if (high_bw_req)
  517. control_flag = QCE_CLK_ENABLE_FIRST;
  518. else
  519. control_flag = QCE_BW_REQUEST_RESET_FIRST;
  520. }
  521. switch (control_flag) {
  522. case QCE_CLK_ENABLE_FIRST:
  523. ret = qce_enable_clk(pengine->qce);
  524. if (ret) {
  525. pr_err("%s Unable enable clk\n", __func__);
  526. return;
  527. }
  528. ret = icc_set_bw(pengine->icc_path,
  529. CRYPTO_AVG_BW, CRYPTO_PEAK_BW);
  530. if (ret) {
  531. pr_err("%s Unable to set high bw\n", __func__);
  532. ret = qce_disable_clk(pengine->qce);
  533. if (ret)
  534. pr_err("%s Unable disable clk\n", __func__);
  535. return;
  536. }
  537. break;
  538. case QCE_BW_REQUEST_FIRST:
  539. ret = icc_set_bw(pengine->icc_path,
  540. CRYPTO_AVG_BW, CRYPTO_PEAK_BW);
  541. if (ret) {
  542. pr_err("%s Unable to set high bw\n", __func__);
  543. return;
  544. }
  545. ret = qce_enable_clk(pengine->qce);
  546. if (ret) {
  547. pr_err("%s Unable enable clk\n", __func__);
  548. ret = icc_set_bw(pengine->icc_path, 0, 0);
  549. if (ret)
  550. pr_err("%s Unable to set low bw\n", __func__);
  551. return;
  552. }
  553. break;
  554. case QCE_CLK_DISABLE_FIRST:
  555. ret = qce_disable_clk(pengine->qce);
  556. if (ret) {
  557. pr_err("%s Unable to disable clk\n", __func__);
  558. return;
  559. }
  560. ret = icc_set_bw(pengine->icc_path, 0, 0);
  561. if (ret) {
  562. pr_err("%s Unable to set low bw\n", __func__);
  563. ret = qce_enable_clk(pengine->qce);
  564. if (ret)
  565. pr_err("%s Unable enable clk\n", __func__);
  566. return;
  567. }
  568. break;
  569. case QCE_BW_REQUEST_RESET_FIRST:
  570. ret = icc_set_bw(pengine->icc_path, 0, 0);
  571. if (ret) {
  572. pr_err("%s Unable to set low bw\n", __func__);
  573. return;
  574. }
  575. ret = qce_disable_clk(pengine->qce);
  576. if (ret) {
  577. pr_err("%s Unable to disable clk\n", __func__);
  578. ret = icc_set_bw(pengine->icc_path,
  579. CRYPTO_AVG_BW, CRYPTO_PEAK_BW);
  580. if (ret)
  581. pr_err("%s Unable to set high bw\n", __func__);
  582. return;
  583. }
  584. break;
  585. default:
  586. return;
  587. }
  588. }
  589. static void qcrypto_bw_reaper_timer_callback(struct timer_list *data)
  590. {
  591. struct crypto_engine *pengine = from_timer(pengine, data,
  592. bw_reaper_timer);
  593. schedule_work(&pengine->bw_reaper_ws);
  594. }
  595. static void qcrypto_bw_set_timeout(struct crypto_engine *pengine)
  596. {
  597. pengine->bw_reaper_timer.expires = jiffies +
  598. msecs_to_jiffies(QCRYPTO_HIGH_BANDWIDTH_TIMEOUT);
  599. mod_timer(&(pengine->bw_reaper_timer),
  600. pengine->bw_reaper_timer.expires);
  601. }
  602. static void qcrypto_ce_bw_allocate_req(struct crypto_engine *pengine)
  603. {
  604. schedule_work(&pengine->bw_allocate_ws);
  605. }
  606. static int _start_qcrypto_process(struct crypto_priv *cp,
  607. struct crypto_engine *pengine);
  608. static void qcrypto_bw_allocate_work(struct work_struct *work)
  609. {
  610. struct crypto_engine *pengine = container_of(work,
  611. struct crypto_engine, bw_allocate_ws);
  612. unsigned long flags;
  613. struct crypto_priv *cp = pengine->pcp;
  614. spin_lock_irqsave(&cp->lock, flags);
  615. pengine->bw_state = BUS_BANDWIDTH_ALLOCATING;
  616. spin_unlock_irqrestore(&cp->lock, flags);
  617. qcrypto_ce_set_bus(pengine, true);
  618. qcrypto_bw_set_timeout(pengine);
  619. spin_lock_irqsave(&cp->lock, flags);
  620. pengine->bw_state = BUS_HAS_BANDWIDTH;
  621. pengine->high_bw_req = false;
  622. pengine->active_seq++;
  623. pengine->check_flag = true;
  624. spin_unlock_irqrestore(&cp->lock, flags);
  625. _start_qcrypto_process(cp, pengine);
  626. };
  627. static void qcrypto_bw_reaper_work(struct work_struct *work)
  628. {
  629. struct crypto_engine *pengine = container_of(work,
  630. struct crypto_engine, bw_reaper_ws);
  631. struct crypto_priv *cp = pengine->pcp;
  632. unsigned long flags;
  633. u32 active_seq;
  634. bool restart = false;
  635. spin_lock_irqsave(&cp->lock, flags);
  636. active_seq = pengine->active_seq;
  637. if (pengine->bw_state == BUS_HAS_BANDWIDTH &&
  638. (active_seq == pengine->last_active_seq)) {
  639. /* check if engine is stuck */
  640. if (atomic_read(&pengine->req_count) > 0) {
  641. if (pengine->check_flag)
  642. dev_warn(&pengine->pdev->dev,
  643. "The engine appears to be stuck seq %d.\n",
  644. active_seq);
  645. pengine->check_flag = false;
  646. goto ret;
  647. }
  648. pengine->bw_state = BUS_BANDWIDTH_RELEASING;
  649. spin_unlock_irqrestore(&cp->lock, flags);
  650. qcrypto_ce_set_bus(pengine, false);
  651. spin_lock_irqsave(&cp->lock, flags);
  652. if (pengine->high_bw_req) {
  653. /* we got request while we are disabling clock */
  654. pengine->bw_state = BUS_BANDWIDTH_ALLOCATING;
  655. spin_unlock_irqrestore(&cp->lock, flags);
  656. qcrypto_ce_set_bus(pengine, true);
  657. spin_lock_irqsave(&cp->lock, flags);
  658. pengine->bw_state = BUS_HAS_BANDWIDTH;
  659. pengine->high_bw_req = false;
  660. restart = true;
  661. } else
  662. pengine->bw_state = BUS_NO_BANDWIDTH;
  663. }
  664. ret:
  665. pengine->last_active_seq = active_seq;
  666. spin_unlock_irqrestore(&cp->lock, flags);
  667. if (restart)
  668. _start_qcrypto_process(cp, pengine);
  669. if (pengine->bw_state != BUS_NO_BANDWIDTH)
  670. qcrypto_bw_set_timeout(pengine);
  671. }
  672. static int qcrypto_count_sg(struct scatterlist *sg, int nbytes)
  673. {
  674. int i;
  675. for (i = 0; nbytes > 0 && sg != NULL; i++, sg = sg_next(sg))
  676. nbytes -= sg->length;
  677. return i;
  678. }
  679. static size_t qcrypto_sg_copy_from_buffer(struct scatterlist *sgl,
  680. unsigned int nents, void *buf, size_t buflen)
  681. {
  682. int i;
  683. size_t offset, len;
  684. for (i = 0, offset = 0; i < nents; ++i) {
  685. len = sg_copy_from_buffer(sgl, 1, buf, buflen);
  686. buf += len;
  687. buflen -= len;
  688. offset += len;
  689. sgl = sg_next(sgl);
  690. }
  691. return offset;
  692. }
  693. static size_t qcrypto_sg_copy_to_buffer(struct scatterlist *sgl,
  694. unsigned int nents, void *buf, size_t buflen)
  695. {
  696. int i;
  697. size_t offset, len;
  698. for (i = 0, offset = 0; i < nents; ++i) {
  699. len = sg_copy_to_buffer(sgl, 1, buf, buflen);
  700. buf += len;
  701. buflen -= len;
  702. offset += len;
  703. sgl = sg_next(sgl);
  704. }
  705. return offset;
  706. }
  707. static struct qcrypto_alg *_qcrypto_sha_alg_alloc(struct crypto_priv *cp,
  708. struct ahash_alg *template)
  709. {
  710. struct qcrypto_alg *q_alg;
  711. q_alg = kzalloc(sizeof(struct qcrypto_alg), GFP_KERNEL);
  712. if (!q_alg)
  713. return ERR_PTR(-ENOMEM);
  714. q_alg->alg_type = QCRYPTO_ALG_SHA;
  715. q_alg->sha_alg = *template;
  716. q_alg->cp = cp;
  717. return q_alg;
  718. }
  719. static struct qcrypto_alg *_qcrypto_cipher_alg_alloc(struct crypto_priv *cp,
  720. struct skcipher_alg *template)
  721. {
  722. struct qcrypto_alg *q_alg;
  723. q_alg = kzalloc(sizeof(struct qcrypto_alg), GFP_KERNEL);
  724. if (!q_alg)
  725. return ERR_PTR(-ENOMEM);
  726. q_alg->alg_type = QCRYPTO_ALG_CIPHER;
  727. q_alg->cipher_alg = *template;
  728. q_alg->cp = cp;
  729. return q_alg;
  730. }
  731. static struct qcrypto_alg *_qcrypto_aead_alg_alloc(struct crypto_priv *cp,
  732. struct aead_alg *template)
  733. {
  734. struct qcrypto_alg *q_alg;
  735. q_alg = kzalloc(sizeof(struct qcrypto_alg), GFP_KERNEL);
  736. if (!q_alg)
  737. return ERR_PTR(-ENOMEM);
  738. q_alg->alg_type = QCRYPTO_ALG_AEAD;
  739. q_alg->aead_alg = *template;
  740. q_alg->cp = cp;
  741. return q_alg;
  742. }
  743. static int _qcrypto_cipher_ctx_init(struct qcrypto_cipher_ctx *ctx,
  744. struct qcrypto_alg *q_alg)
  745. {
  746. if (!ctx || !q_alg) {
  747. pr_err("ctx or q_alg is NULL\n");
  748. return -EINVAL;
  749. }
  750. ctx->flags = 0;
  751. /* update context with ptr to cp */
  752. ctx->cp = q_alg->cp;
  753. /* random first IV */
  754. get_random_bytes(ctx->iv, QCRYPTO_MAX_IV_LENGTH);
  755. if (_qcrypto_init_assign) {
  756. ctx->pengine = _qcrypto_static_assign_engine(ctx->cp);
  757. if (ctx->pengine == NULL)
  758. return -ENODEV;
  759. } else
  760. ctx->pengine = NULL;
  761. INIT_LIST_HEAD(&ctx->rsp_queue);
  762. ctx->auth_alg = QCE_HASH_LAST;
  763. return 0;
  764. }
  765. static int _qcrypto_ahash_cra_init(struct crypto_tfm *tfm)
  766. {
  767. struct crypto_ahash *ahash = __crypto_ahash_cast(tfm);
  768. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(tfm);
  769. struct ahash_alg *alg = container_of(crypto_hash_alg_common(ahash),
  770. struct ahash_alg, halg);
  771. struct qcrypto_alg *q_alg = container_of(alg, struct qcrypto_alg,
  772. sha_alg);
  773. crypto_ahash_set_reqsize(ahash, sizeof(struct qcrypto_sha_req_ctx));
  774. /* update context with ptr to cp */
  775. sha_ctx->cp = q_alg->cp;
  776. sha_ctx->flags = 0;
  777. sha_ctx->ahash_req = NULL;
  778. if (_qcrypto_init_assign) {
  779. sha_ctx->pengine = _qcrypto_static_assign_engine(sha_ctx->cp);
  780. if (sha_ctx->pengine == NULL)
  781. return -ENODEV;
  782. } else
  783. sha_ctx->pengine = NULL;
  784. INIT_LIST_HEAD(&sha_ctx->rsp_queue);
  785. return 0;
  786. }
  787. static void _qcrypto_ahash_cra_exit(struct crypto_tfm *tfm)
  788. {
  789. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(tfm);
  790. if (!list_empty(&sha_ctx->rsp_queue))
  791. pr_err("%s: requests still outstanding\n", __func__);
  792. if (sha_ctx->ahash_req != NULL) {
  793. ahash_request_free(sha_ctx->ahash_req);
  794. sha_ctx->ahash_req = NULL;
  795. }
  796. }
  797. static void _crypto_sha_hmac_ahash_req_complete(
  798. struct crypto_async_request *req, int err);
  799. static int _qcrypto_ahash_hmac_cra_init(struct crypto_tfm *tfm)
  800. {
  801. struct crypto_ahash *ahash = __crypto_ahash_cast(tfm);
  802. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(tfm);
  803. int ret = 0;
  804. ret = _qcrypto_ahash_cra_init(tfm);
  805. if (ret)
  806. return ret;
  807. sha_ctx->ahash_req = ahash_request_alloc(ahash, GFP_KERNEL);
  808. if (sha_ctx->ahash_req == NULL) {
  809. _qcrypto_ahash_cra_exit(tfm);
  810. return -ENOMEM;
  811. }
  812. init_completion(&sha_ctx->ahash_req_complete);
  813. ahash_request_set_callback(sha_ctx->ahash_req,
  814. CRYPTO_TFM_REQ_MAY_BACKLOG,
  815. _crypto_sha_hmac_ahash_req_complete,
  816. &sha_ctx->ahash_req_complete);
  817. crypto_ahash_clear_flags(ahash, ~0);
  818. return 0;
  819. }
  820. static int _qcrypto_skcipher_init(struct crypto_skcipher *tfm)
  821. {
  822. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  823. struct skcipher_alg *alg = crypto_skcipher_alg(tfm);
  824. struct qcrypto_alg *q_alg;
  825. q_alg = container_of(alg, struct qcrypto_alg, cipher_alg);
  826. crypto_skcipher_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  827. return _qcrypto_cipher_ctx_init(ctx, q_alg);
  828. }
  829. static int _qcrypto_aes_skcipher_init(struct crypto_skcipher *tfm)
  830. {
  831. const char *name = crypto_tfm_alg_name(&tfm->base);
  832. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  833. int ret;
  834. struct crypto_priv *cp = &qcrypto_dev;
  835. if (cp->ce_support.use_sw_aes_cbc_ecb_ctr_algo) {
  836. ctx->cipher_aes192_fb = NULL;
  837. return _qcrypto_skcipher_init(tfm);
  838. }
  839. ctx->cipher_aes192_fb = crypto_alloc_sync_skcipher(name, 0,
  840. CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK);
  841. if (IS_ERR(ctx->cipher_aes192_fb)) {
  842. pr_err("Error allocating fallback algo %s\n", name);
  843. ret = PTR_ERR(ctx->cipher_aes192_fb);
  844. ctx->cipher_aes192_fb = NULL;
  845. return ret;
  846. }
  847. return _qcrypto_skcipher_init(tfm);
  848. }
  849. static int _qcrypto_aead_cra_init(struct crypto_aead *tfm)
  850. {
  851. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  852. struct aead_alg *aeadalg = crypto_aead_alg(tfm);
  853. struct qcrypto_alg *q_alg = container_of(aeadalg, struct qcrypto_alg,
  854. aead_alg);
  855. return _qcrypto_cipher_ctx_init(ctx, q_alg);
  856. }
  857. static int _qcrypto_cra_aead_sha1_init(struct crypto_aead *tfm)
  858. {
  859. int rc;
  860. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  861. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  862. rc = _qcrypto_aead_cra_init(tfm);
  863. ctx->auth_alg = QCE_HASH_SHA1_HMAC;
  864. return rc;
  865. }
  866. static int _qcrypto_cra_aead_sha256_init(struct crypto_aead *tfm)
  867. {
  868. int rc;
  869. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  870. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  871. rc = _qcrypto_aead_cra_init(tfm);
  872. ctx->auth_alg = QCE_HASH_SHA256_HMAC;
  873. return rc;
  874. }
  875. static int _qcrypto_cra_aead_ccm_init(struct crypto_aead *tfm)
  876. {
  877. int rc;
  878. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  879. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  880. rc = _qcrypto_aead_cra_init(tfm);
  881. ctx->auth_alg = QCE_HASH_AES_CMAC;
  882. return rc;
  883. }
  884. static int _qcrypto_cra_aead_rfc4309_ccm_init(struct crypto_aead *tfm)
  885. {
  886. int rc;
  887. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  888. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  889. rc = _qcrypto_aead_cra_init(tfm);
  890. ctx->auth_alg = QCE_HASH_AES_CMAC;
  891. return rc;
  892. }
  893. static int _qcrypto_cra_aead_aes_sha1_init(struct crypto_aead *tfm)
  894. {
  895. int rc;
  896. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  897. struct crypto_priv *cp = &qcrypto_dev;
  898. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  899. rc = _qcrypto_aead_cra_init(tfm);
  900. if (rc)
  901. return rc;
  902. ctx->cipher_aes192_fb = NULL;
  903. ctx->ahash_aead_aes192_fb = NULL;
  904. if (!cp->ce_support.aes_key_192) {
  905. ctx->cipher_aes192_fb = crypto_alloc_sync_skcipher(
  906. "cbc(aes)", 0, 0);
  907. if (IS_ERR(ctx->cipher_aes192_fb)) {
  908. ctx->cipher_aes192_fb = NULL;
  909. } else {
  910. ctx->ahash_aead_aes192_fb = crypto_alloc_ahash(
  911. "hmac(sha1)", 0, 0);
  912. if (IS_ERR(ctx->ahash_aead_aes192_fb)) {
  913. ctx->ahash_aead_aes192_fb = NULL;
  914. crypto_free_sync_skcipher(
  915. ctx->cipher_aes192_fb);
  916. ctx->cipher_aes192_fb = NULL;
  917. }
  918. }
  919. }
  920. ctx->auth_alg = QCE_HASH_SHA1_HMAC;
  921. return 0;
  922. }
  923. static int _qcrypto_cra_aead_aes_sha256_init(struct crypto_aead *tfm)
  924. {
  925. int rc;
  926. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  927. struct crypto_priv *cp = &qcrypto_dev;
  928. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  929. rc = _qcrypto_aead_cra_init(tfm);
  930. if (rc)
  931. return rc;
  932. ctx->cipher_aes192_fb = NULL;
  933. ctx->ahash_aead_aes192_fb = NULL;
  934. if (!cp->ce_support.aes_key_192) {
  935. ctx->cipher_aes192_fb = crypto_alloc_sync_skcipher(
  936. "cbc(aes)", 0, 0);
  937. if (IS_ERR(ctx->cipher_aes192_fb)) {
  938. ctx->cipher_aes192_fb = NULL;
  939. } else {
  940. ctx->ahash_aead_aes192_fb = crypto_alloc_ahash(
  941. "hmac(sha256)", 0, 0);
  942. if (IS_ERR(ctx->ahash_aead_aes192_fb)) {
  943. ctx->ahash_aead_aes192_fb = NULL;
  944. crypto_free_sync_skcipher(
  945. ctx->cipher_aes192_fb);
  946. ctx->cipher_aes192_fb = NULL;
  947. }
  948. }
  949. }
  950. ctx->auth_alg = QCE_HASH_SHA256_HMAC;
  951. return 0;
  952. }
  953. static void _qcrypto_skcipher_exit(struct crypto_skcipher *tfm)
  954. {
  955. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  956. if (!list_empty(&ctx->rsp_queue))
  957. pr_err("_qcrypto__cra_skcipher_exit: requests still outstanding\n");
  958. }
  959. static void _qcrypto_aes_skcipher_exit(struct crypto_skcipher *tfm)
  960. {
  961. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  962. _qcrypto_skcipher_exit(tfm);
  963. if (ctx->cipher_aes192_fb)
  964. crypto_free_sync_skcipher(ctx->cipher_aes192_fb);
  965. ctx->cipher_aes192_fb = NULL;
  966. }
  967. static void _qcrypto_cra_aead_exit(struct crypto_aead *tfm)
  968. {
  969. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  970. if (!list_empty(&ctx->rsp_queue))
  971. pr_err("_qcrypto__cra_aead_exit: requests still outstanding\n");
  972. }
  973. static void _qcrypto_cra_aead_aes_exit(struct crypto_aead *tfm)
  974. {
  975. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  976. if (!list_empty(&ctx->rsp_queue))
  977. pr_err("_qcrypto__cra_aead_exit: requests still outstanding\n");
  978. if (ctx->cipher_aes192_fb)
  979. crypto_free_sync_skcipher(ctx->cipher_aes192_fb);
  980. if (ctx->ahash_aead_aes192_fb)
  981. crypto_free_ahash(ctx->ahash_aead_aes192_fb);
  982. ctx->cipher_aes192_fb = NULL;
  983. ctx->ahash_aead_aes192_fb = NULL;
  984. }
  985. static int _disp_stats(int id)
  986. {
  987. struct crypto_stat *pstat;
  988. int len = 0;
  989. unsigned long flags;
  990. struct crypto_priv *cp = &qcrypto_dev;
  991. struct crypto_engine *pe;
  992. int i;
  993. pstat = &_qcrypto_stat;
  994. len = scnprintf(_debug_read_buf, DEBUG_MAX_RW_BUF - 1,
  995. "\nQTI crypto accelerator %d Statistics\n",
  996. id + 1);
  997. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  998. " SK CIPHER AES encryption : %llu\n",
  999. pstat->sk_cipher_aes_enc);
  1000. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1001. " SK CIPHER AES decryption : %llu\n",
  1002. pstat->sk_cipher_aes_dec);
  1003. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1004. " SK CIPHER DES encryption : %llu\n",
  1005. pstat->sk_cipher_des_enc);
  1006. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1007. " SK CIPHER DES decryption : %llu\n",
  1008. pstat->sk_cipher_des_dec);
  1009. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1010. " SK CIPHER 3DES encryption : %llu\n",
  1011. pstat->sk_cipher_3des_enc);
  1012. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1013. " SK CIPHER 3DES decryption : %llu\n",
  1014. pstat->sk_cipher_3des_dec);
  1015. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1016. " SK CIPHER operation success : %llu\n",
  1017. pstat->sk_cipher_op_success);
  1018. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1019. " SK CIPHER operation fail : %llu\n",
  1020. pstat->sk_cipher_op_fail);
  1021. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1022. "\n");
  1023. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1024. " AEAD SHA1-AES encryption : %llu\n",
  1025. pstat->aead_sha1_aes_enc);
  1026. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1027. " AEAD SHA1-AES decryption : %llu\n",
  1028. pstat->aead_sha1_aes_dec);
  1029. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1030. " AEAD SHA1-DES encryption : %llu\n",
  1031. pstat->aead_sha1_des_enc);
  1032. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1033. " AEAD SHA1-DES decryption : %llu\n",
  1034. pstat->aead_sha1_des_dec);
  1035. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1036. " AEAD SHA1-3DES encryption : %llu\n",
  1037. pstat->aead_sha1_3des_enc);
  1038. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1039. " AEAD SHA1-3DES decryption : %llu\n",
  1040. pstat->aead_sha1_3des_dec);
  1041. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1042. " AEAD SHA256-AES encryption : %llu\n",
  1043. pstat->aead_sha256_aes_enc);
  1044. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1045. " AEAD SHA256-AES decryption : %llu\n",
  1046. pstat->aead_sha256_aes_dec);
  1047. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1048. " AEAD SHA256-DES encryption : %llu\n",
  1049. pstat->aead_sha256_des_enc);
  1050. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1051. " AEAD SHA256-DES decryption : %llu\n",
  1052. pstat->aead_sha256_des_dec);
  1053. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1054. " AEAD SHA256-3DES encryption : %llu\n",
  1055. pstat->aead_sha256_3des_enc);
  1056. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1057. " AEAD SHA256-3DES decryption : %llu\n",
  1058. pstat->aead_sha256_3des_dec);
  1059. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1060. " AEAD CCM-AES encryption : %llu\n",
  1061. pstat->aead_ccm_aes_enc);
  1062. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1063. " AEAD CCM-AES decryption : %llu\n",
  1064. pstat->aead_ccm_aes_dec);
  1065. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1066. " AEAD RFC4309-CCM-AES encryption : %llu\n",
  1067. pstat->aead_rfc4309_ccm_aes_enc);
  1068. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1069. " AEAD RFC4309-CCM-AES decryption : %llu\n",
  1070. pstat->aead_rfc4309_ccm_aes_dec);
  1071. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1072. " AEAD operation success : %llu\n",
  1073. pstat->aead_op_success);
  1074. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1075. " AEAD operation fail : %llu\n",
  1076. pstat->aead_op_fail);
  1077. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1078. " AEAD bad message : %llu\n",
  1079. pstat->aead_bad_msg);
  1080. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1081. "\n");
  1082. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1083. " AHASH SHA1 digest : %llu\n",
  1084. pstat->sha1_digest);
  1085. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1086. " AHASH SHA256 digest : %llu\n",
  1087. pstat->sha256_digest);
  1088. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1089. " AHASH SHA1 HMAC digest : %llu\n",
  1090. pstat->sha1_hmac_digest);
  1091. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1092. " AHASH SHA256 HMAC digest : %llu\n",
  1093. pstat->sha256_hmac_digest);
  1094. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1095. " AHASH operation success : %llu\n",
  1096. pstat->ahash_op_success);
  1097. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1098. " AHASH operation fail : %llu\n",
  1099. pstat->ahash_op_fail);
  1100. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1101. " resp start, resp stop, max rsp queue reorder-cnt : %u %u %u %u\n",
  1102. cp->resp_start, cp->resp_stop,
  1103. cp->max_resp_qlen, cp->max_reorder_cnt);
  1104. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1105. " max queue length, no avail : %u %u\n",
  1106. cp->max_qlen, cp->no_avail);
  1107. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1108. " work queue : %u %u %u\n",
  1109. cp->queue_work_eng3,
  1110. cp->queue_work_not_eng3,
  1111. cp->queue_work_not_eng3_nz);
  1112. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1113. "\n");
  1114. spin_lock_irqsave(&cp->lock, flags);
  1115. list_for_each_entry(pe, &cp->engine_list, elist) {
  1116. len += scnprintf(
  1117. _debug_read_buf + len,
  1118. DEBUG_MAX_RW_BUF - len - 1,
  1119. " Engine %4d Req max %d : %llu\n",
  1120. pe->unit,
  1121. pe->max_req_used,
  1122. pe->total_req
  1123. );
  1124. len += scnprintf(
  1125. _debug_read_buf + len,
  1126. DEBUG_MAX_RW_BUF - len - 1,
  1127. " Engine %4d Req Error : %llu\n",
  1128. pe->unit,
  1129. pe->err_req
  1130. );
  1131. qce_get_driver_stats(pe->qce);
  1132. }
  1133. spin_unlock_irqrestore(&cp->lock, flags);
  1134. for (i = 0; i < MAX_SMP_CPU+1; i++)
  1135. if (cp->cpu_req[i])
  1136. len += scnprintf(
  1137. _debug_read_buf + len,
  1138. DEBUG_MAX_RW_BUF - len - 1,
  1139. "CPU %d Issue Req : %d\n",
  1140. i, cp->cpu_req[i]);
  1141. return len;
  1142. }
  1143. static void _qcrypto_remove_engine(struct crypto_engine *pengine)
  1144. {
  1145. struct crypto_priv *cp;
  1146. struct qcrypto_alg *q_alg;
  1147. struct qcrypto_alg *n;
  1148. unsigned long flags;
  1149. struct crypto_engine *pe;
  1150. cp = pengine->pcp;
  1151. spin_lock_irqsave(&cp->lock, flags);
  1152. list_del(&pengine->elist);
  1153. if (pengine->first_engine) {
  1154. cp->first_engine = NULL;
  1155. pe = list_first_entry(&cp->engine_list, struct crypto_engine,
  1156. elist);
  1157. if (pe) {
  1158. pe->first_engine = true;
  1159. cp->first_engine = pe;
  1160. }
  1161. }
  1162. if (cp->next_engine == pengine)
  1163. cp->next_engine = NULL;
  1164. if (cp->scheduled_eng == pengine)
  1165. cp->scheduled_eng = NULL;
  1166. spin_unlock_irqrestore(&cp->lock, flags);
  1167. cp->total_units--;
  1168. cancel_work_sync(&pengine->bw_reaper_ws);
  1169. cancel_work_sync(&pengine->bw_allocate_ws);
  1170. del_timer_sync(&pengine->bw_reaper_timer);
  1171. if (pengine->icc_path)
  1172. icc_put(pengine->icc_path);
  1173. pengine->icc_path = NULL;
  1174. kfree_sensitive(pengine->preq_pool);
  1175. if (cp->total_units)
  1176. return;
  1177. list_for_each_entry_safe(q_alg, n, &cp->alg_list, entry) {
  1178. if (q_alg->alg_type == QCRYPTO_ALG_CIPHER)
  1179. crypto_unregister_skcipher(&q_alg->cipher_alg);
  1180. if (q_alg->alg_type == QCRYPTO_ALG_SHA)
  1181. crypto_unregister_ahash(&q_alg->sha_alg);
  1182. if (q_alg->alg_type == QCRYPTO_ALG_AEAD)
  1183. crypto_unregister_aead(&q_alg->aead_alg);
  1184. list_del(&q_alg->entry);
  1185. kfree_sensitive(q_alg);
  1186. }
  1187. }
  1188. static int _qcrypto_remove(struct platform_device *pdev)
  1189. {
  1190. struct crypto_engine *pengine;
  1191. struct crypto_priv *cp;
  1192. pengine = platform_get_drvdata(pdev);
  1193. if (!pengine)
  1194. return 0;
  1195. cp = pengine->pcp;
  1196. mutex_lock(&cp->engine_lock);
  1197. _qcrypto_remove_engine(pengine);
  1198. mutex_unlock(&cp->engine_lock);
  1199. if (pengine->qce)
  1200. qce_close(pengine->qce);
  1201. kfree_sensitive(pengine);
  1202. return 0;
  1203. }
  1204. static int _qcrypto_check_aes_keylen(struct crypto_priv *cp, unsigned int len)
  1205. {
  1206. switch (len) {
  1207. case AES_KEYSIZE_128:
  1208. case AES_KEYSIZE_256:
  1209. break;
  1210. case AES_KEYSIZE_192:
  1211. if (cp->ce_support.aes_key_192)
  1212. break;
  1213. default:
  1214. //crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  1215. return -EINVAL;
  1216. }
  1217. return 0;
  1218. }
  1219. static int _qcrypto_setkey_aes_192_fallback(struct crypto_skcipher *tfm,
  1220. const u8 *key)
  1221. {
  1222. //struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher);
  1223. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  1224. int ret;
  1225. ctx->enc_key_len = AES_KEYSIZE_192;
  1226. crypto_sync_skcipher_clear_flags(ctx->cipher_aes192_fb,
  1227. CRYPTO_TFM_REQ_MASK);
  1228. crypto_sync_skcipher_set_flags(ctx->cipher_aes192_fb,
  1229. (crypto_skcipher_get_flags(tfm) & CRYPTO_TFM_REQ_MASK));
  1230. ret = crypto_sync_skcipher_setkey(ctx->cipher_aes192_fb, key,
  1231. AES_KEYSIZE_192);
  1232. /*
  1233. * TODO: delete or find equivalent in new crypto_skcipher api
  1234. if (ret) {
  1235. tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK;
  1236. tfm->crt_flags |=
  1237. (cipher->base.crt_flags & CRYPTO_TFM_RES_MASK);
  1238. }
  1239. */
  1240. return ret;
  1241. }
  1242. static int _qcrypto_setkey_aes(struct crypto_skcipher *tfm, const u8 *key,
  1243. unsigned int keylen)
  1244. {
  1245. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  1246. struct crypto_priv *cp = ctx->cp;
  1247. if ((ctx->flags & QCRYPTO_CTX_USE_HW_KEY) == QCRYPTO_CTX_USE_HW_KEY)
  1248. return 0;
  1249. if ((keylen == AES_KEYSIZE_192) && (!cp->ce_support.aes_key_192)
  1250. && ctx->cipher_aes192_fb)
  1251. return _qcrypto_setkey_aes_192_fallback(tfm, key);
  1252. if (_qcrypto_check_aes_keylen(cp, keylen))
  1253. return -EINVAL;
  1254. ctx->enc_key_len = keylen;
  1255. if (!(ctx->flags & QCRYPTO_CTX_USE_PIPE_KEY)) {
  1256. if (key != NULL) {
  1257. memcpy(ctx->enc_key, key, keylen);
  1258. } else {
  1259. pr_err("%s Invalid key pointer\n", __func__);
  1260. return -EINVAL;
  1261. }
  1262. }
  1263. return 0;
  1264. }
  1265. static int _qcrypto_setkey_aes_xts(struct crypto_skcipher *tfm,
  1266. const u8 *key, unsigned int keylen)
  1267. {
  1268. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  1269. struct crypto_priv *cp = ctx->cp;
  1270. if ((ctx->flags & QCRYPTO_CTX_USE_HW_KEY) == QCRYPTO_CTX_USE_HW_KEY)
  1271. return 0;
  1272. if (_qcrypto_check_aes_keylen(cp, keylen/2))
  1273. return -EINVAL;
  1274. ctx->enc_key_len = keylen;
  1275. if (!(ctx->flags & QCRYPTO_CTX_USE_PIPE_KEY)) {
  1276. if (key != NULL) {
  1277. memcpy(ctx->enc_key, key, keylen);
  1278. } else {
  1279. pr_err("%s Invalid key pointer\n", __func__);
  1280. return -EINVAL;
  1281. }
  1282. }
  1283. return 0;
  1284. }
  1285. static int _qcrypto_setkey_des(struct crypto_skcipher *tfm, const u8 *key,
  1286. unsigned int keylen)
  1287. {
  1288. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  1289. struct des_ctx dctx;
  1290. if (!key) {
  1291. pr_err("%s Invalid key pointer\n", __func__);
  1292. return -EINVAL;
  1293. }
  1294. if ((ctx->flags & QCRYPTO_CTX_USE_HW_KEY) == QCRYPTO_CTX_USE_HW_KEY) {
  1295. pr_err("%s HW KEY usage not supported for DES algorithm\n", __func__);
  1296. return 0;
  1297. }
  1298. if (keylen != DES_KEY_SIZE) {
  1299. //crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  1300. return -EINVAL;
  1301. }
  1302. memset(&dctx, 0, sizeof(dctx));
  1303. /*Need to be fixed. Compilation error was seen with the below API.
  1304. Needs to be uncommented and enable
  1305. if (des_expand_key(&dctx, key, keylen) == -ENOKEY) {
  1306. if (crypto_skcipher_get_flags(tfm) & CRYPTO_TFM_REQ_FORBID_WEAK_KEYS)
  1307. return -EINVAL;
  1308. else
  1309. return 0;
  1310. }*/
  1311. /*
  1312. * TODO: delete of find equivalent in skcipher api
  1313. if (ret) {
  1314. tfm->crt_flags |= CRYPTO_TFM_RES_WEAK_KEY;
  1315. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_WEAK_KEY);
  1316. return -EINVAL;
  1317. }
  1318. */
  1319. ctx->enc_key_len = keylen;
  1320. if (!(ctx->flags & QCRYPTO_CTX_USE_PIPE_KEY))
  1321. memcpy(ctx->enc_key, key, keylen);
  1322. return 0;
  1323. }
  1324. static int _qcrypto_setkey_3des(struct crypto_skcipher *tfm, const u8 *key,
  1325. unsigned int keylen)
  1326. {
  1327. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  1328. if ((ctx->flags & QCRYPTO_CTX_USE_HW_KEY) == QCRYPTO_CTX_USE_HW_KEY) {
  1329. pr_err("%s HW KEY usage not supported for 3DES algorithm\n", __func__);
  1330. return 0;
  1331. }
  1332. if (keylen != DES3_EDE_KEY_SIZE) {
  1333. //crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  1334. return -EINVAL;
  1335. }
  1336. ctx->enc_key_len = keylen;
  1337. if (!(ctx->flags & QCRYPTO_CTX_USE_PIPE_KEY)) {
  1338. if (key != NULL) {
  1339. memcpy(ctx->enc_key, key, keylen);
  1340. } else {
  1341. pr_err("%s Invalid key pointer\n", __func__);
  1342. return -EINVAL;
  1343. }
  1344. }
  1345. return 0;
  1346. }
  1347. static void seq_response(struct work_struct *work)
  1348. {
  1349. struct crypto_priv *cp = container_of(work, struct crypto_priv,
  1350. resp_work);
  1351. struct llist_node *list;
  1352. struct llist_node *rev = NULL;
  1353. struct crypto_engine *pengine;
  1354. unsigned long flags;
  1355. int total_unit;
  1356. again:
  1357. list = llist_del_all(&cp->ordered_resp_list);
  1358. if (!list)
  1359. goto end;
  1360. while (list) {
  1361. struct llist_node *t = list;
  1362. list = llist_next(list);
  1363. t->next = rev;
  1364. rev = t;
  1365. }
  1366. while (rev) {
  1367. struct qcrypto_resp_ctx *arsp;
  1368. struct crypto_async_request *areq;
  1369. arsp = container_of(rev, struct qcrypto_resp_ctx, llist);
  1370. rev = llist_next(rev);
  1371. areq = arsp->async_req;
  1372. local_bh_disable();
  1373. areq->complete(areq, arsp->res);
  1374. local_bh_enable();
  1375. atomic_dec(&cp->resp_cnt);
  1376. }
  1377. if (atomic_read(&cp->resp_cnt) < COMPLETION_CB_BACKLOG_LENGTH_START &&
  1378. (cmpxchg(&cp->ce_req_proc_sts, STOPPED, IN_PROGRESS)
  1379. == STOPPED)) {
  1380. cp->resp_start++;
  1381. for (total_unit = cp->total_units; total_unit-- > 0;) {
  1382. spin_lock_irqsave(&cp->lock, flags);
  1383. pengine = _avail_eng(cp);
  1384. spin_unlock_irqrestore(&cp->lock, flags);
  1385. if (pengine)
  1386. _start_qcrypto_process(cp, pengine);
  1387. else
  1388. break;
  1389. }
  1390. }
  1391. end:
  1392. if (cmpxchg(&cp->sched_resp_workq_status, SCHEDULE_AGAIN,
  1393. IS_SCHEDULED) == SCHEDULE_AGAIN)
  1394. goto again;
  1395. else if (cmpxchg(&cp->sched_resp_workq_status, IS_SCHEDULED,
  1396. NOT_SCHEDULED) == SCHEDULE_AGAIN)
  1397. goto end;
  1398. }
  1399. #define SCHEUDLE_RSP_QLEN_THRESHOLD 64
  1400. static void _qcrypto_tfm_complete(struct crypto_engine *pengine, u32 type,
  1401. void *tfm_ctx,
  1402. struct qcrypto_resp_ctx *cur_arsp,
  1403. int res)
  1404. {
  1405. struct crypto_priv *cp = pengine->pcp;
  1406. unsigned long flags;
  1407. struct qcrypto_resp_ctx *arsp;
  1408. struct list_head *plist;
  1409. unsigned int resp_qlen;
  1410. unsigned int cnt = 0;
  1411. switch (type) {
  1412. case CRYPTO_ALG_TYPE_AHASH:
  1413. plist = &((struct qcrypto_sha_ctx *) tfm_ctx)->rsp_queue;
  1414. break;
  1415. case CRYPTO_ALG_TYPE_SKCIPHER:
  1416. case CRYPTO_ALG_TYPE_AEAD:
  1417. default:
  1418. plist = &((struct qcrypto_cipher_ctx *) tfm_ctx)->rsp_queue;
  1419. break;
  1420. }
  1421. spin_lock_irqsave(&cp->lock, flags);
  1422. cur_arsp->res = res;
  1423. while (!list_empty(plist)) {
  1424. arsp = list_first_entry(plist,
  1425. struct qcrypto_resp_ctx, list);
  1426. if (arsp->res == -EINPROGRESS)
  1427. break;
  1428. list_del(&arsp->list);
  1429. llist_add(&arsp->llist, &cp->ordered_resp_list);
  1430. atomic_inc(&cp->resp_cnt);
  1431. cnt++;
  1432. }
  1433. resp_qlen = atomic_read(&cp->resp_cnt);
  1434. if (resp_qlen > cp->max_resp_qlen)
  1435. cp->max_resp_qlen = resp_qlen;
  1436. if (cnt > cp->max_reorder_cnt)
  1437. cp->max_reorder_cnt = cnt;
  1438. if ((resp_qlen >= COMPLETION_CB_BACKLOG_LENGTH_STOP) &&
  1439. cmpxchg(&cp->ce_req_proc_sts, IN_PROGRESS,
  1440. STOPPED) == IN_PROGRESS) {
  1441. cp->resp_stop++;
  1442. }
  1443. spin_unlock_irqrestore(&cp->lock, flags);
  1444. retry:
  1445. if (!llist_empty(&cp->ordered_resp_list)) {
  1446. unsigned int cpu;
  1447. if (pengine->first_engine) {
  1448. cpu = WORK_CPU_UNBOUND;
  1449. cp->queue_work_eng3++;
  1450. } else {
  1451. cp->queue_work_not_eng3++;
  1452. cpu = cp->cpu_getting_irqs_frm_first_ce;
  1453. /*
  1454. * If source not the first engine, and there
  1455. * are outstanding requests going on first engine,
  1456. * skip scheduling of work queue to anticipate
  1457. * more may be coming. If the response queue
  1458. * length exceeds threshold, to avoid further
  1459. * delay, schedule work queue immediately.
  1460. */
  1461. if (cp->first_engine && atomic_read(
  1462. &cp->first_engine->req_count)) {
  1463. if (resp_qlen < SCHEUDLE_RSP_QLEN_THRESHOLD)
  1464. return;
  1465. cp->queue_work_not_eng3_nz++;
  1466. }
  1467. }
  1468. if (cmpxchg(&cp->sched_resp_workq_status, NOT_SCHEDULED,
  1469. IS_SCHEDULED) == NOT_SCHEDULED)
  1470. queue_work_on(cpu, cp->resp_wq, &cp->resp_work);
  1471. else if (cmpxchg(&cp->sched_resp_workq_status, IS_SCHEDULED,
  1472. SCHEDULE_AGAIN) == NOT_SCHEDULED)
  1473. goto retry;
  1474. }
  1475. }
  1476. static void req_done(struct qcrypto_req_control *pqcrypto_req_control)
  1477. {
  1478. struct crypto_engine *pengine;
  1479. struct crypto_async_request *areq;
  1480. struct crypto_priv *cp;
  1481. struct qcrypto_resp_ctx *arsp;
  1482. u32 type = 0;
  1483. void *tfm_ctx = NULL;
  1484. unsigned int cpu;
  1485. int res;
  1486. pengine = pqcrypto_req_control->pce;
  1487. cp = pengine->pcp;
  1488. areq = pqcrypto_req_control->req;
  1489. arsp = pqcrypto_req_control->arsp;
  1490. res = pqcrypto_req_control->res;
  1491. qcrypto_free_req_control(pengine, pqcrypto_req_control);
  1492. if (areq) {
  1493. type = crypto_tfm_alg_type(areq->tfm);
  1494. tfm_ctx = crypto_tfm_ctx(areq->tfm);
  1495. }
  1496. cpu = smp_processor_id();
  1497. pengine->irq_cpu = cpu;
  1498. if (pengine->first_engine) {
  1499. if (cpu != cp->cpu_getting_irqs_frm_first_ce)
  1500. cp->cpu_getting_irqs_frm_first_ce = cpu;
  1501. }
  1502. if (areq)
  1503. _qcrypto_tfm_complete(pengine, type, tfm_ctx, arsp, res);
  1504. if (READ_ONCE(cp->ce_req_proc_sts) == IN_PROGRESS)
  1505. _start_qcrypto_process(cp, pengine);
  1506. }
  1507. static void _qce_ahash_complete(void *cookie, unsigned char *digest,
  1508. unsigned char *authdata, int ret)
  1509. {
  1510. struct ahash_request *areq = (struct ahash_request *) cookie;
  1511. struct crypto_async_request *async_req;
  1512. struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
  1513. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(areq->base.tfm);
  1514. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(areq);
  1515. struct crypto_priv *cp = sha_ctx->cp;
  1516. struct crypto_stat *pstat;
  1517. uint32_t diglen = crypto_ahash_digestsize(ahash);
  1518. uint32_t *auth32 = (uint32_t *)authdata;
  1519. struct crypto_engine *pengine;
  1520. struct qcrypto_req_control *pqcrypto_req_control;
  1521. async_req = &areq->base;
  1522. pstat = &_qcrypto_stat;
  1523. pengine = rctx->pengine;
  1524. pqcrypto_req_control = find_req_control_for_areq(pengine,
  1525. async_req);
  1526. if (pqcrypto_req_control == NULL) {
  1527. pr_err("async request not found\n");
  1528. return;
  1529. }
  1530. #ifdef QCRYPTO_DEBUG
  1531. dev_info(&pengine->pdev->dev, "%s: %pK ret %d\n",
  1532. __func__, areq, ret);
  1533. #endif
  1534. if (digest) {
  1535. memcpy(rctx->digest, digest, diglen);
  1536. if (rctx->last_blk)
  1537. memcpy(areq->result, digest, diglen);
  1538. }
  1539. if (authdata) {
  1540. rctx->byte_count[0] = auth32[0];
  1541. rctx->byte_count[1] = auth32[1];
  1542. rctx->byte_count[2] = auth32[2];
  1543. rctx->byte_count[3] = auth32[3];
  1544. }
  1545. areq->src = rctx->src;
  1546. areq->nbytes = rctx->nbytes;
  1547. rctx->last_blk = 0;
  1548. rctx->first_blk = 0;
  1549. if (ret) {
  1550. pqcrypto_req_control->res = -ENXIO;
  1551. pstat->ahash_op_fail++;
  1552. } else {
  1553. pqcrypto_req_control->res = 0;
  1554. pstat->ahash_op_success++;
  1555. }
  1556. if (cp->ce_support.aligned_only) {
  1557. areq->src = rctx->orig_src;
  1558. kfree(rctx->data);
  1559. }
  1560. req_done(pqcrypto_req_control);
  1561. }
  1562. static void _qce_sk_cipher_complete(void *cookie, unsigned char *icb,
  1563. unsigned char *iv, int ret)
  1564. {
  1565. struct skcipher_request *areq = (struct skcipher_request *) cookie;
  1566. struct crypto_async_request *async_req;
  1567. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
  1568. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  1569. struct crypto_priv *cp = ctx->cp;
  1570. struct crypto_stat *pstat;
  1571. struct qcrypto_cipher_req_ctx *rctx;
  1572. struct crypto_engine *pengine;
  1573. struct qcrypto_req_control *pqcrypto_req_control;
  1574. async_req = &areq->base;
  1575. pstat = &_qcrypto_stat;
  1576. rctx = skcipher_request_ctx(areq);
  1577. pengine = rctx->pengine;
  1578. pqcrypto_req_control = find_req_control_for_areq(pengine,
  1579. async_req);
  1580. if (pqcrypto_req_control == NULL) {
  1581. pr_err("async request not found\n");
  1582. return;
  1583. }
  1584. #ifdef QCRYPTO_DEBUG
  1585. dev_info(&pengine->pdev->dev, "%s: %pK ret %d\n",
  1586. __func__, areq, ret);
  1587. #endif
  1588. if (iv)
  1589. memcpy(ctx->iv, iv, crypto_skcipher_ivsize(tfm));
  1590. if (ret) {
  1591. pqcrypto_req_control->res = -ENXIO;
  1592. pstat->sk_cipher_op_fail++;
  1593. } else {
  1594. pqcrypto_req_control->res = 0;
  1595. pstat->sk_cipher_op_success++;
  1596. }
  1597. if (cp->ce_support.aligned_only) {
  1598. struct qcrypto_cipher_req_ctx *rctx;
  1599. uint32_t num_sg = 0;
  1600. uint32_t bytes = 0;
  1601. rctx = skcipher_request_ctx(areq);
  1602. areq->src = rctx->orig_src;
  1603. areq->dst = rctx->orig_dst;
  1604. num_sg = qcrypto_count_sg(areq->dst, areq->cryptlen);
  1605. bytes = qcrypto_sg_copy_from_buffer(areq->dst, num_sg,
  1606. rctx->data, areq->cryptlen);
  1607. if (bytes != areq->cryptlen)
  1608. pr_warn("bytes copied=0x%x bytes to copy= 0x%x\n",
  1609. bytes, areq->cryptlen);
  1610. kfree_sensitive(rctx->data);
  1611. }
  1612. req_done(pqcrypto_req_control);
  1613. }
  1614. static void _qce_aead_complete(void *cookie, unsigned char *icv,
  1615. unsigned char *iv, int ret)
  1616. {
  1617. struct aead_request *areq = (struct aead_request *) cookie;
  1618. struct crypto_async_request *async_req;
  1619. struct crypto_aead *aead = crypto_aead_reqtfm(areq);
  1620. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(areq->base.tfm);
  1621. struct qcrypto_cipher_req_ctx *rctx;
  1622. struct crypto_stat *pstat;
  1623. struct crypto_engine *pengine;
  1624. struct qcrypto_req_control *pqcrypto_req_control;
  1625. async_req = &areq->base;
  1626. pstat = &_qcrypto_stat;
  1627. rctx = aead_request_ctx(areq);
  1628. pengine = rctx->pengine;
  1629. pqcrypto_req_control = find_req_control_for_areq(pengine,
  1630. async_req);
  1631. if (pqcrypto_req_control == NULL) {
  1632. pr_err("async request not found\n");
  1633. return;
  1634. }
  1635. if (rctx->mode == QCE_MODE_CCM) {
  1636. kfree_sensitive(rctx->adata);
  1637. } else {
  1638. uint32_t ivsize = crypto_aead_ivsize(aead);
  1639. if (ret == 0) {
  1640. if (rctx->dir == QCE_ENCRYPT) {
  1641. /* copy the icv to dst */
  1642. scatterwalk_map_and_copy(icv, areq->dst,
  1643. areq->cryptlen + areq->assoclen,
  1644. ctx->authsize, 1);
  1645. } else {
  1646. unsigned char tmp[SHA256_DIGESTSIZE] = {0};
  1647. /* compare icv from src */
  1648. scatterwalk_map_and_copy(tmp,
  1649. areq->src, areq->assoclen +
  1650. areq->cryptlen - ctx->authsize,
  1651. ctx->authsize, 0);
  1652. ret = memcmp(icv, tmp, ctx->authsize);
  1653. if (ret != 0)
  1654. ret = -EBADMSG;
  1655. }
  1656. } else {
  1657. ret = -ENXIO;
  1658. }
  1659. if (iv)
  1660. memcpy(ctx->iv, iv, ivsize);
  1661. }
  1662. if (ret == (-EBADMSG))
  1663. pstat->aead_bad_msg++;
  1664. else if (ret)
  1665. pstat->aead_op_fail++;
  1666. else
  1667. pstat->aead_op_success++;
  1668. pqcrypto_req_control->res = ret;
  1669. req_done(pqcrypto_req_control);
  1670. }
  1671. static int aead_ccm_set_msg_len(u8 *block, unsigned int msglen, int csize)
  1672. {
  1673. __be32 data;
  1674. memset(block, 0, csize);
  1675. block += csize;
  1676. if (csize >= 4)
  1677. csize = 4;
  1678. else if (msglen > (1 << (8 * csize)))
  1679. return -EOVERFLOW;
  1680. data = cpu_to_be32(msglen);
  1681. memcpy(block - csize, (u8 *)&data + 4 - csize, csize);
  1682. return 0;
  1683. }
  1684. static int qccrypto_set_aead_ccm_nonce(struct qce_req *qreq, uint32_t assoclen)
  1685. {
  1686. unsigned int i = ((unsigned int)qreq->iv[0]) + 1;
  1687. memcpy(&qreq->nonce[0], qreq->iv, qreq->ivsize);
  1688. /*
  1689. * Format control info per RFC 3610 and
  1690. * NIST Special Publication 800-38C
  1691. */
  1692. qreq->nonce[0] |= (8 * ((qreq->authsize - 2) / 2));
  1693. if (assoclen)
  1694. qreq->nonce[0] |= 64;
  1695. if (i > MAX_NONCE)
  1696. return -EINVAL;
  1697. return aead_ccm_set_msg_len(qreq->nonce + 16 - i, qreq->cryptlen, i);
  1698. }
  1699. static int qcrypto_aead_ccm_format_adata(struct qce_req *qreq, uint32_t alen,
  1700. struct scatterlist *sg, unsigned char *adata)
  1701. {
  1702. uint32_t len;
  1703. uint32_t bytes = 0;
  1704. uint32_t num_sg = 0;
  1705. /*
  1706. * Add control info for associated data
  1707. * RFC 3610 and NIST Special Publication 800-38C
  1708. */
  1709. if (alen < 65280) {
  1710. *(__be16 *)adata = cpu_to_be16(alen);
  1711. len = 2;
  1712. } else {
  1713. if ((alen >= 65280) && (alen <= 0xffffffff)) {
  1714. *(__be16 *)adata = cpu_to_be16(0xfffe);
  1715. *(__be32 *)&adata[2] = cpu_to_be32(alen);
  1716. len = 6;
  1717. } else {
  1718. *(__be16 *)adata = cpu_to_be16(0xffff);
  1719. *(__be32 *)&adata[6] = cpu_to_be32(alen);
  1720. len = 10;
  1721. }
  1722. }
  1723. adata += len;
  1724. qreq->assoclen = ALIGN((alen + len), 16);
  1725. num_sg = qcrypto_count_sg(sg, alen);
  1726. bytes = qcrypto_sg_copy_to_buffer(sg, num_sg, adata, alen);
  1727. if (bytes != alen)
  1728. pr_warn("bytes copied=0x%x bytes to copy= 0x%x\n", bytes, alen);
  1729. return 0;
  1730. }
  1731. static int _qcrypto_process_skcipher(struct crypto_engine *pengine,
  1732. struct qcrypto_req_control *pqcrypto_req_control)
  1733. {
  1734. struct crypto_async_request *async_req;
  1735. struct qce_req qreq;
  1736. int ret;
  1737. struct qcrypto_cipher_req_ctx *rctx;
  1738. struct qcrypto_cipher_ctx *cipher_ctx;
  1739. struct skcipher_request *req;
  1740. struct crypto_skcipher *tfm;
  1741. async_req = pqcrypto_req_control->req;
  1742. req = container_of(async_req, struct skcipher_request, base);
  1743. cipher_ctx = crypto_tfm_ctx(async_req->tfm);
  1744. rctx = skcipher_request_ctx(req);
  1745. rctx->pengine = pengine;
  1746. tfm = crypto_skcipher_reqtfm(req);
  1747. if (pengine->pcp->ce_support.aligned_only) {
  1748. uint32_t bytes = 0;
  1749. uint32_t num_sg = 0;
  1750. rctx->orig_src = req->src;
  1751. rctx->orig_dst = req->dst;
  1752. rctx->data = kzalloc((req->cryptlen + 64), GFP_ATOMIC);
  1753. if (rctx->data == NULL)
  1754. return -ENOMEM;
  1755. num_sg = qcrypto_count_sg(req->src, req->cryptlen);
  1756. bytes = qcrypto_sg_copy_to_buffer(req->src, num_sg, rctx->data,
  1757. req->cryptlen);
  1758. if (bytes != req->cryptlen)
  1759. pr_warn("bytes copied=0x%x bytes to copy= 0x%x\n",
  1760. bytes, req->cryptlen);
  1761. sg_set_buf(&rctx->dsg, rctx->data, req->cryptlen);
  1762. sg_mark_end(&rctx->dsg);
  1763. rctx->iv = req->iv;
  1764. req->src = &rctx->dsg;
  1765. req->dst = &rctx->dsg;
  1766. }
  1767. qreq.op = QCE_REQ_ABLK_CIPHER; //TODO: change name in qcedev.h
  1768. qreq.qce_cb = _qce_sk_cipher_complete;
  1769. qreq.areq = req;
  1770. qreq.alg = rctx->alg;
  1771. qreq.dir = rctx->dir;
  1772. qreq.mode = rctx->mode;
  1773. qreq.enckey = cipher_ctx->enc_key;
  1774. qreq.encklen = cipher_ctx->enc_key_len;
  1775. qreq.iv = req->iv;
  1776. qreq.ivsize = crypto_skcipher_ivsize(tfm);
  1777. qreq.cryptlen = req->cryptlen;
  1778. qreq.use_pmem = 0;
  1779. qreq.flags = cipher_ctx->flags;
  1780. if ((cipher_ctx->enc_key_len == 0) &&
  1781. (pengine->pcp->platform_support.hw_key_support == 0))
  1782. ret = -EINVAL;
  1783. else
  1784. ret = qce_ablk_cipher_req(pengine->qce, &qreq); //maybe change name?
  1785. return ret;
  1786. }
  1787. static int _qcrypto_process_ahash(struct crypto_engine *pengine,
  1788. struct qcrypto_req_control *pqcrypto_req_control)
  1789. {
  1790. struct crypto_async_request *async_req;
  1791. struct ahash_request *req;
  1792. struct qce_sha_req sreq;
  1793. struct qcrypto_sha_req_ctx *rctx;
  1794. struct qcrypto_sha_ctx *sha_ctx;
  1795. int ret = 0;
  1796. async_req = pqcrypto_req_control->req;
  1797. req = container_of(async_req,
  1798. struct ahash_request, base);
  1799. rctx = ahash_request_ctx(req);
  1800. sha_ctx = crypto_tfm_ctx(async_req->tfm);
  1801. rctx->pengine = pengine;
  1802. sreq.qce_cb = _qce_ahash_complete;
  1803. sreq.digest = &rctx->digest[0];
  1804. sreq.src = req->src;
  1805. sreq.auth_data[0] = rctx->byte_count[0];
  1806. sreq.auth_data[1] = rctx->byte_count[1];
  1807. sreq.auth_data[2] = rctx->byte_count[2];
  1808. sreq.auth_data[3] = rctx->byte_count[3];
  1809. sreq.first_blk = rctx->first_blk;
  1810. sreq.last_blk = rctx->last_blk;
  1811. sreq.size = req->nbytes;
  1812. sreq.areq = req;
  1813. sreq.flags = sha_ctx->flags;
  1814. switch (sha_ctx->alg) {
  1815. case QCE_HASH_SHA1:
  1816. sreq.alg = QCE_HASH_SHA1;
  1817. sreq.authkey = NULL;
  1818. break;
  1819. case QCE_HASH_SHA256:
  1820. sreq.alg = QCE_HASH_SHA256;
  1821. sreq.authkey = NULL;
  1822. break;
  1823. case QCE_HASH_SHA1_HMAC:
  1824. sreq.alg = QCE_HASH_SHA1_HMAC;
  1825. sreq.authkey = &sha_ctx->authkey[0];
  1826. sreq.authklen = SHA_HMAC_KEY_SIZE;
  1827. break;
  1828. case QCE_HASH_SHA256_HMAC:
  1829. sreq.alg = QCE_HASH_SHA256_HMAC;
  1830. sreq.authkey = &sha_ctx->authkey[0];
  1831. sreq.authklen = SHA_HMAC_KEY_SIZE;
  1832. break;
  1833. default:
  1834. pr_err("Algorithm %d not supported, exiting\n", sha_ctx->alg);
  1835. ret = -1;
  1836. break;
  1837. }
  1838. ret = qce_process_sha_req(pengine->qce, &sreq);
  1839. return ret;
  1840. }
  1841. static int _qcrypto_process_aead(struct crypto_engine *pengine,
  1842. struct qcrypto_req_control *pqcrypto_req_control)
  1843. {
  1844. struct crypto_async_request *async_req;
  1845. struct qce_req qreq;
  1846. int ret = 0;
  1847. struct qcrypto_cipher_req_ctx *rctx;
  1848. struct qcrypto_cipher_ctx *cipher_ctx;
  1849. struct aead_request *req;
  1850. struct crypto_aead *aead;
  1851. async_req = pqcrypto_req_control->req;
  1852. req = container_of(async_req, struct aead_request, base);
  1853. aead = crypto_aead_reqtfm(req);
  1854. rctx = aead_request_ctx(req);
  1855. rctx->pengine = pengine;
  1856. cipher_ctx = crypto_tfm_ctx(async_req->tfm);
  1857. qreq.op = QCE_REQ_AEAD;
  1858. qreq.qce_cb = _qce_aead_complete;
  1859. qreq.areq = req;
  1860. qreq.alg = rctx->alg;
  1861. qreq.dir = rctx->dir;
  1862. qreq.mode = rctx->mode;
  1863. qreq.iv = rctx->iv;
  1864. qreq.enckey = cipher_ctx->enc_key;
  1865. qreq.encklen = cipher_ctx->enc_key_len;
  1866. qreq.authkey = cipher_ctx->auth_key;
  1867. qreq.authklen = cipher_ctx->auth_key_len;
  1868. qreq.authsize = crypto_aead_authsize(aead);
  1869. qreq.auth_alg = cipher_ctx->auth_alg;
  1870. if (qreq.mode == QCE_MODE_CCM)
  1871. qreq.ivsize = AES_BLOCK_SIZE;
  1872. else
  1873. qreq.ivsize = crypto_aead_ivsize(aead);
  1874. qreq.flags = cipher_ctx->flags;
  1875. if (qreq.mode == QCE_MODE_CCM) {
  1876. uint32_t assoclen;
  1877. if (qreq.dir == QCE_ENCRYPT)
  1878. qreq.cryptlen = req->cryptlen;
  1879. else
  1880. qreq.cryptlen = req->cryptlen -
  1881. qreq.authsize;
  1882. /* if rfc4309 ccm, adjust assoclen */
  1883. assoclen = req->assoclen;
  1884. if (rctx->ccmtype)
  1885. assoclen -= 8;
  1886. /* Get NONCE */
  1887. ret = qccrypto_set_aead_ccm_nonce(&qreq, assoclen);
  1888. if (ret)
  1889. return ret;
  1890. if (assoclen) {
  1891. rctx->adata = kzalloc((assoclen + 0x64),
  1892. GFP_ATOMIC);
  1893. if (!rctx->adata)
  1894. return -ENOMEM;
  1895. /* Format Associated data */
  1896. ret = qcrypto_aead_ccm_format_adata(&qreq,
  1897. assoclen,
  1898. req->src,
  1899. rctx->adata);
  1900. } else {
  1901. qreq.assoclen = 0;
  1902. rctx->adata = NULL;
  1903. }
  1904. if (ret) {
  1905. kfree_sensitive(rctx->adata);
  1906. return ret;
  1907. }
  1908. /*
  1909. * update req with new formatted associated
  1910. * data info
  1911. */
  1912. qreq.asg = &rctx->asg;
  1913. if (rctx->adata)
  1914. sg_set_buf(qreq.asg, rctx->adata,
  1915. qreq.assoclen);
  1916. sg_mark_end(qreq.asg);
  1917. }
  1918. ret = qce_aead_req(pengine->qce, &qreq);
  1919. return ret;
  1920. }
  1921. static struct crypto_engine *_qcrypto_static_assign_engine(
  1922. struct crypto_priv *cp)
  1923. {
  1924. struct crypto_engine *pengine;
  1925. unsigned long flags;
  1926. spin_lock_irqsave(&cp->lock, flags);
  1927. if (cp->next_engine)
  1928. pengine = cp->next_engine;
  1929. else
  1930. pengine = list_first_entry(&cp->engine_list,
  1931. struct crypto_engine, elist);
  1932. if (list_is_last(&pengine->elist, &cp->engine_list))
  1933. cp->next_engine = list_first_entry(
  1934. &cp->engine_list, struct crypto_engine, elist);
  1935. else
  1936. cp->next_engine = list_next_entry(pengine, elist);
  1937. spin_unlock_irqrestore(&cp->lock, flags);
  1938. return pengine;
  1939. }
  1940. static int _start_qcrypto_process(struct crypto_priv *cp,
  1941. struct crypto_engine *pengine)
  1942. {
  1943. struct crypto_async_request *async_req = NULL;
  1944. struct crypto_async_request *backlog_eng = NULL;
  1945. struct crypto_async_request *backlog_cp = NULL;
  1946. unsigned long flags;
  1947. u32 type;
  1948. int ret = 0;
  1949. struct crypto_stat *pstat;
  1950. void *tfm_ctx;
  1951. struct qcrypto_cipher_req_ctx *cipher_rctx;
  1952. struct qcrypto_sha_req_ctx *ahash_rctx;
  1953. struct skcipher_request *skcipher_req;
  1954. struct ahash_request *ahash_req;
  1955. struct aead_request *aead_req;
  1956. struct qcrypto_resp_ctx *arsp;
  1957. struct qcrypto_req_control *pqcrypto_req_control;
  1958. unsigned int cpu = MAX_SMP_CPU;
  1959. if (READ_ONCE(cp->ce_req_proc_sts) == STOPPED)
  1960. return 0;
  1961. if (in_interrupt()) {
  1962. cpu = smp_processor_id();
  1963. if (cpu >= MAX_SMP_CPU)
  1964. cpu = MAX_SMP_CPU - 1;
  1965. } else
  1966. cpu = MAX_SMP_CPU;
  1967. pstat = &_qcrypto_stat;
  1968. again:
  1969. spin_lock_irqsave(&cp->lock, flags);
  1970. if (pengine->issue_req ||
  1971. atomic_read(&pengine->req_count) >= (pengine->max_req)) {
  1972. spin_unlock_irqrestore(&cp->lock, flags);
  1973. return 0;
  1974. }
  1975. backlog_eng = crypto_get_backlog(&pengine->req_queue);
  1976. /* make sure it is in high bandwidth state */
  1977. if (pengine->bw_state != BUS_HAS_BANDWIDTH) {
  1978. spin_unlock_irqrestore(&cp->lock, flags);
  1979. return 0;
  1980. }
  1981. /* try to get request from request queue of the engine first */
  1982. async_req = crypto_dequeue_request(&pengine->req_queue);
  1983. if (!async_req) {
  1984. /*
  1985. * if no request from the engine,
  1986. * try to get from request queue of driver
  1987. */
  1988. backlog_cp = crypto_get_backlog(&cp->req_queue);
  1989. async_req = crypto_dequeue_request(&cp->req_queue);
  1990. if (!async_req) {
  1991. spin_unlock_irqrestore(&cp->lock, flags);
  1992. return 0;
  1993. }
  1994. }
  1995. pqcrypto_req_control = qcrypto_alloc_req_control(pengine);
  1996. if (pqcrypto_req_control == NULL) {
  1997. pr_err("Allocation of request failed\n");
  1998. spin_unlock_irqrestore(&cp->lock, flags);
  1999. return 0;
  2000. }
  2001. /* add associated rsp entry to tfm response queue */
  2002. type = crypto_tfm_alg_type(async_req->tfm);
  2003. tfm_ctx = crypto_tfm_ctx(async_req->tfm);
  2004. switch (type) {
  2005. case CRYPTO_ALG_TYPE_AHASH:
  2006. ahash_req = container_of(async_req,
  2007. struct ahash_request, base);
  2008. ahash_rctx = ahash_request_ctx(ahash_req);
  2009. arsp = &ahash_rctx->rsp_entry;
  2010. list_add_tail(
  2011. &arsp->list,
  2012. &((struct qcrypto_sha_ctx *)tfm_ctx)
  2013. ->rsp_queue);
  2014. break;
  2015. case CRYPTO_ALG_TYPE_SKCIPHER:
  2016. skcipher_req = container_of(async_req,
  2017. struct skcipher_request, base);
  2018. cipher_rctx = skcipher_request_ctx(skcipher_req);
  2019. arsp = &cipher_rctx->rsp_entry;
  2020. list_add_tail(
  2021. &arsp->list,
  2022. &((struct qcrypto_cipher_ctx *)tfm_ctx)
  2023. ->rsp_queue);
  2024. break;
  2025. case CRYPTO_ALG_TYPE_AEAD:
  2026. default:
  2027. aead_req = container_of(async_req,
  2028. struct aead_request, base);
  2029. cipher_rctx = aead_request_ctx(aead_req);
  2030. arsp = &cipher_rctx->rsp_entry;
  2031. list_add_tail(
  2032. &arsp->list,
  2033. &((struct qcrypto_cipher_ctx *)tfm_ctx)
  2034. ->rsp_queue);
  2035. break;
  2036. }
  2037. arsp->res = -EINPROGRESS;
  2038. arsp->async_req = async_req;
  2039. pqcrypto_req_control->pce = pengine;
  2040. pqcrypto_req_control->req = async_req;
  2041. pqcrypto_req_control->arsp = arsp;
  2042. pengine->active_seq++;
  2043. pengine->check_flag = true;
  2044. pengine->issue_req = true;
  2045. cp->cpu_req[cpu]++;
  2046. smp_mb(); /* make it visible */
  2047. spin_unlock_irqrestore(&cp->lock, flags);
  2048. if (backlog_eng)
  2049. backlog_eng->complete(backlog_eng, -EINPROGRESS);
  2050. if (backlog_cp)
  2051. backlog_cp->complete(backlog_cp, -EINPROGRESS);
  2052. switch (type) {
  2053. case CRYPTO_ALG_TYPE_SKCIPHER:
  2054. ret = _qcrypto_process_skcipher(pengine, pqcrypto_req_control);
  2055. break;
  2056. case CRYPTO_ALG_TYPE_AHASH:
  2057. ret = _qcrypto_process_ahash(pengine, pqcrypto_req_control);
  2058. break;
  2059. case CRYPTO_ALG_TYPE_AEAD:
  2060. ret = _qcrypto_process_aead(pengine, pqcrypto_req_control);
  2061. break;
  2062. default:
  2063. ret = -EINVAL;
  2064. }
  2065. pengine->issue_req = false;
  2066. smp_mb(); /* make it visible */
  2067. pengine->total_req++;
  2068. if (ret) {
  2069. pengine->err_req++;
  2070. qcrypto_free_req_control(pengine, pqcrypto_req_control);
  2071. if (type == CRYPTO_ALG_TYPE_SKCIPHER)
  2072. pstat->sk_cipher_op_fail++;
  2073. else
  2074. if (type == CRYPTO_ALG_TYPE_AHASH)
  2075. pstat->ahash_op_fail++;
  2076. else
  2077. pstat->aead_op_fail++;
  2078. _qcrypto_tfm_complete(pengine, type, tfm_ctx, arsp, ret);
  2079. goto again;
  2080. }
  2081. return ret;
  2082. }
  2083. static inline struct crypto_engine *_next_eng(struct crypto_priv *cp,
  2084. struct crypto_engine *p)
  2085. {
  2086. if (p == NULL || list_is_last(&p->elist, &cp->engine_list))
  2087. p = list_first_entry(&cp->engine_list, struct crypto_engine,
  2088. elist);
  2089. else
  2090. p = list_entry(p->elist.next, struct crypto_engine, elist);
  2091. return p;
  2092. }
  2093. static struct crypto_engine *_avail_eng(struct crypto_priv *cp)
  2094. {
  2095. /* call this function with spinlock set */
  2096. struct crypto_engine *q = NULL;
  2097. struct crypto_engine *p = cp->scheduled_eng;
  2098. struct crypto_engine *q1;
  2099. int eng_cnt = cp->total_units;
  2100. if (unlikely(list_empty(&cp->engine_list))) {
  2101. pr_err("%s: no valid ce to schedule\n", __func__);
  2102. return NULL;
  2103. }
  2104. p = _next_eng(cp, p);
  2105. q1 = p;
  2106. while (eng_cnt-- > 0) {
  2107. if (!p->issue_req && atomic_read(&p->req_count) < p->max_req) {
  2108. q = p;
  2109. break;
  2110. }
  2111. p = _next_eng(cp, p);
  2112. if (q1 == p)
  2113. break;
  2114. }
  2115. cp->scheduled_eng = q;
  2116. return q;
  2117. }
  2118. static int _qcrypto_queue_req(struct crypto_priv *cp,
  2119. struct crypto_engine *pengine,
  2120. struct crypto_async_request *req)
  2121. {
  2122. int ret;
  2123. unsigned long flags;
  2124. spin_lock_irqsave(&cp->lock, flags);
  2125. if (pengine) {
  2126. ret = crypto_enqueue_request(&pengine->req_queue, req);
  2127. } else {
  2128. ret = crypto_enqueue_request(&cp->req_queue, req);
  2129. pengine = _avail_eng(cp);
  2130. if (cp->req_queue.qlen > cp->max_qlen)
  2131. cp->max_qlen = cp->req_queue.qlen;
  2132. }
  2133. if (pengine) {
  2134. switch (pengine->bw_state) {
  2135. case BUS_NO_BANDWIDTH:
  2136. if (!pengine->high_bw_req) {
  2137. qcrypto_ce_bw_allocate_req(pengine);
  2138. pengine->high_bw_req = true;
  2139. }
  2140. pengine = NULL;
  2141. break;
  2142. case BUS_HAS_BANDWIDTH:
  2143. break;
  2144. case BUS_BANDWIDTH_RELEASING:
  2145. pengine->high_bw_req = true;
  2146. pengine = NULL;
  2147. break;
  2148. case BUS_BANDWIDTH_ALLOCATING:
  2149. pengine = NULL;
  2150. break;
  2151. case BUS_SUSPENDED:
  2152. case BUS_SUSPENDING:
  2153. default:
  2154. pengine = NULL;
  2155. break;
  2156. }
  2157. } else {
  2158. cp->no_avail++;
  2159. }
  2160. spin_unlock_irqrestore(&cp->lock, flags);
  2161. if (pengine && (READ_ONCE(cp->ce_req_proc_sts) == IN_PROGRESS))
  2162. _start_qcrypto_process(cp, pengine);
  2163. return ret;
  2164. }
  2165. static int _qcrypto_enc_aes_192_fallback(struct skcipher_request *req)
  2166. {
  2167. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2168. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2169. int err;
  2170. SYNC_SKCIPHER_REQUEST_ON_STACK(subreq, ctx->cipher_aes192_fb);
  2171. skcipher_request_set_sync_tfm(subreq, ctx->cipher_aes192_fb);
  2172. skcipher_request_set_callback(subreq, req->base.flags, NULL, NULL);
  2173. skcipher_request_set_crypt(subreq, req->src, req->dst,
  2174. req->cryptlen, req->iv);
  2175. err = crypto_skcipher_encrypt(subreq);
  2176. skcipher_request_zero(subreq);
  2177. return err;
  2178. }
  2179. static int _qcrypto_dec_aes_192_fallback(struct skcipher_request *req)
  2180. {
  2181. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2182. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2183. int err;
  2184. SYNC_SKCIPHER_REQUEST_ON_STACK(subreq, ctx->cipher_aes192_fb);
  2185. skcipher_request_set_sync_tfm(subreq, ctx->cipher_aes192_fb);
  2186. skcipher_request_set_callback(subreq, req->base.flags, NULL, NULL);
  2187. skcipher_request_set_crypt(subreq, req->src, req->dst,
  2188. req->cryptlen, req->iv);
  2189. err = crypto_skcipher_decrypt(subreq);
  2190. skcipher_request_zero(subreq);
  2191. return err;
  2192. }
  2193. static int _qcrypto_enc_aes_ecb(struct skcipher_request *req)
  2194. {
  2195. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2196. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2197. struct qcrypto_cipher_req_ctx *rctx;
  2198. struct crypto_priv *cp = ctx->cp;
  2199. struct crypto_stat *pstat = &_qcrypto_stat;
  2200. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2201. #ifdef QCRYPTO_DEBUG
  2202. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2203. #endif
  2204. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2205. (!cp->ce_support.aes_key_192) &&
  2206. ctx->cipher_aes192_fb)
  2207. return _qcrypto_enc_aes_192_fallback(req);
  2208. rctx = skcipher_request_ctx(req);
  2209. rctx->aead = 0;
  2210. rctx->alg = CIPHER_ALG_AES;
  2211. rctx->dir = QCE_ENCRYPT;
  2212. rctx->mode = QCE_MODE_ECB;
  2213. pstat->sk_cipher_aes_enc++;
  2214. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2215. }
  2216. static int _qcrypto_enc_aes_cbc(struct skcipher_request *req)
  2217. {
  2218. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2219. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2220. struct qcrypto_cipher_req_ctx *rctx;
  2221. struct crypto_priv *cp = ctx->cp;
  2222. struct crypto_stat *pstat = &_qcrypto_stat;
  2223. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2224. #ifdef QCRYPTO_DEBUG
  2225. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2226. #endif
  2227. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2228. (!cp->ce_support.aes_key_192) &&
  2229. ctx->cipher_aes192_fb)
  2230. return _qcrypto_enc_aes_192_fallback(req);
  2231. rctx = skcipher_request_ctx(req);
  2232. rctx->aead = 0;
  2233. rctx->alg = CIPHER_ALG_AES;
  2234. rctx->dir = QCE_ENCRYPT;
  2235. rctx->mode = QCE_MODE_CBC;
  2236. pstat->sk_cipher_aes_enc++;
  2237. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2238. }
  2239. static int _qcrypto_enc_aes_ctr(struct skcipher_request *req)
  2240. {
  2241. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2242. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2243. struct qcrypto_cipher_req_ctx *rctx;
  2244. struct crypto_priv *cp = ctx->cp;
  2245. struct crypto_stat *pstat = &_qcrypto_stat;
  2246. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2247. #ifdef QCRYPTO_DEBUG
  2248. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2249. #endif
  2250. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2251. (!cp->ce_support.aes_key_192) &&
  2252. ctx->cipher_aes192_fb)
  2253. return _qcrypto_enc_aes_192_fallback(req);
  2254. rctx = skcipher_request_ctx(req);
  2255. rctx->aead = 0;
  2256. rctx->alg = CIPHER_ALG_AES;
  2257. rctx->dir = QCE_ENCRYPT;
  2258. rctx->mode = QCE_MODE_CTR;
  2259. pstat->sk_cipher_aes_enc++;
  2260. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2261. }
  2262. static int _qcrypto_enc_aes_xts(struct skcipher_request *req)
  2263. {
  2264. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2265. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2266. struct qcrypto_cipher_req_ctx *rctx;
  2267. struct crypto_stat *pstat = &_qcrypto_stat;
  2268. struct crypto_priv *cp = ctx->cp;
  2269. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2270. rctx = skcipher_request_ctx(req);
  2271. rctx->aead = 0;
  2272. rctx->alg = CIPHER_ALG_AES;
  2273. rctx->dir = QCE_ENCRYPT;
  2274. rctx->mode = QCE_MODE_XTS;
  2275. pstat->sk_cipher_aes_enc++;
  2276. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2277. }
  2278. static int _qcrypto_aead_encrypt_aes_ccm(struct aead_request *req)
  2279. {
  2280. struct qcrypto_cipher_req_ctx *rctx;
  2281. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2282. struct crypto_priv *cp = ctx->cp;
  2283. struct crypto_stat *pstat;
  2284. if ((ctx->authsize > 16) || (ctx->authsize < 4) || (ctx->authsize & 1))
  2285. return -EINVAL;
  2286. if ((ctx->auth_key_len != AES_KEYSIZE_128) &&
  2287. (ctx->auth_key_len != AES_KEYSIZE_256))
  2288. return -EINVAL;
  2289. pstat = &_qcrypto_stat;
  2290. rctx = aead_request_ctx(req);
  2291. rctx->aead = 1;
  2292. rctx->alg = CIPHER_ALG_AES;
  2293. rctx->dir = QCE_ENCRYPT;
  2294. rctx->mode = QCE_MODE_CCM;
  2295. rctx->iv = req->iv;
  2296. rctx->ccmtype = 0;
  2297. pstat->aead_ccm_aes_enc++;
  2298. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2299. }
  2300. static int _qcrypto_aead_rfc4309_enc_aes_ccm(struct aead_request *req)
  2301. {
  2302. struct qcrypto_cipher_req_ctx *rctx;
  2303. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2304. struct crypto_priv *cp = ctx->cp;
  2305. struct crypto_stat *pstat;
  2306. pstat = &_qcrypto_stat;
  2307. if (req->assoclen != 16 && req->assoclen != 20)
  2308. return -EINVAL;
  2309. rctx = aead_request_ctx(req);
  2310. rctx->aead = 1;
  2311. rctx->alg = CIPHER_ALG_AES;
  2312. rctx->dir = QCE_ENCRYPT;
  2313. rctx->mode = QCE_MODE_CCM;
  2314. memset(rctx->rfc4309_iv, 0, sizeof(rctx->rfc4309_iv));
  2315. rctx->rfc4309_iv[0] = 3; /* L -1 */
  2316. memcpy(&rctx->rfc4309_iv[1], ctx->ccm4309_nonce, 3);
  2317. memcpy(&rctx->rfc4309_iv[4], req->iv, 8);
  2318. rctx->ccmtype = 1;
  2319. rctx->iv = rctx->rfc4309_iv;
  2320. pstat->aead_rfc4309_ccm_aes_enc++;
  2321. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2322. }
  2323. static int _qcrypto_enc_des_ecb(struct skcipher_request *req)
  2324. {
  2325. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2326. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2327. struct qcrypto_cipher_req_ctx *rctx;
  2328. struct crypto_priv *cp = ctx->cp;
  2329. struct crypto_stat *pstat = &_qcrypto_stat;
  2330. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2331. rctx = skcipher_request_ctx(req);
  2332. rctx->aead = 0;
  2333. rctx->alg = CIPHER_ALG_DES;
  2334. rctx->dir = QCE_ENCRYPT;
  2335. rctx->mode = QCE_MODE_ECB;
  2336. pstat->sk_cipher_des_enc++;
  2337. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2338. }
  2339. static int _qcrypto_enc_des_cbc(struct skcipher_request *req)
  2340. {
  2341. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2342. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2343. struct qcrypto_cipher_req_ctx *rctx;
  2344. struct crypto_priv *cp = ctx->cp;
  2345. struct crypto_stat *pstat = &_qcrypto_stat;
  2346. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2347. rctx = skcipher_request_ctx(req);
  2348. rctx->aead = 0;
  2349. rctx->alg = CIPHER_ALG_DES;
  2350. rctx->dir = QCE_ENCRYPT;
  2351. rctx->mode = QCE_MODE_CBC;
  2352. pstat->sk_cipher_des_enc++;
  2353. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2354. }
  2355. static int _qcrypto_enc_3des_ecb(struct skcipher_request *req)
  2356. {
  2357. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2358. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2359. struct qcrypto_cipher_req_ctx *rctx;
  2360. struct crypto_priv *cp = ctx->cp;
  2361. struct crypto_stat *pstat = &_qcrypto_stat;
  2362. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2363. rctx = skcipher_request_ctx(req);
  2364. rctx->aead = 0;
  2365. rctx->alg = CIPHER_ALG_3DES;
  2366. rctx->dir = QCE_ENCRYPT;
  2367. rctx->mode = QCE_MODE_ECB;
  2368. pstat->sk_cipher_3des_enc++;
  2369. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2370. }
  2371. static int _qcrypto_enc_3des_cbc(struct skcipher_request *req)
  2372. {
  2373. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2374. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2375. struct qcrypto_cipher_req_ctx *rctx;
  2376. struct crypto_priv *cp = ctx->cp;
  2377. struct crypto_stat *pstat = &_qcrypto_stat;
  2378. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2379. rctx = skcipher_request_ctx(req);
  2380. rctx->aead = 0;
  2381. rctx->alg = CIPHER_ALG_3DES;
  2382. rctx->dir = QCE_ENCRYPT;
  2383. rctx->mode = QCE_MODE_CBC;
  2384. pstat->sk_cipher_3des_enc++;
  2385. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2386. }
  2387. static int _qcrypto_dec_aes_ecb(struct skcipher_request *req)
  2388. {
  2389. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2390. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2391. struct qcrypto_cipher_req_ctx *rctx;
  2392. struct crypto_priv *cp = ctx->cp;
  2393. struct crypto_stat *pstat = &_qcrypto_stat;
  2394. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2395. #ifdef QCRYPTO_DEBUG
  2396. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2397. #endif
  2398. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2399. (!cp->ce_support.aes_key_192) &&
  2400. ctx->cipher_aes192_fb)
  2401. return _qcrypto_dec_aes_192_fallback(req);
  2402. rctx = skcipher_request_ctx(req);
  2403. rctx->aead = 0;
  2404. rctx->alg = CIPHER_ALG_AES;
  2405. rctx->dir = QCE_DECRYPT;
  2406. rctx->mode = QCE_MODE_ECB;
  2407. pstat->sk_cipher_aes_dec++;
  2408. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2409. }
  2410. static int _qcrypto_dec_aes_cbc(struct skcipher_request *req)
  2411. {
  2412. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2413. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2414. struct qcrypto_cipher_req_ctx *rctx;
  2415. struct crypto_priv *cp = ctx->cp;
  2416. struct crypto_stat *pstat = &_qcrypto_stat;
  2417. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2418. #ifdef QCRYPTO_DEBUG
  2419. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2420. #endif
  2421. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2422. (!cp->ce_support.aes_key_192) &&
  2423. ctx->cipher_aes192_fb)
  2424. return _qcrypto_dec_aes_192_fallback(req);
  2425. rctx = skcipher_request_ctx(req);
  2426. rctx->aead = 0;
  2427. rctx->alg = CIPHER_ALG_AES;
  2428. rctx->dir = QCE_DECRYPT;
  2429. rctx->mode = QCE_MODE_CBC;
  2430. pstat->sk_cipher_aes_dec++;
  2431. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2432. }
  2433. static int _qcrypto_dec_aes_ctr(struct skcipher_request *req)
  2434. {
  2435. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2436. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2437. struct qcrypto_cipher_req_ctx *rctx;
  2438. struct crypto_priv *cp = ctx->cp;
  2439. struct crypto_stat *pstat = &_qcrypto_stat;
  2440. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2441. #ifdef QCRYPTO_DEBUG
  2442. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2443. #endif
  2444. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2445. (!cp->ce_support.aes_key_192) &&
  2446. ctx->cipher_aes192_fb)
  2447. return _qcrypto_dec_aes_192_fallback(req);
  2448. rctx = skcipher_request_ctx(req);
  2449. rctx->aead = 0;
  2450. rctx->alg = CIPHER_ALG_AES;
  2451. rctx->mode = QCE_MODE_CTR;
  2452. /* Note. There is no such thing as aes/counter mode, decrypt */
  2453. rctx->dir = QCE_ENCRYPT;
  2454. pstat->sk_cipher_aes_dec++;
  2455. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2456. }
  2457. static int _qcrypto_dec_des_ecb(struct skcipher_request *req)
  2458. {
  2459. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2460. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2461. struct qcrypto_cipher_req_ctx *rctx;
  2462. struct crypto_priv *cp = ctx->cp;
  2463. struct crypto_stat *pstat = &_qcrypto_stat;
  2464. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2465. rctx = skcipher_request_ctx(req);
  2466. rctx->aead = 0;
  2467. rctx->alg = CIPHER_ALG_DES;
  2468. rctx->dir = QCE_DECRYPT;
  2469. rctx->mode = QCE_MODE_ECB;
  2470. pstat->sk_cipher_des_dec++;
  2471. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2472. }
  2473. static int _qcrypto_dec_des_cbc(struct skcipher_request *req)
  2474. {
  2475. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2476. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2477. struct qcrypto_cipher_req_ctx *rctx;
  2478. struct crypto_priv *cp = ctx->cp;
  2479. struct crypto_stat *pstat = &_qcrypto_stat;
  2480. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2481. rctx = skcipher_request_ctx(req);
  2482. rctx->aead = 0;
  2483. rctx->alg = CIPHER_ALG_DES;
  2484. rctx->dir = QCE_DECRYPT;
  2485. rctx->mode = QCE_MODE_CBC;
  2486. pstat->sk_cipher_des_dec++;
  2487. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2488. }
  2489. static int _qcrypto_dec_3des_ecb(struct skcipher_request *req)
  2490. {
  2491. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2492. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2493. struct qcrypto_cipher_req_ctx *rctx;
  2494. struct crypto_priv *cp = ctx->cp;
  2495. struct crypto_stat *pstat = &_qcrypto_stat;
  2496. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2497. rctx = skcipher_request_ctx(req);
  2498. rctx->aead = 0;
  2499. rctx->alg = CIPHER_ALG_3DES;
  2500. rctx->dir = QCE_DECRYPT;
  2501. rctx->mode = QCE_MODE_ECB;
  2502. pstat->sk_cipher_3des_dec++;
  2503. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2504. }
  2505. static int _qcrypto_dec_3des_cbc(struct skcipher_request *req)
  2506. {
  2507. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2508. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2509. struct qcrypto_cipher_req_ctx *rctx;
  2510. struct crypto_priv *cp = ctx->cp;
  2511. struct crypto_stat *pstat = &_qcrypto_stat;
  2512. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2513. rctx = skcipher_request_ctx(req);
  2514. rctx->aead = 0;
  2515. rctx->alg = CIPHER_ALG_3DES;
  2516. rctx->dir = QCE_DECRYPT;
  2517. rctx->mode = QCE_MODE_CBC;
  2518. pstat->sk_cipher_3des_dec++;
  2519. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2520. }
  2521. static int _qcrypto_dec_aes_xts(struct skcipher_request *req)
  2522. {
  2523. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  2524. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  2525. struct qcrypto_cipher_req_ctx *rctx;
  2526. struct crypto_priv *cp = ctx->cp;
  2527. struct crypto_stat *pstat = &_qcrypto_stat;
  2528. WARN_ON(crypto_tfm_alg_type(&tfm->base) != CRYPTO_ALG_TYPE_SKCIPHER);
  2529. rctx = skcipher_request_ctx(req);
  2530. rctx->aead = 0;
  2531. rctx->alg = CIPHER_ALG_AES;
  2532. rctx->mode = QCE_MODE_XTS;
  2533. rctx->dir = QCE_DECRYPT;
  2534. pstat->sk_cipher_aes_dec++;
  2535. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2536. }
  2537. static int _qcrypto_aead_decrypt_aes_ccm(struct aead_request *req)
  2538. {
  2539. struct qcrypto_cipher_req_ctx *rctx;
  2540. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2541. struct crypto_priv *cp = ctx->cp;
  2542. struct crypto_stat *pstat;
  2543. if ((ctx->authsize > 16) || (ctx->authsize < 4) || (ctx->authsize & 1))
  2544. return -EINVAL;
  2545. if ((ctx->auth_key_len != AES_KEYSIZE_128) &&
  2546. (ctx->auth_key_len != AES_KEYSIZE_256))
  2547. return -EINVAL;
  2548. pstat = &_qcrypto_stat;
  2549. rctx = aead_request_ctx(req);
  2550. rctx->aead = 1;
  2551. rctx->alg = CIPHER_ALG_AES;
  2552. rctx->dir = QCE_DECRYPT;
  2553. rctx->mode = QCE_MODE_CCM;
  2554. rctx->iv = req->iv;
  2555. rctx->ccmtype = 0;
  2556. pstat->aead_ccm_aes_dec++;
  2557. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2558. }
  2559. static int _qcrypto_aead_rfc4309_dec_aes_ccm(struct aead_request *req)
  2560. {
  2561. struct qcrypto_cipher_req_ctx *rctx;
  2562. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2563. struct crypto_priv *cp = ctx->cp;
  2564. struct crypto_stat *pstat;
  2565. pstat = &_qcrypto_stat;
  2566. if (req->assoclen != 16 && req->assoclen != 20)
  2567. return -EINVAL;
  2568. rctx = aead_request_ctx(req);
  2569. rctx->aead = 1;
  2570. rctx->alg = CIPHER_ALG_AES;
  2571. rctx->dir = QCE_DECRYPT;
  2572. rctx->mode = QCE_MODE_CCM;
  2573. memset(rctx->rfc4309_iv, 0, sizeof(rctx->rfc4309_iv));
  2574. rctx->rfc4309_iv[0] = 3; /* L -1 */
  2575. memcpy(&rctx->rfc4309_iv[1], ctx->ccm4309_nonce, 3);
  2576. memcpy(&rctx->rfc4309_iv[4], req->iv, 8);
  2577. rctx->ccmtype = 1;
  2578. rctx->iv = rctx->rfc4309_iv;
  2579. pstat->aead_rfc4309_ccm_aes_dec++;
  2580. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2581. }
  2582. static int _qcrypto_aead_setauthsize(struct crypto_aead *authenc,
  2583. unsigned int authsize)
  2584. {
  2585. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(authenc);
  2586. ctx->authsize = authsize;
  2587. return 0;
  2588. }
  2589. static int _qcrypto_aead_ccm_setauthsize(struct crypto_aead *authenc,
  2590. unsigned int authsize)
  2591. {
  2592. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(authenc);
  2593. switch (authsize) {
  2594. case 4:
  2595. case 6:
  2596. case 8:
  2597. case 10:
  2598. case 12:
  2599. case 14:
  2600. case 16:
  2601. break;
  2602. default:
  2603. return -EINVAL;
  2604. }
  2605. ctx->authsize = authsize;
  2606. return 0;
  2607. }
  2608. static int _qcrypto_aead_rfc4309_ccm_setauthsize(struct crypto_aead *authenc,
  2609. unsigned int authsize)
  2610. {
  2611. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(authenc);
  2612. switch (authsize) {
  2613. case 8:
  2614. case 12:
  2615. case 16:
  2616. break;
  2617. default:
  2618. return -EINVAL;
  2619. }
  2620. ctx->authsize = authsize;
  2621. return 0;
  2622. }
  2623. static int _qcrypto_aead_setkey(struct crypto_aead *tfm, const u8 *key,
  2624. unsigned int keylen)
  2625. {
  2626. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  2627. struct rtattr *rta = (struct rtattr *)key;
  2628. struct crypto_authenc_key_param *param;
  2629. int ret;
  2630. if (!RTA_OK(rta, keylen))
  2631. goto badkey;
  2632. if (rta->rta_type != CRYPTO_AUTHENC_KEYA_PARAM)
  2633. goto badkey;
  2634. if (RTA_PAYLOAD(rta) < sizeof(*param))
  2635. goto badkey;
  2636. param = RTA_DATA(rta);
  2637. ctx->enc_key_len = be32_to_cpu(param->enckeylen);
  2638. key += RTA_ALIGN(rta->rta_len);
  2639. keylen -= RTA_ALIGN(rta->rta_len);
  2640. if (keylen < ctx->enc_key_len)
  2641. goto badkey;
  2642. ctx->auth_key_len = keylen - ctx->enc_key_len;
  2643. if (ctx->enc_key_len >= QCRYPTO_MAX_KEY_SIZE ||
  2644. ctx->auth_key_len >= QCRYPTO_MAX_KEY_SIZE)
  2645. goto badkey;
  2646. memset(ctx->auth_key, 0, QCRYPTO_MAX_KEY_SIZE);
  2647. memcpy(ctx->enc_key, key + ctx->auth_key_len, ctx->enc_key_len);
  2648. memcpy(ctx->auth_key, key, ctx->auth_key_len);
  2649. if (ctx->enc_key_len == AES_KEYSIZE_192 && ctx->cipher_aes192_fb &&
  2650. ctx->ahash_aead_aes192_fb) {
  2651. crypto_ahash_clear_flags(ctx->ahash_aead_aes192_fb, ~0);
  2652. ret = crypto_ahash_setkey(ctx->ahash_aead_aes192_fb,
  2653. ctx->auth_key, ctx->auth_key_len);
  2654. if (ret)
  2655. goto badkey;
  2656. crypto_sync_skcipher_clear_flags(ctx->cipher_aes192_fb, ~0);
  2657. ret = crypto_sync_skcipher_setkey(ctx->cipher_aes192_fb,
  2658. ctx->enc_key, ctx->enc_key_len);
  2659. if (ret)
  2660. goto badkey;
  2661. }
  2662. return 0;
  2663. badkey:
  2664. ctx->enc_key_len = 0;
  2665. //crypto_aead_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  2666. return -EINVAL;
  2667. }
  2668. static int _qcrypto_aead_ccm_setkey(struct crypto_aead *aead, const u8 *key,
  2669. unsigned int keylen)
  2670. {
  2671. struct crypto_tfm *tfm = crypto_aead_tfm(aead);
  2672. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  2673. struct crypto_priv *cp = ctx->cp;
  2674. switch (keylen) {
  2675. case AES_KEYSIZE_128:
  2676. case AES_KEYSIZE_256:
  2677. break;
  2678. case AES_KEYSIZE_192:
  2679. if (cp->ce_support.aes_key_192)
  2680. break;
  2681. default:
  2682. ctx->enc_key_len = 0;
  2683. //crypto_aead_set_flags(aead, CRYPTO_TFM_RES_BAD_KEY_LEN);
  2684. return -EINVAL;
  2685. }
  2686. ctx->enc_key_len = keylen;
  2687. memcpy(ctx->enc_key, key, keylen);
  2688. ctx->auth_key_len = keylen;
  2689. memcpy(ctx->auth_key, key, keylen);
  2690. return 0;
  2691. }
  2692. static int _qcrypto_aead_rfc4309_ccm_setkey(struct crypto_aead *aead,
  2693. const u8 *key, unsigned int key_len)
  2694. {
  2695. struct crypto_tfm *tfm = crypto_aead_tfm(aead);
  2696. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  2697. int ret;
  2698. if (key_len < QCRYPTO_CCM4309_NONCE_LEN)
  2699. return -EINVAL;
  2700. key_len -= QCRYPTO_CCM4309_NONCE_LEN;
  2701. memcpy(ctx->ccm4309_nonce, key + key_len, QCRYPTO_CCM4309_NONCE_LEN);
  2702. ret = _qcrypto_aead_ccm_setkey(aead, key, key_len);
  2703. return ret;
  2704. }
  2705. static void _qcrypto_aead_aes_192_fb_a_cb(struct qcrypto_cipher_req_ctx *rctx,
  2706. int res)
  2707. {
  2708. struct aead_request *req;
  2709. struct crypto_async_request *areq;
  2710. req = rctx->aead_req;
  2711. areq = &req->base;
  2712. if (rctx->fb_aes_req)
  2713. skcipher_request_free(rctx->fb_aes_req);
  2714. if (rctx->fb_hash_req)
  2715. ahash_request_free(rctx->fb_hash_req);
  2716. rctx->fb_aes_req = NULL;
  2717. rctx->fb_hash_req = NULL;
  2718. kfree(rctx->fb_aes_iv);
  2719. areq->complete(areq, res);
  2720. }
  2721. static void _aead_aes_fb_stage2_ahash_complete(
  2722. struct crypto_async_request *base, int err)
  2723. {
  2724. struct qcrypto_cipher_req_ctx *rctx;
  2725. struct aead_request *req;
  2726. struct qcrypto_cipher_ctx *ctx;
  2727. rctx = base->data;
  2728. req = rctx->aead_req;
  2729. ctx = crypto_tfm_ctx(req->base.tfm);
  2730. /* copy icv */
  2731. if (err == 0)
  2732. scatterwalk_map_and_copy(rctx->fb_ahash_digest,
  2733. rctx->fb_aes_dst,
  2734. req->cryptlen,
  2735. ctx->authsize, 1);
  2736. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2737. }
  2738. static int _start_aead_aes_fb_stage2_hmac(struct qcrypto_cipher_req_ctx *rctx)
  2739. {
  2740. struct ahash_request *ahash_req;
  2741. ahash_req = rctx->fb_hash_req;
  2742. ahash_request_set_callback(ahash_req, CRYPTO_TFM_REQ_MAY_BACKLOG,
  2743. _aead_aes_fb_stage2_ahash_complete, rctx);
  2744. return crypto_ahash_digest(ahash_req);
  2745. }
  2746. static void _aead_aes_fb_stage2_decrypt_complete(
  2747. struct crypto_async_request *base, int err)
  2748. {
  2749. struct qcrypto_cipher_req_ctx *rctx;
  2750. rctx = base->data;
  2751. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2752. }
  2753. static int _start_aead_aes_fb_stage2_decrypt(
  2754. struct qcrypto_cipher_req_ctx *rctx)
  2755. {
  2756. struct skcipher_request *aes_req;
  2757. aes_req = rctx->fb_aes_req;
  2758. skcipher_request_set_callback(aes_req, CRYPTO_TFM_REQ_MAY_BACKLOG,
  2759. _aead_aes_fb_stage2_decrypt_complete, rctx);
  2760. return crypto_skcipher_decrypt(aes_req);
  2761. }
  2762. static void _aead_aes_fb_stage1_ahash_complete(
  2763. struct crypto_async_request *base, int err)
  2764. {
  2765. struct qcrypto_cipher_req_ctx *rctx;
  2766. struct aead_request *req;
  2767. struct qcrypto_cipher_ctx *ctx;
  2768. rctx = base->data;
  2769. req = rctx->aead_req;
  2770. ctx = crypto_tfm_ctx(req->base.tfm);
  2771. /* compare icv */
  2772. if (err == 0) {
  2773. unsigned char *tmp;
  2774. tmp = kmalloc(ctx->authsize, GFP_KERNEL);
  2775. if (!tmp) {
  2776. err = -ENOMEM;
  2777. goto ret;
  2778. }
  2779. scatterwalk_map_and_copy(tmp, rctx->fb_aes_src,
  2780. req->cryptlen - ctx->authsize, ctx->authsize, 0);
  2781. if (memcmp(rctx->fb_ahash_digest, tmp, ctx->authsize) != 0)
  2782. err = -EBADMSG;
  2783. kfree(tmp);
  2784. }
  2785. ret:
  2786. if (err)
  2787. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2788. else {
  2789. err = _start_aead_aes_fb_stage2_decrypt(rctx);
  2790. if (err != -EINPROGRESS && err != -EBUSY)
  2791. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2792. }
  2793. }
  2794. static void _aead_aes_fb_stage1_encrypt_complete(
  2795. struct crypto_async_request *base, int err)
  2796. {
  2797. struct qcrypto_cipher_req_ctx *rctx;
  2798. struct aead_request *req;
  2799. struct qcrypto_cipher_ctx *ctx;
  2800. rctx = base->data;
  2801. req = rctx->aead_req;
  2802. ctx = crypto_tfm_ctx(req->base.tfm);
  2803. memcpy(ctx->iv, rctx->fb_aes_iv, rctx->ivsize);
  2804. if (err) {
  2805. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2806. return;
  2807. }
  2808. err = _start_aead_aes_fb_stage2_hmac(rctx);
  2809. /* copy icv */
  2810. if (err == 0) {
  2811. scatterwalk_map_and_copy(rctx->fb_ahash_digest,
  2812. rctx->fb_aes_dst,
  2813. req->cryptlen,
  2814. ctx->authsize, 1);
  2815. }
  2816. if (err != -EINPROGRESS && err != -EBUSY)
  2817. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2818. }
  2819. static int _qcrypto_aead_aes_192_fallback(struct aead_request *req,
  2820. bool is_encrypt)
  2821. {
  2822. int rc = -EINVAL;
  2823. struct qcrypto_cipher_req_ctx *rctx = aead_request_ctx(req);
  2824. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2825. struct crypto_aead *aead_tfm = crypto_aead_reqtfm(req);
  2826. struct skcipher_request *aes_req = NULL;
  2827. struct ahash_request *ahash_req = NULL;
  2828. int nbytes;
  2829. struct scatterlist *src, *dst;
  2830. rctx->fb_aes_iv = NULL;
  2831. aes_req = skcipher_request_alloc(&ctx->cipher_aes192_fb->base,
  2832. GFP_KERNEL);
  2833. if (!aes_req)
  2834. return -ENOMEM;
  2835. ahash_req = ahash_request_alloc(ctx->ahash_aead_aes192_fb, GFP_KERNEL);
  2836. if (!ahash_req)
  2837. goto ret;
  2838. rctx->fb_aes_req = aes_req;
  2839. rctx->fb_hash_req = ahash_req;
  2840. rctx->aead_req = req;
  2841. /* assoc and iv are sitting in the beginning of src sg list */
  2842. /* Similarly, assoc and iv are sitting in the beginning of dst list */
  2843. src = scatterwalk_ffwd(rctx->fb_ablkcipher_src_sg, req->src,
  2844. req->assoclen);
  2845. dst = scatterwalk_ffwd(rctx->fb_ablkcipher_dst_sg, req->dst,
  2846. req->assoclen);
  2847. nbytes = req->cryptlen;
  2848. if (!is_encrypt)
  2849. nbytes -= ctx->authsize;
  2850. rctx->fb_ahash_length = nbytes + req->assoclen;
  2851. rctx->fb_aes_src = src;
  2852. rctx->fb_aes_dst = dst;
  2853. rctx->fb_aes_cryptlen = nbytes;
  2854. rctx->ivsize = crypto_aead_ivsize(aead_tfm);
  2855. rctx->fb_aes_iv = kmemdup(req->iv, rctx->ivsize, GFP_ATOMIC);
  2856. if (!rctx->fb_aes_iv)
  2857. goto ret;
  2858. skcipher_request_set_crypt(aes_req, rctx->fb_aes_src,
  2859. rctx->fb_aes_dst,
  2860. rctx->fb_aes_cryptlen, rctx->fb_aes_iv);
  2861. if (is_encrypt)
  2862. ahash_request_set_crypt(ahash_req, req->dst,
  2863. rctx->fb_ahash_digest,
  2864. rctx->fb_ahash_length);
  2865. else
  2866. ahash_request_set_crypt(ahash_req, req->src,
  2867. rctx->fb_ahash_digest,
  2868. rctx->fb_ahash_length);
  2869. if (is_encrypt) {
  2870. skcipher_request_set_callback(aes_req,
  2871. CRYPTO_TFM_REQ_MAY_BACKLOG,
  2872. _aead_aes_fb_stage1_encrypt_complete, rctx);
  2873. rc = crypto_skcipher_encrypt(aes_req);
  2874. if (rc == 0) {
  2875. memcpy(ctx->iv, rctx->fb_aes_iv, rctx->ivsize);
  2876. rc = _start_aead_aes_fb_stage2_hmac(rctx);
  2877. if (rc == 0) {
  2878. /* copy icv */
  2879. scatterwalk_map_and_copy(rctx->fb_ahash_digest,
  2880. dst,
  2881. req->cryptlen,
  2882. ctx->authsize, 1);
  2883. }
  2884. }
  2885. if (rc == -EINPROGRESS || rc == -EBUSY)
  2886. return rc;
  2887. goto ret;
  2888. } else {
  2889. ahash_request_set_callback(ahash_req,
  2890. CRYPTO_TFM_REQ_MAY_BACKLOG,
  2891. _aead_aes_fb_stage1_ahash_complete, rctx);
  2892. rc = crypto_ahash_digest(ahash_req);
  2893. if (rc == 0) {
  2894. unsigned char *tmp;
  2895. tmp = kmalloc(ctx->authsize, GFP_KERNEL);
  2896. if (!tmp) {
  2897. rc = -ENOMEM;
  2898. goto ret;
  2899. }
  2900. /* compare icv */
  2901. scatterwalk_map_and_copy(tmp,
  2902. src, req->cryptlen - ctx->authsize,
  2903. ctx->authsize, 0);
  2904. if (memcmp(rctx->fb_ahash_digest, tmp,
  2905. ctx->authsize) != 0)
  2906. rc = -EBADMSG;
  2907. else
  2908. rc = _start_aead_aes_fb_stage2_decrypt(rctx);
  2909. kfree(tmp);
  2910. }
  2911. if (rc == -EINPROGRESS || rc == -EBUSY)
  2912. return rc;
  2913. goto ret;
  2914. }
  2915. ret:
  2916. if (aes_req)
  2917. skcipher_request_free(aes_req);
  2918. if (ahash_req)
  2919. ahash_request_free(ahash_req);
  2920. kfree(rctx->fb_aes_iv);
  2921. return rc;
  2922. }
  2923. static int _qcrypto_aead_encrypt_aes_cbc(struct aead_request *req)
  2924. {
  2925. struct qcrypto_cipher_req_ctx *rctx;
  2926. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2927. struct crypto_priv *cp = ctx->cp;
  2928. struct crypto_stat *pstat;
  2929. pstat = &_qcrypto_stat;
  2930. #ifdef QCRYPTO_DEBUG
  2931. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2932. #endif
  2933. rctx = aead_request_ctx(req);
  2934. rctx->aead = 1;
  2935. rctx->alg = CIPHER_ALG_AES;
  2936. rctx->dir = QCE_ENCRYPT;
  2937. rctx->mode = QCE_MODE_CBC;
  2938. rctx->iv = req->iv;
  2939. rctx->aead_req = req;
  2940. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  2941. pstat->aead_sha1_aes_enc++;
  2942. else
  2943. pstat->aead_sha256_aes_enc++;
  2944. if (ctx->enc_key_len == AES_KEYSIZE_192 && ctx->cipher_aes192_fb &&
  2945. ctx->ahash_aead_aes192_fb)
  2946. return _qcrypto_aead_aes_192_fallback(req, true);
  2947. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2948. }
  2949. static int _qcrypto_aead_decrypt_aes_cbc(struct aead_request *req)
  2950. {
  2951. struct qcrypto_cipher_req_ctx *rctx;
  2952. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2953. struct crypto_priv *cp = ctx->cp;
  2954. struct crypto_stat *pstat;
  2955. pstat = &_qcrypto_stat;
  2956. #ifdef QCRYPTO_DEBUG
  2957. dev_info(&ctx->pengine->pdev->dev, "%s: %pK\n", __func__, req);
  2958. #endif
  2959. rctx = aead_request_ctx(req);
  2960. rctx->aead = 1;
  2961. rctx->alg = CIPHER_ALG_AES;
  2962. rctx->dir = QCE_DECRYPT;
  2963. rctx->mode = QCE_MODE_CBC;
  2964. rctx->iv = req->iv;
  2965. rctx->aead_req = req;
  2966. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  2967. pstat->aead_sha1_aes_dec++;
  2968. else
  2969. pstat->aead_sha256_aes_dec++;
  2970. if (ctx->enc_key_len == AES_KEYSIZE_192 && ctx->cipher_aes192_fb &&
  2971. ctx->ahash_aead_aes192_fb)
  2972. return _qcrypto_aead_aes_192_fallback(req, false);
  2973. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2974. }
  2975. static int _qcrypto_aead_encrypt_des_cbc(struct aead_request *req)
  2976. {
  2977. struct qcrypto_cipher_req_ctx *rctx;
  2978. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2979. struct crypto_priv *cp = ctx->cp;
  2980. struct crypto_stat *pstat;
  2981. pstat = &_qcrypto_stat;
  2982. rctx = aead_request_ctx(req);
  2983. rctx->aead = 1;
  2984. rctx->alg = CIPHER_ALG_DES;
  2985. rctx->dir = QCE_ENCRYPT;
  2986. rctx->mode = QCE_MODE_CBC;
  2987. rctx->iv = req->iv;
  2988. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  2989. pstat->aead_sha1_des_enc++;
  2990. else
  2991. pstat->aead_sha256_des_enc++;
  2992. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2993. }
  2994. static int _qcrypto_aead_decrypt_des_cbc(struct aead_request *req)
  2995. {
  2996. struct qcrypto_cipher_req_ctx *rctx;
  2997. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2998. struct crypto_priv *cp = ctx->cp;
  2999. struct crypto_stat *pstat;
  3000. pstat = &_qcrypto_stat;
  3001. rctx = aead_request_ctx(req);
  3002. rctx->aead = 1;
  3003. rctx->alg = CIPHER_ALG_DES;
  3004. rctx->dir = QCE_DECRYPT;
  3005. rctx->mode = QCE_MODE_CBC;
  3006. rctx->iv = req->iv;
  3007. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  3008. pstat->aead_sha1_des_dec++;
  3009. else
  3010. pstat->aead_sha256_des_dec++;
  3011. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  3012. }
  3013. static int _qcrypto_aead_encrypt_3des_cbc(struct aead_request *req)
  3014. {
  3015. struct qcrypto_cipher_req_ctx *rctx;
  3016. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3017. struct crypto_priv *cp = ctx->cp;
  3018. struct crypto_stat *pstat;
  3019. pstat = &_qcrypto_stat;
  3020. rctx = aead_request_ctx(req);
  3021. rctx->aead = 1;
  3022. rctx->alg = CIPHER_ALG_3DES;
  3023. rctx->dir = QCE_ENCRYPT;
  3024. rctx->mode = QCE_MODE_CBC;
  3025. rctx->iv = req->iv;
  3026. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  3027. pstat->aead_sha1_3des_enc++;
  3028. else
  3029. pstat->aead_sha256_3des_enc++;
  3030. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  3031. }
  3032. static int _qcrypto_aead_decrypt_3des_cbc(struct aead_request *req)
  3033. {
  3034. struct qcrypto_cipher_req_ctx *rctx;
  3035. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3036. struct crypto_priv *cp = ctx->cp;
  3037. struct crypto_stat *pstat;
  3038. pstat = &_qcrypto_stat;
  3039. rctx = aead_request_ctx(req);
  3040. rctx->aead = 1;
  3041. rctx->alg = CIPHER_ALG_3DES;
  3042. rctx->dir = QCE_DECRYPT;
  3043. rctx->mode = QCE_MODE_CBC;
  3044. rctx->iv = req->iv;
  3045. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  3046. pstat->aead_sha1_3des_dec++;
  3047. else
  3048. pstat->aead_sha256_3des_dec++;
  3049. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  3050. }
  3051. static int _sha_init(struct ahash_request *req)
  3052. {
  3053. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3054. rctx->first_blk = 1;
  3055. rctx->last_blk = 0;
  3056. rctx->byte_count[0] = 0;
  3057. rctx->byte_count[1] = 0;
  3058. rctx->byte_count[2] = 0;
  3059. rctx->byte_count[3] = 0;
  3060. rctx->trailing_buf_len = 0;
  3061. rctx->count = 0;
  3062. return 0;
  3063. }
  3064. static int _sha1_init(struct ahash_request *req)
  3065. {
  3066. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3067. struct crypto_stat *pstat;
  3068. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3069. pstat = &_qcrypto_stat;
  3070. _sha_init(req);
  3071. sha_ctx->alg = QCE_HASH_SHA1;
  3072. memset(&rctx->trailing_buf[0], 0x00, SHA1_BLOCK_SIZE);
  3073. memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
  3074. SHA1_DIGEST_SIZE);
  3075. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  3076. pstat->sha1_digest++;
  3077. return 0;
  3078. }
  3079. static int _sha256_init(struct ahash_request *req)
  3080. {
  3081. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3082. struct crypto_stat *pstat;
  3083. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3084. pstat = &_qcrypto_stat;
  3085. _sha_init(req);
  3086. sha_ctx->alg = QCE_HASH_SHA256;
  3087. memset(&rctx->trailing_buf[0], 0x00, SHA256_BLOCK_SIZE);
  3088. memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
  3089. SHA256_DIGEST_SIZE);
  3090. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  3091. pstat->sha256_digest++;
  3092. return 0;
  3093. }
  3094. static int _sha1_export(struct ahash_request *req, void *out)
  3095. {
  3096. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3097. struct sha1_state *out_ctx = (struct sha1_state *)out;
  3098. out_ctx->count = rctx->count;
  3099. _byte_stream_to_words(out_ctx->state, rctx->digest, SHA1_DIGEST_SIZE);
  3100. memcpy(out_ctx->buffer, rctx->trailing_buf, SHA1_BLOCK_SIZE);
  3101. return 0;
  3102. }
  3103. static int _sha1_hmac_export(struct ahash_request *req, void *out)
  3104. {
  3105. return _sha1_export(req, out);
  3106. }
  3107. /* crypto hw padding constant for hmac first operation */
  3108. #define HMAC_PADDING 64
  3109. static int __sha1_import_common(struct ahash_request *req, const void *in,
  3110. bool hmac)
  3111. {
  3112. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3113. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3114. struct sha1_state *in_ctx = (struct sha1_state *)in;
  3115. u64 hw_count = in_ctx->count;
  3116. rctx->count = in_ctx->count;
  3117. memcpy(rctx->trailing_buf, in_ctx->buffer, SHA1_BLOCK_SIZE);
  3118. if (in_ctx->count <= SHA1_BLOCK_SIZE) {
  3119. rctx->first_blk = 1;
  3120. } else {
  3121. rctx->first_blk = 0;
  3122. /*
  3123. * For hmac, there is a hardware padding done
  3124. * when first is set. So the byte_count will be
  3125. * incremened by 64 after the operstion of first
  3126. */
  3127. if (hmac)
  3128. hw_count += HMAC_PADDING;
  3129. }
  3130. rctx->byte_count[0] = (uint32_t)(hw_count & 0xFFFFFFC0);
  3131. rctx->byte_count[1] = (uint32_t)(hw_count >> 32);
  3132. _words_to_byte_stream(in_ctx->state, rctx->digest, sha_ctx->diglen);
  3133. rctx->trailing_buf_len = (uint32_t)(in_ctx->count &
  3134. (SHA1_BLOCK_SIZE-1));
  3135. return 0;
  3136. }
  3137. static int _sha1_import(struct ahash_request *req, const void *in)
  3138. {
  3139. return __sha1_import_common(req, in, false);
  3140. }
  3141. static int _sha1_hmac_import(struct ahash_request *req, const void *in)
  3142. {
  3143. return __sha1_import_common(req, in, true);
  3144. }
  3145. static int _sha256_export(struct ahash_request *req, void *out)
  3146. {
  3147. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3148. struct sha256_state *out_ctx = (struct sha256_state *)out;
  3149. out_ctx->count = rctx->count;
  3150. _byte_stream_to_words(out_ctx->state, rctx->digest, SHA256_DIGEST_SIZE);
  3151. memcpy(out_ctx->buf, rctx->trailing_buf, SHA256_BLOCK_SIZE);
  3152. return 0;
  3153. }
  3154. static int _sha256_hmac_export(struct ahash_request *req, void *out)
  3155. {
  3156. return _sha256_export(req, out);
  3157. }
  3158. static int __sha256_import_common(struct ahash_request *req, const void *in,
  3159. bool hmac)
  3160. {
  3161. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3162. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3163. struct sha256_state *in_ctx = (struct sha256_state *)in;
  3164. u64 hw_count = in_ctx->count;
  3165. rctx->count = in_ctx->count;
  3166. memcpy(rctx->trailing_buf, in_ctx->buf, SHA256_BLOCK_SIZE);
  3167. if (in_ctx->count <= SHA256_BLOCK_SIZE) {
  3168. rctx->first_blk = 1;
  3169. } else {
  3170. rctx->first_blk = 0;
  3171. /*
  3172. * for hmac, there is a hardware padding done
  3173. * when first is set. So the byte_count will be
  3174. * incremened by 64 after the operstion of first
  3175. */
  3176. if (hmac)
  3177. hw_count += HMAC_PADDING;
  3178. }
  3179. rctx->byte_count[0] = (uint32_t)(hw_count & 0xFFFFFFC0);
  3180. rctx->byte_count[1] = (uint32_t)(hw_count >> 32);
  3181. _words_to_byte_stream(in_ctx->state, rctx->digest, sha_ctx->diglen);
  3182. rctx->trailing_buf_len = (uint32_t)(in_ctx->count &
  3183. (SHA256_BLOCK_SIZE-1));
  3184. return 0;
  3185. }
  3186. static int _sha256_import(struct ahash_request *req, const void *in)
  3187. {
  3188. return __sha256_import_common(req, in, false);
  3189. }
  3190. static int _sha256_hmac_import(struct ahash_request *req, const void *in)
  3191. {
  3192. return __sha256_import_common(req, in, true);
  3193. }
  3194. static int _copy_source(struct ahash_request *req)
  3195. {
  3196. struct qcrypto_sha_req_ctx *srctx = NULL;
  3197. uint32_t bytes = 0;
  3198. uint32_t num_sg = 0;
  3199. srctx = ahash_request_ctx(req);
  3200. srctx->orig_src = req->src;
  3201. srctx->data = kzalloc((req->nbytes + 64), GFP_ATOMIC);
  3202. if (srctx->data == NULL) {
  3203. pr_err("Mem Alloc fail rctx->data, err %ld for 0x%x\n",
  3204. PTR_ERR(srctx->data), (req->nbytes + 64));
  3205. return -ENOMEM;
  3206. }
  3207. num_sg = qcrypto_count_sg(req->src, req->nbytes);
  3208. bytes = qcrypto_sg_copy_to_buffer(req->src, num_sg, srctx->data,
  3209. req->nbytes);
  3210. if (bytes != req->nbytes)
  3211. pr_warn("bytes copied=0x%x bytes to copy= 0x%x\n", bytes,
  3212. req->nbytes);
  3213. sg_set_buf(&srctx->dsg, srctx->data,
  3214. req->nbytes);
  3215. sg_mark_end(&srctx->dsg);
  3216. req->src = &srctx->dsg;
  3217. return 0;
  3218. }
  3219. static int _sha_update(struct ahash_request *req, uint32_t sha_block_size)
  3220. {
  3221. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3222. struct crypto_priv *cp = sha_ctx->cp;
  3223. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3224. uint32_t total, len, num_sg;
  3225. struct scatterlist *sg_last;
  3226. uint8_t *k_src = NULL;
  3227. uint32_t sha_pad_len = 0;
  3228. uint32_t trailing_buf_len = 0;
  3229. uint32_t nbytes;
  3230. uint32_t offset = 0;
  3231. uint32_t bytes = 0;
  3232. uint8_t *staging;
  3233. int ret = 0;
  3234. /* check for trailing buffer from previous updates and append it */
  3235. total = req->nbytes + rctx->trailing_buf_len;
  3236. len = req->nbytes;
  3237. if (total <= sha_block_size) {
  3238. k_src = &rctx->trailing_buf[rctx->trailing_buf_len];
  3239. num_sg = qcrypto_count_sg(req->src, len);
  3240. bytes = qcrypto_sg_copy_to_buffer(req->src, num_sg, k_src, len);
  3241. rctx->trailing_buf_len = total;
  3242. return 0;
  3243. }
  3244. /* save the original req structure fields*/
  3245. rctx->src = req->src;
  3246. rctx->nbytes = req->nbytes;
  3247. staging = (uint8_t *)ALIGN(((uintptr_t)rctx->staging_dmabuf),
  3248. L1_CACHE_BYTES);
  3249. memcpy(staging, rctx->trailing_buf, rctx->trailing_buf_len);
  3250. k_src = &rctx->trailing_buf[0];
  3251. /* get new trailing buffer */
  3252. sha_pad_len = ALIGN(total, sha_block_size) - total;
  3253. trailing_buf_len = sha_block_size - sha_pad_len;
  3254. offset = req->nbytes - trailing_buf_len;
  3255. if (offset != req->nbytes)
  3256. scatterwalk_map_and_copy(k_src, req->src, offset,
  3257. trailing_buf_len, 0);
  3258. nbytes = total - trailing_buf_len;
  3259. num_sg = qcrypto_count_sg(req->src, req->nbytes);
  3260. len = rctx->trailing_buf_len;
  3261. sg_last = req->src;
  3262. while (len < nbytes) {
  3263. if ((len + sg_last->length) > nbytes)
  3264. break;
  3265. len += sg_last->length;
  3266. sg_last = sg_next(sg_last);
  3267. }
  3268. if (rctx->trailing_buf_len) {
  3269. if (cp->ce_support.aligned_only) {
  3270. rctx->data2 = kzalloc((req->nbytes + 64), GFP_ATOMIC);
  3271. if (rctx->data2 == NULL)
  3272. return -ENOMEM;
  3273. memcpy(rctx->data2, staging,
  3274. rctx->trailing_buf_len);
  3275. memcpy((rctx->data2 + rctx->trailing_buf_len),
  3276. rctx->data, req->src->length);
  3277. kfree_sensitive(rctx->data);
  3278. rctx->data = rctx->data2;
  3279. sg_set_buf(&rctx->sg[0], rctx->data,
  3280. (rctx->trailing_buf_len +
  3281. req->src->length));
  3282. req->src = rctx->sg;
  3283. sg_mark_end(&rctx->sg[0]);
  3284. } else {
  3285. sg_mark_end(sg_last);
  3286. memset(rctx->sg, 0, sizeof(rctx->sg));
  3287. sg_set_buf(&rctx->sg[0], staging,
  3288. rctx->trailing_buf_len);
  3289. sg_mark_end(&rctx->sg[1]);
  3290. sg_chain(rctx->sg, 2, req->src);
  3291. req->src = rctx->sg;
  3292. }
  3293. } else
  3294. sg_mark_end(sg_last);
  3295. req->nbytes = nbytes;
  3296. rctx->trailing_buf_len = trailing_buf_len;
  3297. ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
  3298. return ret;
  3299. }
  3300. static int _sha1_update(struct ahash_request *req)
  3301. {
  3302. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3303. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3304. struct crypto_priv *cp = sha_ctx->cp;
  3305. if (cp->ce_support.aligned_only) {
  3306. if (_copy_source(req))
  3307. return -ENOMEM;
  3308. }
  3309. rctx->count += req->nbytes;
  3310. return _sha_update(req, SHA1_BLOCK_SIZE);
  3311. }
  3312. static int _sha256_update(struct ahash_request *req)
  3313. {
  3314. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3315. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3316. struct crypto_priv *cp = sha_ctx->cp;
  3317. if (cp->ce_support.aligned_only) {
  3318. if (_copy_source(req))
  3319. return -ENOMEM;
  3320. }
  3321. rctx->count += req->nbytes;
  3322. return _sha_update(req, SHA256_BLOCK_SIZE);
  3323. }
  3324. static int _sha_final(struct ahash_request *req, uint32_t sha_block_size)
  3325. {
  3326. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3327. struct crypto_priv *cp = sha_ctx->cp;
  3328. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3329. int ret = 0;
  3330. uint8_t *staging;
  3331. if (cp->ce_support.aligned_only) {
  3332. if (_copy_source(req))
  3333. return -ENOMEM;
  3334. }
  3335. rctx->last_blk = 1;
  3336. /* save the original req structure fields*/
  3337. rctx->src = req->src;
  3338. rctx->nbytes = req->nbytes;
  3339. staging = (uint8_t *)ALIGN(((uintptr_t)rctx->staging_dmabuf),
  3340. L1_CACHE_BYTES);
  3341. memcpy(staging, rctx->trailing_buf, rctx->trailing_buf_len);
  3342. sg_set_buf(&rctx->sg[0], staging, rctx->trailing_buf_len);
  3343. sg_mark_end(&rctx->sg[0]);
  3344. req->src = &rctx->sg[0];
  3345. req->nbytes = rctx->trailing_buf_len;
  3346. ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
  3347. return ret;
  3348. }
  3349. static int _sha1_final(struct ahash_request *req)
  3350. {
  3351. return _sha_final(req, SHA1_BLOCK_SIZE);
  3352. }
  3353. static int _sha256_final(struct ahash_request *req)
  3354. {
  3355. return _sha_final(req, SHA256_BLOCK_SIZE);
  3356. }
  3357. static int _sha_digest(struct ahash_request *req)
  3358. {
  3359. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3360. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3361. struct crypto_priv *cp = sha_ctx->cp;
  3362. int ret = 0;
  3363. if (cp->ce_support.aligned_only) {
  3364. if (_copy_source(req))
  3365. return -ENOMEM;
  3366. }
  3367. /* save the original req structure fields*/
  3368. rctx->src = req->src;
  3369. rctx->nbytes = req->nbytes;
  3370. rctx->first_blk = 1;
  3371. rctx->last_blk = 1;
  3372. ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
  3373. return ret;
  3374. }
  3375. static int _sha1_digest(struct ahash_request *req)
  3376. {
  3377. _sha1_init(req);
  3378. return _sha_digest(req);
  3379. }
  3380. static int _sha256_digest(struct ahash_request *req)
  3381. {
  3382. _sha256_init(req);
  3383. return _sha_digest(req);
  3384. }
  3385. static void _crypto_sha_hmac_ahash_req_complete(
  3386. struct crypto_async_request *req, int err)
  3387. {
  3388. struct completion *ahash_req_complete = req->data;
  3389. if (err == -EINPROGRESS)
  3390. return;
  3391. complete(ahash_req_complete);
  3392. }
  3393. static int _sha_hmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  3394. unsigned int len)
  3395. {
  3396. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(&tfm->base);
  3397. uint8_t *in_buf;
  3398. int ret = 0;
  3399. struct scatterlist sg = {0};
  3400. struct ahash_request *ahash_req;
  3401. struct completion ahash_req_complete;
  3402. ahash_req = ahash_request_alloc(tfm, GFP_KERNEL);
  3403. if (ahash_req == NULL)
  3404. return -ENOMEM;
  3405. init_completion(&ahash_req_complete);
  3406. ahash_request_set_callback(ahash_req,
  3407. CRYPTO_TFM_REQ_MAY_BACKLOG,
  3408. _crypto_sha_hmac_ahash_req_complete,
  3409. &ahash_req_complete);
  3410. crypto_ahash_clear_flags(tfm, ~0);
  3411. in_buf = kzalloc(len + 64, GFP_KERNEL);
  3412. if (in_buf == NULL) {
  3413. ahash_request_free(ahash_req);
  3414. return -ENOMEM;
  3415. }
  3416. memcpy(in_buf, key, len);
  3417. sg_set_buf(&sg, in_buf, len);
  3418. sg_mark_end(&sg);
  3419. ahash_request_set_crypt(ahash_req, &sg,
  3420. &sha_ctx->authkey[0], len);
  3421. if (sha_ctx->alg == QCE_HASH_SHA1)
  3422. ret = _sha1_digest(ahash_req);
  3423. else
  3424. ret = _sha256_digest(ahash_req);
  3425. if (ret == -EINPROGRESS || ret == -EBUSY) {
  3426. ret =
  3427. wait_for_completion_interruptible(
  3428. &ahash_req_complete);
  3429. reinit_completion(&sha_ctx->ahash_req_complete);
  3430. }
  3431. kfree_sensitive(in_buf);
  3432. ahash_request_free(ahash_req);
  3433. return ret;
  3434. }
  3435. static int _sha1_hmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  3436. unsigned int len)
  3437. {
  3438. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(&tfm->base);
  3439. int ret = 0;
  3440. memset(&sha_ctx->authkey[0], 0, SHA1_BLOCK_SIZE);
  3441. if (len <= SHA1_BLOCK_SIZE) {
  3442. memcpy(&sha_ctx->authkey[0], key, len);
  3443. sha_ctx->authkey_in_len = len;
  3444. } else {
  3445. sha_ctx->alg = QCE_HASH_SHA1;
  3446. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  3447. ret = _sha_hmac_setkey(tfm, key, len);
  3448. if (ret)
  3449. pr_err("SHA1 hmac setkey failed\n");
  3450. sha_ctx->authkey_in_len = SHA1_BLOCK_SIZE;
  3451. }
  3452. return ret;
  3453. }
  3454. static int _sha256_hmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  3455. unsigned int len)
  3456. {
  3457. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(&tfm->base);
  3458. int ret = 0;
  3459. memset(&sha_ctx->authkey[0], 0, SHA256_BLOCK_SIZE);
  3460. if (len <= SHA256_BLOCK_SIZE) {
  3461. memcpy(&sha_ctx->authkey[0], key, len);
  3462. sha_ctx->authkey_in_len = len;
  3463. } else {
  3464. sha_ctx->alg = QCE_HASH_SHA256;
  3465. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  3466. ret = _sha_hmac_setkey(tfm, key, len);
  3467. if (ret)
  3468. pr_err("SHA256 hmac setkey failed\n");
  3469. sha_ctx->authkey_in_len = SHA256_BLOCK_SIZE;
  3470. }
  3471. return ret;
  3472. }
  3473. static int _sha_hmac_init_ihash(struct ahash_request *req,
  3474. uint32_t sha_block_size)
  3475. {
  3476. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3477. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3478. int i;
  3479. for (i = 0; i < sha_block_size; i++)
  3480. rctx->trailing_buf[i] = sha_ctx->authkey[i] ^ 0x36;
  3481. rctx->trailing_buf_len = sha_block_size;
  3482. return 0;
  3483. }
  3484. static int _sha1_hmac_init(struct ahash_request *req)
  3485. {
  3486. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3487. struct crypto_priv *cp = sha_ctx->cp;
  3488. struct crypto_stat *pstat;
  3489. int ret = 0;
  3490. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3491. pstat = &_qcrypto_stat;
  3492. pstat->sha1_hmac_digest++;
  3493. _sha_init(req);
  3494. memset(&rctx->trailing_buf[0], 0x00, SHA1_BLOCK_SIZE);
  3495. memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
  3496. SHA1_DIGEST_SIZE);
  3497. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  3498. if (cp->ce_support.sha_hmac)
  3499. sha_ctx->alg = QCE_HASH_SHA1_HMAC;
  3500. else {
  3501. sha_ctx->alg = QCE_HASH_SHA1;
  3502. ret = _sha_hmac_init_ihash(req, SHA1_BLOCK_SIZE);
  3503. }
  3504. return ret;
  3505. }
  3506. static int _sha256_hmac_init(struct ahash_request *req)
  3507. {
  3508. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3509. struct crypto_priv *cp = sha_ctx->cp;
  3510. struct crypto_stat *pstat;
  3511. int ret = 0;
  3512. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3513. pstat = &_qcrypto_stat;
  3514. pstat->sha256_hmac_digest++;
  3515. _sha_init(req);
  3516. memset(&rctx->trailing_buf[0], 0x00, SHA256_BLOCK_SIZE);
  3517. memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
  3518. SHA256_DIGEST_SIZE);
  3519. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  3520. if (cp->ce_support.sha_hmac)
  3521. sha_ctx->alg = QCE_HASH_SHA256_HMAC;
  3522. else {
  3523. sha_ctx->alg = QCE_HASH_SHA256;
  3524. ret = _sha_hmac_init_ihash(req, SHA256_BLOCK_SIZE);
  3525. }
  3526. return ret;
  3527. }
  3528. static int _sha1_hmac_update(struct ahash_request *req)
  3529. {
  3530. return _sha1_update(req);
  3531. }
  3532. static int _sha256_hmac_update(struct ahash_request *req)
  3533. {
  3534. return _sha256_update(req);
  3535. }
  3536. static int _sha_hmac_outer_hash(struct ahash_request *req,
  3537. uint32_t sha_digest_size, uint32_t sha_block_size)
  3538. {
  3539. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3540. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3541. struct crypto_priv *cp = sha_ctx->cp;
  3542. int i;
  3543. uint8_t *staging;
  3544. uint8_t *p;
  3545. staging = (uint8_t *)ALIGN(((uintptr_t)rctx->staging_dmabuf),
  3546. L1_CACHE_BYTES);
  3547. p = staging;
  3548. for (i = 0; i < sha_block_size; i++)
  3549. *p++ = sha_ctx->authkey[i] ^ 0x5c;
  3550. memcpy(p, &rctx->digest[0], sha_digest_size);
  3551. sg_set_buf(&rctx->sg[0], staging, sha_block_size +
  3552. sha_digest_size);
  3553. sg_mark_end(&rctx->sg[0]);
  3554. /* save the original req structure fields*/
  3555. rctx->src = req->src;
  3556. rctx->nbytes = req->nbytes;
  3557. req->src = &rctx->sg[0];
  3558. req->nbytes = sha_block_size + sha_digest_size;
  3559. _sha_init(req);
  3560. if (sha_ctx->alg == QCE_HASH_SHA1) {
  3561. memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
  3562. SHA1_DIGEST_SIZE);
  3563. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  3564. } else {
  3565. memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
  3566. SHA256_DIGEST_SIZE);
  3567. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  3568. }
  3569. rctx->last_blk = 1;
  3570. return _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
  3571. }
  3572. static int _sha_hmac_inner_hash(struct ahash_request *req,
  3573. uint32_t sha_digest_size, uint32_t sha_block_size)
  3574. {
  3575. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3576. struct ahash_request *areq = sha_ctx->ahash_req;
  3577. struct crypto_priv *cp = sha_ctx->cp;
  3578. int ret = 0;
  3579. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3580. uint8_t *staging;
  3581. staging = (uint8_t *)ALIGN(((uintptr_t)rctx->staging_dmabuf),
  3582. L1_CACHE_BYTES);
  3583. memcpy(staging, rctx->trailing_buf, rctx->trailing_buf_len);
  3584. sg_set_buf(&rctx->sg[0], staging, rctx->trailing_buf_len);
  3585. sg_mark_end(&rctx->sg[0]);
  3586. ahash_request_set_crypt(areq, &rctx->sg[0], &rctx->digest[0],
  3587. rctx->trailing_buf_len);
  3588. rctx->last_blk = 1;
  3589. ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &areq->base);
  3590. if (ret == -EINPROGRESS || ret == -EBUSY) {
  3591. ret =
  3592. wait_for_completion_interruptible(&sha_ctx->ahash_req_complete);
  3593. reinit_completion(&sha_ctx->ahash_req_complete);
  3594. }
  3595. return ret;
  3596. }
  3597. static int _sha1_hmac_final(struct ahash_request *req)
  3598. {
  3599. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3600. struct crypto_priv *cp = sha_ctx->cp;
  3601. int ret = 0;
  3602. if (cp->ce_support.sha_hmac)
  3603. return _sha_final(req, SHA1_BLOCK_SIZE);
  3604. ret = _sha_hmac_inner_hash(req, SHA1_DIGEST_SIZE, SHA1_BLOCK_SIZE);
  3605. if (ret)
  3606. return ret;
  3607. return _sha_hmac_outer_hash(req, SHA1_DIGEST_SIZE, SHA1_BLOCK_SIZE);
  3608. }
  3609. static int _sha256_hmac_final(struct ahash_request *req)
  3610. {
  3611. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3612. struct crypto_priv *cp = sha_ctx->cp;
  3613. int ret = 0;
  3614. if (cp->ce_support.sha_hmac)
  3615. return _sha_final(req, SHA256_BLOCK_SIZE);
  3616. ret = _sha_hmac_inner_hash(req, SHA256_DIGEST_SIZE, SHA256_BLOCK_SIZE);
  3617. if (ret)
  3618. return ret;
  3619. return _sha_hmac_outer_hash(req, SHA256_DIGEST_SIZE, SHA256_BLOCK_SIZE);
  3620. }
  3621. static int _sha1_hmac_digest(struct ahash_request *req)
  3622. {
  3623. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3624. struct crypto_stat *pstat;
  3625. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3626. pstat = &_qcrypto_stat;
  3627. pstat->sha1_hmac_digest++;
  3628. _sha_init(req);
  3629. memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
  3630. SHA1_DIGEST_SIZE);
  3631. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  3632. sha_ctx->alg = QCE_HASH_SHA1_HMAC;
  3633. return _sha_digest(req);
  3634. }
  3635. static int _sha256_hmac_digest(struct ahash_request *req)
  3636. {
  3637. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3638. struct crypto_stat *pstat;
  3639. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3640. pstat = &_qcrypto_stat;
  3641. pstat->sha256_hmac_digest++;
  3642. _sha_init(req);
  3643. memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
  3644. SHA256_DIGEST_SIZE);
  3645. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  3646. sha_ctx->alg = QCE_HASH_SHA256_HMAC;
  3647. return _sha_digest(req);
  3648. }
  3649. static int _qcrypto_prefix_alg_cra_name(char cra_name[], unsigned int size)
  3650. {
  3651. char new_cra_name[CRYPTO_MAX_ALG_NAME] = "qcom-";
  3652. if (size >= CRYPTO_MAX_ALG_NAME - strlen("qcom-"))
  3653. return -EINVAL;
  3654. strlcat(new_cra_name, cra_name, CRYPTO_MAX_ALG_NAME);
  3655. strlcpy(cra_name, new_cra_name, CRYPTO_MAX_ALG_NAME);
  3656. return 0;
  3657. }
  3658. int qcrypto_cipher_set_device(struct skcipher_request *req, unsigned int dev)
  3659. {
  3660. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  3661. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  3662. struct crypto_priv *cp = ctx->cp;
  3663. struct crypto_engine *pengine = NULL;
  3664. pengine = _qrypto_find_pengine_device(cp, dev);
  3665. if (pengine == NULL)
  3666. return -ENODEV;
  3667. ctx->pengine = pengine;
  3668. return 0;
  3669. }
  3670. EXPORT_SYMBOL(qcrypto_cipher_set_device);
  3671. int qcrypto_cipher_set_device_hw(struct skcipher_request *req, u32 dev,
  3672. u32 hw_inst)
  3673. {
  3674. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3675. struct crypto_priv *cp = ctx->cp;
  3676. struct crypto_engine *pengine = NULL;
  3677. pengine = _qrypto_find_pengine_device_hw(cp, dev, hw_inst);
  3678. if (pengine == NULL)
  3679. return -ENODEV;
  3680. ctx->pengine = pengine;
  3681. return 0;
  3682. }
  3683. EXPORT_SYMBOL(qcrypto_cipher_set_device_hw);
  3684. int qcrypto_aead_set_device(struct aead_request *req, unsigned int dev)
  3685. {
  3686. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3687. struct crypto_priv *cp = ctx->cp;
  3688. struct crypto_engine *pengine = NULL;
  3689. pengine = _qrypto_find_pengine_device(cp, dev);
  3690. if (pengine == NULL)
  3691. return -ENODEV;
  3692. ctx->pengine = pengine;
  3693. return 0;
  3694. }
  3695. EXPORT_SYMBOL(qcrypto_aead_set_device);
  3696. int qcrypto_ahash_set_device(struct ahash_request *req, unsigned int dev)
  3697. {
  3698. struct qcrypto_sha_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3699. struct crypto_priv *cp = ctx->cp;
  3700. struct crypto_engine *pengine = NULL;
  3701. pengine = _qrypto_find_pengine_device(cp, dev);
  3702. if (pengine == NULL)
  3703. return -ENODEV;
  3704. ctx->pengine = pengine;
  3705. return 0;
  3706. }
  3707. EXPORT_SYMBOL(qcrypto_ahash_set_device);
  3708. int qcrypto_cipher_set_flag(struct skcipher_request *req, unsigned int flags)
  3709. {
  3710. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  3711. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  3712. struct crypto_priv *cp = ctx->cp;
  3713. if ((flags & QCRYPTO_CTX_USE_HW_KEY) &&
  3714. (!cp->platform_support.hw_key_support)) {
  3715. pr_err("%s HW key usage not supported\n", __func__);
  3716. return -EINVAL;
  3717. }
  3718. if (((flags | ctx->flags) & QCRYPTO_CTX_KEY_MASK) ==
  3719. QCRYPTO_CTX_KEY_MASK) {
  3720. pr_err("%s Cannot set all key flags\n", __func__);
  3721. return -EINVAL;
  3722. }
  3723. ctx->flags |= flags;
  3724. return 0;
  3725. }
  3726. EXPORT_SYMBOL(qcrypto_cipher_set_flag);
  3727. int qcrypto_aead_set_flag(struct aead_request *req, unsigned int flags)
  3728. {
  3729. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3730. struct crypto_priv *cp = ctx->cp;
  3731. if ((flags & QCRYPTO_CTX_USE_HW_KEY) &&
  3732. (!cp->platform_support.hw_key_support)) {
  3733. pr_err("%s HW key usage not supported\n", __func__);
  3734. return -EINVAL;
  3735. }
  3736. if (((flags | ctx->flags) & QCRYPTO_CTX_KEY_MASK) ==
  3737. QCRYPTO_CTX_KEY_MASK) {
  3738. pr_err("%s Cannot set all key flags\n", __func__);
  3739. return -EINVAL;
  3740. }
  3741. ctx->flags |= flags;
  3742. return 0;
  3743. }
  3744. EXPORT_SYMBOL(qcrypto_aead_set_flag);
  3745. int qcrypto_ahash_set_flag(struct ahash_request *req, unsigned int flags)
  3746. {
  3747. struct qcrypto_sha_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3748. struct crypto_priv *cp = ctx->cp;
  3749. if ((flags & QCRYPTO_CTX_USE_HW_KEY) &&
  3750. (!cp->platform_support.hw_key_support)) {
  3751. pr_err("%s HW key usage not supported\n", __func__);
  3752. return -EINVAL;
  3753. }
  3754. if (((flags | ctx->flags) & QCRYPTO_CTX_KEY_MASK) ==
  3755. QCRYPTO_CTX_KEY_MASK) {
  3756. pr_err("%s Cannot set all key flags\n", __func__);
  3757. return -EINVAL;
  3758. }
  3759. ctx->flags |= flags;
  3760. return 0;
  3761. }
  3762. EXPORT_SYMBOL(qcrypto_ahash_set_flag);
  3763. int qcrypto_cipher_clear_flag(struct skcipher_request *req,
  3764. unsigned int flags)
  3765. {
  3766. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  3767. struct qcrypto_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
  3768. ctx->flags &= ~flags;
  3769. return 0;
  3770. }
  3771. EXPORT_SYMBOL(qcrypto_cipher_clear_flag);
  3772. int qcrypto_aead_clear_flag(struct aead_request *req, unsigned int flags)
  3773. {
  3774. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3775. ctx->flags &= ~flags;
  3776. return 0;
  3777. }
  3778. EXPORT_SYMBOL(qcrypto_aead_clear_flag);
  3779. int qcrypto_ahash_clear_flag(struct ahash_request *req, unsigned int flags)
  3780. {
  3781. struct qcrypto_sha_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3782. ctx->flags &= ~flags;
  3783. return 0;
  3784. }
  3785. EXPORT_SYMBOL(qcrypto_ahash_clear_flag);
  3786. static struct ahash_alg _qcrypto_ahash_algos[] = {
  3787. {
  3788. .init = _sha1_init,
  3789. .update = _sha1_update,
  3790. .final = _sha1_final,
  3791. .digest = _sha1_digest,
  3792. .export = _sha1_export,
  3793. .import = _sha1_import,
  3794. .halg = {
  3795. .digestsize = SHA1_DIGEST_SIZE,
  3796. .statesize = sizeof(struct sha1_state),
  3797. .base = {
  3798. .cra_name = "sha1",
  3799. .cra_driver_name = "qcrypto-sha1",
  3800. .cra_priority = 300,
  3801. .cra_flags = CRYPTO_ALG_ASYNC,
  3802. .cra_blocksize = SHA1_BLOCK_SIZE,
  3803. .cra_ctxsize = sizeof(struct qcrypto_sha_ctx),
  3804. .cra_alignmask = 0,
  3805. .cra_module = THIS_MODULE,
  3806. .cra_init = _qcrypto_ahash_cra_init,
  3807. .cra_exit = _qcrypto_ahash_cra_exit,
  3808. },
  3809. },
  3810. },
  3811. {
  3812. .init = _sha256_init,
  3813. .update = _sha256_update,
  3814. .final = _sha256_final,
  3815. .digest = _sha256_digest,
  3816. .export = _sha256_export,
  3817. .import = _sha256_import,
  3818. .halg = {
  3819. .digestsize = SHA256_DIGEST_SIZE,
  3820. .statesize = sizeof(struct sha256_state),
  3821. .base = {
  3822. .cra_name = "sha256",
  3823. .cra_driver_name = "qcrypto-sha256",
  3824. .cra_priority = 300,
  3825. .cra_flags = CRYPTO_ALG_ASYNC,
  3826. .cra_blocksize = SHA256_BLOCK_SIZE,
  3827. .cra_ctxsize = sizeof(struct qcrypto_sha_ctx),
  3828. .cra_alignmask = 0,
  3829. .cra_module = THIS_MODULE,
  3830. .cra_init = _qcrypto_ahash_cra_init,
  3831. .cra_exit = _qcrypto_ahash_cra_exit,
  3832. },
  3833. },
  3834. },
  3835. };
  3836. static struct ahash_alg _qcrypto_sha_hmac_algos[] = {
  3837. {
  3838. .init = _sha1_hmac_init,
  3839. .update = _sha1_hmac_update,
  3840. .final = _sha1_hmac_final,
  3841. .export = _sha1_hmac_export,
  3842. .import = _sha1_hmac_import,
  3843. .digest = _sha1_hmac_digest,
  3844. .setkey = _sha1_hmac_setkey,
  3845. .halg = {
  3846. .digestsize = SHA1_DIGEST_SIZE,
  3847. .statesize = sizeof(struct sha1_state),
  3848. .base = {
  3849. .cra_name = "hmac(sha1)",
  3850. .cra_driver_name = "qcrypto-hmac-sha1",
  3851. .cra_priority = 300,
  3852. .cra_flags = CRYPTO_ALG_ASYNC,
  3853. .cra_blocksize = SHA1_BLOCK_SIZE,
  3854. .cra_ctxsize = sizeof(struct qcrypto_sha_ctx),
  3855. .cra_alignmask = 0,
  3856. .cra_module = THIS_MODULE,
  3857. .cra_init = _qcrypto_ahash_hmac_cra_init,
  3858. .cra_exit = _qcrypto_ahash_cra_exit,
  3859. },
  3860. },
  3861. },
  3862. {
  3863. .init = _sha256_hmac_init,
  3864. .update = _sha256_hmac_update,
  3865. .final = _sha256_hmac_final,
  3866. .export = _sha256_hmac_export,
  3867. .import = _sha256_hmac_import,
  3868. .digest = _sha256_hmac_digest,
  3869. .setkey = _sha256_hmac_setkey,
  3870. .halg = {
  3871. .digestsize = SHA256_DIGEST_SIZE,
  3872. .statesize = sizeof(struct sha256_state),
  3873. .base = {
  3874. .cra_name = "hmac(sha256)",
  3875. .cra_driver_name = "qcrypto-hmac-sha256",
  3876. .cra_priority = 300,
  3877. .cra_flags = CRYPTO_ALG_ASYNC,
  3878. .cra_blocksize = SHA256_BLOCK_SIZE,
  3879. .cra_ctxsize = sizeof(struct qcrypto_sha_ctx),
  3880. .cra_alignmask = 0,
  3881. .cra_module = THIS_MODULE,
  3882. .cra_init = _qcrypto_ahash_hmac_cra_init,
  3883. .cra_exit = _qcrypto_ahash_cra_exit,
  3884. },
  3885. },
  3886. },
  3887. };
  3888. static struct skcipher_alg _qcrypto_sk_cipher_algos[] = {
  3889. {
  3890. .setkey = _qcrypto_setkey_aes,
  3891. .encrypt = _qcrypto_enc_aes_ecb,
  3892. .decrypt = _qcrypto_dec_aes_ecb,
  3893. .init = _qcrypto_aes_skcipher_init,
  3894. .exit = _qcrypto_aes_skcipher_exit,
  3895. .min_keysize = AES_MIN_KEY_SIZE,
  3896. .max_keysize = AES_MAX_KEY_SIZE,
  3897. .base = {
  3898. .cra_name = "ecb(aes)",
  3899. .cra_driver_name = "qcrypto-ecb-aes",
  3900. .cra_priority = 300,
  3901. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC,
  3902. .cra_blocksize = AES_BLOCK_SIZE,
  3903. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3904. .cra_alignmask = 0,
  3905. .cra_module = THIS_MODULE,
  3906. },
  3907. },
  3908. {
  3909. .setkey = _qcrypto_setkey_aes,
  3910. .encrypt = _qcrypto_enc_aes_cbc,
  3911. .decrypt = _qcrypto_dec_aes_cbc,
  3912. .init = _qcrypto_aes_skcipher_init,
  3913. .exit = _qcrypto_aes_skcipher_exit,
  3914. .min_keysize = AES_MIN_KEY_SIZE,
  3915. .max_keysize = AES_MAX_KEY_SIZE,
  3916. .ivsize = AES_BLOCK_SIZE,
  3917. .base = {
  3918. .cra_name = "cbc(aes)",
  3919. .cra_driver_name = "qcrypto-cbc-aes",
  3920. .cra_priority = 300,
  3921. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC,
  3922. .cra_blocksize = AES_BLOCK_SIZE,
  3923. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3924. .cra_alignmask = 0,
  3925. .cra_module = THIS_MODULE,
  3926. },
  3927. },
  3928. {
  3929. .setkey = _qcrypto_setkey_aes,
  3930. .encrypt = _qcrypto_enc_aes_ctr,
  3931. .decrypt = _qcrypto_dec_aes_ctr,
  3932. .init = _qcrypto_aes_skcipher_init,
  3933. .exit = _qcrypto_aes_skcipher_exit,
  3934. .min_keysize = AES_MIN_KEY_SIZE,
  3935. .max_keysize = AES_MAX_KEY_SIZE,
  3936. .ivsize = AES_BLOCK_SIZE,
  3937. .base = {
  3938. .cra_name = "ctr(aes)",
  3939. .cra_driver_name = "qcrypto-ctr-aes",
  3940. .cra_priority = 300,
  3941. .cra_flags = CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC,
  3942. .cra_blocksize = AES_BLOCK_SIZE,
  3943. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3944. .cra_alignmask = 0,
  3945. .cra_module = THIS_MODULE,
  3946. },
  3947. },
  3948. {
  3949. .setkey = _qcrypto_setkey_des,
  3950. .encrypt = _qcrypto_enc_des_ecb,
  3951. .decrypt = _qcrypto_dec_des_ecb,
  3952. .init = _qcrypto_skcipher_init,
  3953. .exit = _qcrypto_skcipher_exit,
  3954. .min_keysize = DES_KEY_SIZE,
  3955. .max_keysize = DES_KEY_SIZE,
  3956. .base = {
  3957. .cra_name = "ecb(des)",
  3958. .cra_driver_name = "qcrypto-ecb-des",
  3959. .cra_priority = 300,
  3960. .cra_flags = CRYPTO_ALG_ASYNC,
  3961. .cra_blocksize = DES_BLOCK_SIZE,
  3962. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3963. .cra_alignmask = 0,
  3964. .cra_module = THIS_MODULE,
  3965. },
  3966. },
  3967. {
  3968. .setkey = _qcrypto_setkey_des,
  3969. .encrypt = _qcrypto_enc_des_cbc,
  3970. .decrypt = _qcrypto_dec_des_cbc,
  3971. .init = _qcrypto_skcipher_init,
  3972. .exit = _qcrypto_skcipher_exit,
  3973. .min_keysize = DES_KEY_SIZE,
  3974. .max_keysize = DES_KEY_SIZE,
  3975. .ivsize = DES_BLOCK_SIZE,
  3976. .base = {
  3977. .cra_name = "cbc(des)",
  3978. .cra_driver_name = "qcrypto-cbc-des",
  3979. .cra_priority = 300,
  3980. .cra_flags = CRYPTO_ALG_ASYNC,
  3981. .cra_blocksize = DES_BLOCK_SIZE,
  3982. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3983. .cra_alignmask = 0,
  3984. .cra_module = THIS_MODULE,
  3985. },
  3986. },
  3987. {
  3988. .setkey = _qcrypto_setkey_3des,
  3989. .encrypt = _qcrypto_enc_3des_ecb,
  3990. .decrypt = _qcrypto_dec_3des_ecb,
  3991. .init = _qcrypto_skcipher_init,
  3992. .exit = _qcrypto_skcipher_exit,
  3993. .min_keysize = DES3_EDE_KEY_SIZE,
  3994. .max_keysize = DES3_EDE_KEY_SIZE,
  3995. .base = {
  3996. .cra_name = "ecb(des3_ede)",
  3997. .cra_driver_name = "qcrypto-ecb-3des",
  3998. .cra_priority = 300,
  3999. .cra_flags = CRYPTO_ALG_ASYNC,
  4000. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  4001. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4002. .cra_alignmask = 0,
  4003. .cra_module = THIS_MODULE,
  4004. },
  4005. },
  4006. {
  4007. .setkey = _qcrypto_setkey_3des,
  4008. .encrypt = _qcrypto_enc_3des_cbc,
  4009. .decrypt = _qcrypto_dec_3des_cbc,
  4010. .init = _qcrypto_skcipher_init,
  4011. .exit = _qcrypto_skcipher_exit,
  4012. .min_keysize = DES3_EDE_KEY_SIZE,
  4013. .max_keysize = DES3_EDE_KEY_SIZE,
  4014. .ivsize = DES3_EDE_BLOCK_SIZE,
  4015. .base = {
  4016. .cra_name = "cbc(des3_ede)",
  4017. .cra_driver_name = "qcrypto-cbc-3des",
  4018. .cra_priority = 300,
  4019. .cra_flags = CRYPTO_ALG_ASYNC,
  4020. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  4021. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4022. .cra_alignmask = 0,
  4023. .cra_module = THIS_MODULE,
  4024. },
  4025. },
  4026. };
  4027. static struct skcipher_alg _qcrypto_sk_cipher_xts_algo = {
  4028. .setkey = _qcrypto_setkey_aes_xts,
  4029. .encrypt = _qcrypto_enc_aes_xts,
  4030. .decrypt = _qcrypto_dec_aes_xts,
  4031. .init = _qcrypto_skcipher_init,
  4032. .exit = _qcrypto_skcipher_exit,
  4033. .min_keysize = AES_MIN_KEY_SIZE,
  4034. .max_keysize = AES_MAX_KEY_SIZE,
  4035. .ivsize = AES_BLOCK_SIZE,
  4036. .base = {
  4037. .cra_name = "xts(aes)",
  4038. .cra_driver_name = "qcrypto-xts-aes",
  4039. .cra_priority = 300,
  4040. .cra_flags = CRYPTO_ALG_ASYNC,
  4041. .cra_blocksize = AES_BLOCK_SIZE,
  4042. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4043. .cra_alignmask = 0,
  4044. .cra_module = THIS_MODULE,
  4045. },
  4046. };
  4047. static struct aead_alg _qcrypto_aead_sha1_hmac_algos[] = {
  4048. {
  4049. .setkey = _qcrypto_aead_setkey,
  4050. .setauthsize = _qcrypto_aead_setauthsize,
  4051. .encrypt = _qcrypto_aead_encrypt_aes_cbc,
  4052. .decrypt = _qcrypto_aead_decrypt_aes_cbc,
  4053. .init = _qcrypto_cra_aead_aes_sha1_init,
  4054. .exit = _qcrypto_cra_aead_aes_exit,
  4055. .ivsize = AES_BLOCK_SIZE,
  4056. .maxauthsize = SHA1_DIGEST_SIZE,
  4057. .base = {
  4058. .cra_name = "authenc(hmac(sha1),cbc(aes))",
  4059. .cra_driver_name = "qcrypto-aead-hmac-sha1-cbc-aes",
  4060. .cra_priority = 300,
  4061. .cra_flags = CRYPTO_ALG_ASYNC,
  4062. .cra_blocksize = AES_BLOCK_SIZE,
  4063. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4064. .cra_alignmask = 0,
  4065. .cra_module = THIS_MODULE,
  4066. },
  4067. },
  4068. {
  4069. .setkey = _qcrypto_aead_setkey,
  4070. .setauthsize = _qcrypto_aead_setauthsize,
  4071. .encrypt = _qcrypto_aead_encrypt_des_cbc,
  4072. .decrypt = _qcrypto_aead_decrypt_des_cbc,
  4073. .init = _qcrypto_cra_aead_sha1_init,
  4074. .exit = _qcrypto_cra_aead_exit,
  4075. .ivsize = DES_BLOCK_SIZE,
  4076. .maxauthsize = SHA1_DIGEST_SIZE,
  4077. .base = {
  4078. .cra_name = "authenc(hmac(sha1),cbc(des))",
  4079. .cra_driver_name = "qcrypto-aead-hmac-sha1-cbc-des",
  4080. .cra_priority = 300,
  4081. .cra_flags = CRYPTO_ALG_ASYNC,
  4082. .cra_blocksize = DES_BLOCK_SIZE,
  4083. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4084. .cra_alignmask = 0,
  4085. .cra_module = THIS_MODULE,
  4086. },
  4087. },
  4088. {
  4089. .setkey = _qcrypto_aead_setkey,
  4090. .setauthsize = _qcrypto_aead_setauthsize,
  4091. .encrypt = _qcrypto_aead_encrypt_3des_cbc,
  4092. .decrypt = _qcrypto_aead_decrypt_3des_cbc,
  4093. .init = _qcrypto_cra_aead_sha1_init,
  4094. .exit = _qcrypto_cra_aead_exit,
  4095. .ivsize = DES3_EDE_BLOCK_SIZE,
  4096. .maxauthsize = SHA1_DIGEST_SIZE,
  4097. .base = {
  4098. .cra_name = "authenc(hmac(sha1),cbc(des3_ede))",
  4099. .cra_driver_name = "qcrypto-aead-hmac-sha1-cbc-3des",
  4100. .cra_priority = 300,
  4101. .cra_flags = CRYPTO_ALG_ASYNC,
  4102. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  4103. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4104. .cra_alignmask = 0,
  4105. .cra_module = THIS_MODULE,
  4106. },
  4107. },
  4108. };
  4109. static struct aead_alg _qcrypto_aead_sha256_hmac_algos[] = {
  4110. {
  4111. .setkey = _qcrypto_aead_setkey,
  4112. .setauthsize = _qcrypto_aead_setauthsize,
  4113. .encrypt = _qcrypto_aead_encrypt_aes_cbc,
  4114. .decrypt = _qcrypto_aead_decrypt_aes_cbc,
  4115. .init = _qcrypto_cra_aead_aes_sha256_init,
  4116. .exit = _qcrypto_cra_aead_aes_exit,
  4117. .ivsize = AES_BLOCK_SIZE,
  4118. .maxauthsize = SHA256_DIGEST_SIZE,
  4119. .base = {
  4120. .cra_name = "authenc(hmac(sha256),cbc(aes))",
  4121. .cra_driver_name = "qcrypto-aead-hmac-sha256-cbc-aes",
  4122. .cra_priority = 300,
  4123. .cra_flags = CRYPTO_ALG_ASYNC,
  4124. .cra_blocksize = AES_BLOCK_SIZE,
  4125. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4126. .cra_alignmask = 0,
  4127. .cra_module = THIS_MODULE,
  4128. },
  4129. },
  4130. {
  4131. .setkey = _qcrypto_aead_setkey,
  4132. .setauthsize = _qcrypto_aead_setauthsize,
  4133. .encrypt = _qcrypto_aead_encrypt_des_cbc,
  4134. .decrypt = _qcrypto_aead_decrypt_des_cbc,
  4135. .init = _qcrypto_cra_aead_sha256_init,
  4136. .exit = _qcrypto_cra_aead_exit,
  4137. .ivsize = DES_BLOCK_SIZE,
  4138. .maxauthsize = SHA256_DIGEST_SIZE,
  4139. .base = {
  4140. .cra_name = "authenc(hmac(sha256),cbc(des))",
  4141. .cra_driver_name = "qcrypto-aead-hmac-sha256-cbc-des",
  4142. .cra_priority = 300,
  4143. .cra_flags = CRYPTO_ALG_ASYNC,
  4144. .cra_blocksize = DES_BLOCK_SIZE,
  4145. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4146. .cra_alignmask = 0,
  4147. .cra_module = THIS_MODULE,
  4148. },
  4149. },
  4150. {
  4151. .setkey = _qcrypto_aead_setkey,
  4152. .setauthsize = _qcrypto_aead_setauthsize,
  4153. .encrypt = _qcrypto_aead_encrypt_3des_cbc,
  4154. .decrypt = _qcrypto_aead_decrypt_3des_cbc,
  4155. .init = _qcrypto_cra_aead_sha256_init,
  4156. .exit = _qcrypto_cra_aead_exit,
  4157. .ivsize = DES3_EDE_BLOCK_SIZE,
  4158. .maxauthsize = SHA256_DIGEST_SIZE,
  4159. .base = {
  4160. .cra_name = "authenc(hmac(sha256),cbc(des3_ede))",
  4161. .cra_driver_name = "qcrypto-aead-hmac-sha256-cbc-3des",
  4162. .cra_priority = 300,
  4163. .cra_flags = CRYPTO_ALG_ASYNC,
  4164. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  4165. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4166. .cra_alignmask = 0,
  4167. .cra_module = THIS_MODULE,
  4168. },
  4169. },
  4170. };
  4171. static struct aead_alg _qcrypto_aead_ccm_algo = {
  4172. .setkey = _qcrypto_aead_ccm_setkey,
  4173. .setauthsize = _qcrypto_aead_ccm_setauthsize,
  4174. .encrypt = _qcrypto_aead_encrypt_aes_ccm,
  4175. .decrypt = _qcrypto_aead_decrypt_aes_ccm,
  4176. .init = _qcrypto_cra_aead_ccm_init,
  4177. .exit = _qcrypto_cra_aead_exit,
  4178. .ivsize = AES_BLOCK_SIZE,
  4179. .maxauthsize = AES_BLOCK_SIZE,
  4180. .base = {
  4181. .cra_name = "ccm(aes)",
  4182. .cra_driver_name = "qcrypto-aes-ccm",
  4183. .cra_priority = 300,
  4184. .cra_flags = CRYPTO_ALG_ASYNC,
  4185. .cra_blocksize = AES_BLOCK_SIZE,
  4186. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4187. .cra_alignmask = 0,
  4188. .cra_module = THIS_MODULE,
  4189. },
  4190. };
  4191. static struct aead_alg _qcrypto_aead_rfc4309_ccm_algo = {
  4192. .setkey = _qcrypto_aead_rfc4309_ccm_setkey,
  4193. .setauthsize = _qcrypto_aead_rfc4309_ccm_setauthsize,
  4194. .encrypt = _qcrypto_aead_rfc4309_enc_aes_ccm,
  4195. .decrypt = _qcrypto_aead_rfc4309_dec_aes_ccm,
  4196. .init = _qcrypto_cra_aead_rfc4309_ccm_init,
  4197. .exit = _qcrypto_cra_aead_exit,
  4198. .ivsize = 8,
  4199. .maxauthsize = 16,
  4200. .base = {
  4201. .cra_name = "rfc4309(ccm(aes))",
  4202. .cra_driver_name = "qcrypto-rfc4309-aes-ccm",
  4203. .cra_priority = 300,
  4204. .cra_flags = CRYPTO_ALG_ASYNC,
  4205. .cra_blocksize = 1,
  4206. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4207. .cra_alignmask = 0,
  4208. .cra_module = THIS_MODULE,
  4209. },
  4210. };
  4211. static int _qcrypto_probe(struct platform_device *pdev)
  4212. {
  4213. int rc = 0;
  4214. void *handle;
  4215. struct crypto_priv *cp = &qcrypto_dev;
  4216. int i;
  4217. struct msm_ce_hw_support *platform_support;
  4218. struct crypto_engine *pengine;
  4219. unsigned long flags;
  4220. struct qcrypto_req_control *pqcrypto_req_control = NULL;
  4221. pengine = kzalloc(sizeof(*pengine), GFP_KERNEL);
  4222. if (!pengine)
  4223. return -ENOMEM;
  4224. pengine->icc_path = of_icc_get(&pdev->dev, "data_path");
  4225. if (IS_ERR(pengine->icc_path)) {
  4226. dev_err(&pdev->dev, "failed to get icc path\n");
  4227. rc = PTR_ERR(pengine->icc_path);
  4228. goto exit_kzfree;
  4229. }
  4230. pengine->bw_state = BUS_NO_BANDWIDTH;
  4231. rc = icc_set_bw(pengine->icc_path, CRYPTO_AVG_BW, CRYPTO_PEAK_BW);
  4232. if (rc) {
  4233. dev_err(&pdev->dev, "failed to set high bandwidth\n");
  4234. goto exit_kzfree;
  4235. }
  4236. handle = qce_open(pdev, &rc);
  4237. if (handle == NULL) {
  4238. rc = -ENODEV;
  4239. goto exit_free_pdata;
  4240. }
  4241. rc = icc_set_bw(pengine->icc_path, 0, 0);
  4242. if (rc) {
  4243. dev_err(&pdev->dev, "failed to set low bandwidth\n");
  4244. goto exit_qce_close;
  4245. }
  4246. platform_set_drvdata(pdev, pengine);
  4247. pengine->qce = handle;
  4248. pengine->pcp = cp;
  4249. pengine->pdev = pdev;
  4250. pengine->signature = 0xdeadbeef;
  4251. timer_setup(&(pengine->bw_reaper_timer),
  4252. qcrypto_bw_reaper_timer_callback, 0);
  4253. INIT_WORK(&pengine->bw_reaper_ws, qcrypto_bw_reaper_work);
  4254. INIT_WORK(&pengine->bw_allocate_ws, qcrypto_bw_allocate_work);
  4255. pengine->high_bw_req = false;
  4256. pengine->active_seq = 0;
  4257. pengine->last_active_seq = 0;
  4258. pengine->check_flag = false;
  4259. pengine->max_req_used = 0;
  4260. pengine->issue_req = false;
  4261. crypto_init_queue(&pengine->req_queue, MSM_QCRYPTO_REQ_QUEUE_LENGTH);
  4262. mutex_lock(&cp->engine_lock);
  4263. cp->total_units++;
  4264. pengine->unit = cp->total_units;
  4265. spin_lock_irqsave(&cp->lock, flags);
  4266. pengine->first_engine = list_empty(&cp->engine_list);
  4267. if (pengine->first_engine)
  4268. cp->first_engine = pengine;
  4269. list_add_tail(&pengine->elist, &cp->engine_list);
  4270. cp->next_engine = pengine;
  4271. spin_unlock_irqrestore(&cp->lock, flags);
  4272. qce_hw_support(pengine->qce, &cp->ce_support);
  4273. pengine->ce_hw_instance = cp->ce_support.ce_hw_instance;
  4274. pengine->max_req = cp->ce_support.max_request;
  4275. pqcrypto_req_control = kcalloc(pengine->max_req,
  4276. sizeof(struct qcrypto_req_control),
  4277. GFP_KERNEL);
  4278. if (pqcrypto_req_control == NULL) {
  4279. rc = -ENOMEM;
  4280. goto exit_unlock_mutex;
  4281. }
  4282. qcrypto_init_req_control(pengine, pqcrypto_req_control);
  4283. if (cp->ce_support.bam) {
  4284. cp->platform_support.ce_shared = cp->ce_support.is_shared;
  4285. cp->platform_support.shared_ce_resource = 0;
  4286. cp->platform_support.hw_key_support = cp->ce_support.hw_key;
  4287. cp->platform_support.sha_hmac = 1;
  4288. pengine->ce_device = cp->ce_support.ce_device;
  4289. } else {
  4290. platform_support =
  4291. (struct msm_ce_hw_support *)pdev->dev.platform_data;
  4292. cp->platform_support.ce_shared = platform_support->ce_shared;
  4293. cp->platform_support.shared_ce_resource =
  4294. platform_support->shared_ce_resource;
  4295. cp->platform_support.hw_key_support =
  4296. platform_support->hw_key_support;
  4297. cp->platform_support.sha_hmac = platform_support->sha_hmac;
  4298. }
  4299. if (cp->total_units != 1)
  4300. goto exit_unlock_mutex;
  4301. /* register crypto cipher algorithms the device supports */
  4302. for (i = 0; i < ARRAY_SIZE(_qcrypto_sk_cipher_algos); i++) {
  4303. struct qcrypto_alg *q_alg;
  4304. q_alg = _qcrypto_cipher_alg_alloc(cp,
  4305. &_qcrypto_sk_cipher_algos[i]);
  4306. if (IS_ERR(q_alg)) {
  4307. rc = PTR_ERR(q_alg);
  4308. goto err;
  4309. }
  4310. if (cp->ce_support.use_sw_aes_cbc_ecb_ctr_algo) {
  4311. rc = _qcrypto_prefix_alg_cra_name(
  4312. q_alg->cipher_alg.base.cra_name,
  4313. strlen(q_alg->cipher_alg.base.cra_name));
  4314. if (rc) {
  4315. dev_err(&pdev->dev,
  4316. "The algorithm name %s is too long.\n",
  4317. q_alg->cipher_alg.base.cra_name);
  4318. kfree(q_alg);
  4319. goto err;
  4320. }
  4321. }
  4322. rc = crypto_register_skcipher(&q_alg->cipher_alg);
  4323. if (rc) {
  4324. dev_err(&pdev->dev, "%s alg registration failed\n",
  4325. q_alg->cipher_alg.base.cra_driver_name);
  4326. kfree_sensitive(q_alg);
  4327. } else {
  4328. list_add_tail(&q_alg->entry, &cp->alg_list);
  4329. dev_info(&pdev->dev, "%s\n",
  4330. q_alg->cipher_alg.base.cra_driver_name);
  4331. }
  4332. }
  4333. /* register crypto cipher algorithms the device supports */
  4334. if (cp->ce_support.aes_xts) {
  4335. struct qcrypto_alg *q_alg;
  4336. q_alg = _qcrypto_cipher_alg_alloc(cp,
  4337. &_qcrypto_sk_cipher_xts_algo);
  4338. if (IS_ERR(q_alg)) {
  4339. rc = PTR_ERR(q_alg);
  4340. goto err;
  4341. }
  4342. if (cp->ce_support.use_sw_aes_xts_algo) {
  4343. rc = _qcrypto_prefix_alg_cra_name(
  4344. q_alg->cipher_alg.base.cra_name,
  4345. strlen(q_alg->cipher_alg.base.cra_name));
  4346. if (rc) {
  4347. dev_err(&pdev->dev,
  4348. "The algorithm name %s is too long.\n",
  4349. q_alg->cipher_alg.base.cra_name);
  4350. kfree(q_alg);
  4351. goto err;
  4352. }
  4353. }
  4354. rc = crypto_register_skcipher(&q_alg->cipher_alg);
  4355. if (rc) {
  4356. dev_err(&pdev->dev, "%s alg registration failed\n",
  4357. q_alg->cipher_alg.base.cra_driver_name);
  4358. kfree_sensitive(q_alg);
  4359. } else {
  4360. list_add_tail(&q_alg->entry, &cp->alg_list);
  4361. dev_info(&pdev->dev, "%s\n",
  4362. q_alg->cipher_alg.base.cra_driver_name);
  4363. }
  4364. }
  4365. /*
  4366. * Register crypto hash (sha1 and sha256) algorithms the
  4367. * device supports
  4368. */
  4369. for (i = 0; i < ARRAY_SIZE(_qcrypto_ahash_algos); i++) {
  4370. struct qcrypto_alg *q_alg = NULL;
  4371. q_alg = _qcrypto_sha_alg_alloc(cp, &_qcrypto_ahash_algos[i]);
  4372. if (IS_ERR(q_alg)) {
  4373. rc = PTR_ERR(q_alg);
  4374. goto err;
  4375. }
  4376. if (cp->ce_support.use_sw_ahash_algo) {
  4377. rc = _qcrypto_prefix_alg_cra_name(
  4378. q_alg->sha_alg.halg.base.cra_name,
  4379. strlen(q_alg->sha_alg.halg.base.cra_name));
  4380. if (rc) {
  4381. dev_err(&pdev->dev,
  4382. "The algorithm name %s is too long.\n",
  4383. q_alg->sha_alg.halg.base.cra_name);
  4384. kfree(q_alg);
  4385. goto err;
  4386. }
  4387. }
  4388. rc = crypto_register_ahash(&q_alg->sha_alg);
  4389. if (rc) {
  4390. dev_err(&pdev->dev, "%s alg registration failed\n",
  4391. q_alg->sha_alg.halg.base.cra_driver_name);
  4392. kfree_sensitive(q_alg);
  4393. } else {
  4394. list_add_tail(&q_alg->entry, &cp->alg_list);
  4395. dev_info(&pdev->dev, "%s\n",
  4396. q_alg->sha_alg.halg.base.cra_driver_name);
  4397. }
  4398. }
  4399. /* register crypto aead (hmac-sha1) algorithms the device supports */
  4400. if (cp->ce_support.sha1_hmac_20 || cp->ce_support.sha1_hmac
  4401. || cp->ce_support.sha_hmac) {
  4402. for (i = 0; i < ARRAY_SIZE(_qcrypto_aead_sha1_hmac_algos);
  4403. i++) {
  4404. struct qcrypto_alg *q_alg;
  4405. q_alg = _qcrypto_aead_alg_alloc(cp,
  4406. &_qcrypto_aead_sha1_hmac_algos[i]);
  4407. if (IS_ERR(q_alg)) {
  4408. rc = PTR_ERR(q_alg);
  4409. goto err;
  4410. }
  4411. if (cp->ce_support.use_sw_aead_algo) {
  4412. rc = _qcrypto_prefix_alg_cra_name(
  4413. q_alg->aead_alg.base.cra_name,
  4414. strlen(q_alg->aead_alg.base.cra_name));
  4415. if (rc) {
  4416. dev_err(&pdev->dev,
  4417. "The algorithm name %s is too long.\n",
  4418. q_alg->aead_alg.base.cra_name);
  4419. kfree(q_alg);
  4420. goto err;
  4421. }
  4422. }
  4423. rc = crypto_register_aead(&q_alg->aead_alg);
  4424. if (rc) {
  4425. dev_err(&pdev->dev,
  4426. "%s alg registration failed\n",
  4427. q_alg->aead_alg.base.cra_driver_name);
  4428. kfree(q_alg);
  4429. } else {
  4430. list_add_tail(&q_alg->entry, &cp->alg_list);
  4431. dev_info(&pdev->dev, "%s\n",
  4432. q_alg->aead_alg.base.cra_driver_name);
  4433. }
  4434. }
  4435. }
  4436. /* register crypto aead (hmac-sha256) algorithms the device supports */
  4437. if (cp->ce_support.sha_hmac) {
  4438. for (i = 0; i < ARRAY_SIZE(_qcrypto_aead_sha256_hmac_algos);
  4439. i++) {
  4440. struct qcrypto_alg *q_alg;
  4441. q_alg = _qcrypto_aead_alg_alloc(cp,
  4442. &_qcrypto_aead_sha256_hmac_algos[i]);
  4443. if (IS_ERR(q_alg)) {
  4444. rc = PTR_ERR(q_alg);
  4445. goto err;
  4446. }
  4447. if (cp->ce_support.use_sw_aead_algo) {
  4448. rc = _qcrypto_prefix_alg_cra_name(
  4449. q_alg->aead_alg.base.cra_name,
  4450. strlen(q_alg->aead_alg.base.cra_name));
  4451. if (rc) {
  4452. dev_err(&pdev->dev,
  4453. "The algorithm name %s is too long.\n",
  4454. q_alg->aead_alg.base.cra_name);
  4455. kfree(q_alg);
  4456. goto err;
  4457. }
  4458. }
  4459. rc = crypto_register_aead(&q_alg->aead_alg);
  4460. if (rc) {
  4461. dev_err(&pdev->dev,
  4462. "%s alg registration failed\n",
  4463. q_alg->aead_alg.base.cra_driver_name);
  4464. kfree(q_alg);
  4465. } else {
  4466. list_add_tail(&q_alg->entry, &cp->alg_list);
  4467. dev_info(&pdev->dev, "%s\n",
  4468. q_alg->aead_alg.base.cra_driver_name);
  4469. }
  4470. }
  4471. }
  4472. if ((cp->ce_support.sha_hmac) || (cp->platform_support.sha_hmac)) {
  4473. /* register crypto hmac algorithms the device supports */
  4474. for (i = 0; i < ARRAY_SIZE(_qcrypto_sha_hmac_algos); i++) {
  4475. struct qcrypto_alg *q_alg = NULL;
  4476. q_alg = _qcrypto_sha_alg_alloc(cp,
  4477. &_qcrypto_sha_hmac_algos[i]);
  4478. if (IS_ERR(q_alg)) {
  4479. rc = PTR_ERR(q_alg);
  4480. goto err;
  4481. }
  4482. if (cp->ce_support.use_sw_hmac_algo) {
  4483. rc = _qcrypto_prefix_alg_cra_name(
  4484. q_alg->sha_alg.halg.base.cra_name,
  4485. strlen(
  4486. q_alg->sha_alg.halg.base.cra_name));
  4487. if (rc) {
  4488. dev_err(&pdev->dev,
  4489. "The algorithm name %s is too long.\n",
  4490. q_alg->sha_alg.halg.base.cra_name);
  4491. kfree(q_alg);
  4492. goto err;
  4493. }
  4494. }
  4495. rc = crypto_register_ahash(&q_alg->sha_alg);
  4496. if (rc) {
  4497. dev_err(&pdev->dev,
  4498. "%s alg registration failed\n",
  4499. q_alg->sha_alg.halg.base.cra_driver_name);
  4500. kfree_sensitive(q_alg);
  4501. } else {
  4502. list_add_tail(&q_alg->entry, &cp->alg_list);
  4503. dev_info(&pdev->dev, "%s\n",
  4504. q_alg->sha_alg.halg.base.cra_driver_name);
  4505. }
  4506. }
  4507. }
  4508. /*
  4509. * Register crypto cipher (aes-ccm) algorithms the
  4510. * device supports
  4511. */
  4512. if (cp->ce_support.aes_ccm) {
  4513. struct qcrypto_alg *q_alg;
  4514. q_alg = _qcrypto_aead_alg_alloc(cp, &_qcrypto_aead_ccm_algo);
  4515. if (IS_ERR(q_alg)) {
  4516. rc = PTR_ERR(q_alg);
  4517. goto err;
  4518. }
  4519. if (cp->ce_support.use_sw_aes_ccm_algo) {
  4520. rc = _qcrypto_prefix_alg_cra_name(
  4521. q_alg->aead_alg.base.cra_name,
  4522. strlen(q_alg->aead_alg.base.cra_name));
  4523. if (rc) {
  4524. dev_err(&pdev->dev,
  4525. "The algorithm name %s is too long.\n",
  4526. q_alg->aead_alg.base.cra_name);
  4527. kfree(q_alg);
  4528. goto err;
  4529. }
  4530. }
  4531. rc = crypto_register_aead(&q_alg->aead_alg);
  4532. if (rc) {
  4533. dev_err(&pdev->dev, "%s alg registration failed\n",
  4534. q_alg->aead_alg.base.cra_driver_name);
  4535. kfree_sensitive(q_alg);
  4536. } else {
  4537. list_add_tail(&q_alg->entry, &cp->alg_list);
  4538. dev_info(&pdev->dev, "%s\n",
  4539. q_alg->aead_alg.base.cra_driver_name);
  4540. }
  4541. q_alg = _qcrypto_aead_alg_alloc(cp,
  4542. &_qcrypto_aead_rfc4309_ccm_algo);
  4543. if (IS_ERR(q_alg)) {
  4544. rc = PTR_ERR(q_alg);
  4545. goto err;
  4546. }
  4547. if (cp->ce_support.use_sw_aes_ccm_algo) {
  4548. rc = _qcrypto_prefix_alg_cra_name(
  4549. q_alg->aead_alg.base.cra_name,
  4550. strlen(q_alg->aead_alg.base.cra_name));
  4551. if (rc) {
  4552. dev_err(&pdev->dev,
  4553. "The algorithm name %s is too long.\n",
  4554. q_alg->aead_alg.base.cra_name);
  4555. kfree(q_alg);
  4556. goto err;
  4557. }
  4558. }
  4559. rc = crypto_register_aead(&q_alg->aead_alg);
  4560. if (rc) {
  4561. dev_err(&pdev->dev, "%s alg registration failed\n",
  4562. q_alg->aead_alg.base.cra_driver_name);
  4563. kfree(q_alg);
  4564. } else {
  4565. list_add_tail(&q_alg->entry, &cp->alg_list);
  4566. dev_info(&pdev->dev, "%s\n",
  4567. q_alg->aead_alg.base.cra_driver_name);
  4568. }
  4569. }
  4570. mutex_unlock(&cp->engine_lock);
  4571. return 0;
  4572. err:
  4573. _qcrypto_remove_engine(pengine);
  4574. kfree_sensitive(pqcrypto_req_control);
  4575. exit_unlock_mutex:
  4576. mutex_unlock(&cp->engine_lock);
  4577. exit_qce_close:
  4578. if (pengine->qce)
  4579. qce_close(pengine->qce);
  4580. exit_free_pdata:
  4581. icc_set_bw(pengine->icc_path, 0, 0);
  4582. platform_set_drvdata(pdev, NULL);
  4583. exit_kzfree:
  4584. memset(pengine, 0, ksize((void *)pengine));
  4585. kfree(pengine);
  4586. return rc;
  4587. }
  4588. static int _qcrypto_engine_in_use(struct crypto_engine *pengine)
  4589. {
  4590. struct crypto_priv *cp = pengine->pcp;
  4591. if ((atomic_read(&pengine->req_count) > 0) || pengine->req_queue.qlen
  4592. || cp->req_queue.qlen)
  4593. return 1;
  4594. return 0;
  4595. }
  4596. static void _qcrypto_do_suspending(struct crypto_engine *pengine)
  4597. {
  4598. del_timer_sync(&pengine->bw_reaper_timer);
  4599. qcrypto_ce_set_bus(pengine, false);
  4600. }
  4601. static int _qcrypto_suspend(struct platform_device *pdev, pm_message_t state)
  4602. {
  4603. int ret = 0;
  4604. struct crypto_engine *pengine;
  4605. struct crypto_priv *cp;
  4606. unsigned long flags;
  4607. pengine = platform_get_drvdata(pdev);
  4608. if (!pengine)
  4609. return -EINVAL;
  4610. /*
  4611. * Check if this platform supports clock management in suspend/resume
  4612. * If not, just simply return 0.
  4613. */
  4614. cp = pengine->pcp;
  4615. if (!cp->ce_support.clk_mgmt_sus_res)
  4616. return 0;
  4617. spin_lock_irqsave(&cp->lock, flags);
  4618. switch (pengine->bw_state) {
  4619. case BUS_NO_BANDWIDTH:
  4620. if (!pengine->high_bw_req)
  4621. pengine->bw_state = BUS_SUSPENDED;
  4622. else
  4623. ret = -EBUSY;
  4624. break;
  4625. case BUS_HAS_BANDWIDTH:
  4626. if (_qcrypto_engine_in_use(pengine)) {
  4627. ret = -EBUSY;
  4628. } else {
  4629. pengine->bw_state = BUS_SUSPENDING;
  4630. spin_unlock_irqrestore(&cp->lock, flags);
  4631. _qcrypto_do_suspending(pengine);
  4632. spin_lock_irqsave(&cp->lock, flags);
  4633. pengine->bw_state = BUS_SUSPENDED;
  4634. }
  4635. break;
  4636. case BUS_BANDWIDTH_RELEASING:
  4637. case BUS_BANDWIDTH_ALLOCATING:
  4638. case BUS_SUSPENDED:
  4639. case BUS_SUSPENDING:
  4640. default:
  4641. ret = -EBUSY;
  4642. break;
  4643. }
  4644. spin_unlock_irqrestore(&cp->lock, flags);
  4645. if (ret)
  4646. return ret;
  4647. if (qce_pm_table.suspend) {
  4648. qcrypto_ce_set_bus(pengine, true);
  4649. qce_pm_table.suspend(pengine->qce);
  4650. qcrypto_ce_set_bus(pengine, false);
  4651. }
  4652. return 0;
  4653. }
  4654. static int _qcrypto_resume(struct platform_device *pdev)
  4655. {
  4656. struct crypto_engine *pengine;
  4657. struct crypto_priv *cp;
  4658. unsigned long flags;
  4659. int ret = 0;
  4660. pengine = platform_get_drvdata(pdev);
  4661. if (!pengine)
  4662. return -EINVAL;
  4663. cp = pengine->pcp;
  4664. if (!cp->ce_support.clk_mgmt_sus_res)
  4665. return 0;
  4666. spin_lock_irqsave(&cp->lock, flags);
  4667. if (pengine->bw_state == BUS_SUSPENDED) {
  4668. spin_unlock_irqrestore(&cp->lock, flags);
  4669. if (qce_pm_table.resume) {
  4670. qcrypto_ce_set_bus(pengine, true);
  4671. qce_pm_table.resume(pengine->qce);
  4672. qcrypto_ce_set_bus(pengine, false);
  4673. }
  4674. spin_lock_irqsave(&cp->lock, flags);
  4675. pengine->bw_state = BUS_NO_BANDWIDTH;
  4676. pengine->active_seq++;
  4677. pengine->check_flag = false;
  4678. if (cp->req_queue.qlen || pengine->req_queue.qlen) {
  4679. if (!pengine->high_bw_req) {
  4680. qcrypto_ce_bw_allocate_req(pengine);
  4681. pengine->high_bw_req = true;
  4682. }
  4683. }
  4684. } else
  4685. ret = -EBUSY;
  4686. spin_unlock_irqrestore(&cp->lock, flags);
  4687. return ret;
  4688. }
  4689. static const struct of_device_id qcrypto_match[] = {
  4690. {.compatible = "qcom,qcrypto",},
  4691. {}
  4692. };
  4693. static struct platform_driver __qcrypto = {
  4694. .probe = _qcrypto_probe,
  4695. .remove = _qcrypto_remove,
  4696. .suspend = _qcrypto_suspend,
  4697. .resume = _qcrypto_resume,
  4698. .driver = {
  4699. .name = "qcrypto",
  4700. .of_match_table = qcrypto_match,
  4701. },
  4702. };
  4703. static int _debug_qcrypto;
  4704. static ssize_t _debug_stats_read(struct file *file, char __user *buf,
  4705. size_t count, loff_t *ppos)
  4706. {
  4707. int rc = -EINVAL;
  4708. int qcrypto = *((int *) file->private_data);
  4709. int len;
  4710. len = _disp_stats(qcrypto);
  4711. if (len <= count)
  4712. rc = simple_read_from_buffer((void __user *) buf, len,
  4713. ppos, (void *) _debug_read_buf, len);
  4714. return rc;
  4715. }
  4716. static ssize_t _debug_stats_write(struct file *file, const char __user *buf,
  4717. size_t count, loff_t *ppos)
  4718. {
  4719. unsigned long flags;
  4720. struct crypto_priv *cp = &qcrypto_dev;
  4721. struct crypto_engine *pe;
  4722. int i;
  4723. memset((char *)&_qcrypto_stat, 0, sizeof(struct crypto_stat));
  4724. spin_lock_irqsave(&cp->lock, flags);
  4725. list_for_each_entry(pe, &cp->engine_list, elist) {
  4726. pe->total_req = 0;
  4727. pe->err_req = 0;
  4728. qce_clear_driver_stats(pe->qce);
  4729. pe->max_req_used = 0;
  4730. }
  4731. cp->max_qlen = 0;
  4732. cp->resp_start = 0;
  4733. cp->resp_stop = 0;
  4734. cp->no_avail = 0;
  4735. cp->max_resp_qlen = 0;
  4736. cp->queue_work_eng3 = 0;
  4737. cp->queue_work_not_eng3 = 0;
  4738. cp->queue_work_not_eng3_nz = 0;
  4739. cp->max_reorder_cnt = 0;
  4740. for (i = 0; i < MAX_SMP_CPU + 1; i++)
  4741. cp->cpu_req[i] = 0;
  4742. spin_unlock_irqrestore(&cp->lock, flags);
  4743. return count;
  4744. }
  4745. static const struct file_operations _debug_stats_ops = {
  4746. .open = simple_open,
  4747. .read = _debug_stats_read,
  4748. .write = _debug_stats_write,
  4749. };
  4750. static int _qcrypto_debug_init(void)
  4751. {
  4752. int rc;
  4753. char name[DEBUG_MAX_FNAME];
  4754. struct dentry *dent;
  4755. _debug_dent = debugfs_create_dir("qcrypto", NULL);
  4756. if (IS_ERR(_debug_dent)) {
  4757. pr_debug("qcrypto debugfs_create_dir fail, error %ld\n",
  4758. PTR_ERR(_debug_dent));
  4759. return PTR_ERR(_debug_dent);
  4760. }
  4761. snprintf(name, DEBUG_MAX_FNAME-1, "stats-%d", 1);
  4762. _debug_qcrypto = 0;
  4763. dent = debugfs_create_file(name, 0644, _debug_dent,
  4764. &_debug_qcrypto, &_debug_stats_ops);
  4765. if (dent == NULL) {
  4766. pr_debug("qcrypto debugfs_create_file fail, error %ld\n",
  4767. PTR_ERR(dent));
  4768. rc = PTR_ERR(dent);
  4769. goto err;
  4770. }
  4771. return 0;
  4772. err:
  4773. debugfs_remove_recursive(_debug_dent);
  4774. return rc;
  4775. }
  4776. static int __init _qcrypto_init(void)
  4777. {
  4778. struct crypto_priv *pcp = &qcrypto_dev;
  4779. _qcrypto_debug_init();
  4780. INIT_LIST_HEAD(&pcp->alg_list);
  4781. INIT_LIST_HEAD(&pcp->engine_list);
  4782. init_llist_head(&pcp->ordered_resp_list);
  4783. spin_lock_init(&pcp->lock);
  4784. mutex_init(&pcp->engine_lock);
  4785. pcp->resp_wq = alloc_workqueue("qcrypto_seq_response_wq",
  4786. WQ_MEM_RECLAIM | WQ_HIGHPRI | WQ_CPU_INTENSIVE, 1);
  4787. if (!pcp->resp_wq) {
  4788. pr_err("Error allocating workqueue\n");
  4789. return -ENOMEM;
  4790. }
  4791. INIT_WORK(&pcp->resp_work, seq_response);
  4792. pcp->total_units = 0;
  4793. pcp->next_engine = NULL;
  4794. pcp->scheduled_eng = NULL;
  4795. pcp->ce_req_proc_sts = IN_PROGRESS;
  4796. crypto_init_queue(&pcp->req_queue, MSM_QCRYPTO_REQ_QUEUE_LENGTH);
  4797. return platform_driver_register(&__qcrypto);
  4798. }
  4799. static void __exit _qcrypto_exit(void)
  4800. {
  4801. pr_debug("%s Unregister QCRYPTO\n", __func__);
  4802. debugfs_remove_recursive(_debug_dent);
  4803. platform_driver_unregister(&__qcrypto);
  4804. }
  4805. module_init(_qcrypto_init);
  4806. module_exit(_qcrypto_exit);
  4807. MODULE_LICENSE("GPL v2");
  4808. MODULE_DESCRIPTION("QTI Crypto driver");