7b4616f157
In case of DATABUS_WIDEN, follow the HPG to calculate bitclk, byteclk and pclk. Configure the DST_FORMAT and the clock dividers in DSI PHY and DISP_CC w.r.t. the bpp before compression. Change-Id: I526eab5bc88b8d667b8b1a0d257b2f147998286a Signed-off-by: Srihitha Tangudu <quic_tangudu@quicinc.com> Signed-off-by: Kirill Shpin <quic_kshpin@quicinc.com>
23 line
651 B
C
23 line
651 B
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2020 The Linux Foundation. All rights reserved.
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*/
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#ifndef __SDE_DSC_HELPER_H__
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#define __SDE_DSC_HELPER_H__
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#include "msm_drv.h"
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#define DSC_1_1_PPS_PARAMETER_SET_ELEMENTS 88
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int sde_dsc_populate_dsc_config(struct drm_dsc_config *dsc, int scr_ver);
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int sde_dsc_populate_dsc_private_params(struct msm_display_dsc_info *dsc_info,
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int intf_width, bool widebus_en);
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int sde_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc_info,
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char *buf, int pps_id, u32 len);
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#endif /* __SDE_DSC_HELPER_H__ */
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