dsi_panel.c 108 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dsc_helper.h"
  15. #include "sde_vdc_helper.h"
  16. /**
  17. * topology is currently defined by a set of following 3 values:
  18. * 1. num of layer mixers
  19. * 2. num of compression encoders
  20. * 3. num of interfaces
  21. */
  22. #define TOPOLOGY_SET_LEN 3
  23. #define MAX_TOPOLOGY 5
  24. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  25. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  26. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  27. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  28. #define MAX_PANEL_JITTER 10
  29. #define DEFAULT_PANEL_PREFILL_LINES 25
  30. #define MIN_PREFILL_LINES 35
  31. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  32. {
  33. char *bp;
  34. bp = buf;
  35. /* First 7 bytes are cmd header */
  36. *bp++ = 0x0A;
  37. *bp++ = 1;
  38. *bp++ = 0;
  39. *bp++ = 0;
  40. *bp++ = pps_delay_ms;
  41. *bp++ = 0;
  42. *bp++ = 128;
  43. }
  44. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  45. char *buf, int pps_id, u32 size)
  46. {
  47. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  48. buf += DSI_CMD_PPS_HDR_SIZE;
  49. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  50. size);
  51. }
  52. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  53. char *buf, int pps_id, u32 size)
  54. {
  55. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  56. buf += DSI_CMD_PPS_HDR_SIZE;
  57. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  58. size);
  59. }
  60. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  61. {
  62. int rc = 0;
  63. int i;
  64. struct regulator *vreg = NULL;
  65. for (i = 0; i < panel->power_info.count; i++) {
  66. vreg = devm_regulator_get(panel->parent,
  67. panel->power_info.vregs[i].vreg_name);
  68. rc = PTR_RET(vreg);
  69. if (rc) {
  70. DSI_ERR("failed to get %s regulator\n",
  71. panel->power_info.vregs[i].vreg_name);
  72. goto error_put;
  73. }
  74. panel->power_info.vregs[i].vreg = vreg;
  75. }
  76. return rc;
  77. error_put:
  78. for (i = i - 1; i >= 0; i--) {
  79. devm_regulator_put(panel->power_info.vregs[i].vreg);
  80. panel->power_info.vregs[i].vreg = NULL;
  81. }
  82. return rc;
  83. }
  84. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  85. {
  86. int rc = 0;
  87. int i;
  88. for (i = panel->power_info.count - 1; i >= 0; i--)
  89. devm_regulator_put(panel->power_info.vregs[i].vreg);
  90. return rc;
  91. }
  92. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  93. {
  94. int rc = 0;
  95. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  96. if (gpio_is_valid(r_config->reset_gpio)) {
  97. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  98. if (rc) {
  99. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  100. goto error;
  101. }
  102. }
  103. if (gpio_is_valid(r_config->disp_en_gpio)) {
  104. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  105. if (rc) {
  106. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  107. goto error_release_reset;
  108. }
  109. }
  110. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  111. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  112. if (rc) {
  113. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  114. goto error_release_disp_en;
  115. }
  116. }
  117. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  118. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  119. if (rc) {
  120. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  121. goto error_release_mode_sel;
  122. }
  123. }
  124. if (gpio_is_valid(panel->panel_test_gpio)) {
  125. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  126. if (rc) {
  127. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  128. rc);
  129. panel->panel_test_gpio = -1;
  130. rc = 0;
  131. }
  132. }
  133. goto error;
  134. error_release_mode_sel:
  135. if (gpio_is_valid(panel->bl_config.en_gpio))
  136. gpio_free(panel->bl_config.en_gpio);
  137. error_release_disp_en:
  138. if (gpio_is_valid(r_config->disp_en_gpio))
  139. gpio_free(r_config->disp_en_gpio);
  140. error_release_reset:
  141. if (gpio_is_valid(r_config->reset_gpio))
  142. gpio_free(r_config->reset_gpio);
  143. error:
  144. return rc;
  145. }
  146. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  147. {
  148. int rc = 0;
  149. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  150. if (gpio_is_valid(r_config->reset_gpio))
  151. gpio_free(r_config->reset_gpio);
  152. if (gpio_is_valid(r_config->disp_en_gpio))
  153. gpio_free(r_config->disp_en_gpio);
  154. if (gpio_is_valid(panel->bl_config.en_gpio))
  155. gpio_free(panel->bl_config.en_gpio);
  156. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  157. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  158. if (gpio_is_valid(panel->panel_test_gpio))
  159. gpio_free(panel->panel_test_gpio);
  160. return rc;
  161. }
  162. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  163. {
  164. struct dsi_panel_reset_config *r_config;
  165. if (!panel) {
  166. DSI_ERR("Invalid panel param\n");
  167. return -EINVAL;
  168. }
  169. r_config = &panel->reset_config;
  170. if (!r_config) {
  171. DSI_ERR("Invalid panel reset configuration\n");
  172. return -EINVAL;
  173. }
  174. if (gpio_is_valid(r_config->reset_gpio)) {
  175. gpio_set_value(r_config->reset_gpio, 0);
  176. DSI_INFO("GPIO pulled low to simulate ESD\n");
  177. return 0;
  178. }
  179. DSI_ERR("failed to pull down gpio\n");
  180. return -EINVAL;
  181. }
  182. static int dsi_panel_reset(struct dsi_panel *panel)
  183. {
  184. int rc = 0;
  185. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  186. int i;
  187. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  188. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  189. if (rc) {
  190. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  191. goto exit;
  192. }
  193. }
  194. if (r_config->count) {
  195. rc = gpio_direction_output(r_config->reset_gpio,
  196. r_config->sequence[0].level);
  197. if (rc) {
  198. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  199. goto exit;
  200. }
  201. }
  202. for (i = 0; i < r_config->count; i++) {
  203. gpio_set_value(r_config->reset_gpio,
  204. r_config->sequence[i].level);
  205. if (r_config->sequence[i].sleep_ms)
  206. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  207. (r_config->sequence[i].sleep_ms * 1000) + 100);
  208. }
  209. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  210. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  211. if (rc)
  212. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  213. }
  214. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  215. bool out = true;
  216. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  217. || (panel->reset_config.mode_sel_state
  218. == MODE_GPIO_LOW))
  219. out = false;
  220. else if ((panel->reset_config.mode_sel_state
  221. == MODE_SEL_SINGLE_PORT) ||
  222. (panel->reset_config.mode_sel_state
  223. == MODE_GPIO_HIGH))
  224. out = true;
  225. rc = gpio_direction_output(
  226. panel->reset_config.lcd_mode_sel_gpio, out);
  227. if (rc)
  228. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  229. }
  230. if (gpio_is_valid(panel->panel_test_gpio)) {
  231. rc = gpio_direction_input(panel->panel_test_gpio);
  232. if (rc)
  233. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  234. rc);
  235. }
  236. exit:
  237. return rc;
  238. }
  239. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  240. {
  241. int rc = 0;
  242. struct pinctrl_state *state;
  243. if (panel->host_config.ext_bridge_mode)
  244. return 0;
  245. if (enable)
  246. state = panel->pinctrl.active;
  247. else
  248. state = panel->pinctrl.suspend;
  249. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  250. if (rc)
  251. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  252. panel->name, rc);
  253. return rc;
  254. }
  255. static int dsi_panel_power_on(struct dsi_panel *panel)
  256. {
  257. int rc = 0;
  258. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  259. if (rc) {
  260. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  261. panel->name, rc);
  262. goto exit;
  263. }
  264. rc = dsi_panel_set_pinctrl_state(panel, true);
  265. if (rc) {
  266. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  267. goto error_disable_vregs;
  268. }
  269. rc = dsi_panel_reset(panel);
  270. if (rc) {
  271. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  272. goto error_disable_gpio;
  273. }
  274. goto exit;
  275. error_disable_gpio:
  276. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  277. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  278. if (gpio_is_valid(panel->bl_config.en_gpio))
  279. gpio_set_value(panel->bl_config.en_gpio, 0);
  280. (void)dsi_panel_set_pinctrl_state(panel, false);
  281. error_disable_vregs:
  282. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  283. exit:
  284. return rc;
  285. }
  286. static int dsi_panel_power_off(struct dsi_panel *panel)
  287. {
  288. int rc = 0;
  289. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  290. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  291. if (gpio_is_valid(panel->reset_config.reset_gpio))
  292. gpio_set_value(panel->reset_config.reset_gpio, 0);
  293. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  294. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  295. if (gpio_is_valid(panel->panel_test_gpio)) {
  296. rc = gpio_direction_input(panel->panel_test_gpio);
  297. if (rc)
  298. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  299. rc);
  300. }
  301. rc = dsi_panel_set_pinctrl_state(panel, false);
  302. if (rc) {
  303. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  304. rc);
  305. }
  306. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  307. if (rc)
  308. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  309. panel->name, rc);
  310. return rc;
  311. }
  312. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  313. enum dsi_cmd_set_type type)
  314. {
  315. int rc = 0, i = 0;
  316. ssize_t len;
  317. struct dsi_cmd_desc *cmds;
  318. u32 count;
  319. enum dsi_cmd_set_state state;
  320. struct dsi_display_mode *mode;
  321. const struct mipi_dsi_host_ops *ops = panel->host->ops;
  322. if (!panel || !panel->cur_mode)
  323. return -EINVAL;
  324. mode = panel->cur_mode;
  325. cmds = mode->priv_info->cmd_sets[type].cmds;
  326. count = mode->priv_info->cmd_sets[type].count;
  327. state = mode->priv_info->cmd_sets[type].state;
  328. if (count == 0) {
  329. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  330. panel->name, type);
  331. goto error;
  332. }
  333. for (i = 0; i < count; i++) {
  334. if (state == DSI_CMD_SET_STATE_LP)
  335. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  336. if (cmds->last_command)
  337. cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND;
  338. if (type == DSI_CMD_SET_VID_TO_CMD_SWITCH)
  339. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  340. len = ops->transfer(panel->host, &cmds->msg);
  341. if (len < 0) {
  342. rc = len;
  343. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  344. goto error;
  345. }
  346. if (cmds->post_wait_ms)
  347. usleep_range(cmds->post_wait_ms*1000,
  348. ((cmds->post_wait_ms*1000)+10));
  349. cmds++;
  350. }
  351. error:
  352. return rc;
  353. }
  354. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  355. {
  356. int rc = 0;
  357. if (panel->host_config.ext_bridge_mode)
  358. return 0;
  359. devm_pinctrl_put(panel->pinctrl.pinctrl);
  360. return rc;
  361. }
  362. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  363. {
  364. int rc = 0;
  365. if (panel->host_config.ext_bridge_mode)
  366. return 0;
  367. /* TODO: pinctrl is defined in dsi dt node */
  368. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  369. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  370. rc = PTR_ERR(panel->pinctrl.pinctrl);
  371. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  372. goto error;
  373. }
  374. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  375. "panel_active");
  376. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  377. rc = PTR_ERR(panel->pinctrl.active);
  378. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  379. goto error;
  380. }
  381. panel->pinctrl.suspend =
  382. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  383. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  384. rc = PTR_ERR(panel->pinctrl.suspend);
  385. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  386. goto error;
  387. }
  388. error:
  389. return rc;
  390. }
  391. static int dsi_panel_wled_register(struct dsi_panel *panel,
  392. struct dsi_backlight_config *bl)
  393. {
  394. struct backlight_device *bd;
  395. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  396. if (!bd) {
  397. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  398. panel->name, -EPROBE_DEFER);
  399. return -EPROBE_DEFER;
  400. }
  401. bl->raw_bd = bd;
  402. return 0;
  403. }
  404. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  405. u32 bl_lvl)
  406. {
  407. int rc = 0;
  408. struct mipi_dsi_device *dsi;
  409. if (!panel || (bl_lvl > 0xffff)) {
  410. DSI_ERR("invalid params\n");
  411. return -EINVAL;
  412. }
  413. dsi = &panel->mipi_device;
  414. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  415. if (rc < 0)
  416. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  417. return rc;
  418. }
  419. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  420. u32 bl_lvl)
  421. {
  422. int rc = 0;
  423. u32 duty = 0;
  424. u32 period_ns = 0;
  425. struct dsi_backlight_config *bl;
  426. if (!panel) {
  427. DSI_ERR("Invalid Params\n");
  428. return -EINVAL;
  429. }
  430. bl = &panel->bl_config;
  431. if (!bl->pwm_bl) {
  432. DSI_ERR("pwm device not found\n");
  433. return -EINVAL;
  434. }
  435. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  436. duty = bl_lvl * period_ns;
  437. duty /= bl->bl_max_level;
  438. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  439. if (rc) {
  440. DSI_ERR("[%s] failed to change pwm config, rc=\n", panel->name,
  441. rc);
  442. goto error;
  443. }
  444. if (bl_lvl == 0 && bl->pwm_enabled) {
  445. pwm_disable(bl->pwm_bl);
  446. bl->pwm_enabled = false;
  447. return 0;
  448. }
  449. if (!bl->pwm_enabled) {
  450. rc = pwm_enable(bl->pwm_bl);
  451. if (rc) {
  452. DSI_ERR("[%s] failed to enable pwm, rc=\n", panel->name,
  453. rc);
  454. goto error;
  455. }
  456. bl->pwm_enabled = true;
  457. }
  458. error:
  459. return rc;
  460. }
  461. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  462. {
  463. int rc = 0;
  464. struct dsi_backlight_config *bl = &panel->bl_config;
  465. if (panel->host_config.ext_bridge_mode)
  466. return 0;
  467. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  468. switch (bl->type) {
  469. case DSI_BACKLIGHT_WLED:
  470. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  471. break;
  472. case DSI_BACKLIGHT_DCS:
  473. rc = dsi_panel_update_backlight(panel, bl_lvl);
  474. break;
  475. case DSI_BACKLIGHT_EXTERNAL:
  476. break;
  477. case DSI_BACKLIGHT_PWM:
  478. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  479. break;
  480. default:
  481. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  482. rc = -ENOTSUPP;
  483. }
  484. return rc;
  485. }
  486. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  487. {
  488. u32 cur_bl_level;
  489. struct backlight_device *bd = bl->raw_bd;
  490. /* default the brightness level to 50% */
  491. cur_bl_level = bl->bl_max_level >> 1;
  492. switch (bl->type) {
  493. case DSI_BACKLIGHT_WLED:
  494. /* Try to query the backlight level from the backlight device */
  495. if (bd->ops && bd->ops->get_brightness)
  496. cur_bl_level = bd->ops->get_brightness(bd);
  497. break;
  498. case DSI_BACKLIGHT_DCS:
  499. case DSI_BACKLIGHT_EXTERNAL:
  500. case DSI_BACKLIGHT_PWM:
  501. default:
  502. /*
  503. * Ideally, we should read the backlight level from the
  504. * panel. For now, just set it default value.
  505. */
  506. break;
  507. }
  508. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  509. return cur_bl_level;
  510. }
  511. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  512. {
  513. struct dsi_backlight_config *bl = &panel->bl_config;
  514. bl->bl_level = dsi_panel_get_brightness(bl);
  515. }
  516. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  517. {
  518. int rc = 0;
  519. struct dsi_backlight_config *bl = &panel->bl_config;
  520. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  521. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  522. rc = PTR_ERR(bl->pwm_bl);
  523. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  524. rc);
  525. return rc;
  526. }
  527. return 0;
  528. }
  529. static int dsi_panel_bl_register(struct dsi_panel *panel)
  530. {
  531. int rc = 0;
  532. struct dsi_backlight_config *bl = &panel->bl_config;
  533. if (panel->host_config.ext_bridge_mode)
  534. return 0;
  535. switch (bl->type) {
  536. case DSI_BACKLIGHT_WLED:
  537. rc = dsi_panel_wled_register(panel, bl);
  538. break;
  539. case DSI_BACKLIGHT_DCS:
  540. break;
  541. case DSI_BACKLIGHT_EXTERNAL:
  542. break;
  543. case DSI_BACKLIGHT_PWM:
  544. rc = dsi_panel_pwm_register(panel);
  545. break;
  546. default:
  547. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  548. rc = -ENOTSUPP;
  549. goto error;
  550. }
  551. error:
  552. return rc;
  553. }
  554. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  555. {
  556. struct dsi_backlight_config *bl = &panel->bl_config;
  557. devm_pwm_put(panel->parent, bl->pwm_bl);
  558. }
  559. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  560. {
  561. int rc = 0;
  562. struct dsi_backlight_config *bl = &panel->bl_config;
  563. if (panel->host_config.ext_bridge_mode)
  564. return 0;
  565. switch (bl->type) {
  566. case DSI_BACKLIGHT_WLED:
  567. break;
  568. case DSI_BACKLIGHT_DCS:
  569. break;
  570. case DSI_BACKLIGHT_EXTERNAL:
  571. break;
  572. case DSI_BACKLIGHT_PWM:
  573. dsi_panel_pwm_unregister(panel);
  574. break;
  575. default:
  576. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  577. rc = -ENOTSUPP;
  578. goto error;
  579. }
  580. error:
  581. return rc;
  582. }
  583. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  584. struct dsi_parser_utils *utils)
  585. {
  586. int rc = 0;
  587. u64 tmp64 = 0;
  588. struct dsi_display_mode *display_mode;
  589. struct dsi_display_mode_priv_info *priv_info;
  590. display_mode = container_of(mode, struct dsi_display_mode, timing);
  591. priv_info = display_mode->priv_info;
  592. rc = utils->read_u64(utils->data,
  593. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  594. if (rc == -EOVERFLOW) {
  595. tmp64 = 0;
  596. rc = utils->read_u32(utils->data,
  597. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  598. }
  599. mode->clk_rate_hz = !rc ? tmp64 : 0;
  600. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  601. mode->pclk_scale.numer = 1;
  602. mode->pclk_scale.denom = 1;
  603. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  604. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  605. &mode->mdp_transfer_time_us);
  606. if (!rc)
  607. display_mode->priv_info->mdp_transfer_time_us =
  608. mode->mdp_transfer_time_us;
  609. else
  610. display_mode->priv_info->mdp_transfer_time_us = 0;
  611. rc = utils->read_u32(utils->data,
  612. "qcom,mdss-dsi-panel-framerate",
  613. &mode->refresh_rate);
  614. if (rc) {
  615. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  616. rc);
  617. goto error;
  618. }
  619. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  620. &mode->h_active);
  621. if (rc) {
  622. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  623. rc);
  624. goto error;
  625. }
  626. rc = utils->read_u32(utils->data,
  627. "qcom,mdss-dsi-h-front-porch",
  628. &mode->h_front_porch);
  629. if (rc) {
  630. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  631. rc);
  632. goto error;
  633. }
  634. rc = utils->read_u32(utils->data,
  635. "qcom,mdss-dsi-h-back-porch",
  636. &mode->h_back_porch);
  637. if (rc) {
  638. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  639. rc);
  640. goto error;
  641. }
  642. rc = utils->read_u32(utils->data,
  643. "qcom,mdss-dsi-h-pulse-width",
  644. &mode->h_sync_width);
  645. if (rc) {
  646. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  647. rc);
  648. goto error;
  649. }
  650. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  651. &mode->h_skew);
  652. if (rc)
  653. DSI_ERR("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  654. rc);
  655. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  656. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  657. mode->h_sync_width);
  658. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  659. &mode->v_active);
  660. if (rc) {
  661. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  662. rc);
  663. goto error;
  664. }
  665. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  666. &mode->v_back_porch);
  667. if (rc) {
  668. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  669. rc);
  670. goto error;
  671. }
  672. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  673. &mode->v_front_porch);
  674. if (rc) {
  675. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  676. rc);
  677. goto error;
  678. }
  679. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  680. &mode->v_sync_width);
  681. if (rc) {
  682. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  683. rc);
  684. goto error;
  685. }
  686. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  687. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  688. mode->v_sync_width);
  689. error:
  690. return rc;
  691. }
  692. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  693. struct dsi_parser_utils *utils,
  694. const char *name)
  695. {
  696. int rc = 0;
  697. u32 bpp = 0;
  698. enum dsi_pixel_format fmt;
  699. const char *packing;
  700. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  701. if (rc) {
  702. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  703. name, rc);
  704. return rc;
  705. }
  706. host->bpp = bpp;
  707. switch (bpp) {
  708. case 3:
  709. fmt = DSI_PIXEL_FORMAT_RGB111;
  710. break;
  711. case 8:
  712. fmt = DSI_PIXEL_FORMAT_RGB332;
  713. break;
  714. case 12:
  715. fmt = DSI_PIXEL_FORMAT_RGB444;
  716. break;
  717. case 16:
  718. fmt = DSI_PIXEL_FORMAT_RGB565;
  719. break;
  720. case 18:
  721. fmt = DSI_PIXEL_FORMAT_RGB666;
  722. break;
  723. case 24:
  724. default:
  725. fmt = DSI_PIXEL_FORMAT_RGB888;
  726. break;
  727. }
  728. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  729. packing = utils->get_property(utils->data,
  730. "qcom,mdss-dsi-pixel-packing",
  731. NULL);
  732. if (packing && !strcmp(packing, "loose"))
  733. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  734. }
  735. host->dst_format = fmt;
  736. return rc;
  737. }
  738. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  739. struct dsi_parser_utils *utils,
  740. const char *name)
  741. {
  742. int rc = 0;
  743. bool lane_enabled;
  744. u32 num_of_lanes = 0;
  745. lane_enabled = utils->read_bool(utils->data,
  746. "qcom,mdss-dsi-lane-0-state");
  747. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  748. lane_enabled = utils->read_bool(utils->data,
  749. "qcom,mdss-dsi-lane-1-state");
  750. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  751. lane_enabled = utils->read_bool(utils->data,
  752. "qcom,mdss-dsi-lane-2-state");
  753. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  754. lane_enabled = utils->read_bool(utils->data,
  755. "qcom,mdss-dsi-lane-3-state");
  756. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  757. if (host->data_lanes & DSI_DATA_LANE_0)
  758. num_of_lanes++;
  759. if (host->data_lanes & DSI_DATA_LANE_1)
  760. num_of_lanes++;
  761. if (host->data_lanes & DSI_DATA_LANE_2)
  762. num_of_lanes++;
  763. if (host->data_lanes & DSI_DATA_LANE_3)
  764. num_of_lanes++;
  765. host->num_data_lanes = num_of_lanes;
  766. if (host->data_lanes == 0) {
  767. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  768. rc = -EINVAL;
  769. }
  770. return rc;
  771. }
  772. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  773. struct dsi_parser_utils *utils,
  774. const char *name)
  775. {
  776. int rc = 0;
  777. const char *swap_mode;
  778. swap_mode = utils->get_property(utils->data,
  779. "qcom,mdss-dsi-color-order", NULL);
  780. if (swap_mode) {
  781. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  782. host->swap_mode = DSI_COLOR_SWAP_RGB;
  783. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  784. host->swap_mode = DSI_COLOR_SWAP_RBG;
  785. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  786. host->swap_mode = DSI_COLOR_SWAP_BRG;
  787. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  788. host->swap_mode = DSI_COLOR_SWAP_GRB;
  789. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  790. host->swap_mode = DSI_COLOR_SWAP_GBR;
  791. } else {
  792. DSI_ERR("[%s] Unrecognized color order-%s\n",
  793. name, swap_mode);
  794. rc = -EINVAL;
  795. }
  796. } else {
  797. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  798. host->swap_mode = DSI_COLOR_SWAP_RGB;
  799. }
  800. /* bit swap on color channel is not defined in dt */
  801. host->bit_swap_red = false;
  802. host->bit_swap_green = false;
  803. host->bit_swap_blue = false;
  804. return rc;
  805. }
  806. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  807. struct dsi_parser_utils *utils,
  808. const char *name)
  809. {
  810. const char *trig;
  811. int rc = 0;
  812. trig = utils->get_property(utils->data,
  813. "qcom,mdss-dsi-mdp-trigger", NULL);
  814. if (trig) {
  815. if (!strcmp(trig, "none")) {
  816. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  817. } else if (!strcmp(trig, "trigger_te")) {
  818. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  819. } else if (!strcmp(trig, "trigger_sw")) {
  820. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  821. } else if (!strcmp(trig, "trigger_sw_te")) {
  822. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  823. } else {
  824. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  825. name, trig);
  826. rc = -EINVAL;
  827. }
  828. } else {
  829. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  830. name);
  831. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  832. }
  833. trig = utils->get_property(utils->data,
  834. "qcom,mdss-dsi-dma-trigger", NULL);
  835. if (trig) {
  836. if (!strcmp(trig, "none")) {
  837. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  838. } else if (!strcmp(trig, "trigger_te")) {
  839. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  840. } else if (!strcmp(trig, "trigger_sw")) {
  841. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  842. } else if (!strcmp(trig, "trigger_sw_seof")) {
  843. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  844. } else if (!strcmp(trig, "trigger_sw_te")) {
  845. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  846. } else {
  847. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  848. name, trig);
  849. rc = -EINVAL;
  850. }
  851. } else {
  852. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  853. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  854. }
  855. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  856. &host->te_mode);
  857. if (rc) {
  858. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  859. host->te_mode = 1;
  860. rc = 0;
  861. }
  862. return rc;
  863. }
  864. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  865. struct dsi_parser_utils *utils,
  866. const char *name)
  867. {
  868. u32 val = 0;
  869. int rc = 0;
  870. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  871. if (!rc) {
  872. host->t_clk_post = val;
  873. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  874. }
  875. val = 0;
  876. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  877. if (!rc) {
  878. host->t_clk_pre = val;
  879. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  880. }
  881. host->ignore_rx_eot = utils->read_bool(utils->data,
  882. "qcom,mdss-dsi-rx-eot-ignore");
  883. host->append_tx_eot = utils->read_bool(utils->data,
  884. "qcom,mdss-dsi-tx-eot-append");
  885. host->ext_bridge_mode = utils->read_bool(utils->data,
  886. "qcom,mdss-dsi-ext-bridge-mode");
  887. host->force_hs_clk_lane = utils->read_bool(utils->data,
  888. "qcom,mdss-dsi-force-clock-lane-hs");
  889. return 0;
  890. }
  891. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  892. struct dsi_parser_utils *utils,
  893. const char *name)
  894. {
  895. int rc = 0;
  896. u32 val = 0;
  897. bool supported = false;
  898. struct dsi_split_link_config *split_link = &host->split_link;
  899. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  900. if (!supported) {
  901. DSI_DEBUG("[%s] Split link is not supported\n", name);
  902. split_link->split_link_enabled = false;
  903. return;
  904. }
  905. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  906. if (rc || val < 1) {
  907. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  908. split_link->num_sublinks = 2;
  909. } else {
  910. split_link->num_sublinks = val;
  911. }
  912. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  913. if (rc || val < 1) {
  914. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  915. split_link->lanes_per_sublink = 2;
  916. } else {
  917. split_link->lanes_per_sublink = val;
  918. }
  919. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  920. split_link->num_sublinks, split_link->lanes_per_sublink);
  921. split_link->split_link_enabled = true;
  922. }
  923. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  924. {
  925. int rc = 0;
  926. struct dsi_parser_utils *utils = &panel->utils;
  927. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  928. panel->name);
  929. if (rc) {
  930. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  931. panel->name, rc);
  932. goto error;
  933. }
  934. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  935. panel->name);
  936. if (rc) {
  937. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  938. panel->name, rc);
  939. goto error;
  940. }
  941. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  942. panel->name);
  943. if (rc) {
  944. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  945. panel->name, rc);
  946. goto error;
  947. }
  948. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  949. panel->name);
  950. if (rc) {
  951. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  952. panel->name, rc);
  953. goto error;
  954. }
  955. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  956. panel->name);
  957. if (rc) {
  958. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  959. panel->name, rc);
  960. goto error;
  961. }
  962. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  963. panel->name);
  964. error:
  965. return rc;
  966. }
  967. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  968. struct device_node *of_node)
  969. {
  970. int rc = 0;
  971. u32 val = 0;
  972. rc = of_property_read_u32(of_node,
  973. "qcom,mdss-dsi-qsync-min-refresh-rate",
  974. &val);
  975. if (rc)
  976. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  977. panel->name, rc);
  978. panel->qsync_min_fps = val;
  979. return rc;
  980. }
  981. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  982. {
  983. int rc = 0;
  984. bool supported = false;
  985. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  986. struct dsi_parser_utils *utils = &panel->utils;
  987. const char *name = panel->name;
  988. const char *type;
  989. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  990. if (!supported) {
  991. dyn_clk_caps->dyn_clk_support = false;
  992. return rc;
  993. }
  994. dyn_clk_caps->bit_clk_list_len = utils->count_u32_elems(utils->data,
  995. "qcom,dsi-dyn-clk-list");
  996. if (dyn_clk_caps->bit_clk_list_len < 1) {
  997. DSI_ERR("[%s] failed to get supported bit clk list\n", name);
  998. return -EINVAL;
  999. }
  1000. dyn_clk_caps->bit_clk_list = kcalloc(dyn_clk_caps->bit_clk_list_len,
  1001. sizeof(u32), GFP_KERNEL);
  1002. if (!dyn_clk_caps->bit_clk_list)
  1003. return -ENOMEM;
  1004. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1005. dyn_clk_caps->bit_clk_list,
  1006. dyn_clk_caps->bit_clk_list_len);
  1007. if (rc) {
  1008. DSI_ERR("[%s] failed to parse supported bit clk list\n", name);
  1009. return -EINVAL;
  1010. }
  1011. dyn_clk_caps->dyn_clk_support = true;
  1012. type = utils->get_property(utils->data,
  1013. "qcom,dsi-dyn-clk-type", NULL);
  1014. if (!type) {
  1015. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1016. dyn_clk_caps->maintain_const_fps = false;
  1017. return 0;
  1018. }
  1019. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1020. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1021. dyn_clk_caps->maintain_const_fps = true;
  1022. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1023. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1024. dyn_clk_caps->maintain_const_fps = true;
  1025. } else {
  1026. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1027. dyn_clk_caps->maintain_const_fps = false;
  1028. }
  1029. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1030. return 0;
  1031. }
  1032. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1033. {
  1034. int rc = 0;
  1035. bool supported = false;
  1036. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1037. struct dsi_parser_utils *utils = &panel->utils;
  1038. const char *name = panel->name;
  1039. const char *type;
  1040. u32 i;
  1041. supported = utils->read_bool(utils->data,
  1042. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1043. if (!supported) {
  1044. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1045. dfps_caps->dfps_support = false;
  1046. return rc;
  1047. }
  1048. type = utils->get_property(utils->data,
  1049. "qcom,mdss-dsi-pan-fps-update", NULL);
  1050. if (!type) {
  1051. DSI_ERR("[%s] dfps type not defined\n", name);
  1052. rc = -EINVAL;
  1053. goto error;
  1054. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1055. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1056. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1057. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1058. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1059. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1060. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1061. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1062. } else {
  1063. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1064. rc = -EINVAL;
  1065. goto error;
  1066. }
  1067. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1068. "qcom,dsi-supported-dfps-list");
  1069. if (dfps_caps->dfps_list_len < 1) {
  1070. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1071. rc = -EINVAL;
  1072. goto error;
  1073. }
  1074. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1075. GFP_KERNEL);
  1076. if (!dfps_caps->dfps_list) {
  1077. rc = -ENOMEM;
  1078. goto error;
  1079. }
  1080. rc = utils->read_u32_array(utils->data,
  1081. "qcom,dsi-supported-dfps-list",
  1082. dfps_caps->dfps_list,
  1083. dfps_caps->dfps_list_len);
  1084. if (rc) {
  1085. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1086. rc = -EINVAL;
  1087. goto error;
  1088. }
  1089. dfps_caps->dfps_support = true;
  1090. /* calculate max and min fps */
  1091. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1092. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1093. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1094. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1095. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1096. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1097. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1098. }
  1099. error:
  1100. return rc;
  1101. }
  1102. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1103. struct dsi_parser_utils *utils,
  1104. const char *name)
  1105. {
  1106. int rc = 0;
  1107. const char *traffic_mode;
  1108. u32 vc_id = 0;
  1109. u32 val = 0;
  1110. u32 line_no = 0;
  1111. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1112. if (rc) {
  1113. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1114. cfg->pulse_mode_hsa_he = false;
  1115. } else if (val == 1) {
  1116. cfg->pulse_mode_hsa_he = true;
  1117. } else if (val == 0) {
  1118. cfg->pulse_mode_hsa_he = false;
  1119. } else {
  1120. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1121. name);
  1122. rc = -EINVAL;
  1123. goto error;
  1124. }
  1125. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1126. "qcom,mdss-dsi-hfp-power-mode");
  1127. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1128. "qcom,mdss-dsi-hbp-power-mode");
  1129. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1130. "qcom,mdss-dsi-hsa-power-mode");
  1131. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1132. "qcom,mdss-dsi-last-line-interleave");
  1133. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1134. "qcom,mdss-dsi-bllp-eof-power-mode");
  1135. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1136. "qcom,mdss-dsi-bllp-power-mode");
  1137. cfg->force_clk_lane_hs = of_property_read_bool(utils->data,
  1138. "qcom,mdss-dsi-force-clock-lane-hs");
  1139. traffic_mode = utils->get_property(utils->data,
  1140. "qcom,mdss-dsi-traffic-mode",
  1141. NULL);
  1142. if (!traffic_mode) {
  1143. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1144. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1145. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1146. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1147. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1148. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1149. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1150. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1151. } else {
  1152. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1153. traffic_mode);
  1154. rc = -EINVAL;
  1155. goto error;
  1156. }
  1157. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1158. &vc_id);
  1159. if (rc) {
  1160. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1161. cfg->vc_id = 0;
  1162. } else {
  1163. cfg->vc_id = vc_id;
  1164. }
  1165. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  1166. &line_no);
  1167. if (rc) {
  1168. DSI_DEBUG("[%s] set default dma scheduling line no\n", name);
  1169. cfg->dma_sched_line = 0x1;
  1170. /* do not fail since we have default value */
  1171. rc = 0;
  1172. } else {
  1173. cfg->dma_sched_line = line_no;
  1174. }
  1175. error:
  1176. return rc;
  1177. }
  1178. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1179. struct dsi_parser_utils *utils,
  1180. const char *name)
  1181. {
  1182. u32 val = 0;
  1183. int rc = 0;
  1184. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1185. if (rc) {
  1186. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1187. cfg->wr_mem_start = 0x2C;
  1188. } else {
  1189. cfg->wr_mem_start = val;
  1190. }
  1191. val = 0;
  1192. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1193. &val);
  1194. if (rc) {
  1195. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1196. cfg->wr_mem_continue = 0x3C;
  1197. } else {
  1198. cfg->wr_mem_continue = val;
  1199. }
  1200. /* TODO: fix following */
  1201. cfg->max_cmd_packets_interleave = 0;
  1202. val = 0;
  1203. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1204. &val);
  1205. if (rc) {
  1206. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1207. cfg->insert_dcs_command = true;
  1208. } else if (val == 1) {
  1209. cfg->insert_dcs_command = true;
  1210. } else if (val == 0) {
  1211. cfg->insert_dcs_command = false;
  1212. } else {
  1213. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1214. name);
  1215. rc = -EINVAL;
  1216. goto error;
  1217. }
  1218. error:
  1219. return rc;
  1220. }
  1221. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1222. {
  1223. int rc = 0;
  1224. struct dsi_parser_utils *utils = &panel->utils;
  1225. bool panel_mode_switch_enabled;
  1226. enum dsi_op_mode panel_mode;
  1227. const char *mode;
  1228. mode = utils->get_property(utils->data,
  1229. "qcom,mdss-dsi-panel-type", NULL);
  1230. if (!mode) {
  1231. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1232. panel_mode = DSI_OP_VIDEO_MODE;
  1233. } else if (!strcmp(mode, "dsi_video_mode")) {
  1234. panel_mode = DSI_OP_VIDEO_MODE;
  1235. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1236. panel_mode = DSI_OP_CMD_MODE;
  1237. } else {
  1238. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1239. rc = -EINVAL;
  1240. goto error;
  1241. }
  1242. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1243. "qcom,mdss-dsi-panel-mode-switch");
  1244. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1245. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1246. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1247. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1248. utils,
  1249. panel->name);
  1250. if (rc) {
  1251. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1252. panel->name, rc);
  1253. goto error;
  1254. }
  1255. }
  1256. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1257. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1258. utils,
  1259. panel->name);
  1260. if (rc) {
  1261. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1262. panel->name, rc);
  1263. goto error;
  1264. }
  1265. }
  1266. panel->poms_align_vsync = utils->read_bool(utils->data,
  1267. "qcom,poms-align-panel-vsync");
  1268. panel->panel_mode = panel_mode;
  1269. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1270. error:
  1271. return rc;
  1272. }
  1273. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1274. {
  1275. int rc = 0;
  1276. u32 val = 0;
  1277. const char *str;
  1278. struct dsi_panel_phy_props *props = &panel->phy_props;
  1279. struct dsi_parser_utils *utils = &panel->utils;
  1280. const char *name = panel->name;
  1281. rc = utils->read_u32(utils->data,
  1282. "qcom,mdss-pan-physical-width-dimension", &val);
  1283. if (rc) {
  1284. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1285. props->panel_width_mm = 0;
  1286. rc = 0;
  1287. } else {
  1288. props->panel_width_mm = val;
  1289. }
  1290. rc = utils->read_u32(utils->data,
  1291. "qcom,mdss-pan-physical-height-dimension",
  1292. &val);
  1293. if (rc) {
  1294. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1295. props->panel_height_mm = 0;
  1296. rc = 0;
  1297. } else {
  1298. props->panel_height_mm = val;
  1299. }
  1300. str = utils->get_property(utils->data,
  1301. "qcom,mdss-dsi-panel-orientation", NULL);
  1302. if (!str) {
  1303. props->rotation = DSI_PANEL_ROTATE_NONE;
  1304. } else if (!strcmp(str, "180")) {
  1305. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1306. } else if (!strcmp(str, "hflip")) {
  1307. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1308. } else if (!strcmp(str, "vflip")) {
  1309. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1310. } else {
  1311. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1312. rc = -EINVAL;
  1313. goto error;
  1314. }
  1315. error:
  1316. return rc;
  1317. }
  1318. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1319. "qcom,mdss-dsi-pre-on-command",
  1320. "qcom,mdss-dsi-on-command",
  1321. "qcom,mdss-dsi-post-panel-on-command",
  1322. "qcom,mdss-dsi-pre-off-command",
  1323. "qcom,mdss-dsi-off-command",
  1324. "qcom,mdss-dsi-post-off-command",
  1325. "qcom,mdss-dsi-pre-res-switch",
  1326. "qcom,mdss-dsi-res-switch",
  1327. "qcom,mdss-dsi-post-res-switch",
  1328. "qcom,cmd-to-video-mode-switch-commands",
  1329. "qcom,cmd-to-video-mode-post-switch-commands",
  1330. "qcom,video-to-cmd-mode-switch-commands",
  1331. "qcom,video-to-cmd-mode-post-switch-commands",
  1332. "qcom,mdss-dsi-panel-status-command",
  1333. "qcom,mdss-dsi-lp1-command",
  1334. "qcom,mdss-dsi-lp2-command",
  1335. "qcom,mdss-dsi-nolp-command",
  1336. "PPS not parsed from DTSI, generated dynamically",
  1337. "ROI not parsed from DTSI, generated dynamically",
  1338. "qcom,mdss-dsi-timing-switch-command",
  1339. "qcom,mdss-dsi-post-mode-switch-on-command",
  1340. "qcom,mdss-dsi-qsync-on-commands",
  1341. "qcom,mdss-dsi-qsync-off-commands",
  1342. };
  1343. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1344. "qcom,mdss-dsi-pre-on-command-state",
  1345. "qcom,mdss-dsi-on-command-state",
  1346. "qcom,mdss-dsi-post-on-command-state",
  1347. "qcom,mdss-dsi-pre-off-command-state",
  1348. "qcom,mdss-dsi-off-command-state",
  1349. "qcom,mdss-dsi-post-off-command-state",
  1350. "qcom,mdss-dsi-pre-res-switch-state",
  1351. "qcom,mdss-dsi-res-switch-state",
  1352. "qcom,mdss-dsi-post-res-switch-state",
  1353. "qcom,cmd-to-video-mode-switch-commands-state",
  1354. "qcom,cmd-to-video-mode-post-switch-commands-state",
  1355. "qcom,video-to-cmd-mode-switch-commands-state",
  1356. "qcom,video-to-cmd-mode-post-switch-commands-state",
  1357. "qcom,mdss-dsi-panel-status-command-state",
  1358. "qcom,mdss-dsi-lp1-command-state",
  1359. "qcom,mdss-dsi-lp2-command-state",
  1360. "qcom,mdss-dsi-nolp-command-state",
  1361. "PPS not parsed from DTSI, generated dynamically",
  1362. "ROI not parsed from DTSI, generated dynamically",
  1363. "qcom,mdss-dsi-timing-switch-command-state",
  1364. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1365. "qcom,mdss-dsi-qsync-on-commands-state",
  1366. "qcom,mdss-dsi-qsync-off-commands-state",
  1367. };
  1368. static int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1369. {
  1370. const u32 cmd_set_min_size = 7;
  1371. u32 count = 0;
  1372. u32 packet_length;
  1373. u32 tmp;
  1374. while (length >= cmd_set_min_size) {
  1375. packet_length = cmd_set_min_size;
  1376. tmp = ((data[5] << 8) | (data[6]));
  1377. packet_length += tmp;
  1378. if (packet_length > length) {
  1379. DSI_ERR("format error\n");
  1380. return -EINVAL;
  1381. }
  1382. length -= packet_length;
  1383. data += packet_length;
  1384. count++;
  1385. }
  1386. *cnt = count;
  1387. return 0;
  1388. }
  1389. static int dsi_panel_create_cmd_packets(const char *data,
  1390. u32 length,
  1391. u32 count,
  1392. struct dsi_cmd_desc *cmd)
  1393. {
  1394. int rc = 0;
  1395. int i, j;
  1396. u8 *payload;
  1397. for (i = 0; i < count; i++) {
  1398. u32 size;
  1399. cmd[i].msg.type = data[0];
  1400. cmd[i].last_command = (data[1] == 1);
  1401. cmd[i].msg.channel = data[2];
  1402. cmd[i].msg.flags |= (data[3] == 1 ? MIPI_DSI_MSG_REQ_ACK : 0);
  1403. cmd[i].msg.ctrl = 0;
  1404. cmd[i].post_wait_ms = cmd[i].msg.wait_ms = data[4];
  1405. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1406. size = cmd[i].msg.tx_len * sizeof(u8);
  1407. payload = kzalloc(size, GFP_KERNEL);
  1408. if (!payload) {
  1409. rc = -ENOMEM;
  1410. goto error_free_payloads;
  1411. }
  1412. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1413. payload[j] = data[7 + j];
  1414. cmd[i].msg.tx_buf = payload;
  1415. data += (7 + cmd[i].msg.tx_len);
  1416. }
  1417. return rc;
  1418. error_free_payloads:
  1419. for (i = i - 1; i >= 0; i--) {
  1420. cmd--;
  1421. kfree(cmd->msg.tx_buf);
  1422. }
  1423. return rc;
  1424. }
  1425. static void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1426. {
  1427. u32 i = 0;
  1428. struct dsi_cmd_desc *cmd;
  1429. for (i = 0; i < set->count; i++) {
  1430. cmd = &set->cmds[i];
  1431. kfree(cmd->msg.tx_buf);
  1432. }
  1433. }
  1434. static void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1435. {
  1436. kfree(set->cmds);
  1437. }
  1438. static int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1439. u32 packet_count)
  1440. {
  1441. u32 size;
  1442. size = packet_count * sizeof(*cmd->cmds);
  1443. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1444. if (!cmd->cmds)
  1445. return -ENOMEM;
  1446. cmd->count = packet_count;
  1447. return 0;
  1448. }
  1449. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1450. enum dsi_cmd_set_type type,
  1451. struct dsi_parser_utils *utils)
  1452. {
  1453. int rc = 0;
  1454. u32 length = 0;
  1455. const char *data;
  1456. const char *state;
  1457. u32 packet_count = 0;
  1458. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1459. &length);
  1460. if (!data) {
  1461. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1462. rc = -ENOTSUPP;
  1463. goto error;
  1464. }
  1465. DSI_DEBUG("type=%d, name=%s, length=%d\n", type,
  1466. cmd_set_prop_map[type], length);
  1467. print_hex_dump_debug("", DUMP_PREFIX_NONE,
  1468. 8, 1, data, length, false);
  1469. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1470. if (rc) {
  1471. DSI_ERR("commands failed, rc=%d\n", rc);
  1472. goto error;
  1473. }
  1474. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1475. packet_count, length);
  1476. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1477. if (rc) {
  1478. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1479. goto error;
  1480. }
  1481. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1482. cmd->cmds);
  1483. if (rc) {
  1484. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1485. goto error_free_mem;
  1486. }
  1487. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1488. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1489. cmd->state = DSI_CMD_SET_STATE_LP;
  1490. } else if (!strcmp(state, "dsi_hs_mode")) {
  1491. cmd->state = DSI_CMD_SET_STATE_HS;
  1492. } else {
  1493. DSI_ERR("[%s] command state unrecognized-%s\n",
  1494. cmd_set_state_map[type], state);
  1495. goto error_free_mem;
  1496. }
  1497. return rc;
  1498. error_free_mem:
  1499. kfree(cmd->cmds);
  1500. cmd->cmds = NULL;
  1501. error:
  1502. return rc;
  1503. }
  1504. static int dsi_panel_parse_cmd_sets(
  1505. struct dsi_display_mode_priv_info *priv_info,
  1506. struct dsi_parser_utils *utils)
  1507. {
  1508. int rc = 0;
  1509. struct dsi_panel_cmd_set *set;
  1510. u32 i;
  1511. if (!priv_info) {
  1512. DSI_ERR("invalid mode priv info\n");
  1513. return -EINVAL;
  1514. }
  1515. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1516. set = &priv_info->cmd_sets[i];
  1517. set->type = i;
  1518. set->count = 0;
  1519. if (i == DSI_CMD_SET_PPS) {
  1520. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1521. if (rc)
  1522. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1523. i, rc);
  1524. set->state = DSI_CMD_SET_STATE_LP;
  1525. } else {
  1526. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1527. if (rc)
  1528. DSI_DEBUG("failed to parse set %d\n", i);
  1529. }
  1530. }
  1531. rc = 0;
  1532. return rc;
  1533. }
  1534. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1535. {
  1536. int rc = 0;
  1537. int i;
  1538. u32 length = 0;
  1539. u32 count = 0;
  1540. u32 size = 0;
  1541. u32 *arr_32 = NULL;
  1542. const u32 *arr;
  1543. struct dsi_parser_utils *utils = &panel->utils;
  1544. struct dsi_reset_seq *seq;
  1545. if (panel->host_config.ext_bridge_mode)
  1546. return 0;
  1547. arr = utils->get_property(utils->data,
  1548. "qcom,mdss-dsi-reset-sequence", &length);
  1549. if (!arr) {
  1550. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1551. rc = -EINVAL;
  1552. goto error;
  1553. }
  1554. if (length & 0x1) {
  1555. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1556. panel->name);
  1557. rc = -EINVAL;
  1558. goto error;
  1559. }
  1560. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1561. length = length / sizeof(u32);
  1562. size = length * sizeof(u32);
  1563. arr_32 = kzalloc(size, GFP_KERNEL);
  1564. if (!arr_32) {
  1565. rc = -ENOMEM;
  1566. goto error;
  1567. }
  1568. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1569. arr_32, length);
  1570. if (rc) {
  1571. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1572. goto error_free_arr_32;
  1573. }
  1574. count = length / 2;
  1575. size = count * sizeof(*seq);
  1576. seq = kzalloc(size, GFP_KERNEL);
  1577. if (!seq) {
  1578. rc = -ENOMEM;
  1579. goto error_free_arr_32;
  1580. }
  1581. panel->reset_config.sequence = seq;
  1582. panel->reset_config.count = count;
  1583. for (i = 0; i < length; i += 2) {
  1584. seq->level = arr_32[i];
  1585. seq->sleep_ms = arr_32[i + 1];
  1586. seq++;
  1587. }
  1588. error_free_arr_32:
  1589. kfree(arr_32);
  1590. error:
  1591. return rc;
  1592. }
  1593. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1594. {
  1595. struct dsi_parser_utils *utils = &panel->utils;
  1596. const char *string;
  1597. int i, rc = 0;
  1598. panel->ulps_feature_enabled =
  1599. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1600. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1601. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1602. panel->ulps_suspend_enabled =
  1603. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1604. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1605. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1606. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1607. "qcom,mdss-dsi-te-using-wd");
  1608. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1609. "qcom,cmd-sync-wait-broadcast");
  1610. panel->lp11_init = utils->read_bool(utils->data,
  1611. "qcom,mdss-dsi-lp11-init");
  1612. panel->spr_info.enable = false;
  1613. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1614. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1615. if (!rc) {
  1616. // find match for pack-type string
  1617. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1618. if (msm_spr_pack_type_str[i] &&
  1619. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1620. panel->spr_info.enable = true;
  1621. panel->spr_info.pack_type = i;
  1622. break;
  1623. }
  1624. }
  1625. }
  1626. pr_debug("%s source side spr packing, pack-type %s\n",
  1627. panel->spr_info.enable ? "enable" : "disable",
  1628. panel->spr_info.enable ?
  1629. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1630. return 0;
  1631. }
  1632. static int dsi_panel_parse_jitter_config(
  1633. struct dsi_display_mode *mode,
  1634. struct dsi_parser_utils *utils)
  1635. {
  1636. int rc;
  1637. struct dsi_display_mode_priv_info *priv_info;
  1638. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1639. u64 jitter_val = 0;
  1640. priv_info = mode->priv_info;
  1641. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1642. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1643. if (rc) {
  1644. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1645. } else {
  1646. jitter_val = jitter[0];
  1647. jitter_val = div_u64(jitter_val, jitter[1]);
  1648. }
  1649. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1650. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1651. priv_info->panel_jitter_denom =
  1652. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1653. } else {
  1654. priv_info->panel_jitter_numer = jitter[0];
  1655. priv_info->panel_jitter_denom = jitter[1];
  1656. }
  1657. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1658. &priv_info->panel_prefill_lines);
  1659. if (rc) {
  1660. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1661. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1662. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1663. } else if (priv_info->panel_prefill_lines >=
  1664. DSI_V_TOTAL(&mode->timing)) {
  1665. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1666. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1667. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1668. }
  1669. return 0;
  1670. }
  1671. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1672. {
  1673. int rc = 0;
  1674. char *supply_name;
  1675. if (panel->host_config.ext_bridge_mode)
  1676. return 0;
  1677. if (!strcmp(panel->type, "primary"))
  1678. supply_name = "qcom,panel-supply-entries";
  1679. else
  1680. supply_name = "qcom,panel-sec-supply-entries";
  1681. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1682. &panel->power_info, supply_name);
  1683. if (rc) {
  1684. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1685. goto error;
  1686. }
  1687. error:
  1688. return rc;
  1689. }
  1690. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1691. {
  1692. int rc = 0;
  1693. const char *data;
  1694. struct dsi_parser_utils *utils = &panel->utils;
  1695. char *reset_gpio_name, *mode_set_gpio_name;
  1696. if (!strcmp(panel->type, "primary")) {
  1697. reset_gpio_name = "qcom,platform-reset-gpio";
  1698. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1699. } else {
  1700. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1701. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1702. }
  1703. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1704. reset_gpio_name, 0);
  1705. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1706. !panel->host_config.ext_bridge_mode) {
  1707. rc = panel->reset_config.reset_gpio;
  1708. DSI_ERR("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1709. goto error;
  1710. }
  1711. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1712. "qcom,5v-boost-gpio",
  1713. 0);
  1714. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1715. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1716. panel->name, rc);
  1717. panel->reset_config.disp_en_gpio =
  1718. utils->get_named_gpio(utils->data,
  1719. "qcom,platform-en-gpio", 0);
  1720. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1721. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1722. panel->name, rc);
  1723. }
  1724. }
  1725. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1726. utils->data, mode_set_gpio_name, 0);
  1727. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1728. DSI_DEBUG("mode gpio not specified\n");
  1729. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1730. data = utils->get_property(utils->data,
  1731. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1732. if (data) {
  1733. if (!strcmp(data, "single_port"))
  1734. panel->reset_config.mode_sel_state =
  1735. MODE_SEL_SINGLE_PORT;
  1736. else if (!strcmp(data, "dual_port"))
  1737. panel->reset_config.mode_sel_state =
  1738. MODE_SEL_DUAL_PORT;
  1739. else if (!strcmp(data, "high"))
  1740. panel->reset_config.mode_sel_state =
  1741. MODE_GPIO_HIGH;
  1742. else if (!strcmp(data, "low"))
  1743. panel->reset_config.mode_sel_state =
  1744. MODE_GPIO_LOW;
  1745. } else {
  1746. /* Set default mode as SPLIT mode */
  1747. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1748. }
  1749. /* TODO: release memory */
  1750. rc = dsi_panel_parse_reset_sequence(panel);
  1751. if (rc) {
  1752. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1753. panel->name, rc);
  1754. goto error;
  1755. }
  1756. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1757. "qcom,mdss-dsi-panel-test-pin",
  1758. 0);
  1759. if (!gpio_is_valid(panel->panel_test_gpio))
  1760. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1761. __LINE__);
  1762. error:
  1763. return rc;
  1764. }
  1765. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1766. {
  1767. int rc = 0;
  1768. u32 val;
  1769. struct dsi_backlight_config *config = &panel->bl_config;
  1770. struct dsi_parser_utils *utils = &panel->utils;
  1771. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  1772. &val);
  1773. if (rc) {
  1774. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  1775. goto error;
  1776. }
  1777. config->pwm_period_usecs = val;
  1778. error:
  1779. return rc;
  1780. }
  1781. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1782. {
  1783. int rc = 0;
  1784. u32 val = 0;
  1785. const char *bl_type;
  1786. const char *data;
  1787. struct dsi_parser_utils *utils = &panel->utils;
  1788. char *bl_name;
  1789. if (!strcmp(panel->type, "primary"))
  1790. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1791. else
  1792. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1793. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1794. if (!bl_type) {
  1795. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1796. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1797. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1798. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1799. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1800. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1801. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1802. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1803. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1804. } else {
  1805. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  1806. panel->name, bl_type);
  1807. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1808. }
  1809. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  1810. if (!data) {
  1811. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1812. } else if (!strcmp(data, "delay_until_first_frame")) {
  1813. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  1814. } else {
  1815. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  1816. panel->name, data);
  1817. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1818. }
  1819. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  1820. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  1821. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  1822. if (rc) {
  1823. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  1824. panel->name);
  1825. panel->bl_config.bl_min_level = 0;
  1826. } else {
  1827. panel->bl_config.bl_min_level = val;
  1828. }
  1829. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  1830. if (rc) {
  1831. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  1832. panel->name);
  1833. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  1834. } else {
  1835. panel->bl_config.bl_max_level = val;
  1836. }
  1837. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  1838. &val);
  1839. if (rc) {
  1840. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  1841. panel->name);
  1842. panel->bl_config.brightness_max_level = 255;
  1843. } else {
  1844. panel->bl_config.brightness_max_level = val;
  1845. }
  1846. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  1847. rc = dsi_panel_parse_bl_pwm_config(panel);
  1848. if (rc) {
  1849. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  1850. panel->name, rc);
  1851. goto error;
  1852. }
  1853. }
  1854. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  1855. "qcom,platform-bklight-en-gpio",
  1856. 0);
  1857. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  1858. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  1859. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1860. panel->name, rc);
  1861. rc = -EPROBE_DEFER;
  1862. goto error;
  1863. } else {
  1864. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1865. panel->name, rc);
  1866. rc = 0;
  1867. goto error;
  1868. }
  1869. }
  1870. error:
  1871. return rc;
  1872. }
  1873. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  1874. struct dsi_parser_utils *utils)
  1875. {
  1876. const char *data;
  1877. u32 len, i;
  1878. int rc = 0;
  1879. struct dsi_display_mode_priv_info *priv_info;
  1880. u64 pixel_clk_khz;
  1881. if (!mode || !mode->priv_info)
  1882. return -EINVAL;
  1883. priv_info = mode->priv_info;
  1884. data = utils->get_property(utils->data,
  1885. "qcom,mdss-dsi-panel-phy-timings", &len);
  1886. if (!data) {
  1887. DSI_DEBUG("Unable to read Phy timing settings\n");
  1888. } else {
  1889. priv_info->phy_timing_val =
  1890. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  1891. if (!priv_info->phy_timing_val)
  1892. return -EINVAL;
  1893. for (i = 0; i < len; i++)
  1894. priv_info->phy_timing_val[i] = data[i];
  1895. priv_info->phy_timing_len = len;
  1896. }
  1897. if (mode->panel_mode == DSI_OP_VIDEO_MODE) {
  1898. /*
  1899. * For command mode we update the pclk as part of
  1900. * function dsi_panel_calc_dsi_transfer_time( )
  1901. * as we set it based on dsi clock or mdp transfer time.
  1902. */
  1903. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  1904. DSI_V_TOTAL(&mode->timing) *
  1905. mode->timing.refresh_rate);
  1906. do_div(pixel_clk_khz, 1000);
  1907. mode->pixel_clk_khz = pixel_clk_khz;
  1908. }
  1909. return rc;
  1910. }
  1911. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  1912. struct dsi_parser_utils *utils)
  1913. {
  1914. u32 data;
  1915. int rc = -EINVAL;
  1916. int intf_width;
  1917. const char *compression;
  1918. struct dsi_display_mode_priv_info *priv_info;
  1919. if (!mode || !mode->priv_info)
  1920. return -EINVAL;
  1921. priv_info = mode->priv_info;
  1922. priv_info->dsc_enabled = false;
  1923. compression = utils->get_property(utils->data,
  1924. "qcom,compression-mode", NULL);
  1925. if (compression && !strcmp(compression, "dsc"))
  1926. priv_info->dsc_enabled = true;
  1927. if (!priv_info->dsc_enabled) {
  1928. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  1929. return 0;
  1930. }
  1931. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  1932. if (rc) {
  1933. priv_info->dsc.config.dsc_version_major = 0x1;
  1934. priv_info->dsc.config.dsc_version_minor = 0x1;
  1935. rc = 0;
  1936. } else {
  1937. /* BITS[0..3] provides minor version and BITS[4..7] provide
  1938. * major version information
  1939. */
  1940. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  1941. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  1942. if ((priv_info->dsc.config.dsc_version_major != 0x1) &&
  1943. ((priv_info->dsc.config.dsc_version_minor
  1944. != 0x1) ||
  1945. (priv_info->dsc.config.dsc_version_minor
  1946. != 0x2))) {
  1947. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  1948. __func__,
  1949. priv_info->dsc.config.dsc_version_major,
  1950. priv_info->dsc.config.dsc_version_minor
  1951. );
  1952. rc = -EINVAL;
  1953. goto error;
  1954. }
  1955. }
  1956. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  1957. if (rc) {
  1958. priv_info->dsc.scr_rev = 0x0;
  1959. rc = 0;
  1960. } else {
  1961. priv_info->dsc.scr_rev = data & 0xff;
  1962. /* only one scr rev supported */
  1963. if (priv_info->dsc.scr_rev > 0x1) {
  1964. DSI_ERR("%s: DSC scr version:%d not supported\n",
  1965. __func__, priv_info->dsc.scr_rev);
  1966. rc = -EINVAL;
  1967. goto error;
  1968. }
  1969. }
  1970. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  1971. if (rc) {
  1972. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  1973. goto error;
  1974. }
  1975. priv_info->dsc.config.slice_height = data;
  1976. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  1977. if (rc) {
  1978. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  1979. goto error;
  1980. }
  1981. priv_info->dsc.config.slice_width = data;
  1982. intf_width = mode->timing.h_active;
  1983. if (intf_width % priv_info->dsc.config.slice_width) {
  1984. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  1985. intf_width, priv_info->dsc.config.slice_width);
  1986. rc = -EINVAL;
  1987. goto error;
  1988. }
  1989. priv_info->dsc.config.pic_width = mode->timing.h_active;
  1990. priv_info->dsc.config.pic_height = mode->timing.v_active;
  1991. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  1992. if (rc) {
  1993. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  1994. goto error;
  1995. } else if (!data || (data > 2)) {
  1996. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  1997. goto error;
  1998. }
  1999. priv_info->dsc.slice_per_pkt = data;
  2000. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2001. &data);
  2002. if (rc) {
  2003. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2004. goto error;
  2005. }
  2006. priv_info->dsc.config.bits_per_component = data;
  2007. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2008. if (rc) {
  2009. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2010. data = 0;
  2011. }
  2012. priv_info->dsc.pps_delay_ms = data;
  2013. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2014. &data);
  2015. if (rc) {
  2016. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2017. goto error;
  2018. }
  2019. priv_info->dsc.config.bits_per_pixel = data << 4;
  2020. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2021. &data);
  2022. if (rc) {
  2023. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2024. rc = 0;
  2025. data = MSM_CHROMA_444;
  2026. }
  2027. priv_info->dsc.chroma_format = data;
  2028. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2029. &data);
  2030. if (rc) {
  2031. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2032. rc = 0;
  2033. data = MSM_RGB;
  2034. }
  2035. priv_info->dsc.source_color_space = data;
  2036. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2037. "qcom,mdss-dsc-block-prediction-enable");
  2038. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2039. priv_info->dsc.config.slice_width);
  2040. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2041. priv_info->dsc.scr_rev);
  2042. if (rc) {
  2043. DSI_DEBUG("failed populating dsc params \n");
  2044. rc = -EINVAL;
  2045. goto error;
  2046. }
  2047. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2048. if (rc) {
  2049. DSI_DEBUG("failed populating other dsc params \n");
  2050. rc = -EINVAL;
  2051. goto error;
  2052. }
  2053. priv_info->pclk_scale.numer =
  2054. priv_info->dsc.config.bits_per_pixel >> 4;
  2055. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2056. priv_info->dsc.chroma_format,
  2057. priv_info->dsc.config.bits_per_component);
  2058. mode->timing.dsc_enabled = true;
  2059. mode->timing.dsc = &priv_info->dsc;
  2060. mode->timing.pclk_scale = priv_info->pclk_scale;
  2061. error:
  2062. return rc;
  2063. }
  2064. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2065. struct dsi_parser_utils *utils, int traffic_mode, int panel_mode)
  2066. {
  2067. u32 data;
  2068. int rc = -EINVAL;
  2069. const char *compression;
  2070. struct dsi_display_mode_priv_info *priv_info;
  2071. int intf_width;
  2072. if (!mode || !mode->priv_info)
  2073. return -EINVAL;
  2074. priv_info = mode->priv_info;
  2075. priv_info->vdc_enabled = false;
  2076. compression = utils->get_property(utils->data,
  2077. "qcom,compression-mode", NULL);
  2078. if (compression && !strcmp(compression, "vdc"))
  2079. priv_info->vdc_enabled = true;
  2080. if (!priv_info->vdc_enabled) {
  2081. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2082. return 0;
  2083. }
  2084. priv_info->vdc.panel_mode = panel_mode;
  2085. priv_info->vdc.traffic_mode = traffic_mode;
  2086. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2087. if (rc) {
  2088. priv_info->vdc.version_major = 0x1;
  2089. priv_info->vdc.version_minor = 0x1;
  2090. priv_info->vdc.version_release = 0x0;
  2091. rc = 0;
  2092. } else {
  2093. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2094. * major version information
  2095. */
  2096. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2097. priv_info->vdc.version_minor = data & 0x0F;
  2098. if ((priv_info->vdc.version_major != 0x1) &&
  2099. ((priv_info->vdc.version_minor
  2100. != 0x1))) {
  2101. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2102. __func__,
  2103. priv_info->vdc.version_major,
  2104. priv_info->vdc.version_minor
  2105. );
  2106. rc = -EINVAL;
  2107. goto error;
  2108. }
  2109. }
  2110. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2111. if (rc) {
  2112. priv_info->vdc.version_release = 0x0;
  2113. rc = 0;
  2114. } else {
  2115. priv_info->vdc.version_release = data & 0xff;
  2116. /* only one release version is supported */
  2117. if (priv_info->vdc.version_release != 0x0) {
  2118. DSI_ERR("unsupported vdc release version %d\n",
  2119. priv_info->vdc.version_release);
  2120. rc = -EINVAL;
  2121. goto error;
  2122. }
  2123. }
  2124. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2125. priv_info->vdc.version_major,
  2126. priv_info->vdc.version_minor,
  2127. priv_info->vdc.version_release);
  2128. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2129. if (rc) {
  2130. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2131. goto error;
  2132. }
  2133. priv_info->vdc.slice_height = data;
  2134. /* slice height should be atleast 16 lines */
  2135. if (priv_info->vdc.slice_height < 16) {
  2136. DSI_ERR("invalid slice height %d\n",
  2137. priv_info->vdc.slice_height);
  2138. rc = -EINVAL;
  2139. goto error;
  2140. }
  2141. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2142. if (rc) {
  2143. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2144. goto error;
  2145. }
  2146. priv_info->vdc.slice_width = data;
  2147. /*
  2148. * slide-width should be multiple of 8
  2149. * slice-width should be atlease 64 pixels
  2150. */
  2151. if ((priv_info->vdc.slice_width & 7) ||
  2152. (priv_info->vdc.slice_width < 64)) {
  2153. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2154. rc = -EINVAL;
  2155. goto error;
  2156. }
  2157. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2158. if (rc) {
  2159. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2160. goto error;
  2161. } else if (!data || (data > 2)) {
  2162. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2163. rc = -EINVAL;
  2164. goto error;
  2165. }
  2166. intf_width = mode->timing.h_active;
  2167. priv_info->vdc.slice_per_pkt = data;
  2168. priv_info->vdc.frame_width = mode->timing.h_active;
  2169. priv_info->vdc.frame_height = mode->timing.v_active;
  2170. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2171. &data);
  2172. if (rc) {
  2173. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2174. goto error;
  2175. }
  2176. priv_info->vdc.bits_per_component = data;
  2177. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2178. if (rc) {
  2179. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2180. data = 0;
  2181. }
  2182. priv_info->vdc.pps_delay_ms = data;
  2183. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2184. &data);
  2185. if (rc) {
  2186. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2187. goto error;
  2188. }
  2189. priv_info->vdc.bits_per_pixel = data << 4;
  2190. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2191. &data);
  2192. if (rc) {
  2193. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2194. rc = 0;
  2195. data = MSM_CHROMA_444;
  2196. }
  2197. priv_info->vdc.chroma_format = data;
  2198. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2199. &data);
  2200. if (rc) {
  2201. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2202. rc = 0;
  2203. data = MSM_RGB;
  2204. }
  2205. priv_info->vdc.source_color_space = data;
  2206. rc = sde_vdc_populate_config(&priv_info->vdc,
  2207. intf_width, traffic_mode);
  2208. if (rc) {
  2209. DSI_DEBUG("failed populating vdc config\n");
  2210. rc = -EINVAL;
  2211. goto error;
  2212. }
  2213. priv_info->pclk_scale.numer =
  2214. priv_info->vdc.bits_per_pixel >> 4;
  2215. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2216. priv_info->vdc.chroma_format,
  2217. priv_info->vdc.bits_per_component);
  2218. mode->timing.vdc_enabled = true;
  2219. mode->timing.vdc = &priv_info->vdc;
  2220. mode->timing.pclk_scale = priv_info->pclk_scale;
  2221. error:
  2222. return rc;
  2223. }
  2224. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2225. {
  2226. int rc = 0;
  2227. struct drm_panel_hdr_properties *hdr_prop;
  2228. struct dsi_parser_utils *utils = &panel->utils;
  2229. hdr_prop = &panel->hdr_props;
  2230. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2231. "qcom,mdss-dsi-panel-hdr-enabled");
  2232. if (hdr_prop->hdr_enabled) {
  2233. rc = utils->read_u32_array(utils->data,
  2234. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2235. hdr_prop->display_primaries,
  2236. DISPLAY_PRIMARIES_MAX);
  2237. if (rc) {
  2238. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2239. __func__, __LINE__, rc);
  2240. hdr_prop->hdr_enabled = false;
  2241. return rc;
  2242. }
  2243. rc = utils->read_u32(utils->data,
  2244. "qcom,mdss-dsi-panel-peak-brightness",
  2245. &(hdr_prop->peak_brightness));
  2246. if (rc) {
  2247. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2248. __func__, __LINE__, rc);
  2249. hdr_prop->hdr_enabled = false;
  2250. return rc;
  2251. }
  2252. rc = utils->read_u32(utils->data,
  2253. "qcom,mdss-dsi-panel-blackness-level",
  2254. &(hdr_prop->blackness_level));
  2255. if (rc) {
  2256. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2257. __func__, __LINE__, rc);
  2258. hdr_prop->hdr_enabled = false;
  2259. return rc;
  2260. }
  2261. }
  2262. return 0;
  2263. }
  2264. static int dsi_panel_parse_topology(
  2265. struct dsi_display_mode_priv_info *priv_info,
  2266. struct dsi_parser_utils *utils,
  2267. int topology_override)
  2268. {
  2269. struct msm_display_topology *topology;
  2270. u32 top_count, top_sel, *array = NULL;
  2271. int i, len = 0;
  2272. int rc = -EINVAL;
  2273. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2274. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2275. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2276. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2277. return rc;
  2278. }
  2279. top_count = len / TOPOLOGY_SET_LEN;
  2280. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2281. if (!array)
  2282. return -ENOMEM;
  2283. rc = utils->read_u32_array(utils->data,
  2284. "qcom,display-topology", array, len);
  2285. if (rc) {
  2286. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2287. goto read_fail;
  2288. }
  2289. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2290. if (!topology) {
  2291. rc = -ENOMEM;
  2292. goto read_fail;
  2293. }
  2294. for (i = 0; i < top_count; i++) {
  2295. struct msm_display_topology *top = &topology[i];
  2296. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2297. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2298. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2299. }
  2300. if (topology_override >= 0 && topology_override < top_count) {
  2301. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2302. topology_override,
  2303. topology[topology_override].num_lm,
  2304. topology[topology_override].num_enc,
  2305. topology[topology_override].num_intf);
  2306. top_sel = topology_override;
  2307. goto parse_done;
  2308. }
  2309. rc = utils->read_u32(utils->data,
  2310. "qcom,default-topology-index", &top_sel);
  2311. if (rc) {
  2312. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2313. goto parse_fail;
  2314. }
  2315. if (top_sel >= top_count) {
  2316. rc = -EINVAL;
  2317. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2318. rc);
  2319. goto parse_fail;
  2320. }
  2321. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2322. topology[top_sel].num_lm,
  2323. topology[top_sel].num_enc,
  2324. topology[top_sel].num_intf);
  2325. parse_done:
  2326. memcpy(&priv_info->topology, &topology[top_sel],
  2327. sizeof(struct msm_display_topology));
  2328. parse_fail:
  2329. kfree(topology);
  2330. read_fail:
  2331. kfree(array);
  2332. return rc;
  2333. }
  2334. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2335. struct msm_roi_alignment *align)
  2336. {
  2337. int len = 0, rc = 0;
  2338. u32 value[6];
  2339. struct property *data;
  2340. if (!align)
  2341. return -EINVAL;
  2342. memset(align, 0, sizeof(*align));
  2343. data = utils->find_property(utils->data,
  2344. "qcom,panel-roi-alignment", &len);
  2345. len /= sizeof(u32);
  2346. if (!data) {
  2347. DSI_ERR("panel roi alignment not found\n");
  2348. rc = -EINVAL;
  2349. } else if (len != 6) {
  2350. DSI_ERR("incorrect roi alignment len %d\n", len);
  2351. rc = -EINVAL;
  2352. } else {
  2353. rc = utils->read_u32_array(utils->data,
  2354. "qcom,panel-roi-alignment", value, len);
  2355. if (rc)
  2356. DSI_DEBUG("error reading panel roi alignment values\n");
  2357. else {
  2358. align->xstart_pix_align = value[0];
  2359. align->ystart_pix_align = value[1];
  2360. align->width_pix_align = value[2];
  2361. align->height_pix_align = value[3];
  2362. align->min_width = value[4];
  2363. align->min_height = value[5];
  2364. }
  2365. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2366. align->xstart_pix_align,
  2367. align->width_pix_align,
  2368. align->ystart_pix_align,
  2369. align->height_pix_align,
  2370. align->min_width,
  2371. align->min_height);
  2372. }
  2373. return rc;
  2374. }
  2375. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2376. struct dsi_parser_utils *utils)
  2377. {
  2378. struct msm_roi_caps *roi_caps = NULL;
  2379. const char *data;
  2380. int rc = 0;
  2381. if (!mode || !mode->priv_info) {
  2382. DSI_ERR("invalid arguments\n");
  2383. return -EINVAL;
  2384. }
  2385. roi_caps = &mode->priv_info->roi_caps;
  2386. memset(roi_caps, 0, sizeof(*roi_caps));
  2387. data = utils->get_property(utils->data,
  2388. "qcom,partial-update-enabled", NULL);
  2389. if (data) {
  2390. if (!strcmp(data, "dual_roi"))
  2391. roi_caps->num_roi = 2;
  2392. else if (!strcmp(data, "single_roi"))
  2393. roi_caps->num_roi = 1;
  2394. else {
  2395. DSI_INFO(
  2396. "invalid value for qcom,partial-update-enabled: %s\n",
  2397. data);
  2398. return 0;
  2399. }
  2400. } else {
  2401. DSI_DEBUG("partial update disabled as the property is not set\n");
  2402. return 0;
  2403. }
  2404. roi_caps->merge_rois = utils->read_bool(utils->data,
  2405. "qcom,partial-update-roi-merge");
  2406. roi_caps->enabled = roi_caps->num_roi > 0;
  2407. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2408. roi_caps->enabled);
  2409. if (roi_caps->enabled)
  2410. rc = dsi_panel_parse_roi_alignment(utils,
  2411. &roi_caps->align);
  2412. if (rc)
  2413. memset(roi_caps, 0, sizeof(*roi_caps));
  2414. return rc;
  2415. }
  2416. static int dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2417. struct dsi_parser_utils *utils)
  2418. {
  2419. bool vid_mode_support, cmd_mode_support;
  2420. if (!mode || !mode->priv_info) {
  2421. DSI_ERR("invalid arguments\n");
  2422. return -EINVAL;
  2423. }
  2424. vid_mode_support = utils->read_bool(utils->data,
  2425. "qcom,mdss-dsi-video-mode");
  2426. cmd_mode_support = utils->read_bool(utils->data,
  2427. "qcom,mdss-dsi-cmd-mode");
  2428. if (cmd_mode_support)
  2429. mode->panel_mode = DSI_OP_CMD_MODE;
  2430. else if (vid_mode_support)
  2431. mode->panel_mode = DSI_OP_VIDEO_MODE;
  2432. else
  2433. return -EINVAL;
  2434. return 0;
  2435. };
  2436. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2437. {
  2438. int dms_enabled;
  2439. const char *data;
  2440. struct dsi_parser_utils *utils = &panel->utils;
  2441. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2442. dms_enabled = utils->read_bool(utils->data,
  2443. "qcom,dynamic-mode-switch-enabled");
  2444. if (!dms_enabled)
  2445. return 0;
  2446. data = utils->get_property(utils->data,
  2447. "qcom,dynamic-mode-switch-type", NULL);
  2448. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2449. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2450. } else {
  2451. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2452. panel->name, data);
  2453. return -EINVAL;
  2454. }
  2455. return 0;
  2456. };
  2457. /*
  2458. * The length of all the valid values to be checked should not be greater
  2459. * than the length of returned data from read command.
  2460. */
  2461. static bool
  2462. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2463. {
  2464. int i;
  2465. struct drm_panel_esd_config *config = &panel->esd_config;
  2466. for (i = 0; i < count; ++i) {
  2467. if (config->status_valid_params[i] >
  2468. config->status_cmds_rlen[i]) {
  2469. DSI_DEBUG("ignore valid params\n");
  2470. return false;
  2471. }
  2472. }
  2473. return true;
  2474. }
  2475. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2476. char *prop_key, u32 **target, u32 cmd_cnt)
  2477. {
  2478. int tmp;
  2479. if (!utils->find_property(utils->data, prop_key, &tmp))
  2480. return false;
  2481. tmp /= sizeof(u32);
  2482. if (tmp != cmd_cnt) {
  2483. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2484. tmp, cmd_cnt);
  2485. return false;
  2486. }
  2487. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2488. if (IS_ERR_OR_NULL(*target)) {
  2489. DSI_ERR("Error allocating memory for property\n");
  2490. return false;
  2491. }
  2492. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2493. DSI_ERR("cannot get values from dts\n");
  2494. kfree(*target);
  2495. *target = NULL;
  2496. return false;
  2497. }
  2498. return true;
  2499. }
  2500. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2501. {
  2502. kfree(esd_config->status_buf);
  2503. kfree(esd_config->return_buf);
  2504. kfree(esd_config->status_value);
  2505. kfree(esd_config->status_valid_params);
  2506. kfree(esd_config->status_cmds_rlen);
  2507. kfree(esd_config->status_cmd.cmds);
  2508. }
  2509. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2510. {
  2511. struct drm_panel_esd_config *esd_config;
  2512. int rc = 0;
  2513. u32 tmp;
  2514. u32 i, status_len, *lenp;
  2515. struct property *data;
  2516. struct dsi_parser_utils *utils = &panel->utils;
  2517. if (!panel) {
  2518. DSI_ERR("Invalid Params\n");
  2519. return -EINVAL;
  2520. }
  2521. esd_config = &panel->esd_config;
  2522. if (!esd_config)
  2523. return -EINVAL;
  2524. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2525. DSI_CMD_SET_PANEL_STATUS, utils);
  2526. if (!esd_config->status_cmd.count) {
  2527. DSI_ERR("panel status command parsing failed\n");
  2528. rc = -EINVAL;
  2529. goto error;
  2530. }
  2531. if (!dsi_panel_parse_esd_status_len(utils,
  2532. "qcom,mdss-dsi-panel-status-read-length",
  2533. &panel->esd_config.status_cmds_rlen,
  2534. esd_config->status_cmd.count)) {
  2535. DSI_ERR("Invalid status read length\n");
  2536. rc = -EINVAL;
  2537. goto error1;
  2538. }
  2539. if (dsi_panel_parse_esd_status_len(utils,
  2540. "qcom,mdss-dsi-panel-status-valid-params",
  2541. &panel->esd_config.status_valid_params,
  2542. esd_config->status_cmd.count)) {
  2543. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2544. esd_config->status_cmd.count)) {
  2545. rc = -EINVAL;
  2546. goto error2;
  2547. }
  2548. }
  2549. status_len = 0;
  2550. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2551. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2552. status_len += lenp[i];
  2553. if (!status_len) {
  2554. rc = -EINVAL;
  2555. goto error2;
  2556. }
  2557. /*
  2558. * Some panel may need multiple read commands to properly
  2559. * check panel status. Do a sanity check for proper status
  2560. * value which will be compared with the value read by dsi
  2561. * controller during ESD check. Also check if multiple read
  2562. * commands are there then, there should be corresponding
  2563. * status check values for each read command.
  2564. */
  2565. data = utils->find_property(utils->data,
  2566. "qcom,mdss-dsi-panel-status-value", &tmp);
  2567. tmp /= sizeof(u32);
  2568. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2569. esd_config->groups = tmp / status_len;
  2570. } else {
  2571. DSI_ERR("error parse panel-status-value\n");
  2572. rc = -EINVAL;
  2573. goto error2;
  2574. }
  2575. esd_config->status_value =
  2576. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2577. GFP_KERNEL);
  2578. if (!esd_config->status_value) {
  2579. rc = -ENOMEM;
  2580. goto error2;
  2581. }
  2582. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2583. sizeof(unsigned char), GFP_KERNEL);
  2584. if (!esd_config->return_buf) {
  2585. rc = -ENOMEM;
  2586. goto error3;
  2587. }
  2588. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2589. if (!esd_config->status_buf) {
  2590. rc = -ENOMEM;
  2591. goto error4;
  2592. }
  2593. rc = utils->read_u32_array(utils->data,
  2594. "qcom,mdss-dsi-panel-status-value",
  2595. esd_config->status_value, esd_config->groups * status_len);
  2596. if (rc) {
  2597. DSI_DEBUG("error reading panel status values\n");
  2598. memset(esd_config->status_value, 0,
  2599. esd_config->groups * status_len);
  2600. }
  2601. return 0;
  2602. error4:
  2603. kfree(esd_config->return_buf);
  2604. error3:
  2605. kfree(esd_config->status_value);
  2606. error2:
  2607. kfree(esd_config->status_valid_params);
  2608. kfree(esd_config->status_cmds_rlen);
  2609. error1:
  2610. kfree(esd_config->status_cmd.cmds);
  2611. error:
  2612. return rc;
  2613. }
  2614. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2615. {
  2616. int rc = 0;
  2617. const char *string;
  2618. struct drm_panel_esd_config *esd_config;
  2619. struct dsi_parser_utils *utils = &panel->utils;
  2620. u8 *esd_mode = NULL;
  2621. esd_config = &panel->esd_config;
  2622. esd_config->status_mode = ESD_MODE_MAX;
  2623. esd_config->esd_enabled = utils->read_bool(utils->data,
  2624. "qcom,esd-check-enabled");
  2625. if (!esd_config->esd_enabled)
  2626. return 0;
  2627. rc = utils->read_string(utils->data,
  2628. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2629. if (!rc) {
  2630. if (!strcmp(string, "bta_check")) {
  2631. esd_config->status_mode = ESD_MODE_SW_BTA;
  2632. } else if (!strcmp(string, "reg_read")) {
  2633. esd_config->status_mode = ESD_MODE_REG_READ;
  2634. } else if (!strcmp(string, "te_signal_check")) {
  2635. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2636. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2637. } else {
  2638. DSI_ERR("TE-ESD not valid for video mode\n");
  2639. rc = -EINVAL;
  2640. goto error;
  2641. }
  2642. } else {
  2643. DSI_ERR("No valid panel-status-check-mode string\n");
  2644. rc = -EINVAL;
  2645. goto error;
  2646. }
  2647. } else {
  2648. DSI_DEBUG("status check method not defined!\n");
  2649. rc = -EINVAL;
  2650. goto error;
  2651. }
  2652. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2653. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2654. if (rc) {
  2655. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2656. rc);
  2657. goto error;
  2658. }
  2659. esd_mode = "register_read";
  2660. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2661. esd_mode = "bta_trigger";
  2662. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2663. esd_mode = "te_check";
  2664. }
  2665. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2666. return 0;
  2667. error:
  2668. panel->esd_config.esd_enabled = false;
  2669. return rc;
  2670. }
  2671. static void dsi_panel_update_util(struct dsi_panel *panel,
  2672. struct device_node *parser_node)
  2673. {
  2674. struct dsi_parser_utils *utils = &panel->utils;
  2675. if (parser_node) {
  2676. *utils = *dsi_parser_get_parser_utils();
  2677. utils->data = parser_node;
  2678. DSI_DEBUG("switching to parser APIs\n");
  2679. goto end;
  2680. }
  2681. *utils = *dsi_parser_get_of_utils();
  2682. utils->data = panel->panel_of_node;
  2683. end:
  2684. utils->node = panel->panel_of_node;
  2685. }
  2686. struct dsi_panel *dsi_panel_get(struct device *parent,
  2687. struct device_node *of_node,
  2688. struct device_node *parser_node,
  2689. const char *type,
  2690. int topology_override)
  2691. {
  2692. struct dsi_panel *panel;
  2693. struct dsi_parser_utils *utils;
  2694. const char *panel_physical_type;
  2695. int rc = 0;
  2696. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2697. if (!panel)
  2698. return ERR_PTR(-ENOMEM);
  2699. panel->panel_of_node = of_node;
  2700. panel->parent = parent;
  2701. panel->type = type;
  2702. dsi_panel_update_util(panel, parser_node);
  2703. utils = &panel->utils;
  2704. panel->name = utils->get_property(utils->data,
  2705. "qcom,mdss-dsi-panel-name", NULL);
  2706. if (!panel->name)
  2707. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2708. /*
  2709. * Set panel type to LCD as default.
  2710. */
  2711. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2712. panel_physical_type = utils->get_property(utils->data,
  2713. "qcom,mdss-dsi-panel-physical-type", NULL);
  2714. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2715. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2716. rc = dsi_panel_parse_host_config(panel);
  2717. if (rc) {
  2718. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2719. rc);
  2720. goto error;
  2721. }
  2722. rc = dsi_panel_parse_panel_mode(panel);
  2723. if (rc) {
  2724. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  2725. rc);
  2726. goto error;
  2727. }
  2728. rc = dsi_panel_parse_dfps_caps(panel);
  2729. if (rc)
  2730. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  2731. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2732. if (rc)
  2733. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  2734. /* allow qsync support only if DFPS is with VFP approach */
  2735. if ((panel->dfps_caps.dfps_support) &&
  2736. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  2737. panel->qsync_min_fps = 0;
  2738. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2739. if (rc)
  2740. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  2741. rc = dsi_panel_parse_phy_props(panel);
  2742. if (rc) {
  2743. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  2744. rc);
  2745. goto error;
  2746. }
  2747. rc = dsi_panel_parse_gpios(panel);
  2748. if (rc) {
  2749. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  2750. goto error;
  2751. }
  2752. rc = dsi_panel_parse_power_cfg(panel);
  2753. if (rc)
  2754. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  2755. rc = dsi_panel_parse_bl_config(panel);
  2756. if (rc) {
  2757. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  2758. if (rc == -EPROBE_DEFER)
  2759. goto error;
  2760. }
  2761. rc = dsi_panel_parse_misc_features(panel);
  2762. if (rc)
  2763. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  2764. rc = dsi_panel_parse_hdr_config(panel);
  2765. if (rc)
  2766. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  2767. rc = dsi_panel_get_mode_count(panel);
  2768. if (rc) {
  2769. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  2770. goto error;
  2771. }
  2772. rc = dsi_panel_parse_dms_info(panel);
  2773. if (rc)
  2774. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  2775. rc = dsi_panel_parse_esd_config(panel);
  2776. if (rc)
  2777. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  2778. rc = dsi_panel_vreg_get(panel);
  2779. if (rc) {
  2780. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  2781. panel->name, rc);
  2782. goto error;
  2783. }
  2784. panel->power_mode = SDE_MODE_DPMS_OFF;
  2785. drm_panel_init(&panel->drm_panel);
  2786. panel->drm_panel.dev = &panel->mipi_device.dev;
  2787. panel->mipi_device.dev.of_node = of_node;
  2788. rc = drm_panel_add(&panel->drm_panel);
  2789. if (rc)
  2790. goto error_vreg_put;
  2791. mutex_init(&panel->panel_lock);
  2792. return panel;
  2793. error_vreg_put:
  2794. (void)dsi_panel_vreg_put(panel);
  2795. error:
  2796. kfree(panel);
  2797. return ERR_PTR(rc);
  2798. }
  2799. void dsi_panel_put(struct dsi_panel *panel)
  2800. {
  2801. drm_panel_remove(&panel->drm_panel);
  2802. /* free resources allocated for ESD check */
  2803. dsi_panel_esd_config_deinit(&panel->esd_config);
  2804. kfree(panel);
  2805. }
  2806. int dsi_panel_drv_init(struct dsi_panel *panel,
  2807. struct mipi_dsi_host *host)
  2808. {
  2809. int rc = 0;
  2810. struct mipi_dsi_device *dev;
  2811. if (!panel || !host) {
  2812. DSI_ERR("invalid params\n");
  2813. return -EINVAL;
  2814. }
  2815. mutex_lock(&panel->panel_lock);
  2816. dev = &panel->mipi_device;
  2817. dev->host = host;
  2818. /*
  2819. * We dont have device structure since panel is not a device node.
  2820. * When using drm panel framework, the device is probed when the host is
  2821. * create.
  2822. */
  2823. dev->channel = 0;
  2824. dev->lanes = 4;
  2825. panel->host = host;
  2826. rc = dsi_panel_pinctrl_init(panel);
  2827. if (rc) {
  2828. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  2829. panel->name, rc);
  2830. goto exit;
  2831. }
  2832. rc = dsi_panel_gpio_request(panel);
  2833. if (rc) {
  2834. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  2835. rc);
  2836. goto error_pinctrl_deinit;
  2837. }
  2838. rc = dsi_panel_bl_register(panel);
  2839. if (rc) {
  2840. if (rc != -EPROBE_DEFER)
  2841. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  2842. panel->name, rc);
  2843. goto error_gpio_release;
  2844. }
  2845. goto exit;
  2846. error_gpio_release:
  2847. (void)dsi_panel_gpio_release(panel);
  2848. error_pinctrl_deinit:
  2849. (void)dsi_panel_pinctrl_deinit(panel);
  2850. exit:
  2851. mutex_unlock(&panel->panel_lock);
  2852. return rc;
  2853. }
  2854. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  2855. {
  2856. int rc = 0;
  2857. if (!panel) {
  2858. DSI_ERR("invalid params\n");
  2859. return -EINVAL;
  2860. }
  2861. mutex_lock(&panel->panel_lock);
  2862. rc = dsi_panel_bl_unregister(panel);
  2863. if (rc)
  2864. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  2865. panel->name, rc);
  2866. rc = dsi_panel_gpio_release(panel);
  2867. if (rc)
  2868. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  2869. rc);
  2870. rc = dsi_panel_pinctrl_deinit(panel);
  2871. if (rc)
  2872. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  2873. rc);
  2874. rc = dsi_panel_vreg_put(panel);
  2875. if (rc)
  2876. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  2877. panel->host = NULL;
  2878. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  2879. mutex_unlock(&panel->panel_lock);
  2880. return rc;
  2881. }
  2882. int dsi_panel_validate_mode(struct dsi_panel *panel,
  2883. struct dsi_display_mode *mode)
  2884. {
  2885. return 0;
  2886. }
  2887. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  2888. {
  2889. const u32 SINGLE_MODE_SUPPORT = 1;
  2890. struct dsi_parser_utils *utils;
  2891. struct device_node *timings_np, *child_np;
  2892. int num_dfps_rates, num_bit_clks;
  2893. int num_video_modes = 0, num_cmd_modes = 0;
  2894. int count, rc = 0;
  2895. if (!panel) {
  2896. DSI_ERR("invalid params\n");
  2897. return -EINVAL;
  2898. }
  2899. utils = &panel->utils;
  2900. panel->num_timing_nodes = 0;
  2901. timings_np = utils->get_child_by_name(utils->data,
  2902. "qcom,mdss-dsi-display-timings");
  2903. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  2904. DSI_ERR("no display timing nodes defined\n");
  2905. rc = -EINVAL;
  2906. goto error;
  2907. }
  2908. count = utils->get_child_count(timings_np);
  2909. if ((!count && !panel->host_config.ext_bridge_mode) ||
  2910. count > DSI_MODE_MAX) {
  2911. DSI_ERR("invalid count of timing nodes: %d\n", count);
  2912. rc = -EINVAL;
  2913. goto error;
  2914. }
  2915. /* No multiresolution support is available for video mode panels.
  2916. * Multi-mode is supported for video mode during POMS is enabled.
  2917. */
  2918. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  2919. !panel->host_config.ext_bridge_mode &&
  2920. !panel->panel_mode_switch_enabled)
  2921. count = SINGLE_MODE_SUPPORT;
  2922. panel->num_timing_nodes = count;
  2923. dsi_for_each_child_node(timings_np, child_np) {
  2924. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  2925. num_video_modes++;
  2926. else if (utils->read_bool(child_np,
  2927. "qcom,mdss-dsi-cmd-mode"))
  2928. num_cmd_modes++;
  2929. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  2930. num_video_modes++;
  2931. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  2932. num_cmd_modes++;
  2933. }
  2934. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  2935. panel->dfps_caps.dfps_list_len;
  2936. num_bit_clks = !panel->dyn_clk_caps.dyn_clk_support ? 1 :
  2937. panel->dyn_clk_caps.bit_clk_list_len;
  2938. /*
  2939. * Inflate num_of_modes by fps and bit clks in dfps.
  2940. * Single command mode for video mode panels supporting
  2941. * panel operating mode switch.
  2942. */
  2943. num_video_modes = num_video_modes * num_bit_clks * num_dfps_rates;
  2944. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  2945. (panel->panel_mode_switch_enabled))
  2946. num_cmd_modes = 1;
  2947. else
  2948. num_cmd_modes = num_cmd_modes * num_bit_clks;
  2949. panel->num_display_modes = num_video_modes + num_cmd_modes;
  2950. error:
  2951. return rc;
  2952. }
  2953. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  2954. struct dsi_panel_phy_props *phy_props)
  2955. {
  2956. int rc = 0;
  2957. if (!panel || !phy_props) {
  2958. DSI_ERR("invalid params\n");
  2959. return -EINVAL;
  2960. }
  2961. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  2962. return rc;
  2963. }
  2964. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  2965. struct dsi_dfps_capabilities *dfps_caps)
  2966. {
  2967. int rc = 0;
  2968. if (!panel || !dfps_caps) {
  2969. DSI_ERR("invalid params\n");
  2970. return -EINVAL;
  2971. }
  2972. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  2973. return rc;
  2974. }
  2975. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  2976. {
  2977. int i;
  2978. if (!mode->priv_info)
  2979. return;
  2980. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  2981. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2982. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2983. }
  2984. kfree(mode->priv_info);
  2985. }
  2986. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  2987. struct dsi_display_mode *mode, u32 frame_threshold_us)
  2988. {
  2989. u32 frame_time_us,nslices;
  2990. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  2991. dsi_transfer_time_us, pixel_clk_khz;
  2992. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  2993. struct dsi_mode_info *timing = &mode->timing;
  2994. struct dsi_display_mode *display_mode;
  2995. u32 jitter_numer, jitter_denom, prefill_lines;
  2996. u32 min_threshold_us, prefill_time_us;
  2997. u16 bpp;
  2998. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  2999. * + 1 byte dcs data command.
  3000. */
  3001. const u32 packet_overhead = 56;
  3002. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3003. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3004. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3005. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3006. if (timing->dsc_enabled) {
  3007. nslices = (timing->h_active)/(dsc->config.slice_width);
  3008. /* (slice width x bit-per-pixel + packet overhead) x
  3009. * number of slices x height x fps / lane
  3010. */
  3011. bpp = DSC_BPP(dsc->config);
  3012. bits_per_line = ((dsc->config.slice_width * bpp) +
  3013. packet_overhead) * nslices;
  3014. bits_per_line = bits_per_line / (config->num_data_lanes);
  3015. min_bitclk_hz = (bits_per_line * timing->v_active *
  3016. timing->refresh_rate);
  3017. } else {
  3018. total_active_pixels = ((dsi_h_active_dce(timing)
  3019. * timing->v_active));
  3020. /* calculate the actual bitclk needed to transfer the frame */
  3021. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3022. (config->bpp));
  3023. do_div(min_bitclk_hz, config->num_data_lanes);
  3024. }
  3025. timing->min_dsi_clk_hz = min_bitclk_hz;
  3026. if (timing->clk_rate_hz) {
  3027. /* adjust the transfer time proportionately for bit clk*/
  3028. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3029. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3030. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3031. } else if (mode->priv_info->mdp_transfer_time_us) {
  3032. timing->dsi_transfer_time_us =
  3033. mode->priv_info->mdp_transfer_time_us;
  3034. } else {
  3035. min_threshold_us = mult_frac(frame_time_us,
  3036. jitter_numer, (jitter_denom * 100));
  3037. /*
  3038. * Increase the prefill_lines proportionately as recommended
  3039. * 35lines for 60fps, 52 for 90fps, 70lines for 120fps.
  3040. */
  3041. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3042. timing->refresh_rate, 60);
  3043. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3044. (timing->v_active));
  3045. /*
  3046. * Threshold is sum of panel jitter time, prefill line time
  3047. * plus 100usec buffer time.
  3048. */
  3049. min_threshold_us = min_threshold_us + 100 + prefill_time_us;
  3050. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3051. if (min_threshold_us > frame_threshold_us)
  3052. frame_threshold_us = min_threshold_us;
  3053. timing->dsi_transfer_time_us = frame_time_us -
  3054. frame_threshold_us;
  3055. }
  3056. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3057. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3058. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3059. timing->mdp_transfer_time_us =
  3060. mode->priv_info->mdp_transfer_time_us;
  3061. }
  3062. /* Calculate pclk_khz to update modeinfo */
  3063. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3064. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3065. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3066. do_div(pixel_clk_khz, config->bpp);
  3067. display_mode->pixel_clk_khz = pixel_clk_khz;
  3068. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3069. }
  3070. int dsi_panel_get_mode(struct dsi_panel *panel,
  3071. u32 index, struct dsi_display_mode *mode,
  3072. int topology_override)
  3073. {
  3074. struct device_node *timings_np, *child_np;
  3075. struct dsi_parser_utils *utils;
  3076. struct dsi_display_mode_priv_info *prv_info;
  3077. u32 child_idx = 0;
  3078. int rc = 0, num_timings;
  3079. int traffic_mode;
  3080. int panel_mode;
  3081. void *utils_data = NULL;
  3082. if (!panel || !mode) {
  3083. DSI_ERR("invalid params\n");
  3084. return -EINVAL;
  3085. }
  3086. mutex_lock(&panel->panel_lock);
  3087. utils = &panel->utils;
  3088. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3089. if (!mode->priv_info) {
  3090. rc = -ENOMEM;
  3091. goto done;
  3092. }
  3093. prv_info = mode->priv_info;
  3094. timings_np = utils->get_child_by_name(utils->data,
  3095. "qcom,mdss-dsi-display-timings");
  3096. if (!timings_np) {
  3097. DSI_ERR("no display timing nodes defined\n");
  3098. rc = -EINVAL;
  3099. goto parse_fail;
  3100. }
  3101. num_timings = utils->get_child_count(timings_np);
  3102. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3103. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3104. rc = -EINVAL;
  3105. goto parse_fail;
  3106. }
  3107. utils_data = utils->data;
  3108. traffic_mode = panel->video_config.traffic_mode;
  3109. panel_mode = panel->panel_mode;
  3110. dsi_for_each_child_node(timings_np, child_np) {
  3111. if (index != child_idx++)
  3112. continue;
  3113. utils->data = child_np;
  3114. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3115. if (rc) {
  3116. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3117. goto parse_fail;
  3118. }
  3119. rc = dsi_panel_parse_dsc_params(mode, utils);
  3120. if (rc) {
  3121. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3122. goto parse_fail;
  3123. }
  3124. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode,
  3125. panel_mode);
  3126. if (rc) {
  3127. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3128. goto parse_fail;
  3129. }
  3130. rc = dsi_panel_parse_topology(prv_info, utils,
  3131. topology_override);
  3132. if (rc) {
  3133. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3134. goto parse_fail;
  3135. }
  3136. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3137. if (rc) {
  3138. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3139. goto parse_fail;
  3140. }
  3141. rc = dsi_panel_parse_jitter_config(mode, utils);
  3142. if (rc)
  3143. DSI_ERR(
  3144. "failed to parse panel jitter config, rc=%d\n", rc);
  3145. rc = dsi_panel_parse_phy_timing(mode, utils);
  3146. if (rc) {
  3147. DSI_ERR(
  3148. "failed to parse panel phy timings, rc=%d\n", rc);
  3149. goto parse_fail;
  3150. }
  3151. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3152. if (rc)
  3153. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3154. if (panel->panel_mode_switch_enabled) {
  3155. rc = dsi_panel_parse_panel_mode_caps(mode, utils);
  3156. if (rc) {
  3157. rc = 0;
  3158. mode->panel_mode = panel->panel_mode;
  3159. DSI_INFO(
  3160. "POMS: panel mode isn't specified in timing[%d]\n",
  3161. child_idx);
  3162. }
  3163. } else {
  3164. mode->panel_mode = panel->panel_mode;
  3165. }
  3166. }
  3167. goto done;
  3168. parse_fail:
  3169. kfree(mode->priv_info);
  3170. mode->priv_info = NULL;
  3171. done:
  3172. utils->data = utils_data;
  3173. mutex_unlock(&panel->panel_lock);
  3174. return rc;
  3175. }
  3176. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3177. struct dsi_display_mode *mode,
  3178. struct dsi_host_config *config)
  3179. {
  3180. int rc = 0;
  3181. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3182. if (!panel || !mode || !config) {
  3183. DSI_ERR("invalid params\n");
  3184. return -EINVAL;
  3185. }
  3186. mutex_lock(&panel->panel_lock);
  3187. config->panel_mode = panel->panel_mode;
  3188. memcpy(&config->common_config, &panel->host_config,
  3189. sizeof(config->common_config));
  3190. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3191. memcpy(&config->u.video_engine, &panel->video_config,
  3192. sizeof(config->u.video_engine));
  3193. } else {
  3194. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3195. sizeof(config->u.cmd_engine));
  3196. }
  3197. memcpy(&config->video_timing, &mode->timing,
  3198. sizeof(config->video_timing));
  3199. config->video_timing.mdp_transfer_time_us =
  3200. mode->priv_info->mdp_transfer_time_us;
  3201. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3202. config->video_timing.dsc = &mode->priv_info->dsc;
  3203. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3204. config->video_timing.vdc = &mode->priv_info->vdc;
  3205. if (dyn_clk_caps->dyn_clk_support)
  3206. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3207. else
  3208. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3209. config->esc_clk_rate_hz = 19200000;
  3210. mutex_unlock(&panel->panel_lock);
  3211. return rc;
  3212. }
  3213. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3214. {
  3215. int rc = 0;
  3216. if (!panel) {
  3217. DSI_ERR("invalid params\n");
  3218. return -EINVAL;
  3219. }
  3220. mutex_lock(&panel->panel_lock);
  3221. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3222. if (panel->lp11_init)
  3223. goto error;
  3224. rc = dsi_panel_power_on(panel);
  3225. if (rc) {
  3226. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3227. goto error;
  3228. }
  3229. error:
  3230. mutex_unlock(&panel->panel_lock);
  3231. return rc;
  3232. }
  3233. int dsi_panel_update_pps(struct dsi_panel *panel)
  3234. {
  3235. int rc = 0;
  3236. struct dsi_panel_cmd_set *set = NULL;
  3237. struct dsi_display_mode_priv_info *priv_info = NULL;
  3238. if (!panel || !panel->cur_mode) {
  3239. DSI_ERR("invalid params\n");
  3240. return -EINVAL;
  3241. }
  3242. mutex_lock(&panel->panel_lock);
  3243. priv_info = panel->cur_mode->priv_info;
  3244. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3245. if (priv_info->dsc_enabled)
  3246. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3247. panel->dce_pps_cmd, 0,
  3248. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3249. else if (priv_info->vdc_enabled)
  3250. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3251. panel->dce_pps_cmd, 0,
  3252. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3253. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3254. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3255. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3256. if (rc) {
  3257. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3258. goto error;
  3259. }
  3260. }
  3261. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3262. if (rc) {
  3263. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3264. panel->name, rc);
  3265. }
  3266. dsi_panel_destroy_cmd_packets(set);
  3267. error:
  3268. mutex_unlock(&panel->panel_lock);
  3269. return rc;
  3270. }
  3271. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3272. {
  3273. int rc = 0;
  3274. if (!panel) {
  3275. DSI_ERR("invalid params\n");
  3276. return -EINVAL;
  3277. }
  3278. mutex_lock(&panel->panel_lock);
  3279. if (!panel->panel_initialized)
  3280. goto exit;
  3281. /*
  3282. * Consider LP1->LP2->LP1.
  3283. * If the panel is already in LP mode, do not need to
  3284. * set the regulator.
  3285. * IBB and AB power mode would be set at the same time
  3286. * in PMIC driver, so we only call ibb setting that is enough.
  3287. */
  3288. if (dsi_panel_is_type_oled(panel) &&
  3289. panel->power_mode != SDE_MODE_DPMS_LP2)
  3290. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3291. "ibb", REGULATOR_MODE_IDLE);
  3292. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3293. if (rc)
  3294. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3295. panel->name, rc);
  3296. exit:
  3297. mutex_unlock(&panel->panel_lock);
  3298. return rc;
  3299. }
  3300. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3301. {
  3302. int rc = 0;
  3303. if (!panel) {
  3304. DSI_ERR("invalid params\n");
  3305. return -EINVAL;
  3306. }
  3307. mutex_lock(&panel->panel_lock);
  3308. if (!panel->panel_initialized)
  3309. goto exit;
  3310. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3311. if (rc)
  3312. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3313. panel->name, rc);
  3314. exit:
  3315. mutex_unlock(&panel->panel_lock);
  3316. return rc;
  3317. }
  3318. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3319. {
  3320. int rc = 0;
  3321. if (!panel) {
  3322. DSI_ERR("invalid params\n");
  3323. return -EINVAL;
  3324. }
  3325. mutex_lock(&panel->panel_lock);
  3326. if (!panel->panel_initialized)
  3327. goto exit;
  3328. /*
  3329. * Consider about LP1->LP2->NOLP.
  3330. */
  3331. if (dsi_panel_is_type_oled(panel) &&
  3332. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3333. panel->power_mode == SDE_MODE_DPMS_LP2))
  3334. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3335. "ibb", REGULATOR_MODE_NORMAL);
  3336. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3337. if (rc)
  3338. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3339. panel->name, rc);
  3340. exit:
  3341. mutex_unlock(&panel->panel_lock);
  3342. return rc;
  3343. }
  3344. int dsi_panel_prepare(struct dsi_panel *panel)
  3345. {
  3346. int rc = 0;
  3347. if (!panel) {
  3348. DSI_ERR("invalid params\n");
  3349. return -EINVAL;
  3350. }
  3351. mutex_lock(&panel->panel_lock);
  3352. if (panel->lp11_init) {
  3353. rc = dsi_panel_power_on(panel);
  3354. if (rc) {
  3355. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3356. panel->name, rc);
  3357. goto error;
  3358. }
  3359. }
  3360. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3361. if (rc) {
  3362. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3363. panel->name, rc);
  3364. goto error;
  3365. }
  3366. error:
  3367. mutex_unlock(&panel->panel_lock);
  3368. return rc;
  3369. }
  3370. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3371. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3372. {
  3373. static const int ROI_CMD_LEN = 5;
  3374. int rc = 0;
  3375. /* DTYPE_DCS_LWRITE */
  3376. char *caset, *paset;
  3377. set->cmds = NULL;
  3378. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3379. if (!caset) {
  3380. rc = -ENOMEM;
  3381. goto exit;
  3382. }
  3383. caset[0] = 0x2a;
  3384. caset[1] = (roi->x & 0xFF00) >> 8;
  3385. caset[2] = roi->x & 0xFF;
  3386. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3387. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3388. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3389. if (!paset) {
  3390. rc = -ENOMEM;
  3391. goto error_free_mem;
  3392. }
  3393. paset[0] = 0x2b;
  3394. paset[1] = (roi->y & 0xFF00) >> 8;
  3395. paset[2] = roi->y & 0xFF;
  3396. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3397. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3398. set->type = DSI_CMD_SET_ROI;
  3399. set->state = DSI_CMD_SET_STATE_LP;
  3400. set->count = 2; /* send caset + paset together */
  3401. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3402. if (!set->cmds) {
  3403. rc = -ENOMEM;
  3404. goto error_free_mem;
  3405. }
  3406. set->cmds[0].msg.channel = 0;
  3407. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3408. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3409. set->cmds[0].msg.ctrl = unicast ? ctrl_idx : 0;
  3410. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3411. set->cmds[0].msg.tx_buf = caset;
  3412. set->cmds[0].msg.rx_len = 0;
  3413. set->cmds[0].msg.rx_buf = 0;
  3414. set->cmds[0].msg.wait_ms = 0;
  3415. set->cmds[0].last_command = 0;
  3416. set->cmds[0].post_wait_ms = 0;
  3417. set->cmds[1].msg.channel = 0;
  3418. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3419. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3420. set->cmds[1].msg.ctrl = unicast ? ctrl_idx : 0;
  3421. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3422. set->cmds[1].msg.tx_buf = paset;
  3423. set->cmds[1].msg.rx_len = 0;
  3424. set->cmds[1].msg.rx_buf = 0;
  3425. set->cmds[1].msg.wait_ms = 0;
  3426. set->cmds[1].last_command = 1;
  3427. set->cmds[1].post_wait_ms = 0;
  3428. goto exit;
  3429. error_free_mem:
  3430. kfree(caset);
  3431. kfree(paset);
  3432. kfree(set->cmds);
  3433. exit:
  3434. return rc;
  3435. }
  3436. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3437. int ctrl_idx)
  3438. {
  3439. int rc = 0;
  3440. if (!panel) {
  3441. DSI_ERR("invalid params\n");
  3442. return -EINVAL;
  3443. }
  3444. mutex_lock(&panel->panel_lock);
  3445. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3446. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3447. if (rc)
  3448. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3449. panel->name, rc);
  3450. mutex_unlock(&panel->panel_lock);
  3451. return rc;
  3452. }
  3453. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3454. int ctrl_idx)
  3455. {
  3456. int rc = 0;
  3457. if (!panel) {
  3458. DSI_ERR("invalid params\n");
  3459. return -EINVAL;
  3460. }
  3461. mutex_lock(&panel->panel_lock);
  3462. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3463. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3464. if (rc)
  3465. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3466. panel->name, rc);
  3467. mutex_unlock(&panel->panel_lock);
  3468. return rc;
  3469. }
  3470. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3471. struct dsi_rect *roi)
  3472. {
  3473. int rc = 0;
  3474. struct dsi_panel_cmd_set *set;
  3475. struct dsi_display_mode_priv_info *priv_info;
  3476. if (!panel || !panel->cur_mode) {
  3477. DSI_ERR("Invalid params\n");
  3478. return -EINVAL;
  3479. }
  3480. priv_info = panel->cur_mode->priv_info;
  3481. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3482. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3483. if (rc) {
  3484. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3485. panel->name, rc);
  3486. return rc;
  3487. }
  3488. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3489. roi->x, roi->y, roi->w, roi->h);
  3490. mutex_lock(&panel->panel_lock);
  3491. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3492. if (rc)
  3493. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3494. panel->name, rc);
  3495. mutex_unlock(&panel->panel_lock);
  3496. dsi_panel_destroy_cmd_packets(set);
  3497. dsi_panel_dealloc_cmd_packets(set);
  3498. return rc;
  3499. }
  3500. int dsi_panel_pre_mode_switch_to_video(struct dsi_panel *panel)
  3501. {
  3502. int rc = 0;
  3503. if (!panel) {
  3504. DSI_ERR("Invalid params\n");
  3505. return -EINVAL;
  3506. }
  3507. mutex_lock(&panel->panel_lock);
  3508. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_TO_VID_SWITCH);
  3509. if (rc)
  3510. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3511. panel->name, rc);
  3512. mutex_unlock(&panel->panel_lock);
  3513. return rc;
  3514. }
  3515. int dsi_panel_pre_mode_switch_to_cmd(struct dsi_panel *panel)
  3516. {
  3517. int rc = 0;
  3518. if (!panel) {
  3519. DSI_ERR("Invalid params\n");
  3520. return -EINVAL;
  3521. }
  3522. mutex_lock(&panel->panel_lock);
  3523. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_TO_CMD_SWITCH);
  3524. if (rc)
  3525. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3526. panel->name, rc);
  3527. mutex_unlock(&panel->panel_lock);
  3528. return rc;
  3529. }
  3530. int dsi_panel_mode_switch_to_cmd(struct dsi_panel *panel)
  3531. {
  3532. int rc = 0;
  3533. if (!panel) {
  3534. DSI_ERR("Invalid params\n");
  3535. return -EINVAL;
  3536. }
  3537. mutex_lock(&panel->panel_lock);
  3538. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_VID_TO_CMD_SWITCH);
  3539. if (rc)
  3540. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3541. panel->name, rc);
  3542. mutex_unlock(&panel->panel_lock);
  3543. return rc;
  3544. }
  3545. int dsi_panel_mode_switch_to_vid(struct dsi_panel *panel)
  3546. {
  3547. int rc = 0;
  3548. if (!panel) {
  3549. DSI_ERR("Invalid params\n");
  3550. return -EINVAL;
  3551. }
  3552. mutex_lock(&panel->panel_lock);
  3553. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_CMD_TO_VID_SWITCH);
  3554. if (rc)
  3555. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3556. panel->name, rc);
  3557. mutex_unlock(&panel->panel_lock);
  3558. return rc;
  3559. }
  3560. int dsi_panel_switch(struct dsi_panel *panel)
  3561. {
  3562. int rc = 0;
  3563. if (!panel) {
  3564. DSI_ERR("Invalid params\n");
  3565. return -EINVAL;
  3566. }
  3567. mutex_lock(&panel->panel_lock);
  3568. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3569. if (rc)
  3570. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3571. panel->name, rc);
  3572. mutex_unlock(&panel->panel_lock);
  3573. return rc;
  3574. }
  3575. int dsi_panel_post_switch(struct dsi_panel *panel)
  3576. {
  3577. int rc = 0;
  3578. if (!panel) {
  3579. DSI_ERR("Invalid params\n");
  3580. return -EINVAL;
  3581. }
  3582. mutex_lock(&panel->panel_lock);
  3583. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3584. if (rc)
  3585. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3586. panel->name, rc);
  3587. mutex_unlock(&panel->panel_lock);
  3588. return rc;
  3589. }
  3590. int dsi_panel_enable(struct dsi_panel *panel)
  3591. {
  3592. int rc = 0;
  3593. if (!panel) {
  3594. DSI_ERR("Invalid params\n");
  3595. return -EINVAL;
  3596. }
  3597. mutex_lock(&panel->panel_lock);
  3598. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3599. if (rc)
  3600. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3601. panel->name, rc);
  3602. else
  3603. panel->panel_initialized = true;
  3604. mutex_unlock(&panel->panel_lock);
  3605. return rc;
  3606. }
  3607. int dsi_panel_post_enable(struct dsi_panel *panel)
  3608. {
  3609. int rc = 0;
  3610. if (!panel) {
  3611. DSI_ERR("invalid params\n");
  3612. return -EINVAL;
  3613. }
  3614. mutex_lock(&panel->panel_lock);
  3615. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3616. if (rc) {
  3617. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3618. panel->name, rc);
  3619. goto error;
  3620. }
  3621. error:
  3622. mutex_unlock(&panel->panel_lock);
  3623. return rc;
  3624. }
  3625. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3626. {
  3627. int rc = 0;
  3628. if (!panel) {
  3629. DSI_ERR("invalid params\n");
  3630. return -EINVAL;
  3631. }
  3632. mutex_lock(&panel->panel_lock);
  3633. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3634. if (rc) {
  3635. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3636. panel->name, rc);
  3637. goto error;
  3638. }
  3639. error:
  3640. mutex_unlock(&panel->panel_lock);
  3641. return rc;
  3642. }
  3643. int dsi_panel_disable(struct dsi_panel *panel)
  3644. {
  3645. int rc = 0;
  3646. if (!panel) {
  3647. DSI_ERR("invalid params\n");
  3648. return -EINVAL;
  3649. }
  3650. mutex_lock(&panel->panel_lock);
  3651. /* Avoid sending panel off commands when ESD recovery is underway */
  3652. if (!atomic_read(&panel->esd_recovery_pending)) {
  3653. /*
  3654. * Need to set IBB/AB regulator mode to STANDBY,
  3655. * if panel is going off from AOD mode.
  3656. */
  3657. if (dsi_panel_is_type_oled(panel) &&
  3658. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3659. panel->power_mode == SDE_MODE_DPMS_LP2))
  3660. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3661. "ibb", REGULATOR_MODE_STANDBY);
  3662. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3663. if (rc) {
  3664. /*
  3665. * Sending panel off commands may fail when DSI
  3666. * controller is in a bad state. These failures can be
  3667. * ignored since controller will go for full reset on
  3668. * subsequent display enable anyway.
  3669. */
  3670. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3671. panel->name, rc);
  3672. rc = 0;
  3673. }
  3674. }
  3675. panel->panel_initialized = false;
  3676. panel->power_mode = SDE_MODE_DPMS_OFF;
  3677. mutex_unlock(&panel->panel_lock);
  3678. return rc;
  3679. }
  3680. int dsi_panel_unprepare(struct dsi_panel *panel)
  3681. {
  3682. int rc = 0;
  3683. if (!panel) {
  3684. DSI_ERR("invalid params\n");
  3685. return -EINVAL;
  3686. }
  3687. mutex_lock(&panel->panel_lock);
  3688. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3689. if (rc) {
  3690. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3691. panel->name, rc);
  3692. goto error;
  3693. }
  3694. error:
  3695. mutex_unlock(&panel->panel_lock);
  3696. return rc;
  3697. }
  3698. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3699. {
  3700. int rc = 0;
  3701. if (!panel) {
  3702. DSI_ERR("invalid params\n");
  3703. return -EINVAL;
  3704. }
  3705. mutex_lock(&panel->panel_lock);
  3706. rc = dsi_panel_power_off(panel);
  3707. if (rc) {
  3708. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  3709. panel->name, rc);
  3710. goto error;
  3711. }
  3712. error:
  3713. mutex_unlock(&panel->panel_lock);
  3714. return rc;
  3715. }