cam_cdm_soc.c 5.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/io.h>
  7. #include <linux/of.h>
  8. #include <linux/module.h>
  9. #include <linux/timer.h>
  10. #include <linux/kernel.h>
  11. #include "cam_soc_util.h"
  12. #include "cam_smmu_api.h"
  13. #include "cam_cdm.h"
  14. #include "cam_soc_util.h"
  15. #include "cam_io_util.h"
  16. #include "cam_cdm_soc.h"
  17. #define CAM_CDM_OFFSET_FROM_REG(x, y) ((x)->offsets[y].offset)
  18. #define CAM_CDM_ATTR_FROM_REG(x, y) ((x)->offsets[y].attribute)
  19. bool cam_cdm_read_hw_reg(struct cam_hw_info *cdm_hw,
  20. uint32_t reg, uint32_t *value)
  21. {
  22. void __iomem *reg_addr;
  23. void __iomem *base =
  24. cdm_hw->soc_info.reg_map[CAM_HW_CDM_BASE_INDEX].mem_base;
  25. resource_size_t mem_len =
  26. cdm_hw->soc_info.reg_map[CAM_HW_CDM_BASE_INDEX].size;
  27. CAM_DBG(CAM_CDM, "E: b=%pK blen=%d off=%x", (void __iomem *)base,
  28. (int)mem_len, reg);
  29. reg_addr = (base + reg);
  30. if (reg_addr > (base + mem_len)) {
  31. CAM_ERR_RATE_LIMIT(CAM_CDM,
  32. "Invalid mapped region %d", reg);
  33. goto permission_error;
  34. }
  35. *value = cam_io_r_mb(reg_addr);
  36. CAM_DBG(CAM_CDM, "X b=%pK off=%x val=%x",
  37. (void __iomem *)base, reg,
  38. *value);
  39. return false;
  40. permission_error:
  41. *value = 0;
  42. return true;
  43. }
  44. bool cam_cdm_write_hw_reg(struct cam_hw_info *cdm_hw,
  45. uint32_t reg, uint32_t value)
  46. {
  47. void __iomem *reg_addr;
  48. void __iomem *base =
  49. cdm_hw->soc_info.reg_map[CAM_HW_CDM_BASE_INDEX].mem_base;
  50. resource_size_t mem_len =
  51. cdm_hw->soc_info.reg_map[CAM_HW_CDM_BASE_INDEX].size;
  52. CAM_DBG(CAM_CDM, "E: b=%pK off=%x val=%x", (void __iomem *)base,
  53. reg, value);
  54. reg_addr = (base + reg);
  55. if (reg_addr > (base + mem_len)) {
  56. CAM_ERR_RATE_LIMIT(CAM_CDM,
  57. "Accessing invalid region:%d\n",
  58. reg);
  59. goto permission_error;
  60. }
  61. cam_io_w_mb(value, reg_addr);
  62. return false;
  63. permission_error:
  64. return true;
  65. }
  66. int cam_cdm_soc_load_dt_private(struct platform_device *pdev,
  67. struct cam_cdm_private_dt_data *ptr)
  68. {
  69. int i, rc = -EINVAL, num_fifo_entries = 0;
  70. ptr->dt_num_supported_clients = of_property_count_strings(
  71. pdev->dev.of_node,
  72. "cdm-client-names");
  73. CAM_DBG(CAM_CDM, "Num supported cdm_client = %d",
  74. ptr->dt_num_supported_clients);
  75. if (ptr->dt_num_supported_clients >
  76. CAM_PER_CDM_MAX_REGISTERED_CLIENTS) {
  77. CAM_ERR(CAM_CDM, "Invalid count of client names count=%d",
  78. ptr->dt_num_supported_clients);
  79. rc = -EINVAL;
  80. goto end;
  81. }
  82. if (ptr->dt_num_supported_clients < 0) {
  83. CAM_DBG(CAM_CDM, "No cdm client names found");
  84. ptr->dt_num_supported_clients = 0;
  85. ptr->dt_cdm_shared = false;
  86. } else {
  87. ptr->dt_cdm_shared = true;
  88. }
  89. for (i = 0; i < ptr->dt_num_supported_clients; i++) {
  90. rc = of_property_read_string_index(pdev->dev.of_node,
  91. "cdm-client-names", i, &(ptr->dt_cdm_client_name[i]));
  92. CAM_DBG(CAM_CDM, "cdm-client-names[%d] = %s", i,
  93. ptr->dt_cdm_client_name[i]);
  94. if (rc < 0) {
  95. CAM_ERR(CAM_CDM, "Reading cdm-client-names failed");
  96. goto end;
  97. }
  98. }
  99. rc = of_property_read_u8(pdev->dev.of_node, "cdm-priority-group",
  100. &ptr->priority_group);
  101. if (rc < 0) {
  102. ptr->priority_group = 0;
  103. rc = 0;
  104. }
  105. ptr->config_fifo = of_property_read_bool(pdev->dev.of_node,
  106. "config-fifo");
  107. if (ptr->config_fifo) {
  108. num_fifo_entries = of_property_count_u32_elems(
  109. pdev->dev.of_node,
  110. "fifo-depths");
  111. if (num_fifo_entries != CAM_CDM_NUM_BL_FIFO) {
  112. CAM_ERR(CAM_CDM,
  113. "Wrong number of configurable FIFOs %d",
  114. num_fifo_entries);
  115. rc = -EINVAL;
  116. goto end;
  117. }
  118. for (i = 0; i < num_fifo_entries; i++) {
  119. rc = of_property_read_u32_index(pdev->dev.of_node,
  120. "fifo-depths", i, &ptr->fifo_depth[i]);
  121. if (rc < 0) {
  122. CAM_ERR(CAM_CDM,
  123. "Unable to read fifo-depth rc %d",
  124. rc);
  125. goto end;
  126. }
  127. CAM_DBG(CAM_CDM, "FIFO%d depth is %d",
  128. i, ptr->fifo_depth[i]);
  129. }
  130. } else {
  131. for (i = 0; i < CAM_CDM_BL_FIFO_MAX; i++) {
  132. ptr->fifo_depth[i] = CAM_CDM_BL_FIFO_LENGTH_MAX_DEFAULT;
  133. CAM_DBG(CAM_CDM, "FIFO%d depth is %d",
  134. i, ptr->fifo_depth[i]);
  135. }
  136. }
  137. end:
  138. return rc;
  139. }
  140. int cam_hw_cdm_soc_get_dt_properties(struct cam_hw_info *cdm_hw,
  141. const struct of_device_id *table)
  142. {
  143. int rc;
  144. struct cam_hw_soc_info *soc_ptr;
  145. const struct of_device_id *id;
  146. struct cam_cdm *cdm_core = NULL;
  147. if (!cdm_hw || (cdm_hw->soc_info.soc_private)
  148. || !(cdm_hw->soc_info.pdev))
  149. return -EINVAL;
  150. cdm_core = cdm_hw->core_info;
  151. soc_ptr = &cdm_hw->soc_info;
  152. rc = cam_soc_util_get_dt_properties(soc_ptr);
  153. if (rc != 0) {
  154. CAM_ERR(CAM_CDM, "Failed to retrieve the CDM dt properties");
  155. goto end;
  156. }
  157. soc_ptr->soc_private = kzalloc(
  158. sizeof(struct cam_cdm_private_dt_data),
  159. GFP_KERNEL);
  160. if (!soc_ptr->soc_private)
  161. return -ENOMEM;
  162. rc = cam_cdm_soc_load_dt_private(soc_ptr->pdev,
  163. soc_ptr->soc_private);
  164. if (rc != 0) {
  165. CAM_ERR(CAM_CDM, "Failed to load CDM dt private data");
  166. goto error;
  167. }
  168. id = of_match_node(table, soc_ptr->pdev->dev.of_node);
  169. if ((!id) || !(id->data)) {
  170. CAM_ERR(CAM_CDM, "Failed to retrieve the CDM id table");
  171. goto error;
  172. }
  173. cdm_core->offsets =
  174. (struct cam_cdm_hw_reg_offset *)id->data;
  175. CAM_DBG(CAM_CDM, "name %s", cdm_core->name);
  176. snprintf(cdm_core->name, sizeof(cdm_core->name), "%s%d",
  177. id->compatible, soc_ptr->index);
  178. CAM_DBG(CAM_CDM, "name %s", cdm_core->name);
  179. goto end;
  180. error:
  181. rc = -EINVAL;
  182. kfree(soc_ptr->soc_private);
  183. soc_ptr->soc_private = NULL;
  184. end:
  185. return rc;
  186. }
  187. int cam_cdm_intf_mgr_soc_get_dt_properties(
  188. struct platform_device *pdev, struct cam_cdm_intf_mgr *mgr)
  189. {
  190. int rc;
  191. rc = of_property_read_u32(pdev->dev.of_node,
  192. "num-hw-cdm", &mgr->dt_supported_hw_cdm);
  193. CAM_DBG(CAM_CDM, "Number of HW cdm supported =%d",
  194. mgr->dt_supported_hw_cdm);
  195. return rc;
  196. }